1 /**
2 * @file UART_soc.c
3 *
4 * @brief This file defines the UART interface structure specific to TPR12
5 */
6 /*
7 * Copyright (c) 2020, Texas Instruments Incorporated
8 * All rights reserved.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 *
14 * * Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 *
17 * * Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in the
19 * documentation and/or other materials provided with the distribution.
20 *
21 * * Neither the name of Texas Instruments Incorporated nor the names of
22 * its contributors may be used to endorse or promote products derived
23 * from this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
27 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
29 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
30 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
31 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
32 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
33 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
34 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
35 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 */
37 /** ============================================================================*/
39 #include <ti/csl/soc.h>
40 #include <ti/drv/uart/UART.h>
41 #include <ti/drv/uart/soc/UART_soc.h>
42 #include <ti/drv/uart/src/v3/uartsci.h>
44 /**************************************************************************
45 ************************* Extern Declarations ****************************
46 **************************************************************************/
48 /**
49 * @brief This is the UART Driver registered function table
50 */
51 extern UART_FxnTable gUartSciFxnTable;
53 /**************************************************************************
54 ************************** Global Variables ******************************
55 **************************************************************************/
57 /**************************************************************************
58 * On the XWR18xx: The UART is available on both the DSS and MSS. The UART
59 * platform configuration is MSS and DSS specific
60 **************************************************************************/
62 #define UART_MODULE_FREQ_200M (200000000U)
65 #if defined (__TI_ARM_V7R4__)
66 #define CSL_UART_PER_CNT (CSL_MSS_UART_PER_CNT + CSL_DSS_UART_PER_CNT)
68 /**
69 * @brief This is the TPR12 MSS accessible UART configuration. There are
70 * 2 UART instances (SCI-A and SCI-B) available on the MSS and 1 UART
71 * instance (SCI-A) available on the DSS.
72 */
73 UartSci_HwCfg uartInitCfg[CSL_UART_PER_CNT] =
74 {
75 /* UART1 Hardware configuration:
76 * - Capable of sending and receiving data
77 */
78 {
79 (CSL_sciRegs *)CSL_MSS_SCIA_U_BASE,
80 UartSci_Duplexity_FULL,
81 CSL_MSS_INTR_MSS_SCIA_INT0,
82 EDMA_MSS_TPCC_A_EVT_SCIA_TX_DMA_REQ,
83 EDMA_MSS_TPCC_A_EVT_SCIA_RX_DMA_REQ,
84 #ifdef UART_DMA_ENABLE
85 &UartSci_openEDMA,
86 &UartSci_closeEDMA,
87 &UartSci_isEDMAEnabled,
88 &UartSci_initiateRxEDMA,
89 &UartSci_initiateTxEDMA,
90 #else
91 NULL,
92 NULL,
93 NULL,
94 NULL,
95 NULL,
96 #endif
97 {
98 UART_MODULE_FREQ_200M,
99 NULL,
100 0,
101 TRUE, /* default DMA mode */
102 FALSE, /* Loopback disabled by default */
103 TRUE /* Interrupt enabled by default */
104 }
105 },
107 /* UART2 Hardware configuration:
108 * - Capable of only sending data
109 */
110 {
111 (CSL_sciRegs *)CSL_MSS_SCIB_U_BASE,
112 UartSci_Duplexity_TX_ONLY,
113 CSL_MSS_INTR_MSS_SCIB_INT0,
114 EDMA_MSS_TPCC_A_EVT_SCIB_TX_DMA_REQ,
115 EDMA_MSS_TPCC_A_EVT_SCIB_RX_DMA_REQ,
116 #ifdef UART_DMA_ENABLE
117 &UartSci_openEDMA,
118 &UartSci_closeEDMA,
119 &UartSci_isEDMAEnabled,
120 &UartSci_initiateRxEDMA,
121 &UartSci_initiateTxEDMA,
122 #else
123 NULL,
124 NULL,
125 NULL,
126 NULL,
127 NULL,
128 #endif
129 {
130 UART_MODULE_FREQ_200M,
131 NULL,
132 0,
133 TRUE, /* default DMA mode */
134 FALSE, /* Loopback disabled by default */
135 TRUE /* Interrupt enabled by default */
136 }
137 },
139 /* DSS UART Hardware configuration:
140 * - Capable of sending and receiving data
141 * Note: Need to use EDMA_DRV_INST_DSS_B for EDMA_DSS_TPCC_B
142 */
143 {
144 (CSL_sciRegs *)CSL_DSS_SCIA_U_BASE,
145 UartSci_Duplexity_FULL,
146 CSL_MSS_INTR_DSS_SCIA_INT0,
147 EDMA_DSS_TPCC_B_EVT_SCIA_TX_DMA_REQ,
148 EDMA_DSS_TPCC_B_EVT_SCIA_RX_DMA_REQ,
149 #ifdef UART_DMA_ENABLE
150 &UartSci_openEDMA,
151 &UartSci_closeEDMA,
152 &UartSci_isEDMAEnabled,
153 &UartSci_initiateRxEDMA,
154 &UartSci_initiateTxEDMA,
155 #else
156 NULL,
157 NULL,
158 NULL,
159 NULL,
160 NULL,
161 #endif
162 {
163 UART_MODULE_FREQ_200M,
164 NULL,
165 0,
166 TRUE, /* default DMA mode */
167 FALSE, /* Loopback disabled by default */
168 TRUE /* Interrupt enabled by default */
169 }
170 }
171 };
173 /* UART objects */
174 UartSci_Driver UartObjects[CSL_UART_PER_CNT];
176 /**
177 * @brief The MSS on the TPR12 Platform has 3 UART Modules which can be used.
178 */
179 UART_Config UART_config[] =
180 {
181 {
182 &gUartSciFxnTable, /* UART SCI Driver Function Table: */
183 (void *)&UartObjects[0], /* UART Driver Object: */
184 (void *)&uartInitCfg[0] /* UART Hw configuration: */
185 },
186 {
187 &gUartSciFxnTable, /* UART SCI Driver Function Table: */
188 (void *)&UartObjects[1], /* UART Driver Object: */
189 (void *)&uartInitCfg[1] /* UART Hw configuration: */
190 },
191 {
192 &gUartSciFxnTable, /* UART SCI Driver Function Table: */
193 (void *)&UartObjects[2], /* UART Driver Object: */
194 (void *)&uartInitCfg[2] /* UART Hw configuration: */
195 },
196 {
197 NULL, /* UART SCI Driver Function Table: */
198 NULL, /* UART Driver Object: */
199 NULL /* UART Hw configuration: */
200 }
201 };
203 #elif defined (_TMS320C6X)
205 /**
206 * @brief This is the TPR12 DSS specific UART configuration. There is only 1 available
207 * UART instance. This should *NOT* be modified by the customer.
208 */
209 #define CSL_UART_PER_CNT CSL_DSS_UART_PER_CNT
211 UartSci_HwCfg uartInitCfg[CSL_UART_PER_CNT] =
212 {
213 /* DSS UART Hardware configuration:
214 * - Capable of sending and receiving data
215 */
216 {
217 (CSL_sciRegs *)CSL_DSS_SCIA_U_BASE,
218 UartSci_Duplexity_FULL,
219 CSL_DSS_INTR_DSS_SCIA_INT0,
220 EDMA_DSS_TPCC_B_EVT_SCIA_TX_DMA_REQ,
221 EDMA_DSS_TPCC_B_EVT_SCIA_RX_DMA_REQ,
222 #ifdef UART_DMA_ENABLE
223 &UartSci_openEDMA,
224 &UartSci_closeEDMA,
225 &UartSci_isEDMAEnabled,
226 &UartSci_initiateRxEDMA,
227 &UartSci_initiateTxEDMA,
228 #else
229 NULL,
230 NULL,
231 NULL,
232 NULL,
233 NULL,
234 #endif
235 {
236 UART_MODULE_FREQ_200M,
237 NULL,
238 0,
239 TRUE, /* default DMA mode */
240 FALSE, /* Loopback disabled by default */
241 TRUE /* Interrupt enabled by default */
242 }
243 }
244 };
246 /* UART objects */
247 UartSci_Driver UartObjects[CSL_UART_PER_CNT];
249 /**
250 * @brief The DSS on the TPR12 Platform has 1 UART Modules which can be used.
251 */
252 UART_Config UART_config[] =
253 {
254 {
255 &gUartSciFxnTable, /* UART SCI Driver Function Table: */
256 (void *)&UartObjects[0], /* UART Driver Object: */
257 (void *)&uartInitCfg[0] /* UART Hw configuration: */
258 },
259 {
260 NULL, /* UART SCI Driver Function Table: */
261 NULL, /* UART Driver Object: */
262 NULL /* UART Hw configuration: */
263 }
264 };
266 #else
267 #error "Error: Please check the compiler flags since BUILD_XXX is not defined for the TPR12 device"
268 #endif
270 /**
271 * \brief This API gets the SoC level of UART intial configuration
272 *
273 * \param index UART instance index.
274 * \param cfg Pointer to UART SOC initial config.
275 *
276 * \return 0 success: -1: error
277 *
278 */
279 int32_t UART_socGetInitCfg(uint32_t index, UART_HwAttrs *cfg)
280 {
281 int32_t ret = 0;
283 if (index < CSL_UART_PER_CNT)
284 {
285 *cfg = uartInitCfg[index].swCfg;
286 }
287 else
288 {
289 ret = (-((int32_t)1));
290 }
292 return ret;
293 }
295 /**
296 * \brief This API sets the SoC level of UART intial configuration
297 *
298 * \param index UART instance index.
299 * \param cfg Pointer to UART SOC initial config.
300 *
301 * \return 0 success: -1: error
302 *
303 */
304 int32_t UART_socSetInitCfg(uint32_t index, const UART_HwAttrs *cfg)
305 {
306 int32_t ret = 0;
308 if (index < CSL_UART_PER_CNT)
309 {
310 uartInitCfg[index].swCfg = *cfg;
311 }
312 else
313 {
314 ret = (-((int32_t)1));
315 }
317 return ret;
318 }
320 #if defined (BUILD_MCU)
321 /**
322 * \brief This API initializes the SoC level of UART configuration
323 * based on the core and domain
324 *
325 * \param none
326 *
327 * \return none
328 *
329 */
330 void UART_socInit(void)
331 {
332 }
333 #endif