1 /**
2 * @file UART_soc.c
3 *
4 * @brief This file defines the UART interface structure specific to K2K
5 */
6 /*
7 * Copyright (c) 2015 - 2018, Texas Instruments Incorporated
8 * All rights reserved.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 *
14 * * Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 *
17 * * Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in the
19 * documentation and/or other materials provided with the distribution.
20 *
21 * * Neither the name of Texas Instruments Incorporated nor the names of
22 * its contributors may be used to endorse or promote products derived
23 * from this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
27 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
29 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
30 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
31 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
32 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
33 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
34 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
35 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 */
37 /** ============================================================================*/
39 #include <ti/csl/csl_utils.h>
40 #include <ti/csl/soc.h>
41 #include <ti/csl/csl_device_interrupt.h>
42 #include <ti/drv/uart/UART.h>
43 #ifdef UART_DMA_ENABLE
44 #include <ti/sdo/edma3/drv/edma3_drv.h>
45 #endif
46 #include <ti/drv/uart/soc/UART_soc.h>
48 /* UART configuration structure */
49 UART_HwAttrs uartInitCfg[CSL_UART_PER_CNT] =
50 {
51 {
52 CSL_UART_0_REGS, /* UART base address */
53 #ifdef _TMS320C6X
54 OSAL_REGINT_INTVEC_EVENT_COMBINER, /* default DSP Interrupt vector number, can be set in UART_socSetInitCfg() API */
55 28, /* default DSP INTC UART Event ID, can be set in UART_socSetInitCfg() API */
56 0, /* CIC number */
57 #else
58 CSL_ARM_GIC_UART_0_UARTINT + 32, /* UART int number for ARM GIC INTC */
59 0, /* Event ID not used for ARM INTC */
60 UART_INVALID_INTC_MUX_NUM, /* CIC num not used in ARM GIC */
61 #endif
62 CSL_CIC0_UART_0_UARTINT, /* CIC UART Event ID */
63 70, /* default CIC Host Interrupt, map to CIC_OUT70_PLUS_10_MUL_N event */
64 CSL_EDMACC_2_UART_0_URXEVT,
65 CSL_EDMACC_2_UART_0_UTXEVT,
66 0,
67 0,
68 0,
69 0,
70 983000000/6, /* default UART frequency, system clock/6 */
71 0, /* version */
72 NULL,
73 TRUE, /* dmaMode */
74 FALSE, /* loopback */
75 TRUE, /* enableInterrupt */
76 UART_RXTRIGLVL_1, /* rxTrigLvl */
77 1, /* txTrigLvl */
78 UART16x_OPER_MODE, /* operMode, 16x over sampling mode by default */
79 },
80 {
81 CSL_UART_1_REGS,
82 #ifdef _TMS320C6X
83 OSAL_REGINT_INTVEC_EVENT_COMBINER,
84 29,
85 0,
86 #else
87 CSL_ARM_GIC_UART_1_UARTINT + 32,
88 0,
89 UART_INVALID_INTC_MUX_NUM, /* CIC num not used in ARM GIC */
90 #endif
91 CSL_CIC0_UART_1_UARTINT,
92 71,
93 CSL_EDMACC_3_UART_1_URXEVT,
94 CSL_EDMACC_3_UART_1_UTXEVT,
95 0,
96 0,
97 0,
98 0,
99 983000000/6, /* default UART frequency, system clock/6 */
100 0, /* version */
101 NULL,
102 TRUE,
103 FALSE,
104 TRUE,
105 UART_RXTRIGLVL_1,
106 1,
107 UART16x_OPER_MODE,
108 },
109 };
111 /* UART objects */
112 UART_V0_Object UartObjects[CSL_UART_PER_CNT];
114 /* UART configuration structure */
115 CSL_PUBLIC_CONST UART_Config UART_config[CSL_UART_PER_CNT + 1U] =
116 {
117 {
118 &UART_FxnTable_v0,
119 &UartObjects[0],
120 &uartInitCfg[0]
121 },
123 {
124 &UART_FxnTable_v0,
125 &UartObjects[1],
126 &uartInitCfg[1]
127 },
129 {
130 NULL,
131 NULL,
132 NULL
133 }
134 };
136 /**
137 * \brief This API gets the SoC level of UART intial configuration
138 *
139 * \param index UART instance index.
140 * \param cfg Pointer to UART SOC initial config.
141 *
142 * \return 0 success: -1: error
143 *
144 */
145 int32_t UART_socGetInitCfg(uint32_t index, UART_HwAttrs *cfg)
146 {
147 int32_t ret = 0;
149 if (index < CSL_UART_PER_CNT)
150 {
151 *cfg = uartInitCfg[index];
152 }
153 else
154 {
155 ret = -1;
156 }
157 return ret;
158 }
160 /**
161 * \brief This API sets the SoC level of UART intial configuration
162 *
163 * \param index UART instance index.
164 * \param cfg Pointer to UART SOC initial config.
165 *
166 * \return 0 success: -1: error
167 *
168 */
169 int32_t UART_socSetInitCfg(uint32_t index, const UART_HwAttrs *cfg)
170 {
171 int32_t ret = 0;
173 if (index < CSL_UART_PER_CNT)
174 {
175 uartInitCfg[index] = *cfg;
176 }
177 else
178 {
179 ret = -1;
180 }
181 return ret;
182 }
184 #ifdef UART_DMA_ENABLE
185 /**
186 * \brief This API gets the SoC specific EDMA3 info
187 *
188 * \param index UART instance index.
189 * \param edma3Id pointer to EDMA3CC #.
190 * \param edma3Event pointer to EDMA3 event array.
191 *
192 * \return none
193 *
194 */
195 void UART_getEdmaInfo(uint32_t index, uint32_t *edma3Id, uint32_t *edma3Event)
196 {
197 const uint32_t edma3id[CSL_UART_PER_CNT] = {2, 3};
198 const uint32_t edma3RxEvent[CSL_UART_PER_CNT] =
199 {
200 CSL_EDMACC_2_UART_0_URXEVT,
201 CSL_EDMACC_3_UART_1_URXEVT
202 };
203 const uint32_t edma3TxEvent[CSL_UART_PER_CNT] =
204 {
205 CSL_EDMACC_2_UART_0_UTXEVT,
206 CSL_EDMACC_3_UART_1_UTXEVT
207 };
209 *edma3Id = edma3id[index];
210 edma3Event[0] = edma3RxEvent[index];
211 edma3Event[1] = edma3TxEvent[index];
212 }
213 #endif