1 /**
2 * @file main_test.c
3 *
4 * @brief This file tests the UART driver APIs in Blocking mode.
5 */
6 /*
7 * Copyright (c) 2014 - 2018, Texas Instruments Incorporated
8 * All rights reserved.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 *
14 * * Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 *
17 * * Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in the
19 * documentation and/or other materials provided with the distribution.
20 *
21 * * Neither the name of Texas Instruments Incorporated nor the names of
22 * its contributors may be used to endorse or promote products derived
23 * from this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
27 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
29 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
30 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
31 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
32 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
33 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
34 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
35 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 */
38 #include <stdio.h>
39 #include <string.h>
41 #ifdef USE_BIOS
42 /* XDCtools Header files */
43 #include <xdc/std.h>
44 #include <xdc/runtime/Error.h>
45 #include <xdc/runtime/System.h>
47 /* BIOS Header files */
48 #include <ti/sysbios/BIOS.h>
49 #include <ti/sysbios/knl/Task.h>
50 #endif /* #ifdef USE_BIOS */
52 /* CSL Header files */
53 #if defined(_TMS320C6X)
54 #include <ti/csl/csl_chip.h>
55 #endif
56 #include <ti/csl/soc.h>
57 #include <ti/csl/csl_types.h>
59 /* OSAL Header files */
60 #include <ti/osal/osal.h>
62 /* UART Header files */
63 #include <ti/drv/uart/UART.h>
64 #include <ti/drv/uart/UART_stdio.h>
65 #include <ti/drv/uart/src/UART_osal.h>
66 #include <ti/drv/uart/soc/UART_soc.h>
68 #include "UART_board.h"
70 #if defined(SOC_J721E) || defined(SOC_J7200)
71 #include <ti/csl/soc.h>
72 #endif
74 #if defined(SOC_J721E) || defined(SOC_AM65XX) || defined(SOC_J7200) || defined(SOC_AM64X)
75 #include <ti/drv/sciclient/sciclient.h>
76 #endif
78 #if defined(SOC_J721E) || defined(SOC_J7200)
79 #include <ti/csl/csl_clec.h>
80 #endif
82 #if defined (__C7100__)
83 #include <ti/csl/arch/csl_arch.h>
84 #endif
86 #if defined(SOC_TPR12)
87 #define QT_BUILD
88 #define UART_RX_LOOPBACK_ONLY
89 #define UART_API2_NOT_SUPPORTED
90 #define UART_NO_FIFO
91 //#define UART_RW_INT_ONLY
92 #endif
94 void Uart_appC7xPreInit(void);
96 /* Define the UART test interface */
97 typedef struct UART_Tests_s
98 {
99 bool (*testFunc)(bool);
100 bool dmaMode;
101 int16_t testId;
102 char testDesc[80];
104 } UART_Tests;
106 /* UART test ID definitions */
107 #define UART_TEST_ID_DMA 0 /* UART DMA read write test in block mode */
108 #define UART_TEST_ID_INT 1 /* UART non-DMA read write test in block mode */
109 #define UART_TEST_ID_DMA_CB 2 /* UART DMA read write test in callback mode */
110 #define UART_TEST_ID_CB 3 /* UART non-DMA read write test in callback mode */
111 #define UART_TEST_ID_DMA_TO 4 /* UART DMA timeout test */
112 #define UART_TEST_ID_TO 5 /* UART non DMA timeout test */
113 #define UART_TEST_ID_DMA_RXERR 6 /* UART DMA RX error test */
114 #define UART_TEST_ID_RXERR 7 /* UART non-DMA RX error test */
115 #define UART_TEST_ID_DMA_CANCEL 8 /* UART DMA read write cancel test */
116 #define UART_TEST_ID_CANCEL 9 /* UART non-DMA read write cancel test */
117 #define UART_TEST_ID_DMA_RW 10 /* UART DMA simultaneous read write test */
118 #define UART_TEST_ID_RW 11 /* UART non-DMA simultaneous read write test */
119 #define UART_TEST_ID_DMA_TRGLVL 12 /* UART DMA TX/RX FIFO trigger level test */
120 #define UART_TEST_ID_PRINTF 13 /* UART stdio printf and scanf test */
121 #define UART_TEST_ID_TRGLVL 14 /* UART non-DMA TX/RX FIFO trigger level test */
122 #define UART_TEST_ID_POLL_TO 15 /* UART read write polling timeout test */
123 #define UART_TEST_ID_STDIOPARAMS 16 /* UART stdio printf and scanf test, with configurable params(Default params) */
124 #define UART_TEST_ID_INT_DISABLE 17 /* UART read write test with interrupt disabled */
125 #define UART_TEST_ID_RDVERIFY 18 /* UART non-DMA read API Test in loopback mode */
126 #define UART_TEST_ID_MULTI_INSTS 19 /* UART DMA multiple instances test in loopback mode */
127 #define UART_TEST_ID_API 20 /* UART API Test */
128 #define UART_TEST_ID_PROF_TX 21 /* UART non-DMA/DMA Blocking/Polling transmit polling */
129 #define UART_TEST_ID_DMA_LB_DATA 22 /* UART DMA data transfer test in loopback mode */
130 #define UART_TEST_ID_LB_DATA 23 /* UART non-DMA data transfer test in loopback mode */
132 /* Length of the input in number of characters */
133 #define UART_TEST_READ_LEN (16U)
134 #define UART_RDVERIFY_READ_LEN (4U)
136 /* Timeout value of read and write */
137 #ifdef QT_BUILD
138 #define UART_TEST_TIMEOUT (50U)
139 #else
140 #define UART_TEST_TIMEOUT (5000U)
141 #endif
143 /* Max number of instances to test in multiple instance test case */
144 #define UART_TEST_NUM_INSTS (2U)
145 /* MAX Data Pattern Test Size for the Data Tests: */
146 #define MAX_TEST_BUFFER_SIZE 128
148 #define UART_TEST_CACHE_LINE_SIZE (128U)
149 #if (defined(_TMS320C6X) || defined (__TI_ARM_V7M4__))
150 #pragma DATA_ALIGN (scanPrompt, UART_TEST_CACHE_LINE_SIZE)
151 char scanPrompt[256];
152 #else
153 char scanPrompt[256] __attribute__ ((aligned (UART_TEST_CACHE_LINE_SIZE)));
154 #endif
155 char echoPrompt[40] = "\n\r Data entered is as follows \r\n";
156 char dataPrint[40] = "\r\n enter the data of 16 character \r\n";
157 char readTimeoutPrompt[60] = "\r\n Read timed out \r\n";
158 char breakErrPrompt[60] = "\r\n Received a break condition error \r\n";
159 char rdCancelPrompt[60] = "\r\n Previous read canceled \r\n";
160 char wrCancelPrompt[60] = "\r\n Previous write canceled \r\n";
161 char fifoTrgLvlData[256] = "0123456789112345678921234567893123456789412345678951234567896123456789712345678981234567899123456789";
163 char stdioPrint[64] = "\r\n enter the data of 16 character and press ENTER \r\n";
165 UART_Transaction callbackTransaction;
166 SemaphoreP_Handle callbackSem = NULL;
168 uint32_t uartTestInstance;
170 uint32_t verifyLoopback = FALSE;
172 uint32_t verifyRS485 = FALSE;
174 UART_PAR uartParity = UART_PAR_NONE;
176 /* Global Variable which holds the UART Handle */
177 UART_Handle gUARTHandle = NULL;
179 #if defined(SOC_AM65XX) || defined(SOC_J721E) || defined(SOC_J7200) || defined(SOC_AM64X)
180 #ifdef UART_DMA_ENABLE
181 /*
182 * Ring parameters
183 */
184 /** \brief Number of ring entries - we can prime this much memcpy operations */
185 #define UDMA_TEST_APP_RING_ENTRIES (1U)
186 /** \brief Size (in bytes) of each ring entry (Size of pointer - 64-bit) */
187 #define UDMA_TEST_APP_RING_ENTRY_SIZE (sizeof(uint64_t))
188 /** \brief Total ring memory */
189 #define UDMA_TEST_APP_RING_MEM_SIZE (UDMA_TEST_APP_RING_ENTRIES * \
190 UDMA_TEST_APP_RING_ENTRY_SIZE)
191 /** \brief This ensures every channel memory is aligned */
192 #define UDMA_TEST_APP_RING_MEM_SIZE_ALIGN ((UDMA_TEST_APP_RING_MEM_SIZE + UDMA_CACHELINE_ALIGNMENT) & ~(UDMA_CACHELINE_ALIGNMENT - 1U))
194 /**
195 * \brief UDMA host mode buffer descriptor memory size.
196 * Make it multiple of UART_TEST_CACHE_LINE_SIZE alignment
197 */
198 /** \brief UDMA host mode buffer descriptor memory size. */
199 #define UDMA_TEST_APP_DESC_SIZE (sizeof(CSL_UdmapCppi5HMPD))
200 /** \brief This ensures every channel memory is aligned */
201 #define UDMA_TEST_APP_DESC_SIZE_ALIGN ((UDMA_TEST_APP_DESC_SIZE + UDMA_CACHELINE_ALIGNMENT) & ~(UDMA_CACHELINE_ALIGNMENT - 1U))
203 /*
204 * UDMA driver objects
205 */
206 struct Udma_DrvObj gUdmaDrvObj;
207 struct Udma_ChObj gUdmaTxChObj;
208 struct Udma_ChObj gUdmaRxChObj;
209 struct Udma_EventObj gUdmaTxCqEventObj;
210 struct Udma_EventObj gUdmaRxCqEventObj;
212 Udma_DrvHandle gDrvHandle = NULL;
213 /*
214 * UDMA Memories
215 */
216 static uint8_t gTxRingMem[UDMA_TEST_APP_RING_MEM_SIZE_ALIGN] __attribute__((aligned(UDMA_CACHELINE_ALIGNMENT)));
217 static uint8_t gTxCompRingMem[UDMA_TEST_APP_RING_MEM_SIZE_ALIGN] __attribute__((aligned(UDMA_CACHELINE_ALIGNMENT)));
218 static uint8_t gTdTxCompRingMem[UDMA_TEST_APP_RING_MEM_SIZE_ALIGN] __attribute__((aligned(UDMA_CACHELINE_ALIGNMENT)));
219 static uint8_t gUdmaTxHpdMem[UDMA_TEST_APP_DESC_SIZE_ALIGN] __attribute__((aligned(UDMA_CACHELINE_ALIGNMENT)));
220 static uint8_t gRxRingMem[UDMA_TEST_APP_RING_MEM_SIZE_ALIGN] __attribute__((aligned(UDMA_CACHELINE_ALIGNMENT)));
221 static uint8_t gRxCompRingMem[UDMA_TEST_APP_RING_MEM_SIZE_ALIGN] __attribute__((aligned(UDMA_CACHELINE_ALIGNMENT)));
222 static uint8_t gTdRxCompRingMem[UDMA_TEST_APP_RING_MEM_SIZE_ALIGN] __attribute__((aligned(UDMA_CACHELINE_ALIGNMENT)));
223 static uint8_t gUdmaRxHpdMem[UDMA_TEST_APP_DESC_SIZE_ALIGN] __attribute__((aligned(UDMA_CACHELINE_ALIGNMENT)));
224 static UART_dmaInfo gUdmaInfo;
226 Udma_DrvHandle UartApp_udmaInit(UART_HwAttrs *cfg)
227 {
228 int32_t retVal = UDMA_SOK;
229 Udma_InitPrms initPrms;
230 uint32_t instId;
232 if (gDrvHandle == NULL)
233 {
234 /* UDMA driver init */
235 #if defined(SOC_J721E) || defined(SOC_J7200) || defined(SOC_AM65XX)
236 #if defined (BUILD_MCU1_0) || defined (BUILD_MCU1_1)
237 instId = UDMA_INST_ID_MCU_0;
238 #else
239 instId = UDMA_INST_ID_MAIN_0;
240 #endif
241 #endif
243 #if defined(SOC_AM64X)
244 instId = UDMA_INST_ID_PKTDMA_0;
245 #endif
247 UdmaInitPrms_init(instId, &initPrms);
248 #if defined(SOC_J721E) || defined(SOC_J7200)
249 /*
250 * Modify the default virtual interrupt configuration
251 * in UDMA RM table to support DMA mode, since UART
252 * DMA example uses more than two DMA events which
253 * requires numVintr > 2
254 */
255 #if defined (BUILD_MCU2_1)
256 initPrms.rmInitPrms.startVintr = 226U;
257 initPrms.rmInitPrms.numVintr = 18U;
258 #endif
259 #if (defined (BUILD_MCU1_1) || defined(BUILD_MCU1_0))
260 initPrms.rmInitPrms.startVintr = 124U;
261 initPrms.rmInitPrms.numVintr = 4U;
262 #endif
264 #endif
265 retVal = Udma_init(&gUdmaDrvObj, &initPrms);
266 if(UDMA_SOK == retVal)
267 {
268 gDrvHandle = &gUdmaDrvObj;
269 }
270 }
272 if(gDrvHandle != NULL)
273 {
274 gDrvHandle = &gUdmaDrvObj;
276 gUdmaInfo.txChHandle = (void *)&gUdmaTxChObj;
277 gUdmaInfo.rxChHandle = (void *)&gUdmaRxChObj;
278 gUdmaInfo.txRingMem = (void *)&gTxRingMem[0];
279 gUdmaInfo.cqTxRingMem = (void *)&gTxCompRingMem[0];
280 gUdmaInfo.tdCqTxRingMem = (void *)&gTdTxCompRingMem[0];
281 gUdmaInfo.rxRingMem = (void *)&gRxRingMem[0];
282 gUdmaInfo.cqRxRingMem = (void *)&gRxCompRingMem[0];
283 gUdmaInfo.tdCqRxRingMem = (void *)&gTdRxCompRingMem[0];
284 gUdmaInfo.txHpdMem = (void *)&gUdmaTxHpdMem[0];
285 gUdmaInfo.rxHpdMem = (void *)&gUdmaRxHpdMem[0];
286 gUdmaInfo.txEventHandle = (void *)&gUdmaTxCqEventObj;
287 gUdmaInfo.rxEventHandle = (void *)&gUdmaRxCqEventObj;
288 cfg->dmaInfo = &gUdmaInfo;
289 }
291 return (gDrvHandle);
292 }
294 int32_t UART_udma_deinit(void)
295 {
296 int32_t retVal = UDMA_SOK;
298 if (gDrvHandle != NULL)
299 {
300 retVal = Udma_deinit(gDrvHandle);
301 if(UDMA_SOK == retVal)
302 {
303 gDrvHandle = NULL;
304 }
305 }
307 return (retVal);
308 }
309 #endif
310 #endif /* #if defined(SOC_AM65XX) || defined(SOC_J721E) || defined(SOC_J7200) || defined(SOC_AM64X) */
312 #if defined(SOC_AM64X)
313 int32_t UART_configClk(uint32_t freq)
314 {
315 int32_t retVal = CSL_PASS;
316 #if 0 //TBD pm board config not supported in sciclient
317 uint64_t uartClk;
318 uint32_t parentID;
319 uint32_t clkID[] = {
320 TISCI_DEV_UART0_FCLK_CLK,
321 TISCI_DEV_UART1_FCLK_CLK,
322 TISCI_DEV_UART2_FCLK_CLK,
323 TISCI_DEV_UART3_FCLK_CLK,
324 TISCI_DEV_UART4_FCLK_CLK,
325 TISCI_DEV_UART5_FCLK_CLK,
326 TISCI_DEV_UART6_FCLK_CLK,
327 };
328 uint32_t modID[] = {
329 TISCI_DEV_UART0,
330 TISCI_DEV_UART1,
331 TISCI_DEV_UART2,
332 TISCI_DEV_UART3,
333 TISCI_DEV_UART4,
334 TISCI_DEV_UART5,
335 TISCI_DEV_UART6,
336 };
338 retVal = Sciclient_pmModuleClkRequest(modID[uartTestInstance],
339 clkID[uartTestInstance],
340 TISCI_MSG_VALUE_CLOCK_SW_STATE_REQ,
341 TISCI_MSG_FLAG_AOP,SCICLIENT_SERVICE_WAIT_FOREVER);
342 if (retVal == CSL_PASS)
343 {
344 if (freq == UART_MODULE_CLK_48M)
345 {
346 parentID = TISCI_DEV_UART0_FCLK_CLK_PARENT_USART_PROGRAMMABLE_CLOCK_DIVIDER_OUT0;
347 }
348 else
349 {
350 parentID = TISCI_DEV_UART0_FCLK_CLK_PARENT_HSDIV4_16FFT_MAIN_1_HSDIVOUT1_CLK;
351 }
352 retVal = Sciclient_pmSetModuleClkParent(modID[uartTestInstance],
353 clkID[uartTestInstance],
354 parentID,
355 SCICLIENT_SERVICE_WAIT_FOREVER);
356 }
358 if (retVal == CSL_PASS)
359 {
360 uartClk = (uint64_t)freq;
361 retVal = Sciclient_pmSetModuleClkFreq(modID[uartTestInstance],
362 clkID[uartTestInstance],
363 uartClk,
364 TISCI_MSG_FLAG_AOP,
365 SCICLIENT_SERVICE_WAIT_FOREVER);
366 }
368 if (retVal == CSL_PASS)
369 {
370 uartClk = 0;
371 retVal = Sciclient_pmGetModuleClkFreq(modID[BOARD_OSPI_NOR_INSTANCE],
372 clkID[BOARD_OSPI_NOR_INSTANCE],
373 &uartClk,
374 SCICLIENT_SERVICE_WAIT_FOREVER);
375 }
377 if (retVal == CSL_PASS)
378 {
379 if ((uint32_t)uartClk != freq)
380 {
381 retVal = CSL_EFAIL;
382 }
383 }
384 #endif
385 return (retVal);
386 }
387 #endif
388 /*
389 * ======== UART init config ========
390 */
391 static void UART_initConfig(bool dmaMode)
392 {
393 UART_HwAttrs uart_cfg;
395 /* Get the default UART init configurations */
396 UART_socGetInitCfg(uartTestInstance, &uart_cfg);
398 #ifdef UART_DMA_ENABLE
399 if (dmaMode == true)
400 {
401 #if defined (SOC_AM65XX) || defined(SOC_J721E) || defined(SOC_J7200) || defined(SOC_AM64X)
402 uart_cfg.edmaHandle = UartApp_udmaInit(&uart_cfg);
403 #else
404 uart_cfg.edmaHandle = UartApp_edmaInit();
405 #if defined(SOC_TPR12)
406 uart_cfg.paramSetId = EDMA_NUM_DMA_CHANNELS;
407 #endif
408 #endif
409 uart_cfg.dmaMode = TRUE;
410 }
411 else
412 #endif
413 {
414 uart_cfg.edmaHandle = NULL;
415 uart_cfg.dmaMode = FALSE;
416 }
418 uart_cfg.loopback = verifyLoopback;
419 #if defined(SOC_AM64X)
420 if (verifyRS485 == TRUE)
421 {
422 uart_cfg.frequency = UART_MODULE_CLK_160M;
423 }
424 else
425 {
426 uart_cfg.frequency = UART_MODULE_CLK_48M;
427 }
428 uart_cfg.dirEnable = verifyRS485;
429 UART_configClk(uart_cfg.frequency);
430 #endif
432 /* Set the DMA enabled UART init configurations */
433 UART_socSetInitCfg(uartTestInstance, &uart_cfg);
434 }
436 void UART_getTestInstNum(uint32_t *instNum, bool *boardAM570x)
437 {
438 #if defined (idkAM571x)
439 Board_STATUS boardStatus;
440 Board_IDInfo id;
441 #endif
443 *instNum = UART_INSTANCE;
444 *boardAM570x = false;
446 #if defined (idkAM571x)
447 boardStatus = Board_getIDInfo(&id);
448 if (boardStatus != BOARD_SOK)
449 {
450 return;
451 }
453 /* Check if is DRA (AM570x) SoC */
454 if ((id.boardName[0] == 'D') &&
455 (id.boardName[1] == 'R') &&
456 (id.boardName[2] == 'A'))
457 {
458 *boardAM570x = true;
459 *instNum = 0;
460 }
461 #endif
462 }
464 bool Board_initUART(void)
465 {
466 Board_initCfg boardCfg;
467 Board_STATUS boardStatus;
468 bool boardAM570x;
470 #if defined(evmK2E) || defined(evmC6678)
471 boardCfg = BOARD_INIT_MODULE_CLOCK;
472 #else
473 boardCfg = BOARD_INIT_PINMUX_CONFIG |
474 BOARD_INIT_MODULE_CLOCK;
475 #endif
477 boardStatus = Board_init(boardCfg);
478 if (boardStatus != BOARD_SOK)
479 {
480 return (false);
481 }
483 UART_getTestInstNum(&uartTestInstance, &boardAM570x);
485 /* --- TODO: move this into the board library --- */
486 /* For SYSBIOS only */
487 #ifndef BAREMETAL
488 #if defined (SOC_J721E)
489 /* set up C7x CLEC for DMTimer0 */
490 #if defined (BUILD_C7X_1)
491 CSL_ClecEventConfig cfgClec;
492 CSL_CLEC_EVTRegs *clecBaseAddr = (CSL_CLEC_EVTRegs *)CSL_COMPUTE_CLUSTER0_CLEC_REGS_BASE;
493 uint32_t input = CSLR_COMPUTE_CLUSTER0_GIC500SS_SPI_TIMER0_INTR_PEND_0 + 992; /* Used for Timer Interrupt */
495 /* Configure CLEC for DMTimer0, SYS/BIOS uses interrupt 14 for DMTimer0 by default */
496 cfgClec.secureClaimEnable = FALSE;
497 cfgClec.evtSendEnable = TRUE;
498 cfgClec.rtMap = CSL_CLEC_RTMAP_CPU_ALL;
499 cfgClec.extEvtNum = 0;
500 cfgClec.c7xEvtNum = 14;
501 CSL_clecConfigEvent(clecBaseAddr, input, &cfgClec);
502 #endif /* for C7X cores */
504 /* set up C66x Interrupt Router for DMTimer0 for C66x */
505 #if defined (BUILD_DSP_1) || defined (BUILD_DSP_2)
506 int32_t retVal;
507 struct tisci_msg_rm_irq_set_req rmIrqReq;
508 struct tisci_msg_rm_irq_set_resp rmIrqResp;
509 int32_t dst_id;
511 #if defined (BUILD_DSP_1)
512 dst_id = TISCI_DEV_C66SS0_CORE0;
513 #endif
514 #if defined (BUILD_DSP_2)
515 dst_id = TISCI_DEV_C66SS1_CORE0;
516 #endif
518 /* Set up C66x interrupt router for DMTimer0 */
519 memset (&rmIrqReq, 0, sizeof(rmIrqReq));
520 rmIrqReq.secondary_host = TISCI_MSG_VALUE_RM_UNUSED_SECONDARY_HOST;
521 rmIrqReq.src_id = TISCI_DEV_TIMER0;
522 rmIrqReq.src_index = 0; /* set to 0 for non-event based interrupt */
524 /* Set the destination interrupt */
525 rmIrqReq.valid_params |= TISCI_MSG_VALUE_RM_DST_ID_VALID;
526 rmIrqReq.valid_params |= TISCI_MSG_VALUE_RM_DST_HOST_IRQ_VALID;
528 /* Set the destination based on the core */
529 rmIrqReq.dst_id = dst_id;
530 /* rmIrqReq.dst_host_irq has to match the DMTimer.timerSettings[0].eventId defined in sysbios_c66.cfg */
531 #if defined (BUILD_DSP_1)
532 rmIrqReq.dst_host_irq = 21; /* DMSC dest event, input to C66x INTC */
533 #endif
534 #if defined (BUILD_DSP_2)
535 rmIrqReq.dst_host_irq = 20; /* DMSC dest event, input to C66x INTC */
536 #endif
538 /* Config event */
539 retVal = Sciclient_rmIrqSet(
540 (const struct tisci_msg_rm_irq_set_req *)&rmIrqReq,
541 &rmIrqResp,
542 SCICLIENT_SERVICE_WAIT_FOREVER);
543 if(0U != retVal)
544 {
545 return (false);
546 }
547 #endif /* for C66X cores */
548 #endif /* for SOC_J721E || SOC_J7200 */
549 #endif /* for SYSBIOS */
550 /* --- TODO: move this into the board library --- */
552 #if defined (SOC_AM572x) || defined (SOC_AM571x) || defined (SOC_AM574x)
553 CSL_l4per_cm_core_componentRegs *l4PerCmReg =
554 (CSL_l4per_cm_core_componentRegs *) CSL_MPU_L4PER_CM_CORE_REGS;
556 if (boardAM570x)
557 {
558 #if defined (_TMS320C6X)
559 UART_HwAttrs cfg;
561 /*
562 * AM5 DSP does not have a default Xbar connection for UART
563 * interrupt, need the following Xbar interrupt configuration
564 */
566 /* Use reserved DSP1_IRQ_34 */
567 CSL_xbarDspIrqConfigure(1,
568 CSL_XBAR_INST_DSP1_IRQ_34,
569 CSL_XBAR_UART1_IRQ);
571 /* configure Xbar for UART2 instance */
572 CSL_xbarDspIrqConfigure(1,
573 CSL_XBAR_INST_DSP1_IRQ_35,
574 CSL_XBAR_UART2_IRQ);
575 UART_socGetInitCfg(uartTestInstance + 1, &cfg);
576 cfg.eventId = 35;
577 UART_socSetInitCfg(uartTestInstance + 1, &cfg);
578 #endif
580 #if defined(__TI_ARM_V7M4__)
581 UART_HwAttrs cfg;
583 /*
584 * AM571/AM570 IPU does not have a default Xbar connection for UART 1
585 * interrupt, need to use a reserved IRQ Xbar instance for Xbar interrupt
586 * configuration
587 */
589 /* Use reserved XBAR_INST_IPU1_IRQ_24 */
590 CSL_xbarIpuIrqConfigure(1,
591 CSL_XBAR_INST_IPU1_IRQ_24,
592 CSL_XBAR_UART1_IRQ);
594 /* configure Xbar for UART2 instance */
595 CSL_xbarIpuIrqConfigure(1,
596 CSL_XBAR_INST_IPU1_IRQ_25,
597 CSL_XBAR_UART2_IRQ);
598 UART_socGetInitCfg(uartTestInstance + 1, &cfg);
599 cfg.intNum = 25;
600 UART_socSetInitCfg(uartTestInstance + 1, &cfg);
601 #endif
603 /* enable UART2 clock */
604 CSL_FINST(l4PerCmReg->CM_L4PER_UART2_CLKCTRL_REG,
605 L4PER_CM_CORE_COMPONENT_CM_L4PER_UART2_CLKCTRL_REG_MODULEMODE,
606 ENABLE);
608 while(CSL_L4PER_CM_CORE_COMPONENT_CM_L4PER_UART2_CLKCTRL_REG_IDLEST_FUNC !=
609 CSL_FEXT(l4PerCmReg->CM_L4PER_UART2_CLKCTRL_REG,
610 L4PER_CM_CORE_COMPONENT_CM_L4PER_UART2_CLKCTRL_REG_IDLEST));
611 }
612 else
613 {
614 #if defined (_TMS320C6X)
615 UART_HwAttrs cfg;
617 CSL_xbarDspIrqConfigure(1,
618 CSL_XBAR_INST_DSP1_IRQ_34,
619 CSL_XBAR_UART3_IRQ);
621 /* configure Xbar for UART4 instance */
622 CSL_xbarDspIrqConfigure(1,
623 CSL_XBAR_INST_DSP1_IRQ_35,
624 CSL_XBAR_UART4_IRQ);
625 UART_socGetInitCfg(uartTestInstance + 1, &cfg);
626 cfg.eventId = 35;
627 UART_socSetInitCfg(uartTestInstance + 1, &cfg);
628 #endif
630 #if defined(__TI_ARM_V7M4__)
631 /*
632 * AM57x IPU does not have a default Xbar connection for UART 4
633 * interrupt, need to use a reserved IRQ Xbar instance for Xbar interrupt
634 * configuration
635 */
636 /* Use reserved XBAR_INST_IPU1_IRQ_24 */
637 CSL_xbarIpuIrqConfigure(1,
638 CSL_XBAR_INST_IPU1_IRQ_24,
639 CSL_XBAR_UART4_IRQ);
640 #endif
642 /* enable UART4 clock */
643 CSL_FINST(l4PerCmReg->CM_L4PER_UART4_CLKCTRL_REG,
644 L4PER_CM_CORE_COMPONENT_CM_L4PER_UART4_CLKCTRL_REG_MODULEMODE,
645 ENABLE);
647 while(CSL_L4PER_CM_CORE_COMPONENT_CM_L4PER_UART4_CLKCTRL_REG_IDLEST_FUNC !=
648 CSL_FEXT(l4PerCmReg->CM_L4PER_UART4_CLKCTRL_REG,
649 L4PER_CM_CORE_COMPONENT_CM_L4PER_UART4_CLKCTRL_REG_IDLEST));
650 }
651 #endif
653 #if defined (SOC_AM335X) || defined (SOC_AM437X)
654 /* enable UART clock */
655 PRCMModuleEnable(42U, uartTestInstance + 1U, 0U);
656 #endif
657 return (true);
658 }
660 /**
661 * @b Description
662 * @n
663 * Utility function which converts a local GEM L2 memory address
664 * to global memory address.
665 *
666 * @param[in] addr
667 * Local address to be converted
668 *
669 * @retval
670 * Computed L2 global Address
671 */
672 static uintptr_t l2_global_address (uintptr_t addr)
673 {
674 #if defined(SOC_K2H) || defined(SOC_K2K) || defined(SOC_K2L) || defined(SOC_K2E) || defined(SOC_K2G) || defined(SOC_C6678) || defined(SOC_C6657) || \
675 defined(DEVICE_K2H) || defined(DEVICE_K2K) || defined(DEVICE_K2L) || defined(DEVICE_K2E) || defined(DEVICE_K2G) || defined(DEVICE_C6678) || defined(DEVICE_C6657)
676 #ifdef _TMS320C6X
677 uint32_t corenum;
679 /* Get the core number. */
680 corenum = CSL_chipReadReg (CSL_CHIP_DNUM);
682 /* Compute the global address. */
683 return (addr + (0x10000000 + (corenum * 0x1000000)));
684 #else
685 return addr;
686 #endif
687 #elif defined (SOC_TPR12)
688 #ifdef _TMS320C6X
689 if ((addr>=0x00800000 && addr<=0x00860000) || (addr>=0x00F00000 && addr<=0x00F08000))
690 {
691 return (addr | 0x80000000);
692 }
693 else
694 {
695 return (addr);
696 }
697 #else
698 if(addr < 0x80000)
699 {
700 return (addr | 0xC1000000);
701 }
702 else if (addr < 0x100000)
703 {
704 return ((addr & 0xFFFF) | 0xC1800000);
705 }
706 else if ((addr >= 0x10200000) && (addr <= 0x102F0000))
707 {
708 return((addr & 0x00FFFFFF) | 0xC0000000);
709 }
710 else
711 {
712 return (addr);
713 }
714 #endif
715 #else
716 return addr;
717 #endif
719 }
721 /**
722 * @b Description
723 * @n
724 * The function is used to populate the *test* buffer with a predefined
725 * signature
726 *
727 * @param[in] ptrBuffer
728 * Buffer to be populated
729 * @param[in] size
730 * Size of the buffer
731 *
732 * @retval
733 * Not applicable
734 */
735 void UART_populateBuffer (uint8_t* ptrBuffer, uint32_t size)
736 {
737 uint32_t index;
738 char ch = 'A';
740 /* Populate the data buffer: */
741 for (index = 0; index < size; index++)
742 {
743 *(ptrBuffer + index) = ch++;
744 if (ch == ('Z'+1))
745 ch = 'A';
746 }
747 return;
748 }
750 /**
751 * @b Description
752 * @n
753 * The function is used to validate the *test* buffer
754 *
755 * @param[in] ptrBuffer
756 * Buffer to be populated
757 * @param[in] size
758 * Size of the buffer
759 *
760 * @retval
761 * 0 - Validated
762 * @retval
763 * <0 - Not valid
764 */
765 int32_t UART_validateBuffer (uint8_t* ptrBuffer, uint32_t size)
766 {
767 uint32_t index;
768 char ch = 'A';
771 /* Populate the data buffer: */
772 for (index = 0; index < size; index++)
773 {
774 if (*(ptrBuffer + index) != ch)
775 {
776 printf ("Error: Invalid data buffer Expected %c got %c @ index %d\n",
777 ch, *(ptrBuffer + index), index);
778 return -1;
779 }
781 /* Continue the validation: */
782 ch++;
783 if (ch == ('Z'+1))
784 ch = 'A';
785 }
786 return 0;
787 }
790 void UART_callback(UART_Handle handle, void *buf, size_t count)
791 {
792 UART_osalPostLock(callbackSem);
793 }
795 void UART_callback2(UART_Handle handle, UART_Transaction *transaction)
796 {
797 UART_osalPostLock(callbackSem);
798 }
800 #if !defined(SOC_TPR12)
802 #define UART_NUM_TRIG_LVL (4U)
804 /*
805 * ======== UART_initConfigTrgLvl ========
806 */
807 static void UART_initConfigTrgLvl(uint32_t dmaMode,
808 uint32_t txTrigLvl,
809 uint32_t rxTrigLvl)
810 {
811 UART_HwAttrs uart_cfg;
813 /* Get the default UART init configurations */
814 UART_socGetInitCfg(uartTestInstance, &uart_cfg);
816 #if defined(SOC_K2H) || defined(SOC_K2K) || defined(SOC_K2L) || defined(SOC_K2E) || defined(SOC_K2G) || defined(SOC_C6678) || defined(SOC_C6657) || defined(SOC_OMAPL137) || defined(SOC_OMAPL138) ||\
817 defined(DEVICE_K2H) || defined(DEVICE_K2K) || defined(DEVICE_K2L) || defined(DEVICE_K2E) || defined(DEVICE_K2G) || defined(DEVICE_C6678) || defined(DEVICE_C6657) || defined(DEVICE_OMAPL137) || defined(DEVICE_OMAPL138)
818 uart_cfg.txTrigLvl = txTrigLvl;
819 #else
820 uart_cfg.txTrigLvl = (UART_TxTrigLvl)txTrigLvl;
821 #endif
822 uart_cfg.rxTrigLvl = (UART_RxTrigLvl)rxTrigLvl;
823 uart_cfg.loopback = TRUE;
824 #ifdef UART_DMA_ENABLE
825 if (dmaMode == true)
826 {
827 #if defined (SOC_AM65XX) || defined(SOC_J721E) || defined(SOC_J7200) || defined(SOC_AM64X)
828 uart_cfg.edmaHandle = UartApp_udmaInit(&uart_cfg);
829 #else
830 uart_cfg.edmaHandle = UartApp_edmaInit();
831 #endif
832 uart_cfg.dmaMode = TRUE;
833 }
834 else
835 #endif
836 {
837 uart_cfg.edmaHandle = NULL;
838 uart_cfg.dmaMode = FALSE;
839 }
841 /* Set the TX/RX FIFO trigger levels */
842 UART_socSetInitCfg(uartTestInstance, &uart_cfg);
843 }
845 bool UART_test_trglvl_xfer(UART_Handle uart, uint32_t dmaMode, uint32_t xferSize)
846 {
847 SemaphoreP_Params semParams;
848 UART_Transaction transaction;
849 uintptr_t addrFifoTrgLvlData, addrScanPrompt;
850 uint32_t i;
851 bool ret = false;
853 if (xferSize == 0)
854 {
855 return true;
856 }
857 /* Create call back semaphore */
858 UART_osalSemParamsInit(&semParams);
859 semParams.mode = SemaphoreP_Mode_BINARY;
860 callbackSem = UART_osalCreateBlockingLock(0, &semParams);
862 if (dmaMode)
863 {
864 addrFifoTrgLvlData = l2_global_address((uintptr_t)fifoTrgLvlData);
865 addrScanPrompt = l2_global_address((uintptr_t)scanPrompt);
866 }
867 else
868 {
869 addrFifoTrgLvlData = (uintptr_t)fifoTrgLvlData;
870 addrScanPrompt = (uintptr_t)scanPrompt;
871 }
873 /* Read in call back mode */
874 memset(scanPrompt, 0, sizeof(scanPrompt));
875 if (dmaMode)
876 {
877 CacheP_wbInv((void *)(uintptr_t)addrScanPrompt, (int32_t)sizeof(scanPrompt));
878 }
880 UART_transactionInit(&callbackTransaction);
881 callbackTransaction.buf = (void *)(uintptr_t)addrScanPrompt;
882 callbackTransaction.count = xferSize;
883 if (UART_read2(uart, &callbackTransaction) == UART_ERROR)
884 {
885 goto Err;
886 }
888 /* Write in blocking mode */
889 UART_transactionInit(&transaction);
890 transaction.buf = (void *)(uintptr_t)addrFifoTrgLvlData;
891 transaction.count = xferSize;
892 if (UART_write2(uart, &transaction) == UART_ERROR)
893 {
894 goto Err;
895 }
897 /* Wait for read callback */
898 if (UART_osalPendLock(callbackSem, callbackTransaction.timeout) != SemaphoreP_OK)
899 {
900 goto Err;
901 }
903 /* Check if read data matches with write data */
904 for (i = 0; i < xferSize; i++)
905 {
906 if (scanPrompt[i] != fifoTrgLvlData[i])
907 {
908 goto Err;
909 }
910 }
911 ret = true;
913 Err:
914 if (callbackSem)
915 {
916 UART_osalDeleteBlockingLock(callbackSem);
917 callbackSem = NULL;
918 }
919 return (ret);
920 }
922 bool UART_test_trglvl(uint32_t dmaMode,
923 int32_t txTrigLvl,
924 int32_t rxTrigLvl)
925 {
926 UART_Handle uart = NULL;
927 UART_Params uartParams;
928 bool ret = false;
929 int32_t i;
931 /* UART SoC init configuration */
932 UART_initConfigTrgLvl(dmaMode, (uint32_t)(uintptr_t)txTrigLvl, (uint32_t)(uintptr_t)rxTrigLvl);
934 /* Read in callback mode and write in blocking mode */
935 UART_Params_init(&uartParams);
936 uartParams.readCallback = UART_callback;
937 uartParams.readMode = UART_MODE_CALLBACK;
938 uartParams.parityType = uartParity;
940 for ( i = -1; i < 2; i++)
941 {
942 uart = UART_open(uartTestInstance, &uartParams);
943 if (uart == NULL)
944 {
945 goto Err;
946 }
947 if (UART_test_trglvl_xfer(uart, dmaMode, (uint32_t)(uintptr_t)(txTrigLvl + i)) == false)
948 {
949 goto Err;
950 }
951 if (uart)
952 {
953 UART_close(uart);
954 uart = NULL;
955 }
957 uart = UART_open(uartTestInstance, &uartParams);
958 if (uart == NULL)
959 {
960 goto Err;
961 }
963 if (UART_test_trglvl_xfer(uart, dmaMode, (uint32_t)(uintptr_t)(rxTrigLvl + i)) == false)
964 {
965 goto Err;
966 }
968 if (uart)
969 {
970 UART_close(uart);
971 uart = NULL;
972 }
973 }
975 ret = true;
977 Err:
978 if (uart)
979 {
980 UART_close(uart);
981 }
982 return (ret);
983 }
985 /*
986 * ======== UART DMA TX/RX FIFO trigger level test ========
987 */
988 static bool UART_test_fifo_trglvl(bool dmaMode)
989 {
990 bool ret = true;
991 uint32_t i;
992 #if defined(SOC_AM574x) || defined(SOC_AM572x)|| defined(SOC_AM571x) || defined (SOC_DRA72x) || defined (SOC_DRA75x) || defined (SOC_DRA78x) || defined (SOC_AM335X) || defined (SOC_AM437X) || defined (SOC_AM65XX) || defined(SOC_J721E) || defined(SOC_J7200) || defined(SOC_AM64X)
993 UART_TxTrigLvl txTrgLvl[UART_NUM_TRIG_LVL] =
994 {
995 UART_TXTRIGLVL_8,
996 UART_TXTRIGLVL_16,
997 UART_TXTRIGLVL_32,
998 UART_TXTRIGLVL_56
999 };
1001 UART_RxTrigLvl rxTrgLvl[UART_NUM_TRIG_LVL] =
1002 {
1003 UART_RXTRIGLVL_8,
1004 UART_RXTRIGLVL_16,
1005 UART_RXTRIGLVL_56,
1006 UART_RXTRIGLVL_60
1007 };
1008 #else
1009 uint32_t txTrgLvl[UART_NUM_TRIG_LVL] =
1010 {
1011 2,
1012 4,
1013 8,
1014 16
1015 };
1017 UART_RxTrigLvl rxTrgLvl[UART_NUM_TRIG_LVL] =
1018 {
1019 UART_RXTRIGLVL_1,
1020 UART_RXTRIGLVL_4,
1021 UART_RXTRIGLVL_8,
1022 UART_RXTRIGLVL_14
1023 };
1024 #endif
1025 for (i = 0; i < UART_NUM_TRIG_LVL; i++)
1026 {
1027 if (UART_test_trglvl(dmaMode, (int32_t)txTrgLvl[i], (int32_t)rxTrgLvl[i]) == false)
1028 {
1029 ret = false;
1030 break;
1031 }
1032 }
1034 return (ret);
1035 }
1037 #endif /* TPR12: no UART fifo */
1038 /*
1039 * ======== UART stdio printf/scanf test ========
1040 *
1041 * The test function tests stdio driver printf/scanf APIs
1042 */
1043 static bool UART_test_printf_scanf(bool dmaMode)
1044 {
1045 bool ret = false;
1047 if (uartParity == UART_PAR_NONE)
1048 {
1049 /* UART SoC init configuration */
1050 UART_initConfig(dmaMode);
1052 UART_stdioInit(uartTestInstance);
1054 UART_printf(stdioPrint);
1056 #ifndef UART_RX_LOOPBACK_ONLY
1057 memset(scanPrompt, 0, sizeof(scanPrompt));
1058 if (UART_scanFmt(scanPrompt) != S_PASS)
1059 {
1060 goto Err;
1061 }
1062 ret = true;
1064 Err:
1065 #else
1066 ret = true;
1067 #endif
1068 UART_stdioDeInit();
1069 }
1070 else
1071 {
1072 /*
1073 * bypass this test if the parity is not the default setting
1074 * (UART_PAR_NONE), since UART_stdioInit() only allows default
1075 * UART parameter settings.
1076 */
1077 ret = true;
1078 }
1080 return (ret);
1081 }
1083 /*
1084 * ======== UART stdio printf/scanf test with param config (default) ========
1085 *
1086 * The test function tests stdio driver printf/scanf APIs with default params config.
1087 */
1088 static bool UART_test_printf_scanf_stdio_params(bool dmaMode)
1089 {
1090 bool ret = false;
1091 UART_Params params;
1093 /* UART SoC init configuration */
1094 UART_initConfig(dmaMode);
1096 /* UART params */
1097 UART_Params_init(¶ms);
1098 params.parityType = uartParity;
1100 UART_stdioInit2(uartTestInstance,¶ms);
1102 UART_printf(stdioPrint);
1104 memset(scanPrompt, 0, sizeof(scanPrompt));
1105 #ifndef UART_RX_LOOPBACK_ONLY
1106 if (UART_scanFmt(scanPrompt) != S_PASS)
1107 {
1108 goto Err;
1109 }
1110 ret = true;
1112 Err:
1113 #else
1114 ret = true;
1115 #endif
1116 UART_stdioDeInit();
1117 return (ret);
1118 }
1120 #if !defined(UART_API2_NOT_SUPPORTED)
1121 #ifdef USE_BIOS
1122 /* Use a global variable to sync the read task and the write task */
1123 volatile bool taskSyncFlag;
1124 Void UART_simultaneous_rw_write(UArg a0, UArg a1)
1125 {
1126 UART_Handle uart = (UART_Handle)a0;
1127 bool dmaMode = (bool)a1;
1128 uintptr_t addrDataPrint;
1129 UART_Transaction transaction;
1131 if (dmaMode)
1132 {
1133 addrDataPrint = l2_global_address((uintptr_t)dataPrint);
1134 }
1135 else
1136 {
1137 addrDataPrint = (uintptr_t)dataPrint;
1138 }
1140 UART_transactionInit(&transaction);
1142 while (taskSyncFlag == true)
1143 {
1144 transaction.buf = (void *)(uintptr_t)addrDataPrint;
1145 transaction.count = sizeof(dataPrint);
1146 UART_write2(uart, &transaction);
1147 Osal_delay(100);
1148 }
1150 /* resume the read test task */
1151 taskSyncFlag = true;
1153 Task_exit ();
1154 }
1156 /*
1157 * ======== UART simultaneous read/write test ========
1158 *
1159 * The read task creates a write task which will continuously
1160 * writes the data out to the console, while at the same time
1161 * the read task reads the data from the console input.
1162 *
1163 * Note:
1164 * In blocking/interrupt mode, if the write size is less than
1165 * the TX FIFO size (64 bytes), the driver will just copy
1166 * the write data to the TX FIFO and will not use interrupt
1167 * and write semaphore. The read task should have a higher
1168 * priority than the write task to resume the task by the
1169 * scheduler once it gets the read semaphore.
1170 *
1171 */
1172 static bool UART_test_simultaneous_rw(bool dmaMode)
1173 {
1174 UART_Handle uart = NULL;
1175 UART_Params uartParams;
1176 uintptr_t addrScanPrompt, addrEchoPrompt;
1177 UART_Transaction transaction;
1178 Task_Handle writeTask;
1179 Task_Params writeTaskParams;
1180 Error_Block eb;
1181 bool ret = false;
1183 /* UART SoC init configuration */
1184 UART_initConfig(dmaMode);
1186 /* Initialize the default configuration params. */
1187 UART_Params_init(&uartParams);
1188 uartParams.parityType = uartParity;
1190 uart = UART_open(uartTestInstance, &uartParams);
1191 if (uart == NULL)
1192 {
1193 goto Err;
1194 }
1196 /* run the write teas when task is created */
1197 taskSyncFlag = true;
1199 Error_init(&eb);
1201 /* Initialize the task params */
1202 Task_Params_init(&writeTaskParams);
1203 writeTaskParams.arg0 = (UArg)uart;
1204 writeTaskParams.arg1 = (UArg)dmaMode;
1205 #if defined (__C7100__)
1206 writeTaskParams.stackSize = 1024*16;
1207 #else
1208 writeTaskParams.stackSize = 1024*8;
1209 #endif
1210 /*
1211 * Set the write task priority to the default priority (1)
1212 * lower than the read task priority (2)
1213 */
1214 writeTaskParams.priority = 1;
1216 /* Create the UART write task */
1217 writeTask = Task_create((Task_FuncPtr)UART_simultaneous_rw_write, &writeTaskParams, &eb);
1218 if (writeTask == NULL)
1219 {
1220 System_abort("Task create failed");
1221 goto Err;
1222 }
1224 if (dmaMode)
1225 {
1226 addrScanPrompt = l2_global_address((uintptr_t)scanPrompt);
1227 addrEchoPrompt = l2_global_address((uintptr_t)echoPrompt);
1228 }
1229 else
1230 {
1231 addrScanPrompt = (uintptr_t)scanPrompt;
1232 addrEchoPrompt = (uintptr_t)echoPrompt;
1233 }
1235 memset(scanPrompt, 0, sizeof(scanPrompt));
1236 if (dmaMode)
1237 {
1238 CacheP_wbInv((void *)(uintptr_t)addrScanPrompt, (int32_t)sizeof(scanPrompt));
1239 }
1240 UART_transactionInit(&transaction);
1241 transaction.buf = (void *)(uintptr_t)addrScanPrompt;
1242 transaction.count = UART_TEST_READ_LEN;
1243 if (UART_read2(uart, &transaction) == UART_ERROR)
1244 {
1245 taskSyncFlag = false;
1246 goto Err;
1247 }
1248 if ((transaction.status != UART_TRANSFER_STATUS_SUCCESS) ||
1249 (transaction.count != UART_TEST_READ_LEN))
1250 {
1251 taskSyncFlag = false;
1252 goto Err;
1253 }
1255 /* stop the write test task */
1256 taskSyncFlag = false;
1258 /* Wait for the write task complete and exit */
1259 while (taskSyncFlag == false)
1260 {
1261 Osal_delay(100);
1262 }
1263 taskSyncFlag = false;
1265 UART_transactionInit(&transaction);
1266 transaction.buf = (void *)(uintptr_t)addrEchoPrompt;
1267 transaction.count = sizeof(echoPrompt);
1268 if (UART_write2(uart, &transaction) == UART_ERROR)
1269 {
1270 goto Err;
1271 }
1273 UART_transactionInit(&transaction);
1274 transaction.buf = (void *)(uintptr_t)addrScanPrompt;
1275 transaction.count = UART_TEST_READ_LEN;
1276 if (UART_write2(uart, &transaction) == UART_ERROR)
1277 {
1278 goto Err;
1279 }
1281 Osal_delay(5000);
1283 ret = true;
1285 Err:
1286 if (uart)
1287 {
1288 UART_close(uart);
1289 }
1291 return (ret);
1292 }
1293 #endif
1294 #endif
1296 /*
1297 * ======== UART read cancel test ========
1298 *
1299 * The test function uses console intput to simulate/test the
1300 * read cancel in callback mode. In a real use case, user can
1301 * read a large file from the console and cancel the read before
1302 * the read is complete.
1303 *
1304 */
1305 //static bool UART_test_read_write_cancel(bool dmaMode)
1306 bool UART_test_read_write_cancel(bool dmaMode)
1307 {
1308 UART_Handle uart = NULL;
1309 UART_Params uartParams;
1310 SemaphoreP_Params semParams;
1311 UART_Transaction transaction;
1312 uintptr_t addrRdCancelPrompt, addrWrCancelPrompt;
1313 uintptr_t addrDataPrint, addrEchoPrompt, addrScanPrompt;
1314 bool ret = false;
1316 /* Create call back semaphore */
1317 UART_osalSemParamsInit(&semParams);
1318 semParams.mode = SemaphoreP_Mode_BINARY;
1319 callbackSem = UART_osalCreateBlockingLock(0, &semParams);
1321 /* UART SoC init configuration */
1322 UART_initConfig(dmaMode);
1324 /* Set callback mode for read */
1325 UART_Params_init(&uartParams);
1326 uartParams.readCallback = UART_callback;
1327 uartParams.readMode = UART_MODE_CALLBACK;
1328 uartParams.parityType = uartParity;
1330 if (dmaMode)
1331 {
1332 addrRdCancelPrompt = l2_global_address((uintptr_t)rdCancelPrompt);
1333 addrDataPrint = l2_global_address((uintptr_t)dataPrint);
1334 addrEchoPrompt = l2_global_address((uintptr_t)echoPrompt);
1335 addrScanPrompt = l2_global_address((uintptr_t)scanPrompt);
1336 }
1337 else
1338 {
1339 addrRdCancelPrompt = (uintptr_t)rdCancelPrompt;
1340 addrDataPrint = (uintptr_t)dataPrint;
1341 addrEchoPrompt = (uintptr_t)echoPrompt;
1342 addrScanPrompt = (uintptr_t)scanPrompt;
1343 }
1345 uart = UART_open(uartTestInstance, &uartParams);
1346 if (uart == NULL)
1347 {
1348 goto Err;
1349 }
1351 /* Test receive error */
1353 /* Perform the first read, which will be cancelled before completion */
1354 memset(scanPrompt, 0, sizeof(scanPrompt));
1355 if (dmaMode)
1356 {
1357 CacheP_wbInv((void *)(uintptr_t)addrScanPrompt, (int32_t)sizeof(scanPrompt));
1358 }
1360 UART_transactionInit(&callbackTransaction);
1361 callbackTransaction.buf = (void *)(uintptr_t)addrScanPrompt;
1362 callbackTransaction.count = UART_TEST_READ_LEN;
1363 #if !defined(UART_API2_NOT_SUPPORTED)
1364 if (UART_read2(uart, &callbackTransaction) == UART_ERROR)
1365 #else
1366 if (UART_read(uart, callbackTransaction.buf, UART_TEST_READ_LEN) == UART_ERROR)
1367 #endif
1368 {
1369 goto Err;
1370 }
1371 /* Delay for 10 seconds to allow user to enter chars */
1372 #if !defined(QT_BUILD)
1373 Osal_delay(10000);
1374 #else
1375 Osal_delay(100);
1376 #endif
1377 /* Cancel the read before the read transfer is completed */
1378 UART_readCancel(uart);
1379 if (UART_osalPendLock(callbackSem, callbackTransaction.timeout) != SemaphoreP_OK)
1380 {
1381 goto Err;
1382 }
1384 /* Print read cancelled prompt */
1385 UART_transactionInit(&transaction);
1386 transaction.buf = (void *)(uintptr_t)addrRdCancelPrompt;
1387 transaction.count = sizeof(rdCancelPrompt);
1388 #if !defined(UART_API2_NOT_SUPPORTED)
1389 if (UART_write2(uart, &transaction) == UART_ERROR)
1390 #else
1391 if (UART_write(uart, transaction.buf, transaction.count) == UART_ERROR)
1392 #endif
1393 {
1394 goto Err;
1395 }
1397 UART_transactionInit(&transaction);
1398 transaction.buf = (void *)(uintptr_t)addrDataPrint;
1399 transaction.count = sizeof(dataPrint);
1400 #if !defined(UART_API2_NOT_SUPPORTED)
1401 if (UART_write2(uart, &transaction) == UART_ERROR)
1402 #else
1403 if (UART_write(uart, transaction.buf, transaction.count) == UART_ERROR)
1404 #endif
1405 {
1406 goto Err;
1407 }
1409 /* Perform the 2nd read, which will be completed */
1410 memset(scanPrompt, 0, sizeof(scanPrompt));
1411 if (dmaMode)
1412 {
1413 CacheP_wbInv((void *)(uintptr_t)addrScanPrompt, (int32_t)sizeof(scanPrompt));
1414 }
1416 #if !defined(UART_RX_LOOPBACK_ONLY)
1417 UART_transactionInit(&callbackTransaction);
1418 callbackTransaction.buf = (void *)(uintptr_t)addrScanPrompt;
1419 callbackTransaction.count = UART_TEST_READ_LEN;
1420 #if !defined(UART_API2_NOT_SUPPORTED)
1421 if (UART_read2(uart, &callbackTransaction) == UART_ERROR)
1422 #else
1423 if (UART_read(uart, callbackTransaction.buf, UART_TEST_READ_LEN) == UART_ERROR)
1424 #endif
1425 {
1426 goto Err;
1427 }
1428 if (UART_osalPendLock(callbackSem, callbackTransaction.timeout) != SemaphoreP_OK)
1429 {
1430 goto Err;
1431 }
1432 #endif
1433 UART_transactionInit(&transaction);
1434 transaction.buf = (void *)(uintptr_t)addrEchoPrompt;
1435 transaction.count = sizeof(echoPrompt);
1436 #if !defined(UART_API2_NOT_SUPPORTED)
1437 if (UART_write2(uart, &transaction) == UART_ERROR)
1438 #else
1439 if (UART_write(uart, transaction.buf, transaction.count) == UART_ERROR)
1440 #endif
1441 {
1442 goto Err;
1443 }
1445 /* Print the 2nd read chars, should NOT contain any chars
1446 * in the first cancelled read
1447 */
1448 UART_transactionInit(&transaction);
1449 transaction.buf = (void *)(uintptr_t)addrScanPrompt;
1450 transaction.count = sizeof(scanPrompt);
1451 #if !defined(UART_API2_NOT_SUPPORTED)
1452 if (UART_write2(uart, &transaction) == UART_ERROR)
1453 #else
1454 if (UART_write(uart, transaction.buf, transaction.count) == UART_ERROR)
1455 #endif
1456 {
1457 goto Err;
1458 }
1460 UART_close(uart);
1462 /* write cancel test */
1464 /* Set callback mode for write */
1465 UART_Params_init(&uartParams);
1466 uartParams.writeCallback = UART_callback;
1467 uartParams.writeMode = UART_MODE_CALLBACK;
1468 uartParams.parityType = uartParity;
1470 if (dmaMode)
1471 {
1472 addrWrCancelPrompt = l2_global_address((uintptr_t)wrCancelPrompt);
1473 }
1474 else
1475 {
1476 addrWrCancelPrompt = (uintptr_t)wrCancelPrompt;
1477 }
1479 uart = UART_open(uartTestInstance, &uartParams);
1480 if (uart == NULL)
1481 {
1482 goto Err;
1483 }
1485 /* Perform the 1st write */
1486 UART_transactionInit(&callbackTransaction);
1487 callbackTransaction.buf = (void *)(uintptr_t)addrWrCancelPrompt;
1488 callbackTransaction.count = sizeof(wrCancelPrompt);
1489 #if !defined(UART_API2_NOT_SUPPORTED)
1490 if (UART_write2(uart, &callbackTransaction) == UART_ERROR)
1491 #else
1492 if (UART_write(uart, callbackTransaction.buf, callbackTransaction.count) == UART_ERROR)
1493 #endif
1494 {
1495 goto Err;
1496 }
1497 /* Cancel the 1st write */
1498 UART_writeCancel(uart);
1499 if (UART_osalPendLock(callbackSem, callbackTransaction.timeout) != SemaphoreP_OK)
1500 {
1501 goto Err;
1502 }
1504 /* Perform the 2nd write */
1505 UART_transactionInit(&callbackTransaction);
1506 callbackTransaction.buf = (void *)(uintptr_t)addrWrCancelPrompt;
1507 callbackTransaction.count = sizeof(wrCancelPrompt);
1508 #if !defined(UART_API2_NOT_SUPPORTED)
1509 if (UART_write2(uart, &callbackTransaction) == UART_ERROR)
1510 #else
1511 if (UART_write(uart, callbackTransaction.buf, callbackTransaction.count) == UART_ERROR)
1512 #endif
1513 {
1514 goto Err;
1515 }
1516 /* Cancel the write */
1517 UART_writeCancel(uart);
1518 if (UART_osalPendLock(callbackSem, callbackTransaction.timeout) != SemaphoreP_OK)
1519 {
1520 goto Err;
1521 }
1522 ret = true;
1524 Err:
1525 if (uart)
1526 {
1527 UART_close(uart);
1528 }
1530 if (callbackSem)
1531 {
1532 UART_osalDeleteBlockingLock(callbackSem);
1533 callbackSem = NULL;
1534 }
1536 return (ret);
1537 }
1539 #if !defined(UART_API2_NOT_SUPPORTED)
1540 /*
1541 * ======== UART receive error test ========
1542 *
1543 * The test function tests receive error (e.g. break condition)
1544 */
1545 static bool UART_test_rx_err(bool dmaMode)
1546 {
1547 UART_Handle uart = NULL;
1548 UART_Params uartParams;
1549 UART_Transaction transaction;
1550 uintptr_t addrScanPrompt, addrBreakErrPrompt;
1551 bool ret = false;
1553 /* UART SoC init configuration */
1554 UART_initConfig(dmaMode);
1556 /* Initialize the default configuration params. */
1557 UART_Params_init(&uartParams);
1558 uartParams.parityType = uartParity;
1560 if (dmaMode)
1561 {
1562 addrBreakErrPrompt = l2_global_address((uintptr_t)breakErrPrompt);
1563 addrScanPrompt = l2_global_address((uintptr_t)scanPrompt);
1564 }
1565 else
1566 {
1567 addrBreakErrPrompt = (uintptr_t)breakErrPrompt;
1568 addrScanPrompt = (uintptr_t)scanPrompt;
1569 }
1571 uart = UART_open(uartTestInstance, &uartParams);
1572 if (uart == NULL)
1573 {
1574 goto Err;
1575 }
1577 /* Test receive error */
1578 memset(scanPrompt, 0, sizeof(scanPrompt));
1579 if (dmaMode)
1580 {
1581 CacheP_wbInv((void *)(uintptr_t)addrScanPrompt, (int32_t)sizeof(scanPrompt));
1582 }
1583 UART_transactionInit(&transaction);
1584 transaction.buf = (void *)(uintptr_t)addrScanPrompt;
1585 transaction.count = UART_TEST_READ_LEN;
1586 if (UART_read2(uart, &transaction) == UART_ERROR)
1587 {
1588 if (transaction.status == UART_TRANSFER_STATUS_ERROR_BI)
1589 {
1590 UART_transactionInit(&transaction);
1591 transaction.buf = (void *)(uintptr_t)addrBreakErrPrompt;
1592 transaction.count = sizeof(breakErrPrompt);
1593 if (UART_write2(uart, &transaction) == UART_ERROR)
1594 {
1595 goto Err;
1596 }
1597 }
1598 else
1599 {
1600 goto Err;
1601 }
1602 }
1604 ret = true;
1606 Err:
1607 if (uart)
1608 {
1609 UART_close(uart);
1610 }
1612 return (ret);
1613 }
1615 #endif
1617 /*
1618 * ======== UART timeout test ========
1619 *
1620 * The test function tests read/write with OS timeout
1621 */
1622 static bool UART_test_timeout(bool dmaMode)
1623 {
1624 UART_Handle uart = NULL;
1625 UART_Params uartParams;
1626 UART_Transaction transaction;
1627 uintptr_t addrScanPrompt, addrReadTimeoutPrompt;
1628 bool ret = false;
1630 /* UART SoC init configuration */
1631 UART_initConfig(dmaMode);
1633 /* Initialize the default configuration params. */
1634 UART_Params_init(&uartParams);
1635 uartParams.parityType = uartParity;
1636 #if defined(UART_API2_NOT_SUPPORTED)
1637 uartParams.readTimeout = UART_TEST_TIMEOUT;
1638 #endif
1640 if (dmaMode)
1641 {
1642 addrReadTimeoutPrompt = l2_global_address((uintptr_t)readTimeoutPrompt);
1643 addrScanPrompt = l2_global_address((uintptr_t)scanPrompt);
1644 }
1645 else
1646 {
1647 addrReadTimeoutPrompt = (uintptr_t)readTimeoutPrompt;
1648 addrScanPrompt = (uintptr_t)scanPrompt;
1649 }
1651 uart = UART_open(uartTestInstance, &uartParams);
1652 if (uart == NULL)
1653 {
1654 goto Err;
1655 }
1657 /* Test read timeout */
1658 memset(scanPrompt, 0, sizeof(scanPrompt));
1659 if (dmaMode)
1660 {
1661 CacheP_wbInv((void *)(uintptr_t)addrScanPrompt, (int32_t)sizeof(scanPrompt));
1662 }
1663 UART_transactionInit(&transaction);
1664 transaction.buf = (void *)(uintptr_t)scanPrompt;
1665 transaction.count = UART_TEST_READ_LEN;
1666 transaction.timeout = UART_TEST_TIMEOUT;
1667 #if defined(UART_API2_NOT_SUPPORTED)
1668 if (UART_read2(uart, &transaction) == UART_ERROR)
1669 #else
1670 if (UART_read(uart, transaction.buf, transaction.count) == UART_ERROR)
1671 #endif
1672 {
1673 UART_transactionInit(&transaction);
1674 transaction.buf = (void *)(uintptr_t)addrReadTimeoutPrompt;
1675 transaction.count = sizeof(readTimeoutPrompt);
1676 transaction.timeout = UART_TEST_TIMEOUT;
1677 if (UART_write2(uart, &transaction) == UART_ERROR)
1678 {
1679 goto Err;
1680 }
1681 }
1683 ret = true;
1685 Err:
1686 if (uart)
1687 {
1688 UART_close(uart);
1689 }
1691 return (ret);
1692 }
1694 /*
1695 * ======== UART polling timeout test ========
1696 *
1697 * The test function tests read/write with OS timeout in polling mode
1698 */
1699 static bool UART_test_polling_timeout(bool dmaMode)
1700 {
1701 UART_Handle uart = NULL;
1702 UART_Params uartParams;
1703 bool ret = false;
1704 uint32_t rdSize = UART_TEST_READ_LEN;
1705 uint32_t wrSize = sizeof(readTimeoutPrompt);
1707 /* UART SoC init configuration */
1708 UART_initConfig(dmaMode);
1710 /* Initialize the default configuration params. */
1711 UART_Params_init(&uartParams);
1712 uartParams.parityType = uartParity;
1714 /* timeout is 0 for both read and write */
1715 uartParams.readTimeout = UART_NO_WAIT;
1716 uartParams.writeTimeout = UART_NO_WAIT;
1717 uart = UART_open(uartTestInstance, &uartParams);
1718 if (uart == NULL)
1719 {
1720 goto Err;
1721 }
1723 memset(scanPrompt, 0, sizeof(scanPrompt));
1724 if (UART_readPolling(uart, (void *)(uintptr_t)scanPrompt, rdSize) != rdSize)
1725 {
1726 if (UART_writePolling(uart, (const void *)readTimeoutPrompt, wrSize) != wrSize)
1727 {
1728 ret = true;
1729 }
1730 }
1732 if (ret == true)
1733 {
1734 ret = false;
1736 UART_close(uart);
1738 /* timeout is 5 seconds for both read and write */
1739 uartParams.readTimeout = UART_TEST_TIMEOUT;
1740 uartParams.writeTimeout = UART_TEST_TIMEOUT;
1741 uart = UART_open(uartTestInstance, &uartParams);
1742 if (uart == NULL)
1743 {
1744 goto Err;
1745 }
1747 /* Test read timeout */
1748 memset(scanPrompt, 0, sizeof(scanPrompt));
1749 if (UART_readPolling(uart, (void *)(uintptr_t)scanPrompt, rdSize) != rdSize)
1750 {
1751 UART_writePolling(uart, (const void *)readTimeoutPrompt, wrSize);
1752 ret = true;
1753 }
1754 }
1756 if (ret == true)
1757 {
1758 ret = false;
1760 UART_close(uart);
1762 /* timeout is 5 seconds for both read and write */
1763 uartParams.readTimeout = UART_WAIT_FOREVER;
1764 uartParams.writeTimeout = UART_WAIT_FOREVER;
1765 uart = UART_open(uartTestInstance, &uartParams);
1766 if (uart == NULL)
1767 {
1768 goto Err;
1769 }
1771 wrSize = sizeof(dataPrint);
1772 UART_writePolling(uart, (const void *)dataPrint, wrSize);
1774 memset(scanPrompt, 0, sizeof(scanPrompt));
1776 #if !defined(UART_RX_LOOPBACK_ONLY)
1777 if (UART_readPolling(uart, (void *)(uintptr_t)scanPrompt, rdSize) != rdSize)
1778 {
1779 goto Err;
1780 }
1781 #endif
1782 wrSize = sizeof(echoPrompt);
1783 UART_writePolling(uart, (const void *)echoPrompt, wrSize);
1784 UART_writePolling(uart, (const void *)scanPrompt, rdSize);
1786 ret = true;
1787 }
1789 Err:
1790 if (uart)
1791 {
1792 UART_close(uart);
1793 }
1795 return (ret);
1796 }
1798 /*
1799 * ======== UART callback test ========
1800 *
1801 * The test function tests the read/write in callback mode
1802 */
1803 static bool UART_test_callback(bool dmaMode)
1804 {
1805 UART_Handle uart = NULL;
1806 UART_Params uartParams;
1807 SemaphoreP_Params semParams;
1808 uintptr_t addrScanPrompt, addrDataPrint, addrEchoPrompt;
1809 bool ret = false;
1811 /* Create call back semaphore */
1812 UART_osalSemParamsInit(&semParams);
1813 semParams.mode = SemaphoreP_Mode_BINARY;
1814 callbackSem = UART_osalCreateBlockingLock(0, &semParams);
1816 /* Test read/write API's in callback mode */
1818 /* UART SoC init configuration */
1819 UART_initConfig(dmaMode);
1821 /* Set callback mode for both read and write */
1822 UART_Params_init(&uartParams);
1823 uartParams.readCallback = UART_callback;
1824 uartParams.readMode = UART_MODE_CALLBACK;
1825 uartParams.writeCallback = UART_callback;
1826 uartParams.writeMode = UART_MODE_CALLBACK;
1827 uartParams.parityType = uartParity;
1829 uart = UART_open(uartTestInstance, &uartParams);
1830 if (uart == NULL)
1831 {
1832 goto Err;
1833 }
1835 if (dmaMode)
1836 {
1837 addrScanPrompt = l2_global_address((uintptr_t)scanPrompt);
1838 addrDataPrint = l2_global_address((uintptr_t)dataPrint);
1839 addrEchoPrompt = l2_global_address((uintptr_t)echoPrompt);
1840 }
1841 else
1842 {
1843 addrScanPrompt = (uintptr_t)scanPrompt;
1844 addrDataPrint = (uintptr_t)dataPrint;
1845 addrEchoPrompt = (uintptr_t)echoPrompt;
1846 }
1848 /* Write DMA or non-DMA test prompt */
1849 if (UART_write(uart, (void *)(uintptr_t)addrDataPrint, sizeof(dataPrint)) == UART_ERROR)
1850 {
1851 goto Err;
1852 }
1853 if (UART_osalPendLock(callbackSem, uartParams.writeTimeout) != SemaphoreP_OK)
1854 {
1855 goto Err;
1856 }
1858 memset(scanPrompt, 0, sizeof(scanPrompt));
1859 if (dmaMode)
1860 {
1861 CacheP_wbInv((void *)(uintptr_t)addrScanPrompt, (int32_t)sizeof(scanPrompt));
1862 }
1864 #if !defined(UART_RX_LOOPBACK_ONLY)
1866 if (UART_read(uart, (void *)(uintptr_t)addrScanPrompt, UART_TEST_READ_LEN) == UART_ERROR)
1867 {
1868 goto Err;
1869 }
1870 if (UART_osalPendLock(callbackSem, uartParams.readTimeout) != SemaphoreP_OK)
1871 {
1872 goto Err;
1873 }
1875 #endif
1877 if (UART_write(uart, (void *)(uintptr_t)addrEchoPrompt, sizeof(echoPrompt)) == UART_ERROR)
1878 {
1879 goto Err;
1880 }
1881 if (UART_osalPendLock(callbackSem, uartParams.writeTimeout) != SemaphoreP_OK)
1882 {
1883 goto Err;
1884 }
1886 if (UART_write(uart, (void *)(uintptr_t)addrScanPrompt, UART_TEST_READ_LEN) == UART_ERROR)
1887 {
1888 goto Err;
1889 }
1890 if (UART_osalPendLock(callbackSem, uartParams.writeTimeout) != SemaphoreP_OK)
1891 {
1892 goto Err;
1893 }
1895 UART_close(uart);
1896 uart = NULL;
1898 /* Test read2/write2 API's in callback mode */
1899 #if !defined(UART_API2_NOT_SUPPORTED)
1900 uartParams.readCallback2 = UART_callback2;
1901 uartParams.writeCallback2 = UART_callback2;
1902 uartParams.readCallback = NULL;
1903 uartParams.writeCallback = NULL;
1905 uart = UART_open(uartTestInstance, &uartParams);
1906 if (uart == NULL)
1907 {
1908 goto Err;
1909 }
1911 UART_transactionInit(&callbackTransaction);
1912 callbackTransaction.buf = (void *)(uintptr_t)addrDataPrint;
1913 callbackTransaction.count = sizeof(dataPrint);
1914 if (UART_write2(uart, &callbackTransaction) == UART_ERROR)
1915 {
1916 goto Err;
1917 }
1918 if (UART_osalPendLock(callbackSem, callbackTransaction.timeout) != SemaphoreP_OK)
1919 {
1920 goto Err;
1921 }
1923 memset(scanPrompt, 0, sizeof(scanPrompt));
1924 if (dmaMode)
1925 {
1926 CacheP_wbInv((void *)(uintptr_t)addrScanPrompt, (int32_t)sizeof(scanPrompt));
1927 }
1929 #if !defined(UART_RX_LOOPBACK_ONLY)
1930 UART_transactionInit(&callbackTransaction);
1931 callbackTransaction.buf = (void *)(uintptr_t)addrScanPrompt;
1932 callbackTransaction.count = UART_TEST_READ_LEN;
1933 if (UART_read2(uart, &callbackTransaction) == UART_ERROR)
1934 {
1935 goto Err;
1936 }
1937 if (UART_osalPendLock(callbackSem, callbackTransaction.timeout) != SemaphoreP_OK)
1938 {
1939 goto Err;
1940 }
1941 #endif
1943 UART_transactionInit(&callbackTransaction);
1944 callbackTransaction.buf = (void *)(uintptr_t)addrEchoPrompt;
1945 callbackTransaction.count = sizeof(echoPrompt);
1946 if (UART_write2(uart, &callbackTransaction) == UART_ERROR)
1947 {
1948 goto Err;
1949 }
1950 if (UART_osalPendLock(callbackSem, callbackTransaction.timeout) != SemaphoreP_OK)
1951 {
1952 goto Err;
1953 }
1955 UART_transactionInit(&callbackTransaction);
1956 callbackTransaction.buf = (void *)(uintptr_t)addrScanPrompt;
1957 callbackTransaction.count = UART_TEST_READ_LEN;
1958 if (UART_write2(uart, &callbackTransaction) == UART_ERROR)
1959 {
1960 goto Err;
1961 }
1962 if (UART_osalPendLock(callbackSem, callbackTransaction.timeout) != SemaphoreP_OK)
1963 {
1964 goto Err;
1965 }
1967 #endif
1968 ret = true;
1970 Err:
1971 if (uart)
1972 {
1973 UART_close(uart);
1974 }
1975 if (callbackSem)
1976 {
1977 UART_osalDeleteBlockingLock(callbackSem);
1978 callbackSem = NULL;
1979 }
1980 return (ret);
1981 }
1983 #if defined (SOC_AM64X)
1984 /* RS-485 Direction Enable loopback test */
1985 static bool UART_test_rs485(bool dmaMode)
1986 {
1987 UART_Handle uart = NULL;
1988 UART_Params uartParams;
1989 int16_t length = 0;
1990 bool ret = true;
1991 uint8_t rBuff[UART_TEST_READ_LEN], tBuff[]="aaaabbbbccccddddeeee";
1993 /* UART SoC init configuration */
1994 verifyRS485 = TRUE;
1995 verifyLoopback = TRUE;
1996 UART_initConfig(dmaMode);
1998 UART_Params_init(&uartParams);
1999 uart = UART_open(uartTestInstance, &uartParams);
2000 if (uart == NULL)
2001 {
2002 goto Err;
2003 }
2005 if (UART_write(uart, (void *)&tBuff[0], UART_TEST_READ_LEN) == UART_ERROR)
2006 {
2007 goto Err;
2008 }
2010 memset(rBuff, 0, UART_TEST_READ_LEN);
2011 UART_read(uart, (void *)&rBuff[0], UART_TEST_READ_LEN);
2012 for(length=0; length<UART_TEST_READ_LEN; length++)
2013 {
2014 if(tBuff[length] != rBuff[length])
2015 {
2016 ret = false;
2017 break;
2018 }
2019 }
2020 UART_close(uart);
2022 Err:
2023 if (uart != NULL)
2024 {
2025 UART_close(uart);
2026 }
2028 verifyRS485 = FALSE;
2029 verifyLoopback = FALSE;
2030 return (ret);
2031 }
2032 #endif
2034 /*
2035 * ========== UART read API test ==========
2036 *
2037 * The test function for UART_read API
2038 * in loopback mode
2039 */
2040 static bool UART_test_read_verify(bool dmaMode)
2041 {
2042 UART_Handle uart = NULL;
2043 UART_Params uartParams;
2044 int16_t length = 0;
2045 bool ret = false;
2046 uint8_t rBuff[UART_TEST_READ_LEN], tBuff[]="aaaabbbbccccddddeeee";
2047 #if !defined(UART_NO_FIFO)
2048 uint8_t dummy = 'X';
2049 #endif
2050 int i;
2052 verifyLoopback = TRUE;
2053 /* UART SoC init configuration */
2054 UART_initConfig(dmaMode);
2056 /* Initialize the default configuration params. */
2057 UART_Params_init(&uartParams);
2058 uartParams.parityType = uartParity;
2060 uart = UART_open(uartTestInstance, &uartParams);
2062 if (uart == NULL)
2063 {
2064 goto Err;
2065 }
2067 #if !defined(UART_NO_FIFO)
2069 if (UART_write(uart, (void *)&tBuff[0], UART_TEST_READ_LEN) == UART_ERROR)
2070 {
2071 goto Err;
2072 }
2074 length = UART_read(uart, (void *)&rBuff[0], UART_RDVERIFY_READ_LEN);
2076 if (UART_write(uart, (void *)&tBuff[15], UART_RDVERIFY_READ_LEN) == UART_ERROR)
2077 {
2078 goto Err;
2079 }
2081 length = UART_read(uart, (void *)&rBuff[4], UART_RDVERIFY_READ_LEN);
2082 length = UART_read(uart, (void *)&rBuff[8], UART_RDVERIFY_READ_LEN);
2083 length = UART_read(uart, (void *)&rBuff[12], UART_RDVERIFY_READ_LEN);
2084 #else
2085 memset(rBuff, 0, UART_TEST_READ_LEN);
2086 Osal_delay(1);
2087 for (i =0; i < UART_TEST_READ_LEN;i++)
2088 {
2089 if (UART_write(uart, (void *)&tBuff[i], 1) == UART_ERROR)
2090 {
2091 goto Err;
2092 }
2094 length += UART_readPolling(uart, (void *)&rBuff[i], 1);
2095 }
2097 #endif
2099 ret = true;
2100 for(length=0; length<UART_TEST_READ_LEN; length++)
2101 {
2102 if(tBuff[length] != rBuff[length])
2103 {
2104 ret = false;
2105 break;
2106 }
2107 }
2108 UART_close(uart);
2110 /* stop bit loopback test */
2111 UART_Params_init(&uartParams);
2112 uartParams.stopBits = UART_STOP_TWO;
2113 uart = UART_open(uartTestInstance, &uartParams);
2114 if (uart == NULL)
2115 {
2116 goto Err;
2117 }
2119 #if !defined(UART_NO_FIFO)
2120 if (UART_write(uart, (void *)&tBuff[0], UART_TEST_READ_LEN) == UART_ERROR)
2121 {
2122 goto Err;
2123 }
2125 memset(rBuff, 0, UART_TEST_READ_LEN);
2126 UART_read(uart, (void *)&rBuff[0], UART_TEST_READ_LEN);
2127 #else
2128 memset(rBuff, 0, UART_TEST_READ_LEN);
2129 Osal_delay(1);
2130 for (i =0; i < UART_TEST_READ_LEN;i++)
2131 {
2132 if (UART_write(uart, (void *)&tBuff[i], 1) == UART_ERROR)
2133 {
2134 goto Err;
2135 }
2137 length += UART_readPolling(uart, (void *)&rBuff[i], 1);
2138 }
2139 #endif
2140 for(length=0; length<UART_TEST_READ_LEN; length++)
2141 {
2142 if(tBuff[length] != rBuff[length])
2143 {
2144 ret = false;
2145 break;
2146 }
2147 }
2148 UART_close(uart);
2150 /* char length loopback test */
2151 UART_Params_init(&uartParams);
2152 uartParams.dataLength = UART_LEN_5;
2153 uart = UART_open(uartTestInstance, &uartParams);
2154 if (uart == NULL)
2155 {
2156 goto Err;
2157 }
2159 #if !defined(UART_NO_FIFO)
2160 if (UART_write(uart, (void *)&tBuff[0], UART_TEST_READ_LEN) == UART_ERROR)
2161 {
2162 goto Err;
2163 }
2165 memset(rBuff, 0, UART_TEST_READ_LEN);
2166 UART_read(uart, (void *)&rBuff[0], UART_TEST_READ_LEN);
2167 #else
2168 memset(rBuff, 0, UART_TEST_READ_LEN);
2169 Osal_delay(1);
2170 for (i =0; i < UART_TEST_READ_LEN;i++)
2171 {
2172 if (UART_write(uart, (void *)&tBuff[i], 1) == UART_ERROR)
2173 {
2174 goto Err;
2175 }
2177 length += UART_readPolling(uart, (void *)&rBuff[i], 1);
2178 }
2179 #endif
2180 for(length=0; length<UART_TEST_READ_LEN; length++)
2181 {
2182 if ((tBuff[length] & ((1 << (uartParams.dataLength + 5)) - 1)) != rBuff[length])
2183 {
2184 ret = false;
2185 break;
2186 }
2187 }
2188 UART_close(uart);
2190 /* parity loopback test */
2191 UART_Params_init(&uartParams);
2192 uartParams.parityType = UART_PAR_EVEN;
2193 uart = UART_open(uartTestInstance, &uartParams);
2194 if (uart == NULL)
2195 {
2196 goto Err;
2197 }
2198 #if !defined(UART_NO_FIFO)
2199 if (UART_write(uart, (void *)&tBuff[0], UART_TEST_READ_LEN) == UART_ERROR)
2200 {
2201 goto Err;
2202 }
2204 memset(rBuff, 0, UART_TEST_READ_LEN);
2205 UART_read(uart, (void *)&rBuff[0], UART_TEST_READ_LEN);
2206 #else
2207 memset(rBuff, 0, UART_TEST_READ_LEN);
2208 Osal_delay(2);
2209 for (i =0; i < UART_TEST_READ_LEN;i++)
2210 {
2211 if (UART_write(uart, (void *)&tBuff[i], 1) == UART_ERROR)
2212 {
2213 goto Err;
2214 }
2216 length += UART_readPolling(uart, (void *)&rBuff[i], 1);
2217 }
2218 #endif
2219 for(length=0; length<UART_TEST_READ_LEN; length++)
2220 {
2221 if(tBuff[length] != rBuff[length])
2222 {
2223 ret = false;
2224 break;
2225 }
2226 }
2227 UART_close(uart);
2228 uart = NULL;
2230 #if defined (SOC_AM64X)
2231 if (UART_test_rs485(dmaMode) == false)
2232 {
2233 ret = false;
2234 }
2235 #endif
2236 Err:
2237 if (uart != NULL)
2238 {
2239 UART_close(uart);
2240 }
2242 verifyLoopback = FALSE;
2243 return (ret);
2244 }
2246 /*
2247 * ======== UART read/write test ========
2248 *
2249 * The test function tests read/write in blocking mode
2250 */
2251 static bool UART_test_read_write(bool dmaMode)
2252 {
2253 UART_Handle uart = NULL;
2254 UART_Params uartParams;
2255 int length = 0;
2256 uintptr_t addrDataPrint, addrScanPrompt, addrEchoPrompt;
2257 //UART_Transaction transaction;
2258 bool ret = false;
2260 /* UART SoC init configuration */
2261 UART_initConfig(dmaMode);
2263 /* Initialize the default configuration params. */
2264 UART_Params_init(&uartParams);
2265 uartParams.parityType = uartParity;
2267 uart = UART_open(uartTestInstance, &uartParams);
2269 if (uart == NULL)
2270 {
2271 goto Err;
2272 }
2274 if (dmaMode)
2275 {
2276 addrDataPrint = l2_global_address((uintptr_t)dataPrint);
2277 addrScanPrompt = l2_global_address((uintptr_t)scanPrompt);
2278 addrEchoPrompt = l2_global_address((uintptr_t)echoPrompt);
2279 }
2280 else
2281 {
2282 addrDataPrint = (uintptr_t)dataPrint;
2283 addrScanPrompt = (uintptr_t)scanPrompt;
2284 addrEchoPrompt = (uintptr_t)echoPrompt;
2285 }
2287 /* Test read/write API's in blocking mode */
2288 if (UART_write(uart, (void *)(uintptr_t)addrDataPrint, sizeof(dataPrint)) == UART_ERROR)
2289 {
2290 goto Err;
2291 }
2293 memset(scanPrompt, 0, sizeof(scanPrompt));
2294 if (dmaMode)
2295 {
2296 CacheP_wbInv((void *)(uintptr_t)addrScanPrompt, (int32_t)sizeof(scanPrompt));
2297 }
2298 #ifndef UART_RX_LOOPBACK_ONLY
2299 length = UART_read(uart, (void *)(uintptr_t)addrScanPrompt, UART_TEST_READ_LEN);
2300 if (length != UART_TEST_READ_LEN)
2301 {
2302 goto Err;
2303 }
2304 #endif
2306 UART_write(uart, (void *)(uintptr_t)addrEchoPrompt, sizeof(echoPrompt));
2308 UART_write(uart, (void *)(uintptr_t)addrScanPrompt, length);
2309 UART_close(uart);
2311 #if !defined(UART_API2_NOT_SUPPORTED)
2312 uart = UART_open(uartTestInstance, &uartParams);
2313 if (uart == NULL)
2314 {
2315 goto Err;
2316 }
2318 /* Test read2/write2 API's in blocking mode */
2319 UART_transactionInit(&transaction);
2320 transaction.buf = (void *)(uintptr_t)addrDataPrint;
2321 transaction.count = sizeof(dataPrint);
2322 if (UART_write2(uart, &transaction) == UART_ERROR)
2323 {
2324 goto Err;
2325 }
2327 memset(scanPrompt, 0, sizeof(scanPrompt));
2328 if (dmaMode)
2329 {
2330 CacheP_wbInv((void *)(uintptr_t)addrScanPrompt, (int32_t)sizeof(scanPrompt));
2331 }
2332 UART_transactionInit(&transaction);
2333 transaction.buf = (void *)(uintptr_t)addrScanPrompt;
2334 transaction.count = UART_TEST_READ_LEN;
2335 if (UART_read2(uart, &transaction) == UART_ERROR)
2336 {
2337 goto Err;
2338 }
2339 if ((transaction.status != UART_TRANSFER_STATUS_SUCCESS) ||
2340 (transaction.count != UART_TEST_READ_LEN))
2341 {
2342 goto Err;
2343 }
2345 UART_transactionInit(&transaction);
2346 transaction.buf = (void *)(uintptr_t)addrEchoPrompt;
2347 transaction.count = sizeof(echoPrompt);
2348 if (UART_write2(uart, &transaction) == UART_ERROR)
2349 {
2350 goto Err;
2351 }
2353 UART_transactionInit(&transaction);
2354 transaction.buf = (void *)(uintptr_t)addrScanPrompt;
2355 transaction.count = UART_TEST_READ_LEN;
2356 if (UART_write2(uart, &transaction) == UART_ERROR)
2357 {
2358 goto Err;
2359 }
2361 #else
2362 uart = NULL;
2363 #endif
2365 ret = true;
2367 Err:
2368 if (uart)
2369 {
2370 UART_close(uart);
2371 }
2373 return (ret);
2374 }
2376 /*
2377 * ======== UART read/write test with interrupt disabled ========
2378 *
2379 * The test function tests read/write with interrupt disabled
2380 */
2381 static bool UART_test_read_write_int_disable(bool dmaMode)
2382 {
2383 UART_Handle uart = NULL;
2384 UART_Params uartParams;
2385 int length = 0;
2386 uintptr_t addrDataPrint, addrScanPrompt, addrEchoPrompt;
2387 UART_Transaction transaction;
2388 bool ret = false;
2389 UART_HwAttrs uart_cfg;
2391 /* UART SoC init configuration */
2392 UART_initConfig(dmaMode);
2394 /* Initialize the default configuration params. */
2395 UART_Params_init(&uartParams);
2396 uartParams.parityType = uartParity;
2398 /* Get the default UART init configurations */
2399 UART_socGetInitCfg(uartTestInstance, &uart_cfg);
2401 uart_cfg.enableInterrupt=0; /* Disabling interrupt forcefully */
2403 /* Get the default UART init configurations */
2404 UART_socSetInitCfg(uartTestInstance, &uart_cfg);
2406 uart = UART_open(uartTestInstance, &uartParams);
2408 if (uart == NULL)
2409 {
2410 goto Err;
2411 }
2413 if (dmaMode)
2414 {
2415 addrDataPrint = l2_global_address((uintptr_t)dataPrint);
2416 addrScanPrompt = l2_global_address((uintptr_t)scanPrompt);
2417 addrEchoPrompt = l2_global_address((uintptr_t)echoPrompt);
2418 }
2419 else
2420 {
2421 addrDataPrint = (uintptr_t)dataPrint;
2422 addrScanPrompt = (uintptr_t)scanPrompt;
2423 addrEchoPrompt = (uintptr_t)echoPrompt;
2424 }
2426 /* Test read/write API's in blocking mode */
2427 if (UART_write(uart, (void *)(uintptr_t)addrDataPrint, sizeof(dataPrint)) == UART_ERROR)
2428 {
2429 goto Err;
2430 }
2432 memset(scanPrompt, 0, sizeof(scanPrompt));
2433 if (dmaMode)
2434 {
2435 CacheP_wbInv((void *)(uintptr_t)addrScanPrompt, (int32_t)sizeof(scanPrompt));
2436 }
2438 #if !defined(UART_RX_LOOPBACK_ONLY)
2439 length = UART_read(uart, (void *)(uintptr_t)addrScanPrompt, UART_TEST_READ_LEN);
2440 if (length != UART_TEST_READ_LEN)
2441 {
2442 goto Err;
2443 }
2444 #endif
2445 UART_write(uart, (void *)(uintptr_t)addrEchoPrompt, sizeof(echoPrompt));
2447 UART_write(uart, (void *)(uintptr_t)addrScanPrompt, length);
2448 UART_close(uart);
2450 uart = UART_open(uartTestInstance, &uartParams);
2451 if (uart == NULL)
2452 {
2453 goto Err;
2454 }
2456 #if !defined(UART_API_NOT_SUPPORTED)
2457 /* Test read2/write2 API's in blocking mode */
2458 UART_transactionInit(&transaction);
2459 transaction.buf = (void *)(uintptr_t)addrDataPrint;
2460 transaction.count = sizeof(dataPrint);
2461 if (UART_write2(uart, &transaction) == UART_ERROR)
2462 {
2463 goto Err;
2464 }
2466 memset(scanPrompt, 0, sizeof(scanPrompt));
2467 if (dmaMode)
2468 {
2469 CacheP_wbInv((void *)(uintptr_t)addrScanPrompt, (int32_t)sizeof(scanPrompt));
2470 }
2471 UART_transactionInit(&transaction);
2472 transaction.buf = (void *)(uintptr_t)addrScanPrompt;
2473 transaction.count = UART_TEST_READ_LEN;
2474 if (UART_read2(uart, &transaction) == UART_ERROR)
2475 {
2476 goto Err;
2477 }
2478 if ((transaction.status != UART_TRANSFER_STATUS_SUCCESS) ||
2479 (transaction.count != UART_TEST_READ_LEN))
2480 {
2481 goto Err;
2482 }
2484 UART_transactionInit(&transaction);
2485 transaction.buf = (void *)(uintptr_t)addrEchoPrompt;
2486 transaction.count = sizeof(echoPrompt);
2487 if (UART_write2(uart, &transaction) == UART_ERROR)
2488 {
2489 goto Err;
2490 }
2492 UART_transactionInit(&transaction);
2493 transaction.buf = (void *)(uintptr_t)addrScanPrompt;
2494 transaction.count = UART_TEST_READ_LEN;
2495 if (UART_write2(uart, &transaction) == UART_ERROR)
2496 {
2497 goto Err;
2498 }
2500 #endif
2501 ret = true;
2503 Err:
2504 if (uart)
2505 {
2506 UART_close(uart);
2507 }
2509 /* Get the default UART init configurations */
2510 UART_socGetInitCfg(uartTestInstance, &uart_cfg);
2511 uart_cfg.enableInterrupt=1; /* Re-enabling interrupt for the remaining the tests */
2512 /* Get the default UART init configurations */
2513 UART_socSetInitCfg(uartTestInstance, &uart_cfg);
2515 return (ret);
2516 }
2518 #ifdef UART_DMA_ENABLE
2519 #if !defined(UART_RX_LOOPBACK_ONLY)
2520 static uint32_t UART_getMaxNumInst(uint32_t numInst)
2521 {
2522 uint32_t i = 0;
2523 #if defined (SOC_AM572x) || defined (SOC_AM571x) || defined (SOC_AM574x) || defined (SOC_AM335X) || defined (SOC_AM437X)
2524 UART_HwAttrs uart_cfg;
2526 for (i = 0; i < numInst; i++)
2527 {
2528 memset(&uart_cfg, 0, sizeof(UART_HwAttrs));
2529 UART_socGetInitCfg(i, &uart_cfg);
2531 if (uart_cfg.baseAddr == 0)
2532 {
2533 break;
2534 }
2535 }
2536 #endif
2537 return (i);
2538 }
2539 SemaphoreP_Handle MiCbSem[UART_TEST_NUM_INSTS] = {NULL, };
2540 UART_Handle MiUartHandle[UART_TEST_NUM_INSTS] = {NULL, };
2541 void UART_miCallback(UART_Handle handle, void *buf, size_t count)
2542 {
2543 uint32_t i;
2545 for (i = 0; i < UART_TEST_NUM_INSTS; i++)
2546 {
2547 if (MiUartHandle[i] == handle)
2548 {
2549 UART_osalPostLock(MiCbSem[i]);
2550 break;
2551 }
2552 }
2553 }
2555 /*
2556 * ========== UART multiple instances test ==========
2557 *
2558 * The test function for UART read/write on multiple instances
2559 * in loopback mode
2560 */
2561 #if (defined(_TMS320C6X) || defined (__TI_ARM_V7M4__))
2562 #pragma DATA_ALIGN (MiRxBuf, UART_TEST_CACHE_LINE_SIZE)
2563 char MiRxBuf[UART_TEST_NUM_INSTS][UART_TEST_CACHE_LINE_SIZE];
2564 #pragma DATA_ALIGN (MiTxBuf, UART_TEST_CACHE_LINE_SIZE)
2565 char MiTxBuf[UART_TEST_CACHE_LINE_SIZE];
2566 #else
2567 char MiRxBuf[UART_TEST_NUM_INSTS][UART_TEST_CACHE_LINE_SIZE] __attribute__ ((aligned (UART_TEST_CACHE_LINE_SIZE)));
2568 char MiTxBuf[UART_TEST_CACHE_LINE_SIZE] __attribute__ ((aligned (UART_TEST_CACHE_LINE_SIZE)));
2569 #endif
2571 static bool UART_test_multiple_instances(bool dmaMode)
2572 {
2573 UART_Params uartParams;
2574 bool ret = false;
2575 uint32_t i, j;
2576 uintptr_t bufAddr;
2577 uint32_t uartTestStartInst = uartTestInstance;
2578 uint32_t numUartTestInstances;
2579 SemaphoreP_Params semParams;
2581 /* enable the loopback */
2582 verifyLoopback = TRUE;
2584 /* Get the max number of instances for testing */
2585 numUartTestInstances = UART_getMaxNumInst(UART_TEST_NUM_INSTS);
2587 for (i = 0; i < numUartTestInstances; i++)
2588 {
2589 /* UART SoC init configuration */
2590 UART_initConfig(dmaMode);
2592 /* Create call back semaphores */
2593 UART_osalSemParamsInit(&semParams);
2594 semParams.mode = SemaphoreP_Mode_BINARY;
2595 MiCbSem[i] = UART_osalCreateBlockingLock(0, &semParams);
2597 /* Set callback mode for read */
2598 UART_Params_init(&uartParams);
2599 uartParams.readCallback = UART_miCallback;
2600 uartParams.readMode = UART_MODE_CALLBACK;
2601 uartParams.parityType = uartParity;
2603 MiUartHandle[i] = UART_open(uartTestInstance, &uartParams);
2604 if (MiUartHandle[i] == NULL)
2605 {
2606 goto Err;
2607 }
2608 uartTestInstance++;
2609 }
2611 for (i = 0; i < numUartTestInstances; i++)
2612 {
2613 memset(MiRxBuf[i], 0, UART_TEST_CACHE_LINE_SIZE);
2614 if (dmaMode)
2615 {
2616 bufAddr = l2_global_address((uintptr_t)MiRxBuf[i]);
2617 CacheP_wbInv((void *)(uintptr_t)bufAddr, UART_TEST_CACHE_LINE_SIZE);
2618 }
2619 else
2620 {
2621 bufAddr = (uintptr_t)MiRxBuf[i];
2622 }
2624 UART_read(MiUartHandle[i], (void *)(uintptr_t)bufAddr, UART_TEST_READ_LEN);
2625 }
2627 for (i = 0; i < numUartTestInstances; i++)
2628 {
2629 for (j = 0; j < UART_TEST_READ_LEN; j++)
2630 {
2631 MiTxBuf[j] = fifoTrgLvlData[j] + (char)i;
2632 }
2633 if (dmaMode)
2634 {
2635 bufAddr = l2_global_address((uintptr_t)MiTxBuf);
2636 CacheP_wbInv((void *)(uintptr_t)bufAddr, UART_TEST_CACHE_LINE_SIZE);
2637 }
2638 else
2639 {
2640 bufAddr = (uintptr_t)MiTxBuf;
2641 }
2643 if (UART_write(MiUartHandle[i], (void *)(uintptr_t)bufAddr, UART_TEST_READ_LEN) == UART_ERROR)
2644 {
2645 goto Err;
2646 }
2647 }
2649 /* add delay for the read semaphore calback */
2650 Osal_delay(100);
2652 for (i = 0; i < numUartTestInstances; i++)
2653 {
2654 for (j = 0; j < UART_TEST_READ_LEN; j++)
2655 {
2656 if ((fifoTrgLvlData[j] + (char)i) != MiRxBuf[i][j])
2657 {
2658 goto Err;
2659 }
2660 }
2661 }
2663 ret = true;
2665 Err:
2666 for (i = 0; i < numUartTestInstances; i++)
2667 {
2668 if (MiUartHandle[i] != NULL)
2669 {
2670 UART_close(MiUartHandle[i]);
2671 MiUartHandle[i] = NULL;
2672 }
2673 }
2675 verifyLoopback = FALSE;
2676 uartTestInstance = uartTestStartInst;
2677 return (ret);
2678 }
2679 #endif /* if UART_RX_LOOPBACK_ONLY */
2680 #endif /* if DMA */
2682 /**
2683 * @b Description
2684 * @n
2685 * The function is used to test the UART Driver *WRITE* functions with
2686 * various invalid arguments.
2687 *
2688 * @param[in] handle
2689 * UART Handle
2690 *
2691 * @retval
2692 * Success - 0
2693 * @retval
2694 * Error - <0
2695 */
2696 static bool UART_writeInvalidArgs(UART_Handle handle)
2697 {
2698 uint8_t buffer[4];
2699 int32_t status;
2701 /**************************************************************************
2702 * Test: Write with invalid buffer
2703 **************************************************************************/
2704 status = UART_write(handle, NULL, 128);
2705 if (status >= 0)
2706 {
2707 printf("Error: UART Write with invalid buffer returned %d\n", status);
2708 return false;
2709 }
2711 /**************************************************************************
2712 * Test: Write with invalid size
2713 **************************************************************************/
2714 status = UART_write(handle, &buffer[0], 0);
2715 if (status >= 0)
2716 {
2717 printf("Error: UART Write with invalid size returned %d\n", status);
2718 return false;
2719 }
2721 /**************************************************************************
2722 * Test: Write Polling with invalid buffer
2723 **************************************************************************/
2724 status = UART_writePolling(handle, NULL, 128);
2725 if (status >= 0)
2726 {
2727 printf("Error: UART Write with invalid buffer returned %d\n", status);
2728 return false;
2729 }
2731 /**************************************************************************
2732 * Test: Write Polling with invalid size
2733 **************************************************************************/
2734 status = UART_writePolling(handle, &buffer[0], 0);
2735 if (status >= 0)
2736 {
2737 printf("Error: UART Write with invalid size returned %d\n", status);
2738 return false;
2739 }
2741 return true;
2742 }
2744 /**
2745 * @b Description
2746 * @n
2747 * The function is used to test the UART Driver *READ* functions with
2748 * various invalid arguments.
2749 *
2750 * @param[in] handle
2751 * UART Handle
2752 *
2753 * @retval
2754 * Success - 0
2755 * @retval
2756 * Error - <0
2757 */
2758 static bool UART_readInvalidArgs(UART_Handle handle)
2759 {
2760 uint8_t buffer[4];
2761 int32_t status;
2763 /**************************************************************************
2764 * Test: Read with invalid buffer
2765 **************************************************************************/
2766 status = UART_read(handle, NULL, 128);
2767 if (status != UART_EINVAL)
2768 {
2769 printf("Error: UART Read with invalid buffer returned %d\n", status);
2770 return false;
2771 }
2773 /**************************************************************************
2774 * Test: Read with invalid size
2775 **************************************************************************/
2776 status = UART_read(handle, &buffer[0], 0);
2777 if (status != UART_EINVAL)
2778 {
2779 printf("Error: UART Read with invalid size returned %d\n", status);
2780 return false;
2781 }
2783 /**************************************************************************
2784 * Test: Read Polling with invalid buffer
2785 **************************************************************************/
2786 status = UART_readPolling(handle, NULL, 128);
2787 if (status != UART_EINVAL)
2788 {
2789 printf("Error: UART Read with invalid buffer returned %d\n", status);
2790 return false;
2791 }
2793 /**************************************************************************
2794 * Test: Read Polling with invalid size
2795 **************************************************************************/
2796 status = UART_readPolling(handle, &buffer[0], 0);
2797 if (status != UART_EINVAL)
2798 {
2799 printf("Error: UART Read with invalid size returned %d\n", status);
2800 return false;
2801 }
2803 return true;
2804 }
2806 /**
2807 * @b Description
2808 * @n
2809 * The function is used to test the exported UART API.
2810 *
2811 * @retval
2812 * Success - 0
2813 * @retval
2814 * Error - <0
2815 */
2816 bool UART_test_api (bool dmaMode)
2817 {
2818 UART_Params params;
2819 UART_Handle handle;
2821 /* UART SoC init configuration */
2822 UART_initConfig(dmaMode);
2824 /* Setup the default UART Parameters */
2825 UART_Params_init(¶ms);
2827 /* Open the UART Instance */
2828 handle = UART_open(uartTestInstance, ¶ms);
2829 if (handle == NULL)
2830 {
2831 printf("Error: Unable to open the UART Instance\n");
2832 return false;
2833 }
2834 /**************************************************************************
2835 * Test: Graceful shutdown
2836 **************************************************************************/
2837 UART_close(handle);
2839 /**************************************************************************
2840 * Test: Reopen the driver
2841 **************************************************************************/
2842 handle = UART_open(0, ¶ms);
2843 if (handle == NULL)
2844 {
2845 printf("Error: Unable to open the UART Instance\n");
2846 return false;
2847 }
2849 /* Test: This will test the UART Write with Invalid arguments */
2850 if (!UART_writeInvalidArgs(handle))
2851 return false;
2853 /* Test: This will test the UART Read with Invalid arguments */
2854 if (!UART_readInvalidArgs(handle))
2855 return false;
2857 /* Close the driver: */
2858 UART_close(handle);
2859 return true;
2860 }
2862 /**
2863 * @b Description
2864 * @n
2865 * The function is used to profile the UART Transmit API for
2866 * comparison in DMA and Non-DMA mode
2867 *
2868 * @retval
2869 * Success - 0
2870 * @retval
2871 * Error - <0
2872 */
2873 uint8_t uartDataBuf[0x2000];
2875 bool UART_test_profile_tx(bool dmaMode)
2876 {
2877 int32_t status;
2878 UART_Params params;
2879 UART_Handle handle;
2880 int32_t testIndex;
2881 int32_t dataSizeIndex;
2882 uint32_t dataSize[] = { 64, 256, 1024, 4096, 8192 };
2883 uint32_t numDataSize = sizeof(dataSize)/sizeof(uint32_t);
2884 uint32_t baudRate = 921600;
2885 uintptr_t ptrTxData;
2886 uint32_t txTimeTaken;
2887 UART_Stats stats;
2888 char testDescription[128];
2890 #if defined(QT_BUILD)
2891 numDataSize = 3;
2892 #endif
2894 CycleprofilerP_init();
2896 /********************************************************************************
2897 * Execute the test for all data sizes
2898 ********************************************************************************/
2899 for (dataSizeIndex = 0; dataSizeIndex < numDataSize; dataSizeIndex++)
2900 {
2901 /********************************************************************************
2902 * For each data size we will run through the following:-
2903 * - Test Index 0: Non-DMA + Blocking Mode
2904 * - Test Index 1: DMA + Blocking Mode
2905 * - Test Index 2: Non-DMA + Polling Mode
2906 * - Test Index 3: DMA + Polling Mode
2907 ********************************************************************************/
2908 for (testIndex = 0; testIndex < 4; testIndex++)
2909 {
2911 #ifdef UART_DMA_ENABLE
2912 if(testIndex & 1)
2913 {
2914 dmaMode = true;
2915 ptrTxData = l2_global_address((uintptr_t)uartDataBuf);
2916 }
2917 else
2918 #endif
2919 {
2920 dmaMode = false;
2921 ptrTxData = (uintptr_t)uartDataBuf;
2922 }
2924 /* UART SoC init configuration */
2925 UART_initConfig(dmaMode);
2927 /*******************************************************************************
2928 * Initialization:
2929 *******************************************************************************/
2930 UART_Params_init(¶ms);
2931 params.readDataMode = UART_DATA_BINARY;
2932 params.writeDataMode = UART_DATA_BINARY;
2933 params.baudRate = baudRate;
2934 params.readEcho = UART_ECHO_OFF;
2936 /* Open the UART Instance: */
2937 handle = UART_open(uartTestInstance, ¶ms);
2938 if (handle == NULL)
2939 {
2940 printf ("Error: Unable to open the UART Driver while profiling Transmit Data\n");
2941 return false;
2942 }
2944 /******************************************************************************
2945 * Debug Message:
2946 ******************************************************************************/
2947 switch (testIndex)
2948 {
2949 case 0:
2950 {
2951 sprintf (testDescription, "UART %d Profile Test in Non-DMA Blocking Mode [Data Size %d bytes]",
2952 uartTestInstance, dataSize[dataSizeIndex]);
2953 break;
2954 }
2955 case 1:
2956 {
2957 sprintf (testDescription, "UART %d Profile Test in DMA Blocking Mode [Data Size %d bytes]",
2958 uartTestInstance, dataSize[dataSizeIndex]);
2959 break;
2960 }
2961 case 2:
2962 {
2963 sprintf (testDescription, "UART %d Profile Test in Non-DMA Polling Mode [Data Size %d bytes]",
2964 uartTestInstance, dataSize[dataSizeIndex]);
2965 break;
2966 }
2967 case 3:
2968 {
2969 sprintf (testDescription, "UART %d Profile Test in DMA Polling Mode [Data Size %d bytes]",
2970 uartTestInstance, dataSize[dataSizeIndex]);
2971 break;
2972 }
2973 default:
2974 {
2975 /* Control should never come here */
2976 OSAL_Assert (!0);
2977 return false;
2978 }
2979 }
2981 /* Initialize the memory to be used: */
2982 memset ((void *)uartDataBuf, 0, dataSize[dataSizeIndex]);
2984 /* Populate the transmit buffer: */
2985 UART_populateBuffer (uartDataBuf, dataSize[dataSizeIndex]);
2987 /****************************************************************
2988 * Profile the time taken to send out the data
2989 ****************************************************************/
2990 txTimeTaken = CycleprofilerP_getTimeStamp();
2992 if ((testIndex == 0) || (testIndex == 1))
2993 status = UART_write(handle, (void *)ptrTxData, dataSize[dataSizeIndex]);
2994 else
2995 status = UART_writePolling(handle, (void *)ptrTxData, dataSize[dataSizeIndex]);
2997 txTimeTaken = CycleprofilerP_getTimeStamp() - txTimeTaken;
2999 /* Were we able to send out the data */
3000 if (status != dataSize[dataSizeIndex])
3001 {
3002 printf ("Error: Unable to send out the data [Status %d]\n", status);
3003 UART_close(handle);
3004 return false;
3005 }
3007 /* Get the UART Statistics: */
3008 if (UART_control (handle, UART_CMD_GET_STATS, &stats) < 0)
3009 {
3010 UART_close(handle);
3011 return false;
3012 }
3014 /* Debug Message: */
3015 printf ("Debug: Transmit Measurements\n");
3016 printf ("Debug: Baud Rate : %d\n", baudRate);
3017 printf ("Debug: Data Size : %d\n", dataSize[dataSizeIndex]);
3018 printf ("Debug: Transmit : %d ticks\n", txTimeTaken);
3019 printf ("Debug: Tx Interrupt : %d\n", stats.numTxInterrupts);
3020 printf ("Debug: Tx DMA Interrupt : %d\n", stats.numTxDMAInterrupts);
3022 /* Close the driver: */
3023 UART_close(handle);
3024 }
3025 }
3027 /********************************************************************************************
3028 * This is just a beautification; we have mucked around with the UART Console by dumping
3029 * all the data. So here we open a console and just put a banner to make it clean
3030 ********************************************************************************************/
3031 {
3032 char* ptrTestDelimitter = "\n\r*********************************************\n\r";
3034 UART_Params_init(¶ms);
3035 params.readDataMode = UART_DATA_BINARY;
3036 params.writeDataMode = UART_DATA_BINARY;
3037 params.baudRate = baudRate;
3038 params.readEcho = UART_ECHO_OFF;
3040 /* Open the UART Instance: */
3041 handle = UART_open(uartTestInstance, ¶ms);
3042 if (!handle)
3043 {
3044 printf ("Error: Unable to open the UART Driver while printing the test banner\n");
3045 return false;
3046 }
3048 /* Write the banner on the console*/
3049 UART_writePolling (handle, (uint8_t*)ptrTestDelimitter, strlen(ptrTestDelimitter));
3050 UART_writePolling (handle, (uint8_t*)ptrTestDelimitter, strlen(ptrTestDelimitter));
3052 /* Close the driver: */
3053 UART_close(handle);
3054 }
3056 return true;
3057 }
3059 #ifdef USE_BIOS
3061 typedef struct UART_multiTaskTestCB_s
3062 {
3063 bool testDone;
3064 bool dmaMode;
3065 bool testResult;
3066 } UART_multiTaskTestCB_t;
3069 UART_multiTaskTestCB_t gUARTTestCb;
3071 /**
3072 * @b Description
3073 * @n
3074 * Receive Task
3075 *
3076 * @retval
3077 * Not Applicable.
3078 */
3079 uint8_t rxData[MAX_TEST_BUFFER_SIZE];
3080 static void UART_rxTask(UArg arg0, UArg arg1)
3081 {
3082 int32_t status;
3083 uintptr_t ptrDest;
3085 /* Debug Message: */
3086 printf ("Debug: UART Receive Task [Waiting for the UART Handle]\n");
3088 if (gUARTTestCb.dmaMode)
3089 {
3090 ptrDest = l2_global_address((uintptr_t)&rxData[0]);
3091 }
3092 else
3093 {
3094 ptrDest = (uintptr_t)&rxData[0];
3095 }
3097 memset((void *)rxData, 0xDE, MAX_TEST_BUFFER_SIZE);
3099 if (gUARTTestCb.dmaMode)
3100 {
3101 CacheP_wbInv((void *)(uintptr_t)rxData, (int32_t)sizeof(rxData));
3102 }
3104 /* Loop around and make sure that the UART Handle has been created: */
3105 while (1)
3106 {
3107 if (gUARTHandle != NULL)
3108 break;
3109 Task_sleep(1);
3110 }
3112 /* Debug Message: */
3113 printf ("Debug: UART Receive Task is active\n");
3114 /* Read the data: */
3115 status = UART_read(gUARTHandle, (void *)ptrDest, MAX_TEST_BUFFER_SIZE);
3116 if (status < 0)
3117 {
3118 printf("Error: UART Read with invalid buffer returned %d\n", status);
3119 gUARTTestCb.testResult = false;
3120 goto Err;
3121 }
3122 printf("Debug: UART Read has been completed\n");
3124 /***********************************************************************************
3125 * Data Validation:
3126 ***********************************************************************************/
3127 if (gUARTTestCb.dmaMode)
3128 {
3129 CacheP_wbInv((void *)(uintptr_t)&rxData[0], (int32_t)sizeof(rxData));
3130 }
3132 if (UART_validateBuffer (&rxData[0], status) < 0)
3133 {
3134 gUARTTestCb.testResult = false;
3135 }
3136 else
3137 {
3138 gUARTTestCb.testResult = true;
3139 }
3141 Err:
3142 /* Close the driver: */
3143 UART_close(gUARTHandle);
3144 gUARTHandle = NULL;
3146 /* disable the loopback */
3147 verifyLoopback = 0;
3149 gUARTTestCb.testDone = true;
3151 return;
3152 }
3155 /**
3156 * @b Description
3157 * @n
3158 * Transmit Task
3159 *
3160 * @retval
3161 * Not Applicable.
3162 */
3163 uint8_t txData[MAX_TEST_BUFFER_SIZE];
3164 static void UART_txTask(UArg arg0, UArg arg1)
3165 {
3166 UART_Params params;
3167 UART_Handle handle;
3168 uint32_t baudRate = 921600;
3169 int32_t status;
3170 uintptr_t ptrSrc;
3172 /* enable the loopback */
3173 verifyLoopback = 1;
3175 /* UART SoC init configuration */
3176 UART_initConfig(gUARTTestCb.dmaMode);
3178 /* Setup the default UART Parameters */
3179 UART_Params_init(¶ms);
3180 params.baudRate = baudRate;
3181 params.readEcho = UART_ECHO_OFF;
3183 /* Open the UART Instance */
3184 handle = UART_open(uartTestInstance, ¶ms);
3185 if (handle == NULL)
3186 {
3187 printf("Error: Unable to open the UART Instance\n");
3188 return;
3189 }
3191 printf("Debug: Testing UART in Blocking Mode @ Baud Rate: %d\n", params.baudRate);
3193 /* Populate the transmit buffer: */
3194 UART_populateBuffer (&txData[0], sizeof(txData));
3196 /* Implement the Loopback workaround */
3197 //Test_sciLoopbackWorkaround (handle);
3199 if (gUARTTestCb.dmaMode)
3200 {
3201 ptrSrc = l2_global_address((uintptr_t)&txData[0]);
3202 CacheP_wb((void *)(uintptr_t)&txData[0], (int32_t)sizeof(txData));
3203 }
3204 else
3205 {
3206 ptrSrc = (uintptr_t)&txData[0];
3207 }
3209 /* We can now execute the test: Wake up the receive task. */
3210 gUARTHandle = handle;
3211 Task_sleep(2);
3213 printf("Debug: txTask send block of %d bytes\n", MAX_TEST_BUFFER_SIZE);
3215 /* Send out the data */
3216 status = UART_write(gUARTHandle, (void *)ptrSrc, MAX_TEST_BUFFER_SIZE);
3217 if (status < 0)
3218 {
3219 printf("Error: UART Write failed [Error code %d]\n", status);
3220 return;
3221 }
3223 printf("Debug: UART Blocking Write has been completed\n");
3225 return;
3226 }
3228 /**
3229 * @b Description
3230 * @n
3231 * The function is used to test the blocking data transfer
3232 *
3233 * @retval
3234 * Success - 0
3235 * @retval
3236 * Error - <0
3237 */
3238 bool UART_test_loopback_data(bool dmaMode)
3239 {
3240 Task_Params taskParams;
3241 Task_Handle txHandle, rxHandle;
3243 /* Initialize the test control block */
3244 gUARTTestCb.testDone = false;
3245 gUARTTestCb.dmaMode = dmaMode;
3246 gUARTTestCb.testResult = false;
3248 /********************************************************************
3249 * Test: Blocking Data test launch the receive & transmit tasks
3250 ********************************************************************/
3251 Task_Params_init(&taskParams);
3252 taskParams.stackSize = 2*1024;
3253 taskParams.priority = 3;
3254 rxHandle = Task_create(UART_rxTask, &taskParams, NULL);
3256 Task_Params_init(&taskParams);
3257 taskParams.stackSize = 2*1024;
3258 taskParams.priority = 2;
3259 txHandle = Task_create(UART_txTask, &taskParams, NULL);
3261 /* wait for test to complete */
3262 while(!gUARTTestCb.testDone)
3263 {
3264 Task_sleep(1);
3265 }
3267 Task_delete(&txHandle);
3268 Task_delete(&rxHandle);
3270 return (gUARTTestCb.testResult);
3271 }
3273 #endif /* USE_BIOS */
3275 UART_Tests Uart_tests[] =
3276 {
3277 #ifdef UART_DMA_ENABLE
3278 {UART_test_read_write, true, UART_TEST_ID_DMA, "\r\n UART DMA read write test in block mode"},
3279 #endif
3280 {UART_test_read_write, false, UART_TEST_ID_INT, "\r\n UART non-DMA read write test in block mode"},
3281 #ifdef UART_DMA_ENABLE
3282 {UART_test_callback, true, UART_TEST_ID_DMA_CB, "\r\n UART DMA read write test in callback mode"},
3283 #endif
3284 {UART_test_callback, false, UART_TEST_ID_CB, "\r\n UART non-DMA read write test in callback mode"},
3285 #ifdef UART_DMA_ENABLE
3286 {UART_test_timeout, true, UART_TEST_ID_DMA_TO, "\r\n UART DMA timeout test, wait for 10 seconds to timeout read"},
3287 #endif
3288 {UART_test_timeout, false, UART_TEST_ID_TO, "\r\n UART non-DMA timeout test, wait for 10 seconds to timeout read"},
3289 #if !defined(UART_API2_NOT_SUPPORTED)
3290 #ifdef UART_DMA_ENABLE
3291 {UART_test_rx_err, true, UART_TEST_ID_DMA_RXERR, "\r\n UART DMA RX error test, enter a break"},
3292 #endif
3293 {UART_test_rx_err, false, UART_TEST_ID_RXERR, "\r\n UART non-DMA RX error test, enter a break"},
3294 #endif
3295 #ifdef UART_DMA_ENABLE
3296 {UART_test_read_write_cancel, true, UART_TEST_ID_DMA_CANCEL, "\r\n UART DMA read write cancel test, enter less than 16 chars"},
3297 #endif
3298 {UART_test_read_write_cancel, false, UART_TEST_ID_CANCEL, "\r\n UART non-DMA read write cancel test, enter less than 16 chars"},
3299 #ifdef USE_BIOS
3300 #if !defined(UART_API2_NOT_SUPPORTED)
3301 #ifdef UART_DMA_ENABLE
3302 {UART_test_simultaneous_rw, true, UART_TEST_ID_DMA_RW, "\r\n UART DMA simultaneous read write test "},
3303 #endif
3304 {UART_test_simultaneous_rw, false, UART_TEST_ID_RW, "\r\n UART non-DMA simultaneous read write test "},
3305 #endif
3306 #endif
3307 #if defined(UART_DMA_ENABLE)
3308 #if !defined(UART_NO_FIFO)
3309 {UART_test_fifo_trglvl, true, UART_TEST_ID_DMA_TRGLVL, "\r\n UART DMA TX/RX FIFO trigger level test "},
3310 #endif
3311 #endif
3312 {UART_test_printf_scanf, false, UART_TEST_ID_PRINTF, "\r\n UART stdio printf and scanf test "},
3313 #if !defined(UART_NO_FIFO)
3314 {UART_test_fifo_trglvl, false, UART_TEST_ID_TRGLVL, "\r\n UART non-DMA TX/RX FIFO trigger level test "},
3315 #endif
3316 {UART_test_polling_timeout, false, UART_TEST_ID_POLL_TO, "\r\n UART polling timeout test, wait for 10 seconds to timeout read"},
3317 {UART_test_printf_scanf_stdio_params, false, UART_TEST_ID_STDIOPARAMS, "\r\n UART stdio printf and scanf test with STDIO params(Default) "},
3318 {UART_test_read_write_int_disable, false, UART_TEST_ID_INT_DISABLE, "\r\n UART read write test with interrupt disabled"},
3319 {UART_test_read_verify, false, UART_TEST_ID_RDVERIFY, "\r\n UART non-DMA read API test in loopback mode"},
3320 #ifdef UART_DMA_ENABLE
3321 #if !defined(UART_RX_LOOPBACK_ONLY)
3322 {UART_test_multiple_instances, true, UART_TEST_ID_MULTI_INSTS, "\r\n UART DMA multiple instances loopback test "},
3323 #endif
3324 #endif
3325 {UART_test_api, false, UART_TEST_ID_API, "\r\n UART API Test"},
3326 {UART_test_profile_tx, false, UART_TEST_ID_PROF_TX, "\r\n UART non-DMA/DMA Blocking/Polling transmit profiling"},
3327 #ifdef USE_BIOS
3328 {UART_test_loopback_data, false, UART_TEST_ID_LB_DATA, "\r\n UART non-DMA read write test with loopback"},
3329 #ifdef UART_DMA_ENABLE
3330 {UART_test_loopback_data, true, UART_TEST_ID_DMA_LB_DATA, "\r\n UART DMA read write test with loopback"},
3331 #endif
3332 #endif
3333 {NULL, }
3334 };
3336 void UART_test_print_test_desc(UART_Tests *test)
3337 {
3339 #if !defined(QT_BUILD)
3340 UART_Handle uart = NULL;
3341 UART_Params uartParams;
3342 char testIdPrompt[16] = "\r\n UART UT ";
3343 char crPrompt[16] = "\r\n";
3344 char testId[16] = {0, };
3346 /* UART SoC init configuration */
3347 UART_initConfig(false);
3349 /* Initialize the default configuration params. */
3350 UART_Params_init(&uartParams);
3351 uartParams.parityType = uartParity;
3352 uart = UART_open(uartTestInstance, &uartParams);
3354 /* Print unit test ID */
3355 sprintf(testId, "%d", test->testId);
3356 UART_write(uart, (void *)(uintptr_t)crPrompt, sizeof(crPrompt));
3357 UART_write(uart, (void *)(uintptr_t)testIdPrompt, sizeof(testIdPrompt));
3358 UART_write(uart, (void *)(uintptr_t)testId, sizeof(testId));
3359 UART_write(uart, (void *)(uintptr_t)crPrompt, sizeof(crPrompt));
3361 /* Print test description */
3362 UART_write(uart, (void *)(uintptr_t)test->testDesc, sizeof(test->testDesc));
3363 UART_write(uart, (void *)(uintptr_t)crPrompt, sizeof(crPrompt));
3365 UART_close(uart);
3366 #else
3367 printf("UART UT %d: %s\n", test->testId, test->testDesc);
3368 #endif
3369 }
3371 void UART_test_print_test_result(UART_Tests *test, bool pass)
3372 {
3373 #if !defined(QT_BUILD)
3374 UART_Handle uart = NULL;
3375 UART_Params uartParams;
3376 char testIdPrompt[16] = "\r\n UART UT ";
3377 char crPrompt[16] = "\r\n";
3378 char testId[16] = {0, };
3379 char resultPass[16] = " PASSED";
3380 char resultFail[16] = " FAILED";
3382 /* UART SoC init configuration */
3383 UART_initConfig(false);
3385 /* Initialize the default configuration params. */
3386 UART_Params_init(&uartParams);
3387 uartParams.parityType = uartParity;
3388 uart = UART_open(uartTestInstance, &uartParams);
3390 /* Print unit test ID */
3391 sprintf(testId, "%d", test->testId);
3392 UART_write(uart, (void *)(uintptr_t)crPrompt, sizeof(crPrompt));
3393 UART_write(uart, (void *)(uintptr_t)testIdPrompt, sizeof(testIdPrompt));
3394 UART_write(uart, (void *)(uintptr_t)testId, sizeof(testId));
3395 if (pass == true)
3396 {
3397 UART_write(uart, (void *)(uintptr_t)resultPass, sizeof(resultPass));
3398 }
3399 else
3400 {
3401 UART_write(uart, (void *)(uintptr_t)resultFail, sizeof(resultFail));
3402 }
3404 UART_write(uart, (void *)(uintptr_t)crPrompt, sizeof(crPrompt));
3406 UART_close(uart);
3407 #else
3408 printf("UART UT %d: %s\n", test->testId, pass?"PASSED":"FAILED");
3409 #endif
3410 }
3412 void UART_test_print_test_results(bool pass)
3413 {
3414 const char resultPass[32] = "\r\n All tests have passed. \r\n";
3415 const char resultFail[32] = "\r\n Some tests have failed. \r\n";
3417 #if !defined(QT_BUILD)
3418 /* UART SoC init configuration */
3419 UART_initConfig(false);
3421 UART_stdioInit(uartTestInstance);
3423 if (pass == true)
3424 {
3425 UART_printStatus(resultPass);
3426 }
3427 else
3428 {
3429 UART_printStatus(resultFail);
3430 }
3432 UART_stdioDeInit();
3433 #else
3434 printf("%s", pass?resultPass:resultFail);
3435 #endif
3436 }
3438 #ifdef USE_BIOS
3439 /*
3440 * ======== taskFxn ========
3441 */
3442 Void taskFxn(UArg a0, UArg a1)
3443 #else
3444 int main(void)
3445 #endif /* #ifdef USE_BIOS */
3446 {
3447 bool testResult = false;
3448 uint32_t i;
3450 #ifndef USE_BIOS
3451 if (Board_initUART() == false)
3452 {
3453 return(0);
3454 }
3455 #endif
3457 UART_init();
3459 for (i = 0; ; i++)
3460 {
3461 if (Uart_tests[i].testFunc == NULL)
3462 {
3463 break;
3464 }
3465 UART_test_print_test_desc(&Uart_tests[i]);
3466 testResult = Uart_tests[i].testFunc(Uart_tests[i].dmaMode);
3467 UART_test_print_test_result(&Uart_tests[i], testResult);
3469 if (testResult == false)
3470 {
3471 break;
3472 }
3474 }
3476 UART_test_print_test_results(testResult);
3478 while (1)
3479 {
3480 }
3481 }
3483 #ifdef USE_BIOS
3484 /*
3485 * ======== main ========
3486 */
3487 Int main()
3488 {
3489 Task_Handle task;
3490 Error_Block eb;
3491 Task_Params taskParams;
3493 Uart_appC7xPreInit();
3495 if (Board_initUART() == false)
3496 {
3497 System_printf("\nBoard_initUART failed!\n");
3498 return(0);
3499 }
3501 Error_init(&eb);
3503 /* Initialize the task params */
3504 Task_Params_init(&taskParams);
3506 /* Set the task priority higher than the default priority (1) */
3507 taskParams.priority = 2;
3508 taskParams.stackSize = 0x6000;
3510 task = Task_create(taskFxn, &taskParams, &eb);
3511 if (task == NULL) {
3513 BIOS_exit(0);
3514 }
3515 BIOS_start(); /* does not return */
3516 return(0);
3517 }
3518 #endif /* #ifdef USE_BIOS */
3520 #ifdef UART_DMA_ENABLE
3521 #if !(defined (SOC_AM65XX) || defined(SOC_J721E) || defined(SOC_J7200) || defined(SOC_AM64X) || defined(SOC_TPR12))
3522 EDMA3_RM_Handle gEdmaHandle = NULL;
3524 /*
3525 * Initialize the edma driver and get the handle to the edma driver;
3526 */
3527 static EDMA3_RM_Handle UartApp_edmaInit(void)
3528 {
3529 EDMA3_DRV_Result edmaResult = EDMA3_DRV_E_INVALID_PARAM;
3530 uint32_t edma3Id;
3532 #if defined(SOC_K2H) || defined(SOC_K2K) || defined(SOC_K2L) || defined(SOC_K2E) || defined(SOC_K2G) || defined(SOC_C6678) || defined(SOC_C6657) || defined(SOC_OMAPL137) || defined(SOC_OMAPL138) ||\
3533 defined(DEVICE_K2H) || defined(DEVICE_K2K) || defined(DEVICE_K2L) || defined(DEVICE_K2E) || defined(DEVICE_K2G) || defined(DEVICE_C6678) || defined(DEVICE_C6657) || defined(DEVICE_OMAPL137) || defined(DEVICE_OMAPL138)
3534 uint32_t edmaEvent[2], i, chnMapping, chnMappingIdx;
3536 /* For Keystone devices, edm3Id is UART instance and SoC specific */
3537 UART_getEdmaInfo(uartTestInstance, &edma3Id, edmaEvent);
3539 /* Set the RX/TX ownDmaChannels and dmaChannelHwEvtMap */
3540 for (i = 0; i < 2; i++)
3541 {
3542 chnMapping = edmaEvent[i];
3543 if (chnMapping < 32)
3544 chnMappingIdx = 0;
3545 else
3546 {
3547 chnMapping -= 32;
3548 chnMappingIdx = 1;
3549 }
3550 sampleInstInitConfig[edma3Id][0].ownDmaChannels[chnMappingIdx] |= (1 << chnMapping);
3551 sampleInstInitConfig[edma3Id][0].ownTccs[chnMappingIdx] |= (1 << chnMapping);
3552 sampleInstInitConfig[edma3Id][0].ownPaRAMSets[chnMappingIdx] |= (1 << chnMapping);
3553 sampleEdma3GblCfgParams[edma3Id].dmaChannelHwEvtMap[chnMappingIdx] |= (1 << chnMapping);
3554 }
3555 #endif
3557 if (gEdmaHandle != NULL)
3558 {
3559 return(gEdmaHandle);
3560 }
3562 #if defined (SOC_AM574x) || defined(SOC_AM572x)|| defined(SOC_AM571x) || defined (SOC_DRA72x) || defined (SOC_DRA75x) || defined (SOC_DRA78x) || defined (SOC_AM335X) || defined (SOC_AM437X)
3563 edma3Id = 0;
3564 #endif
3565 gEdmaHandle = (EDMA3_RM_Handle)edma3init(edma3Id, &edmaResult);
3566 #ifdef USE_BIOS
3567 if (edmaResult != EDMA3_DRV_SOK)
3568 {
3569 /* Report EDMA Error */
3570 System_printf("\nEDMA driver initialization FAIL\n");
3571 }
3572 else
3573 {
3574 System_printf("\nEDMA driver initialization PASS.\n");
3575 }
3576 #endif
3577 return(gEdmaHandle);
3578 }
3579 #endif
3580 #if defined(SOC_TPR12)
3581 EDMA_Handle gEdmaHandle = NULL;
3583 #ifdef BUILD_MCU
3584 #define UART_EDMA_INSTANCE_ID EDMA_DRV_INST_MSS_A
3585 #else
3586 #define UART_EDMA_INSTANCE_ID EDMA_DRV_INST_DSS_B
3587 #endif
3589 uint32_t UART_edmaErrCount = 0;
3590 uint32_t UART_edmaTCErrCount = 0;
3592 void Test_edmaErrorCallbackFxn(EDMA_Handle handle, EDMA_errorInfo_t *errorInfo)
3593 {
3594 //OSAL_Assert(true);
3595 UART_edmaErrCount++;
3596 #if 0
3597 printf("edmaError:isOutstandingTransferCompletionTransfersExceededLimit:%d\n",
3598 errorInfo->isOutstandingTransferCompletionTransfersExceededLimit);
3599 #endif
3600 }
3602 void Test_edmaTransferControllerErrorCallbackFxn
3603 (
3604 EDMA_Handle handle,
3605 EDMA_transferControllerErrorInfo_t* errorInfo
3606 )
3607 {
3608 //OSAL_Assert(true);
3609 UART_edmaTCErrCount++;
3610 #if 0
3611 printf("edmaTransferControllerError:ReqErr:%d, RsvdMemErr:%d, BusErr:%d, errCode:%d, tcc:%d\n",
3612 errorInfo->isTransferRequestError,
3613 errorInfo->isWriteToReservedConfigMemoryMap,
3614 errorInfo->isBusError,
3615 errorInfo->busErrorInfo.errorCode,
3616 errorInfo->busErrorInfo.transferCompletionCode);
3617 #endif
3618 }
3620 /*
3621 * Initialize the edma driver and get the handle to the edma driver;
3622 */
3623 static EDMA_Handle UartApp_edmaInit(void)
3624 {
3625 EDMA_errorConfig_t errorConfig;
3626 EDMA_instanceInfo_t instanceInfo;
3627 int32_t errCode;
3629 if (gEdmaHandle != NULL)
3630 {
3631 return(gEdmaHandle);
3632 }
3634 /* Initialize the UART edma instance */
3635 errCode = EDMA_init(UART_EDMA_INSTANCE_ID);
3636 if (errCode != EDMA_NO_ERROR)
3637 {
3638 printf("Error: Unable to initialize EDMA, errorCode = %d\n", errCode);
3639 return NULL;
3640 }
3642 /* Open the UART edma Instance */
3643 gEdmaHandle = EDMA_open(UART_EDMA_INSTANCE_ID, &errCode, &instanceInfo);
3644 if (gEdmaHandle == NULL)
3645 {
3646 printf("Error: Unable to open the edma Instance(%d), erorCode = %d\n",
3647 UART_EDMA_INSTANCE_ID, errCode);
3648 return NULL;
3649 }
3651 /* Setup the EDMA Error Monitoring: */
3652 errorConfig.isConfigAllEventQueues = true;
3653 errorConfig.isConfigAllTransferControllers = true;
3654 errorConfig.isEventQueueThresholdingEnabled = true;
3655 errorConfig.eventQueueThreshold = EDMA_EVENT_QUEUE_THRESHOLD_MAX;
3656 errorConfig.isEnableAllTransferControllerErrors = true;
3657 errorConfig.callbackFxn = Test_edmaErrorCallbackFxn;
3658 errorConfig.transferControllerCallbackFxn = Test_edmaTransferControllerErrorCallbackFxn;
3659 errCode = EDMA_configErrorMonitoring(gEdmaHandle, &errorConfig);
3660 if (errCode != EDMA_NO_ERROR)
3661 {
3662 printf("Debug: EDMA_configErrorMonitoring() failed with errorCode = %d\n", errCode);
3663 //return NULL;
3664 }
3666 return(gEdmaHandle);
3667 }
3668 #endif
3669 #endif
3671 #if defined(BUILD_MPU) || defined (__C7100__)
3672 extern void Osal_initMmuDefault(void);
3673 void InitMmu(void)
3674 {
3675 Osal_initMmuDefault();
3676 }
3677 #endif
3679 void Uart_appC7xPreInit(void)
3680 {
3681 #if defined (__C7100__) && !defined (SOC_J7200)
3682 CSL_ClecEventConfig cfgClec;
3683 CSL_CLEC_EVTRegs *clecBaseAddr = (CSL_CLEC_EVTRegs*) CSL_COMPUTE_CLUSTER0_CLEC_REGS_BASE;
3685 uint32_t i, maxInputs = 2048U;
3687 /* make secure claim bit to FALSE so that after we switch to non-secure mode
3688 * we can program the CLEC MMRs
3689 */
3690 cfgClec.secureClaimEnable = FALSE;
3691 cfgClec.evtSendEnable = FALSE;
3692 cfgClec.rtMap = CSL_CLEC_RTMAP_DISABLE;
3693 cfgClec.extEvtNum = 0U;
3694 cfgClec.c7xEvtNum = 0U;
3695 for(i = 0U; i < maxInputs; i++)
3696 {
3697 CSL_clecConfigEvent(clecBaseAddr, i, &cfgClec);
3698 }
3699 #endif
3701 return;
3702 }