1 /*
2 * Copyright (c) Texas Instruments Incorporated 2018
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
6 * are met:
7 *
8 * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 *
11 * Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the
14 * distribution.
15 *
16 * Neither the name of Texas Instruments Incorporated nor the names of
17 * its contributors may be used to endorse or promote products derived
18 * from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 */
33 /**
34 * \defgroup DRV_UDMA_MODULE UDMA Driver
35 *
36 * @{
37 */
38 /* @} */
40 /**
41 * \ingroup DRV_UDMA_MODULE
42 * \defgroup DRV_UDMA_API_MODULE UDMA Driver API
43 * This is UDMA driver init, deinit and common API.
44 *
45 * @{
46 */
48 /**
49 * \file udma.h
50 *
51 * \brief UDMA Driver API/interface file.
52 *
53 * Requirement: DOX_REQ_TAG(PDK-2494)
54 */
56 #ifndef UDMA_H_
57 #define UDMA_H_
59 /* ========================================================================== */
60 /* Include Files */
61 /* ========================================================================== */
63 #include <stdint.h>
65 /* UDMA_SOC_CFG_* macros are defined udma_soc.h.
66 * So including this first
67 */
68 #include <ti/drv/udma/soc/udma_soc.h>
70 #include <ti/csl/soc.h>
71 #include <ti/csl/csl_psilcfg.h>
72 #if (UDMA_SOC_CFG_RA_NORMAL_PRESENT == 1)
73 #include <ti/csl/csl_ringacc.h>
74 #endif
75 #if (UDMA_SOC_CFG_RA_LCDMA_PRESENT == 1)
76 #include <ti/csl/csl_lcdma_ringacc.h>
77 #endif
78 #if (UDMA_SOC_CFG_UDMAP_PRESENT == 1)
79 #include <ti/csl/csl_udmap.h>
80 #endif
81 #if (UDMA_SOC_CFG_LCDMA_PRESENT == 1)
82 #include <ti/csl/csl_bcdma.h>
83 #include <ti/csl/csl_pktdma.h>
84 #endif
85 #include <ti/csl/csl_intaggr.h>
86 #include <ti/csl/csl_intr_router.h>
87 #if (UDMA_NUM_UTC_INSTANCE > 0)
88 #include <ti/csl/csl_dru.h>
89 #endif
90 #if (UDMA_SOC_CFG_PROXY_PRESENT == 1)
91 #include <ti/csl/csl_proxy.h>
92 #endif
93 #if (UDMA_SOC_CFG_CLEC_PRESENT == 1)
94 #include <ti/csl/csl_clec.h>
95 #endif
97 #include <ti/osal/osal.h>
98 #include <ti/drv/sciclient/sciclient.h>
100 #include <ti/drv/udma/include/udma_cfg.h>
101 #include <ti/drv/udma/include/udma_types.h>
102 #include <ti/drv/udma/include/udma_osal.h>
103 #include <ti/drv/udma/include/udma_ring.h>
104 #include <ti/drv/udma/include/udma_proxy.h>
105 #include <ti/drv/udma/include/udma_flow.h>
106 #include <ti/drv/udma/include/udma_event.h>
107 #include <ti/drv/udma/include/udma_rm.h>
108 #include <ti/drv/udma/include/udma_ch.h>
109 #if (UDMA_NUM_UTC_INSTANCE > 0)
110 #include <ti/drv/udma/include/udma_dru.h>
111 #endif
112 #include <ti/drv/udma/include/udma_utils.h>
114 #ifdef __cplusplus
115 extern "C" {
116 #endif
118 /* ========================================================================== */
119 /* Macros & Typedefs */
120 /* ========================================================================== */
122 /**
123 * \brief UDMA Virtual to Physical address translation callback function.
124 *
125 * This function is used by the driver to convert virtual address to physical
126 * address.
127 *
128 * \param virtAddr [IN] Virtual address
129 * \param chNum [IN] Channel number passed during channel open
130 * \param appData [IN] Callback pointer passed during channel open
131 *
132 * \return Corresponding physical address
133 */
134 typedef uint64_t (*Udma_VirtToPhyFxn)(const void *virtAddr,
135 uint32_t chNum,
136 void *appData);
137 /**
138 * \brief UDMA Physical to Virtual address translation callback function.
139 *
140 * This function is used by the driver to convert physical address to virtual
141 * address.
142 *
143 * \param phyAddr [IN] Physical address
144 * \param chNum [IN] Channel number passed during channel open
145 * \param appData [IN] Callback pointer passed during channel open
146 *
147 * \return Corresponding virtual address
148 */
149 typedef void *(*Udma_PhyToVirtFxn)(uint64_t phyAddr,
150 uint32_t chNum,
151 void *appData);
153 /**
154 * \brief UDMA info/debug print function prototype.
155 *
156 * This function is used by the driver to print info/debug messages.
157 *
158 * \param str [OUT] Info string to print.
159 */
160 typedef void (*Udma_PrintFxn)(const char *str);
162 /**
163 * \anchor Udma_RingLocalApiPrototypes
164 * \name UDMA Ring Local API's function prototypes
165 *
166 * Function prototypes for various local UDMA Ring API's.
167 * For Normal RA / LCDMA RA, function pointers will be used
168 * to call the appropriate function.
169 *
170 * @{
171 */
172 /** \brief UDMA Ring handle clear register function protype */
173 typedef void (*Udma_ringHandleClearRegsFxn)(Udma_RingHandle ringHandle);
174 /** \brief UDMA Ring set doorbell function protype */
175 typedef void (*Udma_ringSetDoorBellFxn)(Udma_RingHandle ringHandle,
176 int32_t count);
177 /** \brief UDMA Ring prime function protype */
178 typedef void (*Udma_ringPrimeFxn)(Udma_RingHandle ringHandle,
179 uint64_t phyDescMem);
180 /** \brief UDMA Ring prime read function protype */
181 typedef void (*Udma_ringPrimeReadFxn)(Udma_RingHandle ringHandle,
182 uint64_t *phyDescMem);
183 /** \brief UDMA Ring get mem pointer function protype */
184 typedef void *(*Udma_ringGetMemPtrFxn)(Udma_RingHandle ringHandle);
185 /** \brief UDMA Ring get ring mode function protype */
186 typedef uint32_t (*Udma_ringGetModeFxn)(Udma_RingHandle ringHandle);
187 /** \brief UDMA Ring get element count function protype */
188 typedef uint32_t (*Udma_ringGetElementCntFxn)(Udma_RingHandle ringHandle);
189 /** \brief UDMA Ring get forward ring occupancy function protype */
190 typedef uint32_t (*Udma_ringGetForwardRingOccFxn)(Udma_RingHandle ringHandle);
191 /** \brief UDMA Ring get reverse ring occupancy function protype */
192 typedef uint32_t (*Udma_ringGetReverseRingOccFxn)(Udma_RingHandle ringHandle);
193 /** \brief UDMA Ring get write index value function protype */
194 typedef uint32_t (*Udma_ringGetWrIdxFxn)(Udma_RingHandle ringHandle);
195 /** \brief UDMA Ring get read index value function protype */
196 typedef uint32_t (*Udma_ringGetRdIdxFxn)(Udma_RingHandle ringHandle);
197 /** \brief UDMA Ring dequeue raw function protype */
198 typedef int32_t (*Udma_ringDequeueRawFxn)(Udma_DrvHandle drvHandle,
199 Udma_RingHandle ringHandle,
200 uint64_t *phyDescMem);
201 /** \brief UDMA Ring queue raw function protype */
202 typedef int32_t (*Udma_ringQueueRawFxn)(Udma_DrvHandle drvHandle,
203 Udma_RingHandle ringHandle,
204 uint64_t phyDescMem);
205 /** \brief UDMA Ring flush raw function protype */
206 typedef int32_t (*Udma_ringFlushRawFxn)(Udma_DrvHandle drvHandle,
207 Udma_RingHandle ringHandle,
208 uint64_t *phyDescMem);
209 /** \brief UDMA Ring set Cfg function protype */
210 typedef void (*Udma_ringSetCfgFxn)(Udma_DrvHandle drvHandle,
211 Udma_RingHandle ringHandle,
212 const Udma_RingPrms *ringPrms);
213 /* @} */
215 /* ========================================================================== */
216 /* Structure Declarations */
217 /* ========================================================================== */
219 /**
220 * \brief UDMA initialization parameters.
221 *
222 * Requirement: DOX_REQ_TAG(PDK-2631)
223 */
224 typedef struct
225 {
226 uint32_t instId;
227 /**< [IN] \ref Udma_InstanceId */
229 Udma_RmInitPrms rmInitPrms;
230 /**< RM init parameters */
231 uint32_t skipRmOverlapCheck;
232 /**< Skips the resource overlap check - useful when running from pre-silicon
233 * environment as well as in production code when the resource overlap
234 * is already checked */
235 uint32_t skipGlobalEventReg;
236 /**< Skips the global event registeration for the handle. By default this
237 * is set to FALSE and application can use this common handle to set the
238 * master event to limit the number of IA/IR registration per core
239 * This can be set to TRUE to skip this registration as in the case
240 * of having multiple handles per core in usecases */
241 Udma_VirtToPhyFxn virtToPhyFxn;
242 /**< If not NULL, this function will be called to convert virtual address
243 * to physical address to be provided to UDMA.
244 * If NULL, the driver will assume a one-one mapping.
245 *
246 * Note: The init fxn will initialize this to the default one-one map
247 * function #Udma_defaultVirtToPhyFxn
248 */
249 Udma_PhyToVirtFxn phyToVirtFxn;
250 /**< If not NULL, this function will be called to convert physical address
251 * to virtual address to access the pointer returned by the UDMA.
252 * If NULL, the driver will assume a one-one mapping.
253 *
254 * Note: The init fxn will initialize this to the default one-one map
255 * function #Udma_defaultPhyToVirtFxn
256 */
257 Udma_PrintFxn printFxn;
258 /**< If not NULL, this function will be called to print debug/info message
259 * with appropriate string. */
261 Udma_OsalPrms osalPrms;
262 /**< OSAL callback parameters */
263 } Udma_InitPrms;
265 /* ========================================================================== */
266 /* Function Declarations */
267 /* ========================================================================== */
269 /**
270 * \brief UDMA init function.
271 *
272 * Initializes the UDMA drivers.
273 * This function should be called before calling any of driver API's and
274 * should be called only once.
275 *
276 * Requirement: DOX_REQ_TAG(PDK-2576)
277 *
278 * \param drvHandle [IN] UDMA driver handle - static memory needs to
279 * allocated by caller. This is used by the driver to
280 * maintain the driver states.
281 * This cannot be NULL.
282 * \param initPrms [IN] UDMA Initialization parameters.
283 * If NULL is passed, the default parameters will be
284 * assumed - address translation disabled.
285 *
286 * \return \ref Udma_ErrorCodes
287 */
288 int32_t Udma_init(Udma_DrvHandle drvHandle, const Udma_InitPrms *initPrms);
290 /**
291 * \brief UDMA deinit function.
292 *
293 * Uninitializes the drivers and the hardware and should be called during
294 * system shutdown. Should not be called if Udma_init() is not called.
295 *
296 * Requirement: DOX_REQ_TAG(PDK-2577)
297 *
298 * \param drvHandle [IN] UDMA driver handle pointer passed during
299 * #Udma_init
300 *
301 * \return \ref Udma_ErrorCodes
302 */
303 int32_t Udma_deinit(Udma_DrvHandle drvHandle);
305 /*
306 * Structure Init functions
307 *
308 * Requirement: DOX_REQ_TAG(PDK-2600)
309 */
310 /**
311 * \brief Udma_InitPrms structure init function.
312 *
313 * \param instId [IN] \ref Udma_InstanceId
314 * \param initPrms [IN] Pointer to #Udma_InitPrms structure.
315 *
316 */
317 void UdmaInitPrms_init(uint32_t instId, Udma_InitPrms *initPrms);
319 /* ========================================================================== */
320 /* Internal Function Declarations (Needed for other static inlines) */
321 /* ========================================================================== */
323 /**
324 * \brief Default virtual to physical translation function.
325 *
326 * \param virtAddr [IN] Virtual address
327 * \param chNum [IN] Channel number passed during channel open.
328 * Note: When called for functions which is not channel
329 * dependent (like ring alloc), this parameter will
330 * be set to #UDMA_DMA_CH_INVALID.
331 * \param appData [IN] Callback pointer passed during channel open.
332 * Note: When called for functions which is not channel
333 * dependent (like ring alloc), this parameter will
334 * be set to NULL.
335 *
336 * \return Corresponding physical address
337 */
338 static inline uint64_t Udma_defaultVirtToPhyFxn(const void *virtAddr,
339 uint32_t chNum,
340 void *appData);
342 /**
343 * \brief Default physical to virtual translation function.
344 *
345 * \param phyAddr [IN] Physical address
346 * \param chNum [IN] Channel number passed during channel open.
347 * Note: When called for functions which is not channel
348 * dependent (like ring alloc), this parameter will
349 * be set to #UDMA_DMA_CH_INVALID.
350 * \param appData [IN] Callback pointer passed during channel open.
351 * Note: When called for functions which is not channel
352 * dependent (like ring alloc), this parameter will
353 * be set to NULL.
354 *
355 * \return Corresponding virtual address
356 */
357 static inline void *Udma_defaultPhyToVirtFxn(uint64_t phyAddr,
358 uint32_t chNum,
359 void *appData);
361 /* ========================================================================== */
362 /* Static Function Definitions */
363 /* ========================================================================== */
365 static uint64_t Udma_defaultVirtToPhyFxn(const void *virtAddr,
366 uint32_t chNum,
367 void *appData)
368 {
369 return ((uint64_t) virtAddr);
370 }
372 static void *Udma_defaultPhyToVirtFxn(uint64_t phyAddr,
373 uint32_t chNum,
374 void *appData)
375 {
376 #if defined (__aarch64__)
377 uint64_t temp = phyAddr;
378 #else
379 /* R5 is 32-bit machine, need to truncate to avoid void * typecast error */
380 uint32_t temp = (uint32_t) phyAddr;
381 #endif
383 return ((void *) temp);
384 }
386 /* ========================================================================== */
387 /* Internal/Private Structure Declarations */
388 /* ========================================================================== */
390 /**
391 * \brief UDMA driver object.
392 *
393 * Note: This is an internal/private driver structure and should not be
394 * used or modified by caller.
395 */
396 struct Udma_DrvObj
397 {
398 uint32_t instType;
399 /**< Udma Instance Type */
400 uint32_t raType;
401 /**< Udma Ring Accelerator Type */
403 #if (UDMA_SOC_CFG_UDMAP_PRESENT == 1)
404 /*
405 * NAVSS instance parameters
406 */
407 CSL_UdmapCfg udmapRegs;
408 /**< UDMAP register configuration */
409 #endif
410 #if (UDMA_SOC_CFG_LCDMA_PRESENT == 1)
411 /*
412 * LCDMA DMSS specific instance parameters
413 */
414 CSL_BcdmaCfg bcdmaRegs;
415 /**< BCDMA register configuration */
416 CSL_PktdmaCfg pktdmaRegs;
417 /**< PKTDMA register configuration */
418 #endif
419 #if (UDMA_SOC_CFG_RA_NORMAL_PRESENT == 1)
420 CSL_RingAccCfg raRegs;
421 #endif
422 #if (UDMA_SOC_CFG_RA_LCDMA_PRESENT == 1)
423 CSL_LcdmaRingaccCfg lcdmaRaRegs;
424 #endif
425 /**< RA register configuration */
426 CSL_IntaggrCfg iaRegs;
427 /**< Interrupt Aggregator configuration */
428 #if (UDMA_NUM_UTC_INSTANCE > 0)
429 Udma_UtcInstInfo utcInfo[UDMA_NUM_UTC_INSTANCE];
430 /**< UTC instance information */
431 #endif
432 uint32_t udmapSrcThreadOffset;
433 /**< UDMAP Source/TX thread offset */
434 uint32_t udmapDestThreadOffset;
435 /**< UDMAP Dest/RX thread offset */
436 uint32_t maxRings;
437 /**< Maximun number of rings present in the NAVSS instance */
438 uint32_t maxProxy;
439 /**< Maximun number of proxy present in the NAVSS instance */
440 uint32_t maxRingMon;
441 /**< Maximun number of ring monitors present in the NAVSS instance */
443 #if (UDMA_SOC_CFG_PROXY_PRESENT == 1)
444 /*
445 * Proxy parameters
446 */
447 CSL_ProxyCfg proxyCfg;
448 /*< Proxy register configuration */
449 CSL_ProxyTargetParams proxyTargetRing;
450 /*< Proxy ring target register configuration */
451 uint32_t proxyTargetNumRing;
452 /*< Proxy ring target index */
453 #endif
455 #if (UDMA_SOC_CFG_CLEC_PRESENT == 1)
456 /*
457 * Clec parameters
458 */
459 CSL_CLEC_EVTRegs *clecRegs;
460 /**< CLEC baseaddress. */
461 uint32_t clecRtMap;
462 /**< Route map bit field - differs from core to core.
463 * Refer \ref CSL_ClecRouteMap. */
464 uint32_t clecOffset;
465 /**< GIC SPI to CLEC interrupt offset (they are not directly connected */
466 #endif
468 /*
469 * TISCI RM parameters
470 */
471 uint16_t devIdRing;
472 /**< Ring RM ID */
473 uint16_t devIdUdma;
474 /**< UDMA RM ID */
475 uint16_t devIdPsil;
476 /**< PSIL RM ID */
477 uint16_t devIdIa;
478 /**< IA RM ID */
479 #if (UDMA_SOC_CFG_PROXY_PRESENT == 1)
480 uint16_t devIdProxy;
481 /**< Proxy RM ID */
482 #endif
483 uint16_t devIdCore;
484 /**< Core RM ID */
485 #if (UDMA_NUM_UTC_INSTANCE > 0)
486 uint32_t druCoreId;
487 /**< DRU core ID register to use for direct TR submission.
488 * Each CPU should have a unique submit register to avoid corrupting
489 * submit word when SW is running from multiple CPU at the same time.
490 * Refer \ref Udma_DruSubmitCoreId */
491 #endif
492 uint16_t srcIdRingIrq;
493 /**< Ring completion event IRQ Source ID. */
494 uint32_t blkCopyRingIrqOffset;
495 /**< Block Copy channel ring completion event IRQ offset. */
496 uint32_t txRingIrqOffset;
497 /**< TX channel ring completion event IRQ offset. */
498 uint32_t rxRingIrqOffset;
499 /**< RX channel ring completion event IRQ offset. */
500 /* These IRQ offsets should be corresponding TISCI offset - ringNum Offset */
501 uint32_t blkCopyChOffset;
502 /**< Block Copy channel offset.
503 * blkCopyChOffset is used to support Config of BCDMA Block Copy channel using same Sciclient API.
504 *
505 * In case of BCDMA, the channels are spread across three MMR regions tchan, rchan, and bchan.
506 * So when blkCopyChOffset is added to index, the tx_ch_cfg API RM knows it’s a block copy channel
507 * and programs within the bchan MMR region. Otherwise the tx_ch_cfg API RM knows it’s a
508 * split tr tx channel and programs within the tchan MMR region.
509 *
510 * In case of UDMAP (type SOC's) blkCopyChOffset must be 0.*/
511 uint32_t txChOffset;
512 /**< TX channel offset. */
513 uint32_t extChOffset;
514 /**< External channel offset. */
515 uint32_t rxChOffset;
516 /**< RX channel offset. */
517 /*
518 * The driver allocates ringNum = chNum (for BlkCpoy)
519 = chNum + txChOffset (for SplitTR Tx)
520 = chNum + rxChOffset (for SplitTR Rx)
522 For CSL_bcdma* API's passed param ->channel_num = txChNum (for BlkCopy)
523 = txChNum + txChOffset (for SplitTR Tx)
524 = rxChNum + rxChOffset (for SplitTR Rx)
525 */
526 uint32_t iaGemOffset;
527 /**< IA global event map offset to differentiate between main and MCU NAVSS */
528 uint32_t trigGemOffset;
529 /**< UDMAP trigger global event map offset to differentiate between main
530 * and MCU NAVSS */
532 struct Udma_EventObj globalEventObj;
533 /**< Object to store global event. */
534 Udma_EventHandle globalEventHandle;
535 /**< Global event handle. */
537 Udma_InitPrms initPrms;
538 /**< Object to store the init params. */
539 uint32_t drvInitDone;
540 /**< Flag to check if the driver object is init properly or not. */
542 /*
543 * RM objects.
544 * This is a bitwise flag
545 * 1 - free, 0 - allocated
546 */
547 uint32_t blkCopyChFlag[UDMA_RM_BLK_COPY_CH_ARR_SIZE];
548 /**< UDMA Block copy channel allocation flag */
549 uint32_t blkCopyHcChFlag[UDMA_RM_BLK_COPY_HC_CH_ARR_SIZE];
550 /**< UDMA high capacity Block copy channel allocation flag */
551 uint32_t blkCopyUhcChFlag[UDMA_RM_BLK_COPY_UHC_CH_ARR_SIZE];
552 /**< UDMA ultra high capacity Block copy channel allocation flag */
554 uint32_t txChFlag[UDMA_RM_TX_CH_ARR_SIZE];
555 /**< UDMA TX channel allocation flag */
556 uint32_t txHcChFlag[UDMA_RM_TX_HC_CH_ARR_SIZE];
557 /**< UDMA high capacity TX channel allocation flag */
558 uint32_t txUhcChFlag[UDMA_RM_TX_UHC_CH_ARR_SIZE];
560 /**< UDMA ultra high capacity TX channel allocation flag */
561 uint32_t rxChFlag[UDMA_RM_RX_CH_ARR_SIZE];
562 /**< UDMA RX channel allocation flag */
563 uint32_t rxHcChFlag[UDMA_RM_RX_HC_CH_ARR_SIZE];
564 /**< UDMA high capacity RX channel allocation flag */
565 uint32_t rxUhcChFlag[UDMA_RM_RX_UHC_CH_ARR_SIZE];
566 /**< UDMA ultra high capacity RX channel allocation flag */
568 #if (UDMA_NUM_UTC_INSTANCE > 0)
569 uint32_t utcChFlag[UDMA_NUM_UTC_INSTANCE][UDMA_RM_UTC_CH_ARR_SIZE];
570 /**< UDMA external UTC channel allocation flag */
571 #endif
572 #if (UDMA_NUM_MAPPED_TX_GROUP > 0)
573 uint32_t mappedTxChFlag[UDMA_NUM_MAPPED_TX_GROUP][UDMA_RM_MAPPED_TX_CH_ARR_SIZE];
574 /**< UDMA mapped TX channel allocation flag */
575 #endif
576 #if (UDMA_NUM_MAPPED_RX_GROUP > 0)
577 uint32_t mappedRxChFlag[UDMA_NUM_MAPPED_RX_GROUP][UDMA_RM_MAPPED_RX_CH_ARR_SIZE];
578 /**< UDMA mapped RX channel allocation flag */
579 #endif
580 #if ((UDMA_NUM_MAPPED_TX_GROUP + UDMA_NUM_MAPPED_RX_GROUP) > 0)
581 uint32_t mappedRingFlag[UDMA_NUM_MAPPED_TX_GROUP + UDMA_NUM_MAPPED_RX_GROUP][UDMA_RM_MAPPED_RING_ARR_SIZE];
582 /**< UDMA mapped ring allocation flag */
583 #endif
585 uint32_t freeRingFlag[UDMA_RM_FREE_RING_ARR_SIZE];
586 /**< UDMA free ring allocation flag */
587 uint32_t freeFlowFlag[UDMA_RM_FREE_FLOW_ARR_SIZE];
588 /**< UDMA free flow allocation flag */
589 uint32_t globalEventFlag[UDMA_RM_GLOBAL_EVENT_ARR_SIZE];
590 /**< IA global event allocation flag */
591 uint32_t vintrFlag[UDMA_RM_VINTR_ARR_SIZE];
592 /**< IA VINTR allocation flag */
593 uint32_t coreIntrFlag[UDMA_RM_CORE_INTR_ARR_SIZE];
594 /**< Core interrupt allocation flag */
595 uint32_t proxyFlag[UDMA_RM_PROXY_ARR_SIZE];
596 /**< UDMA proxy allocation flag */
597 uint32_t ringMonFlag[UDMA_RM_RING_MON_ARR_SIZE];
598 /**< UDMA ring monitor allocation flag */
600 void *rmLock;
601 /**< Mutex to protect RM allocation. */
602 void *printLock;
603 /**< Mutex to protect print buffer. */
604 char printBuf[UDMA_CFG_PRINT_BUF_LEN];
605 /**< Print buffer */
607 /*
608 * UDMA Ring Local API's function pointers
609 * For Normal RA / LCDMA RA, these function pointers are used
610 * to call the appropriate function.
611 */
612 Udma_ringDequeueRawFxn ringDequeueRaw;
613 /**< UDMA Ring dequeue raw function pointer */
614 Udma_ringQueueRawFxn ringQueueRaw;
615 /**< UDMA Ring queue raw function pointer */
616 Udma_ringFlushRawFxn ringFlushRaw;
617 /**< UDMA Ring flush raw function pointer */
618 Udma_ringGetElementCntFxn ringGetElementCnt;
619 /**< UDMA Ring get element count function pointer */
620 Udma_ringGetMemPtrFxn ringGetMemPtr;
621 /**< UDMA Ring get mem pointer function pointer */
622 Udma_ringGetModeFxn ringGetMode;
623 /**< UDMA Ring get ring mode function pointer */
624 Udma_ringGetForwardRingOccFxn ringGetForwardRingOcc;
625 /**< UDMA Ring get forward ring occupancy function pointer */
626 Udma_ringGetReverseRingOccFxn ringGetReverseRingOcc;
627 /**< UDMA Ring get reverse ring occupancy function pointer */
628 Udma_ringGetWrIdxFxn ringGetWrIdx;
629 /**< UDMA Ring get write index value function pointer */
630 Udma_ringGetRdIdxFxn ringGetRdIdx;
631 /**< UDMA Ring get read index value function pointer */
632 Udma_ringPrimeFxn ringPrime;
633 /**< UDMA Ring prime function pointer */
634 Udma_ringPrimeReadFxn ringPrimeRead;
635 /**< UDMA Ring prime read function pointer */
636 Udma_ringSetDoorBellFxn ringSetDoorBell;
637 /**< UDMA Ring set doorbell function pointer */
638 Udma_ringSetCfgFxn ringSetCfg;
639 /**< UDMA Ring set Cfg function pointer */
640 Udma_ringHandleClearRegsFxn ringHandleClearRegs;
641 /**< UDMA Ring handle clear register function pointer */
642 };
644 #ifdef __cplusplus
645 }
646 #endif
648 #endif /* #ifndef UDMA_H_ */
650 /* @} */