[PDK-9595] UDMA UT: Added new testcase for Udma_eventEnable/Udma_eventDisable
[processor-sdk/pdk.git] / packages / ti / drv / udma / unit_test / udma_ut / src / udma_testcases.h
1 /*
2  *  Copyright (c) Texas Instruments Incorporated 2018
3  *
4  *  Redistribution and use in source and binary forms, with or without
5  *  modification, are permitted provided that the following conditions
6  *  are met:
7  *
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9  *    notice, this list of conditions and the following disclaimer.
10  *
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13  *    documentation and/or other materials provided with the
14  *    distribution.
15  *
16  *    Neither the name of Texas Instruments Incorporated nor the names of
17  *    its contributors may be used to endorse or promote products derived
18  *    from this software without specific prior written permission.
19  *
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31  */
33 /**
34  *  \file udma_testcases.h
35  *
36  *  \brief This file defines the test cases for UDMA UT.
37  */
39 #ifndef UDMA_TEST_CASES_H_
40 #define UDMA_TEST_CASES_H_
42 /* ========================================================================== */
43 /*                             Include Files                                  */
44 /* ========================================================================== */
46 #include <udma_test.h>
48 #ifdef __cplusplus
49 extern "C" {
50 #endif
52 /* ========================================================================== */
53 /*                           Macros & Typedefs                                */
54 /* ========================================================================== */
56 #define UDMA_TEST_NUM_TESTCASES         ((sizeof (gUdmaTestCases)) / \
57                                          (sizeof (UdmaTestParams)))
59 #ifndef KB
60 #define KB                              (1024U)
61 #endif
63 #ifndef MB
64 #define MB                              (KB * KB)
65 #endif
67 /* ========================================================================== */
68 /*                          Function Declarations                             */
69 /* ========================================================================== */
71 /* None */
73 /* ========================================================================== */
74 /*                            Global Variables                                */
75 /* ========================================================================== */
77 /** \brief Defines the various UDMA test cases. */
78 static UdmaTestParams gUdmaTestCases[] =
79 {
80     {
81         .enableTest = TEST_ENABLE,
82         .tcId       = 3467U,
83         .tcName     = UDMA_TEST_MAIN_BC_TCNAME_PREFIX "Blockcpy DDR to DDR in polling mode",
84         .disableInfo= NULL,
85         .printEnable= PRINT_ENABLE,
86         .prfEnable  = PRF_DISABLE,
87         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
88         .dcEnable   = DATA_CHECK_ENABLE,
89         .loopCnt    = USE_DEF_LP_CNT,
90         .numTasks   = 1U,
91         .testType   = {UDMA_TT_BLK_CPY},
92         .testFxnPtr = {&udmaTestBlkcpyTc},
93         .pacingTime = {PACING_NONE},
94         .numCh      = {1U},
95         .instId     = {UDMA_TEST_INST_ID_MAIN_BC},
96         .chPrmId    = {UDMA_TEST_CH_PRMID_DEF},
97         .qdepth     = {USE_DEF_QDEPTH},
98         .icnt       = {
99                         {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
100                       },
101         .dicnt      = {
102                         {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
103                       },
104         .dim        = {
105                         {0U, 0U, 0U}
106                       },
107         .ddim       = {
108                         {0U, 0U, 0U}
109                       },
110         .heapIdSrc  = {DEF_HEAP_ID},
111         .heapIdDest = {DEF_HEAP_ID},
112         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
113         .destBufSize= {UDMA_TEST_DEF_DICNT0},
114         .runFlag    = (UDMA_TEST_RF_MAIN_BC | UDMA_TEST_RF_CFG_DYN),
115         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
116     },
117     {
118         .enableTest = TEST_ENABLE,
119         .tcId       = 3473U,
120         .tcName     = UDMA_TEST_MAIN_BC_TCNAME_PREFIX "Blockcpy DDR to DDR in interrupt mode",
121         .disableInfo= NULL,
122         .printEnable= PRINT_ENABLE,
123         .prfEnable  = PRF_DISABLE,
124         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
125         .dcEnable   = DATA_CHECK_ENABLE,
126         .loopCnt    = USE_DEF_LP_CNT,
127         .numTasks   = 1U,
128         .testType   = {UDMA_TT_BLK_CPY},
129         .testFxnPtr = {&udmaTestBlkcpyTc},
130         .pacingTime = {PACING_NONE},
131         .numCh      = {1U},
132         .instId     = {UDMA_TEST_INST_ID_MAIN_BC},
133         .chPrmId    = {UDMA_TEST_CH_PRMID_INTR_DEF},
134         .qdepth     = {USE_DEF_QDEPTH},
135         .icnt       = {
136                         {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
137                       },
138         .dicnt      = {
139                         {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
140                       },
141         .dim        = {
142                         {0U, 0U, 0U}
143                       },
144         .ddim       = {
145                         {0U, 0U, 0U}
146                       },
147         .heapIdSrc  = {DEF_HEAP_ID},
148         .heapIdDest = {DEF_HEAP_ID},
149         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
150         .destBufSize= {UDMA_TEST_DEF_DICNT0},
151         .runFlag    = (UDMA_TEST_RF_MAIN_BC | UDMA_TEST_RF_CFG_DYN),
152         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
153     },
154 #if (UDMA_SOC_CFG_UDMAP_PRESENT == 1)
155     {
156         .enableTest = TEST_ENABLE,
157         .tcId       = 3474U,
158         .tcName     = UDMA_TEST_MCU_BC_TCNAME_PREFIX "Blockcpy DDR to DDR in polling mode",
159         .disableInfo= NULL,
160         .printEnable= PRINT_ENABLE,
161         .prfEnable  = PRF_DISABLE,
162         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
163         .dcEnable   = DATA_CHECK_ENABLE,
164         .loopCnt    = USE_DEF_LP_CNT,
165         .numTasks   = 1U,
166         .testType   = {UDMA_TT_BLK_CPY},
167         .testFxnPtr = {&udmaTestBlkcpyTc},
168         .pacingTime = {PACING_NONE},
169         .numCh      = {1U},
170         .instId     = {UDMA_TEST_INST_ID_MCU_BC},
171         .chPrmId    = {UDMA_TEST_CH_PRMID_DEF},
172         .qdepth     = {USE_DEF_QDEPTH},
173         .icnt       = {
174                         {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
175                       },
176         .dicnt      = {
177                         {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
178                       },
179         .dim        = {
180                         {0U, 0U, 0U}
181                       },
182         .ddim       = {
183                         {0U, 0U, 0U}
184                       },
185         .heapIdSrc  = {DEF_HEAP_ID},
186         .heapIdDest = {DEF_HEAP_ID},
187         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
188         .destBufSize= {UDMA_TEST_DEF_DICNT0},
189         .runFlag    = (UDMA_TEST_RF_MCU_BC | UDMA_TEST_RF_CFG_DYN),
190         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
191     },
192     {
193         .enableTest = TEST_ENABLE,
194         .tcId       = 3475U,
195         .tcName     = UDMA_TEST_MCU_BC_TCNAME_PREFIX "Blockcpy DDR to DDR",
196         .disableInfo= NULL,
197         .printEnable= PRINT_ENABLE,
198         .prfEnable  = PRF_DISABLE,
199         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
200         .dcEnable   = DATA_CHECK_ENABLE,
201         .loopCnt    = USE_DEF_LP_CNT,
202         .numTasks   = 1U,
203         .testType   = {UDMA_TT_BLK_CPY},
204         .testFxnPtr = {&udmaTestBlkcpyTc},
205         .pacingTime = {PACING_NONE},
206         .numCh      = {1U},
207         .instId     = {UDMA_TEST_INST_ID_MCU_BC},
208         .chPrmId    = {UDMA_TEST_CH_PRMID_INTR_DEF},
209         .qdepth     = {USE_DEF_QDEPTH},
210         .icnt       = {
211                         {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
212                       },
213         .dicnt      = {
214                         {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
215                       },
216         .dim        = {
217                         {0U, 0U, 0U}
218                       },
219         .ddim       = {
220                         {0U, 0U, 0U}
221                       },
222         .heapIdSrc  = {DEF_HEAP_ID},
223         .heapIdDest = {DEF_HEAP_ID},
224         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
225         .destBufSize= {UDMA_TEST_DEF_DICNT0},
226         .runFlag    = (UDMA_TEST_RF_MCU_BC | UDMA_TEST_RF_CFG_DYN),
227         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
228     },
229 #endif /* #if (UDMA_SOC_CFG_UDMAP_PRESENT == 1) */
230     {
231         .enableTest = TEST_ENABLE,
232         .tcId       = 3476U,
233         .tcName     = UDMA_TEST_MAIN_BC_TCNAME_PREFIX "Blockcpy DDR to DDR SW global 0 trigger test in polling mode",
234         .disableInfo= NULL,
235         .printEnable= PRINT_ENABLE,
236         .prfEnable  = PRF_DISABLE,
237         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
238         .dcEnable   = DATA_CHECK_ENABLE,
239         .loopCnt    = USE_DEF_LP_CNT,
240         .numTasks   = 1U,
241         .testType   = {UDMA_TT_BLK_CPY},
242         .testFxnPtr = {&udmaTestBlkcpyTc},
243         .pacingTime = {PACING_NONE},
244         .numCh      = {1U},
245         .instId     = {UDMA_TEST_INST_ID_MAIN_BC},
246         .chPrmId    = {UDMA_TEST_CH_PRMID_TRIGGER_GLOBAL0},
247         .qdepth     = {USE_DEF_QDEPTH},
248         .icnt       = {
249                         {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
250                       },
251         .dicnt      = {
252                         {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
253                       },
254         .dim        = {
255                         {0U, 0U, 0U}
256                       },
257         .ddim       = {
258                         {0U, 0U, 0U}
259                       },
260         .heapIdSrc  = {DEF_HEAP_ID},
261         .heapIdDest = {DEF_HEAP_ID},
262         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
263         .destBufSize= {UDMA_TEST_DEF_DICNT0},
264         .runFlag    = (UDMA_TEST_RF_MAIN_BC | UDMA_TEST_RF_CFG_DYN),
265         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
266     },
267     {
268         .enableTest = TEST_ENABLE,
269         .tcId       = 3477U,
270         .tcName     = UDMA_TEST_MAIN_BC_TCNAME_PREFIX "Blockcpy DDR to DDR SW global 0 trigger test in interrupt mode",
271         .disableInfo= NULL,
272         .printEnable= PRINT_ENABLE,
273         .prfEnable  = PRF_DISABLE,
274         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
275         .dcEnable   = DATA_CHECK_ENABLE,
276         .loopCnt    = USE_DEF_LP_CNT,
277         .numTasks   = 1U,
278         .testType   = {UDMA_TT_BLK_CPY},
279         .testFxnPtr = {&udmaTestBlkcpyTc},
280         .pacingTime = {PACING_NONE},
281         .numCh      = {1U},
282         .instId     = {UDMA_TEST_INST_ID_MAIN_BC},
283         .chPrmId    = {UDMA_TEST_CH_PRMID_TRIGGER_GLOBAL0_INTR},
284         .qdepth     = {USE_DEF_QDEPTH},
285         .icnt       = {
286                         {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
287                       },
288         .dicnt      = {
289                         {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
290                       },
291         .dim        = {
292                         {0U, 0U, 0U}
293                       },
294         .ddim       = {
295                         {0U, 0U, 0U}
296                       },
297         .heapIdSrc  = {DEF_HEAP_ID},
298         .heapIdDest = {DEF_HEAP_ID},
299         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
300         .destBufSize= {UDMA_TEST_DEF_DICNT0},
301         .runFlag    = (UDMA_TEST_RF_MAIN_BC),
302         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
303     },
304 #if (UDMA_SOC_CFG_UDMAP_PRESENT == 1)
305     {
306         .enableTest = TEST_ENABLE,
307         .tcId       = 3478U,
308         .tcName     = UDMA_TEST_MCU_BC_TCNAME_PREFIX "Blockcpy DDR to DDR SW global 0 trigger test in polling mode",
309         .disableInfo= NULL,
310         .printEnable= PRINT_ENABLE,
311         .prfEnable  = PRF_DISABLE,
312         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
313         .dcEnable   = DATA_CHECK_ENABLE,
314         .loopCnt    = USE_DEF_LP_CNT,
315         .numTasks   = 1U,
316         .testType   = {UDMA_TT_BLK_CPY},
317         .testFxnPtr = {&udmaTestBlkcpyTc},
318         .pacingTime = {PACING_NONE},
319         .numCh      = {1U},
320         .instId     = {UDMA_TEST_INST_ID_MCU_BC},
321         .chPrmId    = {UDMA_TEST_CH_PRMID_TRIGGER_GLOBAL0},
322         .qdepth     = {USE_DEF_QDEPTH},
323         .icnt       = {
324                         {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
325                       },
326         .dicnt      = {
327                         {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
328                       },
329         .dim        = {
330                         {0U, 0U, 0U}
331                       },
332         .ddim       = {
333                         {0U, 0U, 0U}
334                       },
335         .heapIdSrc  = {DEF_HEAP_ID},
336         .heapIdDest = {DEF_HEAP_ID},
337         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
338         .destBufSize= {UDMA_TEST_DEF_DICNT0},
339         .runFlag    = (UDMA_TEST_RF_MCU_BC),
340         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
341     },
342     {
343         .enableTest = TEST_ENABLE,
344         .tcId       = 3479U,
345         .tcName     = UDMA_TEST_MCU_BC_TCNAME_PREFIX "Blockcpy DDR to DDR SW global 0 trigger test",
346         .disableInfo= NULL,
347         .printEnable= PRINT_ENABLE,
348         .prfEnable  = PRF_DISABLE,
349         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
350         .dcEnable   = DATA_CHECK_ENABLE,
351         .loopCnt    = USE_DEF_LP_CNT,
352         .numTasks   = 1U,
353         .testType   = {UDMA_TT_BLK_CPY},
354         .testFxnPtr = {&udmaTestBlkcpyTc},
355         .pacingTime = {PACING_NONE},
356         .numCh      = {1U},
357         .instId     = {UDMA_TEST_INST_ID_MCU_BC},
358         .chPrmId    = {UDMA_TEST_CH_PRMID_TRIGGER_GLOBAL0_INTR},
359         .qdepth     = {USE_DEF_QDEPTH},
360         .icnt       = {
361                         {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
362                       },
363         .dicnt      = {
364                         {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
365                       },
366         .dim        = {
367                         {0U, 0U, 0U}
368                       },
369         .ddim       = {
370                         {0U, 0U, 0U}
371                       },
372         .heapIdSrc  = {DEF_HEAP_ID},
373         .heapIdDest = {DEF_HEAP_ID},
374         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
375         .destBufSize= {UDMA_TEST_DEF_DICNT0},
376         .runFlag    = (UDMA_TEST_RF_MCU_BC),
377         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
378     },
379 #endif /* #if (UDMA_SOC_CFG_UDMAP_PRESENT == 1) */
380     {
381         .enableTest = TEST_ENABLE,
382         .tcId       = 3480U,
383         .tcName     = UDMA_TEST_MCU_BC_TCNAME_PREFIX "Blockcpy circular 1KB DDR to DDR 1KB ICNT1 TR event type test",
384         .disableInfo= NULL,
385         .printEnable= PRINT_ENABLE,
386         .prfEnable  = PRF_DISABLE,
387         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
388         .dcEnable   = DATA_CHECK_ENABLE,
389         .loopCnt    = 1U,
390         .numTasks   = 1U,
391         .testType   = {UDMA_TT_BLK_CPY},
392         .testFxnPtr = {&udmaTestBlkcpyTc},
393         .pacingTime = {PACING_NONE},
394         .numCh      = {1U},
395         .instId     = {UDMA_TEST_INST_ID_MCU_BC},
396         .chPrmId    = {UDMA_TEST_CH_PRMID_EVENTSIZE_ICNT1},
397         .qdepth     = {USE_DEF_QDEPTH},
398         .icnt       = {
399                         {1*KB, 1U, 1U, 1U}
400                       },
401         .dicnt      = {
402                         {1*KB, 1U, 1U, 1U}
403                       },
404         .dim        = {
405                         {0U, 0U, 0U}
406                       },
407         .ddim       = {
408                         {1*KB, 0U, 0U}
409                       },
410         .heapIdSrc  = {DEF_HEAP_ID},
411         .heapIdDest = {DEF_HEAP_ID},
412         .srcBufSize = {1*KB},
413         .destBufSize= {1*KB},
414         .runFlag    = (UDMA_TEST_RF_MCU_BC),
415         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
416     },
417     {
418         .enableTest = TEST_ENABLE,
419         .tcId       = 3481U,
420         .tcName     = UDMA_TEST_MCU_BC_TCNAME_PREFIX "Blockcpy circular 1KB DDR to DDR 1MB ICNT2 TR event type test",
421         .disableInfo= NULL,
422         .printEnable= PRINT_ENABLE,
423         .prfEnable  = PRF_DISABLE,
424         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
425         .dcEnable   = DATA_CHECK_ENABLE,
426         .loopCnt    = 1U,
427         .numTasks   = 1U,
428         .testType   = {UDMA_TT_BLK_CPY},
429         .testFxnPtr = {&udmaTestBlkcpyTc},
430         .pacingTime = {PACING_NONE},
431         .numCh      = {1U},
432         .instId     = {UDMA_TEST_INST_ID_MCU_BC},
433         .chPrmId    = {UDMA_TEST_CH_PRMID_EVENTSIZE_ICNT2},
434         .qdepth     = {USE_DEF_QDEPTH},
435         .icnt       = {
436                         {1*KB, 1U, 1*KB, 1U}
437                       },
438         .dicnt      = {
439                         {1*KB, 1U, 1*KB, 1U}
440                       },
441         .dim        = {
442                         {0U, 0U, 0U}
443                       },
444         .ddim       = {
445                         {1*KB, 1*KB, 0U}
446                       },
447         .heapIdSrc  = {DEF_HEAP_ID},
448         .heapIdDest = {DEF_HEAP_ID},
449         .srcBufSize = {1*KB},
450         .destBufSize= {1*MB},
451         .runFlag    = (UDMA_TEST_RF_MCU_BC),
452         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
453     },
454     {
455         .enableTest = TEST_ENABLE,
456         .tcId       = 3482U,
457         .tcName     = UDMA_TEST_MCU_BC_TCNAME_PREFIX "Blockcpy circular 1KB DDR to DDR 1MB ICNT3 TR event type test",
458         .disableInfo= NULL,
459         .printEnable= PRINT_ENABLE,
460         .prfEnable  = PRF_DISABLE,
461         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
462         .dcEnable   = DATA_CHECK_ENABLE,
463         .loopCnt    = 1U,
464         .numTasks   = 1U,
465         .testType   = {UDMA_TT_BLK_CPY},
466         .testFxnPtr = {&udmaTestBlkcpyTc},
467         .pacingTime = {PACING_NONE},
468         .numCh      = {1U},
469         .instId     = {UDMA_TEST_INST_ID_MCU_BC},
470         .chPrmId    = {UDMA_TEST_CH_PRMID_EVENTSIZE_ICNT3},
471         .qdepth     = {USE_DEF_QDEPTH},
472         .icnt       = {
473                         {1*KB, 1U, 1*KB, 1U}
474                       },
475         .dicnt      = {
476                         {1*KB, 1U, 1*KB, 1U}
477                       },
478         .dim        = {
479                         {0U, 0U, 0U}
480                       },
481         .ddim       = {
482                         {1*KB, 1*KB, 0U}
483                       },
484         .heapIdSrc  = {DEF_HEAP_ID},
485         .heapIdDest = {DEF_HEAP_ID},
486         .srcBufSize = {1*KB},
487         .destBufSize= {1*MB},
488         .runFlag    = (UDMA_TEST_RF_MCU_BC),
489         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
490     },
491     {
492         .enableTest = TEST_ENABLE,
493         .tcId       = 3516U,
494         .tcName     = UDMA_TEST_MAIN_BC_TCNAME_PREFIX "Blockcpy MSMC to MSMC in interrupt mode",
495         .disableInfo= NULL,
496         .printEnable= PRINT_ENABLE,
497         .prfEnable  = PRF_DISABLE,
498         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
499         .dcEnable   = DATA_CHECK_ENABLE,
500         .loopCnt    = USE_DEF_LP_CNT,
501         .numTasks   = 1U,
502         .testType   = {UDMA_TT_BLK_CPY},
503         .testFxnPtr = {&udmaTestBlkcpyTc},
504         .pacingTime = {PACING_NONE},
505         .numCh      = {1U},
506         .instId     = {UDMA_TEST_INST_ID_MAIN_BC},
507         .chPrmId    = {UDMA_TEST_CH_PRMID_INTR_DEF},
508         .qdepth     = {USE_DEF_QDEPTH},
509         .icnt       = {
510                         {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
511                       },
512         .dicnt      = {
513                         {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
514                       },
515         .dim        = {
516                         {0U, 0U, 0U}
517                       },
518         .ddim       = {
519                         {0U, 0U, 0U}
520                       },
521         .heapIdSrc  = {UTILS_MEM_HEAP_ID_MSMC},
522         .heapIdDest = {UTILS_MEM_HEAP_ID_MSMC},
523         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
524         .destBufSize= {UDMA_TEST_DEF_DICNT0},
525         .runFlag    = (UDMA_TEST_RF_MAIN_BC),
526         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
527     },
528 #if (UDMA_SOC_CFG_UDMAP_PRESENT == 1)
529     {
530         .enableTest = TEST_ENABLE,
531         .tcId       = 3483U,
532         .tcName     = UDMA_TEST_MCU_BC_TCNAME_PREFIX "Blockcpy MSMC to MSMC in interrupt mode",
533         .disableInfo= NULL,
534         .printEnable= PRINT_ENABLE,
535         .prfEnable  = PRF_DISABLE,
536         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
537         .dcEnable   = DATA_CHECK_ENABLE,
538         .loopCnt    = USE_DEF_LP_CNT,
539         .numTasks   = 1U,
540         .testType   = {UDMA_TT_BLK_CPY},
541         .testFxnPtr = {&udmaTestBlkcpyTc},
542         .pacingTime = {PACING_NONE},
543         .numCh      = {1U},
544         .instId     = {UDMA_TEST_INST_ID_MCU_BC},
545         .chPrmId    = {UDMA_TEST_CH_PRMID_INTR_DEF},
546         .qdepth     = {USE_DEF_QDEPTH},
547         .icnt       = {
548                         {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
549                       },
550         .dicnt      = {
551                         {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
552                       },
553         .dim        = {
554                         {0U, 0U, 0U}
555                       },
556         .ddim       = {
557                         {0U, 0U, 0U}
558                       },
559         .heapIdSrc  = {UTILS_MEM_HEAP_ID_MSMC},
560         .heapIdDest = {UTILS_MEM_HEAP_ID_MSMC},
561         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
562         .destBufSize= {UDMA_TEST_DEF_DICNT0},
563         .runFlag    = (UDMA_TEST_RF_MCU_BC),
564         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
565     },
566 #endif /* #if (UDMA_SOC_CFG_UDMAP_PRESENT == 1) */
567 #if (UDMA_TEST_SOC_OCMC_MEM_PRESENT == 1) 
568     {
569         .enableTest = TEST_ENABLE,
570         .tcId       = 3484U,
571         .tcName     = UDMA_TEST_MCU_BC_TCNAME_PREFIX "Blockcpy OCMC to OCMC in interrupt mode",
572         .disableInfo= NULL,
573         .printEnable= PRINT_ENABLE,
574         .prfEnable  = PRF_DISABLE,
575         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
576         .dcEnable   = DATA_CHECK_ENABLE,
577         .loopCnt    = USE_DEF_LP_CNT,
578         .numTasks   = 1U,
579         .testType   = {UDMA_TT_BLK_CPY},
580         .testFxnPtr = {&udmaTestBlkcpyTc},
581         .pacingTime = {PACING_NONE},
582         .numCh      = {1U},
583         .instId     = {UDMA_TEST_INST_ID_MCU_BC},
584         .chPrmId    = {UDMA_TEST_CH_PRMID_INTR_DEF},
585         .qdepth     = {USE_DEF_QDEPTH},
586         .icnt       = {
587                         {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
588                       },
589         .dicnt      = {
590                         {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
591                       },
592         .dim        = {
593                         {0U, 0U, 0U}
594                       },
595         .ddim       = {
596                         {0U, 0U, 0U}
597                       },
598         .heapIdSrc  = {UTILS_MEM_HEAP_ID_INTERNAL},
599         .heapIdDest = {UTILS_MEM_HEAP_ID_INTERNAL},
600         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
601         .destBufSize= {UDMA_TEST_DEF_DICNT0},
602         .runFlag    = (UDMA_TEST_RF_MCU_BC_INTERNAL_MEM),
603         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
604     },
605 #endif /*#if (UDMA_TEST_SOC_OCMC_MEM_PRESENT == 1)  */
606 #ifndef UDMA_TEST_SOC_PRESILICON
607     {
608         .enableTest = TEST_ENABLE,
609         .tcId       = 3485U,
610         .tcName     = UDMA_TEST_MAIN_BC_TCNAME_PREFIX "Blockcpy DDR 1MB to DDR 1MB performance test",
611         .disableInfo= NULL,
612         .printEnable= PRINT_ENABLE,
613         .prfEnable  = PRF_ENABLE,
614         .tcType     = (UDMA_TCT_FULL | UDMA_TCT_FUNCTIONAL | UDMA_TCT_PERFORMANCE),
615         .dcEnable   = DATA_CHECK_DISABLE,
616         .loopCnt    = UDMA_TEST_PERF_LOOP_CNT,
617         .numTasks   = 1U,
618         .testType   = {UDMA_TT_BLK_CPY},
619         .testFxnPtr = {&udmaTestBlkcpyTc},
620         .pacingTime = {PACING_NONE},
621         .numCh      = {1U},
622         .instId     = {UDMA_TEST_INST_ID_MAIN_BC},
623         .chPrmId    = {UDMA_TEST_CH_PRMID_INTR_DEF},
624         .qdepth     = {UDMA_TEST_PERF_QDEPTH},
625         .icnt       = {
626                         {1*KB, 1U, 1*KB, 1U},
627                       },
628         .dicnt      = {
629                         {1*KB, 1U, 1*KB, 1U},
630                       },
631         .dim        = {
632                         {1*KB, 1*KB, 0U},
633                       },
634         .ddim       = {
635                         {1*KB, 1*KB, 0U},
636                       },
637         .heapIdSrc  = {UTILS_MEM_HEAP_ID_DDR},
638         .heapIdDest = {UTILS_MEM_HEAP_ID_DDR},
639         .srcBufSize = {1*MB},
640         .destBufSize= {1*MB},
641         .runFlag    = (UDMA_TEST_RF_MAIN_BC),
642         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
643     },
644     {
645         .enableTest = TEST_ENABLE,
646         .tcId       = 3486U,
647         .tcName     = UDMA_TEST_MAIN_BC_TCNAME_PREFIX "2D Blockcpy MSMC circular 1KB to DDR 1MB performance test",
648         .disableInfo= NULL,
649         .printEnable= PRINT_ENABLE,
650         .prfEnable  = PRF_ENABLE,
651         .tcType     = (UDMA_TCT_FULL | UDMA_TCT_FUNCTIONAL | UDMA_TCT_PERFORMANCE),
652         .dcEnable   = DATA_CHECK_DISABLE,
653         .loopCnt    = UDMA_TEST_PERF_LOOP_CNT,
654         .numTasks   = 1U,
655         .testType   = {UDMA_TT_BLK_CPY},
656         .testFxnPtr = {&udmaTestBlkcpyTc},
657         .pacingTime = {PACING_NONE},
658         .numCh      = {1U},
659         .instId     = {UDMA_TEST_INST_ID_MAIN_BC},
660         .chPrmId    = {UDMA_TEST_CH_PRMID_INTR_DEF},
661         .qdepth     = {UDMA_TEST_DEF_QDEPTH},
662         .icnt       = {
663                         {1*KB, 1U, 1*KB, 1U}
664                       },
665         .dicnt      = {
666                         {1*KB, 1U, 1*KB, 1U}
667                       },
668         .dim        = {
669                         {0U, 0U, 0U}
670                       },
671         .ddim       = {
672                         {1*KB, 1*KB, 0U}
673                       },
674         .heapIdSrc  = {UTILS_MEM_HEAP_ID_MSMC},
675         .heapIdDest = {UTILS_MEM_HEAP_ID_DDR},
676         .srcBufSize = {1*KB},
677         .destBufSize= {1*MB},
678         .runFlag    = (UDMA_TEST_RF_MAIN_BC),
679         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
680     },
681     {
682         .enableTest = TEST_ENABLE,
683         .tcId       = 3487U,
684         .tcName     = UDMA_TEST_MAIN_BC_TCNAME_PREFIX "2D Blockcpy DDR 1MB to MSMC circular 1KB performance test",
685         .disableInfo= NULL,
686         .printEnable= PRINT_ENABLE,
687         .prfEnable  = PRF_ENABLE,
688         .tcType     = (UDMA_TCT_FULL | UDMA_TCT_FUNCTIONAL | UDMA_TCT_PERFORMANCE),
689         .dcEnable   = DATA_CHECK_DISABLE,
690         .loopCnt    = UDMA_TEST_PERF_LOOP_CNT,
691         .numTasks   = 1U,
692         .testType   = {UDMA_TT_BLK_CPY},
693         .testFxnPtr = {&udmaTestBlkcpyTc},
694         .pacingTime = {PACING_NONE},
695         .numCh      = {1U},
696         .instId     = {UDMA_TEST_INST_ID_MAIN_BC},
697         .chPrmId    = {UDMA_TEST_CH_PRMID_INTR_DEF},
698         .qdepth     = {UDMA_TEST_DEF_QDEPTH},
699         .icnt       = {
700                         {1*KB, 1U, 1*KB, 1U}
701                       },
702         .dicnt      = {
703                         {1*KB, 1U, 1*KB, 1U}
704                       },
705         .dim        = {
706                         {1*KB, 1*KB, 0U}
707                       },
708         .ddim       = {
709                         {0U, 0U, 0U}
710                       },
711         .heapIdSrc  = {UTILS_MEM_HEAP_ID_DDR},
712         .heapIdDest = {UTILS_MEM_HEAP_ID_MSMC},
713         .srcBufSize = {1*MB},
714         .destBufSize= {1*KB},
715         .runFlag    = (UDMA_TEST_RF_MAIN_BC),
716         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
717     },
718     {
719         .enableTest = TEST_ENABLE,
720         .tcId       = 3488U,
721         .tcName     = UDMA_TEST_MAIN_BC_TCNAME_PREFIX "2D Blockcpy MSMC circular 1KB to MSMC circular 1KB performance test",
722         .disableInfo= NULL,
723         .printEnable= PRINT_ENABLE,
724         .prfEnable  = PRF_ENABLE,
725         .tcType     = (UDMA_TCT_FULL | UDMA_TCT_FUNCTIONAL | UDMA_TCT_PERFORMANCE),
726         .dcEnable   = DATA_CHECK_DISABLE,
727         .loopCnt    = UDMA_TEST_PERF_LOOP_CNT,
728         .numTasks   = 1U,
729         .testType   = {UDMA_TT_BLK_CPY},
730         .testFxnPtr = {&udmaTestBlkcpyTc},
731         .pacingTime = {PACING_NONE},
732         .numCh      = {1U},
733         .instId     = {UDMA_TEST_INST_ID_MAIN_BC},
734         .chPrmId    = {UDMA_TEST_CH_PRMID_INTR_DEF},
735         .qdepth     = {UDMA_TEST_DEF_QDEPTH},
736         .icnt       = {
737                         {1*KB, 1U, 1*KB, 1U}
738                       },
739         .dicnt      = {
740                         {1*KB, 1U, 1*KB, 1U}
741                       },
742         .dim        = {
743                         {0U, 0U, 0U}
744                       },
745         .ddim       = {
746                         {0U, 0U, 0U}
747                       },
748         .heapIdSrc  = {UTILS_MEM_HEAP_ID_MSMC},
749         .heapIdDest = {UTILS_MEM_HEAP_ID_MSMC},
750         .srcBufSize = {1*KB},
751         .destBufSize= {1*KB},
752         .runFlag    = (UDMA_TEST_RF_MAIN_BC),
753         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
754     },
755 #if (UDMA_TEST_SOC_OCMC_MEM_PRESENT == 1) 
756     {
757         .enableTest = TEST_ENABLE,
758         .tcId       = 3489U,
759         .tcName     = UDMA_TEST_MCU_BC_TCNAME_PREFIX "2D Blockcpy OCMC circular 1KB to OCMC circular 1KB performance test",
760         .disableInfo= NULL,
761         .printEnable= PRINT_ENABLE,
762         .prfEnable  = PRF_ENABLE,
763         .tcType     = (UDMA_TCT_FULL | UDMA_TCT_FUNCTIONAL | UDMA_TCT_PERFORMANCE),
764         .dcEnable   = DATA_CHECK_DISABLE,
765         .loopCnt    = UDMA_TEST_PERF_LOOP_CNT,
766         .numTasks   = 1U,
767         .testType   = {UDMA_TT_BLK_CPY},
768         .testFxnPtr = {&udmaTestBlkcpyTc},
769         .pacingTime = {PACING_NONE},
770         .numCh      = {1U},
771         .instId     = {UDMA_TEST_INST_ID_MCU_BC},
772         .chPrmId    = {UDMA_TEST_CH_PRMID_INTR_DEF},
773         .qdepth     = {UDMA_TEST_DEF_QDEPTH},
774         .icnt       = {
775                         {1*KB, 1U, 1*KB, 1U}
776                       },
777         .dicnt      = {
778                         {1*KB, 1U, 1*KB, 1U}
779                       },
780         .dim        = {
781                         {0U, 0U, 0U}
782                       },
783         .ddim       = {
784                         {0U, 0U, 0U}
785                       },
786         .heapIdSrc  = {UTILS_MEM_HEAP_ID_INTERNAL},
787         .heapIdDest = {UTILS_MEM_HEAP_ID_INTERNAL},
788         .srcBufSize = {1*KB},
789         .destBufSize= {1*KB},
790         .runFlag    = (UDMA_TEST_RF_MCU_BC_INTERNAL_MEM),
791         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
792     },
793 #endif /* #if (UDMA_TEST_SOC_OCMC_MEM_PRESENT == 1)  */
794 #if (UDMA_SOC_CFG_UDMAP_PRESENT == 1)
795     {
796         .enableTest = TEST_ENABLE,
797         .tcId       = 3490U,
798         .tcName     = UDMA_TEST_MCU_BC_TCNAME_PREFIX "Blockcpy DDR 1MB to DDR 1MB performance test",
799         .disableInfo= NULL,
800         .printEnable= PRINT_ENABLE,
801         .prfEnable  = PRF_ENABLE,
802         .tcType     = (UDMA_TCT_FULL | UDMA_TCT_FUNCTIONAL | UDMA_TCT_PERFORMANCE),
803         .dcEnable   = DATA_CHECK_DISABLE,
804         .loopCnt    = UDMA_TEST_PERF_LOOP_CNT,
805         .numTasks   = 1U,
806         .testType   = {UDMA_TT_BLK_CPY},
807         .testFxnPtr = {&udmaTestBlkcpyTc},
808         .pacingTime = {PACING_NONE},
809         .numCh      = {1U},
810         .instId     = {UDMA_TEST_INST_ID_MCU_BC},
811         .chPrmId    = {UDMA_TEST_CH_PRMID_INTR_DEF},
812         .qdepth     = {UDMA_TEST_PERF_QDEPTH},
813         .icnt       = {
814                         {1*KB, 1U, 1*KB, 1U},
815                       },
816         .dicnt      = {
817                         {1*KB, 1U, 1*KB, 1U},
818                       },
819         .dim        = {
820                         {1*KB, 1*KB, 0U},
821                       },
822         .ddim       = {
823                         {1*KB, 1*KB, 0U},
824                       },
825         .heapIdSrc  = {UTILS_MEM_HEAP_ID_DDR},
826         .heapIdDest = {UTILS_MEM_HEAP_ID_DDR},
827         .srcBufSize = {1*MB},
828         .destBufSize= {1*MB},
829         .runFlag    = (UDMA_TEST_RF_MCU_BC),
830         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
831     },
832     {
833         .enableTest = TEST_ENABLE,
834         .tcId       = 3491U,
835         .tcName     = UDMA_TEST_MCU_BC_TCNAME_PREFIX "2D Blockcpy MSMC circular 1KB to DDR 1MB performance test",
836         .disableInfo= NULL,
837         .printEnable= PRINT_ENABLE,
838         .prfEnable  = PRF_ENABLE,
839         .tcType     = (UDMA_TCT_FULL | UDMA_TCT_FUNCTIONAL | UDMA_TCT_PERFORMANCE),
840         .dcEnable   = DATA_CHECK_DISABLE,
841         .loopCnt    = UDMA_TEST_PERF_LOOP_CNT,
842         .numTasks   = 1U,
843         .testType   = {UDMA_TT_BLK_CPY},
844         .testFxnPtr = {&udmaTestBlkcpyTc},
845         .pacingTime = {PACING_NONE},
846         .numCh      = {1U},
847         .instId     = {UDMA_TEST_INST_ID_MCU_BC},
848         .chPrmId    = {UDMA_TEST_CH_PRMID_INTR_DEF},
849         .qdepth     = {UDMA_TEST_DEF_QDEPTH},
850         .icnt       = {
851                         {1*KB, 1U, 1*KB, 1U}
852                       },
853         .dicnt      = {
854                         {1*KB, 1U, 1*KB, 1U}
855                       },
856         .dim        = {
857                         {0U, 0U, 0U}
858                       },
859         .ddim       = {
860                         {1*KB, 1*KB, 0U}
861                       },
862         .heapIdSrc  = {UTILS_MEM_HEAP_ID_MSMC},
863         .heapIdDest = {UTILS_MEM_HEAP_ID_DDR},
864         .srcBufSize = {1*KB},
865         .destBufSize= {1*MB},
866         .runFlag    = (UDMA_TEST_RF_MCU_BC),
867         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
868     },
869     {
870         .enableTest = TEST_ENABLE,
871         .tcId       = 3492U,
872         .tcName     = UDMA_TEST_MCU_BC_TCNAME_PREFIX "2D Blockcpy DDR 1MB to MSMC circular 1KB performance test",
873         .disableInfo= NULL,
874         .printEnable= PRINT_ENABLE,
875         .prfEnable  = PRF_ENABLE,
876         .tcType     = (UDMA_TCT_FULL | UDMA_TCT_FUNCTIONAL | UDMA_TCT_PERFORMANCE),
877         .dcEnable   = DATA_CHECK_DISABLE,
878         .loopCnt    = UDMA_TEST_PERF_LOOP_CNT,
879         .numTasks   = 1U,
880         .testType   = {UDMA_TT_BLK_CPY},
881         .testFxnPtr = {&udmaTestBlkcpyTc},
882         .pacingTime = {PACING_NONE},
883         .numCh      = {1U},
884         .instId     = {UDMA_TEST_INST_ID_MCU_BC},
885         .chPrmId    = {UDMA_TEST_CH_PRMID_INTR_DEF},
886         .qdepth     = {UDMA_TEST_DEF_QDEPTH},
887         .icnt       = {
888                         {1*KB, 1U, 1*KB, 1U}
889                       },
890         .dicnt      = {
891                         {1*KB, 1U, 1*KB, 1U}
892                       },
893         .dim        = {
894                         {1*KB, 1*KB, 0U}
895                       },
896         .ddim       = {
897                         {0U, 0U, 0U}
898                       },
899         .heapIdSrc  = {UTILS_MEM_HEAP_ID_DDR},
900         .heapIdDest = {UTILS_MEM_HEAP_ID_MSMC},
901         .srcBufSize = {1*MB},
902         .destBufSize= {1*KB},
903         .runFlag    = (UDMA_TEST_RF_MCU_BC),
904         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
905     },
906     {
907         .enableTest = TEST_ENABLE,
908         .tcId       = 3493U,
909         .tcName     = UDMA_TEST_MCU_BC_TCNAME_PREFIX "2D Blockcpy MSMC circular 1KB to MSMC circular 1KB performance test",
910         .disableInfo= NULL,
911         .printEnable= PRINT_ENABLE,
912         .prfEnable  = PRF_ENABLE,
913         .tcType     = (UDMA_TCT_FULL | UDMA_TCT_FUNCTIONAL | UDMA_TCT_PERFORMANCE),
914         .dcEnable   = DATA_CHECK_DISABLE,
915         .loopCnt    = UDMA_TEST_PERF_LOOP_CNT,
916         .numTasks   = 1U,
917         .testType   = {UDMA_TT_BLK_CPY},
918         .testFxnPtr = {&udmaTestBlkcpyTc},
919         .pacingTime = {PACING_NONE},
920         .numCh      = {1U},
921         .instId     = {UDMA_TEST_INST_ID_MCU_BC},
922         .chPrmId    = {UDMA_TEST_CH_PRMID_INTR_DEF},
923         .qdepth     = {UDMA_TEST_DEF_QDEPTH},
924         .icnt       = {
925                         {1*KB, 1U, 1*KB, 1U}
926                       },
927         .dicnt      = {
928                         {1*KB, 1U, 1*KB, 1U}
929                       },
930         .dim        = {
931                         {0U, 0U, 0U}
932                       },
933         .ddim       = {
934                         {0U, 0U, 0U}
935                       },
936         .heapIdSrc  = {UTILS_MEM_HEAP_ID_MSMC},
937         .heapIdDest = {UTILS_MEM_HEAP_ID_MSMC},
938         .srcBufSize = {1*KB},
939         .destBufSize= {1*KB},
940         .runFlag    = (UDMA_TEST_RF_MCU_BC),
941         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
942     },
943 #endif /* #if (UDMA_SOC_CFG_UDMAP_PRESENT == 1) */
944     {
945         .enableTest = TEST_ENABLE,
946         .tcId       = 3494U,
947         .tcName     = UDMA_TEST_MAIN_BC_TCNAME_PREFIX "Blockcpy DDR 1MB to DDR 1MB from multiple tasks",
948         .disableInfo= NULL,
949         .printEnable= PRINT_DISABLE,
950         .prfEnable  = PRF_ENABLE,
951         .tcType     = (UDMA_TCT_FULL | UDMA_TCT_FUNCTIONAL | UDMA_TCT_PERFORMANCE),
952         .dcEnable   = DATA_CHECK_DISABLE,
953         .loopCnt    = UDMA_TEST_LOOP_CNT_MT_SOC,
954         .numTasks   = UDMA_TEST_MAX_MAIN_BC_CH,
955         .testType   = {UDMA_TT_BLK_CPY, UDMA_TT_BLK_CPY, UDMA_TT_BLK_CPY, UDMA_TT_BLK_CPY},
956         .testFxnPtr = {&udmaTestBlkcpyTc, &udmaTestBlkcpyTc, &udmaTestBlkcpyTc, &udmaTestBlkcpyTc},
957         .pacingTime = {PACING_NONE, PACING_NONE, PACING_NONE, PACING_NONE},
958         .numCh      = {1U, 1U, 1U, 1U},
959         .instId     = {UDMA_TEST_INST_ID_MAIN_BC, UDMA_TEST_INST_ID_MAIN_BC, UDMA_TEST_INST_ID_MAIN_BC, UDMA_TEST_INST_ID_MAIN_BC},
960         .chPrmId    = {UDMA_TEST_CH_PRMID_INTR_DEF, UDMA_TEST_CH_PRMID_INTR_DEF, UDMA_TEST_CH_PRMID_INTR_DEF, UDMA_TEST_CH_PRMID_INTR_DEF},
961         .qdepth     = {UDMA_TEST_PERF_QDEPTH, UDMA_TEST_PERF_QDEPTH, UDMA_TEST_PERF_QDEPTH, UDMA_TEST_PERF_QDEPTH},
962         .icnt       = {
963                         {1*KB, 1U, 1*KB, 1U},
964                         {1*KB, 1U, 1*KB, 1U},
965                         {1*KB, 1U, 1*KB, 1U},
966                         {1*KB, 1U, 1*KB, 1U},
967                       },
968         .dicnt      = {
969                         {1*KB, 1U, 1*KB, 1U},
970                         {1*KB, 1U, 1*KB, 1U},
971                         {1*KB, 1U, 1*KB, 1U},
972                         {1*KB, 1U, 1*KB, 1U},
973                       },
974         .dim        = {
975                         {1*KB, 1*KB, 0U},
976                         {1*KB, 1*KB, 0U},
977                         {1*KB, 1*KB, 0U},
978                         {1*KB, 1*KB, 0U},
979                       },
980         .ddim       = {
981                         {1*KB, 1*KB, 0U},
982                         {1*KB, 1*KB, 0U},
983                         {1*KB, 1*KB, 0U},
984                         {1*KB, 1*KB, 0U},
985                       },
986         .heapIdSrc  = {UTILS_MEM_HEAP_ID_DDR, UTILS_MEM_HEAP_ID_DDR, UTILS_MEM_HEAP_ID_DDR, UTILS_MEM_HEAP_ID_DDR},
987         .heapIdDest = {UTILS_MEM_HEAP_ID_DDR, UTILS_MEM_HEAP_ID_DDR, UTILS_MEM_HEAP_ID_DDR, UTILS_MEM_HEAP_ID_DDR},
988         .srcBufSize = {1*MB, 1*MB, 1*MB, 1*MB},
989         .destBufSize= {1*MB, 1*MB, 1*MB, 1*MB},
990         .runFlag    = (UDMA_TEST_RF_MAIN_BC_MT),
991         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
992     },
993 #if (UDMA_SOC_CFG_UDMAP_PRESENT == 1)
994     {
995         .enableTest = TEST_ENABLE,
996         .tcId       = 3495U,
997         .tcName     = UDMA_TEST_MCU_BC_TCNAME_PREFIX "Blockcpy DDR 1MB to DDR 1MB from multiple tasks",
998         .disableInfo= NULL,
999         .printEnable= PRINT_DISABLE,
1000         .prfEnable  = PRF_ENABLE,
1001         .tcType     = (UDMA_TCT_FULL | UDMA_TCT_FUNCTIONAL | UDMA_TCT_PERFORMANCE),
1002         .dcEnable   = DATA_CHECK_DISABLE,
1003         .loopCnt    = UDMA_TEST_PERF_LOOP_CNT,
1004         .numTasks   = UDMA_TEST_MAX_MCU_BC_CH,
1005         .testType   = {UDMA_TT_BLK_CPY, UDMA_TT_BLK_CPY, UDMA_TT_BLK_CPY, UDMA_TT_BLK_CPY},
1006         .testFxnPtr = {&udmaTestBlkcpyTc, &udmaTestBlkcpyTc, &udmaTestBlkcpyTc, &udmaTestBlkcpyTc},
1007         .pacingTime = {PACING_NONE, PACING_NONE, PACING_NONE, PACING_NONE},
1008         .numCh      = {1U, 1U, 1U, 1U},
1009         .instId     = {UDMA_TEST_INST_ID_MCU_BC, UDMA_TEST_INST_ID_MCU_BC, UDMA_TEST_INST_ID_MCU_BC, UDMA_TEST_INST_ID_MCU_BC},
1010         .chPrmId    = {UDMA_TEST_CH_PRMID_INTR_DEF, UDMA_TEST_CH_PRMID_INTR_DEF, UDMA_TEST_CH_PRMID_INTR_DEF, UDMA_TEST_CH_PRMID_INTR_DEF},
1011         .qdepth     = {UDMA_TEST_PERF_QDEPTH, UDMA_TEST_PERF_QDEPTH, UDMA_TEST_PERF_QDEPTH, UDMA_TEST_PERF_QDEPTH},
1012         .icnt       = {
1013                         {1*KB, 1U, 1*KB, 1U},
1014                         {1*KB, 1U, 1*KB, 1U},
1015                         {1*KB, 1U, 1*KB, 1U},
1016                         {1*KB, 1U, 1*KB, 1U},
1017                       },
1018         .dicnt      = {
1019                         {1*KB, 1U, 1*KB, 1U},
1020                         {1*KB, 1U, 1*KB, 1U},
1021                         {1*KB, 1U, 1*KB, 1U},
1022                         {1*KB, 1U, 1*KB, 1U},
1023                       },
1024         .dim        = {
1025                         {1*KB, 1*KB, 0U},
1026                         {1*KB, 1*KB, 0U},
1027                         {1*KB, 1*KB, 0U},
1028                         {1*KB, 1*KB, 0U},
1029                       },
1030         .ddim       = {
1031                         {1*KB, 1*KB, 0U},
1032                         {1*KB, 1*KB, 0U},
1033                         {1*KB, 1*KB, 0U},
1034                         {1*KB, 1*KB, 0U},
1035                       },
1036         .heapIdSrc  = {UTILS_MEM_HEAP_ID_DDR, UTILS_MEM_HEAP_ID_DDR, UTILS_MEM_HEAP_ID_DDR, UTILS_MEM_HEAP_ID_DDR},
1037         .heapIdDest = {UTILS_MEM_HEAP_ID_DDR, UTILS_MEM_HEAP_ID_DDR, UTILS_MEM_HEAP_ID_DDR, UTILS_MEM_HEAP_ID_DDR},
1038         .srcBufSize = {1*MB, 1*MB, 1*MB, 1*MB},
1039         .destBufSize= {1*MB, 1*MB, 1*MB, 1*MB},
1040         .runFlag    = (UDMA_TEST_RF_MCU_BC_MT),
1041         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
1042     },
1043 #endif /* #if (UDMA_SOC_CFG_UDMAP_PRESENT == 1) */
1044     {
1045         .enableTest = TEST_ENABLE,
1046         .tcId       = 3496U,
1047         .tcName     = UDMA_TEST_MAIN_BC_TCNAME_PREFIX "Blockcpy MSMC to MSMC 1KBx1K (1MB) circular from multiple tasks",
1048         .disableInfo= NULL,
1049         .printEnable= PRINT_DISABLE,
1050         .prfEnable  = PRF_ENABLE,
1051         .tcType     = (UDMA_TCT_FULL | UDMA_TCT_FUNCTIONAL | UDMA_TCT_PERFORMANCE),
1052         .dcEnable   = DATA_CHECK_DISABLE,
1053         .loopCnt    = UDMA_TEST_LOOP_CNT_MT_SOC,
1054         .numTasks   = UDMA_TEST_MAX_MAIN_BC_CH,
1055         .testType   = {UDMA_TT_BLK_CPY, UDMA_TT_BLK_CPY, UDMA_TT_BLK_CPY, UDMA_TT_BLK_CPY},
1056         .testFxnPtr = {&udmaTestBlkcpyTc, &udmaTestBlkcpyTc, &udmaTestBlkcpyTc, &udmaTestBlkcpyTc},
1057         .pacingTime = {PACING_NONE, PACING_NONE, PACING_NONE, PACING_NONE},
1058         .numCh      = {1U, 1U, 1U, 1U},
1059         .instId     = {UDMA_TEST_INST_ID_MAIN_BC, UDMA_TEST_INST_ID_MAIN_BC, UDMA_TEST_INST_ID_MAIN_BC, UDMA_TEST_INST_ID_MAIN_BC},
1060         .chPrmId    = {UDMA_TEST_CH_PRMID_INTR_DEF, UDMA_TEST_CH_PRMID_INTR_DEF, UDMA_TEST_CH_PRMID_INTR_DEF, UDMA_TEST_CH_PRMID_INTR_DEF},
1061         .qdepth     = {UDMA_TEST_PERF_QDEPTH, UDMA_TEST_PERF_QDEPTH, UDMA_TEST_PERF_QDEPTH, UDMA_TEST_PERF_QDEPTH},
1062         .icnt       = {
1063                         {1*KB, 1U, 1*KB, 1U},
1064                         {1*KB, 1U, 1*KB, 1U},
1065                         {1*KB, 1U, 1*KB, 1U},
1066                         {1*KB, 1U, 1*KB, 1U},
1067                       },
1068         .dicnt      = {
1069                         {1*KB, 1U, 1*KB, 1U},
1070                         {1*KB, 1U, 1*KB, 1U},
1071                         {1*KB, 1U, 1*KB, 1U},
1072                         {1*KB, 1U, 1*KB, 1U},
1073                       },
1074         .dim        = {
1075                         {0U, 0U, 0U},
1076                         {0U, 0U, 0U},
1077                         {0U, 0U, 0U},
1078                         {0U, 0U, 0U},
1079                       },
1080         .ddim       = {
1081                         {0U, 0U, 0U},
1082                         {0U, 0U, 0U},
1083                         {0U, 0U, 0U},
1084                         {0U, 0U, 0U},
1085                       },
1086         .heapIdSrc  = {UTILS_MEM_HEAP_ID_MSMC, UTILS_MEM_HEAP_ID_MSMC, UTILS_MEM_HEAP_ID_MSMC, UTILS_MEM_HEAP_ID_MSMC},
1087         .heapIdDest = {UTILS_MEM_HEAP_ID_MSMC, UTILS_MEM_HEAP_ID_MSMC, UTILS_MEM_HEAP_ID_MSMC, UTILS_MEM_HEAP_ID_MSMC},
1088         .srcBufSize = {1*KB, 1*KB, 1*KB, 1*KB},
1089         .destBufSize= {1*KB, 1*KB, 1*KB, 1*KB},
1090         .runFlag    = (UDMA_TEST_RF_MAIN_BC_MT),
1091         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
1092     },
1093 #if (UDMA_SOC_CFG_UDMAP_PRESENT == 1)
1094     {
1095         .enableTest = TEST_ENABLE,
1096         .tcId       = 3497U,
1097         .tcName     = UDMA_TEST_MCU_BC_TCNAME_PREFIX "Blockcpy MSMC to MSMC circular 1KBx1K (1MB) from multiple tasks",
1098         .disableInfo= NULL,
1099         .printEnable= PRINT_DISABLE,
1100         .prfEnable  = PRF_ENABLE,
1101         .tcType     = (UDMA_TCT_FULL | UDMA_TCT_FUNCTIONAL | UDMA_TCT_PERFORMANCE),
1102         .dcEnable   = DATA_CHECK_DISABLE,
1103         .loopCnt    = UDMA_TEST_PERF_LOOP_CNT,
1104         .numTasks   = UDMA_TEST_MAX_MCU_BC_CH,
1105         .testType   = {UDMA_TT_BLK_CPY, UDMA_TT_BLK_CPY, UDMA_TT_BLK_CPY, UDMA_TT_BLK_CPY},
1106         .testFxnPtr = {&udmaTestBlkcpyTc, &udmaTestBlkcpyTc, &udmaTestBlkcpyTc, &udmaTestBlkcpyTc},
1107         .pacingTime = {PACING_NONE, PACING_NONE, PACING_NONE, PACING_NONE},
1108         .numCh      = {1U, 1U, 1U, 1U},
1109         .instId     = {UDMA_TEST_INST_ID_MCU_BC, UDMA_TEST_INST_ID_MCU_BC, UDMA_TEST_INST_ID_MCU_BC, UDMA_TEST_INST_ID_MCU_BC},
1110         .chPrmId    = {UDMA_TEST_CH_PRMID_INTR_DEF, UDMA_TEST_CH_PRMID_INTR_DEF, UDMA_TEST_CH_PRMID_INTR_DEF, UDMA_TEST_CH_PRMID_INTR_DEF},
1111         .qdepth     = {UDMA_TEST_PERF_QDEPTH, UDMA_TEST_PERF_QDEPTH, UDMA_TEST_PERF_QDEPTH, UDMA_TEST_PERF_QDEPTH},
1112         .icnt       = {
1113                         {1*KB, 1U, 1*KB, 1U},
1114                         {1*KB, 1U, 1*KB, 1U},
1115                         {1*KB, 1U, 1*KB, 1U},
1116                         {1*KB, 1U, 1*KB, 1U},
1117                       },
1118         .dicnt      = {
1119                         {1*KB, 1U, 1*KB, 1U},
1120                         {1*KB, 1U, 1*KB, 1U},
1121                         {1*KB, 1U, 1*KB, 1U},
1122                         {1*KB, 1U, 1*KB, 1U},
1123                       },
1124         .dim        = {
1125                         {0U, 0U, 0U},
1126                         {0U, 0U, 0U},
1127                         {0U, 0U, 0U},
1128                         {0U, 0U, 0U},
1129                       },
1130         .ddim       = {
1131                         {0U, 0U, 0U},
1132                         {0U, 0U, 0U},
1133                         {0U, 0U, 0U},
1134                         {0U, 0U, 0U},
1135                       },
1136         .heapIdSrc  = {UTILS_MEM_HEAP_ID_MSMC, UTILS_MEM_HEAP_ID_MSMC, UTILS_MEM_HEAP_ID_MSMC, UTILS_MEM_HEAP_ID_MSMC},
1137         .heapIdDest = {UTILS_MEM_HEAP_ID_MSMC, UTILS_MEM_HEAP_ID_MSMC, UTILS_MEM_HEAP_ID_MSMC, UTILS_MEM_HEAP_ID_MSMC},
1138         .srcBufSize = {1*KB, 1*KB, 1*KB, 1*KB},
1139         .destBufSize= {1*KB, 1*KB, 1*KB, 1*KB},
1140         .runFlag    = (UDMA_TEST_RF_MCU_BC_MT),
1141         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
1142     },
1143 #endif /* #if (UDMA_SOC_CFG_UDMAP_PRESENT == 1) */
1144     {
1145         .enableTest = TEST_ENABLE,
1146         .tcId       = 3498U,
1147         .tcName     = UDMA_TEST_MAIN_BC_TCNAME_PREFIX "2D Blockcpy DDR 4MB to MSMC circular 4KB at 20ms pacing for 10 seconds",
1148         .disableInfo= NULL,
1149         .printEnable= PRINT_ENABLE,
1150         .prfEnable  = PRF_ENABLE,
1151         .tcType     = (UDMA_TCT_FULL | UDMA_TCT_FUNCTIONAL),
1152         .dcEnable   = DATA_CHECK_DISABLE,
1153         .loopCnt    = 500U,
1154         .numTasks   = 1U,
1155         .testType   = {UDMA_TT_BLK_CPY},
1156         .testFxnPtr = {&udmaTestBlkcpyTc},
1157         .pacingTime = {DEF_PACING},
1158         .numCh      = {1U},
1159         .instId     = {UDMA_TEST_INST_ID_MAIN_BC},
1160         .chPrmId    = {UDMA_TEST_CH_PRMID_INTR_DEF},
1161         .qdepth     = {UDMA_TEST_DEF_QDEPTH},
1162         .icnt       = {
1163                         {1*KB, 4U, 1*KB, 1U}
1164                       },
1165         .dicnt      = {
1166                         {1*KB, 4U, 1*KB, 1U}
1167                       },
1168         .dim        = {
1169                         {1*KB, 4*KB, 4*MB}
1170                       },
1171         .ddim       = {
1172                         {0U, 0U, 0U}
1173                       },
1174         .heapIdSrc  = {UTILS_MEM_HEAP_ID_DDR},
1175         .heapIdDest = {UTILS_MEM_HEAP_ID_MSMC},
1176         .srcBufSize = {4U*MB},
1177         .destBufSize= {4U*KB},
1178         .runFlag    = (UDMA_TEST_RF_MAIN_BC_PACING),
1179         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
1180     },
1181 #endif /* #ifndef UDMA_TEST_SOC_PRESILICON */
1182 #ifdef UDMA_UTC_ID_MSMC_DRU0
1183     {
1184         .enableTest = TEST_ENABLE,
1185         .tcId       = 3499U,
1186         .tcName     = "DRU Indirect Blockcpy DDR to DDR in polling mode",
1187         .disableInfo= NULL,
1188         .printEnable= PRINT_ENABLE,
1189         .prfEnable  = PRF_DISABLE,
1190         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
1191         .dcEnable   = DATA_CHECK_ENABLE,
1192         .loopCnt    = USE_DEF_LP_CNT,
1193         .numTasks   = 1U,
1194         .testType   = {UDMA_TT_DRU_INDIRECT},
1195         .testFxnPtr = {&udmaTestBlkcpyTc},
1196         .pacingTime = {PACING_NONE},
1197         .numCh      = {1U},
1198         .instId     = {UDMA_TEST_INST_ID_MAIN_BC},
1199         .chPrmId    = {UDMA_TEST_CH_PRMID_DRU_DEF},
1200         .qdepth     = {USE_DEF_QDEPTH},
1201         .icnt       = {
1202                         {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
1203                       },
1204         .dicnt      = {
1205                         {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
1206                       },
1207         .dim        = {
1208                         {0U, 0U, 0U}
1209                       },
1210         .ddim       = {
1211                         {0U, 0U, 0U}
1212                       },
1213         .heapIdSrc  = {DEF_HEAP_ID},
1214         .heapIdDest = {DEF_HEAP_ID},
1215         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
1216         .destBufSize= {UDMA_TEST_DEF_DICNT0},
1217         .runFlag    = (UDMA_TEST_RF_DRU | UDMA_TEST_RF_CFG_DYN),
1218         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
1219     },
1220     {
1221         .enableTest = TEST_ENABLE,
1222         .tcId       = 3500U,
1223         .tcName     = "DRU Indirect Blockcpy DDR to DDR in interrupt mode",
1224         .disableInfo= NULL,
1225         .printEnable= PRINT_ENABLE,
1226         .prfEnable  = PRF_DISABLE,
1227         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
1228         .dcEnable   = DATA_CHECK_ENABLE,
1229         .loopCnt    = USE_DEF_LP_CNT,
1230         .numTasks   = 1U,
1231         .testType   = {UDMA_TT_DRU_INDIRECT},
1232         .testFxnPtr = {&udmaTestBlkcpyTc},
1233         .pacingTime = {PACING_NONE},
1234         .numCh      = {1U},
1235         .instId     = {UDMA_TEST_INST_ID_MAIN_BC},
1236         .chPrmId    = {UDMA_TEST_CH_PRMID_DRU_INTR_DEF},
1237         .qdepth     = {USE_DEF_QDEPTH},
1238         .icnt       = {
1239                         {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
1240                       },
1241         .dicnt      = {
1242                         {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
1243                       },
1244         .dim        = {
1245                         {0U, 0U, 0U}
1246                       },
1247         .ddim       = {
1248                         {0U, 0U, 0U}
1249                       },
1250         .heapIdSrc  = {DEF_HEAP_ID},
1251         .heapIdDest = {DEF_HEAP_ID},
1252         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
1253         .destBufSize= {UDMA_TEST_DEF_DICNT0},
1254         .runFlag    = (UDMA_TEST_RF_DRU | UDMA_TEST_RF_CFG_DYN),
1255         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
1256     },
1257 #ifndef UDMA_TEST_SOC_PRESILICON    
1258     {
1259         .enableTest = TEST_ENABLE,
1260         .tcId       = 3501U,
1261         .tcName     = "DRU Indirect Blockcpy DDR 1MB to DDR 1MB performance test",
1262         .disableInfo= NULL,
1263         .printEnable= PRINT_ENABLE,
1264         .prfEnable  = PRF_ENABLE,
1265         .tcType     = (UDMA_TCT_FULL | UDMA_TCT_FUNCTIONAL | UDMA_TCT_PERFORMANCE),
1266         .dcEnable   = DATA_CHECK_DISABLE,
1267         .loopCnt    = UDMA_TEST_PERF_LOOP_CNT,
1268         .numTasks   = 1U,
1269         .testType   = {UDMA_TT_DRU_INDIRECT},
1270         .testFxnPtr = {&udmaTestBlkcpyTc},
1271         .pacingTime = {PACING_NONE},
1272         .numCh      = {1U},
1273         .instId     = {UDMA_TEST_INST_ID_MAIN_BC},
1274         .chPrmId    = {UDMA_TEST_CH_PRMID_DRU_INTR_DEF},
1275         .qdepth     = {UDMA_TEST_PERF_QDEPTH},
1276         .icnt       = {
1277                         {1*KB, 1U, 1*KB, 1U},
1278                       },
1279         .dicnt      = {
1280                         {1*KB, 1U, 1*KB, 1U},
1281                       },
1282         .dim        = {
1283                         {1*KB, 1*KB, 0U},
1284                       },
1285         .ddim       = {
1286                         {1*KB, 1*KB, 0U},
1287                       },
1288         .heapIdSrc  = {UTILS_MEM_HEAP_ID_DDR},
1289         .heapIdDest = {UTILS_MEM_HEAP_ID_DDR},
1290         .srcBufSize = {1*MB},
1291         .destBufSize= {1*MB},
1292         .runFlag    = (UDMA_TEST_RF_DRU),
1293         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
1294     },
1295     {
1296         .enableTest = TEST_ENABLE,
1297         .tcId       = 3502U,
1298         .tcName     = "DRU Indirect 2D Blockcpy MSMC circular 1KB to DDR 1MB performance test",
1299         .disableInfo= NULL,
1300         .printEnable= PRINT_ENABLE,
1301         .prfEnable  = PRF_ENABLE,
1302         .tcType     = (UDMA_TCT_FULL | UDMA_TCT_FUNCTIONAL | UDMA_TCT_PERFORMANCE),
1303         .dcEnable   = DATA_CHECK_DISABLE,
1304         .loopCnt    = UDMA_TEST_PERF_LOOP_CNT,
1305         .numTasks   = 1U,
1306         .testType   = {UDMA_TT_DRU_INDIRECT},
1307         .testFxnPtr = {&udmaTestBlkcpyTc},
1308         .pacingTime = {PACING_NONE},
1309         .numCh      = {1U},
1310         .instId     = {UDMA_TEST_INST_ID_MAIN_BC},
1311         .chPrmId    = {UDMA_TEST_CH_PRMID_DRU_INTR_DEF},
1312         .qdepth     = {UDMA_TEST_DEF_QDEPTH},
1313         .icnt       = {
1314                         {1*KB, 1U, 1*KB, 1U}
1315                       },
1316         .dicnt      = {
1317                         {1*KB, 1U, 1*KB, 1U}
1318                       },
1319         .dim        = {
1320                         {0U, 0U, 0U}
1321                       },
1322         .ddim       = {
1323                         {1*KB, 1*KB, 0U}
1324                       },
1325         .heapIdSrc  = {UTILS_MEM_HEAP_ID_MSMC},
1326         .heapIdDest = {UTILS_MEM_HEAP_ID_DDR},
1327         .srcBufSize = {1*KB},
1328         .destBufSize= {1*MB},
1329         .runFlag    = (UDMA_TEST_RF_DRU),
1330         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
1331     },
1332     {
1333         .enableTest = TEST_ENABLE,
1334         .tcId       = 3503U,
1335         .tcName     = "DRU Indirect 2D Blockcpy DDR 1MB to MSMC circular 1KB performance test",
1336         .disableInfo= NULL,
1337         .printEnable= PRINT_ENABLE,
1338         .prfEnable  = PRF_ENABLE,
1339         .tcType     = (UDMA_TCT_FULL | UDMA_TCT_FUNCTIONAL | UDMA_TCT_PERFORMANCE),
1340         .dcEnable   = DATA_CHECK_DISABLE,
1341         .loopCnt    = UDMA_TEST_PERF_LOOP_CNT,
1342         .numTasks   = 1U,
1343         .testType   = {UDMA_TT_DRU_INDIRECT},
1344         .testFxnPtr = {&udmaTestBlkcpyTc},
1345         .pacingTime = {PACING_NONE},
1346         .numCh      = {1U},
1347         .instId     = {UDMA_TEST_INST_ID_MAIN_BC},
1348         .chPrmId    = {UDMA_TEST_CH_PRMID_DRU_INTR_DEF},
1349         .qdepth     = {UDMA_TEST_DEF_QDEPTH},
1350         .icnt       = {
1351                         {1*KB, 1U, 1*KB, 1U}
1352                       },
1353         .dicnt      = {
1354                         {1*KB, 1U, 1*KB, 1U}
1355                       },
1356         .dim        = {
1357                         {1*KB, 1*KB, 0U}
1358                       },
1359         .ddim       = {
1360                         {0U, 0U, 0U}
1361                       },
1362         .heapIdSrc  = {UTILS_MEM_HEAP_ID_DDR},
1363         .heapIdDest = {UTILS_MEM_HEAP_ID_MSMC},
1364         .srcBufSize = {1*MB},
1365         .destBufSize= {1*KB},
1366         .runFlag    = (UDMA_TEST_RF_DRU),
1367         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
1368     },
1369     {
1370         .enableTest = TEST_ENABLE,
1371         .tcId       = 3504U,
1372         .tcName     = "DRU Indirect 2D Blockcpy MSMC circular 1KB to MSMC circular 1KB performance test",
1373         .disableInfo= NULL,
1374         .printEnable= PRINT_ENABLE,
1375         .prfEnable  = PRF_ENABLE,
1376         .tcType     = (UDMA_TCT_FULL | UDMA_TCT_FUNCTIONAL | UDMA_TCT_PERFORMANCE),
1377         .dcEnable   = DATA_CHECK_DISABLE,
1378         .loopCnt    = UDMA_TEST_PERF_LOOP_CNT,
1379         .numTasks   = 1U,
1380         .testType   = {UDMA_TT_DRU_INDIRECT},
1381         .testFxnPtr = {&udmaTestBlkcpyTc},
1382         .pacingTime = {PACING_NONE},
1383         .numCh      = {1U},
1384         .instId     = {UDMA_TEST_INST_ID_MAIN_BC},
1385         .chPrmId    = {UDMA_TEST_CH_PRMID_DRU_INTR_DEF},
1386         .qdepth     = {UDMA_TEST_DEF_QDEPTH},
1387         .icnt       = {
1388                         {1*KB, 1U, 1*KB, 1U}
1389                       },
1390         .dicnt      = {
1391                         {1*KB, 1U, 1*KB, 1U}
1392                       },
1393         .dim        = {
1394                         {0U, 0U, 0U}
1395                       },
1396         .ddim       = {
1397                         {0U, 0U, 0U}
1398                       },
1399         .heapIdSrc  = {UTILS_MEM_HEAP_ID_MSMC},
1400         .heapIdDest = {UTILS_MEM_HEAP_ID_MSMC},
1401         .srcBufSize = {1*KB},
1402         .destBufSize= {1*KB},
1403         .runFlag    = (UDMA_TEST_RF_DRU),
1404         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
1405     },
1406     {
1407         .enableTest = TEST_ENABLE,
1408         .tcId       = 3505U,
1409         .tcName     = "DRU Indirect Blockcpy DDR 1MB to DDR 1MB from multiple tasks",
1410         .disableInfo= NULL,
1411         .printEnable= PRINT_DISABLE,
1412         .prfEnable  = PRF_ENABLE,
1413         .tcType     = (UDMA_TCT_FULL | UDMA_TCT_FUNCTIONAL | UDMA_TCT_PERFORMANCE),
1414         .dcEnable   = DATA_CHECK_DISABLE,
1415         .loopCnt    = UDMA_TEST_PERF_LOOP_CNT,
1416         .numTasks   = UDMA_TEST_MAX_DRU_CH,
1417         .testType   = {UDMA_TT_DRU_INDIRECT, UDMA_TT_DRU_INDIRECT, UDMA_TT_DRU_INDIRECT, UDMA_TT_DRU_INDIRECT},
1418         .testFxnPtr = {&udmaTestBlkcpyTc, &udmaTestBlkcpyTc, &udmaTestBlkcpyTc, &udmaTestBlkcpyTc},
1419         .pacingTime = {PACING_NONE, PACING_NONE, PACING_NONE, PACING_NONE},
1420         .numCh      = {1U, 1U, 1U, 1U},
1421         .instId     = {UDMA_TEST_INST_ID_MAIN_BC, UDMA_TEST_INST_ID_MAIN_BC, UDMA_TEST_INST_ID_MAIN_BC, UDMA_TEST_INST_ID_MAIN_BC},
1422         .chPrmId    = {UDMA_TEST_CH_PRMID_DRU_INTR_DEF, UDMA_TEST_CH_PRMID_DRU_INTR_DEF, UDMA_TEST_CH_PRMID_DRU_INTR_DEF, UDMA_TEST_CH_PRMID_DRU_INTR_DEF},
1423         .qdepth     = {UDMA_TEST_PERF_QDEPTH, UDMA_TEST_PERF_QDEPTH, UDMA_TEST_PERF_QDEPTH, UDMA_TEST_PERF_QDEPTH},
1424         .icnt       = {
1425                         {1*KB, 1U, 1*KB, 1U},
1426                         {1*KB, 1U, 1*KB, 1U},
1427                         {1*KB, 1U, 1*KB, 1U},
1428                         {1*KB, 1U, 1*KB, 1U},
1429                       },
1430         .dicnt      = {
1431                         {1*KB, 1U, 1*KB, 1U},
1432                         {1*KB, 1U, 1*KB, 1U},
1433                         {1*KB, 1U, 1*KB, 1U},
1434                         {1*KB, 1U, 1*KB, 1U},
1435                       },
1436         .dim        = {
1437                         {1*KB, 1*KB, 0U},
1438                         {1*KB, 1*KB, 0U},
1439                         {1*KB, 1*KB, 0U},
1440                         {1*KB, 1*KB, 0U},
1441                       },
1442         .ddim       = {
1443                         {1*KB, 1*KB, 0U},
1444                         {1*KB, 1*KB, 0U},
1445                         {1*KB, 1*KB, 0U},
1446                         {1*KB, 1*KB, 0U},
1447                       },
1448         .heapIdSrc  = {UTILS_MEM_HEAP_ID_DDR, UTILS_MEM_HEAP_ID_DDR, UTILS_MEM_HEAP_ID_DDR, UTILS_MEM_HEAP_ID_DDR},
1449         .heapIdDest = {UTILS_MEM_HEAP_ID_DDR, UTILS_MEM_HEAP_ID_DDR, UTILS_MEM_HEAP_ID_DDR, UTILS_MEM_HEAP_ID_DDR},
1450         .srcBufSize = {1*MB, 1*MB, 1*MB, 1*MB},
1451         .destBufSize= {1*MB, 1*MB, 1*MB, 1*MB},
1452         .runFlag    = (UDMA_TEST_RF_DRU_MT),
1453         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
1454     },
1455     {
1456         .enableTest = TEST_ENABLE,
1457         .tcId       = 3506U,
1458         .tcName     = "DRU Indirect Blockcpy MSMC to MSMC 1KBx1K (1MB) circular from multiple tasks",
1459         .disableInfo= NULL,
1460         .printEnable= PRINT_DISABLE,
1461         .prfEnable  = PRF_ENABLE,
1462         .tcType     = (UDMA_TCT_FULL | UDMA_TCT_FUNCTIONAL | UDMA_TCT_PERFORMANCE),
1463         .dcEnable   = DATA_CHECK_DISABLE,
1464         .loopCnt    = UDMA_TEST_PERF_LOOP_CNT,
1465         .numTasks   = UDMA_TEST_MAX_DRU_CH,
1466         .testType   = {UDMA_TT_DRU_INDIRECT, UDMA_TT_DRU_INDIRECT, UDMA_TT_DRU_INDIRECT, UDMA_TT_DRU_INDIRECT},
1467         .testFxnPtr = {&udmaTestBlkcpyTc, &udmaTestBlkcpyTc, &udmaTestBlkcpyTc, &udmaTestBlkcpyTc},
1468         .pacingTime = {PACING_NONE, PACING_NONE, PACING_NONE, PACING_NONE},
1469         .numCh      = {1U, 1U, 1U, 1U},
1470         .instId     = {UDMA_TEST_INST_ID_MAIN_BC, UDMA_TEST_INST_ID_MAIN_BC, UDMA_TEST_INST_ID_MAIN_BC, UDMA_TEST_INST_ID_MAIN_BC},
1471         .chPrmId    = {UDMA_TEST_CH_PRMID_DRU_INTR_DEF, UDMA_TEST_CH_PRMID_DRU_INTR_DEF, UDMA_TEST_CH_PRMID_DRU_INTR_DEF, UDMA_TEST_CH_PRMID_DRU_INTR_DEF},
1472         .qdepth     = {UDMA_TEST_PERF_QDEPTH, UDMA_TEST_PERF_QDEPTH, UDMA_TEST_PERF_QDEPTH, UDMA_TEST_PERF_QDEPTH},
1473         .icnt       = {
1474                         {1*KB, 1U, 1*KB, 1U},
1475                         {1*KB, 1U, 1*KB, 1U},
1476                         {1*KB, 1U, 1*KB, 1U},
1477                         {1*KB, 1U, 1*KB, 1U},
1478                       },
1479         .dicnt      = {
1480                         {1*KB, 1U, 1*KB, 1U},
1481                         {1*KB, 1U, 1*KB, 1U},
1482                         {1*KB, 1U, 1*KB, 1U},
1483                         {1*KB, 1U, 1*KB, 1U},
1484                       },
1485         .dim        = {
1486                         {0U, 0U, 0U},
1487                         {0U, 0U, 0U},
1488                         {0U, 0U, 0U},
1489                         {0U, 0U, 0U},
1490                       },
1491         .ddim       = {
1492                         {0U, 0U, 0U},
1493                         {0U, 0U, 0U},
1494                         {0U, 0U, 0U},
1495                         {0U, 0U, 0U},
1496                       },
1497         .heapIdSrc  = {UTILS_MEM_HEAP_ID_MSMC, UTILS_MEM_HEAP_ID_MSMC, UTILS_MEM_HEAP_ID_MSMC, UTILS_MEM_HEAP_ID_MSMC},
1498         .heapIdDest = {UTILS_MEM_HEAP_ID_MSMC, UTILS_MEM_HEAP_ID_MSMC, UTILS_MEM_HEAP_ID_MSMC, UTILS_MEM_HEAP_ID_MSMC},
1499         .srcBufSize = {1*KB, 1*KB, 1*KB, 1*KB},
1500         .destBufSize= {1*KB, 1*KB, 1*KB, 1*KB},
1501         .runFlag    = (UDMA_TEST_RF_DRU_MT),
1502         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
1503     },
1504 #endif /* #ifndef UDMA_TEST_SOC_PRESILICON */
1505 //Enable after adding testcase in Qmetry
1506 #if 0
1507     {
1508         .enableTest = TEST_ENABLE,
1509         .tcId       = 9000U,
1510         .tcName     = "DRU Blockcpy circular 1KB DDR to DDR 1KB ICNT1 TR event type test",
1511         .disableInfo= NULL,
1512         .printEnable= PRINT_ENABLE,
1513         .prfEnable  = PRF_DISABLE,
1514         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
1515         .dcEnable   = DATA_CHECK_ENABLE,
1516         .loopCnt    = 1U,
1517         .numTasks   = 1U,
1518         .testType   = {UDMA_TT_DRU_INDIRECT},
1519         .testFxnPtr = {&udmaTestBlkcpyTc},
1520         .pacingTime = {PACING_NONE},
1521         .numCh      = {1U},
1522         .instId     = {UDMA_TEST_INST_ID_MAIN_BC},
1523         .chPrmId    = {UDMA_TEST_CH_PRMID_DRU_EVENTSIZE_ICNT1},
1524         .qdepth     = {USE_DEF_QDEPTH},
1525         .icnt       = {
1526                         {1*KB, 1U, 1U, 1U}
1527                       },
1528         .dicnt      = {
1529                         {1*KB, 1U, 1U, 1U}
1530                       },
1531         .dim        = {
1532                         {0U, 0U, 0U}
1533                       },
1534         .ddim       = {
1535                         {1*KB, 0U, 0U}
1536                       },
1537         .heapIdSrc  = {DEF_HEAP_ID},
1538         .heapIdDest = {DEF_HEAP_ID},
1539         .srcBufSize = {1*KB},
1540         .destBufSize= {1*KB},
1541         .runFlag    = (UDMA_TEST_RF_DRU),
1542         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
1543     },
1544     {
1545         .enableTest = TEST_ENABLE,
1546         .tcId       = 9001U,
1547         .tcName     = "DRU Blockcpy circular 1KB DDR to DDR 1KB ICNT2 TR event type test",
1548         .disableInfo= NULL,
1549         .printEnable= PRINT_ENABLE,
1550         .prfEnable  = PRF_DISABLE,
1551         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
1552         .dcEnable   = DATA_CHECK_ENABLE,
1553         .loopCnt    = 1U,
1554         .numTasks   = 1U,
1555         .testType   = {UDMA_TT_DRU_INDIRECT},
1556         .testFxnPtr = {&udmaTestBlkcpyTc},
1557         .pacingTime = {PACING_NONE},
1558         .numCh      = {1U},
1559         .instId     = {UDMA_TEST_INST_ID_MAIN_BC},
1560         .chPrmId    = {UDMA_TEST_CH_PRMID_DRU_EVENTSIZE_ICNT2},
1561         .qdepth     = {USE_DEF_QDEPTH},
1562         .icnt       = {
1563                         {1*KB, 1U, 1U, 1U}
1564                       },
1565         .dicnt      = {
1566                         {1*KB, 1U, 1U, 1U}
1567                       },
1568         .dim        = {
1569                         {0U, 0U, 0U}
1570                       },
1571         .ddim       = {
1572                         {1*KB, 0U, 0U}
1573                       },
1574         .heapIdSrc  = {DEF_HEAP_ID},
1575         .heapIdDest = {DEF_HEAP_ID},
1576         .srcBufSize = {1*KB},
1577         .destBufSize= {1*KB},
1578         .runFlag    = (UDMA_TEST_RF_DRU),
1579         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
1580     },
1581     {
1582         .enableTest = TEST_ENABLE,
1583         .tcId       = 9002U,
1584         .tcName     = "DRU Blockcpy circular 1KB DDR to DDR 1KB ICNT3 TR event type test",
1585         .disableInfo= NULL,
1586         .printEnable= PRINT_ENABLE,
1587         .prfEnable  = PRF_DISABLE,
1588         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
1589         .dcEnable   = DATA_CHECK_ENABLE,
1590         .loopCnt    = 1U,
1591         .numTasks   = 1U,
1592         .testType   = {UDMA_TT_DRU_INDIRECT},
1593         .testFxnPtr = {&udmaTestBlkcpyTc},
1594         .pacingTime = {PACING_NONE},
1595         .numCh      = {1U},
1596         .instId     = {UDMA_TEST_INST_ID_MAIN_BC},
1597         .chPrmId    = {UDMA_TEST_CH_PRMID_DRU_EVENTSIZE_ICNT3},
1598         .qdepth     = {USE_DEF_QDEPTH},
1599         .icnt       = {
1600                         {1*KB, 1U, 1U, 1U}
1601                       },
1602         .dicnt      = {
1603                         {1*KB, 1U, 1U, 1U}
1604                       },
1605         .dim        = {
1606                         {0U, 0U, 0U}
1607                       },
1608         .ddim       = {
1609                         {1*KB, 0U, 0U}
1610                       },
1611         .heapIdSrc  = {DEF_HEAP_ID},
1612         .heapIdDest = {DEF_HEAP_ID},
1613         .srcBufSize = {1*KB},
1614         .destBufSize= {1*KB},
1615         .runFlag    = (UDMA_TEST_RF_DRU),
1616         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
1617     },
1618     {
1619         .enableTest = TEST_ENABLE,
1620         .tcId       = 9003U,
1621         .tcName     = "DRU DDR to DDR SW global 0 trigger test in polling mode",
1622         .disableInfo= NULL,
1623         .printEnable= PRINT_ENABLE,
1624         .prfEnable  = PRF_DISABLE,
1625         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
1626         .dcEnable   = DATA_CHECK_ENABLE,
1627         .loopCnt    = USE_DEF_LP_CNT,
1628         .numTasks   = 1U,
1629         .testType   = {UDMA_TT_DRU_INDIRECT},
1630         .testFxnPtr = {&udmaTestBlkcpyTc},
1631         .pacingTime = {PACING_NONE},
1632         .numCh      = {1U},
1633         .instId     = {UDMA_INST_ID_MAIN_0},
1634         .chPrmId    = {UDMA_TEST_CH_PRMID_DRU_TRIGGER_GLOBAL0},
1635         .qdepth     = {USE_DEF_QDEPTH},
1636         .icnt       = {
1637                         {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
1638                       },
1639         .dicnt      = {
1640                         {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
1641                       },
1642         .dim        = {
1643                         {0U, 0U, 0U}
1644                       },
1645         .ddim       = {
1646                         {0U, 0U, 0U}
1647                       },
1648         .heapIdSrc  = {DEF_HEAP_ID},
1649         .heapIdDest = {DEF_HEAP_ID},
1650         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
1651         .destBufSize= {UDMA_TEST_DEF_DICNT0},
1652         .runFlag    = (UDMA_TEST_RF_DRU),
1653         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
1654     },
1655     {
1656         .enableTest = TEST_ENABLE,
1657         .tcId       = 9004U,
1658         .tcName     = "DRU DDR to DDR SW global 0 trigger test in interrupt mode",
1659         .disableInfo= NULL,
1660         .printEnable= PRINT_ENABLE,
1661         .prfEnable  = PRF_DISABLE,
1662         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
1663         .dcEnable   = DATA_CHECK_ENABLE,
1664         .loopCnt    = USE_DEF_LP_CNT,
1665         .numTasks   = 1U,
1666         .testType   = {UDMA_TT_DRU_INDIRECT},
1667         .testFxnPtr = {&udmaTestBlkcpyTc},
1668         .pacingTime = {PACING_NONE},
1669         .numCh      = {1U},
1670         .instId     = {UDMA_INST_ID_MAIN_0},
1671         .chPrmId    = {UDMA_TEST_CH_PRMID_TRIGGER_GLOBAL0_INTR},
1672         .qdepth     = {USE_DEF_QDEPTH},
1673         .icnt       = {
1674                         {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
1675                       },
1676         .dicnt      = {
1677                         {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
1678                       },
1679         .dim        = {
1680                         {0U, 0U, 0U}
1681                       },
1682         .ddim       = {
1683                         {0U, 0U, 0U}
1684                       },
1685         .heapIdSrc  = {DEF_HEAP_ID},
1686         .heapIdDest = {DEF_HEAP_ID},
1687         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
1688         .destBufSize= {UDMA_TEST_DEF_DICNT0},
1689         .runFlag    = (UDMA_TEST_RF_DRU),
1690         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
1691     },
1692 #endif /* #if 0 */
1693 #endif  /* #if defined (UDMA_UTC_ID_MSMC_DRU0) */
1694 #if (UDMA_SOC_CFG_PROXY_PRESENT == 1)
1695     {
1696         .enableTest = TEST_ENABLE,
1697         .tcId       = 3507U,
1698         .tcName     = "Proxy queue and dequeue testcase",
1699         .disableInfo= NULL,
1700         .printEnable= PRINT_ENABLE,
1701         .prfEnable  = PRF_DISABLE,
1702         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
1703         .dcEnable   = DATA_CHECK_ENABLE,
1704         .loopCnt    = 5U,
1705         .numTasks   = 1U,
1706         .testType   = {UDMA_TT_MISC},
1707         .testFxnPtr = {&udmaTestRingProxyTc},
1708         /* All other below parameters not used in this testcase except ring params */
1709         .pacingTime = {PACING_NONE},
1710         .numCh      = {1U},
1711         .instId     = {UDMA_TEST_DEFAULT_UDMA_INST},
1712         .chPrmId    = {UDMA_TEST_CH_PRMID_DEF},
1713         .qdepth     = {USE_DEF_QDEPTH},
1714         .icnt       = {
1715                         {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
1716                       },
1717         .dicnt      = {
1718                         {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
1719                       },
1720         .dim        = {
1721                         {0U, 0U, 0U}
1722                       },
1723         .ddim       = {
1724                         {0U, 0U, 0U}
1725                       },
1726         .heapIdSrc  = {DEF_HEAP_ID},
1727         .heapIdDest = {DEF_HEAP_ID},
1728         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
1729         .destBufSize= {UDMA_TEST_DEF_DICNT0},
1730         .runFlag    = (UDMA_TEST_RF_SOC_ALL | UDMA_TEST_RF_CORE_ALL | UDMA_TEST_RF_CFG_DEF | UDMA_TEST_RF_CFG_DYN),
1731         .ringPrmId  = UDMA_TEST_RING_PRMID_EVENT_NONE,
1732     },
1733 #endif /* #if (UDMA_SOC_CFG_PROXY_PRESENT == 1) */
1734     {
1735         .enableTest = TEST_ENABLE,
1736         .tcId       = 3508U,
1737         .tcName     = "Ring flush API testcase",
1738         .disableInfo= NULL,
1739         .printEnable= PRINT_ENABLE,
1740         .prfEnable  = PRF_DISABLE,
1741         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
1742         .dcEnable   = DATA_CHECK_ENABLE,
1743         .loopCnt    = 1U,
1744         .numTasks   = 1U,
1745         .testType   = {UDMA_TT_MISC},
1746         .testFxnPtr = {&udmaTestRingFlushTc},
1747         /* All other below parameters not used in this testcase except ring params */
1748         .pacingTime = {PACING_NONE},
1749         .numCh      = {1U},
1750         .instId     = {UDMA_TEST_DEFAULT_UDMA_INST},
1751         .chPrmId    = {UDMA_TEST_CH_PRMID_DEF},
1752         .qdepth     = {USE_DEF_QDEPTH},
1753         .icnt       = {
1754                         {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
1755                       },
1756         .dicnt      = {
1757                         {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
1758                       },
1759         .dim        = {
1760                         {0U, 0U, 0U}
1761                       },
1762         .ddim       = {
1763                         {0U, 0U, 0U}
1764                       },
1765         .heapIdSrc  = {DEF_HEAP_ID},
1766         .heapIdDest = {DEF_HEAP_ID},
1767         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
1768         .destBufSize= {UDMA_TEST_DEF_DICNT0},
1769         .runFlag    = (UDMA_TEST_RF_SOC_ALL | UDMA_TEST_RF_CORE_ALL | UDMA_TEST_RF_CFG_DEF | UDMA_TEST_RF_CFG_DYN),
1770         .ringPrmId  = UDMA_TEST_RING_PRMID_EVENT_NONE,
1771     },
1772 #if (UDMA_SOC_CFG_RA_NORMAL_PRESENT == 1)    
1773     {
1774         .enableTest = TEST_ENABLE,
1775         .tcId       = 3509U,
1776         .tcName     = "Ring event testcase in interrupt mode",
1777         .disableInfo= NULL,
1778         .printEnable= PRINT_ENABLE,
1779         .prfEnable  = PRF_DISABLE,
1780         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
1781         .dcEnable   = DATA_CHECK_ENABLE,
1782         .loopCnt    = 10U,
1783         .numTasks   = 1U,
1784         .testType   = {UDMA_TT_MISC},
1785         .testFxnPtr = {&udmaTestRingEventTc},
1786         /* All other below parameters not used in this testcase except ring params */
1787         .pacingTime = {PACING_NONE},
1788         .numCh      = {1U},
1789         .instId     = {UDMA_TEST_DEFAULT_UDMA_INST},
1790         .chPrmId    = {UDMA_TEST_CH_PRMID_DEF},
1791         .qdepth     = {USE_DEF_QDEPTH},
1792         .icnt       = {
1793                         {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
1794                       },
1795         .dicnt      = {
1796                         {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
1797                       },
1798         .dim        = {
1799                         {0U, 0U, 0U}
1800                       },
1801         .ddim       = {
1802                         {0U, 0U, 0U}
1803                       },
1804         .heapIdSrc  = {DEF_HEAP_ID},
1805         .heapIdDest = {DEF_HEAP_ID},
1806         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
1807         .destBufSize= {UDMA_TEST_DEF_DICNT0},
1808         .runFlag    = (UDMA_TEST_RF_SOC_ALL | UDMA_TEST_RF_CORE_ALL | UDMA_TEST_RF_CFG_DEF | UDMA_TEST_RF_CFG_DYN),
1809         .ringPrmId  = UDMA_TEST_RING_PRMID_EVENT_INTR,
1810     },
1811     {
1812         .enableTest = TEST_ENABLE,
1813         .tcId       = 3510U,
1814         .tcName     = "Ring event testcase in event polled mode",
1815         .disableInfo= NULL,
1816         .printEnable= PRINT_ENABLE,
1817         .prfEnable  = PRF_DISABLE,
1818         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
1819         .dcEnable   = DATA_CHECK_ENABLE,
1820         .loopCnt    = 10U,
1821         .numTasks   = 1U,
1822         .testType   = {UDMA_TT_MISC},
1823         .testFxnPtr = {&udmaTestRingEventTc},
1824         /* All other below parameters not used in this testcase except ring params */
1825         .pacingTime = {PACING_NONE},
1826         .numCh      = {1U},
1827         .instId     = {UDMA_TEST_DEFAULT_UDMA_INST},
1828         .chPrmId    = {UDMA_TEST_CH_PRMID_DEF},
1829         .qdepth     = {USE_DEF_QDEPTH},
1830         .icnt       = {
1831                         {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
1832                       },
1833         .dicnt      = {
1834                         {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
1835                       },
1836         .dim        = {
1837                         {0U, 0U, 0U}
1838                       },
1839         .ddim       = {
1840                         {0U, 0U, 0U}
1841                       },
1842         .heapIdSrc  = {DEF_HEAP_ID},
1843         .heapIdDest = {DEF_HEAP_ID},
1844         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
1845         .destBufSize= {UDMA_TEST_DEF_DICNT0},
1846         .runFlag    = (UDMA_TEST_RF_SOC_ALL | UDMA_TEST_RF_CORE_ALL | UDMA_TEST_RF_CFG_DEF | UDMA_TEST_RF_CFG_DYN),
1847         .ringPrmId  = UDMA_TEST_RING_PRMID_EVENT_POLLED,
1848     },
1849 #endif /* #if (UDMA_SOC_CFG_RA_NORMAL_PRESENT == 1) */
1850     {
1851         .enableTest = TEST_ENABLE,
1852         .tcId       = 3511U,
1853         .tcName     = "Ring parameter check test",
1854         .disableInfo= NULL,
1855         .printEnable= PRINT_ENABLE,
1856         .prfEnable  = PRF_DISABLE,
1857         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_NEGATIVE),
1858         .dcEnable   = DATA_CHECK_ENABLE,
1859         .loopCnt    = 1U,
1860         .numTasks   = 1U,
1861         .testType   = {UDMA_TT_MISC},
1862         .testFxnPtr = {&udmaTestRingParamCheckTc},
1863         /* All other below parameters not used in this testcase except ring params */
1864         .pacingTime = {PACING_NONE},
1865         .numCh      = {1U},
1866         .instId     = {UDMA_TEST_DEFAULT_UDMA_INST},
1867         .chPrmId    = {UDMA_TEST_CH_PRMID_DEF},
1868         .qdepth     = {USE_DEF_QDEPTH},
1869         .icnt       = {
1870                         {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
1871                       },
1872         .dicnt      = {
1873                         {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
1874                       },
1875         .dim        = {
1876                         {0U, 0U, 0U}
1877                       },
1878         .ddim       = {
1879                         {0U, 0U, 0U}
1880                       },
1881         .heapIdSrc  = {DEF_HEAP_ID},
1882         .heapIdDest = {DEF_HEAP_ID},
1883         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
1884         .destBufSize= {UDMA_TEST_DEF_DICNT0},
1885         .runFlag    = (UDMA_TEST_RF_SOC_ALL | UDMA_TEST_RF_CORE_ALL | UDMA_TEST_RF_CFG_DEF | UDMA_TEST_RF_CFG_DYN),
1886         .ringPrmId  = UDMA_TEST_RING_PRMID_EVENT_POLLED,
1887     },
1888     {
1889         .enableTest = TEST_ENABLE,
1890         .tcId       = 3512U,
1891         .tcName     = "Ring Utils Mem Size test",
1892         .disableInfo= NULL,
1893         .printEnable= PRINT_ENABLE,
1894         .prfEnable  = PRF_DISABLE,
1895         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
1896         .dcEnable   = DATA_CHECK_ENABLE,
1897         .loopCnt    = 1U,
1898         .numTasks   = 1U,
1899         .testType   = {UDMA_TT_MISC},
1900         .testFxnPtr = {&udmaTestRingUtilsMemSizeTc},
1901         /* All other below parameters not used in this testcase except ring params */
1902         .pacingTime = {PACING_NONE},
1903         .numCh      = {1U},
1904         .instId     = {UDMA_TEST_DEFAULT_UDMA_INST},
1905         .chPrmId    = {UDMA_TEST_CH_PRMID_DEF},
1906         .qdepth     = {USE_DEF_QDEPTH},
1907         .icnt       = {
1908                         {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
1909                       },
1910         .dicnt      = {
1911                         {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
1912                       },
1913         .dim        = {
1914                         {0U, 0U, 0U}
1915                       },
1916         .ddim       = {
1917                         {0U, 0U, 0U}
1918                       },
1919         .heapIdSrc  = {DEF_HEAP_ID},
1920         .heapIdDest = {DEF_HEAP_ID},
1921         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
1922         .destBufSize= {UDMA_TEST_DEF_DICNT0},
1923         .runFlag    = (UDMA_TEST_RF_SOC_ALL | UDMA_TEST_RF_CORE_ALL | UDMA_TEST_RF_CFG_DEF | UDMA_TEST_RF_CFG_DYN),
1924         .ringPrmId  = UDMA_TEST_RING_PRMID_EVENT_POLLED,
1925     },
1926     {
1927         .enableTest = TEST_ENABLE,
1928         .tcId       = 3682U,
1929         .tcName     = "Ring Mem Pointer test",
1930         .disableInfo= NULL,
1931         .printEnable= PRINT_ENABLE,
1932         .prfEnable  = PRF_DISABLE,
1933         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
1934         .dcEnable   = DATA_CHECK_ENABLE,
1935         .loopCnt    = 1U,
1936         .numTasks   = 1U,
1937         .testType   = {UDMA_TT_MISC},
1938         .testFxnPtr = {&udmaTestRingMemPtrTc},
1939         /* All other below parameters not used in this testcase except ring params */
1940         .pacingTime = {PACING_NONE},
1941         .numCh      = {1U},
1942         .instId     = {UDMA_TEST_DEFAULT_UDMA_INST},
1943         .chPrmId    = {UDMA_TEST_CH_PRMID_DEF},
1944         .qdepth     = {USE_DEF_QDEPTH},
1945         .icnt       = {
1946                         {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
1947                       },
1948         .dicnt      = {
1949                         {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
1950                       },
1951         .dim        = {
1952                         {0U, 0U, 0U}
1953                       },
1954         .ddim       = {
1955                         {0U, 0U, 0U}
1956                       },
1957         .heapIdSrc  = {DEF_HEAP_ID},
1958         .heapIdDest = {DEF_HEAP_ID},
1959         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
1960         .destBufSize= {UDMA_TEST_DEF_DICNT0},
1961         .runFlag    = (UDMA_TEST_RF_SOC_ALL | UDMA_TEST_RF_CORE_ALL | UDMA_TEST_RF_CFG_DEF | UDMA_TEST_RF_CFG_DYN),
1962         .ringPrmId  = UDMA_TEST_RING_PRMID_EVENT_POLLED,
1963     },
1964     {
1965         .enableTest = TEST_ENABLE,
1966         .tcId       = 3726U,
1967         .tcName     = "Ring attach and detach testcase",
1968         .disableInfo= NULL,
1969         .printEnable= PRINT_ENABLE,
1970         .prfEnable  = PRF_DISABLE,
1971         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
1972         .dcEnable   = DATA_CHECK_ENABLE,
1973         .loopCnt    = 5U,
1974         .numTasks   = 1U,
1975         .testType   = {UDMA_TT_MISC},
1976         .testFxnPtr = {&udmaTestRingAttachTc},
1977         /* All other below parameters not used in this testcase except ring params */
1978         .pacingTime = {PACING_NONE},
1979         .numCh      = {1U},
1980         .instId     = {UDMA_TEST_DEFAULT_UDMA_INST},
1981         .chPrmId    = {UDMA_TEST_CH_PRMID_DEF},
1982         .qdepth     = {USE_DEF_QDEPTH},
1983         .icnt       = {
1984                         {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
1985                       },
1986         .dicnt      = {
1987                         {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
1988                       },
1989         .dim        = {
1990                         {0U, 0U, 0U}
1991                       },
1992         .ddim       = {
1993                         {0U, 0U, 0U}
1994                       },
1995         .heapIdSrc  = {DEF_HEAP_ID},
1996         .heapIdDest = {DEF_HEAP_ID},
1997         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
1998         .destBufSize= {UDMA_TEST_DEF_DICNT0},
1999         .runFlag    = (UDMA_TEST_RF_SOC_ALL | UDMA_TEST_RF_CORE_ALL | UDMA_TEST_RF_CFG_DEF | UDMA_TEST_RF_CFG_DYN),
2000         .ringPrmId  = UDMA_TEST_RING_PRMID_EVENT_NONE,
2001     },
2002     {
2003         .enableTest = TEST_ENABLE,
2004         .tcId       = 4644U,
2005         .tcName     = "Ring reset workaround test",
2006         .disableInfo= NULL,
2007         .printEnable= PRINT_ENABLE,
2008         .prfEnable  = PRF_DISABLE,
2009         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
2010         .dcEnable   = DATA_CHECK_ENABLE,
2011         .loopCnt    = 1U,
2012         .numTasks   = 1U,
2013         .testType   = {UDMA_TT_MISC},
2014         .testFxnPtr = {&udmaTestRingResetTc},
2015         /* All other below parameters not used in this testcase except ring params */
2016         .pacingTime = {PACING_NONE},
2017         .numCh      = {1U},
2018         .instId     = {UDMA_TEST_DEFAULT_UDMA_INST},
2019         .chPrmId    = {UDMA_TEST_CH_PRMID_DEF},
2020         .qdepth     = {USE_DEF_QDEPTH},
2021         .icnt       = {
2022                         {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
2023                       },
2024         .dicnt      = {
2025                         {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
2026                       },
2027         .dim        = {
2028                         {0U, 0U, 0U}
2029                       },
2030         .ddim       = {
2031                         {0U, 0U, 0U}
2032                       },
2033         .heapIdSrc  = {DEF_HEAP_ID},
2034         .heapIdDest = {DEF_HEAP_ID},
2035         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
2036         .destBufSize= {UDMA_TEST_DEF_DICNT0},
2037         .runFlag    = (UDMA_TEST_RF_SOC_AM65XX | UDMA_TEST_RF_CORE_ALL | UDMA_TEST_RF_CFG_DEF | UDMA_TEST_RF_CFG_DYN),
2038         .ringPrmId  = UDMA_TEST_RING_PRMID_EVENT_NONE,
2039     },
2040 #if (UDMA_SOC_CFG_RA_NORMAL_PRESENT == 1)
2041     {
2042         .enableTest = TEST_ENABLE,
2043         .tcId       = 4693U,
2044         .tcName     = "Ring prime test",
2045         .disableInfo= NULL,
2046         .printEnable= PRINT_ENABLE,
2047         .prfEnable  = PRF_DISABLE,
2048         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
2049         .dcEnable   = DATA_CHECK_ENABLE,
2050         .loopCnt    = 1U,
2051         .numTasks   = 1U,
2052         .testType   = {UDMA_TT_MISC},
2053         .testFxnPtr = {&udmaTestRingPrimeTc},
2054         /* All other below parameters not used in this testcase except ring params */
2055         .pacingTime = {PACING_NONE},
2056         .numCh      = {1U},
2057         .instId     = {UDMA_TEST_DEFAULT_UDMA_INST},
2058         .chPrmId    = {UDMA_TEST_CH_PRMID_DEF},
2059         .qdepth     = {USE_DEF_QDEPTH},
2060         .icnt       = {
2061                         {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
2062                       },
2063         .dicnt      = {
2064                         {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
2065                       },
2066         .dim        = {
2067                         {0U, 0U, 0U}
2068                       },
2069         .ddim       = {
2070                         {0U, 0U, 0U}
2071                       },
2072         .heapIdSrc  = {DEF_HEAP_ID},
2073         .heapIdDest = {DEF_HEAP_ID},
2074         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
2075         .destBufSize= {UDMA_TEST_DEF_DICNT0},
2076         .runFlag    = (UDMA_TEST_RF_SOC_ALL | UDMA_TEST_RF_CORE_ALL | UDMA_TEST_RF_CFG_DEF | UDMA_TEST_RF_CFG_DYN),
2077         .ringPrmId  = UDMA_TEST_RING_PRMID_EVENT_NONE,
2078     },
2079 #endif /* #if (UDMA_SOC_CFG_RA_NORMAL_PRESENT == 1) */
2080 #if (UDMA_SOC_CFG_RA_LCDMA_PRESENT == 1)
2081     {
2082         /* For LCDMA with Dual ring, 
2083          * Ring Prime Read checks for Reverse occupancy.
2084          * In this case, actual transfer should happen to populate
2085          * reverse occupancy count and successfully do a ring prime read.
2086          * This testcase, implements block copy using ring prime API's 
2087          * This tests only Ring Prime API's.
2088          * Data check and TR Responce checks are NOT carried out.*/
2089         .enableTest = TEST_ENABLE,
2090         .tcId       = 8837U,
2091         .tcName     = "LCDMA Ring Prime Test",
2092         .disableInfo= NULL,
2093         .printEnable= PRINT_ENABLE,
2094         .prfEnable  = PRF_DISABLE,
2095         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
2096         .dcEnable   = DATA_CHECK_DISABLE,
2097         .loopCnt    = 1U,
2098         .numTasks   = 1U,
2099         .numCh      = {1U},
2100         .instId     = {UDMA_TEST_INST_ID_BCDMA_BC},
2101         .testType   = {UDMA_TT_MISC},
2102         .testFxnPtr = {&udmaTestRingPrimeLcdmaTc},
2103         .qdepth     = {500U},
2104         .pacingTime = {PACING_NONE},
2105         .chPrmId    = {UDMA_TEST_CH_PRMID_DEF},
2106         .icnt       = {
2107                         {16U, 1U, 1U, 1U}
2108                       },
2109         .dicnt      = {
2110                         {16U, 1U, 1U, 1U}
2111                       },
2112         .dim        = {
2113                         {0U, 0U, 0U}
2114                       },
2115         .ddim       = {
2116                         {0U, 0U, 0U}
2117                       },
2118         .heapIdSrc  = {DEF_HEAP_ID},
2119         .heapIdDest = {DEF_HEAP_ID},
2120         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
2121         .destBufSize= {UDMA_TEST_DEF_DICNT0},
2122         .runFlag    = (UDMA_TEST_RF_BCDMA_BC | UDMA_TEST_RF_CFG_DYN),
2123         .ringPrmId  = UDMA_TEST_RING_PRMID_EVENT_NONE,
2124     },
2125 #endif /* #if (UDMA_SOC_CFG_RA_LCDMA_PRESENT == 1) */
2126 #if (UDMA_SOC_CFG_RING_MON_PRESENT == 1)
2127     {
2128         .enableTest = TEST_ENABLE,
2129         .tcId       = 4636U,
2130         .tcName     = "Ring Monitor Push and Pop Mode test",
2131         .disableInfo= NULL,
2132         .printEnable= PRINT_ENABLE,
2133         .prfEnable  = PRF_DISABLE,
2134         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
2135         .dcEnable   = DATA_CHECK_ENABLE,
2136         .loopCnt    = 1U,
2137         .numTasks   = 1U,
2138         .testType   = {UDMA_TT_MISC},
2139         .testFxnPtr = {&udmaTestRingMonPushPopTc},
2140         /* All other below parameters not used in this testcase except ring params */
2141         .pacingTime = {PACING_NONE},
2142         .numCh      = {1U},
2143         .instId     = {UDMA_TEST_DEFAULT_UDMA_INST},
2144         .chPrmId    = {UDMA_TEST_CH_PRMID_DEF},
2145         .qdepth     = {USE_DEF_QDEPTH},
2146         .icnt       = {
2147                         {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
2148                       },
2149         .dicnt      = {
2150                         {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
2151                       },
2152         .dim        = {
2153                         {0U, 0U, 0U}
2154                       },
2155         .ddim       = {
2156                         {0U, 0U, 0U}
2157                       },
2158         .heapIdSrc  = {DEF_HEAP_ID},
2159         .heapIdDest = {DEF_HEAP_ID},
2160         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
2161         .destBufSize= {UDMA_TEST_DEF_DICNT0},
2162         .runFlag    = (UDMA_TEST_RF_SOC_J721E | UDMA_TEST_RF_CORE_ALL | UDMA_TEST_RF_CFG_DEF | UDMA_TEST_RF_CFG_DYN),
2163         .ringPrmId  = UDMA_TEST_RING_PRMID_EVENT_NONE,
2164     },
2165     {
2166         .enableTest = TEST_ENABLE,
2167         .tcId       = 4637U,
2168         .tcName     = "Ring Monitor Low Threshold Mode test",
2169         .disableInfo= NULL,
2170         .printEnable= PRINT_ENABLE,
2171         .prfEnable  = PRF_DISABLE,
2172         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
2173         .dcEnable   = DATA_CHECK_ENABLE,
2174         .loopCnt    = 1U,
2175         .numTasks   = 1U,
2176         .testType   = {UDMA_TT_MISC},
2177         .testFxnPtr = {&udmaTestRingMonLowThresholdTc},
2178         /* All other below parameters not used in this testcase except ring params */
2179         .pacingTime = {PACING_NONE},
2180         .numCh      = {1U},
2181         .instId     = {UDMA_TEST_DEFAULT_UDMA_INST},
2182         .chPrmId    = {UDMA_TEST_CH_PRMID_DEF},
2183         .qdepth     = {USE_DEF_QDEPTH},
2184         .icnt       = {
2185                         {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
2186                       },
2187         .dicnt      = {
2188                         {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
2189                       },
2190         .dim        = {
2191                         {0U, 0U, 0U}
2192                       },
2193         .ddim       = {
2194                         {0U, 0U, 0U}
2195                       },
2196         .heapIdSrc  = {DEF_HEAP_ID},
2197         .heapIdDest = {DEF_HEAP_ID},
2198         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
2199         .destBufSize= {UDMA_TEST_DEF_DICNT0},
2200         .runFlag    = (UDMA_TEST_RF_SOC_J721E | UDMA_TEST_RF_CORE_ALL | UDMA_TEST_RF_CFG_DEF | UDMA_TEST_RF_CFG_DYN),
2201         .ringPrmId  = UDMA_TEST_RING_PRMID_EVENT_NONE,
2202     },
2203     {
2204         .enableTest = TEST_ENABLE,
2205         .tcId       = 4638U,
2206         .tcName     = "Ring Monitor High Threshold Mode test",
2207         .disableInfo= NULL,
2208         .printEnable= PRINT_ENABLE,
2209         .prfEnable  = PRF_DISABLE,
2210         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
2211         .dcEnable   = DATA_CHECK_ENABLE,
2212         .loopCnt    = 1U,
2213         .numTasks   = 1U,
2214         .testType   = {UDMA_TT_MISC},
2215         .testFxnPtr = {&udmaTestRingMonHighThresholdTc},
2216         /* All other below parameters not used in this testcase except ring params */
2217         .pacingTime = {PACING_NONE},
2218         .numCh      = {1U},
2219         .instId     = {UDMA_TEST_DEFAULT_UDMA_INST},
2220         .chPrmId    = {UDMA_TEST_CH_PRMID_DEF},
2221         .qdepth     = {USE_DEF_QDEPTH},
2222         .icnt       = {
2223                         {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
2224                       },
2225         .dicnt      = {
2226                         {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
2227                       },
2228         .dim        = {
2229                         {0U, 0U, 0U}
2230                       },
2231         .ddim       = {
2232                         {0U, 0U, 0U}
2233                       },
2234         .heapIdSrc  = {DEF_HEAP_ID},
2235         .heapIdDest = {DEF_HEAP_ID},
2236         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
2237         .destBufSize= {UDMA_TEST_DEF_DICNT0},
2238         .runFlag    = (UDMA_TEST_RF_SOC_J721E | UDMA_TEST_RF_CORE_ALL | UDMA_TEST_RF_CFG_DEF | UDMA_TEST_RF_CFG_DYN),
2239         .ringPrmId  = UDMA_TEST_RING_PRMID_EVENT_NONE,
2240     },
2241 #endif /* #if (UDMA_SOC_CFG_RING_MON_PRESENT == 1) */
2242 #if (UDMA_SOC_CFG_PROXY_PRESENT == 1)
2243     {
2244         .enableTest = TEST_ENABLE,
2245         .tcId       = 4238U,
2246         .tcName     = "Proxy queue and dequeue testcase with allocated proxy",
2247         .disableInfo= NULL,
2248         .printEnable= PRINT_ENABLE,
2249         .prfEnable  = PRF_ENABLE,
2250         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL | UDMA_TCT_PERFORMANCE),
2251         .dcEnable   = DATA_CHECK_ENABLE,
2252         .loopCnt    = UDMA_TEST_PERF_LOOP_CNT,
2253         .numTasks   = 1U,
2254         .testType   = {UDMA_TT_MISC},
2255         .testFxnPtr = {&udmaTestProxyPerformanceTc},
2256         /* All other below parameters not used in this testcase except ring params */
2257         .pacingTime = {PACING_NONE},
2258         .numCh      = {1U},
2259         .instId     = {UDMA_TEST_DEFAULT_UDMA_INST},
2260         .chPrmId    = {UDMA_TEST_CH_PRMID_DEF},
2261         .qdepth     = {USE_DEF_QDEPTH},
2262         .icnt       = {
2263                         {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
2264                       },
2265         .dicnt      = {
2266                         {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
2267                       },
2268         .dim        = {
2269                         {0U, 0U, 0U}
2270                       },
2271         .ddim       = {
2272                         {0U, 0U, 0U}
2273                       },
2274         .heapIdSrc  = {DEF_HEAP_ID},
2275         .heapIdDest = {DEF_HEAP_ID},
2276         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
2277         .destBufSize= {UDMA_TEST_DEF_DICNT0},
2278         .runFlag    = (UDMA_TEST_RF_SOC_ALL | UDMA_TEST_RF_CORE_ALL | UDMA_TEST_RF_CFG_DEF | UDMA_TEST_RF_CFG_DYN),
2279         .ringPrmId  = UDMA_TEST_RING_PRMID_EVENT_NONE,
2280     },
2281 #endif /* #if (UDMA_SOC_CFG_PROXY_PRESENT == 1) */
2282 #if ((UDMA_NUM_MAPPED_TX_GROUP + UDMA_NUM_MAPPED_RX_GROUP) > 0)
2283     {
2284         .enableTest = TEST_ENABLE,
2285         .tcId       = 7034U,
2286         .tcName     = "Mapped Flow attach and detach testcase",
2287         .disableInfo= NULL,
2288         .printEnable= PRINT_ENABLE,
2289         .prfEnable  = PRF_DISABLE,
2290         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
2291         .dcEnable   = DATA_CHECK_ENABLE,
2292         .loopCnt    = 5U,
2293         .numTasks   = 1U,
2294         .testType   = {UDMA_TT_MISC},
2295         .testFxnPtr = {&udmaTestFlowAttachMappedTc},
2296         /* All other below parameters not used in this testcase except ring params */
2297         .pacingTime = {PACING_NONE},
2298         .numCh      = {1U},
2299         .instId     = {UDMA_TEST_INST_ID_FLOW},
2300         .chPrmId    = {UDMA_TEST_CH_PRMID_DEF},
2301         .qdepth     = {USE_DEF_QDEPTH},
2302         .icnt       = {
2303                         {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
2304                       },
2305         .dicnt      = {
2306                         {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
2307                       },
2308         .dim        = {
2309                         {0U, 0U, 0U}
2310                       },
2311         .ddim       = {
2312                         {0U, 0U, 0U}
2313                       },
2314         .heapIdSrc  = {DEF_HEAP_ID},
2315         .heapIdDest = {DEF_HEAP_ID},
2316         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
2317         .destBufSize= {UDMA_TEST_DEF_DICNT0},
2318         .runFlag    = (UDMA_TEST_RF_FLOW | UDMA_TEST_RF_CFG_DYN),
2319         .ringPrmId  = UDMA_TEST_RING_PRMID_EVENT_NONE,
2320     },
2321 #else /* #if ((UDMA_NUM_MAPPED_TX_GROUP + UDMA_NUM_MAPPED_RX_GROUP) > 0) */
2322     {
2323         .enableTest = TEST_ENABLE,
2324         .tcId       = 3729U,
2325         .tcName     = "Flow attach and detach testcase",
2326         .disableInfo= NULL,
2327         .printEnable= PRINT_ENABLE,
2328         .prfEnable  = PRF_DISABLE,
2329         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
2330         .dcEnable   = DATA_CHECK_ENABLE,
2331         .loopCnt    = 5U,
2332         .numTasks   = 1U,
2333         .testType   = {UDMA_TT_MISC},
2334         .testFxnPtr = {&udmaTestFlowAttachTc},
2335         /* All other below parameters not used in this testcase except ring params */
2336         .pacingTime = {PACING_NONE},
2337         .numCh      = {1U},
2338         .instId     = {UDMA_TEST_DEFAULT_UDMA_INST},
2339         .chPrmId    = {UDMA_TEST_CH_PRMID_DEF},
2340         .qdepth     = {USE_DEF_QDEPTH},
2341         .icnt       = {
2342                         {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
2343                       },
2344         .dicnt      = {
2345                         {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
2346                       },
2347         .dim        = {
2348                         {0U, 0U, 0U}
2349                       },
2350         .ddim       = {
2351                         {0U, 0U, 0U}
2352                       },
2353         .heapIdSrc  = {DEF_HEAP_ID},
2354         .heapIdDest = {DEF_HEAP_ID},
2355         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
2356         .destBufSize= {UDMA_TEST_DEF_DICNT0},
2357         .runFlag    = (UDMA_TEST_RF_FLOW | UDMA_TEST_RF_CFG_DYN),
2358         .ringPrmId  = UDMA_TEST_RING_PRMID_EVENT_NONE,
2359     },
2360     {
2361         /* This tests the failure for allocating flows more than actual count.
2362          * So this is not applicable in case of mapped flows, which allocates only one at a time.
2363          * Hence the testcase is not appicable for mapped flows. */
2364         .enableTest = TEST_ENABLE,
2365         .tcId       = 4154U,
2366         .tcName     = "Flow alloc and free testcase",
2367         .disableInfo= NULL,
2368         .printEnable= PRINT_ENABLE,
2369         .prfEnable  = PRF_DISABLE,
2370         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
2371         .dcEnable   = DATA_CHECK_ENABLE,
2372         .loopCnt    = 1U,
2373         .numTasks   = 1U,
2374         .testType   = {UDMA_TT_MISC},
2375         .testFxnPtr = {&udmaTestFlowAllocTc},
2376         /* All other below parameters not used in this testcase except ring params */
2377         .pacingTime = {PACING_NONE},
2378         .numCh      = {1U},
2379         .instId     = {UDMA_TEST_DEFAULT_UDMA_INST},
2380         .chPrmId    = {UDMA_TEST_CH_PRMID_DEF},
2381         .qdepth     = {USE_DEF_QDEPTH},
2382         .icnt       = {
2383                         {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
2384                       },
2385         .dicnt      = {
2386                         {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
2387                       },
2388         .dim        = {
2389                         {0U, 0U, 0U}
2390                       },
2391         .ddim       = {
2392                         {0U, 0U, 0U}
2393                       },
2394         .heapIdSrc  = {DEF_HEAP_ID},
2395         .heapIdDest = {DEF_HEAP_ID},
2396         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
2397         .destBufSize= {UDMA_TEST_DEF_DICNT0},
2398         .runFlag    = (UDMA_TEST_RF_FLOW | UDMA_TEST_RF_CFG_DYN),
2399         .ringPrmId  = UDMA_TEST_RING_PRMID_EVENT_NONE,
2400     },
2401 #endif /* #if ((UDMA_NUM_MAPPED_TX_GROUP + UDMA_NUM_MAPPED_RX_GROUP) > 0) */
2402     {
2403         .enableTest = TEST_ENABLE,
2404         .tcId       = 3513U,
2405         .tcName     = "PSIL and PDMA macro verification testcase",
2406         .disableInfo= NULL,
2407         .printEnable= PRINT_ENABLE,
2408         .prfEnable  = PRF_DISABLE,
2409         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
2410         .dcEnable   = DATA_CHECK_ENABLE,
2411         .loopCnt    = USE_DEF_LP_CNT,
2412         .numTasks   = 1U,
2413         .testType   = {UDMA_TT_MISC},
2414         .testFxnPtr = {&udmaTestPsilMacroTc},
2415         /* All other below parameters not used in this testcase */
2416         .pacingTime = {PACING_NONE},
2417         .numCh      = {1U},
2418         .instId     = {UDMA_TEST_DEFAULT_UDMA_INST},
2419         .chPrmId    = {UDMA_TEST_CH_PRMID_DEF},
2420         .qdepth     = {USE_DEF_QDEPTH},
2421         .icnt       = {
2422                         {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
2423                       },
2424         .dicnt      = {
2425                         {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
2426                       },
2427         .dim        = {
2428                         {0U, 0U, 0U}
2429                       },
2430         .ddim       = {
2431                         {0U, 0U, 0U}
2432                       },
2433         .heapIdSrc  = {DEF_HEAP_ID},
2434         .heapIdDest = {DEF_HEAP_ID},
2435         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
2436         .destBufSize= {UDMA_TEST_DEF_DICNT0},
2437         .runFlag    = (UDMA_TEST_RF_SOC_ALL | UDMA_TEST_RF_CORE_ALL | UDMA_TEST_RF_CFG_DEF),
2438         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
2439     },
2440     {
2441         .enableTest = TEST_ENABLE,
2442         .tcId       = 3514U,
2443         .tcName     = "OSAL params testcase",
2444         .disableInfo= NULL,
2445         .printEnable= PRINT_ENABLE,
2446         .prfEnable  = PRF_DISABLE,
2447         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
2448         .dcEnable   = DATA_CHECK_ENABLE,
2449         .loopCnt    = USE_DEF_LP_CNT,
2450         .numTasks   = 1U,
2451         .testType   = {UDMA_TT_MISC},
2452         .testFxnPtr = {&udmaTestOsalPrmsTc},
2453         .pacingTime = {PACING_NONE},
2454         .numCh      = {1U},
2455         .instId     = {UDMA_TEST_DEFAULT_UDMA_INST},
2456         .chPrmId    = {UDMA_TEST_CH_PRMID_INTR_DEF},
2457         .qdepth     = {USE_DEF_QDEPTH},
2458         .icnt       = {
2459                         {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
2460                       },
2461         .dicnt      = {
2462                         {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
2463                       },
2464         .dim        = {
2465                         {0U, 0U, 0U}
2466                       },
2467         .ddim       = {
2468                         {0U, 0U, 0U}
2469                       },
2470         .heapIdSrc  = {DEF_HEAP_ID},
2471         .heapIdDest = {DEF_HEAP_ID},
2472         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
2473         .destBufSize= {UDMA_TEST_DEF_DICNT0},
2474         .runFlag    = (UDMA_TEST_RF_SOC_ALL | UDMA_TEST_RF_CORE_ALL | UDMA_TEST_RF_CFG_DEF | UDMA_TEST_RF_CFG_DYN),
2475         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
2476     },
2477     {
2478         .enableTest = TEST_ENABLE,
2479         .tcId       = 3515U,
2480         .tcName     = "TR make utility testcase",
2481         .disableInfo= NULL,
2482         .printEnable= PRINT_ENABLE,
2483         .prfEnable  = PRF_DISABLE,
2484         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
2485         .dcEnable   = DATA_CHECK_ENABLE,
2486         .loopCnt    = USE_DEF_LP_CNT,
2487         .numTasks   = 1U,
2488         .testType   = {UDMA_TT_MISC},
2489         .testFxnPtr = {&udmaTestTrMakeTc},
2490         /* All other below parameters not used in this testcase */
2491         .pacingTime = {PACING_NONE},
2492         .numCh      = {1U},
2493         .instId     = {UDMA_TEST_DEFAULT_UDMA_INST},
2494         .chPrmId    = {UDMA_TEST_CH_PRMID_INTR_DEF},
2495         .qdepth     = {USE_DEF_QDEPTH},
2496         .icnt       = {
2497                         {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
2498                       },
2499         .dicnt      = {
2500                         {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
2501                       },
2502         .dim        = {
2503                         {0U, 0U, 0U}
2504                       },
2505         .ddim       = {
2506                         {0U, 0U, 0U}
2507                       },
2508         .heapIdSrc  = {DEF_HEAP_ID},
2509         .heapIdDest = {DEF_HEAP_ID},
2510         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
2511         .destBufSize= {UDMA_TEST_DEF_DICNT0},
2512         .runFlag    = (UDMA_TEST_RF_SOC_ALL | UDMA_TEST_RF_CORE_ALL | UDMA_TEST_RF_CFG_DEF | UDMA_TEST_RF_CFG_DYN),
2513         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
2514     },
2515     {
2516         .enableTest = TEST_ENABLE,
2517         .tcId       = 3733U,
2518         .tcName     = "UDMA structure size print testcase",
2519         .disableInfo= NULL,
2520         .printEnable= PRINT_ENABLE,
2521         .prfEnable  = PRF_DISABLE,
2522         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
2523         .dcEnable   = DATA_CHECK_ENABLE,
2524         .loopCnt    = USE_DEF_LP_CNT,
2525         .numTasks   = 1U,
2526         .testType   = {UDMA_TT_MISC},
2527         .testFxnPtr = {&udmaTestStructSizeTc},
2528         /* All other below parameters not used in this testcase */
2529         .pacingTime = {PACING_NONE},
2530         .numCh      = {1U},
2531         .instId     = {UDMA_TEST_DEFAULT_UDMA_INST},
2532         .chPrmId    = {UDMA_TEST_CH_PRMID_INTR_DEF},
2533         .qdepth     = {USE_DEF_QDEPTH},
2534         .icnt       = {
2535                         {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
2536                       },
2537         .dicnt      = {
2538                         {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
2539                       },
2540         .dim        = {
2541                         {0U, 0U, 0U}
2542                       },
2543         .ddim       = {
2544                         {0U, 0U, 0U}
2545                       },
2546         .heapIdSrc  = {DEF_HEAP_ID},
2547         .heapIdDest = {DEF_HEAP_ID},
2548         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
2549         .destBufSize= {UDMA_TEST_DEF_DICNT0},
2550         .runFlag    = (UDMA_TEST_RF_SOC_ALL | UDMA_TEST_RF_CORE_ALL | UDMA_TEST_RF_CFG_DEF),
2551         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
2552     },
2553     {
2554         .enableTest = TEST_ENABLE,
2555         .tcId       = 9595U,
2556         .tcName     = "Event Disable and Enable Sanity Check Testcase",
2557         .disableInfo= NULL,
2558         .printEnable= PRINT_ENABLE,
2559         .prfEnable  = PRF_DISABLE,
2560         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
2561         .dcEnable   = DATA_CHECK_ENABLE,
2562         .loopCnt    = 1U,
2563         .numTasks   = 1U,
2564         .testType   = {UDMA_TT_MISC},
2565         .testFxnPtr = {&udmaTestEventDisableEnableSanity},
2566         /* All other below parameters not used in this testcase */
2567         .pacingTime = {PACING_NONE},
2568         .numCh      = {1U},
2569         .instId     = {UDMA_TEST_DEFAULT_UDMA_INST},
2570         .chPrmId    = {UDMA_TEST_CH_PRMID_DEF},
2571         .qdepth     = {USE_DEF_QDEPTH},
2572         .icnt       = {
2573                         {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
2574                       },
2575         .dicnt      = {
2576                         {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
2577                       },
2578         .dim        = {
2579                         {0U, 0U, 0U}
2580                       },
2581         .ddim       = {
2582                         {0U, 0U, 0U}
2583                       },
2584         .heapIdSrc  = {DEF_HEAP_ID},
2585         .heapIdDest = {DEF_HEAP_ID},
2586         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
2587         .destBufSize= {UDMA_TEST_DEF_DICNT0},
2588         .runFlag    = (UDMA_TEST_RF_SOC_ALL | UDMA_TEST_RF_CORE_ALL | UDMA_TEST_RF_CFG_DEF | UDMA_TEST_RF_CFG_DYN),
2589         .ringPrmId  = UDMA_TEST_RING_PRMID_EVENT_NONE,
2590     },
2591 #if (UDMA_SOC_CFG_RA_NORMAL_PRESENT == 1)
2592     {
2593         .enableTest = TEST_ENABLE,
2594         .tcId       = 3707U,
2595         .tcName     = "Out of range flow ID Event testcase",
2596         .disableInfo= NULL,
2597         .printEnable= PRINT_ENABLE,
2598         .prfEnable  = PRF_DISABLE,
2599         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
2600         .dcEnable   = DATA_CHECK_ENABLE,
2601         .loopCnt    = 100U,
2602         .numTasks   = 1U,
2603         .testType   = {UDMA_TT_MISC},
2604         .testFxnPtr = {&udmaTestEventOutOfRangeFlow},
2605         /* All other below parameters not used in this testcase */
2606         .pacingTime = {PACING_NONE},
2607         .numCh      = {1U},
2608         .instId     = {UDMA_TEST_DEFAULT_UDMA_INST},
2609         .chPrmId    = {UDMA_TEST_CH_PRMID_DEF},
2610         .qdepth     = {USE_DEF_QDEPTH},
2611         .icnt       = {
2612                         {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
2613                       },
2614         .dicnt      = {
2615                         {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
2616                       },
2617         .dim        = {
2618                         {0U, 0U, 0U}
2619                       },
2620         .ddim       = {
2621                         {0U, 0U, 0U}
2622                       },
2623         .heapIdSrc  = {DEF_HEAP_ID},
2624         .heapIdDest = {DEF_HEAP_ID},
2625         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
2626         .destBufSize= {UDMA_TEST_DEF_DICNT0},
2627         .runFlag    = (UDMA_TEST_RF_SOC_ALL | UDMA_TEST_RF_CORE_ALL | UDMA_TEST_RF_CFG_DEF | UDMA_TEST_RF_CFG_DYN),
2628         .ringPrmId  = UDMA_TEST_RING_PRMID_EVENT_NONE,
2629     },
2630     {
2631         .enableTest = TEST_ENABLE,
2632         .tcId       = 3905,
2633         .tcName     = "PDK-3863 bug testcase: Udma_chDequeueTdResponse NULL check",
2634         .disableInfo= NULL,
2635         .printEnable= PRINT_ENABLE,
2636         .prfEnable  = PRF_DISABLE,
2637         .tcType     = (UDMA_TCT_FULL | UDMA_TCT_NEGATIVE),
2638         .dcEnable   = DATA_CHECK_ENABLE,
2639         .loopCnt    = USE_DEF_LP_CNT,
2640         .numTasks   = 1U,
2641         .testType   = {UDMA_TT_BLK_CPY},
2642         .testFxnPtr = {&udmaTestBugTcPDK_3863},
2643         .pacingTime = {PACING_NONE},
2644         .numCh      = {1U},
2645         .instId     = {UDMA_TEST_DEFAULT_UDMA_INST},
2646         .chPrmId    = {UDMA_TEST_CH_PRMID_DEF},
2647         .qdepth     = {USE_DEF_QDEPTH},
2648         .icnt       = {
2649                         {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
2650                       },
2651         .dicnt      = {
2652                         {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
2653                       },
2654         .dim        = {
2655                         {0U, 0U, 0U}
2656                       },
2657         .ddim       = {
2658                         {0U, 0U, 0U}
2659                       },
2660         .heapIdSrc  = {DEF_HEAP_ID},
2661         .heapIdDest = {DEF_HEAP_ID},
2662         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
2663         .destBufSize= {UDMA_TEST_DEF_DICNT0},
2664         .runFlag    = (UDMA_TEST_RF_SOC_ALL | UDMA_TEST_RF_CORE_ALL | UDMA_TEST_RF_CFG_DEF | UDMA_TEST_RF_CFG_DYN),
2665         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
2666     },
2667 #endif /* #if (UDMA_SOC_CFG_RA_NORMAL_PRESENT == 1) */
2668     {
2669         .enableTest = TEST_ENABLE,
2670         .tcId       = 3965,
2671         .tcName     = "Channel pause and resume testcase",
2672         .disableInfo= NULL,
2673         .printEnable= PRINT_ENABLE,
2674         .prfEnable  = PRF_DISABLE,
2675         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
2676         .dcEnable   = DATA_CHECK_ENABLE,
2677         .loopCnt    = 1U,
2678         .numTasks   = 1U,
2679         .testType   = {UDMA_TT_BLK_CPY},
2680         .testFxnPtr = {&udmaTestBlkcpyPauseResumeTc},
2681         .pacingTime = {PACING_NONE},
2682         .numCh      = {1U},
2683         .instId     = {UDMA_TEST_INST_ID_MAIN_BC},
2684         .chPrmId    = {UDMA_TEST_CH_PRMID_INTR_DEF},
2685         .qdepth     = {USE_DEF_QDEPTH},
2686         .icnt       = {
2687                         {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
2688                       },
2689         .dicnt      = {
2690                         {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
2691                       },
2692         .dim        = {
2693                         {0U, 0U, 0U}
2694                       },
2695         .ddim       = {
2696                         {0U, 0U, 0U}
2697                       },
2698         .heapIdSrc  = {DEF_HEAP_ID},
2699         .heapIdDest = {DEF_HEAP_ID},
2700         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
2701         .destBufSize= {UDMA_TEST_DEF_DICNT0},
2702         .runFlag    = (UDMA_TEST_RF_MAIN_BC_PAUSE | UDMA_TEST_RF_CFG_DYN),
2703         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
2704     },
2705 #if (UDMA_SOC_CFG_UDMAP_PRESENT == 1)
2706 #ifndef UDMA_TEST_SOC_PRESILICON  
2707     {
2708         .enableTest = TEST_ENABLE,
2709         .tcId       = 4100U,
2710         .tcName     = UDMA_TEST_MAIN_BC_TCNAME_PREFIX "HC Blockcpy DDR 1MB to DDR 1MB performance test",
2711         .disableInfo= NULL,
2712         .printEnable= PRINT_ENABLE,
2713         .prfEnable  = PRF_ENABLE,
2714         .tcType     = (UDMA_TCT_FULL | UDMA_TCT_FUNCTIONAL | UDMA_TCT_PERFORMANCE),
2715         .dcEnable   = DATA_CHECK_DISABLE,
2716         .loopCnt    = UDMA_TEST_PERF_LOOP_CNT,
2717         .numTasks   = 1U,
2718         .testType   = {UDMA_TT_BLK_CPY},
2719         .testFxnPtr = {&udmaTestBlkcpyTc},
2720         .pacingTime = {PACING_NONE},
2721         .numCh      = {1U},
2722         .instId     = {UDMA_TEST_INST_ID_MAIN_BC},
2723         .chPrmId    = {UDMA_TEST_CH_PRMID_BLKCPY_HC_INTR_DEF},
2724         .qdepth     = {UDMA_TEST_PERF_QDEPTH},
2725         .icnt       = {
2726                         {1*KB, 1U, 1*KB, 1U},
2727                       },
2728         .dicnt      = {
2729                         {1*KB, 1U, 1*KB, 1U},
2730                       },
2731         .dim        = {
2732                         {1*KB, 1*KB, 0U},
2733                       },
2734         .ddim       = {
2735                         {1*KB, 1*KB, 0U},
2736                       },
2737         .heapIdSrc  = {UTILS_MEM_HEAP_ID_DDR},
2738         .heapIdDest = {UTILS_MEM_HEAP_ID_DDR},
2739         .srcBufSize = {1*MB},
2740         .destBufSize= {1*MB},
2741         .runFlag    = (UDMA_TEST_RF_MAIN_BC_HC),
2742         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
2743     },
2744     {
2745         .enableTest = TEST_ENABLE,
2746         .tcId       = 4101U,
2747         .tcName     = UDMA_TEST_MAIN_BC_TCNAME_PREFIX "2D HC Blockcpy MSMC circular 1KB to DDR 1MB performance test",
2748         .disableInfo= NULL,
2749         .printEnable= PRINT_ENABLE,
2750         .prfEnable  = PRF_ENABLE,
2751         .tcType     = (UDMA_TCT_FULL | UDMA_TCT_FUNCTIONAL | UDMA_TCT_PERFORMANCE),
2752         .dcEnable   = DATA_CHECK_DISABLE,
2753         .loopCnt    = UDMA_TEST_PERF_LOOP_CNT,
2754         .numTasks   = 1U,
2755         .testType   = {UDMA_TT_BLK_CPY},
2756         .testFxnPtr = {&udmaTestBlkcpyTc},
2757         .pacingTime = {PACING_NONE},
2758         .numCh      = {1U},
2759         .instId     = {UDMA_TEST_INST_ID_MAIN_BC},
2760         .chPrmId    = {UDMA_TEST_CH_PRMID_BLKCPY_HC_INTR_DEF},
2761         .qdepth     = {UDMA_TEST_DEF_QDEPTH},
2762         .icnt       = {
2763                         {1*KB, 1U, 1*KB, 1U}
2764                       },
2765         .dicnt      = {
2766                         {1*KB, 1U, 1*KB, 1U}
2767                       },