Added DRU trigger and event testcases
[processor-sdk/pdk.git] / packages / ti / drv / udma / unit_test / udma_ut / src / udma_testcases.h
1 /*
2  *  Copyright (c) Texas Instruments Incorporated 2018
3  *
4  *  Redistribution and use in source and binary forms, with or without
5  *  modification, are permitted provided that the following conditions
6  *  are met:
7  *
8  *    Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer.
10  *
11  *    Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the
14  *    distribution.
15  *
16  *    Neither the name of Texas Instruments Incorporated nor the names of
17  *    its contributors may be used to endorse or promote products derived
18  *    from this software without specific prior written permission.
19  *
20  *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21  *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22  *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
23  *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
24  *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25  *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26  *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27  *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28  *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29  *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30  *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31  */
33 /**
34  *  \file udma_testcases.h
35  *
36  *  \brief This file defines the test cases for UDMA UT.
37  */
39 #ifndef UDMA_TEST_CASES_H_
40 #define UDMA_TEST_CASES_H_
42 /* ========================================================================== */
43 /*                             Include Files                                  */
44 /* ========================================================================== */
46 #include <udma_test.h>
48 #ifdef __cplusplus
49 extern "C" {
50 #endif
52 /* ========================================================================== */
53 /*                           Macros & Typedefs                                */
54 /* ========================================================================== */
56 #define UDMA_TEST_NUM_TESTCASES         ((sizeof (gUdmaTestCases)) / \
57                                          (sizeof (UdmaTestParams)))
59 #ifndef KB
60 #define KB                              (1024U)
61 #endif
63 #ifndef MB
64 #define MB                              (KB * KB)
65 #endif
67 /* ========================================================================== */
68 /*                          Function Declarations                             */
69 /* ========================================================================== */
71 /* None */
73 /* ========================================================================== */
74 /*                            Global Variables                                */
75 /* ========================================================================== */
77 /** \brief Defines the various UDMA test cases. */
78 static UdmaTestParams gUdmaTestCases[] =
79 {
80     {
81         .enableTest = TEST_ENABLE,
82         .tcId       = 3467U,
83         .tcName     = "Main NAVSS Blockcpy DDR to DDR in polling mode",
84         .disableInfo= NULL,
85         .printEnable= PRINT_ENABLE,
86         .prfEnable  = PRF_DISABLE,
87         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
88         .dcEnable   = DATA_CHECK_ENABLE,
89         .loopCnt    = USE_DEF_LP_CNT,
90         .numTasks   = 1U,
91         .testType   = {UDMA_TT_BLK_CPY},
92         .testFxnPtr = {&udmaTestBlkcpyTc},
93         .pacingTime = {PACING_NONE},
94         .numCh      = {1U},
95         .instId     = {UDMA_INST_ID_MAIN_0},
96         .chPrmId    = {UDMA_TEST_CH_PRMID_DEF},
97         .qdepth     = {USE_DEF_QDEPTH},
98         .icnt       = {
99                         {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
100                       },
101         .dicnt      = {
102                         {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
103                       },
104         .dim        = {
105                         {0U, 0U, 0U}
106                       },
107         .ddim       = {
108                         {0U, 0U, 0U}
109                       },
110         .heapIdSrc  = {DEF_HEAP_ID},
111         .heapIdDest = {DEF_HEAP_ID},
112         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
113         .destBufSize= {UDMA_TEST_DEF_DICNT0},
114         .runFlag    = (UDMA_TEST_RF_MAIN_BC | UDMA_TEST_RF_CFG_DYN),
115         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
116     },
117     {
118         .enableTest = TEST_ENABLE,
119         .tcId       = 3473U,
120         .tcName     = "Main NAVSS Blockcpy DDR to DDR in interrupt mode",
121         .disableInfo= NULL,
122         .printEnable= PRINT_ENABLE,
123         .prfEnable  = PRF_DISABLE,
124         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
125         .dcEnable   = DATA_CHECK_ENABLE,
126         .loopCnt    = USE_DEF_LP_CNT,
127         .numTasks   = 1U,
128         .testType   = {UDMA_TT_BLK_CPY},
129         .testFxnPtr = {&udmaTestBlkcpyTc},
130         .pacingTime = {PACING_NONE},
131         .numCh      = {1U},
132         .instId     = {UDMA_INST_ID_MAIN_0},
133         .chPrmId    = {UDMA_TEST_CH_PRMID_INTR_DEF},
134         .qdepth     = {USE_DEF_QDEPTH},
135         .icnt       = {
136                         {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
137                       },
138         .dicnt      = {
139                         {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
140                       },
141         .dim        = {
142                         {0U, 0U, 0U}
143                       },
144         .ddim       = {
145                         {0U, 0U, 0U}
146                       },
147         .heapIdSrc  = {DEF_HEAP_ID},
148         .heapIdDest = {DEF_HEAP_ID},
149         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
150         .destBufSize= {UDMA_TEST_DEF_DICNT0},
151         .runFlag    = (UDMA_TEST_RF_MAIN_BC | UDMA_TEST_RF_CFG_DYN),
152         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
153     },
154     {
155         .enableTest = TEST_ENABLE,
156         .tcId       = 3474U,
157         .tcName     = "MCU NAVSS Blockcpy DDR to DDR in polling mode",
158         .disableInfo= NULL,
159         .printEnable= PRINT_ENABLE,
160         .prfEnable  = PRF_DISABLE,
161         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
162         .dcEnable   = DATA_CHECK_ENABLE,
163         .loopCnt    = USE_DEF_LP_CNT,
164         .numTasks   = 1U,
165         .testType   = {UDMA_TT_BLK_CPY},
166         .testFxnPtr = {&udmaTestBlkcpyTc},
167         .pacingTime = {PACING_NONE},
168         .numCh      = {1U},
169         .instId     = {UDMA_INST_ID_MCU_0},
170         .chPrmId    = {UDMA_TEST_CH_PRMID_DEF},
171         .qdepth     = {USE_DEF_QDEPTH},
172         .icnt       = {
173                         {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
174                       },
175         .dicnt      = {
176                         {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
177                       },
178         .dim        = {
179                         {0U, 0U, 0U}
180                       },
181         .ddim       = {
182                         {0U, 0U, 0U}
183                       },
184         .heapIdSrc  = {DEF_HEAP_ID},
185         .heapIdDest = {DEF_HEAP_ID},
186         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
187         .destBufSize= {UDMA_TEST_DEF_DICNT0},
188         .runFlag    = (UDMA_TEST_RF_MCU_BC | UDMA_TEST_RF_CFG_DYN),
189         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
190     },
191     {
192         .enableTest = TEST_ENABLE,
193         .tcId       = 3475U,
194         .tcName     = "MCU NAVSS Blockcpy DDR to DDR",
195         .disableInfo= NULL,
196         .printEnable= PRINT_ENABLE,
197         .prfEnable  = PRF_DISABLE,
198         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
199         .dcEnable   = DATA_CHECK_ENABLE,
200         .loopCnt    = USE_DEF_LP_CNT,
201         .numTasks   = 1U,
202         .testType   = {UDMA_TT_BLK_CPY},
203         .testFxnPtr = {&udmaTestBlkcpyTc},
204         .pacingTime = {PACING_NONE},
205         .numCh      = {1U},
206         .instId     = {UDMA_INST_ID_MCU_0},
207         .chPrmId    = {UDMA_TEST_CH_PRMID_INTR_DEF},
208         .qdepth     = {USE_DEF_QDEPTH},
209         .icnt       = {
210                         {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
211                       },
212         .dicnt      = {
213                         {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
214                       },
215         .dim        = {
216                         {0U, 0U, 0U}
217                       },
218         .ddim       = {
219                         {0U, 0U, 0U}
220                       },
221         .heapIdSrc  = {DEF_HEAP_ID},
222         .heapIdDest = {DEF_HEAP_ID},
223         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
224         .destBufSize= {UDMA_TEST_DEF_DICNT0},
225         .runFlag    = (UDMA_TEST_RF_MCU_BC | UDMA_TEST_RF_CFG_DYN),
226         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
227     },
228     {
229         .enableTest = TEST_ENABLE,
230         .tcId       = 3476U,
231         .tcName     = "Main NAVSS Blockcpy DDR to DDR SW global 0 trigger test in polling mode",
232         .disableInfo= NULL,
233         .printEnable= PRINT_ENABLE,
234         .prfEnable  = PRF_DISABLE,
235         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
236         .dcEnable   = DATA_CHECK_ENABLE,
237         .loopCnt    = USE_DEF_LP_CNT,
238         .numTasks   = 1U,
239         .testType   = {UDMA_TT_BLK_CPY},
240         .testFxnPtr = {&udmaTestBlkcpyTc},
241         .pacingTime = {PACING_NONE},
242         .numCh      = {1U},
243         .instId     = {UDMA_INST_ID_MAIN_0},
244         .chPrmId    = {UDMA_TEST_CH_PRMID_TRIGGER_GLOBAL0},
245         .qdepth     = {USE_DEF_QDEPTH},
246         .icnt       = {
247                         {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
248                       },
249         .dicnt      = {
250                         {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
251                       },
252         .dim        = {
253                         {0U, 0U, 0U}
254                       },
255         .ddim       = {
256                         {0U, 0U, 0U}
257                       },
258         .heapIdSrc  = {DEF_HEAP_ID},
259         .heapIdDest = {DEF_HEAP_ID},
260         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
261         .destBufSize= {UDMA_TEST_DEF_DICNT0},
262         .runFlag    = (UDMA_TEST_RF_MAIN_BC | UDMA_TEST_RF_CFG_DYN),
263         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
264     },
265     {
266         .enableTest = TEST_ENABLE,
267         .tcId       = 3477U,
268         .tcName     = "Main NAVSS Blockcpy DDR to DDR SW global 0 trigger test in interrupt mode",
269         .disableInfo= NULL,
270         .printEnable= PRINT_ENABLE,
271         .prfEnable  = PRF_DISABLE,
272         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
273         .dcEnable   = DATA_CHECK_ENABLE,
274         .loopCnt    = USE_DEF_LP_CNT,
275         .numTasks   = 1U,
276         .testType   = {UDMA_TT_BLK_CPY},
277         .testFxnPtr = {&udmaTestBlkcpyTc},
278         .pacingTime = {PACING_NONE},
279         .numCh      = {1U},
280         .instId     = {UDMA_INST_ID_MAIN_0},
281         .chPrmId    = {UDMA_TEST_CH_PRMID_TRIGGER_GLOBAL0_INTR},
282         .qdepth     = {USE_DEF_QDEPTH},
283         .icnt       = {
284                         {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
285                       },
286         .dicnt      = {
287                         {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
288                       },
289         .dim        = {
290                         {0U, 0U, 0U}
291                       },
292         .ddim       = {
293                         {0U, 0U, 0U}
294                       },
295         .heapIdSrc  = {DEF_HEAP_ID},
296         .heapIdDest = {DEF_HEAP_ID},
297         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
298         .destBufSize= {UDMA_TEST_DEF_DICNT0},
299         .runFlag    = (UDMA_TEST_RF_MAIN_BC),
300         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
301     },
302     {
303         .enableTest = TEST_ENABLE,
304         .tcId       = 3478U,
305         .tcName     = "MCU NAVSS Blockcpy DDR to DDR SW global 0 trigger test in polling mode",
306         .disableInfo= NULL,
307         .printEnable= PRINT_ENABLE,
308         .prfEnable  = PRF_DISABLE,
309         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
310         .dcEnable   = DATA_CHECK_ENABLE,
311         .loopCnt    = USE_DEF_LP_CNT,
312         .numTasks   = 1U,
313         .testType   = {UDMA_TT_BLK_CPY},
314         .testFxnPtr = {&udmaTestBlkcpyTc},
315         .pacingTime = {PACING_NONE},
316         .numCh      = {1U},
317         .instId     = {UDMA_INST_ID_MCU_0},
318         .chPrmId    = {UDMA_TEST_CH_PRMID_TRIGGER_GLOBAL0},
319         .qdepth     = {USE_DEF_QDEPTH},
320         .icnt       = {
321                         {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
322                       },
323         .dicnt      = {
324                         {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
325                       },
326         .dim        = {
327                         {0U, 0U, 0U}
328                       },
329         .ddim       = {
330                         {0U, 0U, 0U}
331                       },
332         .heapIdSrc  = {DEF_HEAP_ID},
333         .heapIdDest = {DEF_HEAP_ID},
334         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
335         .destBufSize= {UDMA_TEST_DEF_DICNT0},
336         .runFlag    = (UDMA_TEST_RF_MCU_BC),
337         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
338     },
339     {
340         .enableTest = TEST_ENABLE,
341         .tcId       = 3479U,
342         .tcName     = "MCU NAVSS Blockcpy DDR to DDR SW global 0 trigger test",
343         .disableInfo= NULL,
344         .printEnable= PRINT_ENABLE,
345         .prfEnable  = PRF_DISABLE,
346         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
347         .dcEnable   = DATA_CHECK_ENABLE,
348         .loopCnt    = USE_DEF_LP_CNT,
349         .numTasks   = 1U,
350         .testType   = {UDMA_TT_BLK_CPY},
351         .testFxnPtr = {&udmaTestBlkcpyTc},
352         .pacingTime = {PACING_NONE},
353         .numCh      = {1U},
354         .instId     = {UDMA_INST_ID_MCU_0},
355         .chPrmId    = {UDMA_TEST_CH_PRMID_TRIGGER_GLOBAL0_INTR},
356         .qdepth     = {USE_DEF_QDEPTH},
357         .icnt       = {
358                         {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
359                       },
360         .dicnt      = {
361                         {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
362                       },
363         .dim        = {
364                         {0U, 0U, 0U}
365                       },
366         .ddim       = {
367                         {0U, 0U, 0U}
368                       },
369         .heapIdSrc  = {DEF_HEAP_ID},
370         .heapIdDest = {DEF_HEAP_ID},
371         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
372         .destBufSize= {UDMA_TEST_DEF_DICNT0},
373         .runFlag    = (UDMA_TEST_RF_MCU_BC),
374         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
375     },
376     {
377         .enableTest = TEST_ENABLE,
378         .tcId       = 3480U,
379         .tcName     = "MCU NAVSS Blockcpy circular 1KB DDR to DDR 1KB ICNT1 TR event type test",
380         .disableInfo= NULL,
381         .printEnable= PRINT_ENABLE,
382         .prfEnable  = PRF_DISABLE,
383         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
384         .dcEnable   = DATA_CHECK_ENABLE,
385         .loopCnt    = 1U,
386         .numTasks   = 1U,
387         .testType   = {UDMA_TT_BLK_CPY},
388         .testFxnPtr = {&udmaTestBlkcpyTc},
389         .pacingTime = {PACING_NONE},
390         .numCh      = {1U},
391         .instId     = {UDMA_INST_ID_MCU_0},
392         .chPrmId    = {UDMA_TEST_CH_PRMID_EVENTSIZE_ICNT1},
393         .qdepth     = {USE_DEF_QDEPTH},
394         .icnt       = {
395                         {1*KB, 1U, 1U, 1U}
396                       },
397         .dicnt      = {
398                         {1*KB, 1U, 1U, 1U}
399                       },
400         .dim        = {
401                         {0U, 0U, 0U}
402                       },
403         .ddim       = {
404                         {1*KB, 0U, 0U}
405                       },
406         .heapIdSrc  = {DEF_HEAP_ID},
407         .heapIdDest = {DEF_HEAP_ID},
408         .srcBufSize = {1*KB},
409         .destBufSize= {1*KB},
410         .runFlag    = (UDMA_TEST_RF_MCU_BC),
411         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
412     },
413     {
414         .enableTest = TEST_ENABLE,
415         .tcId       = 3481U,
416         .tcName     = "MCU NAVSS Blockcpy circular 1KB DDR to DDR 1MB ICNT2 TR event type test",
417         .disableInfo= NULL,
418         .printEnable= PRINT_ENABLE,
419         .prfEnable  = PRF_DISABLE,
420         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
421         .dcEnable   = DATA_CHECK_ENABLE,
422         .loopCnt    = 1U,
423         .numTasks   = 1U,
424         .testType   = {UDMA_TT_BLK_CPY},
425         .testFxnPtr = {&udmaTestBlkcpyTc},
426         .pacingTime = {PACING_NONE},
427         .numCh      = {1U},
428         .instId     = {UDMA_INST_ID_MCU_0},
429         .chPrmId    = {UDMA_TEST_CH_PRMID_EVENTSIZE_ICNT2},
430         .qdepth     = {USE_DEF_QDEPTH},
431         .icnt       = {
432                         {1*KB, 1U, 1*KB, 1U}
433                       },
434         .dicnt      = {
435                         {1*KB, 1U, 1*KB, 1U}
436                       },
437         .dim        = {
438                         {0U, 0U, 0U}
439                       },
440         .ddim       = {
441                         {1*KB, 1*KB, 0U}
442                       },
443         .heapIdSrc  = {DEF_HEAP_ID},
444         .heapIdDest = {DEF_HEAP_ID},
445         .srcBufSize = {1*KB},
446         .destBufSize= {1*MB},
447         .runFlag    = (UDMA_TEST_RF_MCU_BC),
448         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
449     },
450     {
451         .enableTest = TEST_ENABLE,
452         .tcId       = 3482U,
453         .tcName     = "MCU NAVSS Blockcpy circular 1KB DDR to DDR 1MB ICNT3 TR event type test",
454         .disableInfo= NULL,
455         .printEnable= PRINT_ENABLE,
456         .prfEnable  = PRF_DISABLE,
457         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
458         .dcEnable   = DATA_CHECK_ENABLE,
459         .loopCnt    = 1U,
460         .numTasks   = 1U,
461         .testType   = {UDMA_TT_BLK_CPY},
462         .testFxnPtr = {&udmaTestBlkcpyTc},
463         .pacingTime = {PACING_NONE},
464         .numCh      = {1U},
465         .instId     = {UDMA_INST_ID_MCU_0},
466         .chPrmId    = {UDMA_TEST_CH_PRMID_EVENTSIZE_ICNT3},
467         .qdepth     = {USE_DEF_QDEPTH},
468         .icnt       = {
469                         {1*KB, 1U, 1*KB, 1U}
470                       },
471         .dicnt      = {
472                         {1*KB, 1U, 1*KB, 1U}
473                       },
474         .dim        = {
475                         {0U, 0U, 0U}
476                       },
477         .ddim       = {
478                         {1*KB, 1*KB, 0U}
479                       },
480         .heapIdSrc  = {DEF_HEAP_ID},
481         .heapIdDest = {DEF_HEAP_ID},
482         .srcBufSize = {1*KB},
483         .destBufSize= {1*MB},
484         .runFlag    = (UDMA_TEST_RF_MCU_BC),
485         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
486     },
487     {
488         .enableTest = TEST_ENABLE,
489         .tcId       = 3516U,
490         .tcName     = "Main NAVSS Blockcpy MSMC to MSMC in interrupt mode",
491         .disableInfo= NULL,
492         .printEnable= PRINT_ENABLE,
493         .prfEnable  = PRF_DISABLE,
494         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
495         .dcEnable   = DATA_CHECK_ENABLE,
496         .loopCnt    = USE_DEF_LP_CNT,
497         .numTasks   = 1U,
498         .testType   = {UDMA_TT_BLK_CPY},
499         .testFxnPtr = {&udmaTestBlkcpyTc},
500         .pacingTime = {PACING_NONE},
501         .numCh      = {1U},
502         .instId     = {UDMA_INST_ID_MAIN_0},
503         .chPrmId    = {UDMA_TEST_CH_PRMID_INTR_DEF},
504         .qdepth     = {USE_DEF_QDEPTH},
505         .icnt       = {
506                         {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
507                       },
508         .dicnt      = {
509                         {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
510                       },
511         .dim        = {
512                         {0U, 0U, 0U}
513                       },
514         .ddim       = {
515                         {0U, 0U, 0U}
516                       },
517         .heapIdSrc  = {UTILS_MEM_HEAP_ID_MSMC},
518         .heapIdDest = {UTILS_MEM_HEAP_ID_MSMC},
519         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
520         .destBufSize= {UDMA_TEST_DEF_DICNT0},
521         .runFlag    = (UDMA_TEST_RF_MAIN_BC),
522         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
523     },
524     {
525         .enableTest = TEST_ENABLE,
526         .tcId       = 3483U,
527         .tcName     = "MCU NAVSS Blockcpy MSMC to MSMC in interrupt mode",
528         .disableInfo= NULL,
529         .printEnable= PRINT_ENABLE,
530         .prfEnable  = PRF_DISABLE,
531         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
532         .dcEnable   = DATA_CHECK_ENABLE,
533         .loopCnt    = USE_DEF_LP_CNT,
534         .numTasks   = 1U,
535         .testType   = {UDMA_TT_BLK_CPY},
536         .testFxnPtr = {&udmaTestBlkcpyTc},
537         .pacingTime = {PACING_NONE},
538         .numCh      = {1U},
539         .instId     = {UDMA_INST_ID_MCU_0},
540         .chPrmId    = {UDMA_TEST_CH_PRMID_INTR_DEF},
541         .qdepth     = {USE_DEF_QDEPTH},
542         .icnt       = {
543                         {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
544                       },
545         .dicnt      = {
546                         {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
547                       },
548         .dim        = {
549                         {0U, 0U, 0U}
550                       },
551         .ddim       = {
552                         {0U, 0U, 0U}
553                       },
554         .heapIdSrc  = {UTILS_MEM_HEAP_ID_MSMC},
555         .heapIdDest = {UTILS_MEM_HEAP_ID_MSMC},
556         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
557         .destBufSize= {UDMA_TEST_DEF_DICNT0},
558         .runFlag    = (UDMA_TEST_RF_MCU_BC),
559         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
560     },
561     {
562         .enableTest = TEST_ENABLE,
563         .tcId       = 3484U,
564         .tcName     = "MCU NAVSS Blockcpy OCMC to OCMC in interrupt mode",
565         .disableInfo= NULL,
566         .printEnable= PRINT_ENABLE,
567         .prfEnable  = PRF_DISABLE,
568         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
569         .dcEnable   = DATA_CHECK_ENABLE,
570         .loopCnt    = USE_DEF_LP_CNT,
571         .numTasks   = 1U,
572         .testType   = {UDMA_TT_BLK_CPY},
573         .testFxnPtr = {&udmaTestBlkcpyTc},
574         .pacingTime = {PACING_NONE},
575         .numCh      = {1U},
576         .instId     = {UDMA_INST_ID_MCU_0},
577         .chPrmId    = {UDMA_TEST_CH_PRMID_INTR_DEF},
578         .qdepth     = {USE_DEF_QDEPTH},
579         .icnt       = {
580                         {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
581                       },
582         .dicnt      = {
583                         {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
584                       },
585         .dim        = {
586                         {0U, 0U, 0U}
587                       },
588         .ddim       = {
589                         {0U, 0U, 0U}
590                       },
591         .heapIdSrc  = {UTILS_MEM_HEAP_ID_INTERNAL},
592         .heapIdDest = {UTILS_MEM_HEAP_ID_INTERNAL},
593         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
594         .destBufSize= {UDMA_TEST_DEF_DICNT0},
595         .runFlag    = (UDMA_TEST_RF_MCU_BC),
596         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
597     },
598     {
599         .enableTest = TEST_ENABLE,
600         .tcId       = 3485U,
601         .tcName     = "Main NAVSS Blockcpy DDR 1MB to DDR 1MB performance test",
602         .disableInfo= NULL,
603         .printEnable= PRINT_ENABLE,
604         .prfEnable  = PRF_ENABLE,
605         .tcType     = (UDMA_TCT_FULL | UDMA_TCT_FUNCTIONAL | UDMA_TCT_PERFORMANCE),
606         .dcEnable   = DATA_CHECK_DISABLE,
607         .loopCnt    = UDMA_TEST_PERF_LOOP_CNT,
608         .numTasks   = 1U,
609         .testType   = {UDMA_TT_BLK_CPY},
610         .testFxnPtr = {&udmaTestBlkcpyTc},
611         .pacingTime = {PACING_NONE},
612         .numCh      = {1U},
613         .instId     = {UDMA_INST_ID_MAIN_0},
614         .chPrmId    = {UDMA_TEST_CH_PRMID_INTR_DEF},
615         .qdepth     = {UDMA_TEST_PERF_QDEPTH},
616         .icnt       = {
617                         {1*KB, 1U, 1*KB, 1U},
618                       },
619         .dicnt      = {
620                         {1*KB, 1U, 1*KB, 1U},
621                       },
622         .dim        = {
623                         {1*KB, 1*KB, 0U},
624                       },
625         .ddim       = {
626                         {1*KB, 1*KB, 0U},
627                       },
628         .heapIdSrc  = {UTILS_MEM_HEAP_ID_DDR},
629         .heapIdDest = {UTILS_MEM_HEAP_ID_DDR},
630         .srcBufSize = {1*MB},
631         .destBufSize= {1*MB},
632         .runFlag    = (UDMA_TEST_RF_MAIN_BC),
633         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
634     },
635     {
636         .enableTest = TEST_ENABLE,
637         .tcId       = 3486U,
638         .tcName     = "Main NAVSS 2D Blockcpy MSMC circular 1KB to DDR 1MB performance test",
639         .disableInfo= NULL,
640         .printEnable= PRINT_ENABLE,
641         .prfEnable  = PRF_ENABLE,
642         .tcType     = (UDMA_TCT_FULL | UDMA_TCT_FUNCTIONAL | UDMA_TCT_PERFORMANCE),
643         .dcEnable   = DATA_CHECK_DISABLE,
644         .loopCnt    = UDMA_TEST_PERF_LOOP_CNT,
645         .numTasks   = 1U,
646         .testType   = {UDMA_TT_BLK_CPY},
647         .testFxnPtr = {&udmaTestBlkcpyTc},
648         .pacingTime = {PACING_NONE},
649         .numCh      = {1U},
650         .instId     = {UDMA_INST_ID_MAIN_0},
651         .chPrmId    = {UDMA_TEST_CH_PRMID_INTR_DEF},
652         .qdepth     = {UDMA_TEST_DEF_QDEPTH},
653         .icnt       = {
654                         {1*KB, 1U, 1*KB, 1U}
655                       },
656         .dicnt      = {
657                         {1*KB, 1U, 1*KB, 1U}
658                       },
659         .dim        = {
660                         {0U, 0U, 0U}
661                       },
662         .ddim       = {
663                         {1*KB, 1*KB, 0U}
664                       },
665         .heapIdSrc  = {UTILS_MEM_HEAP_ID_MSMC},
666         .heapIdDest = {UTILS_MEM_HEAP_ID_DDR},
667         .srcBufSize = {1*KB},
668         .destBufSize= {1*MB},
669         .runFlag    = (UDMA_TEST_RF_MAIN_BC),
670         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
671     },
672     {
673         .enableTest = TEST_ENABLE,
674         .tcId       = 3487U,
675         .tcName     = "Main NAVSS 2D Blockcpy DDR 1MB to MSMC circular 1KB performance test",
676         .disableInfo= NULL,
677         .printEnable= PRINT_ENABLE,
678         .prfEnable  = PRF_ENABLE,
679         .tcType     = (UDMA_TCT_FULL | UDMA_TCT_FUNCTIONAL | UDMA_TCT_PERFORMANCE),
680         .dcEnable   = DATA_CHECK_DISABLE,
681         .loopCnt    = UDMA_TEST_PERF_LOOP_CNT,
682         .numTasks   = 1U,
683         .testType   = {UDMA_TT_BLK_CPY},
684         .testFxnPtr = {&udmaTestBlkcpyTc},
685         .pacingTime = {PACING_NONE},
686         .numCh      = {1U},
687         .instId     = {UDMA_INST_ID_MAIN_0},
688         .chPrmId    = {UDMA_TEST_CH_PRMID_INTR_DEF},
689         .qdepth     = {UDMA_TEST_DEF_QDEPTH},
690         .icnt       = {
691                         {1*KB, 1U, 1*KB, 1U}
692                       },
693         .dicnt      = {
694                         {1*KB, 1U, 1*KB, 1U}
695                       },
696         .dim        = {
697                         {1*KB, 1*KB, 0U}
698                       },
699         .ddim       = {
700                         {0U, 0U, 0U}
701                       },
702         .heapIdSrc  = {UTILS_MEM_HEAP_ID_DDR},
703         .heapIdDest = {UTILS_MEM_HEAP_ID_MSMC},
704         .srcBufSize = {1*MB},
705         .destBufSize= {1*KB},
706         .runFlag    = (UDMA_TEST_RF_MAIN_BC),
707         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
708     },
709     {
710         .enableTest = TEST_ENABLE,
711         .tcId       = 3488U,
712         .tcName     = "Main NAVSS 2D Blockcpy MSMC circular 1KB to MSMC circular 1KB performance test",
713         .disableInfo= NULL,
714         .printEnable= PRINT_ENABLE,
715         .prfEnable  = PRF_ENABLE,
716         .tcType     = (UDMA_TCT_FULL | UDMA_TCT_FUNCTIONAL | UDMA_TCT_PERFORMANCE),
717         .dcEnable   = DATA_CHECK_DISABLE,
718         .loopCnt    = UDMA_TEST_PERF_LOOP_CNT,
719         .numTasks   = 1U,
720         .testType   = {UDMA_TT_BLK_CPY},
721         .testFxnPtr = {&udmaTestBlkcpyTc},
722         .pacingTime = {PACING_NONE},
723         .numCh      = {1U},
724         .instId     = {UDMA_INST_ID_MAIN_0},
725         .chPrmId    = {UDMA_TEST_CH_PRMID_INTR_DEF},
726         .qdepth     = {UDMA_TEST_DEF_QDEPTH},
727         .icnt       = {
728                         {1*KB, 1U, 1*KB, 1U}
729                       },
730         .dicnt      = {
731                         {1*KB, 1U, 1*KB, 1U}
732                       },
733         .dim        = {
734                         {0U, 0U, 0U}
735                       },
736         .ddim       = {
737                         {0U, 0U, 0U}
738                       },
739         .heapIdSrc  = {UTILS_MEM_HEAP_ID_MSMC},
740         .heapIdDest = {UTILS_MEM_HEAP_ID_MSMC},
741         .srcBufSize = {1*KB},
742         .destBufSize= {1*KB},
743         .runFlag    = (UDMA_TEST_RF_MAIN_BC),
744         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
745     },
746     {
747         .enableTest = TEST_ENABLE,
748         .tcId       = 3489U,
749         .tcName     = "MCU NAVSS 2D Blockcpy OCMC circular 1KB to OCMC circular 1KB performance test",
750         .disableInfo= NULL,
751         .printEnable= PRINT_ENABLE,
752         .prfEnable  = PRF_ENABLE,
753         .tcType     = (UDMA_TCT_FULL | UDMA_TCT_FUNCTIONAL | UDMA_TCT_PERFORMANCE),
754         .dcEnable   = DATA_CHECK_DISABLE,
755         .loopCnt    = UDMA_TEST_PERF_LOOP_CNT,
756         .numTasks   = 1U,
757         .testType   = {UDMA_TT_BLK_CPY},
758         .testFxnPtr = {&udmaTestBlkcpyTc},
759         .pacingTime = {PACING_NONE},
760         .numCh      = {1U},
761         .instId     = {UDMA_INST_ID_MCU_0},
762         .chPrmId    = {UDMA_TEST_CH_PRMID_INTR_DEF},
763         .qdepth     = {UDMA_TEST_DEF_QDEPTH},
764         .icnt       = {
765                         {1*KB, 1U, 1*KB, 1U}
766                       },
767         .dicnt      = {
768                         {1*KB, 1U, 1*KB, 1U}
769                       },
770         .dim        = {
771                         {0U, 0U, 0U}
772                       },
773         .ddim       = {
774                         {0U, 0U, 0U}
775                       },
776         .heapIdSrc  = {UTILS_MEM_HEAP_ID_INTERNAL},
777         .heapIdDest = {UTILS_MEM_HEAP_ID_INTERNAL},
778         .srcBufSize = {1*KB},
779         .destBufSize= {1*KB},
780         .runFlag    = (UDMA_TEST_RF_MCU_BC),
781         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
782     },
783     {
784         .enableTest = TEST_ENABLE,
785         .tcId       = 3490U,
786         .tcName     = "MCU NAVSS Blockcpy DDR 1MB to DDR 1MB performance test",
787         .disableInfo= NULL,
788         .printEnable= PRINT_ENABLE,
789         .prfEnable  = PRF_ENABLE,
790         .tcType     = (UDMA_TCT_FULL | UDMA_TCT_FUNCTIONAL | UDMA_TCT_PERFORMANCE),
791         .dcEnable   = DATA_CHECK_DISABLE,
792         .loopCnt    = UDMA_TEST_PERF_LOOP_CNT,
793         .numTasks   = 1U,
794         .testType   = {UDMA_TT_BLK_CPY},
795         .testFxnPtr = {&udmaTestBlkcpyTc},
796         .pacingTime = {PACING_NONE},
797         .numCh      = {1U},
798         .instId     = {UDMA_INST_ID_MCU_0},
799         .chPrmId    = {UDMA_TEST_CH_PRMID_INTR_DEF},
800         .qdepth     = {UDMA_TEST_PERF_QDEPTH},
801         .icnt       = {
802                         {1*KB, 1U, 1*KB, 1U},
803                       },
804         .dicnt      = {
805                         {1*KB, 1U, 1*KB, 1U},
806                       },
807         .dim        = {
808                         {1*KB, 1*KB, 0U},
809                       },
810         .ddim       = {
811                         {1*KB, 1*KB, 0U},
812                       },
813         .heapIdSrc  = {UTILS_MEM_HEAP_ID_DDR},
814         .heapIdDest = {UTILS_MEM_HEAP_ID_DDR},
815         .srcBufSize = {1*MB},
816         .destBufSize= {1*MB},
817         .runFlag    = (UDMA_TEST_RF_MCU_BC),
818         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
819     },
820     {
821         .enableTest = TEST_ENABLE,
822         .tcId       = 3491U,
823         .tcName     = "MCU NAVSS 2D Blockcpy MSMC circular 1KB to DDR 1MB performance test",
824         .disableInfo= NULL,
825         .printEnable= PRINT_ENABLE,
826         .prfEnable  = PRF_ENABLE,
827         .tcType     = (UDMA_TCT_FULL | UDMA_TCT_FUNCTIONAL | UDMA_TCT_PERFORMANCE),
828         .dcEnable   = DATA_CHECK_DISABLE,
829         .loopCnt    = UDMA_TEST_PERF_LOOP_CNT,
830         .numTasks   = 1U,
831         .testType   = {UDMA_TT_BLK_CPY},
832         .testFxnPtr = {&udmaTestBlkcpyTc},
833         .pacingTime = {PACING_NONE},
834         .numCh      = {1U},
835         .instId     = {UDMA_INST_ID_MCU_0},
836         .chPrmId    = {UDMA_TEST_CH_PRMID_INTR_DEF},
837         .qdepth     = {UDMA_TEST_DEF_QDEPTH},
838         .icnt       = {
839                         {1*KB, 1U, 1*KB, 1U}
840                       },
841         .dicnt      = {
842                         {1*KB, 1U, 1*KB, 1U}
843                       },
844         .dim        = {
845                         {0U, 0U, 0U}
846                       },
847         .ddim       = {
848                         {1*KB, 1*KB, 0U}
849                       },
850         .heapIdSrc  = {UTILS_MEM_HEAP_ID_MSMC},
851         .heapIdDest = {UTILS_MEM_HEAP_ID_DDR},
852         .srcBufSize = {1*KB},
853         .destBufSize= {1*MB},
854         .runFlag    = (UDMA_TEST_RF_MCU_BC),
855         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
856     },
857     {
858         .enableTest = TEST_ENABLE,
859         .tcId       = 3492U,
860         .tcName     = "MCU NAVSS 2D Blockcpy DDR 1MB to MSMC circular 1KB performance test",
861         .disableInfo= NULL,
862         .printEnable= PRINT_ENABLE,
863         .prfEnable  = PRF_ENABLE,
864         .tcType     = (UDMA_TCT_FULL | UDMA_TCT_FUNCTIONAL | UDMA_TCT_PERFORMANCE),
865         .dcEnable   = DATA_CHECK_DISABLE,
866         .loopCnt    = UDMA_TEST_PERF_LOOP_CNT,
867         .numTasks   = 1U,
868         .testType   = {UDMA_TT_BLK_CPY},
869         .testFxnPtr = {&udmaTestBlkcpyTc},
870         .pacingTime = {PACING_NONE},
871         .numCh      = {1U},
872         .instId     = {UDMA_INST_ID_MCU_0},
873         .chPrmId    = {UDMA_TEST_CH_PRMID_INTR_DEF},
874         .qdepth     = {UDMA_TEST_DEF_QDEPTH},
875         .icnt       = {
876                         {1*KB, 1U, 1*KB, 1U}
877                       },
878         .dicnt      = {
879                         {1*KB, 1U, 1*KB, 1U}
880                       },
881         .dim        = {
882                         {1*KB, 1*KB, 0U}
883                       },
884         .ddim       = {
885                         {0U, 0U, 0U}
886                       },
887         .heapIdSrc  = {UTILS_MEM_HEAP_ID_DDR},
888         .heapIdDest = {UTILS_MEM_HEAP_ID_MSMC},
889         .srcBufSize = {1*MB},
890         .destBufSize= {1*KB},
891         .runFlag    = (UDMA_TEST_RF_MCU_BC),
892         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
893     },
894     {
895         .enableTest = TEST_ENABLE,
896         .tcId       = 3493U,
897         .tcName     = "MCU NAVSS 2D Blockcpy MSMC circular 1KB to MSMC circular 1KB performance test",
898         .disableInfo= NULL,
899         .printEnable= PRINT_ENABLE,
900         .prfEnable  = PRF_ENABLE,
901         .tcType     = (UDMA_TCT_FULL | UDMA_TCT_FUNCTIONAL | UDMA_TCT_PERFORMANCE),
902         .dcEnable   = DATA_CHECK_DISABLE,
903         .loopCnt    = UDMA_TEST_PERF_LOOP_CNT,
904         .numTasks   = 1U,
905         .testType   = {UDMA_TT_BLK_CPY},
906         .testFxnPtr = {&udmaTestBlkcpyTc},
907         .pacingTime = {PACING_NONE},
908         .numCh      = {1U},
909         .instId     = {UDMA_INST_ID_MCU_0},
910         .chPrmId    = {UDMA_TEST_CH_PRMID_INTR_DEF},
911         .qdepth     = {UDMA_TEST_DEF_QDEPTH},
912         .icnt       = {
913                         {1*KB, 1U, 1*KB, 1U}
914                       },
915         .dicnt      = {
916                         {1*KB, 1U, 1*KB, 1U}
917                       },
918         .dim        = {
919                         {0U, 0U, 0U}
920                       },
921         .ddim       = {
922                         {0U, 0U, 0U}
923                       },
924         .heapIdSrc  = {UTILS_MEM_HEAP_ID_MSMC},
925         .heapIdDest = {UTILS_MEM_HEAP_ID_MSMC},
926         .srcBufSize = {1*KB},
927         .destBufSize= {1*KB},
928         .runFlag    = (UDMA_TEST_RF_MCU_BC),
929         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
930     },
931     {
932         .enableTest = TEST_ENABLE,
933         .tcId       = 3494U,
934         .tcName     = "Main NAVSS Blockcpy DDR 1MB to DDR 1MB from multiple tasks",
935         .disableInfo= NULL,
936         .printEnable= PRINT_DISABLE,
937         .prfEnable  = PRF_ENABLE,
938         .tcType     = (UDMA_TCT_FULL | UDMA_TCT_FUNCTIONAL | UDMA_TCT_PERFORMANCE),
939         .dcEnable   = DATA_CHECK_DISABLE,
940         .loopCnt    = UDMA_TEST_PERF_LOOP_CNT,
941         .numTasks   = UDMA_TEST_MAX_MAIN_BC_CH,
942         .testType   = {UDMA_TT_BLK_CPY, UDMA_TT_BLK_CPY, UDMA_TT_BLK_CPY, UDMA_TT_BLK_CPY},
943         .testFxnPtr = {&udmaTestBlkcpyTc, &udmaTestBlkcpyTc, &udmaTestBlkcpyTc, &udmaTestBlkcpyTc},
944         .pacingTime = {PACING_NONE, PACING_NONE, PACING_NONE, PACING_NONE},
945         .numCh      = {1U, 1U, 1U, 1U},
946         .instId     = {UDMA_INST_ID_MAIN_0, UDMA_INST_ID_MAIN_0, UDMA_INST_ID_MAIN_0, UDMA_INST_ID_MAIN_0},
947         .chPrmId    = {UDMA_TEST_CH_PRMID_INTR_DEF, UDMA_TEST_CH_PRMID_INTR_DEF, UDMA_TEST_CH_PRMID_INTR_DEF, UDMA_TEST_CH_PRMID_INTR_DEF},
948         .qdepth     = {UDMA_TEST_PERF_QDEPTH, UDMA_TEST_PERF_QDEPTH, UDMA_TEST_PERF_QDEPTH, UDMA_TEST_PERF_QDEPTH},
949         .icnt       = {
950                         {1*KB, 1U, 1*KB, 1U},
951                         {1*KB, 1U, 1*KB, 1U},
952                         {1*KB, 1U, 1*KB, 1U},
953                         {1*KB, 1U, 1*KB, 1U},
954                       },
955         .dicnt      = {
956                         {1*KB, 1U, 1*KB, 1U},
957                         {1*KB, 1U, 1*KB, 1U},
958                         {1*KB, 1U, 1*KB, 1U},
959                         {1*KB, 1U, 1*KB, 1U},
960                       },
961         .dim        = {
962                         {1*KB, 1*KB, 0U},
963                         {1*KB, 1*KB, 0U},
964                         {1*KB, 1*KB, 0U},
965                         {1*KB, 1*KB, 0U},
966                       },
967         .ddim       = {
968                         {1*KB, 1*KB, 0U},
969                         {1*KB, 1*KB, 0U},
970                         {1*KB, 1*KB, 0U},
971                         {1*KB, 1*KB, 0U},
972                       },
973         .heapIdSrc  = {UTILS_MEM_HEAP_ID_DDR, UTILS_MEM_HEAP_ID_DDR, UTILS_MEM_HEAP_ID_DDR, UTILS_MEM_HEAP_ID_DDR},
974         .heapIdDest = {UTILS_MEM_HEAP_ID_DDR, UTILS_MEM_HEAP_ID_DDR, UTILS_MEM_HEAP_ID_DDR, UTILS_MEM_HEAP_ID_DDR},
975         .srcBufSize = {1*MB, 1*MB, 1*MB, 1*MB},
976         .destBufSize= {1*MB, 1*MB, 1*MB, 1*MB},
977         .runFlag    = (UDMA_TEST_RF_MAIN_BC_MT),
978         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
979     },
980     {
981         .enableTest = TEST_ENABLE,
982         .tcId       = 3495U,
983         .tcName     = "MCU NAVSS Blockcpy DDR 1MB to DDR 1MB from multiple tasks",
984         .disableInfo= NULL,
985         .printEnable= PRINT_DISABLE,
986         .prfEnable  = PRF_ENABLE,
987         .tcType     = (UDMA_TCT_FULL | UDMA_TCT_FUNCTIONAL | UDMA_TCT_PERFORMANCE),
988         .dcEnable   = DATA_CHECK_DISABLE,
989         .loopCnt    = UDMA_TEST_PERF_LOOP_CNT,
990         .numTasks   = UDMA_TEST_MAX_MCU_BC_CH,
991         .testType   = {UDMA_TT_BLK_CPY, UDMA_TT_BLK_CPY, UDMA_TT_BLK_CPY, UDMA_TT_BLK_CPY},
992         .testFxnPtr = {&udmaTestBlkcpyTc, &udmaTestBlkcpyTc, &udmaTestBlkcpyTc, &udmaTestBlkcpyTc},
993         .pacingTime = {PACING_NONE, PACING_NONE, PACING_NONE, PACING_NONE},
994         .numCh      = {1U, 1U, 1U, 1U},
995         .instId     = {UDMA_INST_ID_MCU_0, UDMA_INST_ID_MCU_0, UDMA_INST_ID_MCU_0, UDMA_INST_ID_MCU_0},
996         .chPrmId    = {UDMA_TEST_CH_PRMID_INTR_DEF, UDMA_TEST_CH_PRMID_INTR_DEF, UDMA_TEST_CH_PRMID_INTR_DEF, UDMA_TEST_CH_PRMID_INTR_DEF},
997         .qdepth     = {UDMA_TEST_PERF_QDEPTH, UDMA_TEST_PERF_QDEPTH, UDMA_TEST_PERF_QDEPTH, UDMA_TEST_PERF_QDEPTH},
998         .icnt       = {
999                         {1*KB, 1U, 1*KB, 1U},
1000                         {1*KB, 1U, 1*KB, 1U},
1001                         {1*KB, 1U, 1*KB, 1U},
1002                         {1*KB, 1U, 1*KB, 1U},
1003                       },
1004         .dicnt      = {
1005                         {1*KB, 1U, 1*KB, 1U},
1006                         {1*KB, 1U, 1*KB, 1U},
1007                         {1*KB, 1U, 1*KB, 1U},
1008                         {1*KB, 1U, 1*KB, 1U},
1009                       },
1010         .dim        = {
1011                         {1*KB, 1*KB, 0U},
1012                         {1*KB, 1*KB, 0U},
1013                         {1*KB, 1*KB, 0U},
1014                         {1*KB, 1*KB, 0U},
1015                       },
1016         .ddim       = {
1017                         {1*KB, 1*KB, 0U},
1018                         {1*KB, 1*KB, 0U},
1019                         {1*KB, 1*KB, 0U},
1020                         {1*KB, 1*KB, 0U},
1021                       },
1022         .heapIdSrc  = {UTILS_MEM_HEAP_ID_DDR, UTILS_MEM_HEAP_ID_DDR, UTILS_MEM_HEAP_ID_DDR, UTILS_MEM_HEAP_ID_DDR},
1023         .heapIdDest = {UTILS_MEM_HEAP_ID_DDR, UTILS_MEM_HEAP_ID_DDR, UTILS_MEM_HEAP_ID_DDR, UTILS_MEM_HEAP_ID_DDR},
1024         .srcBufSize = {1*MB, 1*MB, 1*MB, 1*MB},
1025         .destBufSize= {1*MB, 1*MB, 1*MB, 1*MB},
1026         .runFlag    = (UDMA_TEST_RF_MCU_BC_MT),
1027         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
1028     },
1029     {
1030         .enableTest = TEST_ENABLE,
1031         .tcId       = 3496U,
1032         .tcName     = "Main NAVSS Blockcpy MSMC to MSMC 1KBx1K (1MB) circular from multiple tasks",
1033         .disableInfo= NULL,
1034         .printEnable= PRINT_DISABLE,
1035         .prfEnable  = PRF_ENABLE,
1036         .tcType     = (UDMA_TCT_FULL | UDMA_TCT_FUNCTIONAL | UDMA_TCT_PERFORMANCE),
1037         .dcEnable   = DATA_CHECK_DISABLE,
1038         .loopCnt    = UDMA_TEST_PERF_LOOP_CNT,
1039         .numTasks   = UDMA_TEST_MAX_MAIN_BC_CH,
1040         .testType   = {UDMA_TT_BLK_CPY, UDMA_TT_BLK_CPY, UDMA_TT_BLK_CPY, UDMA_TT_BLK_CPY},
1041         .testFxnPtr = {&udmaTestBlkcpyTc, &udmaTestBlkcpyTc, &udmaTestBlkcpyTc, &udmaTestBlkcpyTc},
1042         .pacingTime = {PACING_NONE, PACING_NONE, PACING_NONE, PACING_NONE},
1043         .numCh      = {1U, 1U, 1U, 1U},
1044         .instId     = {UDMA_INST_ID_MAIN_0, UDMA_INST_ID_MAIN_0, UDMA_INST_ID_MAIN_0, UDMA_INST_ID_MAIN_0},
1045         .chPrmId    = {UDMA_TEST_CH_PRMID_INTR_DEF, UDMA_TEST_CH_PRMID_INTR_DEF, UDMA_TEST_CH_PRMID_INTR_DEF, UDMA_TEST_CH_PRMID_INTR_DEF},
1046         .qdepth     = {UDMA_TEST_PERF_QDEPTH, UDMA_TEST_PERF_QDEPTH, UDMA_TEST_PERF_QDEPTH, UDMA_TEST_PERF_QDEPTH},
1047         .icnt       = {
1048                         {1*KB, 1U, 1*KB, 1U},
1049                         {1*KB, 1U, 1*KB, 1U},
1050                         {1*KB, 1U, 1*KB, 1U},
1051                         {1*KB, 1U, 1*KB, 1U},
1052                       },
1053         .dicnt      = {
1054                         {1*KB, 1U, 1*KB, 1U},
1055                         {1*KB, 1U, 1*KB, 1U},
1056                         {1*KB, 1U, 1*KB, 1U},
1057                         {1*KB, 1U, 1*KB, 1U},
1058                       },
1059         .dim        = {
1060                         {0U, 0U, 0U},
1061                         {0U, 0U, 0U},
1062                         {0U, 0U, 0U},
1063                         {0U, 0U, 0U},
1064                       },
1065         .ddim       = {
1066                         {0U, 0U, 0U},
1067                         {0U, 0U, 0U},
1068                         {0U, 0U, 0U},
1069                         {0U, 0U, 0U},
1070                       },
1071         .heapIdSrc  = {UTILS_MEM_HEAP_ID_MSMC, UTILS_MEM_HEAP_ID_MSMC, UTILS_MEM_HEAP_ID_MSMC, UTILS_MEM_HEAP_ID_MSMC},
1072         .heapIdDest = {UTILS_MEM_HEAP_ID_MSMC, UTILS_MEM_HEAP_ID_MSMC, UTILS_MEM_HEAP_ID_MSMC, UTILS_MEM_HEAP_ID_MSMC},
1073         .srcBufSize = {1*KB, 1*KB, 1*KB, 1*KB},
1074         .destBufSize= {1*KB, 1*KB, 1*KB, 1*KB},
1075         .runFlag    = (UDMA_TEST_RF_MAIN_BC_MT),
1076         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
1077     },
1078     {
1079         .enableTest = TEST_ENABLE,
1080         .tcId       = 3497U,
1081         .tcName     = "MCU NAVSS Blockcpy MSMC to MSMC circular 1KBx1K (1MB) from multiple tasks",
1082         .disableInfo= NULL,
1083         .printEnable= PRINT_DISABLE,
1084         .prfEnable  = PRF_ENABLE,
1085         .tcType     = (UDMA_TCT_FULL | UDMA_TCT_FUNCTIONAL | UDMA_TCT_PERFORMANCE),
1086         .dcEnable   = DATA_CHECK_DISABLE,
1087         .loopCnt    = UDMA_TEST_PERF_LOOP_CNT,
1088         .numTasks   = UDMA_TEST_MAX_MCU_BC_CH,
1089         .testType   = {UDMA_TT_BLK_CPY, UDMA_TT_BLK_CPY, UDMA_TT_BLK_CPY, UDMA_TT_BLK_CPY},
1090         .testFxnPtr = {&udmaTestBlkcpyTc, &udmaTestBlkcpyTc, &udmaTestBlkcpyTc, &udmaTestBlkcpyTc},
1091         .pacingTime = {PACING_NONE, PACING_NONE, PACING_NONE, PACING_NONE},
1092         .numCh      = {1U, 1U, 1U, 1U},
1093         .instId     = {UDMA_INST_ID_MCU_0, UDMA_INST_ID_MCU_0, UDMA_INST_ID_MCU_0, UDMA_INST_ID_MCU_0},
1094         .chPrmId    = {UDMA_TEST_CH_PRMID_INTR_DEF, UDMA_TEST_CH_PRMID_INTR_DEF, UDMA_TEST_CH_PRMID_INTR_DEF, UDMA_TEST_CH_PRMID_INTR_DEF},
1095         .qdepth     = {UDMA_TEST_PERF_QDEPTH, UDMA_TEST_PERF_QDEPTH, UDMA_TEST_PERF_QDEPTH, UDMA_TEST_PERF_QDEPTH},
1096         .icnt       = {
1097                         {1*KB, 1U, 1*KB, 1U},
1098                         {1*KB, 1U, 1*KB, 1U},
1099                         {1*KB, 1U, 1*KB, 1U},
1100                         {1*KB, 1U, 1*KB, 1U},
1101                       },
1102         .dicnt      = {
1103                         {1*KB, 1U, 1*KB, 1U},
1104                         {1*KB, 1U, 1*KB, 1U},
1105                         {1*KB, 1U, 1*KB, 1U},
1106                         {1*KB, 1U, 1*KB, 1U},
1107                       },
1108         .dim        = {
1109                         {0U, 0U, 0U},
1110                         {0U, 0U, 0U},
1111                         {0U, 0U, 0U},
1112                         {0U, 0U, 0U},
1113                       },
1114         .ddim       = {
1115                         {0U, 0U, 0U},
1116                         {0U, 0U, 0U},
1117                         {0U, 0U, 0U},
1118                         {0U, 0U, 0U},
1119                       },
1120         .heapIdSrc  = {UTILS_MEM_HEAP_ID_MSMC, UTILS_MEM_HEAP_ID_MSMC, UTILS_MEM_HEAP_ID_MSMC, UTILS_MEM_HEAP_ID_MSMC},
1121         .heapIdDest = {UTILS_MEM_HEAP_ID_MSMC, UTILS_MEM_HEAP_ID_MSMC, UTILS_MEM_HEAP_ID_MSMC, UTILS_MEM_HEAP_ID_MSMC},
1122         .srcBufSize = {1*KB, 1*KB, 1*KB, 1*KB},
1123         .destBufSize= {1*KB, 1*KB, 1*KB, 1*KB},
1124         .runFlag    = (UDMA_TEST_RF_MCU_BC_MT),
1125         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
1126     },
1127     {
1128         .enableTest = TEST_ENABLE,
1129         .tcId       = 3498U,
1130         .tcName     = "Main NAVSS 2D Blockcpy DDR 4MB to MSMC circular 4KB at 20ms pacing for 10 seconds",
1131         .disableInfo= NULL,
1132         .printEnable= PRINT_ENABLE,
1133         .prfEnable  = PRF_ENABLE,
1134         .tcType     = (UDMA_TCT_FULL | UDMA_TCT_FUNCTIONAL),
1135         .dcEnable   = DATA_CHECK_DISABLE,
1136         .loopCnt    = 500U,
1137         .numTasks   = 1U,
1138         .testType   = {UDMA_TT_BLK_CPY},
1139         .testFxnPtr = {&udmaTestBlkcpyTc},
1140         .pacingTime = {DEF_PACING},
1141         .numCh      = {1U},
1142         .instId     = {UDMA_INST_ID_MAIN_0},
1143         .chPrmId    = {UDMA_TEST_CH_PRMID_INTR_DEF},
1144         .qdepth     = {UDMA_TEST_DEF_QDEPTH},
1145         .icnt       = {
1146                         {1*KB, 4U, 1*KB, 1U}
1147                       },
1148         .dicnt      = {
1149                         {1*KB, 4U, 1*KB, 1U}
1150                       },
1151         .dim        = {
1152                         {1*KB, 4*KB, 4*MB}
1153                       },
1154         .ddim       = {
1155                         {0U, 0U, 0U}
1156                       },
1157         .heapIdSrc  = {UTILS_MEM_HEAP_ID_DDR},
1158         .heapIdDest = {UTILS_MEM_HEAP_ID_MSMC},
1159         .srcBufSize = {4U*MB},
1160         .destBufSize= {4U*KB},
1161         .runFlag    = (UDMA_TEST_RF_MAIN_BC_PACING),
1162         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
1163     },
1164 #if defined (UDMA_UTC_ID_MSMC_DRU0)
1165     {
1166         .enableTest = TEST_ENABLE,
1167         .tcId       = 3499U,
1168         .tcName     = "DRU Indirect Blockcpy DDR to DDR in polling mode",
1169         .disableInfo= NULL,
1170         .printEnable= PRINT_ENABLE,
1171         .prfEnable  = PRF_DISABLE,
1172         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
1173         .dcEnable   = DATA_CHECK_ENABLE,
1174         .loopCnt    = USE_DEF_LP_CNT,
1175         .numTasks   = 1U,
1176         .testType   = {UDMA_TT_DRU_INDIRECT},
1177         .testFxnPtr = {&udmaTestBlkcpyTc},
1178         .pacingTime = {PACING_NONE},
1179         .numCh      = {1U},
1180         .instId     = {UDMA_INST_ID_MAIN_0},
1181         .chPrmId    = {UDMA_TEST_CH_PRMID_DRU_DEF},
1182         .qdepth     = {USE_DEF_QDEPTH},
1183         .icnt       = {
1184                         {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
1185                       },
1186         .dicnt      = {
1187                         {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
1188                       },
1189         .dim        = {
1190                         {0U, 0U, 0U}
1191                       },
1192         .ddim       = {
1193                         {0U, 0U, 0U}
1194                       },
1195         .heapIdSrc  = {DEF_HEAP_ID},
1196         .heapIdDest = {DEF_HEAP_ID},
1197         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
1198         .destBufSize= {UDMA_TEST_DEF_DICNT0},
1199         .runFlag    = (UDMA_TEST_RF_DRU | UDMA_TEST_RF_CFG_DYN),
1200         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
1201     },
1202     {
1203         .enableTest = TEST_ENABLE,
1204         .tcId       = 3500U,
1205         .tcName     = "DRU Indirect Blockcpy DDR to DDR in interrupt mode",
1206         .disableInfo= NULL,
1207         .printEnable= PRINT_ENABLE,
1208         .prfEnable  = PRF_DISABLE,
1209         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
1210         .dcEnable   = DATA_CHECK_ENABLE,
1211         .loopCnt    = USE_DEF_LP_CNT,
1212         .numTasks   = 1U,
1213         .testType   = {UDMA_TT_DRU_INDIRECT},
1214         .testFxnPtr = {&udmaTestBlkcpyTc},
1215         .pacingTime = {PACING_NONE},
1216         .numCh      = {1U},
1217         .instId     = {UDMA_INST_ID_MAIN_0},
1218         .chPrmId    = {UDMA_TEST_CH_PRMID_DRU_INTR_DEF},
1219         .qdepth     = {USE_DEF_QDEPTH},
1220         .icnt       = {
1221                         {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
1222                       },
1223         .dicnt      = {
1224                         {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
1225                       },
1226         .dim        = {
1227                         {0U, 0U, 0U}
1228                       },
1229         .ddim       = {
1230                         {0U, 0U, 0U}
1231                       },
1232         .heapIdSrc  = {DEF_HEAP_ID},
1233         .heapIdDest = {DEF_HEAP_ID},
1234         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
1235         .destBufSize= {UDMA_TEST_DEF_DICNT0},
1236         .runFlag    = (UDMA_TEST_RF_DRU | UDMA_TEST_RF_CFG_DYN),
1237         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
1238     },
1239     {
1240         .enableTest = TEST_ENABLE,
1241         .tcId       = 3501U,
1242         .tcName     = "DRU Indirect Blockcpy DDR 1MB to DDR 1MB performance test",
1243         .disableInfo= NULL,
1244         .printEnable= PRINT_ENABLE,
1245         .prfEnable  = PRF_ENABLE,
1246         .tcType     = (UDMA_TCT_FULL | UDMA_TCT_FUNCTIONAL | UDMA_TCT_PERFORMANCE),
1247         .dcEnable   = DATA_CHECK_DISABLE,
1248         .loopCnt    = UDMA_TEST_PERF_LOOP_CNT,
1249         .numTasks   = 1U,
1250         .testType   = {UDMA_TT_DRU_INDIRECT},
1251         .testFxnPtr = {&udmaTestBlkcpyTc},
1252         .pacingTime = {PACING_NONE},
1253         .numCh      = {1U},
1254         .instId     = {UDMA_INST_ID_MAIN_0},
1255         .chPrmId    = {UDMA_TEST_CH_PRMID_DRU_INTR_DEF},
1256         .qdepth     = {UDMA_TEST_PERF_QDEPTH},
1257         .icnt       = {
1258                         {1*KB, 1U, 1*KB, 1U},
1259                       },
1260         .dicnt      = {
1261                         {1*KB, 1U, 1*KB, 1U},
1262                       },
1263         .dim        = {
1264                         {1*KB, 1*KB, 0U},
1265                       },
1266         .ddim       = {
1267                         {1*KB, 1*KB, 0U},
1268                       },
1269         .heapIdSrc  = {UTILS_MEM_HEAP_ID_DDR},
1270         .heapIdDest = {UTILS_MEM_HEAP_ID_DDR},
1271         .srcBufSize = {1*MB},
1272         .destBufSize= {1*MB},
1273         .runFlag    = (UDMA_TEST_RF_DRU),
1274         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
1275     },
1276     {
1277         .enableTest = TEST_ENABLE,
1278         .tcId       = 3502U,
1279         .tcName     = "DRU Indirect 2D Blockcpy MSMC circular 1KB to DDR 1MB performance test",
1280         .disableInfo= NULL,
1281         .printEnable= PRINT_ENABLE,
1282         .prfEnable  = PRF_ENABLE,
1283         .tcType     = (UDMA_TCT_FULL | UDMA_TCT_FUNCTIONAL | UDMA_TCT_PERFORMANCE),
1284         .dcEnable   = DATA_CHECK_DISABLE,
1285         .loopCnt    = UDMA_TEST_PERF_LOOP_CNT,
1286         .numTasks   = 1U,
1287         .testType   = {UDMA_TT_DRU_INDIRECT},
1288         .testFxnPtr = {&udmaTestBlkcpyTc},
1289         .pacingTime = {PACING_NONE},
1290         .numCh      = {1U},
1291         .instId     = {UDMA_INST_ID_MAIN_0},
1292         .chPrmId    = {UDMA_TEST_CH_PRMID_DRU_INTR_DEF},
1293         .qdepth     = {UDMA_TEST_DEF_QDEPTH},
1294         .icnt       = {
1295                         {1*KB, 1U, 1*KB, 1U}
1296                       },
1297         .dicnt      = {
1298                         {1*KB, 1U, 1*KB, 1U}
1299                       },
1300         .dim        = {
1301                         {0U, 0U, 0U}
1302                       },
1303         .ddim       = {
1304                         {1*KB, 1*KB, 0U}
1305                       },
1306         .heapIdSrc  = {UTILS_MEM_HEAP_ID_MSMC},
1307         .heapIdDest = {UTILS_MEM_HEAP_ID_DDR},
1308         .srcBufSize = {1*KB},
1309         .destBufSize= {1*MB},
1310         .runFlag    = (UDMA_TEST_RF_DRU),
1311         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
1312     },
1313     {
1314         .enableTest = TEST_ENABLE,
1315         .tcId       = 3503U,
1316         .tcName     = "DRU Indirect 2D Blockcpy DDR 1MB to MSMC circular 1KB performance test",
1317         .disableInfo= NULL,
1318         .printEnable= PRINT_ENABLE,
1319         .prfEnable  = PRF_ENABLE,
1320         .tcType     = (UDMA_TCT_FULL | UDMA_TCT_FUNCTIONAL | UDMA_TCT_PERFORMANCE),
1321         .dcEnable   = DATA_CHECK_DISABLE,
1322         .loopCnt    = UDMA_TEST_PERF_LOOP_CNT,
1323         .numTasks   = 1U,
1324         .testType   = {UDMA_TT_DRU_INDIRECT},
1325         .testFxnPtr = {&udmaTestBlkcpyTc},
1326         .pacingTime = {PACING_NONE},
1327         .numCh      = {1U},
1328         .instId     = {UDMA_INST_ID_MAIN_0},
1329         .chPrmId    = {UDMA_TEST_CH_PRMID_DRU_INTR_DEF},
1330         .qdepth     = {UDMA_TEST_DEF_QDEPTH},
1331         .icnt       = {
1332                         {1*KB, 1U, 1*KB, 1U}
1333                       },
1334         .dicnt      = {
1335                         {1*KB, 1U, 1*KB, 1U}
1336                       },
1337         .dim        = {
1338                         {1*KB, 1*KB, 0U}
1339                       },
1340         .ddim       = {
1341                         {0U, 0U, 0U}
1342                       },
1343         .heapIdSrc  = {UTILS_MEM_HEAP_ID_DDR},
1344         .heapIdDest = {UTILS_MEM_HEAP_ID_MSMC},
1345         .srcBufSize = {1*MB},
1346         .destBufSize= {1*KB},
1347         .runFlag    = (UDMA_TEST_RF_DRU),
1348         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
1349     },
1350     {
1351         .enableTest = TEST_ENABLE,
1352         .tcId       = 3504U,
1353         .tcName     = "DRU Indirect 2D Blockcpy MSMC circular 1KB to MSMC circular 1KB performance test",
1354         .disableInfo= NULL,
1355         .printEnable= PRINT_ENABLE,
1356         .prfEnable  = PRF_ENABLE,
1357         .tcType     = (UDMA_TCT_FULL | UDMA_TCT_FUNCTIONAL | UDMA_TCT_PERFORMANCE),
1358         .dcEnable   = DATA_CHECK_DISABLE,
1359         .loopCnt    = UDMA_TEST_PERF_LOOP_CNT,
1360         .numTasks   = 1U,
1361         .testType   = {UDMA_TT_DRU_INDIRECT},
1362         .testFxnPtr = {&udmaTestBlkcpyTc},
1363         .pacingTime = {PACING_NONE},
1364         .numCh      = {1U},
1365         .instId     = {UDMA_INST_ID_MAIN_0},
1366         .chPrmId    = {UDMA_TEST_CH_PRMID_DRU_INTR_DEF},
1367         .qdepth     = {UDMA_TEST_DEF_QDEPTH},
1368         .icnt       = {
1369                         {1*KB, 1U, 1*KB, 1U}
1370                       },
1371         .dicnt      = {
1372                         {1*KB, 1U, 1*KB, 1U}
1373                       },
1374         .dim        = {
1375                         {0U, 0U, 0U}
1376                       },
1377         .ddim       = {
1378                         {0U, 0U, 0U}
1379                       },
1380         .heapIdSrc  = {UTILS_MEM_HEAP_ID_MSMC},
1381         .heapIdDest = {UTILS_MEM_HEAP_ID_MSMC},
1382         .srcBufSize = {1*KB},
1383         .destBufSize= {1*KB},
1384         .runFlag    = (UDMA_TEST_RF_DRU),
1385         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
1386     },
1387     {
1388         .enableTest = TEST_ENABLE,
1389         .tcId       = 3505U,
1390         .tcName     = "DRU Indirect Blockcpy DDR 1MB to DDR 1MB from multiple tasks",
1391         .disableInfo= NULL,
1392         .printEnable= PRINT_DISABLE,
1393         .prfEnable  = PRF_ENABLE,
1394         .tcType     = (UDMA_TCT_FULL | UDMA_TCT_FUNCTIONAL | UDMA_TCT_PERFORMANCE),
1395         .dcEnable   = DATA_CHECK_DISABLE,
1396         .loopCnt    = UDMA_TEST_PERF_LOOP_CNT,
1397         .numTasks   = UDMA_TEST_MAX_DRU_CH,
1398         .testType   = {UDMA_TT_DRU_INDIRECT, UDMA_TT_DRU_INDIRECT, UDMA_TT_DRU_INDIRECT, UDMA_TT_DRU_INDIRECT},
1399         .testFxnPtr = {&udmaTestBlkcpyTc, &udmaTestBlkcpyTc, &udmaTestBlkcpyTc, &udmaTestBlkcpyTc},
1400         .pacingTime = {PACING_NONE, PACING_NONE, PACING_NONE, PACING_NONE},
1401         .numCh      = {1U, 1U, 1U, 1U},
1402         .instId     = {UDMA_INST_ID_MAIN_0, UDMA_INST_ID_MAIN_0, UDMA_INST_ID_MAIN_0, UDMA_INST_ID_MAIN_0},
1403         .chPrmId    = {UDMA_TEST_CH_PRMID_DRU_INTR_DEF, UDMA_TEST_CH_PRMID_DRU_INTR_DEF, UDMA_TEST_CH_PRMID_DRU_INTR_DEF, UDMA_TEST_CH_PRMID_DRU_INTR_DEF},
1404         .qdepth     = {UDMA_TEST_PERF_QDEPTH, UDMA_TEST_PERF_QDEPTH, UDMA_TEST_PERF_QDEPTH, UDMA_TEST_PERF_QDEPTH},
1405         .icnt       = {
1406                         {1*KB, 1U, 1*KB, 1U},
1407                         {1*KB, 1U, 1*KB, 1U},
1408                         {1*KB, 1U, 1*KB, 1U},
1409                         {1*KB, 1U, 1*KB, 1U},
1410                       },
1411         .dicnt      = {
1412                         {1*KB, 1U, 1*KB, 1U},
1413                         {1*KB, 1U, 1*KB, 1U},
1414                         {1*KB, 1U, 1*KB, 1U},
1415                         {1*KB, 1U, 1*KB, 1U},
1416                       },
1417         .dim        = {
1418                         {1*KB, 1*KB, 0U},
1419                         {1*KB, 1*KB, 0U},
1420                         {1*KB, 1*KB, 0U},
1421                         {1*KB, 1*KB, 0U},
1422                       },
1423         .ddim       = {
1424                         {1*KB, 1*KB, 0U},
1425                         {1*KB, 1*KB, 0U},
1426                         {1*KB, 1*KB, 0U},
1427                         {1*KB, 1*KB, 0U},
1428                       },
1429         .heapIdSrc  = {UTILS_MEM_HEAP_ID_DDR, UTILS_MEM_HEAP_ID_DDR, UTILS_MEM_HEAP_ID_DDR, UTILS_MEM_HEAP_ID_DDR},
1430         .heapIdDest = {UTILS_MEM_HEAP_ID_DDR, UTILS_MEM_HEAP_ID_DDR, UTILS_MEM_HEAP_ID_DDR, UTILS_MEM_HEAP_ID_DDR},
1431         .srcBufSize = {1*MB, 1*MB, 1*MB, 1*MB},
1432         .destBufSize= {1*MB, 1*MB, 1*MB, 1*MB},
1433         .runFlag    = (UDMA_TEST_RF_DRU_MT),
1434         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
1435     },
1436     {
1437         .enableTest = TEST_ENABLE,
1438         .tcId       = 3506U,
1439         .tcName     = "DRU Indirect Blockcpy MSMC to MSMC 1KBx1K (1MB) circular from multiple tasks",
1440         .disableInfo= NULL,
1441         .printEnable= PRINT_DISABLE,
1442         .prfEnable  = PRF_ENABLE,
1443         .tcType     = (UDMA_TCT_FULL | UDMA_TCT_FUNCTIONAL | UDMA_TCT_PERFORMANCE),
1444         .dcEnable   = DATA_CHECK_DISABLE,
1445         .loopCnt    = UDMA_TEST_PERF_LOOP_CNT,
1446         .numTasks   = UDMA_TEST_MAX_DRU_CH,
1447         .testType   = {UDMA_TT_DRU_INDIRECT, UDMA_TT_DRU_INDIRECT, UDMA_TT_DRU_INDIRECT, UDMA_TT_DRU_INDIRECT},
1448         .testFxnPtr = {&udmaTestBlkcpyTc, &udmaTestBlkcpyTc, &udmaTestBlkcpyTc, &udmaTestBlkcpyTc},
1449         .pacingTime = {PACING_NONE, PACING_NONE, PACING_NONE, PACING_NONE},
1450         .numCh      = {1U, 1U, 1U, 1U},
1451         .instId     = {UDMA_INST_ID_MAIN_0, UDMA_INST_ID_MAIN_0, UDMA_INST_ID_MAIN_0, UDMA_INST_ID_MAIN_0},
1452         .chPrmId    = {UDMA_TEST_CH_PRMID_DRU_INTR_DEF, UDMA_TEST_CH_PRMID_DRU_INTR_DEF, UDMA_TEST_CH_PRMID_DRU_INTR_DEF, UDMA_TEST_CH_PRMID_DRU_INTR_DEF},
1453         .qdepth     = {UDMA_TEST_PERF_QDEPTH, UDMA_TEST_PERF_QDEPTH, UDMA_TEST_PERF_QDEPTH, UDMA_TEST_PERF_QDEPTH},
1454         .icnt       = {
1455                         {1*KB, 1U, 1*KB, 1U},
1456                         {1*KB, 1U, 1*KB, 1U},
1457                         {1*KB, 1U, 1*KB, 1U},
1458                         {1*KB, 1U, 1*KB, 1U},
1459                       },
1460         .dicnt      = {
1461                         {1*KB, 1U, 1*KB, 1U},
1462                         {1*KB, 1U, 1*KB, 1U},
1463                         {1*KB, 1U, 1*KB, 1U},
1464                         {1*KB, 1U, 1*KB, 1U},
1465                       },
1466         .dim        = {
1467                         {0U, 0U, 0U},
1468                         {0U, 0U, 0U},
1469                         {0U, 0U, 0U},
1470                         {0U, 0U, 0U},
1471                       },
1472         .ddim       = {
1473                         {0U, 0U, 0U},
1474                         {0U, 0U, 0U},
1475                         {0U, 0U, 0U},
1476                         {0U, 0U, 0U},
1477                       },
1478         .heapIdSrc  = {UTILS_MEM_HEAP_ID_MSMC, UTILS_MEM_HEAP_ID_MSMC, UTILS_MEM_HEAP_ID_MSMC, UTILS_MEM_HEAP_ID_MSMC},
1479         .heapIdDest = {UTILS_MEM_HEAP_ID_MSMC, UTILS_MEM_HEAP_ID_MSMC, UTILS_MEM_HEAP_ID_MSMC, UTILS_MEM_HEAP_ID_MSMC},
1480         .srcBufSize = {1*KB, 1*KB, 1*KB, 1*KB},
1481         .destBufSize= {1*KB, 1*KB, 1*KB, 1*KB},
1482         .runFlag    = (UDMA_TEST_RF_DRU_MT),
1483         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
1484     },
1485 //Enable after adding testcase in Qmetry
1486 #if 0
1487     {
1488         .enableTest = TEST_ENABLE,
1489         .tcId       = 9000U,
1490         .tcName     = "DRU Blockcpy circular 1KB DDR to DDR 1KB ICNT1 TR event type test",
1491         .disableInfo= NULL,
1492         .printEnable= PRINT_ENABLE,
1493         .prfEnable  = PRF_DISABLE,
1494         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
1495         .dcEnable   = DATA_CHECK_ENABLE,
1496         .loopCnt    = 1U,
1497         .numTasks   = 1U,
1498         .testType   = {UDMA_TT_DRU_INDIRECT},
1499         .testFxnPtr = {&udmaTestBlkcpyTc},
1500         .pacingTime = {PACING_NONE},
1501         .numCh      = {1U},
1502         .instId     = {UDMA_INST_ID_MAIN_0},
1503         .chPrmId    = {UDMA_TEST_CH_PRMID_DRU_EVENTSIZE_ICNT1},
1504         .qdepth     = {USE_DEF_QDEPTH},
1505         .icnt       = {
1506                         {1*KB, 1U, 1U, 1U}
1507                       },
1508         .dicnt      = {
1509                         {1*KB, 1U, 1U, 1U}
1510                       },
1511         .dim        = {
1512                         {0U, 0U, 0U}
1513                       },
1514         .ddim       = {
1515                         {1*KB, 0U, 0U}
1516                       },
1517         .heapIdSrc  = {DEF_HEAP_ID},
1518         .heapIdDest = {DEF_HEAP_ID},
1519         .srcBufSize = {1*KB},
1520         .destBufSize= {1*KB},
1521         .runFlag    = (UDMA_TEST_RF_DRU),
1522         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
1523     },
1524     {
1525         .enableTest = TEST_ENABLE,
1526         .tcId       = 9001U,
1527         .tcName     = "DRU Blockcpy circular 1KB DDR to DDR 1KB ICNT2 TR event type test",
1528         .disableInfo= NULL,
1529         .printEnable= PRINT_ENABLE,
1530         .prfEnable  = PRF_DISABLE,
1531         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
1532         .dcEnable   = DATA_CHECK_ENABLE,
1533         .loopCnt    = 1U,
1534         .numTasks   = 1U,
1535         .testType   = {UDMA_TT_DRU_INDIRECT},
1536         .testFxnPtr = {&udmaTestBlkcpyTc},
1537         .pacingTime = {PACING_NONE},
1538         .numCh      = {1U},
1539         .instId     = {UDMA_INST_ID_MAIN_0},
1540         .chPrmId    = {UDMA_TEST_CH_PRMID_DRU_EVENTSIZE_ICNT2},
1541         .qdepth     = {USE_DEF_QDEPTH},
1542         .icnt       = {
1543                         {1*KB, 1U, 1U, 1U}
1544                       },
1545         .dicnt      = {
1546                         {1*KB, 1U, 1U, 1U}
1547                       },
1548         .dim        = {
1549                         {0U, 0U, 0U}
1550                       },
1551         .ddim       = {
1552                         {1*KB, 0U, 0U}
1553                       },
1554         .heapIdSrc  = {DEF_HEAP_ID},
1555         .heapIdDest = {DEF_HEAP_ID},
1556         .srcBufSize = {1*KB},
1557         .destBufSize= {1*KB},
1558         .runFlag    = (UDMA_TEST_RF_DRU),
1559         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
1560     },
1561     {
1562         .enableTest = TEST_ENABLE,
1563         .tcId       = 9002U,
1564         .tcName     = "DRU Blockcpy circular 1KB DDR to DDR 1KB ICNT3 TR event type test",
1565         .disableInfo= NULL,
1566         .printEnable= PRINT_ENABLE,
1567         .prfEnable  = PRF_DISABLE,
1568         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
1569         .dcEnable   = DATA_CHECK_ENABLE,
1570         .loopCnt    = 1U,
1571         .numTasks   = 1U,
1572         .testType   = {UDMA_TT_DRU_INDIRECT},
1573         .testFxnPtr = {&udmaTestBlkcpyTc},
1574         .pacingTime = {PACING_NONE},
1575         .numCh      = {1U},
1576         .instId     = {UDMA_INST_ID_MAIN_0},
1577         .chPrmId    = {UDMA_TEST_CH_PRMID_DRU_EVENTSIZE_ICNT3},
1578         .qdepth     = {USE_DEF_QDEPTH},
1579         .icnt       = {
1580                         {1*KB, 1U, 1U, 1U}
1581                       },
1582         .dicnt      = {
1583                         {1*KB, 1U, 1U, 1U}
1584                       },
1585         .dim        = {
1586                         {0U, 0U, 0U}
1587                       },
1588         .ddim       = {
1589                         {1*KB, 0U, 0U}
1590                       },
1591         .heapIdSrc  = {DEF_HEAP_ID},
1592         .heapIdDest = {DEF_HEAP_ID},
1593         .srcBufSize = {1*KB},
1594         .destBufSize= {1*KB},
1595         .runFlag    = (UDMA_TEST_RF_DRU),
1596         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
1597     },
1598     {
1599         .enableTest = TEST_ENABLE,
1600         .tcId       = 9003U,
1601         .tcName     = "DRU DDR to DDR SW global 0 trigger test in polling mode",
1602         .disableInfo= NULL,
1603         .printEnable= PRINT_ENABLE,
1604         .prfEnable  = PRF_DISABLE,
1605         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
1606         .dcEnable   = DATA_CHECK_ENABLE,
1607         .loopCnt    = USE_DEF_LP_CNT,
1608         .numTasks   = 1U,
1609         .testType   = {UDMA_TT_DRU_INDIRECT},
1610         .testFxnPtr = {&udmaTestBlkcpyTc},
1611         .pacingTime = {PACING_NONE},
1612         .numCh      = {1U},
1613         .instId     = {UDMA_INST_ID_MAIN_0},
1614         .chPrmId    = {UDMA_TEST_CH_PRMID_DRU_TRIGGER_GLOBAL0},
1615         .qdepth     = {USE_DEF_QDEPTH},
1616         .icnt       = {
1617                         {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
1618                       },
1619         .dicnt      = {
1620                         {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
1621                       },
1622         .dim        = {
1623                         {0U, 0U, 0U}
1624                       },
1625         .ddim       = {
1626                         {0U, 0U, 0U}
1627                       },
1628         .heapIdSrc  = {DEF_HEAP_ID},
1629         .heapIdDest = {DEF_HEAP_ID},
1630         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
1631         .destBufSize= {UDMA_TEST_DEF_DICNT0},
1632         .runFlag    = (UDMA_TEST_RF_DRU),
1633         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
1634     },
1635     {
1636         .enableTest = TEST_ENABLE,
1637         .tcId       = 9004U,
1638         .tcName     = "DRU DDR to DDR SW global 0 trigger test in interrupt mode",
1639         .disableInfo= NULL,
1640         .printEnable= PRINT_ENABLE,
1641         .prfEnable  = PRF_DISABLE,
1642         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
1643         .dcEnable   = DATA_CHECK_ENABLE,
1644         .loopCnt    = USE_DEF_LP_CNT,
1645         .numTasks   = 1U,
1646         .testType   = {UDMA_TT_DRU_INDIRECT},
1647         .testFxnPtr = {&udmaTestBlkcpyTc},
1648         .pacingTime = {PACING_NONE},
1649         .numCh      = {1U},
1650         .instId     = {UDMA_INST_ID_MAIN_0},
1651         .chPrmId    = {UDMA_TEST_CH_PRMID_TRIGGER_GLOBAL0_INTR},
1652         .qdepth     = {USE_DEF_QDEPTH},
1653         .icnt       = {
1654                         {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
1655                       },
1656         .dicnt      = {
1657                         {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
1658                       },
1659         .dim        = {
1660                         {0U, 0U, 0U}
1661                       },
1662         .ddim       = {
1663                         {0U, 0U, 0U}
1664                       },
1665         .heapIdSrc  = {DEF_HEAP_ID},
1666         .heapIdDest = {DEF_HEAP_ID},
1667         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
1668         .destBufSize= {UDMA_TEST_DEF_DICNT0},
1669         .runFlag    = (UDMA_TEST_RF_DRU),
1670         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
1671     },
1672 #endif
1673 #endif  /* #if defined (UDMA_UTC_ID_MSMC_DRU0) */
1674     {
1675         .enableTest = TEST_ENABLE,
1676         .tcId       = 3507U,
1677         .tcName     = "Proxy queue and dequeue testcase",
1678         .disableInfo= NULL,
1679         .printEnable= PRINT_ENABLE,
1680         .prfEnable  = PRF_DISABLE,
1681         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
1682         .dcEnable   = DATA_CHECK_ENABLE,
1683         .loopCnt    = 5U,
1684         .numTasks   = 1U,
1685         .testType   = {UDMA_TT_MISC},
1686         .testFxnPtr = {&udmaTestRingProxyTc},
1687         /* All other below parameters not used in this testcase except ring params */
1688         .pacingTime = {PACING_NONE},
1689         .numCh      = {1U},
1690         .instId     = {UDMA_TEST_DEFAULT_UDMA_INST},
1691         .chPrmId    = {UDMA_TEST_CH_PRMID_DEF},
1692         .qdepth     = {USE_DEF_QDEPTH},
1693         .icnt       = {
1694                         {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
1695                       },
1696         .dicnt      = {
1697                         {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
1698                       },
1699         .dim        = {
1700                         {0U, 0U, 0U}
1701                       },
1702         .ddim       = {
1703                         {0U, 0U, 0U}
1704                       },
1705         .heapIdSrc  = {DEF_HEAP_ID},
1706         .heapIdDest = {DEF_HEAP_ID},
1707         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
1708         .destBufSize= {UDMA_TEST_DEF_DICNT0},
1709         .runFlag    = (UDMA_TEST_RF_SOC_ALL | UDMA_TEST_RF_CORE_ALL | UDMA_TEST_RF_CFG_DEF | UDMA_TEST_RF_CFG_DYN),
1710         .ringPrmId  = UDMA_TEST_RING_PRMID_EVENT_NONE,
1711     },
1712     {
1713         .enableTest = TEST_ENABLE,
1714         .tcId       = 3508U,
1715         .tcName     = "Ring flush API testcase",
1716         .disableInfo= NULL,
1717         .printEnable= PRINT_ENABLE,
1718         .prfEnable  = PRF_DISABLE,
1719         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
1720         .dcEnable   = DATA_CHECK_ENABLE,
1721         .loopCnt    = 1U,
1722         .numTasks   = 1U,
1723         .testType   = {UDMA_TT_MISC},
1724         .testFxnPtr = {&udmaTestRingFlushTc},
1725         /* All other below parameters not used in this testcase except ring params */
1726         .pacingTime = {PACING_NONE},
1727         .numCh      = {1U},
1728         .instId     = {UDMA_TEST_DEFAULT_UDMA_INST},
1729         .chPrmId    = {UDMA_TEST_CH_PRMID_DEF},
1730         .qdepth     = {USE_DEF_QDEPTH},
1731         .icnt       = {
1732                         {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
1733                       },
1734         .dicnt      = {
1735                         {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
1736                       },
1737         .dim        = {
1738                         {0U, 0U, 0U}
1739                       },
1740         .ddim       = {
1741                         {0U, 0U, 0U}
1742                       },
1743         .heapIdSrc  = {DEF_HEAP_ID},
1744         .heapIdDest = {DEF_HEAP_ID},
1745         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
1746         .destBufSize= {UDMA_TEST_DEF_DICNT0},
1747         .runFlag    = (UDMA_TEST_RF_SOC_ALL | UDMA_TEST_RF_CORE_ALL | UDMA_TEST_RF_CFG_DEF | UDMA_TEST_RF_CFG_DYN),
1748         .ringPrmId  = UDMA_TEST_RING_PRMID_EVENT_NONE,
1749     },
1750     {
1751         .enableTest = TEST_ENABLE,
1752         .tcId       = 3509U,
1753         .tcName     = "Ring event testcase in interrupt mode",
1754         .disableInfo= NULL,
1755         .printEnable= PRINT_ENABLE,
1756         .prfEnable  = PRF_DISABLE,
1757         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
1758         .dcEnable   = DATA_CHECK_ENABLE,
1759         .loopCnt    = 10U,
1760         .numTasks   = 1U,
1761         .testType   = {UDMA_TT_MISC},
1762         .testFxnPtr = {&udmaTestRingEventTc},
1763         /* All other below parameters not used in this testcase except ring params */
1764         .pacingTime = {PACING_NONE},
1765         .numCh      = {1U},
1766         .instId     = {UDMA_TEST_DEFAULT_UDMA_INST},
1767         .chPrmId    = {UDMA_TEST_CH_PRMID_DEF},
1768         .qdepth     = {USE_DEF_QDEPTH},
1769         .icnt       = {
1770                         {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
1771                       },
1772         .dicnt      = {
1773                         {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
1774                       },
1775         .dim        = {
1776                         {0U, 0U, 0U}
1777                       },
1778         .ddim       = {
1779                         {0U, 0U, 0U}
1780                       },
1781         .heapIdSrc  = {DEF_HEAP_ID},
1782         .heapIdDest = {DEF_HEAP_ID},
1783         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
1784         .destBufSize= {UDMA_TEST_DEF_DICNT0},
1785         .runFlag    = (UDMA_TEST_RF_SOC_ALL | UDMA_TEST_RF_CORE_ALL | UDMA_TEST_RF_CFG_DEF | UDMA_TEST_RF_CFG_DYN),
1786         .ringPrmId  = UDMA_TEST_RING_PRMID_EVENT_INTR,
1787     },
1788     {
1789         .enableTest = TEST_ENABLE,
1790         .tcId       = 3510U,
1791         .tcName     = "Ring event testcase in event polled mode",
1792         .disableInfo= NULL,
1793         .printEnable= PRINT_ENABLE,
1794         .prfEnable  = PRF_DISABLE,
1795         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
1796         .dcEnable   = DATA_CHECK_ENABLE,
1797         .loopCnt    = 10U,
1798         .numTasks   = 1U,
1799         .testType   = {UDMA_TT_MISC},
1800         .testFxnPtr = {&udmaTestRingEventTc},
1801         /* All other below parameters not used in this testcase except ring params */
1802         .pacingTime = {PACING_NONE},
1803         .numCh      = {1U},
1804         .instId     = {UDMA_TEST_DEFAULT_UDMA_INST},
1805         .chPrmId    = {UDMA_TEST_CH_PRMID_DEF},
1806         .qdepth     = {USE_DEF_QDEPTH},
1807         .icnt       = {
1808                         {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
1809                       },
1810         .dicnt      = {
1811                         {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
1812                       },
1813         .dim        = {
1814                         {0U, 0U, 0U}
1815                       },
1816         .ddim       = {
1817                         {0U, 0U, 0U}
1818                       },
1819         .heapIdSrc  = {DEF_HEAP_ID},
1820         .heapIdDest = {DEF_HEAP_ID},
1821         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
1822         .destBufSize= {UDMA_TEST_DEF_DICNT0},
1823         .runFlag    = (UDMA_TEST_RF_SOC_ALL | UDMA_TEST_RF_CORE_ALL | UDMA_TEST_RF_CFG_DEF | UDMA_TEST_RF_CFG_DYN),
1824         .ringPrmId  = UDMA_TEST_RING_PRMID_EVENT_POLLED,
1825     },
1826     {
1827         .enableTest = TEST_ENABLE,
1828         .tcId       = 3511U,
1829         .tcName     = "Ring parameter check test",
1830         .disableInfo= NULL,
1831         .printEnable= PRINT_ENABLE,
1832         .prfEnable  = PRF_DISABLE,
1833         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_NEGATIVE),
1834         .dcEnable   = DATA_CHECK_ENABLE,
1835         .loopCnt    = 1U,
1836         .numTasks   = 1U,
1837         .testType   = {UDMA_TT_MISC},
1838         .testFxnPtr = {&udmaTestRingParamCheckTc},
1839         /* All other below parameters not used in this testcase except ring params */
1840         .pacingTime = {PACING_NONE},
1841         .numCh      = {1U},
1842         .instId     = {UDMA_TEST_DEFAULT_UDMA_INST},
1843         .chPrmId    = {UDMA_TEST_CH_PRMID_DEF},
1844         .qdepth     = {USE_DEF_QDEPTH},
1845         .icnt       = {
1846                         {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
1847                       },
1848         .dicnt      = {
1849                         {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
1850                       },
1851         .dim        = {
1852                         {0U, 0U, 0U}
1853                       },
1854         .ddim       = {
1855                         {0U, 0U, 0U}
1856                       },
1857         .heapIdSrc  = {DEF_HEAP_ID},
1858         .heapIdDest = {DEF_HEAP_ID},
1859         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
1860         .destBufSize= {UDMA_TEST_DEF_DICNT0},
1861         .runFlag    = (UDMA_TEST_RF_SOC_ALL | UDMA_TEST_RF_CORE_ALL | UDMA_TEST_RF_CFG_DEF | UDMA_TEST_RF_CFG_DYN),
1862         .ringPrmId  = UDMA_TEST_RING_PRMID_EVENT_POLLED,
1863     },
1864     {
1865         .enableTest = TEST_ENABLE,
1866         .tcId       = 3512U,
1867         .tcName     = "Ring Utils Mem Size test",
1868         .disableInfo= NULL,
1869         .printEnable= PRINT_ENABLE,
1870         .prfEnable  = PRF_DISABLE,
1871         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
1872         .dcEnable   = DATA_CHECK_ENABLE,
1873         .loopCnt    = 1U,
1874         .numTasks   = 1U,
1875         .testType   = {UDMA_TT_MISC},
1876         .testFxnPtr = {&udmaTestRingUtilsMemSizeTc},
1877         /* All other below parameters not used in this testcase except ring params */
1878         .pacingTime = {PACING_NONE},
1879         .numCh      = {1U},
1880         .instId     = {UDMA_TEST_DEFAULT_UDMA_INST},
1881         .chPrmId    = {UDMA_TEST_CH_PRMID_DEF},
1882         .qdepth     = {USE_DEF_QDEPTH},
1883         .icnt       = {
1884                         {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
1885                       },
1886         .dicnt      = {
1887                         {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
1888                       },
1889         .dim        = {
1890                         {0U, 0U, 0U}
1891                       },
1892         .ddim       = {
1893                         {0U, 0U, 0U}
1894                       },
1895         .heapIdSrc  = {DEF_HEAP_ID},
1896         .heapIdDest = {DEF_HEAP_ID},
1897         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
1898         .destBufSize= {UDMA_TEST_DEF_DICNT0},
1899         .runFlag    = (UDMA_TEST_RF_SOC_ALL | UDMA_TEST_RF_CORE_ALL | UDMA_TEST_RF_CFG_DEF | UDMA_TEST_RF_CFG_DYN),
1900         .ringPrmId  = UDMA_TEST_RING_PRMID_EVENT_POLLED,
1901     },
1902     {
1903         .enableTest = TEST_ENABLE,
1904         .tcId       = 3682U,
1905         .tcName     = "Ring Mem Pointer test",
1906         .disableInfo= NULL,
1907         .printEnable= PRINT_ENABLE,
1908         .prfEnable  = PRF_DISABLE,
1909         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
1910         .dcEnable   = DATA_CHECK_ENABLE,
1911         .loopCnt    = 1U,
1912         .numTasks   = 1U,
1913         .testType   = {UDMA_TT_MISC},
1914         .testFxnPtr = {&udmaTestRingMemPtrTc},
1915         /* All other below parameters not used in this testcase except ring params */
1916         .pacingTime = {PACING_NONE},
1917         .numCh      = {1U},
1918         .instId     = {UDMA_TEST_DEFAULT_UDMA_INST},
1919         .chPrmId    = {UDMA_TEST_CH_PRMID_DEF},
1920         .qdepth     = {USE_DEF_QDEPTH},
1921         .icnt       = {
1922                         {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
1923                       },
1924         .dicnt      = {
1925                         {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
1926                       },
1927         .dim        = {
1928                         {0U, 0U, 0U}
1929                       },
1930         .ddim       = {
1931                         {0U, 0U, 0U}
1932                       },
1933         .heapIdSrc  = {DEF_HEAP_ID},
1934         .heapIdDest = {DEF_HEAP_ID},
1935         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
1936         .destBufSize= {UDMA_TEST_DEF_DICNT0},
1937         .runFlag    = (UDMA_TEST_RF_SOC_ALL | UDMA_TEST_RF_CORE_ALL | UDMA_TEST_RF_CFG_DEF | UDMA_TEST_RF_CFG_DYN),
1938         .ringPrmId  = UDMA_TEST_RING_PRMID_EVENT_POLLED,
1939     },
1940     {
1941         .enableTest = TEST_ENABLE,
1942         .tcId       = 3726U,
1943         .tcName     = "Ring attach and detach testcase",
1944         .disableInfo= NULL,
1945         .printEnable= PRINT_ENABLE,
1946         .prfEnable  = PRF_DISABLE,
1947         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
1948         .dcEnable   = DATA_CHECK_ENABLE,
1949         .loopCnt    = 5U,
1950         .numTasks   = 1U,
1951         .testType   = {UDMA_TT_MISC},
1952         .testFxnPtr = {&udmaTestRingAttachTc},
1953         /* All other below parameters not used in this testcase except ring params */
1954         .pacingTime = {PACING_NONE},
1955         .numCh      = {1U},
1956         .instId     = {UDMA_TEST_DEFAULT_UDMA_INST},
1957         .chPrmId    = {UDMA_TEST_CH_PRMID_DEF},
1958         .qdepth     = {USE_DEF_QDEPTH},
1959         .icnt       = {
1960                         {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
1961                       },
1962         .dicnt      = {
1963                         {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
1964                       },
1965         .dim        = {
1966                         {0U, 0U, 0U}
1967                       },
1968         .ddim       = {
1969                         {0U, 0U, 0U}
1970                       },
1971         .heapIdSrc  = {DEF_HEAP_ID},
1972         .heapIdDest = {DEF_HEAP_ID},
1973         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
1974         .destBufSize= {UDMA_TEST_DEF_DICNT0},
1975         .runFlag    = (UDMA_TEST_RF_SOC_ALL | UDMA_TEST_RF_CORE_ALL | UDMA_TEST_RF_CFG_DEF | UDMA_TEST_RF_CFG_DYN),
1976         .ringPrmId  = UDMA_TEST_RING_PRMID_EVENT_NONE,
1977     },
1978     {
1979         .enableTest = TEST_ENABLE,
1980         .tcId       = 4644U,
1981         .tcName     = "Ring reset workaround test",
1982         .disableInfo= NULL,
1983         .printEnable= PRINT_ENABLE,
1984         .prfEnable  = PRF_DISABLE,
1985         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
1986         .dcEnable   = DATA_CHECK_ENABLE,
1987         .loopCnt    = 1U,
1988         .numTasks   = 1U,
1989         .testType   = {UDMA_TT_MISC},
1990         .testFxnPtr = {&udmaTestRingResetTc},
1991         /* All other below parameters not used in this testcase except ring params */
1992         .pacingTime = {PACING_NONE},
1993         .numCh      = {1U},
1994         .instId     = {UDMA_TEST_DEFAULT_UDMA_INST},
1995         .chPrmId    = {UDMA_TEST_CH_PRMID_DEF},
1996         .qdepth     = {USE_DEF_QDEPTH},
1997         .icnt       = {
1998                         {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
1999                       },
2000         .dicnt      = {
2001                         {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
2002                       },
2003         .dim        = {
2004                         {0U, 0U, 0U}
2005                       },
2006         .ddim       = {
2007                         {0U, 0U, 0U}
2008                       },
2009         .heapIdSrc  = {DEF_HEAP_ID},
2010         .heapIdDest = {DEF_HEAP_ID},
2011         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
2012         .destBufSize= {UDMA_TEST_DEF_DICNT0},
2013         .runFlag    = (UDMA_TEST_RF_SOC_AM65XX | UDMA_TEST_RF_CORE_ALL | UDMA_TEST_RF_CFG_DEF | UDMA_TEST_RF_CFG_DYN),
2014         .ringPrmId  = UDMA_TEST_RING_PRMID_EVENT_NONE,
2015     },
2016     {
2017         .enableTest = TEST_ENABLE,
2018         .tcId       = 4693U,
2019         .tcName     = "Ring prime test",
2020         .disableInfo= NULL,
2021         .printEnable= PRINT_ENABLE,
2022         .prfEnable  = PRF_DISABLE,
2023         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
2024         .dcEnable   = DATA_CHECK_ENABLE,
2025         .loopCnt    = 1U,
2026         .numTasks   = 1U,
2027         .testType   = {UDMA_TT_MISC},
2028         .testFxnPtr = {&udmaTestRingPrimeTc},
2029         /* All other below parameters not used in this testcase except ring params */
2030         .pacingTime = {PACING_NONE},
2031         .numCh      = {1U},
2032         .instId     = {UDMA_TEST_DEFAULT_UDMA_INST},
2033         .chPrmId    = {UDMA_TEST_CH_PRMID_DEF},
2034         .qdepth     = {USE_DEF_QDEPTH},
2035         .icnt       = {
2036                         {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
2037                       },
2038         .dicnt      = {
2039                         {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
2040                       },
2041         .dim        = {
2042                         {0U, 0U, 0U}
2043                       },
2044         .ddim       = {
2045                         {0U, 0U, 0U}
2046                       },
2047         .heapIdSrc  = {DEF_HEAP_ID},
2048         .heapIdDest = {DEF_HEAP_ID},
2049         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
2050         .destBufSize= {UDMA_TEST_DEF_DICNT0},
2051         .runFlag    = (UDMA_TEST_RF_SOC_ALL | UDMA_TEST_RF_CORE_ALL | UDMA_TEST_RF_CFG_DEF | UDMA_TEST_RF_CFG_DYN),
2052         .ringPrmId  = UDMA_TEST_RING_PRMID_EVENT_NONE,
2053     },
2054     {
2055         .enableTest = TEST_DISABLE,
2056         .tcId       = 4636U,
2057         .tcName     = "Ring Monitor Push and Pop Mode test",
2058         .disableInfo= "Blocked on SYSFW-2824",
2059         .printEnable= PRINT_ENABLE,
2060         .prfEnable  = PRF_DISABLE,
2061         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
2062         .dcEnable   = DATA_CHECK_ENABLE,
2063         .loopCnt    = 1U,
2064         .numTasks   = 1U,
2065         .testType   = {UDMA_TT_MISC},
2066         .testFxnPtr = {&udmaTestRingMonPushPopTc},
2067         /* All other below parameters not used in this testcase except ring params */
2068         .pacingTime = {PACING_NONE},
2069         .numCh      = {1U},
2070         .instId     = {UDMA_TEST_DEFAULT_UDMA_INST},
2071         .chPrmId    = {UDMA_TEST_CH_PRMID_DEF},
2072         .qdepth     = {USE_DEF_QDEPTH},
2073         .icnt       = {
2074                         {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
2075                       },
2076         .dicnt      = {
2077                         {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
2078                       },
2079         .dim        = {
2080                         {0U, 0U, 0U}
2081                       },
2082         .ddim       = {
2083                         {0U, 0U, 0U}
2084                       },
2085         .heapIdSrc  = {DEF_HEAP_ID},
2086         .heapIdDest = {DEF_HEAP_ID},
2087         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
2088         .destBufSize= {UDMA_TEST_DEF_DICNT0},
2089         .runFlag    = (UDMA_TEST_RF_SOC_J721E | UDMA_TEST_RF_CORE_ALL | UDMA_TEST_RF_CFG_DEF | UDMA_TEST_RF_CFG_DYN),
2090         .ringPrmId  = UDMA_TEST_RING_PRMID_EVENT_NONE,
2091     },
2092     {
2093         .enableTest = TEST_DISABLE,
2094         .tcId       = 4637U,
2095         .tcName     = "Ring Monitor Low Threshold Mode test",
2096         .disableInfo= "Blocked on SYSFW-2824",
2097         .printEnable= PRINT_ENABLE,
2098         .prfEnable  = PRF_DISABLE,
2099         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
2100         .dcEnable   = DATA_CHECK_ENABLE,
2101         .loopCnt    = 1U,
2102         .numTasks   = 1U,
2103         .testType   = {UDMA_TT_MISC},
2104         .testFxnPtr = {&udmaTestRingMonLowThresholdTc},
2105         /* All other below parameters not used in this testcase except ring params */
2106         .pacingTime = {PACING_NONE},
2107         .numCh      = {1U},
2108         .instId     = {UDMA_TEST_DEFAULT_UDMA_INST},
2109         .chPrmId    = {UDMA_TEST_CH_PRMID_DEF},
2110         .qdepth     = {USE_DEF_QDEPTH},
2111         .icnt       = {
2112                         {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
2113                       },
2114         .dicnt      = {
2115                         {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
2116                       },
2117         .dim        = {
2118                         {0U, 0U, 0U}
2119                       },
2120         .ddim       = {
2121                         {0U, 0U, 0U}
2122                       },
2123         .heapIdSrc  = {DEF_HEAP_ID},
2124         .heapIdDest = {DEF_HEAP_ID},
2125         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
2126         .destBufSize= {UDMA_TEST_DEF_DICNT0},
2127         .runFlag    = (UDMA_TEST_RF_SOC_J721E | UDMA_TEST_RF_CORE_ALL | UDMA_TEST_RF_CFG_DEF | UDMA_TEST_RF_CFG_DYN),
2128         .ringPrmId  = UDMA_TEST_RING_PRMID_EVENT_NONE,
2129     },
2130     {
2131         .enableTest = TEST_DISABLE,
2132         .tcId       = 4638U,
2133         .tcName     = "Ring Monitor High Threshold Mode test",
2134         .disableInfo= "Blocked on SYSFW-2824",
2135         .printEnable= PRINT_ENABLE,
2136         .prfEnable  = PRF_DISABLE,
2137         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
2138         .dcEnable   = DATA_CHECK_ENABLE,
2139         .loopCnt    = 1U,
2140         .numTasks   = 1U,
2141         .testType   = {UDMA_TT_MISC},
2142         .testFxnPtr = {&udmaTestRingMonHighThresholdTc},
2143         /* All other below parameters not used in this testcase except ring params */
2144         .pacingTime = {PACING_NONE},
2145         .numCh      = {1U},
2146         .instId     = {UDMA_TEST_DEFAULT_UDMA_INST},
2147         .chPrmId    = {UDMA_TEST_CH_PRMID_DEF},
2148         .qdepth     = {USE_DEF_QDEPTH},
2149         .icnt       = {
2150                         {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
2151                       },
2152         .dicnt      = {
2153                         {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
2154                       },
2155         .dim        = {
2156                         {0U, 0U, 0U}
2157                       },
2158         .ddim       = {
2159                         {0U, 0U, 0U}
2160                       },
2161         .heapIdSrc  = {DEF_HEAP_ID},
2162         .heapIdDest = {DEF_HEAP_ID},
2163         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
2164         .destBufSize= {UDMA_TEST_DEF_DICNT0},
2165         .runFlag    = (UDMA_TEST_RF_SOC_J721E | UDMA_TEST_RF_CORE_ALL | UDMA_TEST_RF_CFG_DEF | UDMA_TEST_RF_CFG_DYN),
2166         .ringPrmId  = UDMA_TEST_RING_PRMID_EVENT_NONE,
2167     },
2168     {
2169         .enableTest = TEST_ENABLE,
2170         .tcId       = 4238U,
2171         .tcName     = "Proxy queue and dequeue testcase with allocated proxy",
2172         .disableInfo= NULL,
2173         .printEnable= PRINT_ENABLE,
2174         .prfEnable  = PRF_ENABLE,
2175         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL | UDMA_TCT_PERFORMANCE),
2176         .dcEnable   = DATA_CHECK_ENABLE,
2177         .loopCnt    = UDMA_TEST_PERF_LOOP_CNT,
2178         .numTasks   = 1U,
2179         .testType   = {UDMA_TT_MISC},
2180         .testFxnPtr = {&udmaTestProxyPerformanceTc},
2181         /* All other below parameters not used in this testcase except ring params */
2182         .pacingTime = {PACING_NONE},
2183         .numCh      = {1U},
2184         .instId     = {UDMA_TEST_DEFAULT_UDMA_INST},
2185         .chPrmId    = {UDMA_TEST_CH_PRMID_DEF},
2186         .qdepth     = {USE_DEF_QDEPTH},
2187         .icnt       = {
2188                         {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
2189                       },
2190         .dicnt      = {
2191                         {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
2192                       },
2193         .dim        = {
2194                         {0U, 0U, 0U}
2195                       },
2196         .ddim       = {
2197                         {0U, 0U, 0U}
2198                       },
2199         .heapIdSrc  = {DEF_HEAP_ID},
2200         .heapIdDest = {DEF_HEAP_ID},
2201         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
2202         .destBufSize= {UDMA_TEST_DEF_DICNT0},
2203         .runFlag    = (UDMA_TEST_RF_SOC_ALL | UDMA_TEST_RF_CORE_ALL | UDMA_TEST_RF_CFG_DEF | UDMA_TEST_RF_CFG_DYN),
2204         .ringPrmId  = UDMA_TEST_RING_PRMID_EVENT_NONE,
2205     },
2206     {
2207         .enableTest = TEST_ENABLE,
2208         .tcId       = 3729U,
2209         .tcName     = "Flow attach and detach testcase",
2210         .disableInfo= NULL,
2211         .printEnable= PRINT_ENABLE,
2212         .prfEnable  = PRF_DISABLE,
2213         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
2214         .dcEnable   = DATA_CHECK_ENABLE,
2215         .loopCnt    = 5U,
2216         .numTasks   = 1U,
2217         .testType   = {UDMA_TT_MISC},
2218         .testFxnPtr = {&udmaTestFlowAttachTc},
2219         /* All other below parameters not used in this testcase except ring params */
2220         .pacingTime = {PACING_NONE},
2221         .numCh      = {1U},
2222         .instId     = {UDMA_TEST_DEFAULT_UDMA_INST},
2223         .chPrmId    = {UDMA_TEST_CH_PRMID_DEF},
2224         .qdepth     = {USE_DEF_QDEPTH},
2225         .icnt       = {
2226                         {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
2227                       },
2228         .dicnt      = {
2229                         {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
2230                       },
2231         .dim        = {
2232                         {0U, 0U, 0U}
2233                       },
2234         .ddim       = {
2235                         {0U, 0U, 0U}
2236                       },
2237         .heapIdSrc  = {DEF_HEAP_ID},
2238         .heapIdDest = {DEF_HEAP_ID},
2239         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
2240         .destBufSize= {UDMA_TEST_DEF_DICNT0},
2241         .runFlag    = (UDMA_TEST_RF_FLOW | UDMA_TEST_RF_CFG_DYN),
2242         .ringPrmId  = UDMA_TEST_RING_PRMID_EVENT_NONE,
2243     },
2244     {
2245         .enableTest = TEST_ENABLE,
2246         .tcId       = 4154U,
2247         .tcName     = "Flow alloc and free testcase",
2248         .disableInfo= NULL,
2249         .printEnable= PRINT_ENABLE,
2250         .prfEnable  = PRF_DISABLE,
2251         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
2252         .dcEnable   = DATA_CHECK_ENABLE,
2253         .loopCnt    = 1U,
2254         .numTasks   = 1U,
2255         .testType   = {UDMA_TT_MISC},
2256         .testFxnPtr = {&udmaTestFlowAllocTc},
2257         /* All other below parameters not used in this testcase except ring params */
2258         .pacingTime = {PACING_NONE},
2259         .numCh      = {1U},
2260         .instId     = {UDMA_TEST_DEFAULT_UDMA_INST},
2261         .chPrmId    = {UDMA_TEST_CH_PRMID_DEF},
2262         .qdepth     = {USE_DEF_QDEPTH},
2263         .icnt       = {
2264                         {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
2265                       },
2266         .dicnt      = {
2267                         {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
2268                       },
2269         .dim        = {
2270                         {0U, 0U, 0U}
2271                       },
2272         .ddim       = {
2273                         {0U, 0U, 0U}
2274                       },
2275         .heapIdSrc  = {DEF_HEAP_ID},
2276         .heapIdDest = {DEF_HEAP_ID},
2277         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
2278         .destBufSize= {UDMA_TEST_DEF_DICNT0},
2279         .runFlag    = (UDMA_TEST_RF_FLOW | UDMA_TEST_RF_CFG_DYN),
2280         .ringPrmId  = UDMA_TEST_RING_PRMID_EVENT_NONE,
2281     },
2282     {
2283         .enableTest = TEST_ENABLE,
2284         .tcId       = 3513U,
2285         .tcName     = "PSIL and PDMA macro verification testcase",
2286         .disableInfo= NULL,
2287         .printEnable= PRINT_ENABLE,
2288         .prfEnable  = PRF_DISABLE,
2289         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
2290         .dcEnable   = DATA_CHECK_ENABLE,
2291         .loopCnt    = USE_DEF_LP_CNT,
2292         .numTasks   = 1U,
2293         .testType   = {UDMA_TT_MISC},
2294         .testFxnPtr = {&udmaTestPsilMacroTc},
2295         /* All other below parameters not used in this testcase */
2296         .pacingTime = {PACING_NONE},
2297         .numCh      = {1U},
2298         .instId     = {UDMA_TEST_DEFAULT_UDMA_INST},
2299         .chPrmId    = {UDMA_TEST_CH_PRMID_DEF},
2300         .qdepth     = {USE_DEF_QDEPTH},
2301         .icnt       = {
2302                         {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
2303                       },
2304         .dicnt      = {
2305                         {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
2306                       },
2307         .dim        = {
2308                         {0U, 0U, 0U}
2309                       },
2310         .ddim       = {
2311                         {0U, 0U, 0U}
2312                       },
2313         .heapIdSrc  = {DEF_HEAP_ID},
2314         .heapIdDest = {DEF_HEAP_ID},
2315         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
2316         .destBufSize= {UDMA_TEST_DEF_DICNT0},
2317         .runFlag    = (UDMA_TEST_RF_SOC_ALL | UDMA_TEST_RF_CORE_ALL | UDMA_TEST_RF_CFG_DEF),
2318         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
2319     },
2320     {
2321         .enableTest = TEST_ENABLE,
2322         .tcId       = 3514U,
2323         .tcName     = "OSAL params testcase",
2324         .disableInfo= NULL,
2325         .printEnable= PRINT_ENABLE,
2326         .prfEnable  = PRF_DISABLE,
2327         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
2328         .dcEnable   = DATA_CHECK_ENABLE,
2329         .loopCnt    = USE_DEF_LP_CNT,
2330         .numTasks   = 1U,
2331         .testType   = {UDMA_TT_MISC},
2332         .testFxnPtr = {&udmaTestOsalPrmsTc},
2333         .pacingTime = {PACING_NONE},
2334         .numCh      = {1U},
2335         .instId     = {UDMA_TEST_DEFAULT_UDMA_INST},
2336         .chPrmId    = {UDMA_TEST_CH_PRMID_INTR_DEF},
2337         .qdepth     = {USE_DEF_QDEPTH},
2338         .icnt       = {
2339                         {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
2340                       },
2341         .dicnt      = {
2342                         {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
2343                       },
2344         .dim        = {
2345                         {0U, 0U, 0U}
2346                       },
2347         .ddim       = {
2348                         {0U, 0U, 0U}
2349                       },
2350         .heapIdSrc  = {DEF_HEAP_ID},
2351         .heapIdDest = {DEF_HEAP_ID},
2352         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
2353         .destBufSize= {UDMA_TEST_DEF_DICNT0},
2354         .runFlag    = (UDMA_TEST_RF_SOC_ALL | UDMA_TEST_RF_CORE_ALL | UDMA_TEST_RF_CFG_DEF | UDMA_TEST_RF_CFG_DYN),
2355         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
2356     },
2357     {
2358         .enableTest = TEST_ENABLE,
2359         .tcId       = 3515U,
2360         .tcName     = "TR make utility testcase",
2361         .disableInfo= NULL,
2362         .printEnable= PRINT_ENABLE,
2363         .prfEnable  = PRF_DISABLE,
2364         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
2365         .dcEnable   = DATA_CHECK_ENABLE,
2366         .loopCnt    = USE_DEF_LP_CNT,
2367         .numTasks   = 1U,
2368         .testType   = {UDMA_TT_MISC},
2369         .testFxnPtr = {&udmaTestTrMakeTc},
2370         /* All other below parameters not used in this testcase */
2371         .pacingTime = {PACING_NONE},
2372         .numCh      = {1U},
2373         .instId     = {UDMA_TEST_DEFAULT_UDMA_INST},
2374         .chPrmId    = {UDMA_TEST_CH_PRMID_INTR_DEF},
2375         .qdepth     = {USE_DEF_QDEPTH},
2376         .icnt       = {
2377                         {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
2378                       },
2379         .dicnt      = {
2380                         {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
2381                       },
2382         .dim        = {
2383                         {0U, 0U, 0U}
2384                       },
2385         .ddim       = {
2386                         {0U, 0U, 0U}
2387                       },
2388         .heapIdSrc  = {DEF_HEAP_ID},
2389         .heapIdDest = {DEF_HEAP_ID},
2390         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
2391         .destBufSize= {UDMA_TEST_DEF_DICNT0},
2392         .runFlag    = (UDMA_TEST_RF_SOC_ALL | UDMA_TEST_RF_CORE_ALL | UDMA_TEST_RF_CFG_DEF | UDMA_TEST_RF_CFG_DYN),
2393         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
2394     },
2395     {
2396         .enableTest = TEST_ENABLE,
2397         .tcId       = 3733U,
2398         .tcName     = "UDMA structure size print testcase",
2399         .disableInfo= NULL,
2400         .printEnable= PRINT_ENABLE,
2401         .prfEnable  = PRF_DISABLE,
2402         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
2403         .dcEnable   = DATA_CHECK_ENABLE,
2404         .loopCnt    = USE_DEF_LP_CNT,
2405         .numTasks   = 1U,
2406         .testType   = {UDMA_TT_MISC},
2407         .testFxnPtr = {&udmaTestStructSizeTc},
2408         /* All other below parameters not used in this testcase */
2409         .pacingTime = {PACING_NONE},
2410         .numCh      = {1U},
2411         .instId     = {UDMA_TEST_DEFAULT_UDMA_INST},
2412         .chPrmId    = {UDMA_TEST_CH_PRMID_INTR_DEF},
2413         .qdepth     = {USE_DEF_QDEPTH},
2414         .icnt       = {
2415                         {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
2416                       },
2417         .dicnt      = {
2418                         {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
2419                       },
2420         .dim        = {
2421                         {0U, 0U, 0U}
2422                       },
2423         .ddim       = {
2424                         {0U, 0U, 0U}
2425                       },
2426         .heapIdSrc  = {DEF_HEAP_ID},
2427         .heapIdDest = {DEF_HEAP_ID},
2428         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
2429         .destBufSize= {UDMA_TEST_DEF_DICNT0},
2430         .runFlag    = (UDMA_TEST_RF_SOC_ALL | UDMA_TEST_RF_CORE_ALL | UDMA_TEST_RF_CFG_DEF),
2431         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
2432     },
2433     {
2434         .enableTest = TEST_ENABLE,
2435         .tcId       = 3707U,
2436         .tcName     = "Out of range flow ID Event testcase",
2437         .disableInfo= NULL,
2438         .printEnable= PRINT_ENABLE,
2439         .prfEnable  = PRF_DISABLE,
2440         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
2441         .dcEnable   = DATA_CHECK_ENABLE,
2442         .loopCnt    = 100U,
2443         .numTasks   = 1U,
2444         .testType   = {UDMA_TT_MISC},
2445         .testFxnPtr = {&udmaTestEventOutOfRangeFlow},
2446         /* All other below parameters not used in this testcase */
2447         .pacingTime = {PACING_NONE},
2448         .numCh      = {1U},
2449         .instId     = {UDMA_TEST_DEFAULT_UDMA_INST},
2450         .chPrmId    = {UDMA_TEST_CH_PRMID_DEF},
2451         .qdepth     = {USE_DEF_QDEPTH},
2452         .icnt       = {
2453                         {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
2454                       },
2455         .dicnt      = {
2456                         {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
2457                       },
2458         .dim        = {
2459                         {0U, 0U, 0U}
2460                       },
2461         .ddim       = {
2462                         {0U, 0U, 0U}
2463                       },
2464         .heapIdSrc  = {DEF_HEAP_ID},
2465         .heapIdDest = {DEF_HEAP_ID},
2466         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
2467         .destBufSize= {UDMA_TEST_DEF_DICNT0},
2468         .runFlag    = (UDMA_TEST_RF_SOC_ALL | UDMA_TEST_RF_CORE_ALL | UDMA_TEST_RF_CFG_DEF | UDMA_TEST_RF_CFG_DYN),
2469         .ringPrmId  = UDMA_TEST_RING_PRMID_EVENT_NONE,
2470     },
2471     {
2472         .enableTest = TEST_ENABLE,
2473         .tcId       = 3905,
2474         .tcName     = "PDK-3863 bug testcase: Udma_chDequeueTdResponse NULL check",
2475         .disableInfo= NULL,
2476         .printEnable= PRINT_ENABLE,
2477         .prfEnable  = PRF_DISABLE,
2478         .tcType     = (UDMA_TCT_FULL | UDMA_TCT_NEGATIVE),
2479         .dcEnable   = DATA_CHECK_ENABLE,
2480         .loopCnt    = USE_DEF_LP_CNT,
2481         .numTasks   = 1U,
2482         .testType   = {UDMA_TT_BLK_CPY},
2483         .testFxnPtr = {&udmaTestBugTcPDK_3863},
2484         .pacingTime = {PACING_NONE},
2485         .numCh      = {1U},
2486         .instId     = {UDMA_TEST_DEFAULT_UDMA_INST},
2487         .chPrmId    = {UDMA_TEST_CH_PRMID_DEF},
2488         .qdepth     = {USE_DEF_QDEPTH},
2489         .icnt       = {
2490                         {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
2491                       },
2492         .dicnt      = {
2493                         {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
2494                       },
2495         .dim        = {
2496                         {0U, 0U, 0U}
2497                       },
2498         .ddim       = {
2499                         {0U, 0U, 0U}
2500                       },
2501         .heapIdSrc  = {DEF_HEAP_ID},
2502         .heapIdDest = {DEF_HEAP_ID},
2503         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
2504         .destBufSize= {UDMA_TEST_DEF_DICNT0},
2505         .runFlag    = (UDMA_TEST_RF_SOC_ALL | UDMA_TEST_RF_CORE_ALL | UDMA_TEST_RF_CFG_DEF | UDMA_TEST_RF_CFG_DYN),
2506         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
2507     },
2508     {
2509         .enableTest = TEST_ENABLE,
2510         .tcId       = 3965,
2511         .tcName     = "Channel pause and resume testcase",
2512         .disableInfo= NULL,
2513         .printEnable= PRINT_ENABLE,
2514         .prfEnable  = PRF_DISABLE,
2515         .tcType     = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
2516         .dcEnable   = DATA_CHECK_ENABLE,
2517         .loopCnt    = 1U,
2518         .numTasks   = 1U,
2519         .testType   = {UDMA_TT_BLK_CPY},
2520         .testFxnPtr = {&udmaTestBlkcpyPauseResumeTc},
2521         .pacingTime = {PACING_NONE},
2522         .numCh      = {1U},
2523         .instId     = {UDMA_INST_ID_MAIN_0},
2524         .chPrmId    = {UDMA_TEST_CH_PRMID_INTR_DEF},
2525         .qdepth     = {USE_DEF_QDEPTH},
2526         .icnt       = {
2527                         {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
2528                       },
2529         .dicnt      = {
2530                         {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
2531                       },
2532         .dim        = {
2533                         {0U, 0U, 0U}
2534                       },
2535         .ddim       = {
2536                         {0U, 0U, 0U}
2537                       },
2538         .heapIdSrc  = {DEF_HEAP_ID},
2539         .heapIdDest = {DEF_HEAP_ID},
2540         .srcBufSize = {UDMA_TEST_DEF_ICNT0},
2541         .destBufSize= {UDMA_TEST_DEF_DICNT0},
2542         .runFlag    = (UDMA_TEST_RF_MAIN_BC_PAUSE | UDMA_TEST_RF_CFG_DYN),
2543         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
2544     },
2545     {
2546         .enableTest = TEST_ENABLE,
2547         .tcId       = 4100U,
2548         .tcName     = "Main NAVSS HC Blockcpy DDR 1MB to DDR 1MB performance test",
2549         .disableInfo= NULL,
2550         .printEnable= PRINT_ENABLE,
2551         .prfEnable  = PRF_ENABLE,
2552         .tcType     = (UDMA_TCT_FULL | UDMA_TCT_FUNCTIONAL | UDMA_TCT_PERFORMANCE),
2553         .dcEnable   = DATA_CHECK_DISABLE,
2554         .loopCnt    = UDMA_TEST_PERF_LOOP_CNT,
2555         .numTasks   = 1U,
2556         .testType   = {UDMA_TT_BLK_CPY},
2557         .testFxnPtr = {&udmaTestBlkcpyTc},
2558         .pacingTime = {PACING_NONE},
2559         .numCh      = {1U},
2560         .instId     = {UDMA_INST_ID_MAIN_0},
2561         .chPrmId    = {UDMA_TEST_CH_PRMID_BLKCPY_HC_INTR_DEF},
2562         .qdepth     = {UDMA_TEST_PERF_QDEPTH},
2563         .icnt       = {
2564                         {1*KB, 1U, 1*KB, 1U},
2565                       },
2566         .dicnt      = {
2567                         {1*KB, 1U, 1*KB, 1U},
2568                       },
2569         .dim        = {
2570                         {1*KB, 1*KB, 0U},
2571                       },
2572         .ddim       = {
2573                         {1*KB, 1*KB, 0U},
2574                       },
2575         .heapIdSrc  = {UTILS_MEM_HEAP_ID_DDR},
2576         .heapIdDest = {UTILS_MEM_HEAP_ID_DDR},
2577         .srcBufSize = {1*MB},
2578         .destBufSize= {1*MB},
2579         .runFlag    = (UDMA_TEST_RF_MAIN_BC_HC),
2580         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
2581     },
2582     {
2583         .enableTest = TEST_ENABLE,
2584         .tcId       = 4101U,
2585         .tcName     = "Main NAVSS 2D HC Blockcpy MSMC circular 1KB to DDR 1MB performance test",
2586         .disableInfo= NULL,
2587         .printEnable= PRINT_ENABLE,
2588         .prfEnable  = PRF_ENABLE,
2589         .tcType     = (UDMA_TCT_FULL | UDMA_TCT_FUNCTIONAL | UDMA_TCT_PERFORMANCE),
2590         .dcEnable   = DATA_CHECK_DISABLE,
2591         .loopCnt    = UDMA_TEST_PERF_LOOP_CNT,
2592         .numTasks   = 1U,
2593         .testType   = {UDMA_TT_BLK_CPY},
2594         .testFxnPtr = {&udmaTestBlkcpyTc},
2595         .pacingTime = {PACING_NONE},
2596         .numCh      = {1U},
2597         .instId     = {UDMA_INST_ID_MAIN_0},
2598         .chPrmId    = {UDMA_TEST_CH_PRMID_BLKCPY_HC_INTR_DEF},
2599         .qdepth     = {UDMA_TEST_DEF_QDEPTH},
2600         .icnt       = {
2601                         {1*KB, 1U, 1*KB, 1U}
2602                       },
2603         .dicnt      = {
2604                         {1*KB, 1U, 1*KB, 1U}
2605                       },
2606         .dim        = {
2607                         {0U, 0U, 0U}
2608                       },
2609         .ddim       = {
2610                         {1*KB, 1*KB, 0U}
2611                       },
2612         .heapIdSrc  = {UTILS_MEM_HEAP_ID_MSMC},
2613         .heapIdDest = {UTILS_MEM_HEAP_ID_DDR},
2614         .srcBufSize = {1*KB},
2615         .destBufSize= {1*MB},
2616         .runFlag    = (UDMA_TEST_RF_MAIN_BC_HC),
2617         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
2618     },
2619     {
2620         .enableTest = TEST_ENABLE,
2621         .tcId       = 4102U,
2622         .tcName     = "Main NAVSS 2D HC Blockcpy DDR 1MB to MSMC circular 1KB performance test",
2623         .disableInfo= NULL,
2624         .printEnable= PRINT_ENABLE,
2625         .prfEnable  = PRF_ENABLE,
2626         .tcType     = (UDMA_TCT_FULL | UDMA_TCT_FUNCTIONAL | UDMA_TCT_PERFORMANCE),
2627         .dcEnable   = DATA_CHECK_DISABLE,
2628         .loopCnt    = UDMA_TEST_PERF_LOOP_CNT,
2629         .numTasks   = 1U,
2630         .testType   = {UDMA_TT_BLK_CPY},
2631         .testFxnPtr = {&udmaTestBlkcpyTc},
2632         .pacingTime = {PACING_NONE},
2633         .numCh      = {1U},
2634         .instId     = {UDMA_INST_ID_MAIN_0},
2635         .chPrmId    = {UDMA_TEST_CH_PRMID_BLKCPY_HC_INTR_DEF},
2636         .qdepth     = {UDMA_TEST_DEF_QDEPTH},
2637         .icnt       = {
2638                         {1*KB, 1U, 1*KB, 1U}
2639                       },
2640         .dicnt      = {
2641                         {1*KB, 1U, 1*KB, 1U}
2642                       },
2643         .dim        = {
2644                         {1*KB, 1*KB, 0U}
2645                       },
2646         .ddim       = {
2647                         {0U, 0U, 0U}
2648                       },
2649         .heapIdSrc  = {UTILS_MEM_HEAP_ID_DDR},
2650         .heapIdDest = {UTILS_MEM_HEAP_ID_MSMC},
2651         .srcBufSize = {1*MB},
2652         .destBufSize= {1*KB},
2653         .runFlag    = (UDMA_TEST_RF_MAIN_BC_HC),
2654         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
2655     },
2656     {
2657         .enableTest = TEST_ENABLE,
2658         .tcId       = 4103U,
2659         .tcName     = "Main NAVSS 2D HC Blockcpy MSMC circular 1KB to MSMC circular 1KB performance test",
2660         .disableInfo= NULL,
2661         .printEnable= PRINT_ENABLE,
2662         .prfEnable  = PRF_ENABLE,
2663         .tcType     = (UDMA_TCT_FULL | UDMA_TCT_FUNCTIONAL | UDMA_TCT_PERFORMANCE),
2664         .dcEnable   = DATA_CHECK_DISABLE,
2665         .loopCnt    = UDMA_TEST_PERF_LOOP_CNT,
2666         .numTasks   = 1U,
2667         .testType   = {UDMA_TT_BLK_CPY},
2668         .testFxnPtr = {&udmaTestBlkcpyTc},
2669         .pacingTime = {PACING_NONE},
2670         .numCh      = {1U},
2671         .instId     = {UDMA_INST_ID_MAIN_0},
2672         .chPrmId    = {UDMA_TEST_CH_PRMID_BLKCPY_HC_INTR_DEF},
2673         .qdepth     = {UDMA_TEST_DEF_QDEPTH},
2674         .icnt       = {
2675                         {1*KB, 1U, 1*KB, 1U}
2676                       },
2677         .dicnt      = {
2678                         {1*KB, 1U, 1*KB, 1U}
2679                       },
2680         .dim        = {
2681                         {0U, 0U, 0U}
2682                       },
2683         .ddim       = {
2684                         {0U, 0U, 0U}
2685                       },
2686         .heapIdSrc  = {UTILS_MEM_HEAP_ID_MSMC},
2687         .heapIdDest = {UTILS_MEM_HEAP_ID_MSMC},
2688         .srcBufSize = {1*KB},
2689         .destBufSize= {1*KB},
2690         .runFlag    = (UDMA_TEST_RF_MAIN_BC_HC),
2691         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
2692     },
2693     {
2694         .enableTest = TEST_ENABLE,
2695         .tcId       = 4104U,
2696         .tcName     = "Main NAVSS HC Blockcpy DDR 1MB to DDR 1MB from multiple tasks",
2697         .disableInfo= NULL,
2698         .printEnable= PRINT_DISABLE,
2699         .prfEnable  = PRF_ENABLE,
2700         .tcType     = (UDMA_TCT_FULL | UDMA_TCT_FUNCTIONAL | UDMA_TCT_PERFORMANCE),
2701         .dcEnable   = DATA_CHECK_DISABLE,
2702         .loopCnt    = UDMA_TEST_PERF_LOOP_CNT,
2703         .numTasks   = UDMA_TEST_MAX_MAIN_BC_HC_CH,
2704         .testType   = {UDMA_TT_BLK_CPY, UDMA_TT_BLK_CPY, UDMA_TT_BLK_CPY, UDMA_TT_BLK_CPY},
2705         .testFxnPtr = {&udmaTestBlkcpyTc, &udmaTestBlkcpyTc, &udmaTestBlkcpyTc, &udmaTestBlkcpyTc},
2706         .pacingTime = {PACING_NONE, PACING_NONE, PACING_NONE, PACING_NONE},
2707         .numCh      = {1U, 1U, 1U, 1U},
2708         .instId     = {UDMA_INST_ID_MAIN_0, UDMA_INST_ID_MAIN_0, UDMA_INST_ID_MAIN_0, UDMA_INST_ID_MAIN_0},
2709         .chPrmId    = {UDMA_TEST_CH_PRMID_BLKCPY_HC_INTR_DEF, UDMA_TEST_CH_PRMID_BLKCPY_HC_INTR_DEF, UDMA_TEST_CH_PRMID_BLKCPY_HC_INTR_DEF, UDMA_TEST_CH_PRMID_BLKCPY_HC_INTR_DEF},
2710         .qdepth     = {UDMA_TEST_PERF_QDEPTH, UDMA_TEST_PERF_QDEPTH, UDMA_TEST_PERF_QDEPTH, UDMA_TEST_PERF_QDEPTH},
2711         .icnt       = {
2712                         {1*KB, 1U, 1*KB, 1U},
2713                         {1*KB, 1U, 1*KB, 1U},
2714                         {1*KB, 1U, 1*KB, 1U},
2715                         {1*KB, 1U, 1*KB, 1U},
2716                       },
2717         .dicnt      = {
2718                         {1*KB, 1U, 1*KB, 1U},
2719                         {1*KB, 1U, 1*KB, 1U},
2720                         {1*KB, 1U, 1*KB, 1U},
2721                         {1*KB, 1U, 1*KB, 1U},
2722                       },
2723         .dim        = {
2724                         {1*KB, 1*KB, 0U},
2725                         {1*KB, 1*KB, 0U},
2726                         {1*KB, 1*KB, 0U},
2727                         {1*KB, 1*KB, 0U},
2728                       },
2729         .ddim       = {
2730                         {1*KB, 1*KB, 0U},
2731                         {1*KB, 1*KB, 0U},
2732                         {1*KB, 1*KB, 0U},
2733                         {1*KB, 1*KB, 0U},
2734                       },
2735         .heapIdSrc  = {UTILS_MEM_HEAP_ID_DDR, UTILS_MEM_HEAP_ID_DDR, UTILS_MEM_HEAP_ID_DDR, UTILS_MEM_HEAP_ID_DDR},
2736         .heapIdDest = {UTILS_MEM_HEAP_ID_DDR, UTILS_MEM_HEAP_ID_DDR, UTILS_MEM_HEAP_ID_DDR, UTILS_MEM_HEAP_ID_DDR},
2737         .srcBufSize = {1*MB, 1*MB, 1*MB, 1*MB},
2738         .destBufSize= {1*MB, 1*MB, 1*MB, 1*MB},
2739         .runFlag    = (UDMA_TEST_RF_MAIN_BC_HC_MT),
2740         .ringPrmId  = UDMA_TEST_RING_PRMID_INVALID,
2741     },
2742     {
2743         .enableTest = TEST_ENABLE,
2744         .tcId       = 4105U,
2745         .tcName     = "Main NAVSS HC Blockcpy MSMC to MSMC 1KBx1K (1MB) circular from multiple tasks",
2746         .disableInfo= NULL,
2747         .printEnable= PRINT_DISABLE,
2748         .prfEnable  = PRF_ENABLE,
2749         .tcType     = (UDMA_TCT_FULL | UDMA_TCT_FUNCTIONAL | UDMA_TCT_PERFORMANCE),
2750         .dcEnable   = DATA_CHECK_DISABLE,
2751         .loopCnt    = UDMA_TEST_PERF_LOOP_CNT,
2752         .numTasks   = UDMA_TEST_MAX_MAIN_BC_HC_CH,
2753         .testType   = {UDMA_TT_BLK_CPY, UDMA_TT_BLK_CPY, UDMA_TT_BLK_CPY, UDMA_TT_BLK_CPY},
2754         .testFxnPtr = {&udmaTestBlkcpyTc, &udmaTestBlkcpyTc, &udmaTestBlkcpyTc, &udmaTestBlkcpyTc},
2755         .pacingTime = {PACING_NONE, PACING_NONE, PACING_NONE, PACING_NONE},
2756         .numCh      = {1U, 1U, 1U, 1U},
2757         .instId     = {UDMA_INST_ID_MAIN_0, UDMA_INST_ID_MAIN_0, UDMA_INST_ID_MAIN_0, UDMA_INST_ID_MAIN_0},
2758         .chPrmId    = {UDMA_TEST_CH_PRMID_BLKCPY_HC_INTR_DEF, UDMA_TEST_CH_PRMID_BLKCPY_HC_INTR_DEF, UDMA_TEST_CH_PRMID_BLKCPY_HC_INTR_DEF, UDMA_TEST_CH_PRMID_BLKCPY_HC_INTR_DEF},
2759         .qdepth     = {UDMA_TEST_PERF_QDEPTH, UDMA_TEST_PERF_QDEPTH, UDMA_TEST_PERF_QDEPTH, UDMA_TEST_PERF_QDEPTH},
2760         .icnt       = {
2761                         {1*KB, 1U, 1*KB, 1U},
<