1 /*
2 * Copyright (c) Texas Instruments Incorporated 2019
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
6 * are met:
7 *
8 * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 *
11 * Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the
14 * distribution.
15 *
16 * Neither the name of Texas Instruments Incorporated nor the names of
17 * its contributors may be used to endorse or promote products derived
18 * from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 */
33 /**
34 * \file bios_mmu.c
35 *
36 * \brief This has the common default MMU setting function for A53
37 *
38 */
40 /* ========================================================================== */
41 /* Include Files */
42 /* ========================================================================== */
44 #include <xdc/std.h>
45 #if defined (BUILD_MPU)
46 #include <ti/sysbios/family/arm/v8a/Mmu.h>
47 #endif
49 /* ========================================================================== */
50 /* Macros & Typedefs */
51 /* ========================================================================== */
53 /* None */
55 /* ========================================================================== */
56 /* Structure Declarations */
57 /* ========================================================================== */
59 /* None */
61 /* ========================================================================== */
62 /* Function Declarations */
63 /* ========================================================================== */
65 /* None */
67 /* ========================================================================== */
68 /* Global Variables */
69 /* ========================================================================== */
71 /* None */
73 /* ========================================================================== */
74 /* Function Definitions */
75 /* ========================================================================== */
77 #if defined(BUILD_MPU)
78 void Osal_initMmuDefault(void)
79 {
80 Mmu_MapAttrs attrs;
82 Mmu_initMapAttrs(&attrs);
83 attrs.attrIndx = Mmu_AttrIndx_MAIR0;
85 /* Register region */
86 Mmu_map(0x00000000U, 0x00000000U, 0x20000000U, &attrs);
87 Mmu_map(0x20000000U, 0x20000000U, 0x20000000U, &attrs);
88 Mmu_map(0x40000000U, 0x40000000U, 0x20000000U, &attrs);
89 Mmu_map(0x60000000U, 0x60000000U, 0x10000000U, &attrs);
91 Mmu_map(0x400000000U, 0x400000000U, 0x400000000U, &attrs); /* FSS0 data */
93 attrs.attrIndx = Mmu_AttrIndx_MAIR7;
94 Mmu_map(0x80000000U, 0x80000000U, 0x20000000U, &attrs); /* DDR */
95 Mmu_map(0xA0000000U, 0xA0000000U, 0x20000000U, &attrs); /* DDR */
96 Mmu_map(0x70000000U, 0x70000000U, 0x00200000U, &attrs); /* MSMC - 2MB */
97 Mmu_map(0x41C00000U, 0x41C00000U, 0x00080000U, &attrs); /* OCMC - 512KB */
99 /*
100 * DDR range 0xA2000000 - 0xA2200000 : Used as RAM by multiple
101 * remote cores, no need to mmp_map this range.
102 * IPC VRing Buffer - uncached
103 */
104 attrs.attrIndx = Mmu_AttrIndx_MAIR4;
105 (void)Mmu_map(0xA2000000U, 0xA2000000U, 0x00200000U, &attrs);
107 return;
108 }
109 #endif