1 /*
2 * Copyright (c) 2016-2018, Texas Instruments Incorporated
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * * Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 *
12 * * Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * * Neither the name of Texas Instruments Incorporated nor the names of
17 * its contributors may be used to endorse or promote products derived
18 * from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
22 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
24 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
25 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
26 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
27 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
28 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
29 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
30 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 */
32 /*
33 * ======== HwiP_nonos.c ========
34 */
36 #include <stdint.h>
37 #include <stdbool.h>
38 #include <stdlib.h>
40 #include <ti/osal/src/nonos/Nonos_config.h>
42 extern uint32_t gOsalHwiAllocCnt, gOsalHwiPeak;
44 /*
45 * ======== HwiP_clearInterrupt ========
46 */
47 void HwiP_clearInterrupt(int32_t interruptNum)
48 {
49 OsalArch_clearInterrupt((uint32_t)interruptNum);
50 }
52 /*
53 * ======== HwiP_create ========
54 */
55 HwiP_Handle HwiP_create(int32_t interruptNum, HwiP_Fxn hwiFxn,
56 const HwiP_Params *params)
57 {
58 HwiP_Handle handle;
59 handle = OsalArch_HwiPCreate(interruptNum,hwiFxn,params);
61 /* Update statistics for successful allocation */
62 if (handle != NULL_PTR)
63 {
64 gOsalHwiAllocCnt++;
65 if (gOsalHwiAllocCnt > gOsalHwiPeak)
66 {
67 gOsalHwiPeak = gOsalHwiAllocCnt;
68 }
69 }
70 return (handle);
71 }
73 /*
74 * ======== HwiP_createDirect ========
75 */
76 HwiP_Handle HwiP_createDirect(int32_t interruptNum, HwiP_DirectFxn hwiFxn,
77 const HwiP_Params *params)
78 {
79 HwiP_Handle handle;
80 #if defined (BUILD_MCU)
81 handle = OsalArch_HwiPCreateDirect(interruptNum, hwiFxn, params);
82 #else
83 handle = NULL_PTR;
84 #endif
86 /* Update statistics for successful allocation */
87 if (handle != NULL_PTR)
88 {
89 gOsalHwiAllocCnt++;
90 if (gOsalHwiAllocCnt > gOsalHwiPeak)
91 {
92 gOsalHwiPeak = gOsalHwiAllocCnt;
93 }
94 }
95 return (handle);
96 }
98 /*
99 * ======== HwiP_delete ========
100 */
101 HwiP_Status HwiP_delete(HwiP_Handle handle)
102 {
103 HwiP_Status status;
105 OSAL_Assert((handle == NULL_PTR));
107 if(handle!=NULL_PTR) {
108 status = OsalArch_HwiPDelete(handle);
110 if (status == HwiP_OK)
111 {
112 if (gOsalHwiAllocCnt > 0U)
113 {
114 gOsalHwiAllocCnt--;
115 }
116 }
117 }
118 else
119 {
120 status = HwiP_FAILURE;
121 }
123 return (status);
124 }
126 /*
127 * ======== HwiP_disable ========
128 */
129 uintptr_t HwiP_disable(void)
130 {
131 return (OsalArch_globalDisableInterrupt());
132 }
134 /*
135 * ======== HwiP_disableInterrupt ========
136 */
137 void HwiP_disableInterrupt(int32_t interruptNum)
138 {
139 OsalArch_disableInterrupt((uint32_t)interruptNum);
140 return;
141 }
143 /*
144 * ======== HwiP_enableInterrupt ========
145 */
146 void HwiP_enableInterrupt(int32_t interruptNum)
147 {
148 OsalArch_enableInterrupt((uint32_t)interruptNum);
149 return;
150 }
152 int32_t HwiP_post(uint32_t interruptNum)
153 {
154 #if defined (SOC_AM65XX) || defined (SOC_AM572x) || defined (SOC_AM64X) || defined(SOC_J721E) || defined(SOC_J7200) || defined(SOC_TPR12) || defined (SOC_AWR294X)
155 return(OsalArch_postInterrupt(interruptNum));
156 #else
157 return (osal_UNSUPPORTED);
158 #endif
159 }
162 /*
163 * ======== HwiP_Params_init ========
164 */
165 void HwiP_Params_init(HwiP_Params *params)
166 {
167 params->name = (char *) NULL_PTR;
168 params->arg = 0;
169 params->priority = HWIP_USE_DEFAULT_PRIORITY;
170 params->evtId = 0;
171 params->enableIntr = TRUE;
172 #if defined (__ARM_ARCH_7A__) || defined(__aarch64__) || defined (__TI_ARM_V7R4__)
173 params->triggerSensitivity = (uint32_t)OSAL_ARM_GIC_TRIG_TYPE_LEVEL;
174 #if !defined (SOC_AM437x) && !defined(SOC_AM335x) && !defined (__TI_ARM_V7R4__)
175 {
176 Osal_HwAttrs hwAttrs;
177 (void)Osal_getHwAttrs(&hwAttrs);
178 if(hwAttrs.hwAccessType==OSAL_HWACCESS_UNRESTRICTED)
179 {
180 /* Do GIC init only in the case of unrestricted hw access */
181 OsalArch_gicInit();
182 }
183 }
184 #endif
185 #endif
186 }
188 /*
189 * ======== HwiP_restore ========
190 */
191 void HwiP_restore(uintptr_t key)
192 {
193 OsalArch_globalRestoreInterrupt(key);
194 return;
195 }
197 #ifdef _TMS320C6X
198 /*
199 * ======== HwiP_getHandle ========
200 * Returns the HwiP handle associated with an interrupt number
201 */
202 HwiP_Handle HwiP_getHandle(int32_t interruptNum)
203 {
204 return(OsalArch_getHandle(interruptNum));
205 }
207 /*
208 * ======== HwiP_getEventId ========
209 * Returns the Event ID associated with an interrupt
210 */
211 int32_t HwiP_getEventId(int32_t interruptNum)
212 {
213 return(OsalArch_getEventId(interruptNum));
214 }
215 #endif