cf0b99c23ac7f4e191a1148e2364452c0d58f749
[processor-sdk/pdk.git] / packages / ti / transport / ndk / nimu / example / am65xx / nimu_linker_r5.lds
1 /*----------------------------------------------------------------------------*/
2 /* File: k3m4_r5f_linker.cmd */
3 /* Description: */
4 /* Link command file for AM65XX M4 MCU 0 view */
5 /* TI ARM Compiler version 15.12.3 LTS or later */
6 /* */
7 /* Platform: QT */
8 /* (c) Texas Instruments 2017-2019, All rights reserved. */
9 /*----------------------------------------------------------------------------*/
10 /* History: *'
11 /* Aug 26th, 2016 Original version .......................... Loc Truong */
12 /* Aug 01th, 2017 new TCM mem map .......................... Loc Truong */
13 /* Nov 07th, 2017 Changes for R5F Init Code.................. Vivek Dhande */
14 /*----------------------------------------------------------------------------*/
15 /* Linker Settings */
16 /* Standard linker options */
17 --retain="*(.intvecs)"
18 --retain="*(.intc_text)"
19 --retain="*(.rstvectors)"
20 --fill_value=0
21 --entry_point=ti_sysbios_family_arm_v7r_keystone3_Hwi_vectors /* Default BIOS */
22 --retain="*(.utilsCopyVecsToAtcm)"
24 /*----------------------------------------------------------------------------*/
25 /* Memory Map */
26 MEMORY
27 {
28 VECTORS (X) : origin=0x41C7F000 length=0x1000
29 /* Reset Vectors base address(RESET_VECTORS) should be 64 bytes aligned */
30 RESET_VECTORS (X) : origin=0x41C00000 length=0x100
31 /* MCU0_R5F_0 local view */
32 MCU0_R5F_TCMA_SBL_RSVD (X) : origin=0x0 length=0x100
33 MCU0_R5F_TCMA (X) : origin=0x100 length=0x8000 - 0x100
34 MCU0_R5F_TCMB0 (RWIX) : origin=0x41010000 length=0x8000
36 /* MCU0_R5F_1 SoC view */
37 MCU0_R5F1_ATCM (RWIX) : origin=0x41400000 length=0x8000
38 MCU0_R5F1_BTCM (RWIX) : origin=0x41410000 length=0x8000
40 /* Fully avaialble for apps. Used by SBL to load SYSFW */
41 OCMRAM_LOW (RWIX) : origin=0x41C00100 length=0x40600 - 0x100 /* ~257KB */
43 /* MCU0 memory used for SBL. Avaiable after boot for app starts for dynamic use */
44 SBL_RESERVED (RWIX) : origin=0x41C40600 length=0x60000 - 0x40600 /* ~126KB */
46 /* MCU0 share locations */
47 OCMRAM (RWIX) : origin=0x41C60000 length=0x20000 - 0x1000 /* ~124KB */
49 /* AM65XX M4 locations */
50 MSMC3 (RWIX) : origin=0x70000000 length=0xF0000 /* 1MB - 64K */
51 MSMC3_H (RWIX) : origin=0x70100000 length=0xE2000 /* 1MB -56K */
53 /* Reserved for DMSC */
54 MSMC3_DMSC (RWIX) : origin=0x701F0000 length=0x10000 /* 64K */
56 DDR0 (RWIX) : origin=0x80000000 length=0x80000000 /* 2GB */
58 /* Additional memory settings */
60 } /* end of MEMORY */
62 /*----------------------------------------------------------------------------*/
63 /* Section Configuration */
65 SECTIONS
66 {
67 /* 'intvecs' and 'intc_text' sections shall be placed within */
68 /* a range of +\- 16 MB */
69 .intvecs : {} palign(8) > VECTORS
70 .intc_text : {} palign(8) > VECTORS
71 .rstvectors : {} palign(8) > RESET_VECTORS
72 .utilsCopyVecsToAtcm : {} palign(8) > MCU0_R5F_TCMB0
73 .text : {} palign(8) > MSMC3
74 .const : {} palign(8) > DDR0
75 .cinit : {} palign(8) > DDR0
76 .pinit : {} palign(8) > DDR0
77 /* For NDK packet memory, we need to map this sections before .bss*/
78 .bss:NDK_MMBUFFER (NOLOAD) {} ALIGN (128) > DDR0
79 .bss:NDK_PACKETMEM (NOLOAD) {} ALIGN (128) > DDR0
80 .bss : {} align(4) > DDR0
81 .far : {} align(4) > DDR0
82 .data : {} palign(128) > DDR0
83 .boardcfg_data : {} palign(128) > DDR0
84 .sysmem : {} > DDR0
85 .stack : {} align(4) > DDR0
86 /* SA sections */
87 .scBufs : {} align(4) > DDR0
88 .saSrcBuffers : {} align(4) > DDR0
89 .saDstBuffers : {} align(4) > DDR0
91 /* USB or any other LLD buffer for benchmarking */
92 .benchmark_buffer (NOLOAD) {} ALIGN (8) > DDR0
94 /* Additional sections settings */
96 } /* end of SECTIONS */
98 /*----------------------------------------------------------------------------*/
99 /* Misc linker settings */
102 /*-------------------------------- END ---------------------------------------*/