diff --git a/packages/ti/board/diag/cpsw/src/cpsw_eth_test.c b/packages/ti/board/diag/cpsw/src/cpsw_eth_test.c
index c42fd4dc97d6d7cf6541a83bdf93b0aef368d34c..192bafda7f6632b2ed2098e9af31b6ddfe309e92 100644 (file)
/******************************************************************************\r
- * Copyright (c) 2019 Texas Instruments Incorporated - http://www.ti.com\r
- *\r
- * Redistribution and use in source and binary forms, with or without\r
- * modification, are permitted provided that the following conditions\r
- * are met:\r
- *\r
- * Redistributions of source code must retain the above copyright\r
- * notice, this list of conditions and the following disclaimer.\r
- *\r
- * Redistributions in binary form must reproduce the above copyright\r
- * notice, this list of conditions and the following disclaimer in the\r
- * documentation and/or other materials provided with the\r
- * distribution.\r
- *\r
- * Neither the name of Texas Instruments Incorporated nor the names of\r
- * its contributors may be used to endorse or promote products derived\r
- * from this software without specific prior written permission.\r
- *\r
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\r
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\r
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT\r
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,\r
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\r
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\r
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE\r
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
- *\r
- *****************************************************************************/\r
+* Copyright (c) 2020 Texas Instruments Incorporated - http://www.ti.com\r
+*\r
+* Redistribution and use in source and binary forms, with or without\r
+* modification, are permitted provided that the following conditions\r
+* are met:\r
+*\r
+* Redistributions of source code must retain the above copyright\r
+* notice, this list of conditions and the following disclaimer.\r
+*\r
+* Redistributions in binary form must reproduce the above copyright\r
+* notice, this list of conditions and the following disclaimer in the\r
+* documentation and/or other materials provided with the\r
+* distribution.\r
+*\r
+* Neither the name of Texas Instruments Incorporated nor the names of\r
+* its contributors may be used to endorse or promote products derived\r
+* from this software without specific prior written permission.\r
+*\r
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\r
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\r
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
+* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT\r
+* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,\r
+* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\r
+* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
+* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
+* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\r
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE\r
+* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+*\r
+*****************************************************************************/\r
+\r
/**\r
- * \file cpsw_test.c\r
+ * \file cpsw_eth_test.c\r
*\r
* \brief CPSW ethernet diagnostic test file\r
*\r
* The test code showcases usage of the CPSW Driver exported API for\r
* sending/receiving Ethernet packets.\r
*\r
- * Supported SoCs: J721E.\r
+ * Supported SoCs: TPR12.\r
*\r
- * Supported Platforms:j721e_evm.\r
+ * Supported Platforms:tpr12_evm.\r
*\r
*/\r
\r
/* Test application local header file */\r
#include "cpsw_eth_test.h"\r
\r
-static volatile bool txSem = false;\r
-static volatile bool rxSem = false;\r
-\r
-/* Broadcast address */\r
-static uint8_t bcastAddr[CPSW_MAC_ADDR_LEN] =\r
- { 0xffU, 0xffU, 0xffU, 0xffU, 0xffU, 0xffU };\r
-\r
-/* CPSW configuration */\r
-static CpswDma_OpenTxChPrms cpswTxChCfg;\r
-\r
-static CpswDma_OpenRxFlowPrms cpswRxFlowCfg;\r
+/* Trasnmitt and receive status variables */\r
+static volatile bool gTxSem = false;\r
+static volatile bool gRxSem = false;\r
\r
-static cpsw_Obj gCpswLpbkObj = {\r
-#if defined(SOC_J721E)\r
- .cpswType = CPSW_9G,\r
-#else\r
- .cpswType = CPSW_5G,\r
-#endif\r
-};\r
+/* Enet loopback test object */\r
+static BoardDiag_EnetLpbkObj_t gEnetLpbk;\r
\r
/**\r
- * \brief CPSW receive ISR function\r
+ * \brief ENET receive ISR function\r
*\r
- * \param hUdmaEvt [IN] UDMA event handle\r
- * \param eventType [IN] Event type\r
- * \param appData [IN] Pointer to application data\r
+ * \param void *appData application data\r
*\r
+ * \return NULL\r
*/\r
-static void BoardDiag_cpswRxIsrFxn(void *appData)\r
+static void BoardDiag_enetLpbkRxIsrFxn(void *appData)\r
{\r
- rxSem = true;\r
+ gRxSem = true;\r
}\r
\r
/**\r
- * \brief CPSW transmit ISR function\r
+ * \brief ENET transmit ISR function\r
*\r
- * \param hUdmaEvt [IN] UDMA event handle\r
- * \param eventType [IN] Event type\r
- * \param appData [IN] Pointer to application data\r
+ * \param void *appData application data\r
*\r
+ * \return NULL\r
*/\r
-static void BoardDiag_cpswTxIsrFxn(void *appData)\r
+static void BoardDiag_enetLpbkTxIsrFxn(void *appData)\r
{\r
- txSem = true;\r
+ gTxSem = true;\r
}\r
\r
/**\r
- * \brief This function is used to queue the received packets to rx ready queue\r
+ * \brief This function is used for close the ENET module.\r
*\r
- * \return uint32_t - Receive ready queue count\r
+ * \param NULL\r
*\r
+ * \return NULL\r
*/\r
-static uint32_t BoardDiag_cpswReceivePkts(void)\r
+static void BoardDiag_enetLpbkCloseEnet(void)\r
{\r
- CpswDma_PktInfoQ rxReadyQ;\r
- CpswDma_PktInfo *pktInfo;\r
- int32_t status;\r
- uint32_t rxReadyCnt = 0U;\r
+ Enet_IoctlPrms prms;\r
+ int32_t status;\r
\r
- CpswUtils_initQ(&rxReadyQ);\r
+ /* Close port link */\r
+ ENET_IOCTL_SET_IN_ARGS(&prms, &gEnetLpbk.macPort);\r
\r
- /* Retrieve any CPSW packets which are ready */\r
- status = CpswDma_retrieveRxPackets(gCpswLpbkObj.hRxFlow, &rxReadyQ);\r
- if (status == CPSW_SOK)\r
+ status = Enet_ioctl(gEnetLpbk.hEnet, gEnetLpbk.coreId,\r
+ ENET_PER_IOCTL_CLOSE_PORT_LINK, &prms);\r
+ if (status != ENET_SOK)\r
{\r
- rxReadyCnt = CpswUtils_getQCount(&rxReadyQ);\r
- /* Queue the received packet to rxReadyQ and pass new ones from rxFreeQ\r
- **/\r
- pktInfo = (CpswDma_PktInfo *) CpswUtils_deQ(&rxReadyQ);\r
- while (pktInfo != NULL)\r
- {\r
- CpswUtils_checkPktState(&pktInfo->pktState,\r
- CPSW_PKTSTATE_MODULE_APP,\r
- CPSW_PKTSTATE_APP_WITH_DRIVER,\r
- CPSW_PKTSTATE_APP_WITH_READYQ);\r
-\r
- CpswUtils_enQ(&gCpswLpbkObj.rxReadyQ, &pktInfo->node);\r
- pktInfo = (CpswDma_PktInfo *) CpswUtils_deQ(&rxReadyQ);\r
- }\r
+ UART_printf("Failed to close port link: %d\n", status);\r
}\r
- else\r
+\r
+ /* Detach core */\r
+ if (status == ENET_SOK)\r
{\r
- UART_printf("receivePkts() failed to retrieve pkts: %d\n",\r
- status);\r
+ ENET_IOCTL_SET_IN_ARGS(&prms, &gEnetLpbk.coreKey);\r
+\r
+ status = Enet_ioctl(gEnetLpbk.hEnet, gEnetLpbk.coreId,\r
+ ENET_PER_IOCTL_DETACH_CORE, &prms);\r
+ if (status != ENET_SOK)\r
+ {\r
+ UART_printf("Failed to detach core key %u: %d\n", gEnetLpbk.coreKey, status);\r
+ }\r
}\r
\r
- return rxReadyCnt;\r
+ /* Close Enet driver */\r
+ Enet_close(gEnetLpbk.hEnet);\r
+\r
+ gEnetLpbk.hEnet = NULL;\r
}\r
\r
/**\r
- * \brief This function is used to retrieve's any CPSW packets that may be free now\r
+ * \brief This function is used for de-initialize the ENET DMA driver.\r
*\r
- * \return uint32_t - Transmit free queue count\r
+ * \param NULL\r
*\r
+ * \return NULL\r
*/\r
-static uint32_t BoardDiag_cpswRetrieveFreeTxPkts(void)\r
+static void BoardDiag_enetLpbkCloseDma()\r
{\r
- CpswDma_PktInfoQ txFreeQ;\r
- CpswDma_PktInfo *pktInfo;\r
- int32_t status;\r
- uint32_t txFreeQCnt = 0U;\r
+ EnetDma_PktQ fqPktInfoQ;\r
+ EnetDma_PktQ cqPktInfoQ;\r
\r
- CpswUtils_initQ(&txFreeQ);\r
+ EnetQueue_initQ(&fqPktInfoQ);\r
+ EnetQueue_initQ(&cqPktInfoQ);\r
\r
- /* Retrieve any CPSW packets that may be free now */\r
- status = CpswDma_retrieveTxDonePackets(gCpswLpbkObj.hTxCh, &txFreeQ);\r
- if (status == CPSW_SOK)\r
+ UART_printf("Closing DMA\n");\r
+ /* There should not be any ready packet */\r
+ if(EnetQueue_getQCount(&gEnetLpbk.rxReadyQ) != 0)\r
{\r
- txFreeQCnt = CpswUtils_getQCount(&txFreeQ);\r
+ UART_printf("EnetQueue_getQCount Failed\n");\r
+ return;\r
+ }\r
\r
- pktInfo = (CpswDma_PktInfo *) CpswUtils_deQ(&txFreeQ);\r
- while (pktInfo != NULL)\r
- {\r
- CpswUtils_checkPktState(&pktInfo->pktState,\r
- CPSW_PKTSTATE_MODULE_APP,\r
- CPSW_PKTSTATE_APP_WITH_DRIVER,\r
- CPSW_PKTSTATE_APP_WITH_FREEQ);\r
+ /* Close RX Flow */\r
+ EnetAppUtils_closeRxCh(gEnetLpbk.hEnet,\r
+ gEnetLpbk.coreKey,\r
+ gEnetLpbk.coreId,\r
+ &fqPktInfoQ,\r
+ &cqPktInfoQ,\r
+ gEnetLpbk.hRxCh,\r
+ gEnetLpbk.rxChNum);\r
+ EnetAppUtils_freePktInfoQ(&fqPktInfoQ);\r
+ EnetAppUtils_freePktInfoQ(&cqPktInfoQ);\r
\r
- CpswUtils_enQ(&gCpswLpbkObj.txFreePktInfoQ, &pktInfo->node);\r
- pktInfo = (CpswDma_PktInfo *) CpswUtils_deQ(&txFreeQ);\r
- }\r
- }\r
- else\r
- {\r
- UART_printf("retrieveFreeTxPkts() failed to retrieve pkts: %d\n",\r
- status);\r
- }\r
+ /* Close TX channel */\r
+ EnetQueue_initQ(&fqPktInfoQ);\r
+ EnetQueue_initQ(&cqPktInfoQ);\r
\r
- return txFreeQCnt;\r
-}\r
+ EnetAppUtils_closeTxCh(gEnetLpbk.hEnet,\r
+ gEnetLpbk.coreKey,\r
+ gEnetLpbk.coreId,\r
+ &fqPktInfoQ,\r
+ &cqPktInfoQ,\r
+ gEnetLpbk.hTxCh,\r
+ gEnetLpbk.txChNum);\r
+ EnetAppUtils_freePktInfoQ(&fqPktInfoQ);\r
+ EnetAppUtils_freePktInfoQ(&cqPktInfoQ);\r
\r
-/**\r
- * \brief CPSW delay function\r
- *\r
- * \param waitTime [IN] Wait time\r
- *\r
- */\r
-static void BoardDiag_cpswWait(uint32_t waitTime)\r
-{\r
- volatile uint32_t index;\r
+ EnetAppUtils_freePktInfoQ(&gEnetLpbk.rxFreeQ);\r
+ EnetAppUtils_freePktInfoQ(&gEnetLpbk.txFreePktInfoQ);\r
\r
- /* we multiply waitTime by 10000 as 400MHz R5 takes 2.5ns for single cycle\r
- * and we assume for loop takes 4 cycles */\r
- for (index = 0; index < (waitTime*1000); index++);\r
+ CpswAppMemUtils_deInit();\r
}\r
\r
/**\r
- * \brief This function is used to initialize the receive ready packet queue\r
+ * \brief This function is used to Mac port statistics\r
*\r
- * \return int8_t\r
- * 0 - in case of success\r
- * -1 - in case of failure.\r
+ * \param CpswStats_HostPort_2g *st Cpsw stats\r
*\r
+ * \return NULL\r
*/\r
-static int8_t boarDiag_cpswInitRxReadyPktQ(void)\r
+static void BoardDiag_printMacPortStats2G(CpswStats_MacPort_2g *st)\r
{\r
- CpswDma_PktInfoQ rxReadyQ;\r
- int32_t status;\r
- uint32_t index;\r
- CpswDma_PktInfo *pPktInfo;\r
-\r
- CpswUtils_initQ(&gCpswLpbkObj.rxFreeQ);\r
- CpswUtils_initQ(&gCpswLpbkObj.rxReadyQ);\r
- CpswUtils_initQ(&rxReadyQ);\r
-\r
- for (index = 0U; index < CPSW_APPMEMUTILS_NUM_RX_PKTS; index++)\r
+ uint32_t i;\r
+\r
+ UART_printf("rxGoodFrames = %d\n", (uint32_t)st->rxGoodFrames);\r
+ UART_printf("rxBcastFrames = %d\n", (uint32_t)st->rxBcastFrames);\r
+ UART_printf("rxOctets = %d\n", (uint32_t)st->rxOctets);\r
+ UART_printf("txGoodFrames = %d\n", (uint32_t)st->txGoodFrames);\r
+ UART_printf("txBcastFrames = %d\n", (uint32_t)st->txBcastFrames);\r
+ UART_printf("txOctets = %d\n", (uint32_t)st->txOctets);\r
+ UART_printf("octetsFrames512to1023 = %d\n",\r
+ (uint32_t)st->octetsFrames512to1023);\r
+\r
+ for (i = 0U; i < ENET_ARRAYSIZE((uint32_t)st->txPri); i++)\r
{\r
- pPktInfo = CpswAppMemUtils_allocEthPktFxn(&gCpswLpbkObj,\r
- CPSW_APPMEMUTILS_LARGE_POOL_PKT_SIZE,\r
- UDMA_CACHELINE_ALIGNMENT);\r
- if(pPktInfo == NULL)\r
- {\r
- UART_printf("CpswAppMemUtils_allocEthPktFxn Failed\n");\r
- return -1;\r
- }\r
-\r
- CPSW_UTILS_SET_PKT_APP_STATE(&pPktInfo->pktState,\r
- CPSW_PKTSTATE_APP_WITH_FREEQ);\r
- CpswUtils_enQ(&gCpswLpbkObj.rxFreeQ,\r
- &pPktInfo->node);\r
- }\r
-\r
- /* Retrieve any CPSW packets which are ready */\r
- status = CpswDma_retrieveRxPackets(gCpswLpbkObj.hRxFlow,\r
- &rxReadyQ);\r
- if( status != CPSW_SOK )\r
- {\r
- UART_printf("Failed to retrive the CPSW RX packets\n");\r
- return -1;\r
- }\r
-\r
- /* There should not be any packet with DMA during init */\r
- if(CpswUtils_getQCount(&rxReadyQ) != 0U )\r
- {\r
- UART_printf("rxReadyQ is not zero,...Exiting\n");\r
- return -1;\r
+ UART_printf("txPri[%u] = %d\n", i,\r
+ (uint32_t)st->txPri[i]);\r
}\r
\r
- CpswAppUtils_validatePacketState(&gCpswLpbkObj.rxFreeQ,\r
- CPSW_PKTSTATE_APP_WITH_FREEQ,\r
- CPSW_PKTSTATE_APP_WITH_DRIVER);\r
-\r
- CpswAppUtils_submitRxPackets(gCpswLpbkObj.hRxFlow,\r
- &gCpswLpbkObj.rxFreeQ);\r
- /* Assert here as during init no. of DMA descriptors should be equal to\r
- * no. of free Ethernet buffers available with app */\r
-\r
- if(CpswUtils_getQCount(&gCpswLpbkObj.rxFreeQ) != 0)\r
+ for (i = 0U; i < ENET_ARRAYSIZE((uint32_t)st->txPriBcnt); i++)\r
{\r
- UART_printf("rxFreeQ is not '0',...Exiting\n");\r
- return -1;\r
+ UART_printf("txPriBcnt[%u] = %d\n", i,\r
+ (uint32_t)st->txPriBcnt[i]);\r
}\r
-\r
- return 0;\r
}\r
\r
/**\r
- * \brief This function is used to initialize the free packet\r
- * info queue with the Ethernet packets to be transmitted.\r
+ * \brief This function is used to Host port statistics\r
*\r
- * \return int8_t\r
- * 0 - in case of success\r
- * -1 - in case of failure.\r
+ * \param CpswStats_HostPort_2g *st Cpsw stats\r
*\r
+ * \return NULL\r
*/\r
-static int8_t BoardDiag_cpswInitTxFreePktQ(void)\r
+static void BoardDiag_printHostPortStats2G(CpswStats_HostPort_2g *st)\r
{\r
- CpswDma_PktInfo *pktInfo;\r
- uint32_t index;\r
-\r
- /* Initialize all queues */\r
- CpswUtils_initQ(&gCpswLpbkObj.txFreePktInfoQ);\r
-\r
- /* Initialize TX EthPkts and queue them to txFreePktInfoQ */\r
- for(index = 0U; index < CPSWAPPUTILS_ARRAY_SIZE(gCpswLpbkObj.txFreePktInfo); index++)\r
- {\r
- pktInfo = CpswAppMemUtils_allocEthPktFxn(&gCpswLpbkObj,\r
- CPSW_APPMEMUTILS_LARGE_POOL_PKT_SIZE,\r
- UDMA_CACHELINE_ALIGNMENT);\r
-\r
- if(pktInfo == NULL)\r
- {\r
- UART_printf("\n"); \r
- }\r
- CPSW_UTILS_SET_PKT_APP_STATE(&pktInfo->pktState,\r
- CPSW_PKTSTATE_APP_WITH_FREEQ);\r
-\r
- CpswUtils_enQ(&gCpswLpbkObj.txFreePktInfoQ,\r
- &pktInfo->node);\r
-\r
- }\r
-\r
- UART_printf("initQs() txFreePktInfoQ initialized with %d pkts\n",\r
- CpswUtils_getQCount(&gCpswLpbkObj.txFreePktInfoQ));\r
- return 0;\r
+ UART_printf("rxGoodFrames = %d\n", (uint32_t)st->rxGoodFrames);\r
+ UART_printf("rxBcastFrames = %u\n", (uint32_t)st->rxBcastFrames);\r
+ UART_printf("rxOctets = %d\n", (uint32_t)st->rxOctets);\r
+ UART_printf("txGoodFrames = %d\n", (uint32_t)st->txGoodFrames);\r
+ UART_printf("txBcastFrames = %d\n", (uint32_t)st->txBcastFrames);\r
+ UART_printf("txOctets = %d\n", (uint32_t)st->txOctets);\r
+ UART_printf("octetsFrames512to1023 = %d\n",\r
+ (uint32_t)st->octetsFrames512to1023);\r
}\r
\r
/**\r
- * \brief This function is used to set the ALE port state to forward.\r
+ * \brief This function is used to display Mac and Host port statistics\r
*\r
- * \param macAddr [IN] host MAC address\r
+ * \param NULL\r
*\r
- * \return int32_t\r
- * 0 - in case of success\r
- * -1 - in case of failure.\r
+ * \return NULL\r
*\r
*/\r
-static int32_t BoardDiag_cpswChangeHostAleEntry(uint8_t macAddr[])\r
+static void BoardDiag_enetLpbkShowCpswStats(void)\r
{\r
+ Enet_IoctlPrms prms;\r
+ CpswStats_PortStats portStats;\r
int32_t status;\r
- Cpsw_IoctlPrms prms;\r
- CpswAle_AddEntryOutArgs setUcastOutArgs;\r
- CpswAle_SetUcastEntryInArgs setUcastInArgs;\r
-\r
- memcpy(&setUcastInArgs.addr.addr[0U],\r
- macAddr,\r
- sizeof(setUcastInArgs.addr.addr));\r
\r
- setUcastInArgs.addr.vlanId = 0U;\r
- setUcastInArgs.info.portNum = 0U;\r
- setUcastInArgs.info.blocked = false;\r
- setUcastInArgs.info.secure = false;\r
- setUcastInArgs.info.super = 0U;\r
- setUcastInArgs.info.ageable = false;\r
-\r
-\r
- CPSW_IOCTL_SET_INOUT_ARGS(&prms,\r
- &setUcastInArgs,\r
- &setUcastOutArgs);\r
-\r
- status = Cpsw_ioctl(gCpswLpbkObj.hCpsw,\r
- gCpswLpbkObj.coreId,\r
- CPSW_ALE_IOCTL_ADD_UNICAST,\r
- &prms);\r
- if (status != CPSW_SOK)\r
+ /* Show host port statistics */\r
+ ENET_IOCTL_SET_OUT_ARGS(&prms, &portStats);\r
+ status = Enet_ioctl(gEnetLpbk.hEnet, gEnetLpbk.coreId,\r
+ ENET_STATS_IOCTL_GET_HOSTPORT_STATS, &prms);\r
+ if (status == ENET_SOK)\r
{\r
- UART_printf("Setting the ALE port state to forward failed with error status - %d\n\r", status);\r
- return status;\r
+ UART_printf("\n Port 0 Statistics\n");\r
+ UART_printf("-----------------------------------------\n");\r
+ BoardDiag_printHostPortStats2G((CpswStats_HostPort_2g *)&portStats);\r
+ UART_printf("\n");\r
+ }\r
+ else\r
+ {\r
+ UART_printf("Failed to get host stats: %d\n", status);\r
}\r
\r
- return status;\r
-}\r
-\r
-/**\r
- * \brief This function is used for converting the virtual address\r
- * to physical address\r
- *\r
- * \param virtAddr [IN/OUT] Pointer to virtual address\r
- * \param appData [IN] Pointer to application data\r
- *\r
- * \return uint64_t - CPSW physical address\r
- *\r
- */\r
-static uint64_t BoardDiag_cpswvirtToPhyFx(const void *virtAddr,\r
- void *appData)\r
-{\r
- return ((uint64_t)virtAddr);\r
+ /* Show MAC port statistics */\r
+ if (status == ENET_SOK)\r
+ {\r
+ ENET_IOCTL_SET_INOUT_ARGS(&prms, &gEnetLpbk.macPort, &portStats);\r
+ status = Enet_ioctl(gEnetLpbk.hEnet, gEnetLpbk.coreId,\r
+ ENET_STATS_IOCTL_GET_MACPORT_STATS, &prms);\r
+ if (status == ENET_SOK)\r
+ {\r
+ UART_printf("\n Port 1 Statistics\n");\r
+ UART_printf("-----------------------------------------\n");\r
+ BoardDiag_printMacPortStats2G((CpswStats_MacPort_2g *)&portStats);\r
+ UART_printf("\n");\r
+ }\r
+ else\r
+ {\r
+ UART_printf("Failed to get MAC stats: %d\n", status);\r
+ }\r
+ }\r
}\r
\r
/**\r
- * \brief This function is used for converting the physical address\r
- * to virtual address\r
+ * \brief This function is used to display Mac address\r
*\r
- * \param phyAddr [IN] Pointer to physical address\r
- * \param appData [IN] Pointer to application data\r
+ * \param uint8_t macAddr[] MAC Address\r
*\r
- * \return void - Pointer to virtual address\r
+ * \return NULL\r
*\r
*/\r
-static void *BoardDiag_cpswPhyToVirtFxn(uint64_t phyAddr,\r
- void *appData)\r
+static void BoardDiag_printMacAddr(uint8_t macAddr[])\r
{\r
-#if defined (__aarch64__)\r
- uint64_t temp = phyAddr;\r
-#else\r
- /* R5 is 32-bit machine, need to truncate to avoid void * typecast error */\r
- uint32_t temp = (uint32_t)phyAddr;\r
-#endif\r
- return ((void *) temp);\r
+ UART_printf("%02x:%02x:%02x:%02x:%02x:%02x\n",\r
+ macAddr[0] & 0xFF,\r
+ macAddr[1] & 0xFF,\r
+ macAddr[2] & 0xFF,\r
+ macAddr[3] & 0xFF,\r
+ macAddr[4] & 0xFF,\r
+ macAddr[5] & 0xFF);\r
}\r
\r
/**\r
- * \brief This function is used for initialize the ALE submodule.\r
+ * \brief This function is used to display Mac address\r
*\r
- * \param aleConfig [IN] Pointer to ALE configuration structure\r
- *\r
- */\r
-static void BoardDiag_cpswInitAleConfig(CpswAle_Config *aleConfig)\r
-{\r
- aleConfig->modeFlags =\r
- (CPSW_ALE_CONFIG_MASK_ALE_MODULE_ENABLE);\r
- aleConfig->agingConfig.enableAutoAging = TRUE;\r
- aleConfig->agingConfig.agingPeriodInMs = 1000;\r
- aleConfig->nwSecCfg.enableVid0Mode = TRUE;\r
- aleConfig->vlanConfig.aleVlanAwareMode = FALSE;\r
- aleConfig->vlanConfig.cpswVlanAwareMode = FALSE;\r
- aleConfig->vlanConfig.unknownUnregMcastFloodMask = CPSW_ALE_ALL_PORTS_MASK;\r
- aleConfig->vlanConfig.unknownRegMcastFloodMask = CPSW_ALE_ALL_PORTS_MASK;\r
- aleConfig->vlanConfig.unknownVlanMemberListMask = CPSW_ALE_ALL_PORTS_MASK;\r
-}\r
-\r
-/**\r
- * \brief This function is used for de-initialize the CPSW module.\r
+ * \param EthFrame EthFrame[] frame to be displayed\r
+ * uint32_t len length of the frame\r
+ * \return NULL\r
*\r
*/\r
-void BoardDiag_cpswClose(void)\r
+static void BoardDiag_printFrame(EthFrame *frame,\r
+ uint32_t len)\r
{\r
- int32_t status;\r
- Cpsw_IoctlPrms prms;\r
-\r
- Cpsw_GenericPortLinkInArgs args0 = {\r
- .portNum = gCpswLpbkObj.portNum0,\r
- };\r
+ uint8_t *payload;\r
+ uint32_t i;\r
\r
+ UART_printf("Dst addr : ");\r
+ BoardDiag_printMacAddr(&frame->hdr.dstMac[0]);\r
\r
- Cpsw_GenericPortLinkInArgs args1 = {\r
- .portNum = gCpswLpbkObj.portNum1,\r
- };\r
+ UART_printf("Src addr : ");\r
+ BoardDiag_printMacAddr(&frame->hdr.srcMac[0]);\r
\r
- CPSW_IOCTL_SET_IN_ARGS(&prms,\r
- &gCpswLpbkObj.coreKey);\r
-\r
- status = Cpsw_ioctl(gCpswLpbkObj.hCpsw,\r
- gCpswLpbkObj.coreId,\r
- CPSW_IOCTL_DETACH_CORE,\r
- &prms);\r
- if (status != CPSW_SOK)\r
+ if (frame->hdr.etherType == htons(ETHERTYPE_VLAN_TAG))\r
{\r
- UART_printf("close() failed to close MAC port: %d\n", status);\r
+ EthVlanFrame *vlanFrame = (EthVlanFrame *)frame;\r
+\r
+ UART_printf("TPID : 0x%04x\n", \r
+ ntohs(vlanFrame->hdr.tpid) & 0xFFFFU);\r
+ UART_printf("Priority : %d\n",\r
+ (ntohs(vlanFrame->hdr.tci) & 0xFFFFU) >> 13);\r
+ UART_printf("VLAN Id : %d\n",\r
+ ntohs(vlanFrame->hdr.tci) & 0xFFFU);\r
+ UART_printf("EtherType: 0x%04x\n",\r
+ ntohs(vlanFrame->hdr.etherType) & 0xFFFFU);\r
+ payload = vlanFrame->payload;\r
+ len -= ETH_VLAN_TAG_LEN;\r
}\r
-\r
- CPSW_IOCTL_SET_IN_ARGS(&prms, &args0);\r
- status = Cpsw_ioctl(gCpswLpbkObj.hCpsw,\r
- gCpswLpbkObj.coreId,\r
- CPSW_IOCTL_CLOSE_PORT_LINK,\r
- &prms);\r
- if (status != CPSW_SOK)\r
+ else\r
{\r
- UART_printf("close() failed to close MAC port0: %d\n", status);\r
+ UART_printf("EtherType: 0x%04x\n", \r
+ ntohs(frame->hdr.etherType) & 0xFFFFU);\r
+ payload = frame->payload;\r
}\r
\r
- CPSW_IOCTL_SET_IN_ARGS(&prms, &args1);\r
- status = Cpsw_ioctl(gCpswLpbkObj.hCpsw,\r
- gCpswLpbkObj.coreId,\r
- CPSW_IOCTL_CLOSE_PORT_LINK,\r
- &prms);\r
- if (status != CPSW_SOK)\r
+ UART_printf("Payload : ");\r
+ for (i = 0; i < len; i++)\r
{\r
- UART_printf("close() failed to close MAC port1: %d\n", status);\r
+ UART_printf("0x%02x ", payload[i]);\r
+ if (i && (((i + 1) % OCTETS_PER_ROW) == 0))\r
+ {\r
+ UART_printf("\n ");\r
+ }\r
}\r
\r
- Cpsw_close(gCpswLpbkObj.hCpsw);\r
+ if (len && ((len % OCTETS_PER_ROW) != 0))\r
+ {\r
+ UART_printf("\n");\r
+ }\r
\r
- Cpsw_deinit(gCpswLpbkObj.cpswType);\r
+ UART_printf("\n");\r
}\r
\r
-\r
/**\r
- * \brief This function is used for de-initialize the CPSW DMA driver.\r
+ * \brief This function is used to queue the received packets to rx ready queue\r
+ *\r
+ * \param NULL\r
+ *\r
+ * \return uint32_t - Receive ready queue count\r
*\r
*/\r
-void BoardDiag_cpswCloseDma(void)\r
+static uint32_t BoardDiag_enetLpbkReceivePkts(void)\r
{\r
- CpswDma_PktInfoQ fqPktInfoQ;\r
- CpswDma_PktInfoQ cqPktInfoQ;\r
-\r
- CpswUtils_initQ(&fqPktInfoQ);\r
- CpswUtils_initQ(&cqPktInfoQ);\r
+ EnetDma_PktQ rxReadyQ;\r
+ EnetDma_Pkt *pktInfo;\r
+ int32_t status;\r
+ uint32_t rxReadyCnt = 0U;\r
\r
- /* Close RX Flow */\r
- CpswAppUtils_closeRxFlow(gCpswLpbkObj.hCpsw,\r
- gCpswLpbkObj.coreKey,\r
- gCpswLpbkObj.coreId,\r
- true,\r
- &fqPktInfoQ,\r
- &cqPktInfoQ,\r
- gCpswLpbkObj.rxStartFlowIdx,\r
- gCpswLpbkObj.rxFlowIdx,\r
- gCpswLpbkObj.hostMacAddr0,\r
- gCpswLpbkObj.hRxFlow);\r
-\r
- CpswAppUtils_freePktInfoQ(&fqPktInfoQ);\r
- CpswAppUtils_freePktInfoQ(&cqPktInfoQ);\r
+ EnetQueue_initQ(&rxReadyQ);\r
\r
- /* Close TX channel */\r
- CpswUtils_initQ(&fqPktInfoQ);\r
- CpswUtils_initQ(&cqPktInfoQ);\r
+ /* Retrieve any CPSW packets which are ready */\r
+ status = EnetDma_retrieveRxPktQ(gEnetLpbk.hRxCh, &rxReadyQ);\r
\r
- CpswAppUtils_closeTxCh(gCpswLpbkObj.hCpsw,\r
- gCpswLpbkObj.coreKey,\r
- gCpswLpbkObj.coreId,\r
- &fqPktInfoQ,\r
- &cqPktInfoQ,\r
- gCpswLpbkObj.hTxCh,\r
- gCpswLpbkObj.txChNum);\r
+ if (status == ENET_SOK)\r
+ {\r
+ rxReadyCnt = EnetQueue_getQCount(&rxReadyQ);\r
\r
- CpswAppUtils_freePktInfoQ(&fqPktInfoQ);\r
- CpswAppUtils_freePktInfoQ(&cqPktInfoQ);\r
+ /* Queue the received packet to rxReadyQ and pass new ones from rxFreeQ\r
+ **/\r
+ pktInfo = (EnetDma_Pkt *)EnetQueue_deq(&rxReadyQ);\r
+ while (pktInfo != NULL)\r
+ {\r
+ EnetDma_checkPktState(&pktInfo->pktState,\r
+ ENET_PKTSTATE_MODULE_APP,\r
+ ENET_PKTSTATE_APP_WITH_DRIVER,\r
+ ENET_PKTSTATE_APP_WITH_READYQ);\r
\r
- CpswAppUtils_freePktInfoQ(&gCpswLpbkObj.rxFreeQ);\r
- CpswAppUtils_freePktInfoQ(&gCpswLpbkObj.txFreePktInfoQ);\r
+ EnetQueue_enq(&gEnetLpbk.rxReadyQ, &pktInfo->node);\r
+ pktInfo = (EnetDma_Pkt *)EnetQueue_deq(&rxReadyQ);\r
+ }\r
+ }\r
+ else\r
+ {\r
+ UART_printf("receivePkts() failed to retrieve pkts: %d\n",\r
+ status);\r
+ }\r
\r
- CpswAppMemUtils_deInit();\r
+ return rxReadyCnt;\r
}\r
\r
/**\r
- * \brief This function is used to display Mac and Host port statistics\r
+ * \brief This function is used to retrieve's any CPSW packets that may be free now\r
+ *\r
+ * \param NULL\r
+ *\r
+ * \return uint32_t - Transmit free queue count\r
*\r
*/\r
-static void BoardDiag_cpswShowStats(void)\r
+static uint32_t BoardDiag_enetLpbkRetrieveFreeTxPkts(void)\r
{\r
- Cpsw_IoctlPrms prms;\r
- CpswStats_GenericMacPortInArgs inArgs;\r
- CpswStats_PortStats portStats;\r
- int32_t status = CPSW_SOK;\r
-\r
- CPSW_IOCTL_SET_OUT_ARGS(&prms,\r
- &portStats);\r
- status = Cpsw_ioctl(gCpswLpbkObj.hCpsw,\r
- gCpswLpbkObj.coreId,\r
- CPSW_STATS_IOCTL_GET_HOSTPORT_STATS,\r
- &prms);\r
- if (status != CPSW_SOK)\r
- {\r
- UART_printf("CpswApp_showStats() failed to get host stats: %d\n",\r
- status);\r
- }\r
+ EnetDma_PktQ txFreeQ;\r
+ EnetDma_Pkt *pktInfo;\r
+ int32_t status;\r
+ uint32_t txFreeQCnt = 0U;\r
\r
- if (status == CPSW_SOK)\r
+ EnetQueue_initQ(&txFreeQ);\r
+\r
+ /* Retrieve any CPSW packets that may be free now */\r
+ status = EnetDma_retrieveTxPktQ(gEnetLpbk.hTxCh, &txFreeQ);\r
+ if (status == ENET_SOK)\r
{\r
- inArgs.portNum = gCpswLpbkObj.portNum0;\r
- CPSW_IOCTL_SET_INOUT_ARGS(&prms,\r
- &inArgs,\r
- &portStats);\r
-\r
- status = Cpsw_ioctl(gCpswLpbkObj.hCpsw,\r
- gCpswLpbkObj.coreId,\r
- CPSW_STATS_IOCTL_GET_MACPORT_STATS,\r
- &prms);\r
- if (status != CPSW_SOK)\r
+ txFreeQCnt = EnetQueue_getQCount(&txFreeQ);\r
+\r
+ pktInfo = (EnetDma_Pkt *)EnetQueue_deq(&txFreeQ);\r
+ while (NULL != pktInfo)\r
{\r
- UART_printf("CpswApp_showStats() failed to get MAC stats: %d\n",\r
- status);\r
+ EnetDma_checkPktState(&pktInfo->pktState,\r
+ ENET_PKTSTATE_MODULE_APP,\r
+ ENET_PKTSTATE_APP_WITH_DRIVER,\r
+ ENET_PKTSTATE_APP_WITH_FREEQ);\r
+\r
+ EnetQueue_enq(&gEnetLpbk.txFreePktInfoQ, &pktInfo->node);\r
+ pktInfo = (EnetDma_Pkt *)EnetQueue_deq(&txFreeQ);\r
}\r
}\r
+ else\r
+ {\r
+ UART_printf("retrieveFreeTxPkts() failed to retrieve pkts: %d\n",\r
+ status);\r
+ }\r
+\r
+ return txFreeQCnt;\r
}\r
\r
/**\r
* \brief This function is used for CPSW packet transmission\r
* and reception\r
*\r
+ * \param NULL\r
+ *\r
* \return int32_t\r
* 0 - in case of success\r
* -1 - in case of failure.\r
*\r
*/\r
-int32_t BoardDiag_cpswPktRxTx(void)\r
+static int32_t BoardDiag_cpswPktRxTx(void)\r
{\r
- CpswDma_PktInfoQ txSubmitQ;\r
- CpswDma_PktInfo *pktInfo;\r
- EthFrame *frame;\r
- uint32_t txRetrievePktCnt;\r
- uint32_t loopTxPktCnt;\r
- uint32_t totalTxCnt;\r
- uint32_t rxReadyCnt;\r
- uint32_t loopCnt;\r
- uint32_t pktCnt;\r
- uint32_t loopRxPktCnt;\r
- int32_t status = CPSW_SOK;\r
-\r
- totalTxCnt = 0U;\r
- for (loopCnt = 0U; loopCnt < BOARD_DIAG_CPSW_TEST_NUM_LOOP; loopCnt++)\r
+ EnetDma_PktQ txSubmitQ;\r
+ EnetDma_Pkt *pktInfo;\r
+ EthFrame *frame;\r
+ uint32_t txRetrievePktCnt = 0;\r
+ uint32_t loopTxPktCnt = 0;\r
+ uint32_t loopRxPktCnt = 0;\r
+ uint32_t loopCnt = 0, pktCnt = 0;\r
+ uint32_t rxReadyCnt = 0;\r
+ int32_t status = ENET_SOK;\r
+ uint8_t bcastAddr[ENET_MAC_ADDR_LEN] = \r
+ {0xffU, 0xffU, 0xffU, 0xffU, 0xffU, 0xffU};\r
+\r
+ gEnetLpbk.totalTxCnt = 0U;\r
+ for (loopCnt = 0U; loopCnt < BOARD_DIAG_ENETLPBK_NUM_ITERATION; loopCnt++)\r
{\r
pktCnt = 0U;\r
- while (pktCnt < BOARD_DIAG_CPSW_TEST_PTK_NUM)\r
+ while (pktCnt < BOARD_DIAG_ENETLPBK_TEST_PKT_NUM)\r
{\r
loopRxPktCnt = loopTxPktCnt = 0U;\r
/* Transmit a single packet */\r
- CpswUtils_initQ(&txSubmitQ);\r
+ EnetQueue_initQ(&txSubmitQ);\r
\r
/* Dequeue one free TX Eth packet */\r
- pktInfo = (CpswDma_PktInfo *)CpswUtils_deQ(&gCpswLpbkObj.txFreePktInfoQ);\r
+ pktInfo = (EnetDma_Pkt *)EnetQueue_deq(&gEnetLpbk.txFreePktInfoQ);\r
\r
- while ( NULL != pktInfo )\r
+ while (NULL != pktInfo)\r
{\r
pktCnt++;\r
/* Fill the TX Eth frame with test content */\r
frame = (EthFrame *)pktInfo->bufPtr;\r
-\r
- memcpy(frame->hdr.dstMac,\r
- bcastAddr,\r
- CPSW_MAC_ADDR_LEN);\r
-\r
- memcpy(frame->hdr.srcMac,\r
- &gCpswLpbkObj.hostMacAddr0[0U],\r
- CPSW_MAC_ADDR_LEN);\r
-\r
+ memcpy(frame->hdr.dstMac, bcastAddr, ENET_MAC_ADDR_LEN);\r
+ memcpy(frame->hdr.srcMac, &gEnetLpbk.hostMacAddr[0U],\r
+ ENET_MAC_ADDR_LEN);\r
frame->hdr.etherType = htons(ETHERTYPE_EXPERIMENTAL1);\r
- memset(&frame->payload[0U],\r
- (uint8_t)(0xA5 + pktCnt),\r
- BOARD_DIAG_CPSW_TEST_LEN);\r
- pktInfo->userBufLen = BOARD_DIAG_CPSW_TEST_LEN + sizeof (EthFrameHeader);\r
- pktInfo->appPriv = &gCpswLpbkObj;\r
- CpswUtils_checkPktState(&pktInfo->pktState,\r
- CPSW_PKTSTATE_MODULE_APP,\r
- CPSW_PKTSTATE_APP_WITH_FREEQ,\r
- CPSW_PKTSTATE_APP_WITH_DRIVER);\r
+ memset(&frame->payload[0U], (uint8_t)(0xA5 + pktCnt),\r
+ BOARD_DIAG_ENETLPBK_TEST_PKT_LEN);\r
+ pktInfo->userBufLen = BOARD_DIAG_ENETLPBK_TEST_PKT_LEN +\r
+ sizeof(EthFrameHeader);\r
+ pktInfo->appPriv = &gEnetLpbk;\r
+ EnetDma_checkPktState(&pktInfo->pktState,\r
+ ENET_PKTSTATE_MODULE_APP,\r
+ ENET_PKTSTATE_APP_WITH_FREEQ,\r
+ ENET_PKTSTATE_APP_WITH_DRIVER);\r
\r
/* Enqueue the packet for later transmission */\r
- CpswUtils_enQ(&txSubmitQ,\r
- &pktInfo->node);\r
+ EnetQueue_enq(&txSubmitQ, &pktInfo->node);\r
\r
- if (pktCnt >= BOARD_DIAG_CPSW_TEST_PTK_NUM)\r
+ if (pktCnt >= BOARD_DIAG_ENETLPBK_TEST_PKT_NUM)\r
{\r
break;\r
}\r
+\r
/* Dequeue one free TX Eth packet */\r
- pktInfo = (CpswDma_PktInfo *)CpswUtils_deQ(&gCpswLpbkObj.txFreePktInfoQ);\r
+ pktInfo =\r
+ (EnetDma_Pkt *)EnetQueue_deq(&gEnetLpbk.txFreePktInfoQ);\r
}\r
-\r
- loopTxPktCnt = CpswUtils_getQCount(&txSubmitQ);\r
- while (0U != CpswUtils_getQCount(&txSubmitQ))\r
+ loopTxPktCnt = EnetQueue_getQCount(&txSubmitQ);\r
+ while (0U != EnetQueue_getQCount(&txSubmitQ))\r
{\r
- uint32_t txCnt = CpswUtils_getQCount(&txSubmitQ);\r
- status = CpswAppUtils_submitTxPackets(gCpswLpbkObj.hTxCh,\r
- &txSubmitQ);\r
- while (txSem != true);\r
- txSem = false;\r
+ uint32_t txCnt = EnetQueue_getQCount(&txSubmitQ);\r
+ status = EnetDma_submitTxPktQ(gEnetLpbk.hTxCh,\r
+ &txSubmitQ);\r
+ while (gTxSem != true);\r
+ gTxSem = false;\r
\r
/* Retrieve TX free packets */\r
- if (status == CPSW_SOK)\r
+ if (status == ENET_SOK)\r
{\r
- txCnt = txCnt - CpswUtils_getQCount(&txSubmitQ);\r
+ txCnt = txCnt - EnetQueue_getQCount(&txSubmitQ);\r
txRetrievePktCnt = 0U;\r
while (txRetrievePktCnt != txCnt)\r
{\r
+ /* TODO this is not failure as HW is busy sending\r
+ * packets, we need to wait and again call retrieve\r
+ * packets */\r
BOARD_delay(1);\r
- txRetrievePktCnt |= BoardDiag_cpswRetrieveFreeTxPkts();\r
+ txRetrievePktCnt += BoardDiag_enetLpbkRetrieveFreeTxPkts();\r
}\r
}\r
else\r
break;\r
}\r
}\r
-\r
- /* Wait for packet reception */\r
+ \r
+ /* wait to receive the packet */\r
do\r
{\r
- while (rxSem != true);\r
- rxSem = false;\r
+ while (gRxSem != true);\r
+ gRxSem = false;\r
\r
/* Get the packets received so far */\r
- rxReadyCnt = BoardDiag_cpswReceivePkts();\r
+ rxReadyCnt = BoardDiag_enetLpbkReceivePkts();\r
if (rxReadyCnt > 0U)\r
{\r
/* Consume the received packets and release them */\r
- pktInfo = (CpswDma_PktInfo *)CpswUtils_deQ(&gCpswLpbkObj.rxReadyQ);\r
- while (pktInfo != NULL)\r
+ pktInfo =\r
+ (EnetDma_Pkt *)EnetQueue_deq(&gEnetLpbk.rxReadyQ);\r
+ while (NULL != pktInfo)\r
{\r
- CpswUtils_checkPktState(&pktInfo->pktState,\r
- CPSW_PKTSTATE_MODULE_APP,\r
- CPSW_PKTSTATE_APP_WITH_READYQ,\r
- CPSW_PKTSTATE_APP_WITH_FREEQ);\r
+ EnetDma_checkPktState(&pktInfo->pktState,\r
+ ENET_PKTSTATE_MODULE_APP,\r
+ ENET_PKTSTATE_APP_WITH_READYQ,\r
+ ENET_PKTSTATE_APP_WITH_FREEQ);\r
\r
/* Consume the packet by just printing its content */\r
- frame = (EthFrame *)pktInfo->bufPtr;\r
- if (gCpswLpbkObj.printFrame)\r
+ if (gEnetLpbk.printFrame)\r
{\r
- CpswAppUtils_printFrame(frame,\r
- (pktInfo->userBufLen - sizeof (EthFrameHeader)));\r
+ frame = (EthFrame *)pktInfo->bufPtr;\r
+\r
+ BoardDiag_printFrame(frame, pktInfo->userBufLen -\r
+ sizeof(EthFrameHeader));\r
}\r
\r
/* Release the received packet */\r
- CpswUtils_enQ(&gCpswLpbkObj.rxFreeQ,\r
- &pktInfo->node);\r
- pktInfo = (CpswDma_PktInfo *)CpswUtils_deQ(&gCpswLpbkObj.rxReadyQ);\r
+ EnetQueue_enq(&gEnetLpbk.rxFreeQ, &pktInfo->node);\r
+ pktInfo =\r
+ (EnetDma_Pkt *)EnetQueue_deq(&gEnetLpbk.rxReadyQ);\r
}\r
\r
/*Submit now processed buffers */\r
- if (status == CPSW_SOK)\r
+ if (status == ENET_SOK)\r
{\r
- CpswAppUtils_validatePacketState(&gCpswLpbkObj.rxFreeQ,\r
- CPSW_PKTSTATE_APP_WITH_FREEQ,\r
- CPSW_PKTSTATE_APP_WITH_DRIVER);\r
+ EnetAppUtils_validatePacketState(\r
+ &gEnetLpbk.rxFreeQ,\r
+ ENET_PKTSTATE_APP_WITH_FREEQ,\r
+ ENET_PKTSTATE_APP_WITH_DRIVER);\r
\r
- CpswAppUtils_submitRxPackets(gCpswLpbkObj.hRxFlow,\r
- &gCpswLpbkObj.rxFreeQ);\r
+ EnetDma_submitRxPktQ(gEnetLpbk.hRxCh,\r
+ &gEnetLpbk.rxFreeQ);\r
}\r
}\r
- loopRxPktCnt |= rxReadyCnt;\r
+\r
+ loopRxPktCnt += rxReadyCnt;\r
}\r
while (loopRxPktCnt < loopTxPktCnt);\r
\r
- totalTxCnt |= loopTxPktCnt;\r
+ gEnetLpbk.totalRxCnt += loopTxPktCnt;\r
}\r
- }\r
\r
- if (status == CPSW_SOK)\r
+ gEnetLpbk.totalTxCnt += pktCnt;\r
+ }\r
+ \r
+ if (status == ENET_SOK)\r
{\r
- UART_printf("Transmitted & Received %d packets\n", totalTxCnt);\r
+ if(gEnetLpbk.totalTxCnt != gEnetLpbk.totalRxCnt)\r
+ {\r
+ UART_printf("Packet loss, Test Failed\n");\r
+ return -1;\r
+ }\r
+ UART_printf("\nTransmitted - %d packets\nReceived - %d packets\n",\r
+ gEnetLpbk.totalTxCnt, gEnetLpbk.totalRxCnt);\r
}\r
else\r
{\r
- UART_printf("Failed to transmit/receive packets: %d, transmitted: %d \n",\r
- BOARD_DIAG_CPSW_TEST_PTK_NUM, totalTxCnt);\r
+ UART_printf("Failed to transmit/receive packets: %d,transmitted: %d\n",\r
+ BOARD_DIAG_ENETLPBK_TEST_PKT_NUM, gEnetLpbk.totalTxCnt);\r
}\r
\r
return status;\r
}\r
\r
/**\r
- * \brief This function is used to open the CPSW DMA module\r
+ * \brief CPSW delay function\r
+ *\r
+ * \param waitTime [IN] Wait time\r
+ *\r
+ */\r
+static void BoardDiag_enetWait(uint32_t waitTime)\r
+{\r
+ volatile uint32_t index;\r
+\r
+ /* we multiply waitTime by 10000 as 400MHz R5 takes 2.5ns for single cycle\r
+ * and we assume for loop takes 4 cycles */\r
+ for (index = 0; index < (waitTime*1000); index++);\r
+}\r
+\r
+/**\r
+ * \brief This function Waits till phy link is up.\r
*\r
- * \param testMode [IN/OUT] Pointer to virtual address\r
+ * \param NULL\r
*\r
* \return int32_t\r
* 0 - in case of success\r
* -1 - in case of failure.\r
*\r
*/\r
-int32_t BoardDiag_cpswOpenDma(void)\r
+static int32_t BoardDiag_enetLpbkWaitForLinkUp(void)\r
{\r
- int32_t status = CPSW_SOK;\r
-\r
- /* Open the CPSW TX channel */\r
- CpswDma_initTxChParams(&cpswTxChCfg);\r
-\r
- cpswTxChCfg.hUdmaDrv = gCpswLpbkObj.hUdmaDrv;\r
- cpswTxChCfg.hCbArg = &gCpswLpbkObj;\r
- cpswTxChCfg.notifyCb = BoardDiag_cpswTxIsrFxn;\r
-\r
- CpswAppUtils_setCommonTxChPrms(&cpswTxChCfg);\r
-\r
- CpswAppUtils_openTxCh(gCpswLpbkObj.hCpsw,\r
- gCpswLpbkObj.coreKey,\r
- gCpswLpbkObj.coreId,\r
- &gCpswLpbkObj.txChNum,\r
- &gCpswLpbkObj.hTxCh,\r
- &cpswTxChCfg);\r
+ Enet_IoctlPrms prms;\r
+ bool linked = false;\r
+ int32_t status = ENET_SOK;\r
\r
- BoardDiag_cpswInitTxFreePktQ();\r
+ ENET_IOCTL_SET_INOUT_ARGS(&prms, &gEnetLpbk.macPort, &linked);\r
\r
- if (NULL != gCpswLpbkObj.hTxCh)\r
+ while (!linked)\r
{\r
- status = CpswDma_enableTxEvent(gCpswLpbkObj.hTxCh);\r
- if (CPSW_SOK != status)\r
+ status = Enet_ioctl(gEnetLpbk.hEnet, gEnetLpbk.coreId,\r
+ ENET_PER_IOCTL_IS_PORT_LINK_UP, &prms);\r
+ if (status != ENET_SOK)\r
{\r
- /* Free the Ch Num if enable event failed */\r
- CpswAppUtils_freeTxCh(gCpswLpbkObj.hCpsw,\r
- gCpswLpbkObj.coreKey,\r
- gCpswLpbkObj.coreId,\r
- gCpswLpbkObj.txChNum);\r
- UART_printf("CpswDma_startTxCh() failed: %d\n", status);\r
- status = CPSW_EFAIL;\r
+ UART_printf("Failed to get port %u's link status: %d\n",\r
+ ENET_MACPORT_ID(gEnetLpbk.macPort), status);\r
+ linked = false;\r
+ break;\r
}\r
- }\r
- else\r
- {\r
- /* Free the Ch Num if open Tx Ch failed */\r
- CpswAppUtils_freeTxCh(gCpswLpbkObj.hCpsw,\r
- gCpswLpbkObj.coreKey,\r
- gCpswLpbkObj.coreId,\r
- gCpswLpbkObj.txChNum);\r
- UART_printf("CpswDma_openTxCh() failed to open: %d\n",\r
- status);\r
- status = CPSW_EFAIL;\r
- }\r
\r
- /* Open the CPSW RX flow */\r
- if (status == CPSW_SOK)\r
- {\r
- CpswDma_initRxFlowParams(&cpswRxFlowCfg);\r
- cpswRxFlowCfg.notifyCb = BoardDiag_cpswRxIsrFxn;\r
- cpswRxFlowCfg.hUdmaDrv = gCpswLpbkObj.hUdmaDrv;\r
- cpswRxFlowCfg.hCbArg = &gCpswLpbkObj;\r
-\r
- CpswAppUtils_setCommonRxFlowPrms(&cpswRxFlowCfg);\r
-\r
- CpswAppUtils_openRxFlow(gCpswLpbkObj.hCpsw,\r
- gCpswLpbkObj.coreKey,\r
- gCpswLpbkObj.coreId,\r
- true,\r
- &gCpswLpbkObj.rxStartFlowIdx,\r
- &gCpswLpbkObj.rxFlowIdx,\r
- &gCpswLpbkObj.hostMacAddr0[0U],\r
- &gCpswLpbkObj.hRxFlow,\r
- &cpswRxFlowCfg);\r
-\r
- if (NULL == gCpswLpbkObj.hRxFlow)\r
- {\r
- CpswAppUtils_freeRxFlow(gCpswLpbkObj.hCpsw,\r
- gCpswLpbkObj.coreKey,\r
- gCpswLpbkObj.coreId,\r
- gCpswLpbkObj.rxFlowIdx);\r
- UART_printf("CpswDma_openRxFlow() failed to open: %d\n",\r
- status);\r
- if(gCpswLpbkObj.hRxFlow == NULL)\r
- {\r
- return -1;\r
- }\r
- }\r
- else\r
+ if (!linked)\r
{\r
- CpswAppUtils_print("Host MAC0 address: ");\r
- CpswAppUtils_printMacAddr(gCpswLpbkObj.hostMacAddr0);\r
- /* For MAC loopback disable secure flag for the host port entry */\r
- BoardDiag_cpswChangeHostAleEntry(&gCpswLpbkObj.hostMacAddr0[0U]);\r
- \r
- //CpswAppUtils_print("Host MAC1 address: ");\r
- //CpswAppUtils_printMacAddr(gCpswLpbkObj.hostMacAddr1);\r
- /* For MAC loopback disable secure flag for the host port entry */\r
- //BoardDiag_cpswChangeHostAleEntry(&gCpswLpbkObj.hostMacAddr1[0U]);\r
- \r
-\r
- /* Submit all ready RX buffers to DMA.*/\r
- boarDiag_cpswInitRxReadyPktQ();\r
+ Enet_periodicTick(gEnetLpbk.hEnet);\r
+ BoardDiag_enetWait(1000U);\r
}\r
}\r
\r
}\r
\r
/**\r
- * \brief This function is used to open the CPSW driver\r
+ * \brief This function checks the live status of the phy\r
+ *\r
+ * \param NULL\r
*\r
* \return int32_t\r
* 0 - in case of success\r
* -1 - in case of failure.\r
*\r
*/\r
-static int32_t BoardDiag_cpswOpen(uint32_t testMode)\r
+static int32_t BoardDiag_enetLpbkShowAlivePhys(void)\r
{\r
- Cpsw_Config cpswCfg;\r
- CpswOsal_Prms osalPrms;\r
- CpswUtils_Prms utilsPrms;\r
- int32_t status = CPSW_SOK;\r
- Cpsw_IoctlPrms prms;\r
- Cpsw_AttachCoreOutArgs attachCoreOutArgs;\r
-\r
- /* Set configuration parameters */\r
- Cpsw_initParams(&cpswCfg);\r
- cpswCfg.vlanConfig.vlanAware = false;\r
- cpswCfg.hostPortConfig.removeCrc = true;\r
- cpswCfg.hostPortConfig.padShortPacket = true;\r
- cpswCfg.hostPortConfig.passCrcErrors = true;\r
- CpswAppUtils_initResourceConfig(gCpswLpbkObj.cpswType,\r
- gCpswLpbkObj.coreId,\r
- &cpswCfg.resourceConfig);\r
- BoardDiag_cpswInitAleConfig(&cpswCfg.aleConfig);\r
-\r
- cpswCfg.dmaConfig.rxChInitPrms.dmaPriority = UDMA_DEFAULT_RX_CH_DMA_PRIORITY;\r
-\r
- /* App should open UDMA first as UDMA handle is needed to initialize\r
- * CPSW RX channel */\r
- gCpswLpbkObj.hUdmaDrv = CpswAppUtils_udmaOpen(gCpswLpbkObj.cpswType, NULL);\r
- if(gCpswLpbkObj.hUdmaDrv != NULL)\r
+ Enet_IoctlPrms prms;\r
+ bool alive = false;\r
+ int8_t phyCnt;\r
+ int32_t status;\r
+\r
+ for (phyCnt = 0U; phyCnt < ENET_MDIO_PHY_CNT_MAX; phyCnt++)\r
{\r
- cpswCfg.dmaConfig.hUdmaDrv = gCpswLpbkObj.hUdmaDrv;\r
- }\r
- else\r
- {\r
- UART_printf("Failed to get the UDMA handle\n");\r
- return -1;\r
+ ENET_IOCTL_SET_INOUT_ARGS(&prms, &phyCnt, &alive);\r
+\r
+ status = Enet_ioctl(gEnetLpbk.hEnet, gEnetLpbk.coreId,\r
+ ENET_MDIO_IOCTL_IS_ALIVE, &prms);\r
+ if (status == ENET_SOK)\r
+ {\r
+ if (alive == true)\r
+ {\r
+ UART_printf("PHY %u is alive\n", phyCnt);\r
+ }\r
+ }\r
+ else\r
+ {\r
+ UART_printf("Failed to get PHY %u alive status: %d\n", phyCnt, status);\r
+ return -1;\r
+ }\r
}\r
\r
- /* Initialize CPSW driver with default OSAL, utils */\r
- utilsPrms.printFxn = UART_printf;\r
- utilsPrms.traceFxn = UART_printf;\r
- utilsPrms.phyToVirtFxn = &BoardDiag_cpswPhyToVirtFxn;\r
- utilsPrms.virtToPhyFxn = &BoardDiag_cpswvirtToPhyFx;\r
+ return status;\r
+}\r
\r
- Cpsw_initOsalPrms(&osalPrms);\r
+/**\r
+ * \brief This function is used to set the ALE port state to forward.\r
+ *\r
+ * \param NULL\r
+ *\r
+ * \return int32_t\r
+ * 0 - in case of success\r
+ * -1 - in case of failure.\r
+ *\r
+ */\r
+static int32_t BoardDiag_enetLpbkSetupCpswAle(void)\r
+{\r
+ Enet_IoctlPrms prms;\r
+ CpswAle_SetPortStateInArgs setPortStateInArgs;\r
+ CpswAle_SetUcastEntryInArgs setUcastInArgs;\r
+ uint32_t entryIdx;\r
+ int32_t status;\r
\r
- Cpsw_init(gCpswLpbkObj.cpswType, &osalPrms, &utilsPrms);\r
+ /* ALE entry with "secure" bit cleared is required for loopback */\r
+ setUcastInArgs.addr.vlanId = 0U;\r
+ setUcastInArgs.info.portNum = CPSW_ALE_HOST_PORT_NUM;\r
+ setUcastInArgs.info.blocked = false;\r
+ setUcastInArgs.info.secure = false;\r
+ setUcastInArgs.info.super = false;\r
+ setUcastInArgs.info.ageable = false;\r
+ setUcastInArgs.info.trunk = false;\r
+\r
+ EnetUtils_copyMacAddr(&setUcastInArgs.addr.addr[0U],\r
+ gEnetLpbk.hostMacAddr);\r
\r
- /* Open the CPSW driver */\r
- gCpswLpbkObj.hCpsw = Cpsw_open(gCpswLpbkObj.cpswType,\r
- &cpswCfg);\r
- if(gCpswLpbkObj.hCpsw == NULL)\r
+ ENET_IOCTL_SET_INOUT_ARGS(&prms, &setUcastInArgs, &entryIdx);\r
+\r
+ status = Enet_ioctl(gEnetLpbk.hEnet, gEnetLpbk.coreId,\r
+ CPSW_ALE_IOCTL_ADD_UCAST, &prms);\r
+ if (status != ENET_SOK)\r
{\r
- UART_printf("BoardDiag_cpswOpen() failed to open: %d\n", status);\r
- status = CPSW_EFAIL;\r
+ UART_printf("Failed to add ucast entry: %d\n", status);\r
}\r
\r
- if(status == CPSW_SOK)\r
+ /* Set host port to 'forwarding' state */\r
+ if (status == ENET_SOK)\r
{\r
- /* Attach the core with RM */\r
- CPSW_IOCTL_SET_INOUT_ARGS(&prms,\r
- &gCpswLpbkObj.coreId,\r
- &attachCoreOutArgs);\r
-\r
- status = Cpsw_ioctl(gCpswLpbkObj.hCpsw,\r
- gCpswLpbkObj.coreId,\r
- CPSW_IOCTL_ATTACH_CORE,\r
- &prms);\r
- if(status != CPSW_SOK)\r
- {\r
- UART_printf("CpswApp_loopbackTest failed CPSW_IOCTL_ATTACH_CORE: %d\n",\r
- status);\r
- }\r
- else\r
+ setPortStateInArgs.portNum = CPSW_ALE_HOST_PORT_NUM;\r
+ setPortStateInArgs.portState = CPSW_ALE_PORTSTATE_FORWARD;\r
+ ENET_IOCTL_SET_IN_ARGS(&prms, &setPortStateInArgs);\r
+\r
+ status = Enet_ioctl(gEnetLpbk.hEnet, gEnetLpbk.coreId,\r
+ CPSW_ALE_IOCTL_SET_PORT_STATE, &prms);\r
+ if (status != ENET_SOK)\r
{\r
- gCpswLpbkObj.coreKey = attachCoreOutArgs.coreKey;\r
+ UART_printf("Failed to set ALE port state: %d\n", status);\r
}\r
}\r
\r
- if(status == CPSW_SOK)\r
+ return status;\r
+}\r
+\r
+/**\r
+ * \brief This function is used to initialize the receive ready packet queue\r
+ *\r
+ * \param NULL\r
+ *\r
+ * \return int8_t\r
+ * 0 - in case of success\r
+ * -1 - in case of failure.\r
+ *\r
+ */\r
+static int8_t BoardDiag_enetLpbkInitRxReadyPktQ(void)\r
+{\r
+ EnetDma_PktQ rxReadyQ;\r
+ EnetDma_Pkt *pPktInfo;\r
+ int32_t status;\r
+ uint32_t memUtilsRxPkts;\r
+\r
+ EnetQueue_initQ(&gEnetLpbk.rxFreeQ);\r
+ EnetQueue_initQ(&gEnetLpbk.rxReadyQ);\r
+ EnetQueue_initQ(&rxReadyQ);\r
+\r
+ for (memUtilsRxPkts = 0U; memUtilsRxPkts < CPSW_APPMEMUTILS_NUM_RX_PKTS; memUtilsRxPkts++)\r
{\r
- /* memutils open should happen after Cpsw is opened as it uses CpswUtils_Q\r
- * functions */\r
- status = CpswAppMemUtils_init();\r
- if(status != CPSW_SOK)\r
+ pPktInfo =\r
+ CpswAppMemUtils_allocEthPktFxn(&gEnetLpbk,\r
+ CPSW_APPMEMUTILS_LARGE_POOL_PKT_SIZE,\r
+ UDMA_CACHELINE_ALIGNMENT);\r
+ if(pPktInfo == NULL)\r
{\r
- UART_printf("cpsw memutils open function failed\n");\r
+ UART_printf("CpswAppMemUtils_allocEthPktFxn failed\n");\r
+ return -1;\r
}\r
+ ENET_UTILS_SET_PKT_APP_STATE(&pPktInfo->pktState,\r
+ ENET_PKTSTATE_APP_WITH_FREEQ);\r
+ EnetQueue_enq(&gEnetLpbk.rxFreeQ, &pPktInfo->node);\r
}\r
\r
- if(status == CPSW_SOK)\r
+ /* Retrieve any CPSW packets which are ready */\r
+ status = EnetDma_retrieveRxPktQ(gEnetLpbk.hRxCh, &rxReadyQ);\r
+ if(status != ENET_SOK)\r
{\r
- Cpsw_OpenPortLinkInArgs linkArgs0 = {\r
- .portNum = gCpswLpbkObj.portNum0,\r
- };\r
- CpswMacPort_Config *macConfig = &linkArgs0.macConfig;\r
- CpswMacPort_LinkConfig *linkConfig = &linkArgs0.linkConfig;\r
- CpswPhy_Config *phyConfig = &linkArgs0.phyConfig;\r
- CpswMacPort_Interface *interface = &linkArgs0.interface;\r
+ UART_printf("EnetDma_retrieveRxPktQ failed\n");\r
+ return -1;\r
+ }\r
+ /* There should not be any packet with DMA during init */\r
+ if(EnetQueue_getQCount(&rxReadyQ) != 0U)\r
+ {\r
+ UART_printf("EnetQueue_getQCount failed\n");\r
+ return -1;\r
+ }\r
\r
- Cpsw_initMacPortParams(macConfig);\r
+ EnetAppUtils_validatePacketState(&gEnetLpbk.rxFreeQ,\r
+ ENET_PKTSTATE_APP_WITH_FREEQ,\r
+ ENET_PKTSTATE_APP_WITH_DRIVER);\r
\r
- BoardDiag_cpswChangeHostAleEntry(&gCpswLpbkObj.hostMacAddr0[0U]);\r
+ EnetDma_submitRxPktQ(gEnetLpbk.hRxCh,\r
+ &gEnetLpbk.rxFreeQ);\r
\r
-#if defined(j7200_evm)\r
- if(testMode == BOARD_DIAG_CPSW_RGMII_TEST)\r
- {\r
- /*\r
- * J7200 EVM has only one RGMII port supported on GESI board.\r
- * Loopback test is done between GESI RGMII port and one SGMII Ethernet port.\r
- * Port0 is configured for SGMII and port1 is configured for RGMII.\r
- */\r
- CpswAppBoardUtils_setPhyConfigQsgmii(gCpswLpbkObj.cpswType,\r
- linkArgs0.portNum,\r
- macConfig,\r
- interface,\r
- phyConfig);\r
- }\r
- else\r
+ /* Assert here as during init no. of DMA descriptors should be equal to\r
+ * no. of free Ethernet buffers available with app */\r
+ if(EnetQueue_getQCount(&gEnetLpbk.rxFreeQ) != 0U)\r
+ {\r
+ UART_printf("EnetQueue_getQCount failed\n");\r
+ return -1;\r
+ }\r
+ return 0;\r
+}\r
+\r
+/**\r
+ * \brief This function is used to initialize the free packet\r
+ * info queue with the Ethernet packets to be transmitted.\r
+ *\r
+ * \param NULL\r
+ *\r
+ * \return int8_t\r
+ * 0 - in case of success\r
+ * -1 - in case of failure.\r
+ *\r
+ */\r
+static int8_t BoardDiag_enetLpbkInitTxFreePktQ(void)\r
+{\r
+ EnetDma_Pkt *pPktInfo;\r
+ uint32_t memUtilsTxPkts;\r
+\r
+ /* Initialize all queues */\r
+ EnetQueue_initQ(&gEnetLpbk.txFreePktInfoQ);\r
+\r
+ /* Initialize TX EthPkts and queue them to txFreePktInfoQ */\r
+ for (memUtilsTxPkts = 0U; memUtilsTxPkts < CPSW_APPMEMUTILS_NUM_TX_PKTS; memUtilsTxPkts++)\r
+ {\r
+ pPktInfo = \r
+ CpswAppMemUtils_allocEthPktFxn(&gEnetLpbk,\r
+ CPSW_APPMEMUTILS_LARGE_POOL_PKT_SIZE,\r
+ UDMA_CACHELINE_ALIGNMENT);\r
+ if(pPktInfo == NULL)\r
{\r
- CpswAppBoardUtils_setPhyConfig(gCpswLpbkObj.cpswType,\r
- linkArgs0.portNum,\r
- macConfig,\r
- interface,\r
- phyConfig);\r
+ UART_printf("CpswAppMemUtils_allocEthPktFxn failed\n");\r
+ return -1;\r
}\r
-#else\r
- CpswAppBoardUtils_setPhyConfig(gCpswLpbkObj.cpswType,\r
- linkArgs0.portNum,\r
- macConfig,\r
- interface,\r
- phyConfig);\r
-#endif\r
- macConfig->enableLoopback = false;\r
- linkConfig->speed = CPSW_SPEED_AUTO;\r
- linkConfig->duplexity = CPSW_DUPLEX_AUTO;\r
+ ENET_UTILS_SET_PKT_APP_STATE(&pPktInfo->pktState,\r
+ ENET_PKTSTATE_APP_WITH_FREEQ);\r
+\r
+ EnetQueue_enq(&gEnetLpbk.txFreePktInfoQ, &pPktInfo->node);\r
+ }\r
+\r
+ UART_printf("initQs() txFreePktInfoQ initialized with %d pkts\n",\r
+ EnetQueue_getQCount(&gEnetLpbk.txFreePktInfoQ));\r
+ return 0;\r
+}\r
+\r
+/**\r
+ * \brief This function is used to open the CPSW DMA module\r
+ *\r
+ * \param NULL\r
+ *\r
+ * \return int8_t\r
+ * 0 - in case of success\r
+ * -1 - in case of failure.\r
+ *\r
+ */\r
+static int8_t BoardDiag_enetLpbkOpenDma()\r
+{\r
+ int32_t status = ENET_SOK;\r
+ EnetCpdma_OpenRxChPrms rxChCfg;\r
+ EnetCpdma_OpenTxChPrms txChCfg;\r
\r
- Cpsw_OpenPortLinkInArgs linkArgs1 = {\r
- .portNum = gCpswLpbkObj.portNum1,\r
- };\r
+ /* Open the CPSW TX channel */\r
+ if (status == ENET_SOK)\r
+ {\r
+ EnetDma_initTxChParams(&txChCfg);\r
\r
- macConfig = &linkArgs1.macConfig;\r
- linkConfig = &linkArgs1.linkConfig;\r
- phyConfig = &linkArgs1.phyConfig;\r
- interface = &linkArgs1.interface;\r
+ txChCfg.cbArg = &gEnetLpbk;\r
+ txChCfg.notifyCb = BoardDiag_enetLpbkTxIsrFxn;\r
\r
- Cpsw_initMacPortParams(macConfig);\r
+ EnetAppUtils_setCommonTxChPrms(&txChCfg);\r
\r
- BoardDiag_cpswChangeHostAleEntry(&gCpswLpbkObj.hostMacAddr1[0U]);\r
+ EnetAppUtils_openTxCh(gEnetLpbk.hEnet,\r
+ gEnetLpbk.coreKey,\r
+ gEnetLpbk.coreId,\r
+ &gEnetLpbk.txChNum,\r
+ &gEnetLpbk.hTxCh,\r
+ &txChCfg);\r
\r
-#if defined(j7200_evm)\r
- if(testMode == BOARD_DIAG_CPSW_RGMII_TEST)\r
+ if(BoardDiag_enetLpbkInitTxFreePktQ() != BOARD_DIAG_SUCCESS)\r
{\r
- /*\r
- * J7200 EVM has only one RGMII port supported on GESI board.\r
- * Loopback test is done between GESI RGMII port and one SGMII Ethernet port.\r
- * Port0 is configured for SGMII and port1 is configured for RGMII.\r
- */\r
- CpswAppBoardUtils_setPhyConfigRgmii(gCpswLpbkObj.cpswType,\r
- linkArgs1.portNum,\r
- macConfig,\r
- interface,\r
- phyConfig);\r
- }\r
- else\r
- {\r
- CpswAppBoardUtils_setPhyConfig(gCpswLpbkObj.cpswType,\r
- linkArgs1.portNum,\r
- macConfig,\r
- interface,\r
- phyConfig);\r
+ UART_printf("BoardDiag_enetLpbkInitTxFreePktQ Failed\n");\r
+ return -1;\r
}\r
-#else\r
- CpswAppBoardUtils_setPhyConfig(gCpswLpbkObj.cpswType,\r
- linkArgs1.portNum,\r
- macConfig,\r
- interface,\r
- phyConfig);\r
-#endif\r
- if(status == CPSW_PHY_INVALID_PHYADDR)\r
+\r
+ if (NULL == gEnetLpbk.hTxCh)\r
{\r
- UART_printf("PHY configuration failed\n\r");\r
- return -1;\r
+ /* Free the Ch Num if open Tx Ch failed */\r
+ EnetAppUtils_freeTxCh(gEnetLpbk.hEnet,\r
+ gEnetLpbk.coreKey,\r
+ gEnetLpbk.coreId,\r
+ gEnetLpbk.txChNum);\r
+ UART_printf("EnetDma_openTxCh() failed to open: %d\n",\r
+ status);\r
}\r
+ }\r
\r
- macConfig->enableLoopback = false;\r
- linkConfig->speed = CPSW_SPEED_AUTO;\r
- linkConfig->duplexity = CPSW_DUPLEX_AUTO;\r
+ /* Open the CPSW RX Channel */\r
+ if (status == ENET_SOK)\r
+ {\r
+ EnetDma_initRxChParams(&rxChCfg);\r
+ rxChCfg.notifyCb = BoardDiag_enetLpbkRxIsrFxn;\r
+ rxChCfg.cbArg = &gEnetLpbk;\r
\r
- CPSW_IOCTL_SET_IN_ARGS(&prms, &linkArgs0);\r
+ EnetAppUtils_setCommonRxChPrms(&rxChCfg);\r
\r
- status = Cpsw_ioctl(gCpswLpbkObj.hCpsw,\r
- gCpswLpbkObj.coreId,\r
- CPSW_IOCTL_OPEN_PORT_LINK,\r
- &prms);\r
- if (status != CPSW_SOK)\r
+ EnetAppUtils_openRxCh(gEnetLpbk.hEnet,\r
+ gEnetLpbk.coreKey,\r
+ gEnetLpbk.coreId,\r
+ &gEnetLpbk.rxChNum,\r
+ &gEnetLpbk.hRxCh,\r
+ &rxChCfg);\r
+\r
+ if (NULL == gEnetLpbk.hRxCh)\r
{\r
- UART_printf("CpswApp_openCpsw() failed to open MAC port: %d\n",\r
- status);\r
+ EnetAppUtils_freeRxCh(gEnetLpbk.hEnet,\r
+ gEnetLpbk.coreKey,\r
+ gEnetLpbk.coreId,\r
+ gEnetLpbk.rxChNum);\r
+ UART_printf("EnetDma_openRxCh() failed to open: %d\n",\r
+ status);\r
+\r
+ /* TODO: should we close TxCh here */\r
}\r
-\r
- CPSW_IOCTL_SET_IN_ARGS(&prms, &linkArgs1);\r
- status = Cpsw_ioctl(gCpswLpbkObj.hCpsw,\r
- gCpswLpbkObj.coreId,\r
- CPSW_IOCTL_OPEN_PORT_LINK,\r
- &prms);\r
- if(status != CPSW_SOK)\r
+ else\r
{\r
- UART_printf("CpswApp_openCpsw() failed to open MAC port: %d\n",\r
- status);\r
+ status = EnetAppUtils_allocMac(gEnetLpbk.hEnet,\r
+ gEnetLpbk.coreKey,\r
+ gEnetLpbk.coreId,\r
+ gEnetLpbk.hostMacAddr);\r
+ UART_printf("Host MAC address: ");\r
+ BoardDiag_printMacAddr(gEnetLpbk.hostMacAddr);\r
+ /* Submit all ready RX buffers to DMA.*/\r
+ if(BoardDiag_enetLpbkInitRxReadyPktQ() != BOARD_DIAG_SUCCESS)\r
+ {\r
+ UART_printf("BoardDiag_enetLpbkInitRxReadyPktQ failed\n");\r
+ return -1;\r
+ }\r
}\r
+ }\r
+ if(status != ENET_SOK)\r
+ {\r
+ return -1;\r
+ }\r
+ return 0;\r
+}\r
\r
+/**\r
+ * \brief This function is used set MII mode.\r
+ *\r
+ * \param emac_mode macMode mac mode\r
+ * EnetPhy_Mii *mii MII mode\r
+ *\r
+ * \return int8_t\r
+ * 0 - in case of success\r
+ * -1 - in case of failure.\r
+ *\r
+ */\r
+static int8_t BoardDiag_enetLpbkMacMode2PhyMii(emac_mode macMode,\r
+ EnetPhy_Mii *mii)\r
+{\r
+ switch (macMode)\r
+ {\r
+ case RMII:\r
+ *mii = ENETPHY_MAC_MII_RMII;\r
+ break;\r
+ case RGMII:\r
+ *mii = ENETPHY_MAC_MII_RGMII;\r
+ break;\r
+ default:\r
+ UART_printf("Invalid MAC mode: %u\n", macMode);\r
+ return -1;\r
}\r
+ return 0;\r
+}\r
\r
- return status;\r
+\r
+/**\r
+ * \brief This function is used set layerType,sublayerType and variantType.\r
+ *\r
+ * \param emac_mode macMode mac mode\r
+ * EnetMacPort_Interface *mii MII mode\r
+ *\r
+ * \return int8_t\r
+ * 0 - in case of success\r
+ * -1 - in case of failure.\r
+ *\r
+ */\r
+static int8_t BoardDiag_enetLpbkMacMode2MacMii(emac_mode macMode,\r
+ EnetMacPort_Interface *mii)\r
+{\r
+ switch (macMode)\r
+ {\r
+ case RMII:\r
+ mii->layerType = ENET_MAC_LAYER_MII;\r
+ mii->sublayerType = ENET_MAC_SUBLAYER_REDUCED;\r
+ mii->variantType = ENET_MAC_VARIANT_NONE;\r
+ break;\r
+ case RGMII:\r
+ mii->layerType = ENET_MAC_LAYER_GMII;\r
+ mii->sublayerType = ENET_MAC_SUBLAYER_REDUCED;\r
+ mii->variantType = ENET_MAC_VARIANT_FORCED;\r
+ break;\r
+ default:\r
+ UART_printf("Invalid MAC mode: %u\n", macMode);\r
+ return -1;\r
+ }\r
+ return 0;\r
}\r
\r
-void BoardDiag_enetPhyEnable(void)\r
+/**\r
+ * \brief This function is used init cpsw configurations.\r
+ *\r
+ * \param Cpsw_Cfg *cpswCfg cpsw configurations\r
+ *\r
+ * \return NULL\r
+ *\r
+ */\r
+static void BoardDiag_enetLpbkInitCpswCfg(Cpsw_Cfg *cpswCfg)\r
{\r
- Board_I2cInitCfg_t i2cCfg;\r
-\r
- i2cCfg.i2cInst = BOARD_I2C_IOEXP_DEVICE2_INSTANCE;\r
- i2cCfg.socDomain = BOARD_SOC_DOMAIN_MAIN;\r
- i2cCfg.enableIntr = false;\r
- Board_setI2cInitConfig(&i2cCfg);\r
-\r
- Board_i2cIoExpInit();\r
-\r
-\r
- Board_i2cIoExpSetPinDirection(BOARD_I2C_IOEXP_DEVICE2_ADDR,\r
- THREE_PORT_IOEXP,\r
- PORTNUM_2,\r
- PIN_NUM_0,\r
- PIN_DIRECTION_OUTPUT);\r
-\r
- Board_i2cIoExpPinLevelSet(BOARD_I2C_IOEXP_DEVICE2_ADDR,\r
- THREE_PORT_IOEXP,\r
- PORTNUM_2,\r
- PIN_NUM_0,\r
- GPIO_SIGNAL_LEVEL_LOW);\r
-\r
- Board_i2cIoExpSetPinDirection(BOARD_I2C_IOEXP_DEVICE2_ADDR,\r
- THREE_PORT_IOEXP,\r
- PORTNUM_2,\r
- PIN_NUM_1,\r
- PIN_DIRECTION_OUTPUT);\r
-\r
- Board_i2cIoExpPinLevelSet(BOARD_I2C_IOEXP_DEVICE2_ADDR,\r
- THREE_PORT_IOEXP,\r
- PORTNUM_2,\r
- PIN_NUM_1,\r
- GPIO_SIGNAL_LEVEL_HIGH);\r
+ CpswHostPort_Cfg *hostPortCfg = &cpswCfg->hostPortCfg;\r
+ CpswAle_Cfg *aleCfg = &cpswCfg->aleCfg;\r
+ CpswCpts_Cfg *cptsCfg = &cpswCfg->cptsCfg;\r
+\r
+ /* Set initial config */\r
+ Enet_initCfg(gEnetLpbk.enetType, gEnetLpbk.instId, cpswCfg,\r
+ sizeof(*cpswCfg));\r
+\r
+ /* Peripheral config */\r
+ cpswCfg->vlanCfg.vlanAware = false;\r
+\r
+ /* Host port config */\r
+ hostPortCfg->removeCrc = true;\r
+ hostPortCfg->padShortPacket = true;\r
+ hostPortCfg->passCrcErrors = true;\r
+\r
+ /* ALE config */\r
+ aleCfg->modeFlags = CPSW_ALE_CFG_MODULE_EN;\r
+ aleCfg->agingCfg.enableAutoAging = true;\r
+ aleCfg->agingCfg.agingPeriodInMs = 1000;\r
+ aleCfg->nwSecCfg.enableVid0Mode = true;\r
+ aleCfg->vlanCfg.aleVlanAwareMode = false;\r
+ aleCfg->vlanCfg.cpswVlanAwareMode = false;\r
+ aleCfg->vlanCfg.unknownUnregMcastFloodMask = CPSW_ALE_ALL_PORTS_MASK;\r
+ aleCfg->vlanCfg.unknownRegMcastFloodMask = CPSW_ALE_ALL_PORTS_MASK;\r
+ aleCfg->vlanCfg.unknownVlanMemberListMask = CPSW_ALE_ALL_PORTS_MASK;\r
+\r
+ /* CPTS config */\r
+ /* Note: Timestamping and MAC loopback are not supported together because\r
+ * of IP limitation, so disabling timestamping for this application */\r
+ cptsCfg->hostRxTsEn = false;\r
+\r
+ EnetAppUtils_initResourceConfig(gEnetLpbk.enetType, gEnetLpbk.coreId,\r
+ &cpswCfg->resCfg);\r
}\r
\r
/**\r
- * \brief This function is used to perform the CPSW\r
- * Ethernet port to port external loopback test\r
+ * \brief This function is used to open the ENET driver\r
*\r
- * \param testMode [IN/OUT] Pointer to virtual address\r
+ * \param NULL\r
*\r
- * \return int32_t\r
+ * \return int8_t\r
* 0 - in case of success\r
* -1 - in case of failure.\r
*\r
*/\r
-int32_t BoardDiag_cpswLoopbackTest(uint32_t testMode)\r
+static int8_t BoardDiag_enetLpbkOpenEnet(void)\r
{\r
- int32_t status;\r
- bool alive;\r
- uint8_t index;\r
+ Cpsw_Cfg cpswCfg;\r
\r
- Cpsw_IoctlPrms prms;\r
- CpswAle_SetPortStateInArgs setPortStateInArgs;\r
+ Enet_IoctlPrms prms;\r
+ EnetPer_PortLinkCfg portLinkCfg;\r
+ CpswMacPort_Cfg macCfg;\r
+ int32_t status = ENET_SOK;\r
\r
- CpswAppBoardUtils_initEthFw();\r
- CpswAppUtils_enableClocks(gCpswLpbkObj.cpswType);\r
+ /* Initialize peripheral config */\r
+ BoardDiag_enetLpbkInitCpswCfg(&cpswCfg);\r
\r
- gCpswLpbkObj.coreId = CpswAppSoc_getCoreId();\r
+ UART_printf("CPSW_2G Test on MCU NAVSS\n");\r
+ \r
+ /* Set Enet global runtime log level */\r
+ Enet_setTraceLevel(ENET_TRACE_DEBUG);\r
\r
- /* Open the CPSW */\r
- status = BoardDiag_cpswOpen(testMode);\r
- if (status != CPSW_SOK)\r
+ /* Open the Enet driver */\r
+ gEnetLpbk.hEnet = Enet_open(gEnetLpbk.enetType, gEnetLpbk.instId, &cpswCfg,\r
+ sizeof(cpswCfg));\r
+\r
+ if (gEnetLpbk.hEnet == NULL)\r
{\r
- UART_printf("Failed to open CPSW: %d\n", status);\r
+ UART_printf("Failed to open Enet driver\n");\r
+ return -1;\r
}\r
\r
- /* Open CPSW DMA driver */\r
- if (status == CPSW_SOK)\r
+ /* Setup port link open parameters */\r
+ if (status == ENET_SOK)\r
{\r
- status = BoardDiag_cpswOpenDma();\r
- if (status != CPSW_SOK)\r
+ EnetBoard_EthPort ethPort;\r
+ EnetMacPort_LinkCfg *linkCfg = &portLinkCfg.linkCfg;\r
+ EnetMacPort_Interface *mii = &portLinkCfg.mii;\r
+ EnetPhy_Cfg *phyCfg = &portLinkCfg.phyCfg;\r
+ EnetPhy_Mii phyMii;\r
+\r
+ /* Setup board for requested Ethernet port */\r
+ ethPort.enetType = gEnetLpbk.enetType;\r
+ ethPort.instId = gEnetLpbk.instId;\r
+ ethPort.macPort = gEnetLpbk.macPort;\r
+ ethPort.boardId = gEnetLpbk.boardId;\r
+ if(BoardDiag_enetLpbkMacMode2MacMii(gEnetLpbk.macMode, ðPort.mii) != \r
+ BOARD_DIAG_SUCCESS)\r
{\r
- UART_printf("Failed to open CPSW DMA: %d\n", status);\r
+ UART_printf("BoardDiag_enetLpbkMacMode2MacMii failed\n");\r
+ return -1;\r
}\r
- }\r
\r
- /* Enable host port */\r
- if (status == CPSW_SOK)\r
- {\r
- setPortStateInArgs.portNum = CPSW_ALE_HOST_PORT_NUM;\r
- setPortStateInArgs.portState = CPSW_ALE_PORTSTATE_FORWARD;\r
-\r
- CPSW_IOCTL_SET_IN_ARGS(&prms, &setPortStateInArgs);\r
- prms.outArgs = NULL;\r
-\r
- status = Cpsw_ioctl(gCpswLpbkObj.hCpsw,\r
- gCpswLpbkObj.coreId,\r
- CPSW_ALE_IOCTL_SET_PORT_STATE,\r
- &prms);\r
- if (status != CPSW_SOK)\r
+ status = EnetBoard_setupPorts(ðPort, 1U);\r
+ if(status != ENET_SOK)\r
{\r
- UART_printf("CpswApp_openCpsw() failed CPSW_ALE_IOCTL_SET_PORT_STATE: %d\n", status);\r
+ UART_printf("EnetBoard_setupPorts failed\n");\r
+ return -1;\r
}\r
\r
- if (status == CPSW_SOK)\r
+ /* Set port link params */\r
+ portLinkCfg.macPort = gEnetLpbk.macPort;\r
+ portLinkCfg.macCfg = &macCfg;\r
+\r
+ CpswMacPort_initCfg(&macCfg);\r
+\r
+ if(BoardDiag_enetLpbkMacMode2MacMii(gEnetLpbk.macMode, mii) \r
+ != BOARD_DIAG_SUCCESS)\r
{\r
- status = Cpsw_ioctl(gCpswLpbkObj.hCpsw,\r
- gCpswLpbkObj.coreId,\r
- CPSW_HOSTPORT_IOCTL_ENABLE,\r
- NULL);\r
- if (status != CPSW_SOK)\r
- {\r
- UART_printf("Failed to enable host port: %d\n", status);\r
- }\r
+ UART_printf("BoardDiag_enetLpbkMacMode2MacMii failed\n");\r
+ return -1;\r
}\r
- }\r
\r
- /* Show alive PHYs */\r
- if (status == CPSW_SOK)\r
- {\r
- for (index = BOARD_DIAG_CPSW_PHY_START_ADDRESS; index < BOARD_DIAG_CPSW_PHY_END_ADDRESS; index++)\r
+ if (gEnetLpbk.testPhyLoopback)\r
{\r
- CPSW_IOCTL_SET_INOUT_ARGS(&prms, &index, &alive);\r
+ const EnetBoard_PhyCfg *boardPhyCfg = NULL;\r
+\r
+ /* Set PHY configuration params */\r
+ EnetPhy_initCfg(phyCfg);\r
\r
- status = Cpsw_ioctl(gCpswLpbkObj.hCpsw,\r
- gCpswLpbkObj.coreId,\r
- CPSW_MDIO_IOCTL_GET_ALIVE_STATUS,\r
- &prms);\r
- if (status == CPSW_SOK)\r
+ if (BoardDiag_enetLpbkMacMode2PhyMii(gEnetLpbk.macMode, &phyMii) \r
+ == BOARD_DIAG_SUCCESS)\r
{\r
- if (alive == true)\r
+ boardPhyCfg = EnetBoard_getPhyCfg(ðPort);\r
+ if (boardPhyCfg != NULL)\r
{\r
- UART_printf("PHY %d is alive\n", index);\r
+ phyCfg->phyAddr = boardPhyCfg->phyAddr;\r
+ phyCfg->isStrapped = boardPhyCfg->isStrapped;\r
+ phyCfg->skipExtendedCfg = boardPhyCfg->skipExtendedCfg;\r
+ phyCfg->extendedCfgSize = boardPhyCfg->extendedCfgSize;\r
+ memcpy(phyCfg->extendedCfg, boardPhyCfg->extendedCfg,\r
+ phyCfg->extendedCfgSize);\r
}\r
+ else\r
+ {\r
+ UART_printf("PHY info not found\n");\r
+ return -1;\r
+ }\r
+\r
+ if ((phyMii == ENETPHY_MAC_MII_MII) ||\r
+ (phyMii == ENETPHY_MAC_MII_RMII))\r
+ {\r
+ linkCfg->speed = ENET_SPEED_100MBIT;\r
+ }\r
+ else\r
+ {\r
+ /* TODO: TPR12 always 100 Mbits */\r
+ linkCfg->speed = ENET_SPEED_100MBIT;\r
+ }\r
+\r
+ linkCfg->duplexity = ENET_DUPLEX_FULL;\r
}\r
else\r
{\r
- UART_printf("Failed to get PHY %d alive status: %d\n", index,\r
- status);\r
+ UART_printf("BoardDiag_enetLpbkMacMode2PhyMii failed\n");\r
+ return -1;\r
}\r
}\r
- }\r
+ else\r
+ {\r
+ phyCfg->phyAddr = ENETPHY_INVALID_PHYADDR;\r
\r
- UART_printf("Waiting for link to up for portNum-%d and portNum-%d...\n\r",\r
- gCpswLpbkObj.portNum0,\r
- gCpswLpbkObj.portNum1);\r
+ if (mii->layerType == ENET_MAC_LAYER_MII)\r
+ {\r
+ linkCfg->speed = ENET_SPEED_100MBIT;\r
+ }\r
+ else\r
+ {\r
+ linkCfg->speed = ENET_SPEED_1GBIT;\r
+ }\r
\r
- if (status == CPSW_SOK)\r
- {\r
+ linkCfg->duplexity = ENET_DUPLEX_FULL;\r
\r
- while (!CpswAppUtils_isPortLinkUp(gCpswLpbkObj.hCpsw,\r
- gCpswLpbkObj.coreId,\r
- gCpswLpbkObj.portNum0))\r
- {\r
- BoardDiag_cpswWait(1000);\r
- /* Cpsw_periodicTick should be called from non-ISR context.\r
- * Calling Cpsw_periodicTick at regular intervals for port link detect before\r
- * starting packet RX/TX */\r
- Cpsw_periodicTick(gCpswLpbkObj.hCpsw);\r
}\r
\r
- while (!CpswAppUtils_isPortLinkUp(gCpswLpbkObj.hCpsw,\r
- gCpswLpbkObj.coreId,\r
- gCpswLpbkObj.portNum1))\r
- {\r
- BoardDiag_cpswWait(1000);\r
- /* Cpsw_periodicTick should be called from non-ISR context.\r
- * Calling Cpsw_periodicTick at regular intervals for port link detect before\r
- * starting packet RX/TX */\r
- Cpsw_periodicTick(gCpswLpbkObj.hCpsw);\r
- }\r
+ /* MAC and PHY loopbacks are mutually exclusive */\r
+ phyCfg->enableLoopback = gEnetLpbk.testPhyLoopback &&\r
+ !gEnetLpbk.testExtLoopback;\r
\r
- UART_printf("Link up for portNum-%d and portNum-%d\n\r",\r
- gCpswLpbkObj.portNum0,\r
- gCpswLpbkObj.portNum1);\r
+ macCfg.loopbackEn = !gEnetLpbk.testPhyLoopback;\r
+ }\r
+\r
+ /* Open port link */\r
+ if (status == ENET_SOK)\r
+ {\r
+ ENET_IOCTL_SET_IN_ARGS(&prms, &portLinkCfg);\r
\r
- BoardDiag_cpswWait(20000);\r
- UART_printf("Started with the packet rx tx test\n\r");\r
- status = BoardDiag_cpswPktRxTx();\r
- if (status != CPSW_SOK)\r
+ status = Enet_ioctl(gEnetLpbk.hEnet, gEnetLpbk.coreId,\r
+ ENET_PER_IOCTL_OPEN_PORT_LINK, &prms);\r
+ if (status != ENET_SOK)\r
{\r
- UART_printf("Failed to enable host port: %d\n", status);\r
+ UART_printf("Failed to open port link: %d\n", status);\r
return -1;\r
}\r
}\r
\r
- /* Print CPSW statistics of all ports */\r
- BoardDiag_cpswShowStats();\r
-\r
- /* Disable host port */\r
- status = Cpsw_ioctl(gCpswLpbkObj.hCpsw,\r
- gCpswLpbkObj.coreId,\r
- CPSW_HOSTPORT_IOCTL_DISABLE,\r
- NULL);\r
- if (status != CPSW_SOK)\r
- {\r
- UART_printf("Failed to disable host port: %d\n", status);\r
- return -1;\r
- }\r
-\r
- /* Close CPSW DMA driver */\r
- BoardDiag_cpswCloseDma();\r
- /* Close CPSW */\r
- BoardDiag_cpswClose();\r
- /* Close UDMA driver */\r
- CpswAppUtils_udmaclose(gCpswLpbkObj.hUdmaDrv);\r
+ return 0;\r
+}\r
\r
- CpswAppUtils_disableClocks(gCpswLpbkObj.cpswType);\r
- CpswAppBoardUtils_deInit();\r
+/**\r
+ * \brief This function is used to initialiaze the enet\r
+ parameters(gEnetLpbk) Ethernet external loopback test.\r
+ *\r
+ * \param NULL\r
+ *\r
+ * \return NULL\r
+ *\r
+ */\r
+static void BoardDiag_enetIniParams()\r
+{\r
+ /* Initialize loopback test config */\r
+ memset(&gEnetLpbk, 0, sizeof(gEnetLpbk));\r
+ \r
+ gEnetLpbk.enetType = ENET_CPSW_9G;\r
+ gEnetLpbk.instId = 0U;\r
+ gEnetLpbk.testPhyLoopback = true;\r
+ gEnetLpbk.testExtLoopback = true;\r
+ gEnetLpbk.macPort = ENET_MAC_PORT_1;\r
+ gEnetLpbk.macMode = RGMII;\r
+ gEnetLpbk.enetType = ENET_CPSW_2G;\r
+ gEnetLpbk.boardId = ENETBOARD_CPB_ID;\r
\r
- return 0;\r
}\r
\r
-#if defined (j721e_evm)\r
-void BoardDiag_rgmiiPortSelect(void)\r
+/**\r
+ * \brief This function is used to perform the CPSW\r
+ * Ethernet external loopback test\r
+ *\r
+ * \param NULL\r
+ *\r
+ * \return int8_t\r
+ * 0 - in case of success\r
+ * -1 - in case of failure.\r
+ *\r
+ */\r
+static int8_t BoardDiag_cpswLoopbackTest()\r
{\r
- uint32_t userInput = 0;\r
+ EnetOsal_Cfg osalCfg;\r
+ EnetUtils_Cfg utilsCfg;\r
+ Enet_IoctlPrms prms;\r
+ int32_t status;\r
+\r
+ /* Initialize the phy configurations */\r
+ EnetBoard_init();\r
\r
- UART_printf("Select any one option from below\n\r");\r
- UART_printf("1 - PRG0 Port Loopback Test\n\r");\r
- UART_printf("2 - PRG1 Port Loopback Test\n\r");\r
+ /* Initialize the enet parameters */\r
+ BoardDiag_enetIniParams();\r
\r
- UART_scanFmt("%d", (uint8_t*)&userInput);\r
+ EnetAppUtils_enableClocks(gEnetLpbk.enetType);\r
+\r
+ /* Local core id */\r
+ gEnetLpbk.coreId = EnetSoc_getCoreId();\r
+\r
+ /* Initialize Enet driver (use default OSAL and utils) */\r
+ Enet_initOsalCfg(&osalCfg);\r
+ Enet_initUtilsCfg(&utilsCfg);\r
+ utilsCfg.print = EnetAppUtils_print;\r
+ Enet_init(&osalCfg, &utilsCfg);\r
+\r
+ /* Open Enet driver */\r
+ status = BoardDiag_enetLpbkOpenEnet();\r
+ if (status != 0)\r
+ {\r
+ UART_printf("Failed to open Enet driver: %d\n", status);\r
+ return -1;\r
+ }\r
\r
- while((userInput != BOARD_DIAG_CPSW_RGMII_PRG0_TEST) &&\r
- (userInput != BOARD_DIAG_CPSW_RGMII_PRG1_TEST))\r
+ if (status == ENET_SOK)\r
{\r
- UART_printf("Invalid userInput, Please try again\n\r");\r
- UART_scanFmt("%d", &userInput);\r
+ /* Attach the core with RM */\r
+ uint32_t coreId;\r
+ EnetPer_AttachCoreOutArgs attachCoreOutArgs;\r
+ coreId = gEnetLpbk.coreId;\r
+\r
+ ENET_IOCTL_SET_INOUT_ARGS(&prms, &coreId, &attachCoreOutArgs);\r
+ status = Enet_ioctl(gEnetLpbk.hEnet, gEnetLpbk.coreId,\r
+ ENET_PER_IOCTL_ATTACH_CORE, &prms);\r
+ if (status != ENET_SOK)\r
+ {\r
+ UART_printf("EnetLpbk_loopbackTest failed"\r
+ "ENET_PER_IOCTL_ATTACH_CORE: %d\n", status);\r
+ return -1;\r
+ }\r
+ else\r
+ {\r
+ gEnetLpbk.coreKey = attachCoreOutArgs.coreKey;\r
+ }\r
}\r
\r
- if(userInput == BOARD_DIAG_CPSW_RGMII_PRG0_TEST)\r
+ if (status == ENET_SOK)\r
{\r
- gCpswLpbkObj.portNum0 = CPSW_MAC_PORT_2;\r
- gCpswLpbkObj.portNum1 = CPSW_MAC_PORT_3;\r
+ /* memutils open should happen after Cpsw is opened as it uses \r
+ * CpswUtils_Q functions */\r
+ status = CpswAppMemUtils_init();\r
+ if (status != ENET_SOK)\r
+ {\r
+ UART_printf("CpswAppMemUtils_init failed: "\r
+ "%d\n", status);\r
+ return -1;\r
+ }\r
}\r
- else\r
+\r
+ /* Open DMA driver */\r
+ if (status == ENET_SOK)\r
{\r
- gCpswLpbkObj.portNum0 = CPSW_MAC_PORT_0;\r
- gCpswLpbkObj.portNum1 = CPSW_MAC_PORT_7;\r
+ status = BoardDiag_enetLpbkOpenDma();\r
+ if (status != ENET_SOK)\r
+ {\r
+ UART_printf("Failed to open DMA: %d\n", status);\r
+ return -1;\r
+ }\r
}\r
-}\r
-#else\r
-void BoardDiag_rgmiiPortSelect(void)\r
-{\r
- gCpswLpbkObj.portNum0 = CPSW_MAC_PORT_0;\r
- gCpswLpbkObj.portNum1 = CPSW_MAC_PORT_1;\r
\r
- Board_serdesCfgQsgmii();\r
- BoardDiag_enetPhyEnable();\r
-}\r
-#endif\r
+ /* Enable host port */\r
+ if (status == ENET_SOK)\r
+ {\r
+ if (Enet_isCpswFamily(gEnetLpbk.enetType))\r
+ {\r
+ status = BoardDiag_enetLpbkSetupCpswAle();\r
+ if (status != ENET_SOK)\r
+ {\r
+ UART_printf("Failed to setup CPSW ALE: %d\n", status);\r
+ return -1;\r
+ }\r
+ }\r
\r
-void BoardDiag_sgmiiPortSelect(void)\r
-{\r
- uint32_t userInput = 0;\r
+ if (status == ENET_SOK)\r
+ {\r
+ ENET_IOCTL_SET_NO_ARGS(&prms);\r
+ status = Enet_ioctl(gEnetLpbk.hEnet, gEnetLpbk.coreId,\r
+ ENET_HOSTPORT_IOCTL_ENABLE, &prms);\r
+ if (status != ENET_SOK)\r
+ {\r
+ UART_printf("Failed to enable host port: %d\n", status);\r
+ return -1;\r
+ }\r
+ }\r
+ }\r
\r
- UART_printf("Select any one option from below\n\r");\r
- UART_printf("1 - Port0 & Port1 Loopback Test\n\r");\r
- UART_printf("2 - Port2 & Port3 Loopback Test\n\r");\r
+ /* Show alive PHYs */\r
+ if (status == ENET_SOK)\r
+ {\r
+ status = BoardDiag_enetLpbkShowAlivePhys();\r
+ }\r
+\r
+ /* Wait for link up */\r
+ if ((status == ENET_SOK) && gEnetLpbk.testPhyLoopback)\r
+ {\r
+ status = BoardDiag_enetLpbkWaitForLinkUp();\r
+ }\r
\r
- UART_scanFmt("%d", (uint8_t*)&userInput);\r
+ /* Do packet transmission and reception */\r
+ if (status == ENET_SOK)\r
+ {\r
+ status = BoardDiag_cpswPktRxTx();\r
+ }\r
\r
- while((userInput != BOARD_DIAG_CPSW_SGMII_P0P1_TEST) &&\r
- (userInput != BOARD_DIAG_CPSW_SGMII_P2P3_TEST))\r
+ /* Print network statistics */\r
+ if (status == ENET_SOK)\r
{\r
- UART_printf("Invalid userInput, Please try again\n\r");\r
- UART_scanFmt("%d", &userInput);\r
+ if (Enet_isCpswFamily(gEnetLpbk.enetType))\r
+ {\r
+ BoardDiag_enetLpbkShowCpswStats();\r
+ }\r
}\r
\r
-#if defined (j721e_evm)\r
- if(userInput == BOARD_DIAG_CPSW_SGMII_P0P1_TEST)\r
+ /* Disable host port */\r
+ if (status == ENET_SOK)\r
{\r
- gCpswLpbkObj.portNum0 = CPSW_MAC_PORT_1;\r
- gCpswLpbkObj.portNum1 = CPSW_MAC_PORT_4;\r
+ ENET_IOCTL_SET_NO_ARGS(&prms);\r
+ status = Enet_ioctl(gEnetLpbk.hEnet, gEnetLpbk.coreId,\r
+ ENET_HOSTPORT_IOCTL_DISABLE, &prms);\r
+ if (status != ENET_SOK)\r
+ {\r
+ UART_printf("Failed to disable host port: %d\n", status);\r
+ return -1;\r
+ }\r
}\r
- else\r
+\r
+ /* Print DMA statistics */\r
+ if (status == ENET_SOK)\r
{\r
- gCpswLpbkObj.portNum0 = CPSW_MAC_PORT_5;\r
- gCpswLpbkObj.portNum1 = CPSW_MAC_PORT_6;\r
+ EnetAppUtils_showRxChStats(gEnetLpbk.hRxCh);\r
+ EnetAppUtils_showTxChStats(gEnetLpbk.hTxCh);\r
}\r
-#else\r
- if(userInput == BOARD_DIAG_CPSW_SGMII_P0P1_TEST)\r
+\r
+ /* Close Enet DMA driver */\r
+ BoardDiag_enetLpbkCloseDma();\r
+\r
+ /* Close Enet driver */\r
+ BoardDiag_enetLpbkCloseEnet();\r
+\r
+ /* Disable peripheral clocks */\r
+ EnetAppUtils_disableClocks(gEnetLpbk.enetType);\r
+\r
+ /* Deinit Enet driver */\r
+ Enet_deinit();\r
+ UART_printf("Deinitializing of Enet driver done\n");\r
+\r
+ if(status == ENET_SOK)\r
{\r
- gCpswLpbkObj.portNum0 = CPSW_MAC_PORT_0;\r
- gCpswLpbkObj.portNum1 = CPSW_MAC_PORT_1;\r
+ UART_printf("Test Passed\n");\r
}\r
else\r
{\r
- gCpswLpbkObj.portNum0 = CPSW_MAC_PORT_2;\r
- gCpswLpbkObj.portNum1 = CPSW_MAC_PORT_3;\r
+ UART_printf("Test Failed\n");\r
+ return -1;\r
}\r
-#endif\r
\r
- Board_serdesCfgQsgmii();\r
- BoardDiag_enetPhyEnable();\r
+ return 0;\r
}\r
\r
/**\r
* -1 - in case of failure.\r
*\r
*/\r
-int8_t BoardDiag_CpswEthRunTest(void)\r
+int8_t BoardDiag_cpswEthRunTest(void)\r
{\r
int8_t ret;\r
- uint32_t userInput = 0;\r
-\r
- UART_printf ("************************************************\n");\r
- UART_printf ("* CPSW Ethernet Test *\n");\r
- UART_printf ("************************************************\n");\r
\r
- UART_printf("Select any one option from below\n\r");\r
-#if defined (j721e_evm)\r
- UART_printf("1 - CPSW9G RGMII Ethernet Test\n\r");\r
- UART_printf("2 - CPSW9G SGMII Ethernet Test\n\r");\r
-#else\r
- UART_printf("1 - CPSW5G RGMII Ethernet Test\n\r");\r
- UART_printf("2 - CPSW5G SGMII Ethernet Test\n\r");\r
-#endif\r
- UART_scanFmt("%d", (uint8_t*)&userInput);\r
-\r
- if(userInput == BOARD_DIAG_CPSW_RGMII_TEST)\r
- {\r
- BoardDiag_rgmiiPortSelect();\r
- }\r
- else\r
- {\r
- BoardDiag_sgmiiPortSelect();\r
- }\r
+ UART_printf("\n*********************************************\n");\r
+ UART_printf ("* ENET Ethernet Test *\n");\r
+ UART_printf ("*********************************************\n");\r
\r
/* Run the loopback test */\r
- ret = BoardDiag_cpswLoopbackTest(userInput);\r
+ ret = BoardDiag_cpswLoopbackTest();\r
\r
return ret;\r
}\r
* -1 - in case of failure\r
*\r
*/\r
+#ifndef SPI_BOOT_FRAMEWORK\r
int main(void)\r
{\r
Board_initCfg boardCfg;\r
Board_STATUS status;\r
int8_t ret = 0;\r
\r
- Board_PinmuxConfig_t gesiIcssgPinmux;\r
-\r
- Board_pinmuxGetCfg(&gesiIcssgPinmux);\r
- gesiIcssgPinmux.autoCfg = BOARD_PINMUX_CUSTOM;\r
- gesiIcssgPinmux.gesiExp = BOARD_PINMUX_GESI_CPSW;\r
- Board_pinmuxSetCfg(&gesiIcssgPinmux);\r
-\r
#ifdef PDK_RAW_BOOT\r
boardCfg = BOARD_INIT_MODULE_CLOCK |\r
BOARD_INIT_PINMUX_CONFIG |\r
BOARD_INIT_UART_STDIO;\r
#else\r
- boardCfg = BOARD_INIT_PINMUX_CONFIG |\r
- BOARD_INIT_UART_STDIO;\r
-#endif\r
-\r
-#if defined (j721e_evm)\r
- boardCfg |= BOARD_INIT_ENETCTRL_CPSW9G |\r
- BOARD_INIT_CPSW9G_ETH_PHY;\r
-#else\r
- boardCfg |= BOARD_INIT_ENETCTRL_CPSW5G |\r
- BOARD_INIT_CPSW5G_ETH_PHY;\r
+ boardCfg = BOARD_INIT_UART_STDIO | BOARD_INIT_PINMUX_CONFIG;\r
#endif\r
\r
status = Board_init(boardCfg);\r
return -1;\r
}\r
\r
- /* Enable CPSW RGMII MDIO mux */\r
- status = Board_control(BOARD_CTRL_CMD_SET_GESI_CPSW_MDIO_MUX,\r
- NULL);\r
- if(status != BOARD_SOK)\r
- {\r
- return -1;\r
- }\r
-\r
- ret = BoardDiag_CpswEthRunTest();\r
+ ret = BoardDiag_cpswEthRunTest();\r
if(ret == 0)\r
{\r
UART_printf("CPSW Loopback Test Passed\n\r");\r
return ret;\r
\r
}\r
+#endif\r
+\r