diff --git a/packages/ti/diag/sdr/test/sdtf-test/src/sdtf_test.c b/packages/ti/diag/sdr/test/sdtf-test/src/sdtf_test.c
SDTF_printf("\n Starting: ESM test");
SDTF_profileBegin(SDTF_PROFILE_ONESHOT);
/* Run one shot self test of ESM */
- result = SDR_ESM_selfTest(1000);
+ result = SDR_ESM_selfTest(SDR_ESM_INSTANCE_MCU, 1000);
SDTF_profileEnd(SDTF_PROFILE_ONESHOT);
if (result != SDR_PASS ) {
SDTF_printf("\n ESM self test failed");
/* Set the flag to trigger periodic tests */
SDTF_periodTaskTrigger = SDTF_PERIODIC_TASK_TRIGGER_ENABLE;
+
+ /* Feed watchdog timer */
+ SDTF_WDT_feedWatchdogTimer();
}
/*********************************************************************
* @fn SDTF_runPeriodicTests
SDTF_profileBegin(SDTF_PROFILE_PERIODIC);
/* -------------- Periodic Test start ------------------------- */
- {
- /* Run test for ECC */
- SDR_ECC_InjectErrorConfig_t injectErrorConfig;
+
+ /* Run test for ECC */
+ SDR_ECC_InjectErrorConfig_t injectErrorConfig;
/* Note the address is relative to start of ram */
- injectErrorConfig.pErrMem = (uint32_t *)(0x00);
+ injectErrorConfig.pErrMem = (uint32_t *)(0x00);
- /* Run one shot test for ATCM 1 bit error */
- injectErrorConfig.flipBitMask = 0x10;
- result = SDR_ECC_selfTest(SDR_ECC_MEMTYPE_MCU_R5F0_CORE,
- SDR_ECC_R5F_MEM_SUBTYPE_ATCM0_BANK0_VECTOR_ID,
- SDR_INJECT_ECC_ERROR_FORCING_1BIT_ONCE,
- &injectErrorConfig,
- 100000);
+ /* Run one shot test for ATCM 1 bit error */
+ injectErrorConfig.flipBitMask = 0x10;
+ result = SDR_ECC_selfTest(SDR_ECC_MEMTYPE_MCU_R5F0_CORE,
+ SDR_ECC_R5F_MEM_SUBTYPE_ATCM0_BANK0_VECTOR_ID,
+ SDR_INJECT_ECC_ERROR_FORCING_1BIT_ONCE,
+ &injectErrorConfig,
+ 100000);
- if (result != SDR_PASS ) {
- SDTF_printf("\n ATCM Single bit error at pErrMem 0x%p test failed",
- injectErrorConfig.pErrMem);
- return -1;
- }
+ if (result != SDR_PASS ) {
+ SDTF_printf("\n ATCM Single bit error at pErrMem 0x%p test failed",
+ injectErrorConfig.pErrMem);
+ return -1;
}
- {
- /* Run esm test 1*/
- result = SDR_ESM_selfTest(1000);
- if (result != SDR_PASS ) {
- SDTF_printf("\n ESM self test 1 failed");
- return -1;
- }
+
+ /* Run esm test 1*/
+ result = SDR_ESM_selfTest(SDR_ESM_INSTANCE_MCU,1000);
+ if (result != SDR_PASS ) {
+ SDTF_printf("\n ESM self test 1 failed");
+ return -1;
}
/* -------------- Periodic Tests end ------------------------- */
*/
#define SDTF_MAX_SPECIAL_COMMANDS (5u)
-#ifdef SOC_J721E
+#ifdef SOC_AM65XX
/* Number of commands run by the "run_all" command
* Note: This should match number of entries in the tables below
*/
-#define SDTF_NUM_RUNALL_TEST_COMMANDS (31u)
+#define SDTF_NUM_RUNALL_TEST_COMMANDS (36u)
/* Other commands not covered by run_all */
-#define SDTF_NUM_OTHER_TEST_COMMANDS (6u)
-#else
+#define SDTF_NUM_OTHER_TEST_COMMANDS (0u)
+#endif
+
+#ifdef SOC_J721E
/* Number of commands run by the "run_all" command
* Note: This should match number of entries in the tables below
*/
-#define SDTF_NUM_RUNALL_TEST_COMMANDS (37u)
+#define SDTF_NUM_RUNALL_TEST_COMMANDS (39u)
/* Other commands not covered by run_all */
#define SDTF_NUM_OTHER_TEST_COMMANDS (0u)
/* Full list of commands */
SDTF_commandList_t SDTF_commandList[SDTF_MAX_COMMANDS] =
{
- { "esm_selftest", SDTF_runESMSelfTest},
- { "esm_inject", SDTF_runESMInject },
- { "esm_apitest", SDTF_runESMAPITest },
- { "esm_negativetest", SDTF_runESMNegativeTest},
+ { "esm_selftest_MCU", SDTF_runESMSelfTest_MCU},
+ { "esm_inject_MCU", SDTF_runESMInject_MCU },
+ { "esm_apitest_MCU", SDTF_runESMAPITest },
+ { "esm_negativetest_MCU", SDTF_runESMNegativeTest},
+ { "esm_selftest_WKUP", SDTF_runESMSelfTest_WKUP},
+ { "esm_inject_WKUP", SDTF_runESMInject_WKUP },
+ { "esm_selftest_MAIN", SDTF_runESMSelfTest_MAIN},
+ { "esm_inject_MAIN", SDTF_runESMInject_MAIN },
{ "ecc1_selftest", SDTF_runECC1BitSelfTest },
{ "ecc2_selftest", SDTF_runECC2BitSelfTest },
{ "ecc2_inject", SDTF_runECC2BitInjectTest },
{ "ecc2_programinject", SDTF_runECC2BitCodeInjectTest },
{ "exception_runapitests", SDTF_runExceptionApiTests },
{ "ecc1_inject", SDTF_runECC1BitInjectTest },
- { "ecc2_vimramdedvector", SDTF_runECC2BitVIMRAMDEDvector },
- { "ccm_selftest", SDTF_runCCMSelfTest },
- { "ccm_selftest_polarityinvert", SDTF_runCCMSelfTestErrorForce },
+#ifdef SOC_J721E
+ { "cbass_1bitinject", SDTF_runECC1BitCBASSInjectTest },
+ { "cbass_1bitselftest", SDTF_runECC1BitCBASSSelfTest },
+ { "cbass_2bitinject", SDTF_runECC2BitCBASSInjectTest },
+ { "cbass_2bitselftest", SDTF_runECC2BitCBASSSelfTest },
+#endif
+#ifdef SOC_AM65XX
+/* { "ccm_selftest", SDTF_runCCMSelfTest },
+ { "ccm_selftest_errorforce", SDTF_runCCMSelfTestErrorForce },
{ "ccm_vimselftest", SDTF_runCCMVIMSelfTest },
- { "ccm_inactivityselftest", SDTF_runCCMInactivitySelfTest },
+ { "ccm_inactivityselftest", SDTF_runCCMInactivitySelfTest }, */
{ "ccm_inject", SDTF_runCCMInjectError },
- { "ccm_selftest_errorforce", SDTF_runCCMSelftestPolarityInvert },
+ /* { "ccm_selftest_polarityinvert", SDTF_runCCMSelftestPolarityInvert }, */
+#endif
+ /* This needs to be last as it is destructive */
+ { "ecc2_vimramdedvector", SDTF_runECC2BitVIMRAMDEDvector },
+
/* The following tests are not covered by run all */
sscanf(buffPointer2, "%x", ®Address);
if (strncmp(buffPointer, "read_reg", SDTF_MAX_COMMAND_LEN) == 0) {
- SDTF_printf("\n Read value at 0x%x is 0x%x", regAddress, *((uint32_t *)regAddress));
+ SDTF_printf("\n Read value at 0x%x is 0x%x", regAddress, *((volatile uint32_t *)regAddress));
} else {
char buffPointer3[256];
uint32_t regValue;
continue;
}
sscanf(buffPointer3, "%x", ®Value);
- *((uint32_t *)regAddress) = regValue;
+ *((volatile uint32_t *)regAddress) = regValue;
SDTF_printf("\n Written address 0x%x with value: 0x%x read value 0x%x",
- regAddress, regValue, *((uint32_t *)regAddress));
+ regAddress, regValue, *((volatile uint32_t *)regAddress));
}
}
if (retVal == 0)
{
- UART_printStatus("\n ALL TESTS PASSED \n");
+ UART_printStatus("\n All tests have passed. \n");
}
else
{