]> Gitweb @ Texas Instruments - Open Source Git Repositories - git.TI.com/gitweb - processor-sdk/pdk.git/blobdiff - packages/ti/diag/sdr/test/sdtf-test/src/sdtf_test.c
CCM test fail leading to sdr test failure
[processor-sdk/pdk.git] / packages / ti / diag / sdr / test / sdtf-test / src / sdtf_test.c
index 9abdee8fa6e2d25484a71600bc69ccf6e99421cf..735f1e1ff53eb2b047ca278c1a74c36e70895fe5 100755 (executable)
@@ -199,6 +199,9 @@ void SDTF_triggerPeriodicTests(uintptr_t arg)
 
     /* Set the flag to trigger periodic tests */
     SDTF_periodTaskTrigger = SDTF_PERIODIC_TASK_TRIGGER_ENABLE;
+
+    /* Feed watchdog timer */
+    SDTF_WDT_feedWatchdogTimer();
 }
 /*********************************************************************
  * @fn      SDTF_runPeriodicTests
@@ -232,35 +235,33 @@ int32_t SDTF_runPeriodicTests(void)
 
         SDTF_profileBegin(SDTF_PROFILE_PERIODIC);
         /* -------------- Periodic Test start ------------------------- */
-        {
-            /* Run test for ECC */
-            SDR_ECC_InjectErrorConfig_t injectErrorConfig;
+
+        /* Run test for ECC */
+        SDR_ECC_InjectErrorConfig_t injectErrorConfig;
 
             /* Note the address is relative to start of ram */
-            injectErrorConfig.pErrMem = (uint32_t *)(0x00);
+        injectErrorConfig.pErrMem = (uint32_t *)(0x00);
 
-            /* Run one shot test for ATCM 1 bit error */
-            injectErrorConfig.flipBitMask = 0x10;
-            result = SDR_ECC_selfTest(SDR_ECC_MEMTYPE_MCU_R5F0_CORE,
-                                           SDR_ECC_R5F_MEM_SUBTYPE_ATCM0_BANK0_VECTOR_ID,
-                                           SDR_INJECT_ECC_ERROR_FORCING_1BIT_ONCE,
-                                           &injectErrorConfig,
-                                           100000);
+        /* Run one shot test for ATCM 1 bit error */
+        injectErrorConfig.flipBitMask = 0x10;
+        result = SDR_ECC_selfTest(SDR_ECC_MEMTYPE_MCU_R5F0_CORE,
+                                        SDR_ECC_R5F_MEM_SUBTYPE_ATCM0_BANK0_VECTOR_ID,
+                                        SDR_INJECT_ECC_ERROR_FORCING_1BIT_ONCE,
+                                        &injectErrorConfig,
+                                        100000);
 
 
-            if (result != SDR_PASS ) {
-                SDTF_printf("\n ATCM Single bit error at pErrMem 0x%p test failed",
-                            injectErrorConfig.pErrMem);
-                return -1;
-             }
+        if (result != SDR_PASS ) {
+            SDTF_printf("\n ATCM Single bit error at pErrMem 0x%p test failed",
+                        injectErrorConfig.pErrMem);
+            return -1;
         }
-        {
-             /* Run esm test 1*/
-             result = SDR_ESM_selfTest(SDR_ESM_INSTANCE_MCU,1000);
-             if (result != SDR_PASS ) {
-                 SDTF_printf("\n ESM self test 1 failed");
-                 return -1;
-             }
+
+        /* Run esm test 1*/
+        result = SDR_ESM_selfTest(SDR_ESM_INSTANCE_MCU,1000);
+        if (result != SDR_PASS ) {
+            SDTF_printf("\n ESM self test 1 failed");
+            return -1;
         }
 
         /* -------------- Periodic Tests end ------------------------- */
@@ -293,19 +294,21 @@ int32_t SDTF_runPeriodicTests(void)
  */
 #define SDTF_MAX_SPECIAL_COMMANDS (5u)
 
-#ifdef SOC_J721E
+#ifdef SOC_AM65XX
 /* Number of commands run by the "run_all" command
  * Note: This should match number of entries in the tables below
  */
-#define SDTF_NUM_RUNALL_TEST_COMMANDS (37u)
+#define SDTF_NUM_RUNALL_TEST_COMMANDS (36u)
 
 /* Other commands not covered by run_all */
-#define SDTF_NUM_OTHER_TEST_COMMANDS (6u)
-#else
+#define SDTF_NUM_OTHER_TEST_COMMANDS (0u)
+#endif
+
+#ifdef SOC_J721E
 /* Number of commands run by the "run_all" command
  * Note: This should match number of entries in the tables below
  */
-#define SDTF_NUM_RUNALL_TEST_COMMANDS (43u)
+#define SDTF_NUM_RUNALL_TEST_COMMANDS (39u)
 
 /* Other commands not covered by run_all */
 #define SDTF_NUM_OTHER_TEST_COMMANDS (0u)
@@ -364,15 +367,23 @@ SDTF_commandList_t SDTF_commandList[SDTF_MAX_COMMANDS] =
     { "ecc2_programinject",          SDTF_runECC2BitCodeInjectTest },
     { "exception_runapitests",       SDTF_runExceptionApiTests },
     { "ecc1_inject",                 SDTF_runECC1BitInjectTest },
-    { "cbass2_inject",               SDTF_runECC2BitCBASSInjectTest },
-    { "cbass2_selftest",             SDTF_runECC2BitCBASSSelfTest },
-    { "ecc2_vimramdedvector",        SDTF_runECC2BitVIMRAMDEDvector },
-    { "ccm_selftest",                SDTF_runCCMSelfTest },
-    { "ccm_selftest_polarityinvert", SDTF_runCCMSelfTestErrorForce },
+#ifdef SOC_J721E
+    { "cbass_1bitinject",            SDTF_runECC1BitCBASSInjectTest },
+    { "cbass_1bitselftest",          SDTF_runECC1BitCBASSSelfTest },
+    { "cbass_2bitinject",            SDTF_runECC2BitCBASSInjectTest },
+    { "cbass_2bitselftest",          SDTF_runECC2BitCBASSSelfTest },
+#endif
+#ifdef SOC_AM65XX
+/*     { "ccm_selftest",                SDTF_runCCMSelfTest },
+    { "ccm_selftest_errorforce",     SDTF_runCCMSelfTestErrorForce },
     { "ccm_vimselftest",             SDTF_runCCMVIMSelfTest },
-    { "ccm_inactivityselftest",      SDTF_runCCMInactivitySelfTest },
+    { "ccm_inactivityselftest",      SDTF_runCCMInactivitySelfTest }, */
     { "ccm_inject",                  SDTF_runCCMInjectError },
-    { "ccm_selftest_errorforce",     SDTF_runCCMSelftestPolarityInvert },
+    /* { "ccm_selftest_polarityinvert",     SDTF_runCCMSelftestPolarityInvert }, */
+#endif
+    /* This needs to be last as it is destructive */
+    { "ecc2_vimramdedvector",        SDTF_runECC2BitVIMRAMDEDvector },
+
 
      /* The following tests are not covered by run all */
 
@@ -483,7 +494,7 @@ int32_t SDTF_runInteractiveTests(void)
             sscanf(buffPointer2, "%x", &regAddress);
 
             if (strncmp(buffPointer, "read_reg", SDTF_MAX_COMMAND_LEN) == 0) {
-                SDTF_printf("\n Read value at 0x%x is 0x%x", regAddress, *((uint32_t *)regAddress));
+                SDTF_printf("\n Read value at 0x%x is 0x%x", regAddress, *((volatile uint32_t *)regAddress));
             } else {
                 char buffPointer3[256];
                 uint32_t regValue;
@@ -499,9 +510,9 @@ int32_t SDTF_runInteractiveTests(void)
                     continue;
                 }
                 sscanf(buffPointer3, "%x", &regValue);
-                *((uint32_t *)regAddress) = regValue;
+                *((volatile uint32_t *)regAddress) = regValue;
                 SDTF_printf("\n Written address 0x%x with value: 0x%x read value 0x%x",
-                            regAddress, regValue, *((uint32_t *)regAddress));
+                            regAddress, regValue, *((volatile uint32_t *)regAddress));
             }
 
         }