[GPIO]: GPIO porting for J7AHP.

[processor-sdk/pdk.git] / packages / ti / drv / gpio / test / led_blink / src / main_led_blink.c

diff --git a/packages/ti/drv/gpio/test/led_blink/src/main_led_blink.c b/packages/ti/drv/gpio/test/led_blink/src/main_led_blink.c
index 0c75601a144659da460f01c15fb767229873173e..c065713ed212770373d866afbecd90bfb298f173 100644 (file)
--- a/packages/ti/drv/gpio/test/led_blink/src/main_led_blink.c
+++ b/packages/ti/drv/gpio/test/led_blink/src/main_led_blink.c
@@ -10,7 +10,7 @@
  */
 
 /*
- * Copyright (C) 2014 - 2020 Texas Instruments Incorporated - http://www.ti.com/
+ * Copyright (C) 2014 - 2022 Texas Instruments Incorporated - http://www.ti.com/
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -59,18 +59,18 @@
 
 #include <ti/board/board.h>
 
-#if defined(SOC_J721E) || defined(SOC_J7200) || defined(SOC_AM64X) || defined(SOC_J721S2)
+#if defined(SOC_J721E) || defined(SOC_J7200) || defined(SOC_AM64X) || defined(SOC_J721S2) || defined(SOC_J784S4)
 #include <ti/csl/soc.h>
 #if defined (BUILD_C66X)
 #include  "ti/csl/csl_chipAux.h"
 #endif
 #endif
 
-#if defined(SOC_AM65XX) || defined(SOC_J721E) || defined(SOC_J7200) || defined(SOC_AM64X) || defined(SOC_J721S2)
+#if defined(SOC_AM65XX) || defined(SOC_J721E) || defined(SOC_J7200) || defined(SOC_AM64X) || defined(SOC_J721S2) || defined(SOC_J784S4)
 #include <ti/drv/sciclient/sciclient.h>
 #endif
 
-#if defined (SOC_AM65XX) || defined (SOC_J721E) || defined (SOC_J7200) || defined(SOC_J721S2)
+#if defined (SOC_AM65XX) || defined (SOC_J721E) || defined (SOC_J7200) || defined(SOC_J721S2) || defined(SOC_J784S4)
 #include <ti/csl/csl_clec.h>
 #endif
 
@@ -91,7 +91,7 @@
 #define APP_TSK_STACK_MAIN              (0x8000U)
 
 #if defined (USE_BIOS) || defined (FREERTOS)
-#if defined (SOC_J721E) || defined(SOC_J7200) || defined (SOC_TPR12) || defined (SOC_AWR294X) || defined(SOC_AM64X) || defined(SOC_AM65XX) || defined(SOC_J721S2)
+#if defined (SOC_J721E) || defined(SOC_J7200) || defined (SOC_TPR12) || defined (SOC_AWR294X) || defined(SOC_AM64X) || defined(SOC_AM65XX) || defined(SOC_J721S2) || defined(SOC_J784S4)
 static uint8_t  gAppTskStackMain[APP_TSK_STACK_MAIN] __attribute__((aligned(32)));
 #endif
 #endif
@@ -116,7 +116,7 @@ extern void GPIOApp_UpdateBoardInfo(void);
 extern void GPIOAppUpdateConfig(uint32_t *gpioBaseAddr, uint32_t *gpioPin);
 #endif
 
-#if defined(SOC_AM65XX) || defined(SOC_J721E) || defined(SOC_J7200) || defined(SOC_AM64X) || defined(SOC_J721S2)
+#if defined(SOC_AM65XX) || defined(SOC_J721E) || defined(SOC_J7200) || defined(SOC_AM64X) || defined(SOC_J721S2) || defined(SOC_J784S4)
 /* Main domain GPIO interrupt events */
 #define MAIN_GPIO_INTRTR_GPIO0_BANK0_INT (0x000000C0) /* GPIO port 0 bank 0 interrupt event #, input to MAIN_GPIO_INTRTR */
 #define MAIN_GPIO_INTRTR_GPIO1_BANK0_INT (0x000000C8) /* GPIO port 1 bank 0 interrupt event #, input to MAIN_GPIO_INTRTR */
@@ -230,14 +230,14 @@ void GPIO_configIntRouter(uint32_t portNum, uint32_t pinNum, uint32_t gpioIntRtr
 
 #endif
 
-#if defined(j721e_sim) || defined (j721e_evm) || defined (j7200_evm) || defined(j721s2_evm)
+#if defined(j721e_sim) || defined (j721e_evm) || defined (j7200_evm) || defined(j721s2_evm) || defined(j784s4_evm)
 
     /* no main domain GPIO pins directly connected to LEDs on GP EVM,
        use WKUP domain GPIO pins which connected to LEDs on base board */
     cfg->baseAddr = CSL_WKUP_GPIO0_BASE;
 
-#if !defined(j721s2_evm) 
-    /* J721S2 Sets the following by querying from BoardCfg.
+#if !defined(j721s2_evm) && !defined(j784s4_evm)
+    /* J721S2 and J7AHP Sets the following by querying from BoardCfg.
      * Ideally other SOC's as well should do the same. And the following code can be cleanup up. */
     bankNum = pinNum/16; /* Each GPIO bank has 16 pins */
 
@@ -287,7 +287,7 @@ static void Board_initGPIO(void)
 {
     Board_initCfg boardCfg;
 
-#if defined(SOC_K2H) || defined(SOC_K2K) || defined(SOC_K2E) || defined(SOC_K2L) || defined(SOC_K2G) || defined(SOC_C6678) || defined(SOC_C6657) || defined(SOC_OMAPL137) || defined(SOC_OMAPL138) || defined(SOC_AM65XX) || defined(SOC_J721E) || defined(SOC_J7200) || defined(SOC_AM64X) || defined(SOC_J721S2)
+#if defined(SOC_K2H) || defined(SOC_K2K) || defined(SOC_K2E) || defined(SOC_K2L) || defined(SOC_K2G) || defined(SOC_C6678) || defined(SOC_C6657) || defined(SOC_OMAPL137) || defined(SOC_OMAPL138) || defined(SOC_AM65XX) || defined(SOC_J721E) || defined(SOC_J7200) || defined(SOC_AM64X) || defined(SOC_J721S2) || defined(SOC_J784S4)
     GPIO_v0_HwAttrs gpio_cfg;
 
     /* Get the default SPI init configurations */
@@ -328,13 +328,13 @@ static void Board_initGPIO(void)
 #endif
 
     /* Modify the default GPIO configurations if necessary */
-#if defined (j721e_evm)  || defined (j721e_sim) || defined (j7200_evm) || defined(j721s2_evm)
+#if defined (j721e_evm)  || defined (j721e_sim) || defined (j7200_evm) || defined(j721s2_evm) || defined(j784s4_evm)
 
        /* change default GPIO port from MAIN GPIO0 to WAKEUP GPIO0 to access TP45 */
     gpio_cfg.baseAddr = CSL_WKUP_GPIO0_BASE;
 
-#if !defined(j721s2_evm) 
-    /* J721S2 Sets the following by querying from BoardCfg.
+#if !defined(j721s2_evm) && !defined(j784s4_evm)
+    /* J721S2 and J7AHP Sets the following by querying from BoardCfg.
      * Ideally other SOC's as well should do the same. And the following code can be cleanup up. */
 #if defined (BUILD_MPU)
        gpio_cfg.intCfg->intNum = CSLR_COMPUTE_CLUSTER0_GIC500SS_SPI_WKUP_GPIOMUX_INTRTR0_OUTP_16;
@@ -495,7 +495,7 @@ int main()
         /* Trigger interrupt */
         GPIOTriggerPinInt(gpioBaseAddr, 0, gpioPin);
 #endif
-#if defined(SOC_K2H) || defined(SOC_K2K) || defined(SOC_K2E) || defined(SOC_K2G) || defined(SOC_OMAPL137) || defined(SOC_OMAPL138) || defined(SOC_AM65XX) || defined(SOC_J721E) || defined(SOC_J7200) || defined(SOC_J721S2)
+#if defined(SOC_K2H) || defined(SOC_K2K) || defined(SOC_K2E) || defined(SOC_K2G) || defined(SOC_OMAPL137) || defined(SOC_OMAPL138) || defined(SOC_AM65XX) || defined(SOC_J721E) || defined(SOC_J7200) || defined(SOC_J721S2) || defined(SOC_J784S4)
         GPIO_toggle(USER_LED0);
 #elif defined(SOC_AM64X)
         /* In AM64x GP EVM, USER_LED0 (TEST_LED1) is connected to IO EXPANDER.
@@ -529,7 +529,7 @@ int main(void)
     AppGPIOInit();
 #endif
 
-#if defined (SOC_J721E) || defined(SOC_J7200) || defined (SOC_TPR12) || defined (SOC_AWR294X) || defined(SOC_AM64X) || defined(SOC_AM65XX) || defined(SOC_J721S2)
+#if defined (SOC_J721E) || defined(SOC_J7200) || defined (SOC_TPR12) || defined (SOC_AWR294X) || defined(SOC_AM64X) || defined(SOC_AM65XX) || defined(SOC_J721S2) || defined(SOC_J784S4)
     TaskP_Params taskParams;
 
     OS_init();
@@ -578,7 +578,7 @@ void AppGpioCallbackFxn(void)
 #else
 void AppGpioCallbackFxn(void)
 {
-#if !defined(SOC_J721E) || !defined(SOC_J7200) || !defined(SOC_AM64X) || defined(SOC_J721S2)
+#if !defined(SOC_J721E) || !defined(SOC_J7200) || !defined(SOC_AM64X) || defined(SOC_J721S2) || defined(SOC_J784S4)
     /* Toggle LED1 */
     GPIO_toggle(USER_LED1);
     AppLoopDelay(DELAY_VALUE);