diff --git a/packages/ti/drv/sciclient/src/sciclient/sciclient_rm_irq.c b/packages/ti/drv/sciclient/src/sciclient/sciclient_rm_irq.c
index bc822e05757cdbd1bc2e5db8c59d21e6b6c0a5e7..06e5dc9536f7ba5070b33626ff0ab3d30bafe4b2 100755 (executable)
*
* \return Updated address
*/
-static uint32_t * Sciclient_getIrAddr (uint32_t addr, uint32_t i);
+static uint32_t * Sciclient_getIrAddr (uint32_t addr, uint16_t i);
/**
* \brief Check if a parameter is valid. Uses a valid_params field and the bit
* index. NULL will be returned for the pointer if the index value is
* greater than or equal to the current path stack pointer value.
*
- * \param index
- * Path stack index
+ * \param idx
+ * Path stack idx
*
* \return
- * Pointer to IRQ tree node at the provided index
+ * Pointer to IRQ tree node at the provided idx
*/
static const struct Sciclient_rmIrqNode *Sciclient_rmPsGetIrqNode(
- uint16_t index);
+ uint16_t idx);
/**
* \brief Returns the interface index at the provided path stack index. An
* error will be returned for the interface index if the index value
* is greater than or equal to the current path stack pointer value.
*
- * \param index
- * Path stack index
+ * \param idx
+ * Path stack idx
*
* \return
* >= 0 - Interface index at the provided index
- * CSL_EBADARGS - Specified index is invalid
+ * CSL_EBADARGS - Specified Index is invalid
*/
-static int32_t Sciclient_rmPsGetIfIdx(uint16_t index);
+static int32_t Sciclient_rmPsGetIfIdx(uint16_t idx);
/**
* \brief The inp value is updated for an existing path stack node. Setting of
* CSL_PASS - Set successful
* CSL_EBADARGS - Specified index is invalid
*/
-static int32_t Sciclient_rmPsSetInp(uint16_t index,
+static int32_t Sciclient_rmPsSetInp(uint16_t idx,
uint16_t inp);
/**
* will be returned if the index is greater than or equal to the current
* path stack index.
*
- * \param index
- * Path stack index
+ * \param idx
+ * Path stack idx
*
* \return
* >= 0 - Path stack node's inp value
* CSL_EBADARGS - Specified index is invalid
*/
-static int32_t Sciclient_rmPsGetInp(uint16_t index);
+static int32_t Sciclient_rmPsGetInp(uint16_t idx);
/**
* \brief The outp value is updated for an existing path stack node. Setting of
* validated. An error will be returned if the index is greater than or
* equal to the current path stack index.
*
- * \param index
- * Path stack index
+ * \param idx
+ * Path stack idx
*
* \param outp
* Validate output line for node at specified index
* CSL_PASS - Set successful
* CSL_EBADARGS - Specified index is invalid
*/
-static int32_t Sciclient_rmPsSetOutp(uint16_t index,
+static int32_t Sciclient_rmPsSetOutp(uint16_t idx,
uint16_t outp);
/**
* \brief This function gets the specified pushed node's outp line. An error
* will be returned if the index is greater than or equal to the current
- * path stack index.
+ * path stack idx.
*
- * \param index
- * Path stack index
+ * \param idx
+ * Path stack idx
*
* \return
* >= 0 - Path stack node's outp value
* CSL_EBADARGS - Specified index is invalid
*/
-static int32_t Sciclient_rmPsGetOutp(uint16_t index);
+static int32_t Sciclient_rmPsGetOutp(uint16_t idx);
/**
* \brief Get IRQ tree node
@@ -848,17 +848,17 @@ int32_t Sciclient_rmProgramInterruptRoute (const struct tisci_msg_rm_irq_set_req
r = CSL_EBADARGS;
}
- if (r == CSL_PASS &&
+ if (((r == CSL_PASS) &&
Sciclient_rmParamIsValid(req->valid_params,
- TISCI_MSG_VALUE_RM_SECONDARY_HOST_VALID) == TRUE) {
+ TISCI_MSG_VALUE_RM_SECONDARY_HOST_VALID)) == TRUE) {
dst_host = req->secondary_host;
} else {
dst_host = (uint8_t) gSciclientMap[Sciclient_getCurrentContext(messageType)].hostId;
}
- if (r == CSL_PASS &&
+ if (((r == CSL_PASS) &&
Sciclient_rmParamIsValid(req->valid_params,
- TISCI_MSG_VALUE_RM_IA_ID_VALID) == TRUE) {
+ TISCI_MSG_VALUE_RM_IA_ID_VALID)) == TRUE) {
cfg.s_ia = req->ia_id;
} else {
cfg.s_ia = SCICLIENT_RM_DEV_NONE;
@@ -876,8 +876,8 @@ int32_t Sciclient_rmProgramInterruptRoute (const struct tisci_msg_rm_irq_set_req
cfg.vint_sb = req->vint_status_bit_index;
cfg.set_resp = resp;
- if (Sciclient_rmIrqCfgIsDirectNonEvent(cfg.valid_params) == true) {
- if (Sciclient_rmIaIsIa(cfg.s_id) == true) {
+ if (Sciclient_rmIrqCfgIsDirectNonEvent(cfg.valid_params) == (bool)true) {
+ if (Sciclient_rmIaIsIa(cfg.s_id) == (bool)true) {
/*
* Users can configure unmapped vint direct
* events this way as well. For these cases
@@ -890,12 +890,12 @@ int32_t Sciclient_rmProgramInterruptRoute (const struct tisci_msg_rm_irq_set_req
/* Route search for non event-source routes */
r = Sciclient_rmIrqFindRoute(&cfg);
if (r == CSL_PASS) {
- r = Sciclient_rmIrqProgramRoute(&cfg, false);
+ r = Sciclient_rmIrqProgramRoute(&cfg, (bool)false);
}
} else if ((Sciclient_rmIrqCfgIsDirectEvent(cfg.valid_params) ==
- true) ||
+ (bool)true) ||
(Sciclient_rmIrqCfgIsEventToVintMappingOnly(&cfg) ==
- true)) {
+ (bool)true)) {
/*
* Route creation for event-sourced routes, direct
* to processor or polled (where polling occurs at
@@ -903,14 +903,14 @@ int32_t Sciclient_rmProgramInterruptRoute (const struct tisci_msg_rm_irq_set_req
* */
r = Sciclient_rmIrqVintAdd(&cfg);
} else if (Sciclient_rmIrqCfgIsUnmappedVintDirectEvent(cfg.valid_params) ==
- true) {
+ (bool)true) {
/*
* Route search for event-source routes but do not
* configure peripheral OES or map event to VINT
* status bit
*/
r = Sciclient_rmUnmappedVintRouteCreate(&cfg);
- } else if (Sciclient_rmIrqCfgIsOesOnly(cfg.valid_params) == true) {
+ } else if (Sciclient_rmIrqCfgIsOesOnly(cfg.valid_params) == (bool)true) {
/*
* Just program OES register. No interrupt route
* associated with event. For example, a UDMAP
@@ -941,17 +941,17 @@ int32_t Sciclient_rmClearInterruptRoute (const struct tisci_msg_rm_irq_release_r
r = CSL_EBADARGS;
}
- if (r == CSL_PASS &&
+ if (((r == CSL_PASS) &&
Sciclient_rmParamIsValid(req->valid_params,
- TISCI_MSG_VALUE_RM_SECONDARY_HOST_VALID) == TRUE) {
+ TISCI_MSG_VALUE_RM_SECONDARY_HOST_VALID)) == TRUE) {
dst_host = req->secondary_host;
} else {
dst_host = (uint8_t) gSciclientMap[Sciclient_getCurrentContext(messageType)].hostId;
}
- if (r == CSL_PASS &&
+ if (((r == CSL_PASS) &&
Sciclient_rmParamIsValid(req->valid_params,
- TISCI_MSG_VALUE_RM_IA_ID_VALID) == TRUE) {
+ TISCI_MSG_VALUE_RM_IA_ID_VALID)) == TRUE) {
cfg.s_ia = req->ia_id;
} else {
cfg.s_ia = SCICLIENT_RM_DEV_NONE;
@@ -968,8 +968,8 @@ int32_t Sciclient_rmClearInterruptRoute (const struct tisci_msg_rm_irq_release_r
cfg.vint = req->vint;
cfg.vint_sb = req->vint_status_bit_index;
- if (Sciclient_rmIrqCfgIsDirectNonEvent(cfg.valid_params) == true) {
- if (Sciclient_rmIaIsIa(cfg.s_id) == true) {
+ if (Sciclient_rmIrqCfgIsDirectNonEvent(cfg.valid_params) == (bool)true) {
+ if (Sciclient_rmIaIsIa(cfg.s_id) == (bool)true) {
/*
* Users can release unmapped vint direct
* events this way as well. For these cases
@@ -984,23 +984,23 @@ int32_t Sciclient_rmClearInterruptRoute (const struct tisci_msg_rm_irq_release_r
/* Route removal for non event-source routes */
r = Sciclient_rmIrqGetRoute(&cfg);
if (r == CSL_PASS) {
- r = Sciclient_rmIrqDeleteRoute(&cfg, false);
+ r = Sciclient_rmIrqDeleteRoute(&cfg, (bool)false);
}
}
} else if ((Sciclient_rmIrqCfgIsDirectEvent(cfg.valid_params) ==
- true) ||
+ (bool)true) ||
(Sciclient_rmIrqCfgIsEventToVintMappingOnly(&cfg) ==
- true)) {
+ (bool)true)) {
/* Route removal for event-source routes */
r = Sciclient_rmIrqVintDelete(&cfg);
} else if (Sciclient_rmIrqCfgIsUnmappedVintDirectEvent(cfg.valid_params) ==
- true) {
+ (bool)true) {
/*
* Route removal for event-source route but no events
* are mapped to VINT status bits
*/
r = Sciclient_rmIrqUnmappedVintRouteDelete(&cfg);
- } else if (Sciclient_rmIrqCfgIsOesOnly(cfg.valid_params) == true) {
+ } else if (Sciclient_rmIrqCfgIsOesOnly(cfg.valid_params) == (bool)true) {
/*
* Just reset OES register. No interrupt route
* associated with event. For example, a UDMAP
const struct Sciclient_rmIrqNode *cur_n;
const struct Sciclient_rmIrqIf *cur_if;
uint16_t i;
- bool translated = false;
+ bool translated = (bool)false;
/* Only attempt to translate to destination input if an IR/IA is passed */
- if ((Sciclient_rmIrIsIr(src_dev_id) == true)||
- (Sciclient_rmIaIsIa(src_dev_id) == true)) {
+ if ((Sciclient_rmIrIsIr(src_dev_id) == (bool) true)||
+ (Sciclient_rmIaIsIa(src_dev_id) == (bool)true)) {
/*
* Translate the specified IR/IA output to the destination processor
* IRQ input
if (r == CSL_PASS) {
for (i = 0; i < cur_n->n_if; i++) {
r = Sciclient_rmIrqGetNodeItf(cur_n, i, &cur_if);
- if (r != CSL_PASS) {
- break;
- }
-
- if ((src_output >= cur_if->lbase) &&
+ if ((r == CSL_PASS) && (src_output >= cur_if->lbase) &&
(src_output < (cur_if->lbase + cur_if->len)) &&
(dst_dev_id == cur_if->rid)) {
*dst_input = SCICLIENT_OUTP_TO_INP(src_output,
cur_if->lbase,
cur_if->rbase);
- translated = true;
+ translated = (bool)true;
+ }else{
+ /* Do Nothing */
+ }
+ if((r != CSL_PASS) || (translated == (bool)true))
+ {
break;
}
}
if ((r == CSL_PASS) &&
- (translated == false)) {
+ (translated == (bool)false)) {
/* No translatable destination found. */
r = CSL_EBADARGS;
}
const struct Sciclient_rmIrqNode *cur_n;
const struct Sciclient_rmIrqIf *cur_if;
uint16_t i;
- bool translated = false;
+ bool translated = (bool)false;
/* Only attempt to translate to IR/IA output if an IR/IA is passed */
- if ((Sciclient_rmIrIsIr(src_dev_id) == true) ||
- (Sciclient_rmIaIsIa(src_dev_id) == true)) {
+ if ((Sciclient_rmIrIsIr(src_dev_id) == (bool)true) ||
+ (Sciclient_rmIaIsIa(src_dev_id) == (bool)true)) {
/*
- * Translate the specified destination processor IRQ input to the
+ * Translate the specified destination processor IRQ input to the
* IR/IA output
*/
r = Sciclient_rmIrqGetNode(src_dev_id, &cur_n);
if (r == CSL_PASS) {
for (i = 0; i < cur_n->n_if; i++) {
r = Sciclient_rmIrqGetNodeItf(cur_n, i, &cur_if);
- if (r != CSL_PASS) {
- break;
- }
-
- if ((dst_dev_id == cur_if->rid) &&
+ if ((r == CSL_PASS) && (dst_dev_id == cur_if->rid) &&
(dst_input >= cur_if->rbase) &&
(dst_input < (cur_if->rbase + cur_if->len))) {
*src_output = SCICLIENT_INP_TO_OUTP(dst_input,
cur_if->rbase,
cur_if->lbase);
- translated = true;
+ translated = (bool)true;
+ }else{
+ /* Do Nothing */
+ }
+ if((r != CSL_PASS) || (translated == (bool)true))
+ {
break;
}
}
if ((r == CSL_PASS) &&
- (translated == false)) {
+ (translated == (bool)false)) {
/* No translatable IR/IA input found. */
r = CSL_EBADARGS;
}
/* Internal Function Definitions */
/* -------------------------------------------------------------------------- */
-static uint32_t * Sciclient_getIrAddr (uint32_t addr, uint32_t i)
+static uint32_t * Sciclient_getIrAddr (uint32_t addr, uint16_t i)
{
uint32_t * int_ctrl_reg;
#if defined (BUILD_MPU1_0) || defined(BUILD_MPU1_1)
#endif
#if defined (BUILD_C66X)
/* This corresponds to the IR registers for which the RAT is configured */
- if (((uint32_t)int_ctrl_reg >= CSL_C66SS0_INTROUTER0_INTR_ROUTER_CFG_BASE) &&
- ((uint32_t)int_ctrl_reg < (CSL_C66SS1_INTROUTER0_INTR_ROUTER_CFG_BASE +
+ if (((uint32_t)int_ctrl_reg >= CSL_C66SS0_INTROUTER0_INTR_ROUTER_CFG_BASE) &&
+ ((uint32_t)int_ctrl_reg < (CSL_C66SS1_INTROUTER0_INTR_ROUTER_CFG_BASE +
CSL_C66SS1_INTROUTER0_INTR_ROUTER_CFG_SIZE)))
{
int_ctrl_reg = (uint32_t *)((uint32_t)int_ctrl_reg + CSL_C66_COREPAC_RAT_REGION_BASE);
static bool Sciclient_rmParamIsValid(uint32_t valid_params, uint32_t param_mask)
{
- bool r = false;
+ bool r = (bool)false;
- if ((valid_params & param_mask) != 0) {
- r = true;
+ if ((valid_params & param_mask) != 0U) {
+ r = (bool)true;
}
return r;
{
int32_t r = CSL_PASS;
- if ((gPstack.psp < SCICLIENT_PS_MAX_DEPTH) && (n != NULL)) {
+ if ((gPstack.psp < (uint16_t)SCICLIENT_PS_MAX_DEPTH) && (n != NULL)) {
gPstack.ps[gPstack.psp].p_n = n;
gPstack.ps[gPstack.psp].if_idx = if_idx;
gPstack.psp++;
uint16_t *if_idx)
{
int32_t r = CSL_PASS;
-
+
if ((gPstack.psp > (0u)) && (n != NULL) && (if_idx != NULL)) {
gPstack.psp--;
*n = gPstack.ps[gPstack.psp].p_n;
*if_idx = gPstack.ps[gPstack.psp].if_idx;
-
+
/* Clear the just popped node */
gPstack.ps[gPstack.psp].p_n = NULL;
gPstack.ps[gPstack.psp].if_idx = 0;
static bool Sciclient_rmPsIsEmpty(void)
{
- bool e = true;
+ bool e = (bool)true;
- if (gPstack.psp != 0) {
- e = false;
+ if (gPstack.psp != 0U) {
+ e = (bool)false;
}
return e;
}
static const struct Sciclient_rmIrqNode *Sciclient_rmPsGetIrqNode(
- uint16_t index)
+ uint16_t idx)
{
- return gPstack.ps[index].p_n;
+ return gPstack.ps[idx].p_n;
}
-static int32_t Sciclient_rmPsGetIfIdx(uint16_t index)
+static int32_t Sciclient_rmPsGetIfIdx(uint16_t idx)
{
int32_t r = CSL_EBADARGS;
- if (index < gPstack.psp) {
- r = gPstack.ps[index].if_idx;
+ if (idx < gPstack.psp) {
+ r = (int32_t)gPstack.ps[idx].if_idx;
}
return r;
}
-static int32_t Sciclient_rmPsSetInp(uint16_t index,
+static int32_t Sciclient_rmPsSetInp(uint16_t idx,
uint16_t inp)
{
int32_t r = CSL_PASS;
- if (index < gPstack.psp) {
- gPstack.ps[index].inp = inp;
+ if (idx < gPstack.psp) {
+ gPstack.ps[idx].inp = inp;
} else {
r = CSL_EBADARGS;
}
return r;
}
-static int32_t Sciclient_rmPsGetInp(uint16_t index)
+static int32_t Sciclient_rmPsGetInp(uint16_t idx)
{
int32_t r = CSL_EBADARGS;
- if (index < gPstack.psp) {
- r = gPstack.ps[index].inp;
+ if (idx < gPstack.psp) {
+ r = (int32_t)gPstack.ps[idx].inp;
}
return r;
}
-static int32_t Sciclient_rmPsSetOutp(uint16_t index,
+static int32_t Sciclient_rmPsSetOutp(uint16_t idx,
uint16_t outp)
{
int32_t r = CSL_PASS;
- if (index < gPstack.psp) {
- gPstack.ps[index].outp = outp;
+ if (idx < gPstack.psp) {
+ gPstack.ps[idx].outp = outp;
} else {
r = CSL_EBADARGS;
}
return r;
}
-static int32_t Sciclient_rmPsGetOutp(uint16_t index)
+static int32_t Sciclient_rmPsGetOutp(uint16_t idx)
{
int32_t r = CSL_EBADARGS;
- if (index < gPstack.psp) {
- r = gPstack.ps[index].outp;
+ if (idx < gPstack.psp) {
+ r = (int32_t)gPstack.ps[idx].outp;
}
return r;
int32_t r = CSL_EBADARGS;
const struct Sciclient_rmIrqNode *cur_n;
uint32_t lower, upper, current;
- uint16_t count;
+ uint32_t count;
lower = 0u;
upper = gRmIrqTreeCount - 1u;
static bool Sciclient_rmIrqCheckLoop(struct Sciclient_rmIrqCfg *cfg)
{
- bool loop = false;
+ bool loop = (bool)false;
uint16_t i, j;
const struct Sciclient_rmIrqNode *cur_n, *future_n;
for (j = i + 1u; j < Sciclient_rmPsGetPsp(); j++) {
future_n = Sciclient_rmPsGetIrqNode(j);
if (cur_n->id == future_n->id) {
- loop = true;
+ loop = (bool)true;
break;
}
}
- if (loop == true) {
+ if (loop == (bool)true) {
break;
}
}
static bool Sciclient_rmIrqCfgIsDirectNonEvent(uint32_t valid_params)
{
- bool r = false;
+ bool r = (bool)false;
/*
* The interrupt configuration is for a non-event sourced interrupt
* direct to the destination processor.
*/
if ((Sciclient_rmParamIsValid(valid_params,
- TISCI_MSG_VALUE_RM_DST_ID_VALID) == true) &&
+ TISCI_MSG_VALUE_RM_DST_ID_VALID) == (bool)true) &&
(Sciclient_rmParamIsValid(valid_params,
- TISCI_MSG_VALUE_RM_DST_HOST_IRQ_VALID) == true) &&
+ TISCI_MSG_VALUE_RM_DST_HOST_IRQ_VALID) == (bool)true) &&
(Sciclient_rmParamIsValid(valid_params,
- TISCI_MSG_VALUE_RM_IA_ID_VALID) == false) &&
+ TISCI_MSG_VALUE_RM_IA_ID_VALID) == (bool)false) &&
(Sciclient_rmParamIsValid(valid_params,
- TISCI_MSG_VALUE_RM_VINT_VALID) == false) &&
+ TISCI_MSG_VALUE_RM_VINT_VALID) == (bool)false) &&
(Sciclient_rmParamIsValid(valid_params,
- TISCI_MSG_VALUE_RM_GLOBAL_EVENT_VALID) == false) &&
+ TISCI_MSG_VALUE_RM_GLOBAL_EVENT_VALID) == (bool)false) &&
(Sciclient_rmParamIsValid(valid_params,
- TISCI_MSG_VALUE_RM_VINT_STATUS_BIT_INDEX_VALID) == false)) {
- r = true;
+ TISCI_MSG_VALUE_RM_VINT_STATUS_BIT_INDEX_VALID) == (bool)false)) {
+ r = (bool)true;
}
return r;
static bool Sciclient_rmIrqCfgIsDirectEvent(uint32_t valid_params)
{
- bool r = false;
+ bool r = (bool)false;
/*
* The interrupt configuration is for an event sourced interrupt
* direct to the destination processor.
*/
if ((Sciclient_rmParamIsValid(valid_params,
- TISCI_MSG_VALUE_RM_DST_ID_VALID) == true) &&
+ TISCI_MSG_VALUE_RM_DST_ID_VALID) == (bool)true) &&
(Sciclient_rmParamIsValid(valid_params,
- TISCI_MSG_VALUE_RM_DST_HOST_IRQ_VALID) == true) &&
+ TISCI_MSG_VALUE_RM_DST_HOST_IRQ_VALID) == (bool)true) &&
(Sciclient_rmParamIsValid(valid_params,
- TISCI_MSG_VALUE_RM_IA_ID_VALID) == true) &&
+ TISCI_MSG_VALUE_RM_IA_ID_VALID) == (bool)true) &&
(Sciclient_rmParamIsValid(valid_params,
- TISCI_MSG_VALUE_RM_VINT_VALID) == true) &&
+ TISCI_MSG_VALUE_RM_VINT_VALID) == (bool)true) &&
(Sciclient_rmParamIsValid(valid_params,
- TISCI_MSG_VALUE_RM_GLOBAL_EVENT_VALID) == true) &&
+ TISCI_MSG_VALUE_RM_GLOBAL_EVENT_VALID) == (bool)true) &&
(Sciclient_rmParamIsValid(valid_params,
- TISCI_MSG_VALUE_RM_VINT_STATUS_BIT_INDEX_VALID) == true)) {
- r = true;
+ TISCI_MSG_VALUE_RM_VINT_STATUS_BIT_INDEX_VALID) == (bool)true)) {
+ r = (bool)true;
}
return r;
static bool Sciclient_rmIrqCfgIsUnmappedVintDirectEvent(uint32_t valid_params)
{
- bool r = false;
+ bool r = (bool)false;
/*
* The interrupt configuration is for an event sourced interrupt
@@ -1426,18 +1428,18 @@ static bool Sciclient_rmIrqCfgIsUnmappedVintDirectEvent(uint32_t valid_params)
* and event to VINT status bit mappings are not programmed.
*/
if ((Sciclient_rmParamIsValid(valid_params,
- TISCI_MSG_VALUE_RM_DST_ID_VALID) == true) &&
+ TISCI_MSG_VALUE_RM_DST_ID_VALID) == (bool)true) &&
(Sciclient_rmParamIsValid(valid_params,
- TISCI_MSG_VALUE_RM_DST_HOST_IRQ_VALID) == true) &&
+ TISCI_MSG_VALUE_RM_DST_HOST_IRQ_VALID) == (bool)true) &&
(Sciclient_rmParamIsValid(valid_params,
- TISCI_MSG_VALUE_RM_IA_ID_VALID) == true) &&
+ TISCI_MSG_VALUE_RM_IA_ID_VALID) == (bool)true) &&
(Sciclient_rmParamIsValid(valid_params,
- TISCI_MSG_VALUE_RM_VINT_VALID) == true) &&
+ TISCI_MSG_VALUE_RM_VINT_VALID) == (bool)true) &&
(Sciclient_rmParamIsValid(valid_params,
- TISCI_MSG_VALUE_RM_GLOBAL_EVENT_VALID) == false) &&
+ TISCI_MSG_VALUE_RM_GLOBAL_EVENT_VALID) == (bool)false) &&
(Sciclient_rmParamIsValid(valid_params,
- TISCI_MSG_VALUE_RM_VINT_STATUS_BIT_INDEX_VALID) == false)) {
- r = true;
+ TISCI_MSG_VALUE_RM_VINT_STATUS_BIT_INDEX_VALID) == (bool)false)) {
+ r = (bool)true;
}
return r;
@@ -1445,52 +1447,53 @@ static bool Sciclient_rmIrqCfgIsUnmappedVintDirectEvent(uint32_t valid_params)
static bool Sciclient_rmIrqCfgIsEventToVintMappingOnly(struct Sciclient_rmIrqCfg *cfg)
{
- bool r = false;
+ bool r = (bool)false;
uint32_t valid_params = cfg->valid_params;
/*
* The interrupt configuration is for an event sourced route but
* configuration ends at the IA VINT.
*/
if ((Sciclient_rmParamIsValid(valid_params,
- TISCI_MSG_VALUE_RM_DST_ID_VALID) == false) &&
+ TISCI_MSG_VALUE_RM_DST_ID_VALID) == (bool)false) &&
(Sciclient_rmParamIsValid(valid_params,
- TISCI_MSG_VALUE_RM_DST_HOST_IRQ_VALID) == false) &&
+ TISCI_MSG_VALUE_RM_DST_HOST_IRQ_VALID) == (bool)false) &&
(Sciclient_rmParamIsValid(valid_params,
- TISCI_MSG_VALUE_RM_IA_ID_VALID) == true) &&
+ TISCI_MSG_VALUE_RM_IA_ID_VALID) == (bool)true) &&
(Sciclient_rmParamIsValid(valid_params,
- TISCI_MSG_VALUE_RM_VINT_VALID) == true) &&
+ TISCI_MSG_VALUE_RM_VINT_VALID) == (bool)true) &&
(Sciclient_rmParamIsValid(valid_params,
- TISCI_MSG_VALUE_RM_GLOBAL_EVENT_VALID) == true) &&
+ TISCI_MSG_VALUE_RM_GLOBAL_EVENT_VALID) == (bool)true) &&
(Sciclient_rmParamIsValid(valid_params,
- TISCI_MSG_VALUE_RM_VINT_STATUS_BIT_INDEX_VALID) == true)) {
- r = true;
+ TISCI_MSG_VALUE_RM_VINT_STATUS_BIT_INDEX_VALID) == (bool)true)) {
+ r = (bool)true;
}
/* Handle the case where the IA is directly connected without IR */
- if (r == false)
+ if (r == (bool)false)
{
int32_t ret = CSL_PASS;
const struct Sciclient_rmIrqNode *ia_node;
const struct Sciclient_rmIrqIf *iface;
- bool found_iface = false;
- uint32_t i;
+ bool found_iface = (bool)false;
+ uint16_t i;
ret = Sciclient_rmIrqGetNode(cfg->s_ia, &ia_node);
if (ret == CSL_PASS) {
for (i = 0U; i < ia_node->n_if; i++) {
ret = Sciclient_rmIrqGetNodeItf(ia_node, i, &iface);
- if (ret != CSL_PASS) {
- break;
- }
-
- if ((cfg->vint >= iface->lbase) &&
+ if ((ret == CSL_PASS) && (cfg->vint >= iface->lbase) &&
(cfg->vint < (iface->lbase + iface->len))) {
- found_iface = true;
+ found_iface = (bool)true;
+ }else{
+ /* Do Nothing */
+ }
+ if((ret != CSL_PASS) || (found_iface == (bool)true))
+ {
break;
}
}
- if ((found_iface == true) && !Sciclient_rmIrIsIr(iface->rid))
+ if ((found_iface == (bool)true) && !Sciclient_rmIrIsIr(iface->rid))
{
- r = true;
+ r = (bool)true;
}
}
}
@@ -1500,25 +1503,25 @@ static bool Sciclient_rmIrqCfgIsEventToVintMappingOnly(struct Sciclient_rmIrqCfg
static bool Sciclient_rmIrqCfgIsOesOnly(uint32_t valid_params)
{
- bool r = false;
+ bool r = (bool)false;
/*
* The interrupt configuration provided to only program the OES
* register of a peripheral capable of generating events.
*/
if ((Sciclient_rmParamIsValid(valid_params,
- TISCI_MSG_VALUE_RM_DST_ID_VALID) == false) &&
+ TISCI_MSG_VALUE_RM_DST_ID_VALID) == (bool)false) &&
(Sciclient_rmParamIsValid(valid_params,
- TISCI_MSG_VALUE_RM_DST_HOST_IRQ_VALID) == false) &&
+ TISCI_MSG_VALUE_RM_DST_HOST_IRQ_VALID) == (bool)false) &&
(Sciclient_rmParamIsValid(valid_params,
- TISCI_MSG_VALUE_RM_IA_ID_VALID) == false) &&
+ TISCI_MSG_VALUE_RM_IA_ID_VALID) == (bool)false) &&
(Sciclient_rmParamIsValid(valid_params,
- TISCI_MSG_VALUE_RM_VINT_VALID) == false) &&
+ TISCI_MSG_VALUE_RM_VINT_VALID) == (bool)false) &&
(Sciclient_rmParamIsValid(valid_params,
- TISCI_MSG_VALUE_RM_GLOBAL_EVENT_VALID) == true) &&
+ TISCI_MSG_VALUE_RM_GLOBAL_EVENT_VALID) == (bool)true) &&
(Sciclient_rmParamIsValid(valid_params,
- TISCI_MSG_VALUE_RM_VINT_STATUS_BIT_INDEX_VALID) == false)) {
- r = true;
+ TISCI_MSG_VALUE_RM_VINT_STATUS_BIT_INDEX_VALID) == (bool)false)) {
+ r = (bool)true;
}
return r;
@@ -1531,22 +1534,21 @@ static int32_t Sciclient_rmIrqIsVintRouteSet(struct Sciclient_rmIrqCfg *cfg,
uint16_t i;
const struct Sciclient_rmIrqNode *ia_node = NULL;
const struct Sciclient_rmIrqIf *iface = NULL;
- bool found_iface = false;
+ bool found_iface = (bool)false;
uint16_t ir_inp;
- *vint_used = false;
+ *vint_used = (bool)false;
r = Sciclient_rmIrqGetNode(cfg->s_ia, &ia_node);
if (r == CSL_PASS) {
for (i = 0U; i < ia_node->n_if; i++) {
r = Sciclient_rmIrqGetNodeItf(ia_node, i, &iface);
- if (r != CSL_PASS) {
- break;
- }
-
- if ((cfg->vint >= iface->lbase) &&
+ if ((r == CSL_PASS) && (cfg->vint >= iface->lbase) &&
(cfg->vint < (iface->lbase + iface->len))) {
- found_iface = true;
+ found_iface = (bool)true;
+ }
+ if((r != CSL_PASS) || (found_iface == (bool)true))
+ {
break;
}
}
@@ -1554,21 +1556,21 @@ static int32_t Sciclient_rmIrqIsVintRouteSet(struct Sciclient_rmIrqCfg *cfg,
if (iface != NULL)
{
- if ((found_iface == true) && Sciclient_rmIrIsIr(iface->rid)) {
+ if ((found_iface == (bool)true) && Sciclient_rmIrIsIr(iface->rid)) {
/* Check if the IR input tied to the IA VINT is in use. */
ir_inp = SCICLIENT_OUTP_TO_INP(cfg->vint, iface->lbase, iface->rbase);
if (Sciclient_rmIrInpIsFree(iface->rid, ir_inp) != CSL_PASS) {
- *vint_used = true;
+ *vint_used = (bool)true;
}
}
else if (!Sciclient_rmIrIsIr(iface->rid))
{
/* The IA is the only one in the route from IA to Destination */
- *vint_used = false;
+ *vint_used = (bool)false;
}
else
{
- *vint_used = false;
+ *vint_used = (bool)false;
}
}
@@ -1577,12 +1579,12 @@ static int32_t Sciclient_rmIrqIsVintRouteSet(struct Sciclient_rmIrqCfg *cfg,
static bool Sciclient_rmIrqRouteValidate(struct Sciclient_rmIrqCfg *cfg)
{
- bool valid = true;
+ bool valid = (bool)true;
uint16_t i, j;
const struct Sciclient_rmIrqNode *cur_n, *next_n = NULL;
const struct Sciclient_rmIrqIf *cur_if;
- bool cur_outp_valid = false, next_inp_valid = false;
- uint32_t cur_inp;
+ bool cur_outp_valid = (bool)false, next_inp_valid = (bool)false;
+ uint16_t cur_inp;
uint16_t cur_outp = 0, next_inp = 0;
struct tisci_msg_rm_get_resource_range_req req;
struct tisci_msg_rm_get_resource_range_resp host_resp;
memset(&host_resp, 0, sizeof(host_resp));
memset(&all_resp, 0, sizeof(all_resp));
- if (cfg->s_ia == SCICLIENT_RM_DEV_NONE) {
+ if (cfg->s_ia == (uint16_t)SCICLIENT_RM_DEV_NONE) {
/* First node's interface must contain the source IRQ */
cur_n = Sciclient_rmPsGetIrqNode(0u);
if (cur_n == NULL) {
- valid = false;
+ valid = (bool)false;
} else {
cur_if = cur_n->p_if[Sciclient_rmPsGetIfIdx(0u)];
if ((cfg->s_idx < cur_if->lbase) ||
(cfg->s_idx >= (cur_if->lbase + cur_if->len))) {
- valid = false;
+ valid = (bool)false;
}
}
}
- if ((valid == true) &&
+ if ((valid == (bool)true) &&
(Sciclient_rmPsGetPsp() <= 1U)) {
/*
* Route containing zero nodes is obviously invalid. Route
* containing one node is a direct route between peripheral
* and destination processor which is an unmanaged route
*/
- valid = false;
+ valid = (bool)false;
}
- if (valid == true) {
- if (Sciclient_rmIrqCheckLoop(cfg) == true) {
+ if (valid == (bool)true) {
+ if (Sciclient_rmIrqCheckLoop(cfg) == (bool)true) {
/* There cannot be a route loop */
- valid = false;
+ valid = (bool)false;
}
}
/* Validate input and output line usage of each node */
- for (i = 0u; (i < Sciclient_rmPsGetPsp()) && (valid == true); i++) {
+ for (i = 0u; (i < Sciclient_rmPsGetPsp()) && (valid == (bool)true); i++) {
cur_n = Sciclient_rmPsGetIrqNode(i);
cur_if = cur_n->p_if[Sciclient_rmPsGetIfIdx(i)];
if (i < (Sciclient_rmPsGetPsp() - 1u)) {
next_n = Sciclient_rmPsGetIrqNode(i + 1u);
if (next_n == NULL) {
- valid = false;
+ valid = (bool)false;
break;
}
}
* programmable but are considered endpoints since
* they're the entry point for subsystems which output
* events onto the ETL bus */
- if (Sciclient_rmIrIsIr(cur_n->id) != true) {
- valid = false;
+ if (Sciclient_rmIrIsIr(cur_n->id) != (bool)true) {
+ valid = (bool)false;
break;
}
}
if ((i == 0u) && (i < (Sciclient_rmPsGetPsp() - 1u))) {
- if (Sciclient_rmIaIsIa(cur_n->id) == true) {
- cur_outp_valid = false;
- next_inp_valid = false;
+ if (Sciclient_rmIaIsIa(cur_n->id) == (bool)true) {
+ cur_outp = cfg->vint;
+ cur_outp_valid = (bool)true;
+ next_inp_valid = (bool)false;
next_inp = SCICLIENT_OUTP_TO_INP(cfg->vint,
cur_if->lbase,
cur_if->rbase);
- cur_outp = cfg->vint;
- cur_outp_valid = true;
if (Sciclient_rmIrInpIsFree(next_n->id, next_inp) ==
CSL_PASS) {
- next_inp_valid = true;
+ next_inp_valid = (bool)true;
}
if (Sciclient_rmParamIsValid(cfg->valid_params,
TISCI_MSG_VALUE_RM_GLOBAL_EVENT_VALID) ==
- true) {
+ (bool)true) {
/* cur_inp = cfg global event */
cur_inp = cfg->global_evt;
if (Sciclient_rmIaValidateGlobalEvt(cur_n->id,
cur_inp) ==
CSL_PASS) {
if (Sciclient_rmPsSetInp(i, cur_inp) != CSL_PASS) {
- valid = false;
+ valid = (bool)false;
break;
}
} else {
- valid = false;
+ valid = (bool)false;
break;
}
}
} else {
/* outp is from source peripheral and specified
* by configuration so always valid */
- cur_outp_valid = true;
- next_inp_valid = false;
+ cur_outp_valid = (bool)true;
+ next_inp_valid = (bool)false;
cur_outp = cfg->s_idx;
next_inp = SCICLIENT_OUTP_TO_INP(cur_outp, cur_if->lbase,
if (Sciclient_rmIrInpIsFree(next_n->id, next_inp) ==
CSL_PASS) {
- next_inp_valid = true;
+ next_inp_valid = (bool)true;
}
}
}
req.subtype = TISCI_RESASG_SUBTYPE_IR_OUTPUT;
if (Sciclient_rmGetResourceRange(&req, &host_resp,
SCICLIENT_SERVICE_WAIT_FOREVER) != CSL_PASS) {
- valid = false;
+ valid = (bool)false;
break;
}
req.secondary_host = TISCI_HOST_ID_ALL;
if (Sciclient_rmGetResourceRange(&req, &all_resp,
SCICLIENT_SERVICE_WAIT_FOREVER) != CSL_PASS) {
- valid = false;
+ valid = (bool)false;
break;
}
- for (j = cur_if->lbase; j < cur_if->lbase + cur_if->len;
+ for (j = cur_if->lbase; j < (cur_if->lbase + cur_if->len);
j++) {
- cur_outp_valid = false;
- next_inp_valid = false;
+ cur_outp_valid = (bool)false;
+ next_inp_valid = (bool)false;
cur_outp = j;
next_inp = SCICLIENT_OUTP_TO_INP(cur_outp, cur_if->lbase,
* checking the hardware if the output validates against
* the board configuration range. */
if ((((cur_outp >= host_resp.range_start) &&
- (cur_outp < host_resp.range_start + host_resp.range_num)) ||
+ (cur_outp < (host_resp.range_start + host_resp.range_num))) ||
((cur_outp >= host_resp.range_start_sec) &&
- (cur_outp < host_resp.range_start_sec +
- host_resp.range_num_sec))) ||
+ (cur_outp < (host_resp.range_start_sec +
+ host_resp.range_num_sec)))) ||
(((cur_outp >= all_resp.range_start) &&
- (cur_outp < all_resp.range_start + all_resp.range_num)) ||
+ (cur_outp < (all_resp.range_start + all_resp.range_num))) ||
((cur_outp >= all_resp.range_start_sec) &&
- (cur_outp < all_resp.range_start_sec +
- all_resp.range_num_sec)))) {
+ (cur_outp < (all_resp.range_start_sec +
+ all_resp.range_num_sec))))) {
if (Sciclient_rmIrOutpIsFree(cur_n->id, cur_outp) ==
CSL_PASS) {
- cur_outp_valid = true;
+ cur_outp_valid = (bool)true;
}
if (Sciclient_rmIrInpIsFree(next_n->id, next_inp) ==
CSL_PASS) {
- next_inp_valid = true;
+ next_inp_valid = (bool)true;
}
- if ((cur_outp_valid == true) &&
- (next_inp_valid == true)) {
+ if ((cur_outp_valid == (bool)true) &&
+ (next_inp_valid == (bool)true)) {
break;
}
}
/* inp always valid since it's the input to the
* destination host processor which is assumed to be
* valid as long as the node output is valid */
- cur_outp_valid = false;
- next_inp_valid = true;
+ cur_outp_valid = (bool)false;
+ next_inp_valid = (bool)true;
/* Get the IR output resource range host assignments */
req.secondary_host = cfg->host;
req.subtype = TISCI_RESASG_SUBTYPE_IR_OUTPUT;
if (Sciclient_rmGetResourceRange(&req, &host_resp,
SCICLIENT_SERVICE_WAIT_FOREVER) != CSL_PASS) {
- valid = false;
+ valid = (bool)false;
break;
}
req.secondary_host = TISCI_HOST_ID_ALL;
if (Sciclient_rmGetResourceRange(&req, &all_resp,
SCICLIENT_SERVICE_WAIT_FOREVER) != CSL_PASS) {
- valid = false;
+ valid = (bool)false;
break;
}
* checking the hardware if the output validates against
* the board configuration range. */
if ((((cur_outp >= host_resp.range_start) &&
- (cur_outp < host_resp.range_start + host_resp.range_num)) ||
+ (cur_outp < (host_resp.range_start + host_resp.range_num))) ||
((cur_outp >= host_resp.range_start_sec) &&
- (cur_outp < host_resp.range_start_sec +
- host_resp.range_num_sec))) ||
+ (cur_outp < (host_resp.range_start_sec +
+ host_resp.range_num_sec)))) ||
(((cur_outp >= all_resp.range_start) &&
- (cur_outp < all_resp.range_start + all_resp.range_num)) ||
+ (cur_outp < (all_resp.range_start + all_resp.range_num))) ||
((cur_outp >= all_resp.range_start_sec) &&
- (cur_outp < all_resp.range_start_sec +
- all_resp.range_num_sec)))) {
+ (cur_outp < (all_resp.range_start_sec +
+ all_resp.range_num_sec))))) {
if ((cur_if->rid == cfg->d_id) &&
(cfg->d_irq >= (cur_if->rbase)) &&
(cfg->d_irq < (cur_if->rbase + cur_if->len))) {
if (Sciclient_rmIrOutpIsFree(cur_n->id, cur_outp) ==
CSL_PASS) {
- cur_outp_valid = true;
+ cur_outp_valid = (bool)true;
}
}
}
}
- if ((cur_outp_valid == true) && (next_inp_valid == true)) {
+ if ((cur_outp_valid == (bool)true) && (next_inp_valid == (bool)true)) {
if (i < (Sciclient_rmPsGetPsp() - (1u))) {
if (Sciclient_rmPsSetInp(i + (1u), next_inp) != CSL_PASS) {
- valid = false;
+ valid = (bool)false;
break;
}
}
if (Sciclient_rmPsSetOutp(i, cur_outp) != CSL_PASS) {
- valid = false;
+ valid = (bool)false;
break;
}
} else {
- valid = false;
+ valid = (bool)false;
break;
}
}
const struct Sciclient_rmIrqIf *cur_if;
/* Source and destination nodes cannot be IRs */
- if ((Sciclient_rmIrIsIr(cfg->s_id) == true) ||
- (Sciclient_rmIrIsIr(cfg->d_id) == true)) {
+ if ((Sciclient_rmIrIsIr(cfg->s_id) == (bool)true) ||
+ (Sciclient_rmIrIsIr(cfg->d_id) == (bool)true)) {
r = CSL_EBADARGS;
}
if (r == CSL_PASS) {
/* Retrieve source device's node */
- if ((cfg->s_ia != SCICLIENT_RM_DEV_NONE) &&
+ if ((cfg->s_ia != (uint16_t)SCICLIENT_RM_DEV_NONE) &&
(Sciclient_rmParamIsValid(cfg->valid_params,
TISCI_MSG_VALUE_RM_IA_ID_VALID) ==
- true) &&
+ (bool)true) &&
(Sciclient_rmParamIsValid(cfg->valid_params,
TISCI_MSG_VALUE_RM_VINT_VALID) ==
- true)) {
+ (bool)true)) {
r = Sciclient_rmIrqGetNode(cfg->s_ia, &cur_n);
} else {
r = Sciclient_rmIrqGetNode(cfg->s_id, &cur_n);
}
if (r == CSL_PASS) {
- search = true;
+ search = (bool)true;
Sciclient_rmPsInit();
/* Start depth at 1 since no direct connections tracked by
* IRQ tree */
search_depth = 1u;
if_idx = 0u;
} else {
- search = false;
+ search = (bool)false;
}
- while (search == true) {
- node_clear = false;
+ while (search == (bool)true) {
+ node_clear = (bool)false;
if (if_idx < cur_n->n_if) {
r = Sciclient_rmIrqGetNodeItf(cur_n, if_idx, &cur_if);
break;
}
- if ((Sciclient_rmIaIsIa(cur_n->id) == false) &&
- (Sciclient_rmPsIsEmpty() == true) &&
+ if ((Sciclient_rmIaIsIa(cur_n->id) == (bool)false) &&
+ (Sciclient_rmPsIsEmpty() == (bool)true) &&
((cfg->s_idx < cur_if->lbase) ||
(cfg->s_idx >= (cur_if->lbase + cur_if->len)))) {
/*
* connections from subsystem so not
* stored in tree. Just pop back to
* node above */
- node_clear = true;
+ node_clear = (bool)true;
/* Clear false negative */
r = CSL_PASS;
} else {
break;
}
- if (Sciclient_rmIrqRouteValidate(cfg) == true) {
+ if (Sciclient_rmIrqRouteValidate(cfg) == (bool)true) {
break;
} else {
- Sciclient_rmPsPop(&cur_n, &if_idx);
+ (void)Sciclient_rmPsPop(&cur_n, &if_idx);
}
}
if_idx++;
}
} else {
- node_clear = true;
+ node_clear = (bool)true;
}
- if (node_clear == true) {
- if (Sciclient_rmPsIsEmpty() == true) {
+ if (node_clear == (bool)true) {
+ if (Sciclient_rmPsIsEmpty() == (bool)true) {
/* Back at root node, increase search depth and
* reset the if_idx to restart the search at
* the next depth */
/* Program each intermediate node */
for (i = 0u; i < Sciclient_rmPsGetPsp(); i++) {
cur_n = Sciclient_rmPsGetIrqNode(i);
- cur_inp = Sciclient_rmPsGetInp(i);
- cur_outp = Sciclient_rmPsGetOutp(i);
+ cur_inp = (uint32_t)Sciclient_rmPsGetInp(i);
+ cur_outp = (uint32_t)Sciclient_rmPsGetOutp(i);
- if ((i == 0u) && (Sciclient_rmIaIsIa(cur_n->id) == true) &&
- (map_vint == true)) {
+ if ((i == 0u) && (Sciclient_rmIaIsIa(cur_n->id) == (bool)true) &&
+ (map_vint == (bool)true)) {
req.valid_params = (TISCI_MSG_VALUE_RM_IA_ID_VALID |
TISCI_MSG_VALUE_RM_VINT_VALID |
TISCI_MSG_VALUE_RM_GLOBAL_EVENT_VALID |
req.src_id = cfg->s_id;
req.src_index = cfg->s_idx;
req.ia_id = cfg->s_ia;
- req.vint = cur_outp;
- req.global_event = cur_inp;
+ req.vint = (uint16_t)cur_outp;
+ req.global_event = (uint16_t)cur_inp;
req.vint_status_bit_index = cfg->vint_sb;
r = Sciclient_rmIrqSetRaw(&req,
cfg->set_resp,
ia_inst = Sciclient_rmIaGetInst(cur_n->id);
if (ia_inst != NULL) {
ia_inst->vint_usage_count[cur_outp]++;
- if ((cur_outp == 0) && (cfg->vint_sb == 0)) {
- ia_inst->v0_b0_evt = cur_inp - ia_inst->sevt_offset;
+ if ((cur_outp == 0U) && (cfg->vint_sb == 0U)) {
+ ia_inst->v0_b0_evt = (uint16_t)cur_inp - ia_inst->sevt_offset;
}
}
}
TISCI_MSG_VALUE_RM_SECONDARY_HOST_VALID);
req.secondary_host = cfg->host;
req.src_id = cur_n->id;
- req.src_index = cur_inp;
+ req.src_index = (uint16_t)cur_inp;
req.dst_id = cur_n->id;
- req.dst_host_irq = cur_outp;
+ req.dst_host_irq = (uint16_t)cur_outp;
r = Sciclient_rmIrqSetRaw(&req,
cfg->set_resp,
SCICLIENT_SERVICE_WAIT_FOREVER);
- if ((r == CSL_PASS) && (cur_outp == 0)) {
+ if ((r == CSL_PASS) && (cur_outp == 0U)) {
ir_inst = Sciclient_rmIrGetInst(cur_n->id);
if (ir_inst != NULL) {
- ir_inst->inp0_mapping = cur_outp;
+ ir_inst->inp0_mapping = (uint16_t)cur_outp;
}
}
}
{
int32_t r = CSL_PASS;
bool vint_used;
- bool cfg_new_mapping = false;
- bool cfg_whole_route = false;
+ bool cfg_new_mapping = (bool)false;
+ bool cfg_whole_route = (bool)false;
struct Sciclient_rmIaInst *ia_inst = NULL;
struct tisci_msg_rm_irq_set_req req;
r = Sciclient_rmIrqIsVintRouteSet(cfg, &vint_used);
if (r == CSL_PASS) {
- if ((vint_used == true) ||
+ if ((vint_used == (bool)true) ||
(Sciclient_rmIrqCfgIsEventToVintMappingOnly(cfg) ==
- true)) {
+ (bool)true)) {
/*
* VINT already has events mapped to it or
* configuration is for a polled event. Add a new
* event mapping but do not configure any route
* post the VINT since that's already been set up.
*/
- cfg_new_mapping = true;
+ cfg_new_mapping = (bool)true;
} else {
/*
* VINT has no events mapped. Map the new event
* within the VINT and then configure the entire
* interrupt route post the VINT.
*/
- cfg_whole_route = true;
+ cfg_whole_route = (bool)true;
}
}
- if (cfg_new_mapping == true) {
+ if (cfg_new_mapping == (bool)true) {
req.valid_params = (TISCI_MSG_VALUE_RM_IA_ID_VALID |
TISCI_MSG_VALUE_RM_VINT_VALID |
TISCI_MSG_VALUE_RM_GLOBAL_EVENT_VALID |
ia_inst = Sciclient_rmIaGetInst(cfg->s_ia);
if (ia_inst != NULL) {
ia_inst->vint_usage_count[cfg->vint]++;
- if ((cfg->vint == 0) && (cfg->vint_sb == 0)) {
+ if ((cfg->vint == 0U) && (cfg->vint_sb == 0U)) {
ia_inst->v0_b0_evt = cfg->global_evt - ia_inst->sevt_offset;
}
}
}
}
- if (cfg_whole_route == true) {
+ if (cfg_whole_route == (bool)true) {
r = Sciclient_rmIrqFindRoute(cfg);
if (r == CSL_PASS) {
- r = Sciclient_rmIrqProgramRoute(cfg, true);
+ r = Sciclient_rmIrqProgramRoute(cfg, (bool)true);
}
}
* OES register and the event to VINT status bit
* mapping
*/
- r = Sciclient_rmIrqProgramRoute(cfg, false);
+ r = Sciclient_rmIrqProgramRoute(cfg, (bool)false);
}
}
const struct Sciclient_rmIrqIf *cur_if;
/* Source and destination nodes cannot be IRs */
- if ((Sciclient_rmIrIsIr(cfg->s_id) == true) ||
- (Sciclient_rmIrIsIr(cfg->d_id) == true)) {
+ if ((Sciclient_rmIrIsIr(cfg->s_id) == (bool)true) ||
+ (Sciclient_rmIrIsIr(cfg->d_id) == (bool)true)) {
r = CSL_EBADARGS;
}
if (r == CSL_PASS) {
- if ((cfg->s_ia != SCICLIENT_RM_DEV_NONE) &&
+ if ((cfg->s_ia != (uint16_t)SCICLIENT_RM_DEV_NONE) &&
(Sciclient_rmParamIsValid(cfg->valid_params,
TISCI_MSG_VALUE_RM_IA_ID_VALID) ==
- true) &&
+ (bool)true) &&
(Sciclient_rmParamIsValid(cfg->valid_params,
TISCI_MSG_VALUE_RM_VINT_VALID) ==
- true)) {
+ (bool)true)) {
if ((Sciclient_rmParamIsValid(cfg->valid_params,
TISCI_MSG_VALUE_RM_GLOBAL_EVENT_VALID) ==
- true) &&
+ (bool)true) &&
(Sciclient_rmParamIsValid(cfg->valid_params,
TISCI_MSG_VALUE_RM_VINT_STATUS_BIT_INDEX_VALID) ==
- true)) {
+ (bool)true)) {
r = Sciclient_rmIaValidateMapping(cfg->host, cfg->s_ia,
cfg->vint, cfg->global_evt,
cfg->vint_sb);
}
if (r == CSL_PASS) {
- search = true;
- rt_complete = false;
+ search = (bool)true;
+ rt_complete = (bool)false;
Sciclient_rmPsInit();
} else {
- search = false;
+ search = (bool)false;
}
for (search_depth = 0u;
- (search_depth < Sciclient_rmPsGetMaxPsp()) && (search == true);
+ (search_depth < Sciclient_rmPsGetMaxPsp()) && (search == (bool)true);
search_depth++) {
- push_node = false;
+ push_node = (bool)false;
for (if_idx = 0u; if_idx < cur_n->n_if; if_idx++) {
r = Sciclient_rmIrqGetNodeItf(cur_n, if_idx, &cur_if);
(SCICLIENT_OUTP_TO_INP(outp, cur_if->lbase,
cur_if->rbase) ==
cfg->d_irq)) {
- rt_complete = true;
+ rt_complete = (bool)true;
break;
}
- if (Sciclient_rmIrIsIr(cur_if->rid) == true) {
+ if (Sciclient_rmIrIsIr(cur_if->rid) == (bool)true) {
r = Sciclient_rmIrqGetNode(cur_if->rid, &next_n);
if (r != CSL_PASS) {
break;
r = Sciclient_rmIrGetOutp(next_n->id, next_inp,
&next_outp);
if (r == CSL_PASS) {
- push_node = true;
+ push_node = (bool)true;
r = CSL_PASS;
break;
}
break;
}
- if ((rt_complete == true) || (push_node == true)) {
+ if ((rt_complete == (bool)true) || (push_node == (bool)true)) {
/* Route passes through next
* node so save current node
* and index since it's valid */
if ((search_depth > 0u) ||
((search_depth == 0u) &&
- (Sciclient_rmIaIsIa(cur_n->id) == true))) {
+ (Sciclient_rmIaIsIa(cur_n->id) == (bool)true))) {
/* Only push inp and outp to stack for
* intermediate routing subsystems or
* if the first node is an IA */
}
}
- if (rt_complete == true) {
+ if (rt_complete == (bool)true) {
break;
} else {
cur_n = next_n;
/* Delete connection through each intermediate node */
for (i = 0u; i < Sciclient_rmPsGetPsp(); i++) {
cur_n = Sciclient_rmPsGetIrqNode(i);
- cur_inp = Sciclient_rmPsGetInp(i);
- cur_outp = Sciclient_rmPsGetOutp(i);
+ cur_inp = (uint16_t)Sciclient_rmPsGetInp(i);
+ cur_outp = (uint16_t)Sciclient_rmPsGetOutp(i);
- if ((i == 0u) && (Sciclient_rmIaIsIa(cur_n->id) == true) &&
- (unmap_vint == true)) {
+ if ((i == 0u) && (Sciclient_rmIaIsIa(cur_n->id) == (bool)true) &&
+ (unmap_vint == (bool)true)) {
req.valid_params = (TISCI_MSG_VALUE_RM_IA_ID_VALID |
TISCI_MSG_VALUE_RM_VINT_VALID |
TISCI_MSG_VALUE_RM_GLOBAL_EVENT_VALID |
ia_inst = Sciclient_rmIaGetInst(cur_n->id);
if (ia_inst != NULL) {
ia_inst->vint_usage_count[cur_outp]--;
- if (ia_inst->v0_b0_evt == cur_inp - ia_inst->sevt_offset) {
+ if ((ia_inst->v0_b0_evt) == ((cur_inp) - ia_inst->sevt_offset)) {
ia_inst->v0_b0_evt = SCICLIENT_RM_IA_GENERIC_EVT_RESETVAL;
}
}
req.dst_host_irq = cur_outp;
r = Sciclient_rmIrqReleaseRaw(&req,
SCICLIENT_SERVICE_WAIT_FOREVER);
- if ((r == CSL_PASS) && (cur_outp == 0)) {
+ if ((r == CSL_PASS) && (cur_outp == 0U)) {
ir_inst = Sciclient_rmIrGetInst(cur_n->id);
if (ir_inst != NULL) {
ir_inst->inp0_mapping = SCICLIENT_RM_IR_MAPPING_FREE;
{
int32_t r = CSL_PASS;
uint8_t num_evts;
- bool del_mapping = false;
- bool del_whole_route = false;
+ bool del_mapping = (bool)false;
+ bool del_whole_route = (bool)false;
struct Sciclient_rmIaInst *ia_inst = NULL;
struct tisci_msg_rm_irq_release_req req;
r = CSL_EBADARGS;
} else if ((num_evts > 1u) ||
(Sciclient_rmIrqCfgIsEventToVintMappingOnly(cfg) ==
- true)) {
+ (bool)true)) {
/*
* VINT has multiple events mapped to it or
* configuration is for a polled event. Delete
* VINT since the remaining mappings need to the
* entire route to remain configured.
*/
- del_mapping = true;
+ del_mapping = (bool)true;
} else {
/*
* VINT has one event mapped. Delete the last event
* within the VINT and then delete the entire
* interrupt route post the VINT.
*/
- del_whole_route = true;
+ del_whole_route = (bool)true;
}
}
- if (del_mapping == true) {
+ if (del_mapping == (bool)true) {
req.valid_params = (TISCI_MSG_VALUE_RM_IA_ID_VALID |
TISCI_MSG_VALUE_RM_VINT_VALID |
TISCI_MSG_VALUE_RM_GLOBAL_EVENT_VALID |
ia_inst = Sciclient_rmIaGetInst(cfg->s_ia);
if (ia_inst != NULL) {
ia_inst->vint_usage_count[cfg->vint]--;
- if (ia_inst->v0_b0_evt == cfg->global_evt - ia_inst->sevt_offset) {
+ if (ia_inst->v0_b0_evt == (cfg->global_evt - ia_inst->sevt_offset)) {
ia_inst->v0_b0_evt = SCICLIENT_RM_IA_GENERIC_EVT_RESETVAL;
}
}
}
}
- if (del_whole_route == true) {
+ if (del_whole_route == (bool)true) {
r = Sciclient_rmIrqGetRoute(cfg);
if (r == CSL_PASS) {
- r = Sciclient_rmIrqDeleteRoute(cfg, true);
+ r = Sciclient_rmIrqDeleteRoute(cfg, (bool)true);
}
}
if (r == CSL_PASS) {
r = Sciclient_rmIrqGetRoute(cfg);
if (r == CSL_PASS) {
- r = Sciclient_rmIrqDeleteRoute(cfg, false);
+ r = Sciclient_rmIrqDeleteRoute(cfg, (bool)false);
}
}
struct Sciclient_rmIaInst *inst = NULL;
uint16_t i;
- for (i = 0; i < SCICLIENT_RM_IA_NUM_INST; i++) {
+ for (i = 0; i < (uint16_t)SCICLIENT_RM_IA_NUM_INST; i++) {
if (id == gRmIaInstances[i].dev_id) {
inst = &gRmIaInstances[i];
break;
static bool Sciclient_rmIaEvtRomMapped(const struct Sciclient_rmIaInst *inst,
uint16_t evt)
{
- bool rom_mapped = false;
+ bool rom_mapped = (bool)false;
uint8_t i;
if (inst->rom_usage != NULL) {
for (i = 0u; i < inst->n_rom_usage; i++) {
- if ((inst->rom_usage[i].cleared == false) &&
+ if ((inst->rom_usage[i].cleared == (bool)false) &&
(evt == (inst->rom_usage[i].event - inst->sevt_offset))) {
- rom_mapped = true;
- inst->rom_usage[i].cleared = true;
+ rom_mapped = (bool)true;
+ inst->rom_usage[i].cleared = (bool)true;
break;
}
}
@@ -2543,11 +2544,11 @@ static int32_t Sciclient_rmIaValidateEvt(const struct Sciclient_rmIaInst *ins
#ifdef QNX_OS
entry_int_map_lo = ((uint32_t *) mmap_device_memory(0, sizeof(uint32_t), PROT_READ|PROT_WRITE|PROT_NOCACHE, 0, (uint64_t)entry_int_map_lo));
#endif
- if (in_use == true) {
+ if (in_use == (bool)true) {
/* Check if event is in use */
- reg_vint = CSL_REG32_FEXT(entry_int_map_lo,
+ reg_vint = (uint16_t)CSL_REG32_FEXT(entry_int_map_lo,
INTAGGR_IMAP_GEVI_IMAP_REGNUM);
- reg_sb = CSL_REG32_FEXT(entry_int_map_lo,
+ reg_sb = (uint16_t)CSL_REG32_FEXT(entry_int_map_lo,
INTAGGR_IMAP_GEVI_IMAP_BITNUM);
if ((reg_vint == 0u) && (reg_sb == 0u)) {
/*
* request to configure the IA.
*/
if (((CSL_REG32_RD(entry_int_map_lo) != 0u) &&
- (Sciclient_rmIaEvtRomMapped(inst, evt) == false)) ||
+ (Sciclient_rmIaEvtRomMapped(inst, evt) == (bool)false)) ||
(evt == inst->v0_b0_evt)) {
r = CSL_EBADARGS;
}
if (r == CSL_PASS) {
evt = global_evt - inst->sevt_offset;
/* Check if event is free */
- r = Sciclient_rmIaValidateEvt(inst, evt, 0u, 0u, false);
+ r = Sciclient_rmIaValidateEvt(inst, evt, 0u, 0u, (bool)false);
}
return r;
entry_int_map_lo = ((uint32_t *) mmap_device_memory(0, sizeof(uint32_t), PROT_READ|PROT_WRITE|PROT_NOCACHE, 0, (uint64_t)entry_int_map_lo));
#endif
/* Check if event is in use */
- reg_vint = CSL_REG32_FEXT(entry_int_map_lo,
+ reg_vint = (uint16_t)CSL_REG32_FEXT(entry_int_map_lo,
INTAGGR_IMAP_GEVI_IMAP_REGNUM);
- reg_sb = CSL_REG32_FEXT(entry_int_map_lo,
+ reg_sb = (uint16_t)CSL_REG32_FEXT(entry_int_map_lo,
INTAGGR_IMAP_GEVI_IMAP_BITNUM);
#ifdef QNX_OS
munmap_device_memory((void *)entry_int_map_lo, sizeof(uint32_t));
static bool Sciclient_rmIaIsIa(uint16_t id)
{
- bool r = false;
+ bool r = (bool)false;
if (Sciclient_rmIaGetInst(id) != NULL) {
- r = true;
+ r = (bool)true;
}
return r;
static uint32_t Sciclient_rmIrIntControlReg(uint16_t outp)
{
- return (outp * SCICLIENT_IR_INT_CONTROL_REG_STEP) +
- SCICLIENT_IR_INT_CONTROL_REG_OFFSET;
+ uint32_t ret=0U;
+
+ ret= (((uint16_t)outp) * SCICLIENT_IR_INT_CONTROL_REG_STEP) + SCICLIENT_IR_INT_CONTROL_REG_OFFSET;
+ return (ret);
}
static struct Sciclient_rmIrInst *Sciclient_rmIrGetInst(uint16_t id)
struct Sciclient_rmIrInst *inst = NULL;
uint16_t i;
- for (i = 0; i < SCICLIENT_RM_IR_NUM_INST; i++) {
+ for (i = 0; i < (uint16_t)SCICLIENT_RM_IR_NUM_INST; i++) {
if (id == gRmIrInstances[i].dev_id) {
inst = &gRmIrInstances[i];
break;
static bool Sciclient_rmIrInpRomMapped(const struct Sciclient_rmIrInst *inst,
uint16_t inp)
{
- bool rom_mapped = false;
+ bool rom_mapped = (bool)false;
uint8_t i;
if (inst->rom_usage != NULL) {
for (i = 0u; i < inst->n_rom_usage; i++) {
- if ((inst->rom_usage[i].cleared == false) &&
+ if ((inst->rom_usage[i].cleared == (bool)false) &&
(inp >= inst->rom_usage[i].inp_start) &&
(inp < (inst->rom_usage[i].inp_start +
inst->rom_usage[i].length))) {
- rom_mapped = true;
- inst->rom_usage[i].cleared = true;
+ rom_mapped = (bool)true;
+ inst->rom_usage[i].cleared = (bool)true;
break;
}
}
if (r == CSL_PASS) {
if (inp == 0u) {
- if (inst->inp0_mapping != SCICLIENT_RM_IR_MAPPING_FREE) {
+ if (inst->inp0_mapping != (uint16_t)SCICLIENT_RM_IR_MAPPING_FREE) {
r = CSL_EFAIL;
}
} else {
#ifdef QNX_OS
int_ctrl_reg = ((uint32_t *) mmap_device_memory(0, sizeof(uint32_t), PROT_READ|PROT_WRITE|PROT_NOCACHE, 0, (uint64_t)int_ctrl_reg));
#endif
- extracted_inp = CSL_REG32_FEXT(int_ctrl_reg,
+ extracted_inp = (uint16_t)CSL_REG32_FEXT(int_ctrl_reg,
INTR_ROUTER_CFG_MUXCNTL_ENABLE);
#ifdef QNX_OS
munmap_device_memory((void *)int_ctrl_reg, sizeof(uint32_t));
* the IR.
*/
if ((extracted_inp == inp) &&
- (Sciclient_rmIrInpRomMapped(inst, inp) == false)) {
+ (Sciclient_rmIrInpRomMapped(inst, inp) == (bool)false)) {
/* Input in use */
r = CSL_EFAIL;
break;
static bool Sciclient_rmIrOutpRomMapped(const struct Sciclient_rmIrInst *inst,
uint16_t outp)
{
- bool rom_mapped = false;
+ bool rom_mapped = (bool)false;
uint8_t i;
if (inst->rom_usage != NULL) {
for (i = 0u; i < inst->n_rom_usage; i++) {
- if ((inst->rom_usage[i].opCleared == false) &&
+ if ((inst->rom_usage[i].opCleared == (bool)false) &&
(outp >= inst->rom_usage[i].outp_start) &&
(outp < (inst->rom_usage[i].outp_start +
inst->rom_usage[i].length))) {
- rom_mapped = true;
- inst->rom_usage[i].opCleared = true;
+ rom_mapped = (bool)true;
+ inst->rom_usage[i].opCleared = (bool)true;
break;
}
}
#ifdef QNX_OS
int_ctrl_reg = ((uint32_t *) mmap_device_memory(0, sizeof(uint32_t), PROT_READ|PROT_WRITE|PROT_NOCACHE, 0, (uint64_t)int_ctrl_reg));
#endif
- extracted_inp = CSL_REG32_FEXT(int_ctrl_reg,
+ extracted_inp = (uint16_t)CSL_REG32_FEXT(int_ctrl_reg,
INTR_ROUTER_CFG_MUXCNTL_ENABLE);
#ifdef QNX_OS
munmap_device_memory((void *)int_ctrl_reg, sizeof(uint32_t));
* the IR.
*/
if (((extracted_inp != 0u) &&
- (Sciclient_rmIrOutpRomMapped(inst, outp) == false)) ||
+ (Sciclient_rmIrOutpRomMapped(inst, outp) == (bool)false)) ||
(outp == inst->inp0_mapping)) {
/*
* MUX CONTROL register's default value is zero which
if ((r == CSL_PASS) && (inp == 0u)) {
/* Use instance's input zero mapping to find output */
- if (inst->inp0_mapping != SCICLIENT_RM_IR_MAPPING_FREE) {
+ if (inst->inp0_mapping != (uint16_t)SCICLIENT_RM_IR_MAPPING_FREE) {
/* Input zero mapping is valid. Return the output. */
*outp = inst->inp0_mapping;
} else {
#ifdef QNX_OS
int_ctrl_reg = ((uint32_t *) mmap_device_memory(0, sizeof(uint32_t), PROT_READ|PROT_WRITE|PROT_NOCACHE, 0, (uint64_t)int_ctrl_reg));
#endif
- extracted_inp = CSL_REG32_FEXT(int_ctrl_reg,
+ extracted_inp = (uint16_t)CSL_REG32_FEXT(int_ctrl_reg,
INTR_ROUTER_CFG_MUXCNTL_ENABLE);
#ifdef QNX_OS
munmap_device_memory((void *)int_ctrl_reg, sizeof(uint32_t));
static bool Sciclient_rmIrIsIr(uint16_t id)
{
- bool r = false;
+ bool r = (bool)false;
if (Sciclient_rmIrGetInst(id) != NULL) {
- r = true;
+ r = (bool)true;
}
return r;