[TI Clang Migration][Phase 2]

[processor-sdk/pdk.git] / packages / ti / drv / spi / example / mcspiLoopbackApp / src / mcspiLoopbackApp.c

diff --git a/packages/ti/drv/spi/example/mcspiLoopbackApp/src/mcspiLoopbackApp.c b/packages/ti/drv/spi/example/mcspiLoopbackApp/src/mcspiLoopbackApp.c
index 73734636da27da58601ebd4d6eb16b1bde89bcc2..198dd112460f3a1c1c365364e06d285883f7e167 100755 (executable)
--- a/packages/ti/drv/spi/example/mcspiLoopbackApp/src/mcspiLoopbackApp.c
+++ b/packages/ti/drv/spi/example/mcspiLoopbackApp/src/mcspiLoopbackApp.c
@@ -207,7 +207,7 @@ void padConfig_prcmEnable()
     HW_WR_REG32(SOC_CORE_PAD_IO_REGISTERS_BASE+CTRL_CORE_PAD_IO_SPI1_D1,0x00040000);
 
     /* IPU1 crossbar */
-#if defined (__TI_ARM_V7M4__)
+#if ((__ARM_ARCH == 7) && (__ARM_ARCH_PROFILE == 'M'))
     CSL_xbarIrqConfigure(CSL_XBAR_IRQ_CPU_ID_IPU1, CSL_XBAR_INST_IPU1_IRQ_44, CSL_XBAR_UART1_IRQ);
 #elif defined(_TMS320C6X)
     CSL_xbarIrqConfigure(CSL_XBAR_IRQ_CPU_ID_DSP1, CSL_XBAR_INST_DSP1_IRQ_44, CSL_XBAR_UART1_IRQ);