diff --git a/packages/ti/drv/udma/unit_test/udma_ut/src/udma_testcases.h b/packages/ti/drv/udma/unit_test/udma_ut/src/udma_testcases.h
index 74a1658b3cddffb2b482cd066565b1a56a803d02..65ab3b6d02b5fab90a9f2169c2f0d77a4c65f388 100755 (executable)
{
.enableTest = TEST_ENABLE,
.tcId = 3467U,
- .tcName = "Main NAVSS Blockcpy DDR to DDR in polling mode",
+ .tcName = UDMA_TEST_MAIN_BC_TCNAME_PREFIX "Blockcpy DDR to DDR in polling mode",
.disableInfo= NULL,
.printEnable= PRINT_ENABLE,
.prfEnable = PRF_DISABLE,
.testFxnPtr = {&udmaTestBlkcpyTc},
.pacingTime = {PACING_NONE},
.numCh = {1U},
- .instId = {UDMA_INST_ID_MAIN_0},
+ .instId = {UDMA_TEST_INST_ID_MAIN_BC},
.chPrmId = {UDMA_TEST_CH_PRMID_DEF},
.qdepth = {USE_DEF_QDEPTH},
.icnt = {
{
.enableTest = TEST_ENABLE,
.tcId = 3473U,
- .tcName = "Main NAVSS Blockcpy DDR to DDR in interrupt mode",
+ .tcName = UDMA_TEST_MAIN_BC_TCNAME_PREFIX "Blockcpy DDR to DDR in interrupt mode",
.disableInfo= NULL,
.printEnable= PRINT_ENABLE,
.prfEnable = PRF_DISABLE,
.testFxnPtr = {&udmaTestBlkcpyTc},
.pacingTime = {PACING_NONE},
.numCh = {1U},
- .instId = {UDMA_INST_ID_MAIN_0},
+ .instId = {UDMA_TEST_INST_ID_MAIN_BC},
.chPrmId = {UDMA_TEST_CH_PRMID_INTR_DEF},
.qdepth = {USE_DEF_QDEPTH},
.icnt = {
.runFlag = (UDMA_TEST_RF_MAIN_BC | UDMA_TEST_RF_CFG_DYN),
.ringPrmId = UDMA_TEST_RING_PRMID_INVALID,
},
+#if (UDMA_SOC_CFG_UDMAP_PRESENT == 1)
{
.enableTest = TEST_ENABLE,
.tcId = 3474U,
- .tcName = "MCU NAVSS Blockcpy DDR to DDR in polling mode",
+ .tcName = UDMA_TEST_MCU_BC_TCNAME_PREFIX "Blockcpy DDR to DDR in polling mode",
.disableInfo= NULL,
.printEnable= PRINT_ENABLE,
.prfEnable = PRF_DISABLE,
.testFxnPtr = {&udmaTestBlkcpyTc},
.pacingTime = {PACING_NONE},
.numCh = {1U},
- .instId = {UDMA_INST_ID_MCU_0},
+ .instId = {UDMA_TEST_INST_ID_MCU_BC},
.chPrmId = {UDMA_TEST_CH_PRMID_DEF},
.qdepth = {USE_DEF_QDEPTH},
.icnt = {
{
.enableTest = TEST_ENABLE,
.tcId = 3475U,
- .tcName = "MCU NAVSS Blockcpy DDR to DDR",
+ .tcName = UDMA_TEST_MCU_BC_TCNAME_PREFIX "Blockcpy DDR to DDR",
.disableInfo= NULL,
.printEnable= PRINT_ENABLE,
.prfEnable = PRF_DISABLE,
.testFxnPtr = {&udmaTestBlkcpyTc},
.pacingTime = {PACING_NONE},
.numCh = {1U},
- .instId = {UDMA_INST_ID_MCU_0},
+ .instId = {UDMA_TEST_INST_ID_MCU_BC},
.chPrmId = {UDMA_TEST_CH_PRMID_INTR_DEF},
.qdepth = {USE_DEF_QDEPTH},
.icnt = {
.runFlag = (UDMA_TEST_RF_MCU_BC | UDMA_TEST_RF_CFG_DYN),
.ringPrmId = UDMA_TEST_RING_PRMID_INVALID,
},
+#endif /* #if (UDMA_SOC_CFG_UDMAP_PRESENT == 1) */
{
.enableTest = TEST_ENABLE,
.tcId = 3476U,
- .tcName = "Main NAVSS Blockcpy DDR to DDR SW global 0 trigger test in polling mode",
+ .tcName = UDMA_TEST_MAIN_BC_TCNAME_PREFIX "Blockcpy DDR to DDR SW global 0 trigger test in polling mode",
.disableInfo= NULL,
.printEnable= PRINT_ENABLE,
.prfEnable = PRF_DISABLE,
.testFxnPtr = {&udmaTestBlkcpyTc},
.pacingTime = {PACING_NONE},
.numCh = {1U},
- .instId = {UDMA_INST_ID_MAIN_0},
+ .instId = {UDMA_TEST_INST_ID_MAIN_BC},
.chPrmId = {UDMA_TEST_CH_PRMID_TRIGGER_GLOBAL0},
.qdepth = {USE_DEF_QDEPTH},
.icnt = {
{
.enableTest = TEST_ENABLE,
.tcId = 3477U,
- .tcName = "Main NAVSS Blockcpy DDR to DDR SW global 0 trigger test in interrupt mode",
+ .tcName = UDMA_TEST_MAIN_BC_TCNAME_PREFIX "Blockcpy DDR to DDR SW global 0 trigger test in interrupt mode",
.disableInfo= NULL,
.printEnable= PRINT_ENABLE,
.prfEnable = PRF_DISABLE,
.testFxnPtr = {&udmaTestBlkcpyTc},
.pacingTime = {PACING_NONE},
.numCh = {1U},
- .instId = {UDMA_INST_ID_MAIN_0},
+ .instId = {UDMA_TEST_INST_ID_MAIN_BC},
.chPrmId = {UDMA_TEST_CH_PRMID_TRIGGER_GLOBAL0_INTR},
.qdepth = {USE_DEF_QDEPTH},
.icnt = {
.runFlag = (UDMA_TEST_RF_MAIN_BC),
.ringPrmId = UDMA_TEST_RING_PRMID_INVALID,
},
+#if (UDMA_SOC_CFG_UDMAP_PRESENT == 1)
{
.enableTest = TEST_ENABLE,
.tcId = 3478U,
- .tcName = "MCU NAVSS Blockcpy DDR to DDR SW global 0 trigger test in polling mode",
+ .tcName = UDMA_TEST_MCU_BC_TCNAME_PREFIX "Blockcpy DDR to DDR SW global 0 trigger test in polling mode",
.disableInfo= NULL,
.printEnable= PRINT_ENABLE,
.prfEnable = PRF_DISABLE,
.testFxnPtr = {&udmaTestBlkcpyTc},
.pacingTime = {PACING_NONE},
.numCh = {1U},
- .instId = {UDMA_INST_ID_MCU_0},
+ .instId = {UDMA_TEST_INST_ID_MCU_BC},
.chPrmId = {UDMA_TEST_CH_PRMID_TRIGGER_GLOBAL0},
.qdepth = {USE_DEF_QDEPTH},
.icnt = {
{
.enableTest = TEST_ENABLE,
.tcId = 3479U,
- .tcName = "MCU NAVSS Blockcpy DDR to DDR SW global 0 trigger test",
+ .tcName = UDMA_TEST_MCU_BC_TCNAME_PREFIX "Blockcpy DDR to DDR SW global 0 trigger test",
.disableInfo= NULL,
.printEnable= PRINT_ENABLE,
.prfEnable = PRF_DISABLE,
.testFxnPtr = {&udmaTestBlkcpyTc},
.pacingTime = {PACING_NONE},
.numCh = {1U},
- .instId = {UDMA_INST_ID_MCU_0},
+ .instId = {UDMA_TEST_INST_ID_MCU_BC},
.chPrmId = {UDMA_TEST_CH_PRMID_TRIGGER_GLOBAL0_INTR},
.qdepth = {USE_DEF_QDEPTH},
.icnt = {
.runFlag = (UDMA_TEST_RF_MCU_BC),
.ringPrmId = UDMA_TEST_RING_PRMID_INVALID,
},
+#endif /* #if (UDMA_SOC_CFG_UDMAP_PRESENT == 1) */
{
.enableTest = TEST_ENABLE,
.tcId = 3480U,
- .tcName = "MCU NAVSS Blockcpy circular 1KB DDR to DDR 1KB ICNT1 TR event type test",
+ .tcName = UDMA_TEST_MCU_BC_TCNAME_PREFIX "Blockcpy circular 1KB DDR to DDR 1KB ICNT1 TR event type test",
.disableInfo= NULL,
.printEnable= PRINT_ENABLE,
.prfEnable = PRF_DISABLE,
.testFxnPtr = {&udmaTestBlkcpyTc},
.pacingTime = {PACING_NONE},
.numCh = {1U},
- .instId = {UDMA_INST_ID_MCU_0},
+ .instId = {UDMA_TEST_INST_ID_MCU_BC},
.chPrmId = {UDMA_TEST_CH_PRMID_EVENTSIZE_ICNT1},
.qdepth = {USE_DEF_QDEPTH},
.icnt = {
{
.enableTest = TEST_ENABLE,
.tcId = 3481U,
- .tcName = "MCU NAVSS Blockcpy circular 1KB DDR to DDR 1MB ICNT2 TR event type test",
+ .tcName = UDMA_TEST_MCU_BC_TCNAME_PREFIX "Blockcpy circular 1KB DDR to DDR 1MB ICNT2 TR event type test",
.disableInfo= NULL,
.printEnable= PRINT_ENABLE,
.prfEnable = PRF_DISABLE,
.testFxnPtr = {&udmaTestBlkcpyTc},
.pacingTime = {PACING_NONE},
.numCh = {1U},
- .instId = {UDMA_INST_ID_MCU_0},
+ .instId = {UDMA_TEST_INST_ID_MCU_BC},
.chPrmId = {UDMA_TEST_CH_PRMID_EVENTSIZE_ICNT2},
.qdepth = {USE_DEF_QDEPTH},
.icnt = {
{
.enableTest = TEST_ENABLE,
.tcId = 3482U,
- .tcName = "MCU NAVSS Blockcpy circular 1KB DDR to DDR 1MB ICNT3 TR event type test",
+ .tcName = UDMA_TEST_MCU_BC_TCNAME_PREFIX "Blockcpy circular 1KB DDR to DDR 1MB ICNT3 TR event type test",
.disableInfo= NULL,
.printEnable= PRINT_ENABLE,
.prfEnable = PRF_DISABLE,
.testFxnPtr = {&udmaTestBlkcpyTc},
.pacingTime = {PACING_NONE},
.numCh = {1U},
- .instId = {UDMA_INST_ID_MCU_0},
+ .instId = {UDMA_TEST_INST_ID_MCU_BC},
.chPrmId = {UDMA_TEST_CH_PRMID_EVENTSIZE_ICNT3},
.qdepth = {USE_DEF_QDEPTH},
.icnt = {
{
.enableTest = TEST_ENABLE,
.tcId = 3516U,
- .tcName = "Main NAVSS Blockcpy MSMC to MSMC in interrupt mode",
+ .tcName = UDMA_TEST_MAIN_BC_TCNAME_PREFIX "Blockcpy MSMC to MSMC in interrupt mode",
.disableInfo= NULL,
.printEnable= PRINT_ENABLE,
.prfEnable = PRF_DISABLE,
.testFxnPtr = {&udmaTestBlkcpyTc},
.pacingTime = {PACING_NONE},
.numCh = {1U},
- .instId = {UDMA_INST_ID_MAIN_0},
+ .instId = {UDMA_TEST_INST_ID_MAIN_BC},
.chPrmId = {UDMA_TEST_CH_PRMID_INTR_DEF},
.qdepth = {USE_DEF_QDEPTH},
.icnt = {
.runFlag = (UDMA_TEST_RF_MAIN_BC),
.ringPrmId = UDMA_TEST_RING_PRMID_INVALID,
},
+#if (UDMA_SOC_CFG_UDMAP_PRESENT == 1)
{
.enableTest = TEST_ENABLE,
.tcId = 3483U,
- .tcName = "MCU NAVSS Blockcpy MSMC to MSMC in interrupt mode",
+ .tcName = UDMA_TEST_MCU_BC_TCNAME_PREFIX "Blockcpy MSMC to MSMC in interrupt mode",
.disableInfo= NULL,
.printEnable= PRINT_ENABLE,
.prfEnable = PRF_DISABLE,
.testFxnPtr = {&udmaTestBlkcpyTc},
.pacingTime = {PACING_NONE},
.numCh = {1U},
- .instId = {UDMA_INST_ID_MCU_0},
+ .instId = {UDMA_TEST_INST_ID_MCU_BC},
.chPrmId = {UDMA_TEST_CH_PRMID_INTR_DEF},
.qdepth = {USE_DEF_QDEPTH},
.icnt = {
.runFlag = (UDMA_TEST_RF_MCU_BC),
.ringPrmId = UDMA_TEST_RING_PRMID_INVALID,
},
+#endif /* #if (UDMA_SOC_CFG_UDMAP_PRESENT == 1) */
+#if (UDMA_TEST_SOC_OCMC_MEM_PRESENT == 1)
{
.enableTest = TEST_ENABLE,
.tcId = 3484U,
- .tcName = "MCU NAVSS Blockcpy OCMC to OCMC in interrupt mode",
+ .tcName = UDMA_TEST_MCU_BC_TCNAME_PREFIX "Blockcpy OCMC to OCMC in interrupt mode",
.disableInfo= NULL,
.printEnable= PRINT_ENABLE,
.prfEnable = PRF_DISABLE,
.testFxnPtr = {&udmaTestBlkcpyTc},
.pacingTime = {PACING_NONE},
.numCh = {1U},
- .instId = {UDMA_INST_ID_MCU_0},
+ .instId = {UDMA_TEST_INST_ID_MCU_BC},
.chPrmId = {UDMA_TEST_CH_PRMID_INTR_DEF},
.qdepth = {USE_DEF_QDEPTH},
.icnt = {
.heapIdDest = {UTILS_MEM_HEAP_ID_INTERNAL},
.srcBufSize = {UDMA_TEST_DEF_ICNT0},
.destBufSize= {UDMA_TEST_DEF_DICNT0},
- .runFlag = (UDMA_TEST_RF_MCU_BC),
+ .runFlag = (UDMA_TEST_RF_MCU_BC_INTERNAL_MEM),
.ringPrmId = UDMA_TEST_RING_PRMID_INVALID,
},
+#endif /*#if (UDMA_TEST_SOC_OCMC_MEM_PRESENT == 1) */
+#ifndef UDMA_TEST_SOC_PRESILICON
{
.enableTest = TEST_ENABLE,
.tcId = 3485U,
- .tcName = "Main NAVSS Blockcpy DDR 1MB to DDR 1MB performance test",
+ .tcName = UDMA_TEST_MAIN_BC_TCNAME_PREFIX "Blockcpy DDR 1MB to DDR 1MB performance test",
.disableInfo= NULL,
.printEnable= PRINT_ENABLE,
.prfEnable = PRF_ENABLE,
.testFxnPtr = {&udmaTestBlkcpyTc},
.pacingTime = {PACING_NONE},
.numCh = {1U},
- .instId = {UDMA_INST_ID_MAIN_0},
+ .instId = {UDMA_TEST_INST_ID_MAIN_BC},
.chPrmId = {UDMA_TEST_CH_PRMID_INTR_DEF},
.qdepth = {UDMA_TEST_PERF_QDEPTH},
.icnt = {
{
.enableTest = TEST_ENABLE,
.tcId = 3486U,
- .tcName = "Main NAVSS 2D Blockcpy MSMC circular 1KB to DDR 1MB performance test",
+ .tcName = UDMA_TEST_MAIN_BC_TCNAME_PREFIX "2D Blockcpy MSMC circular 1KB to DDR 1MB performance test",
.disableInfo= NULL,
.printEnable= PRINT_ENABLE,
.prfEnable = PRF_ENABLE,
.testFxnPtr = {&udmaTestBlkcpyTc},
.pacingTime = {PACING_NONE},
.numCh = {1U},
- .instId = {UDMA_INST_ID_MAIN_0},
+ .instId = {UDMA_TEST_INST_ID_MAIN_BC},
.chPrmId = {UDMA_TEST_CH_PRMID_INTR_DEF},
.qdepth = {UDMA_TEST_DEF_QDEPTH},
.icnt = {
{
.enableTest = TEST_ENABLE,
.tcId = 3487U,
- .tcName = "Main NAVSS 2D Blockcpy DDR 1MB to MSMC circular 1KB performance test",
+ .tcName = UDMA_TEST_MAIN_BC_TCNAME_PREFIX "2D Blockcpy DDR 1MB to MSMC circular 1KB performance test",
.disableInfo= NULL,
.printEnable= PRINT_ENABLE,
.prfEnable = PRF_ENABLE,
.testFxnPtr = {&udmaTestBlkcpyTc},
.pacingTime = {PACING_NONE},
.numCh = {1U},
- .instId = {UDMA_INST_ID_MAIN_0},
+ .instId = {UDMA_TEST_INST_ID_MAIN_BC},
.chPrmId = {UDMA_TEST_CH_PRMID_INTR_DEF},
.qdepth = {UDMA_TEST_DEF_QDEPTH},
.icnt = {
{
.enableTest = TEST_ENABLE,
.tcId = 3488U,
- .tcName = "Main NAVSS 2D Blockcpy MSMC circular 1KB to MSMC circular 1KB performance test",
+ .tcName = UDMA_TEST_MAIN_BC_TCNAME_PREFIX "2D Blockcpy MSMC circular 1KB to MSMC circular 1KB performance test",
.disableInfo= NULL,
.printEnable= PRINT_ENABLE,
.prfEnable = PRF_ENABLE,
.testFxnPtr = {&udmaTestBlkcpyTc},
.pacingTime = {PACING_NONE},
.numCh = {1U},
- .instId = {UDMA_INST_ID_MAIN_0},
+ .instId = {UDMA_TEST_INST_ID_MAIN_BC},
.chPrmId = {UDMA_TEST_CH_PRMID_INTR_DEF},
.qdepth = {UDMA_TEST_DEF_QDEPTH},
.icnt = {
.runFlag = (UDMA_TEST_RF_MAIN_BC),
.ringPrmId = UDMA_TEST_RING_PRMID_INVALID,
},
+#if (UDMA_TEST_SOC_OCMC_MEM_PRESENT == 1)
{
.enableTest = TEST_ENABLE,
.tcId = 3489U,
- .tcName = "MCU NAVSS 2D Blockcpy OCMC circular 1KB to OCMC circular 1KB performance test",
+ .tcName = UDMA_TEST_MCU_BC_TCNAME_PREFIX "2D Blockcpy OCMC circular 1KB to OCMC circular 1KB performance test",
.disableInfo= NULL,
.printEnable= PRINT_ENABLE,
.prfEnable = PRF_ENABLE,
.testFxnPtr = {&udmaTestBlkcpyTc},
.pacingTime = {PACING_NONE},
.numCh = {1U},
- .instId = {UDMA_INST_ID_MCU_0},
+ .instId = {UDMA_TEST_INST_ID_MCU_BC},
.chPrmId = {UDMA_TEST_CH_PRMID_INTR_DEF},
.qdepth = {UDMA_TEST_DEF_QDEPTH},
.icnt = {
.heapIdDest = {UTILS_MEM_HEAP_ID_INTERNAL},
.srcBufSize = {1*KB},
.destBufSize= {1*KB},
- .runFlag = (UDMA_TEST_RF_MCU_BC),
+ .runFlag = (UDMA_TEST_RF_MCU_BC_INTERNAL_MEM),
.ringPrmId = UDMA_TEST_RING_PRMID_INVALID,
},
+#endif /* #if (UDMA_TEST_SOC_OCMC_MEM_PRESENT == 1) */
+#if (UDMA_SOC_CFG_UDMAP_PRESENT == 1)
{
.enableTest = TEST_ENABLE,
.tcId = 3490U,
- .tcName = "MCU NAVSS Blockcpy DDR 1MB to DDR 1MB performance test",
+ .tcName = UDMA_TEST_MCU_BC_TCNAME_PREFIX "Blockcpy DDR 1MB to DDR 1MB performance test",
.disableInfo= NULL,
.printEnable= PRINT_ENABLE,
.prfEnable = PRF_ENABLE,
.testFxnPtr = {&udmaTestBlkcpyTc},
.pacingTime = {PACING_NONE},
.numCh = {1U},
- .instId = {UDMA_INST_ID_MCU_0},
+ .instId = {UDMA_TEST_INST_ID_MCU_BC},
.chPrmId = {UDMA_TEST_CH_PRMID_INTR_DEF},
.qdepth = {UDMA_TEST_PERF_QDEPTH},
.icnt = {
{
.enableTest = TEST_ENABLE,
.tcId = 3491U,
- .tcName = "MCU NAVSS 2D Blockcpy MSMC circular 1KB to DDR 1MB performance test",
+ .tcName = UDMA_TEST_MCU_BC_TCNAME_PREFIX "2D Blockcpy MSMC circular 1KB to DDR 1MB performance test",
.disableInfo= NULL,
.printEnable= PRINT_ENABLE,
.prfEnable = PRF_ENABLE,
.testFxnPtr = {&udmaTestBlkcpyTc},
.pacingTime = {PACING_NONE},
.numCh = {1U},
- .instId = {UDMA_INST_ID_MCU_0},
+ .instId = {UDMA_TEST_INST_ID_MCU_BC},
.chPrmId = {UDMA_TEST_CH_PRMID_INTR_DEF},
.qdepth = {UDMA_TEST_DEF_QDEPTH},
.icnt = {
{
.enableTest = TEST_ENABLE,
.tcId = 3492U,
- .tcName = "MCU NAVSS 2D Blockcpy DDR 1MB to MSMC circular 1KB performance test",
+ .tcName = UDMA_TEST_MCU_BC_TCNAME_PREFIX "2D Blockcpy DDR 1MB to MSMC circular 1KB performance test",
.disableInfo= NULL,
.printEnable= PRINT_ENABLE,
.prfEnable = PRF_ENABLE,
.testFxnPtr = {&udmaTestBlkcpyTc},
.pacingTime = {PACING_NONE},
.numCh = {1U},
- .instId = {UDMA_INST_ID_MCU_0},
+ .instId = {UDMA_TEST_INST_ID_MCU_BC},
.chPrmId = {UDMA_TEST_CH_PRMID_INTR_DEF},
.qdepth = {UDMA_TEST_DEF_QDEPTH},
.icnt = {
{
.enableTest = TEST_ENABLE,
.tcId = 3493U,
- .tcName = "MCU NAVSS 2D Blockcpy MSMC circular 1KB to MSMC circular 1KB performance test",
+ .tcName = UDMA_TEST_MCU_BC_TCNAME_PREFIX "2D Blockcpy MSMC circular 1KB to MSMC circular 1KB performance test",
.disableInfo= NULL,
.printEnable= PRINT_ENABLE,
.prfEnable = PRF_ENABLE,
.testFxnPtr = {&udmaTestBlkcpyTc},
.pacingTime = {PACING_NONE},
.numCh = {1U},
- .instId = {UDMA_INST_ID_MCU_0},
+ .instId = {UDMA_TEST_INST_ID_MCU_BC},
.chPrmId = {UDMA_TEST_CH_PRMID_INTR_DEF},
.qdepth = {UDMA_TEST_DEF_QDEPTH},
.icnt = {
.runFlag = (UDMA_TEST_RF_MCU_BC),
.ringPrmId = UDMA_TEST_RING_PRMID_INVALID,
},
+#endif /* #if (UDMA_SOC_CFG_UDMAP_PRESENT == 1) */
{
.enableTest = TEST_ENABLE,
.tcId = 3494U,
- .tcName = "Main NAVSS Blockcpy DDR 1MB to DDR 1MB from multiple tasks",
+ .tcName = UDMA_TEST_MAIN_BC_TCNAME_PREFIX "Blockcpy DDR 1MB to DDR 1MB from multiple tasks",
.disableInfo= NULL,
.printEnable= PRINT_DISABLE,
.prfEnable = PRF_ENABLE,
.tcType = (UDMA_TCT_FULL | UDMA_TCT_FUNCTIONAL | UDMA_TCT_PERFORMANCE),
.dcEnable = DATA_CHECK_DISABLE,
- .loopCnt = UDMA_TEST_PERF_LOOP_CNT,
+ .loopCnt = UDMA_TEST_LOOP_CNT_MT_SOC,
.numTasks = UDMA_TEST_MAX_MAIN_BC_CH,
.testType = {UDMA_TT_BLK_CPY, UDMA_TT_BLK_CPY, UDMA_TT_BLK_CPY, UDMA_TT_BLK_CPY},
.testFxnPtr = {&udmaTestBlkcpyTc, &udmaTestBlkcpyTc, &udmaTestBlkcpyTc, &udmaTestBlkcpyTc},
.pacingTime = {PACING_NONE, PACING_NONE, PACING_NONE, PACING_NONE},
.numCh = {1U, 1U, 1U, 1U},
- .instId = {UDMA_INST_ID_MAIN_0, UDMA_INST_ID_MAIN_0, UDMA_INST_ID_MAIN_0, UDMA_INST_ID_MAIN_0},
+ .instId = {UDMA_TEST_INST_ID_MAIN_BC, UDMA_TEST_INST_ID_MAIN_BC, UDMA_TEST_INST_ID_MAIN_BC, UDMA_TEST_INST_ID_MAIN_BC},
.chPrmId = {UDMA_TEST_CH_PRMID_INTR_DEF, UDMA_TEST_CH_PRMID_INTR_DEF, UDMA_TEST_CH_PRMID_INTR_DEF, UDMA_TEST_CH_PRMID_INTR_DEF},
.qdepth = {UDMA_TEST_PERF_QDEPTH, UDMA_TEST_PERF_QDEPTH, UDMA_TEST_PERF_QDEPTH, UDMA_TEST_PERF_QDEPTH},
.icnt = {
.runFlag = (UDMA_TEST_RF_MAIN_BC_MT),
.ringPrmId = UDMA_TEST_RING_PRMID_INVALID,
},
+#if (UDMA_SOC_CFG_UDMAP_PRESENT == 1)
{
.enableTest = TEST_ENABLE,
.tcId = 3495U,
- .tcName = "MCU NAVSS Blockcpy DDR 1MB to DDR 1MB from multiple tasks",
+ .tcName = UDMA_TEST_MCU_BC_TCNAME_PREFIX "Blockcpy DDR 1MB to DDR 1MB from multiple tasks",
.disableInfo= NULL,
.printEnable= PRINT_DISABLE,
.prfEnable = PRF_ENABLE,
.testFxnPtr = {&udmaTestBlkcpyTc, &udmaTestBlkcpyTc, &udmaTestBlkcpyTc, &udmaTestBlkcpyTc},
.pacingTime = {PACING_NONE, PACING_NONE, PACING_NONE, PACING_NONE},
.numCh = {1U, 1U, 1U, 1U},
- .instId = {UDMA_INST_ID_MCU_0, UDMA_INST_ID_MCU_0, UDMA_INST_ID_MCU_0, UDMA_INST_ID_MCU_0},
+ .instId = {UDMA_TEST_INST_ID_MCU_BC, UDMA_TEST_INST_ID_MCU_BC, UDMA_TEST_INST_ID_MCU_BC, UDMA_TEST_INST_ID_MCU_BC},
.chPrmId = {UDMA_TEST_CH_PRMID_INTR_DEF, UDMA_TEST_CH_PRMID_INTR_DEF, UDMA_TEST_CH_PRMID_INTR_DEF, UDMA_TEST_CH_PRMID_INTR_DEF},
.qdepth = {UDMA_TEST_PERF_QDEPTH, UDMA_TEST_PERF_QDEPTH, UDMA_TEST_PERF_QDEPTH, UDMA_TEST_PERF_QDEPTH},
.icnt = {
.runFlag = (UDMA_TEST_RF_MCU_BC_MT),
.ringPrmId = UDMA_TEST_RING_PRMID_INVALID,
},
+#endif /* #if (UDMA_SOC_CFG_UDMAP_PRESENT == 1) */
{
.enableTest = TEST_ENABLE,
.tcId = 3496U,
- .tcName = "Main NAVSS Blockcpy MSMC to MSMC 1KBx1K (1MB) circular from multiple tasks",
+ .tcName = UDMA_TEST_MAIN_BC_TCNAME_PREFIX "Blockcpy MSMC to MSMC 1KBx1K (1MB) circular from multiple tasks",
.disableInfo= NULL,
.printEnable= PRINT_DISABLE,
.prfEnable = PRF_ENABLE,
.tcType = (UDMA_TCT_FULL | UDMA_TCT_FUNCTIONAL | UDMA_TCT_PERFORMANCE),
.dcEnable = DATA_CHECK_DISABLE,
- .loopCnt = UDMA_TEST_PERF_LOOP_CNT,
+ .loopCnt = UDMA_TEST_LOOP_CNT_MT_SOC,
.numTasks = UDMA_TEST_MAX_MAIN_BC_CH,
.testType = {UDMA_TT_BLK_CPY, UDMA_TT_BLK_CPY, UDMA_TT_BLK_CPY, UDMA_TT_BLK_CPY},
.testFxnPtr = {&udmaTestBlkcpyTc, &udmaTestBlkcpyTc, &udmaTestBlkcpyTc, &udmaTestBlkcpyTc},
.pacingTime = {PACING_NONE, PACING_NONE, PACING_NONE, PACING_NONE},
.numCh = {1U, 1U, 1U, 1U},
- .instId = {UDMA_INST_ID_MAIN_0, UDMA_INST_ID_MAIN_0, UDMA_INST_ID_MAIN_0, UDMA_INST_ID_MAIN_0},
+ .instId = {UDMA_TEST_INST_ID_MAIN_BC, UDMA_TEST_INST_ID_MAIN_BC, UDMA_TEST_INST_ID_MAIN_BC, UDMA_TEST_INST_ID_MAIN_BC},
.chPrmId = {UDMA_TEST_CH_PRMID_INTR_DEF, UDMA_TEST_CH_PRMID_INTR_DEF, UDMA_TEST_CH_PRMID_INTR_DEF, UDMA_TEST_CH_PRMID_INTR_DEF},
.qdepth = {UDMA_TEST_PERF_QDEPTH, UDMA_TEST_PERF_QDEPTH, UDMA_TEST_PERF_QDEPTH, UDMA_TEST_PERF_QDEPTH},
.icnt = {
.runFlag = (UDMA_TEST_RF_MAIN_BC_MT),
.ringPrmId = UDMA_TEST_RING_PRMID_INVALID,
},
+#if (UDMA_SOC_CFG_UDMAP_PRESENT == 1)
{
.enableTest = TEST_ENABLE,
.tcId = 3497U,
- .tcName = "MCU NAVSS Blockcpy MSMC to MSMC circular 1KBx1K (1MB) from multiple tasks",
+ .tcName = UDMA_TEST_MCU_BC_TCNAME_PREFIX "Blockcpy MSMC to MSMC circular 1KBx1K (1MB) from multiple tasks",
.disableInfo= NULL,
.printEnable= PRINT_DISABLE,
.prfEnable = PRF_ENABLE,
.testFxnPtr = {&udmaTestBlkcpyTc, &udmaTestBlkcpyTc, &udmaTestBlkcpyTc, &udmaTestBlkcpyTc},
.pacingTime = {PACING_NONE, PACING_NONE, PACING_NONE, PACING_NONE},
.numCh = {1U, 1U, 1U, 1U},
- .instId = {UDMA_INST_ID_MCU_0, UDMA_INST_ID_MCU_0, UDMA_INST_ID_MCU_0, UDMA_INST_ID_MCU_0},
+ .instId = {UDMA_TEST_INST_ID_MCU_BC, UDMA_TEST_INST_ID_MCU_BC, UDMA_TEST_INST_ID_MCU_BC, UDMA_TEST_INST_ID_MCU_BC},
.chPrmId = {UDMA_TEST_CH_PRMID_INTR_DEF, UDMA_TEST_CH_PRMID_INTR_DEF, UDMA_TEST_CH_PRMID_INTR_DEF, UDMA_TEST_CH_PRMID_INTR_DEF},
.qdepth = {UDMA_TEST_PERF_QDEPTH, UDMA_TEST_PERF_QDEPTH, UDMA_TEST_PERF_QDEPTH, UDMA_TEST_PERF_QDEPTH},
.icnt = {
.runFlag = (UDMA_TEST_RF_MCU_BC_MT),
.ringPrmId = UDMA_TEST_RING_PRMID_INVALID,
},
+#endif /* #if (UDMA_SOC_CFG_UDMAP_PRESENT == 1) */
{
.enableTest = TEST_ENABLE,
.tcId = 3498U,
- .tcName = "Main NAVSS 2D Blockcpy DDR 4MB to MSMC circular 4KB at 20ms pacing for 10 seconds",
+ .tcName = UDMA_TEST_MAIN_BC_TCNAME_PREFIX "2D Blockcpy DDR 4MB to MSMC circular 4KB at 20ms pacing for 10 seconds",
.disableInfo= NULL,
.printEnable= PRINT_ENABLE,
.prfEnable = PRF_ENABLE,
.testFxnPtr = {&udmaTestBlkcpyTc},
.pacingTime = {DEF_PACING},
.numCh = {1U},
- .instId = {UDMA_INST_ID_MAIN_0},
+ .instId = {UDMA_TEST_INST_ID_MAIN_BC},
.chPrmId = {UDMA_TEST_CH_PRMID_INTR_DEF},
.qdepth = {UDMA_TEST_DEF_QDEPTH},
.icnt = {
.runFlag = (UDMA_TEST_RF_MAIN_BC_PACING),
.ringPrmId = UDMA_TEST_RING_PRMID_INVALID,
},
-#if defined (UDMA_UTC_ID_MSMC_DRU0)
+#endif /* #ifndef UDMA_TEST_SOC_PRESILICON */
+#ifdef UDMA_UTC_ID_MSMC_DRU0
{
.enableTest = TEST_ENABLE,
.tcId = 3499U,
.testFxnPtr = {&udmaTestBlkcpyTc},
.pacingTime = {PACING_NONE},
.numCh = {1U},
- .instId = {UDMA_INST_ID_MAIN_0},
+ .instId = {UDMA_TEST_INST_ID_MAIN_BC},
.chPrmId = {UDMA_TEST_CH_PRMID_DRU_DEF},
.qdepth = {USE_DEF_QDEPTH},
.icnt = {
.testFxnPtr = {&udmaTestBlkcpyTc},
.pacingTime = {PACING_NONE},
.numCh = {1U},
- .instId = {UDMA_INST_ID_MAIN_0},
+ .instId = {UDMA_TEST_INST_ID_MAIN_BC},
.chPrmId = {UDMA_TEST_CH_PRMID_DRU_INTR_DEF},
.qdepth = {USE_DEF_QDEPTH},
.icnt = {
.runFlag = (UDMA_TEST_RF_DRU | UDMA_TEST_RF_CFG_DYN),
.ringPrmId = UDMA_TEST_RING_PRMID_INVALID,
},
+#ifndef UDMA_TEST_SOC_PRESILICON
{
.enableTest = TEST_ENABLE,
.tcId = 3501U,
.testFxnPtr = {&udmaTestBlkcpyTc},
.pacingTime = {PACING_NONE},
.numCh = {1U},
- .instId = {UDMA_INST_ID_MAIN_0},
+ .instId = {UDMA_TEST_INST_ID_MAIN_BC},
.chPrmId = {UDMA_TEST_CH_PRMID_DRU_INTR_DEF},
.qdepth = {UDMA_TEST_PERF_QDEPTH},
.icnt = {
.testFxnPtr = {&udmaTestBlkcpyTc},
.pacingTime = {PACING_NONE},
.numCh = {1U},
- .instId = {UDMA_INST_ID_MAIN_0},
+ .instId = {UDMA_TEST_INST_ID_MAIN_BC},
.chPrmId = {UDMA_TEST_CH_PRMID_DRU_INTR_DEF},
.qdepth = {UDMA_TEST_DEF_QDEPTH},
.icnt = {
.testFxnPtr = {&udmaTestBlkcpyTc},
.pacingTime = {PACING_NONE},
.numCh = {1U},
- .instId = {UDMA_INST_ID_MAIN_0},
+ .instId = {UDMA_TEST_INST_ID_MAIN_BC},
.chPrmId = {UDMA_TEST_CH_PRMID_DRU_INTR_DEF},
.qdepth = {UDMA_TEST_DEF_QDEPTH},
.icnt = {
.testFxnPtr = {&udmaTestBlkcpyTc},
.pacingTime = {PACING_NONE},
.numCh = {1U},
- .instId = {UDMA_INST_ID_MAIN_0},
+ .instId = {UDMA_TEST_INST_ID_MAIN_BC},
.chPrmId = {UDMA_TEST_CH_PRMID_DRU_INTR_DEF},
.qdepth = {UDMA_TEST_DEF_QDEPTH},
.icnt = {
.testFxnPtr = {&udmaTestBlkcpyTc, &udmaTestBlkcpyTc, &udmaTestBlkcpyTc, &udmaTestBlkcpyTc},
.pacingTime = {PACING_NONE, PACING_NONE, PACING_NONE, PACING_NONE},
.numCh = {1U, 1U, 1U, 1U},
- .instId = {UDMA_INST_ID_MAIN_0, UDMA_INST_ID_MAIN_0, UDMA_INST_ID_MAIN_0, UDMA_INST_ID_MAIN_0},
+ .instId = {UDMA_TEST_INST_ID_MAIN_BC, UDMA_TEST_INST_ID_MAIN_BC, UDMA_TEST_INST_ID_MAIN_BC, UDMA_TEST_INST_ID_MAIN_BC},
.chPrmId = {UDMA_TEST_CH_PRMID_DRU_INTR_DEF, UDMA_TEST_CH_PRMID_DRU_INTR_DEF, UDMA_TEST_CH_PRMID_DRU_INTR_DEF, UDMA_TEST_CH_PRMID_DRU_INTR_DEF},
.qdepth = {UDMA_TEST_PERF_QDEPTH, UDMA_TEST_PERF_QDEPTH, UDMA_TEST_PERF_QDEPTH, UDMA_TEST_PERF_QDEPTH},
.icnt = {
.testFxnPtr = {&udmaTestBlkcpyTc, &udmaTestBlkcpyTc, &udmaTestBlkcpyTc, &udmaTestBlkcpyTc},
.pacingTime = {PACING_NONE, PACING_NONE, PACING_NONE, PACING_NONE},
.numCh = {1U, 1U, 1U, 1U},
- .instId = {UDMA_INST_ID_MAIN_0, UDMA_INST_ID_MAIN_0, UDMA_INST_ID_MAIN_0, UDMA_INST_ID_MAIN_0},
+ .instId = {UDMA_TEST_INST_ID_MAIN_BC, UDMA_TEST_INST_ID_MAIN_BC, UDMA_TEST_INST_ID_MAIN_BC, UDMA_TEST_INST_ID_MAIN_BC},
.chPrmId = {UDMA_TEST_CH_PRMID_DRU_INTR_DEF, UDMA_TEST_CH_PRMID_DRU_INTR_DEF, UDMA_TEST_CH_PRMID_DRU_INTR_DEF, UDMA_TEST_CH_PRMID_DRU_INTR_DEF},
.qdepth = {UDMA_TEST_PERF_QDEPTH, UDMA_TEST_PERF_QDEPTH, UDMA_TEST_PERF_QDEPTH, UDMA_TEST_PERF_QDEPTH},
.icnt = {
.runFlag = (UDMA_TEST_RF_DRU_MT),
.ringPrmId = UDMA_TEST_RING_PRMID_INVALID,
},
+#endif /* #ifndef UDMA_TEST_SOC_PRESILICON */
//Enable after adding testcase in Qmetry
#if 0
{
.testFxnPtr = {&udmaTestBlkcpyTc},
.pacingTime = {PACING_NONE},
.numCh = {1U},
- .instId = {UDMA_INST_ID_MAIN_0},
+ .instId = {UDMA_TEST_INST_ID_MAIN_BC},
.chPrmId = {UDMA_TEST_CH_PRMID_DRU_EVENTSIZE_ICNT1},
.qdepth = {USE_DEF_QDEPTH},
.icnt = {
.testFxnPtr = {&udmaTestBlkcpyTc},
.pacingTime = {PACING_NONE},
.numCh = {1U},
- .instId = {UDMA_INST_ID_MAIN_0},
+ .instId = {UDMA_TEST_INST_ID_MAIN_BC},
.chPrmId = {UDMA_TEST_CH_PRMID_DRU_EVENTSIZE_ICNT2},
.qdepth = {USE_DEF_QDEPTH},
.icnt = {
.testFxnPtr = {&udmaTestBlkcpyTc},
.pacingTime = {PACING_NONE},
.numCh = {1U},
- .instId = {UDMA_INST_ID_MAIN_0},
+ .instId = {UDMA_TEST_INST_ID_MAIN_BC},
.chPrmId = {UDMA_TEST_CH_PRMID_DRU_EVENTSIZE_ICNT3},
.qdepth = {USE_DEF_QDEPTH},
.icnt = {
.runFlag = (UDMA_TEST_RF_DRU),
.ringPrmId = UDMA_TEST_RING_PRMID_INVALID,
},
-#endif
+#endif /* #if 0 */
#endif /* #if defined (UDMA_UTC_ID_MSMC_DRU0) */
+#if (UDMA_SOC_CFG_PROXY_PRESENT == 1)
{
.enableTest = TEST_ENABLE,
.tcId = 3507U,
.runFlag = (UDMA_TEST_RF_SOC_ALL | UDMA_TEST_RF_CORE_ALL | UDMA_TEST_RF_CFG_DEF | UDMA_TEST_RF_CFG_DYN),
.ringPrmId = UDMA_TEST_RING_PRMID_EVENT_NONE,
},
+#endif /* #if (UDMA_SOC_CFG_PROXY_PRESENT == 1) */
{
.enableTest = TEST_ENABLE,
.tcId = 3508U,
.runFlag = (UDMA_TEST_RF_SOC_ALL | UDMA_TEST_RF_CORE_ALL | UDMA_TEST_RF_CFG_DEF | UDMA_TEST_RF_CFG_DYN),
.ringPrmId = UDMA_TEST_RING_PRMID_EVENT_NONE,
},
+#if (UDMA_SOC_CFG_RA_NORMAL_PRESENT == 1)
{
.enableTest = TEST_ENABLE,
.tcId = 3509U,
.runFlag = (UDMA_TEST_RF_SOC_ALL | UDMA_TEST_RF_CORE_ALL | UDMA_TEST_RF_CFG_DEF | UDMA_TEST_RF_CFG_DYN),
.ringPrmId = UDMA_TEST_RING_PRMID_EVENT_POLLED,
},
+#endif /* #if (UDMA_SOC_CFG_RA_NORMAL_PRESENT == 1) */
{
.enableTest = TEST_ENABLE,
.tcId = 3511U,
.runFlag = (UDMA_TEST_RF_SOC_AM65XX | UDMA_TEST_RF_CORE_ALL | UDMA_TEST_RF_CFG_DEF | UDMA_TEST_RF_CFG_DYN),
.ringPrmId = UDMA_TEST_RING_PRMID_EVENT_NONE,
},
+#if (UDMA_SOC_CFG_RA_NORMAL_PRESENT == 1)
{
.enableTest = TEST_ENABLE,
.tcId = 4693U,
.runFlag = (UDMA_TEST_RF_SOC_ALL | UDMA_TEST_RF_CORE_ALL | UDMA_TEST_RF_CFG_DEF | UDMA_TEST_RF_CFG_DYN),
.ringPrmId = UDMA_TEST_RING_PRMID_EVENT_NONE,
},
+#endif /* #if (UDMA_SOC_CFG_RA_NORMAL_PRESENT == 1) */
+#if (UDMA_SOC_CFG_RA_LCDMA_PRESENT == 1)
{
- .enableTest = TEST_DISABLE,
+ /* For LCDMA with Dual ring,
+ * Ring Prime Read checks for Reverse occupancy.
+ * In this case, actual transfer should happen to populate
+ * reverse occupancy count and successfully do a ring prime read.
+ * This testcase, implements block copy using ring prime API's
+ * This tests only Ring Prime API's.
+ * Data check and TR Responce checks are NOT carried out.*/
+ .enableTest = TEST_ENABLE,
+ .tcId = 8837U,
+ .tcName = "LCDMA Ring Prime Test",
+ .disableInfo= NULL,
+ .printEnable= PRINT_ENABLE,
+ .prfEnable = PRF_DISABLE,
+ .tcType = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
+ .dcEnable = DATA_CHECK_DISABLE,
+ .loopCnt = 1U,
+ .numTasks = 1U,
+ .numCh = {1U},
+ .instId = {UDMA_TEST_INST_ID_BCDMA_BC},
+ .testType = {UDMA_TT_MISC},
+ .testFxnPtr = {&udmaTestRingPrimeLcdmaTc},
+ .qdepth = {500U},
+ .pacingTime = {PACING_NONE},
+ .chPrmId = {UDMA_TEST_CH_PRMID_DEF},
+ .icnt = {
+ {16U, 1U, 1U, 1U}
+ },
+ .dicnt = {
+ {16U, 1U, 1U, 1U}
+ },
+ .dim = {
+ {0U, 0U, 0U}
+ },
+ .ddim = {
+ {0U, 0U, 0U}
+ },
+ .heapIdSrc = {DEF_HEAP_ID},
+ .heapIdDest = {DEF_HEAP_ID},
+ .srcBufSize = {UDMA_TEST_DEF_ICNT0},
+ .destBufSize= {UDMA_TEST_DEF_DICNT0},
+ .runFlag = (UDMA_TEST_RF_BCDMA_BC | UDMA_TEST_RF_CFG_DYN),
+ .ringPrmId = UDMA_TEST_RING_PRMID_EVENT_NONE,
+ },
+#endif /* #if (UDMA_SOC_CFG_RA_LCDMA_PRESENT == 1) */
+#if (UDMA_SOC_CFG_RING_MON_PRESENT == 1)
+ {
+ .enableTest = TEST_ENABLE,
.tcId = 4636U,
.tcName = "Ring Monitor Push and Pop Mode test",
- .disableInfo= "Blocked on SYSFW-2824",
+ .disableInfo= NULL,
.printEnable= PRINT_ENABLE,
.prfEnable = PRF_DISABLE,
.tcType = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
.ringPrmId = UDMA_TEST_RING_PRMID_EVENT_NONE,
},
{
- .enableTest = TEST_DISABLE,
+ .enableTest = TEST_ENABLE,
.tcId = 4637U,
.tcName = "Ring Monitor Low Threshold Mode test",
- .disableInfo= "Blocked on SYSFW-2824",
+ .disableInfo= NULL,
.printEnable= PRINT_ENABLE,
.prfEnable = PRF_DISABLE,
.tcType = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
.ringPrmId = UDMA_TEST_RING_PRMID_EVENT_NONE,
},
{
- .enableTest = TEST_DISABLE,
+ .enableTest = TEST_ENABLE,
.tcId = 4638U,
.tcName = "Ring Monitor High Threshold Mode test",
- .disableInfo= "Blocked on SYSFW-2824",
+ .disableInfo= NULL,
.printEnable= PRINT_ENABLE,
.prfEnable = PRF_DISABLE,
.tcType = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
.runFlag = (UDMA_TEST_RF_SOC_J721E | UDMA_TEST_RF_CORE_ALL | UDMA_TEST_RF_CFG_DEF | UDMA_TEST_RF_CFG_DYN),
.ringPrmId = UDMA_TEST_RING_PRMID_EVENT_NONE,
},
+#endif /* #if (UDMA_SOC_CFG_RING_MON_PRESENT == 1) */
+#if (UDMA_SOC_CFG_PROXY_PRESENT == 1)
{
.enableTest = TEST_ENABLE,
.tcId = 4238U,
.runFlag = (UDMA_TEST_RF_SOC_ALL | UDMA_TEST_RF_CORE_ALL | UDMA_TEST_RF_CFG_DEF | UDMA_TEST_RF_CFG_DYN),
.ringPrmId = UDMA_TEST_RING_PRMID_EVENT_NONE,
},
+#endif /* #if (UDMA_SOC_CFG_PROXY_PRESENT == 1) */
+#if ((UDMA_NUM_MAPPED_TX_GROUP + UDMA_NUM_MAPPED_RX_GROUP) > 0)
+ {
+ .enableTest = TEST_ENABLE,
+ .tcId = 7034U,
+ .tcName = "Mapped Flow attach and detach testcase",
+ .disableInfo= NULL,
+ .printEnable= PRINT_ENABLE,
+ .prfEnable = PRF_DISABLE,
+ .tcType = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
+ .dcEnable = DATA_CHECK_ENABLE,
+ .loopCnt = 5U,
+ .numTasks = 1U,
+ .testType = {UDMA_TT_MISC},
+ .testFxnPtr = {&udmaTestFlowAttachMappedTc},
+ /* All other below parameters not used in this testcase except ring params */
+ .pacingTime = {PACING_NONE},
+ .numCh = {1U},
+ .instId = {UDMA_TEST_INST_ID_FLOW},
+ .chPrmId = {UDMA_TEST_CH_PRMID_DEF},
+ .qdepth = {USE_DEF_QDEPTH},
+ .icnt = {
+ {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
+ },
+ .dicnt = {
+ {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
+ },
+ .dim = {
+ {0U, 0U, 0U}
+ },
+ .ddim = {
+ {0U, 0U, 0U}
+ },
+ .heapIdSrc = {DEF_HEAP_ID},
+ .heapIdDest = {DEF_HEAP_ID},
+ .srcBufSize = {UDMA_TEST_DEF_ICNT0},
+ .destBufSize= {UDMA_TEST_DEF_DICNT0},
+ .runFlag = (UDMA_TEST_RF_FLOW | UDMA_TEST_RF_CFG_DYN),
+ .ringPrmId = UDMA_TEST_RING_PRMID_EVENT_NONE,
+ },
+#else /* #if ((UDMA_NUM_MAPPED_TX_GROUP + UDMA_NUM_MAPPED_RX_GROUP) > 0) */
{
.enableTest = TEST_ENABLE,
.tcId = 3729U,
.ringPrmId = UDMA_TEST_RING_PRMID_EVENT_NONE,
},
{
+ /* This tests the failure for allocating flows more than actual count.
+ * So this is not applicable in case of mapped flows, which allocates only one at a time.
+ * Hence the testcase is not appicable for mapped flows. */
.enableTest = TEST_ENABLE,
.tcId = 4154U,
.tcName = "Flow alloc and free testcase",
.runFlag = (UDMA_TEST_RF_FLOW | UDMA_TEST_RF_CFG_DYN),
.ringPrmId = UDMA_TEST_RING_PRMID_EVENT_NONE,
},
+#endif /* #if ((UDMA_NUM_MAPPED_TX_GROUP + UDMA_NUM_MAPPED_RX_GROUP) > 0) */
{
.enableTest = TEST_ENABLE,
.tcId = 3513U,
.runFlag = (UDMA_TEST_RF_SOC_ALL | UDMA_TEST_RF_CORE_ALL | UDMA_TEST_RF_CFG_DEF),
.ringPrmId = UDMA_TEST_RING_PRMID_INVALID,
},
+ {
+ .enableTest = TEST_ENABLE,
+ .tcId = 9595U,
+ .tcName = "Event Disable and Enable Sanity Check Testcase",
+ .disableInfo= NULL,
+ .printEnable= PRINT_ENABLE,
+ .prfEnable = PRF_DISABLE,
+ .tcType = (UDMA_TCT_SANITY | UDMA_TCT_FUNCTIONAL),
+ .dcEnable = DATA_CHECK_ENABLE,
+ .loopCnt = 1U,
+ .numTasks = 1U,
+ .testType = {UDMA_TT_MISC},
+ .testFxnPtr = {&udmaTestEventDisableEnableSanity},
+ /* All other below parameters not used in this testcase */
+ .pacingTime = {PACING_NONE},
+ .numCh = {1U},
+ .instId = {UDMA_TEST_DEFAULT_UDMA_INST},
+ .chPrmId = {UDMA_TEST_CH_PRMID_DEF},
+ .qdepth = {USE_DEF_QDEPTH},
+ .icnt = {
+ {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
+ },
+ .dicnt = {
+ {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
+ },
+ .dim = {
+ {0U, 0U, 0U}
+ },
+ .ddim = {
+ {0U, 0U, 0U}
+ },
+ .heapIdSrc = {DEF_HEAP_ID},
+ .heapIdDest = {DEF_HEAP_ID},
+ .srcBufSize = {UDMA_TEST_DEF_ICNT0},
+ .destBufSize= {UDMA_TEST_DEF_DICNT0},
+ .runFlag = (UDMA_TEST_RF_SOC_ALL | UDMA_TEST_RF_CORE_ALL | UDMA_TEST_RF_CFG_DEF | UDMA_TEST_RF_CFG_DYN),
+ .ringPrmId = UDMA_TEST_RING_PRMID_EVENT_NONE,
+ },
+#if (UDMA_SOC_CFG_RA_NORMAL_PRESENT == 1)
{
.enableTest = TEST_ENABLE,
.tcId = 3707U,
.runFlag = (UDMA_TEST_RF_SOC_ALL | UDMA_TEST_RF_CORE_ALL | UDMA_TEST_RF_CFG_DEF | UDMA_TEST_RF_CFG_DYN),
.ringPrmId = UDMA_TEST_RING_PRMID_INVALID,
},
+#endif /* #if (UDMA_SOC_CFG_RA_NORMAL_PRESENT == 1) */
{
.enableTest = TEST_ENABLE,
.tcId = 3965,
.testFxnPtr = {&udmaTestBlkcpyPauseResumeTc},
.pacingTime = {PACING_NONE},
.numCh = {1U},
- .instId = {UDMA_INST_ID_MAIN_0},
+ .instId = {UDMA_TEST_INST_ID_MAIN_BC},
.chPrmId = {UDMA_TEST_CH_PRMID_INTR_DEF},
.qdepth = {USE_DEF_QDEPTH},
.icnt = {
.runFlag = (UDMA_TEST_RF_MAIN_BC_PAUSE | UDMA_TEST_RF_CFG_DYN),
.ringPrmId = UDMA_TEST_RING_PRMID_INVALID,
},
+#if (UDMA_SOC_CFG_UDMAP_PRESENT == 1)
+#ifndef UDMA_TEST_SOC_PRESILICON
{
.enableTest = TEST_ENABLE,
.tcId = 4100U,
- .tcName = "Main NAVSS HC Blockcpy DDR 1MB to DDR 1MB performance test",
+ .tcName = UDMA_TEST_MAIN_BC_TCNAME_PREFIX "HC Blockcpy DDR 1MB to DDR 1MB performance test",
.disableInfo= NULL,
.printEnable= PRINT_ENABLE,
.prfEnable = PRF_ENABLE,
.testFxnPtr = {&udmaTestBlkcpyTc},
.pacingTime = {PACING_NONE},
.numCh = {1U},
- .instId = {UDMA_INST_ID_MAIN_0},
+ .instId = {UDMA_TEST_INST_ID_MAIN_BC},
.chPrmId = {UDMA_TEST_CH_PRMID_BLKCPY_HC_INTR_DEF},
.qdepth = {UDMA_TEST_PERF_QDEPTH},
.icnt = {
{
.enableTest = TEST_ENABLE,
.tcId = 4101U,
- .tcName = "Main NAVSS 2D HC Blockcpy MSMC circular 1KB to DDR 1MB performance test",
+ .tcName = UDMA_TEST_MAIN_BC_TCNAME_PREFIX "2D HC Blockcpy MSMC circular 1KB to DDR 1MB performance test",
.disableInfo= NULL,
.printEnable= PRINT_ENABLE,
.prfEnable = PRF_ENABLE,
.testFxnPtr = {&udmaTestBlkcpyTc},
.pacingTime = {PACING_NONE},
.numCh = {1U},
- .instId = {UDMA_INST_ID_MAIN_0},
+ .instId = {UDMA_TEST_INST_ID_MAIN_BC},
.chPrmId = {UDMA_TEST_CH_PRMID_BLKCPY_HC_INTR_DEF},
.qdepth = {UDMA_TEST_DEF_QDEPTH},
.icnt = {
{
.enableTest = TEST_ENABLE,
.tcId = 4102U,
- .tcName = "Main NAVSS 2D HC Blockcpy DDR 1MB to MSMC circular 1KB performance test",
+ .tcName = UDMA_TEST_MAIN_BC_TCNAME_PREFIX "2D HC Blockcpy DDR 1MB to MSMC circular 1KB performance test",
.disableInfo= NULL,
.printEnable= PRINT_ENABLE,
.prfEnable = PRF_ENABLE,
.testFxnPtr = {&udmaTestBlkcpyTc},
.pacingTime = {PACING_NONE},
.numCh = {1U},
- .instId = {UDMA_INST_ID_MAIN_0},
+ .instId = {UDMA_TEST_INST_ID_MAIN_BC},
.chPrmId = {UDMA_TEST_CH_PRMID_BLKCPY_HC_INTR_DEF},
.qdepth = {UDMA_TEST_DEF_QDEPTH},
.icnt = {
{
.enableTest = TEST_ENABLE,
.tcId = 4103U,
- .tcName = "Main NAVSS 2D HC Blockcpy MSMC circular 1KB to MSMC circular 1KB performance test",
+ .tcName = UDMA_TEST_MAIN_BC_TCNAME_PREFIX "2D HC Blockcpy MSMC circular 1KB to MSMC circular 1KB performance test",
.disableInfo= NULL,
.printEnable= PRINT_ENABLE,
.prfEnable = PRF_ENABLE,
.testFxnPtr = {&udmaTestBlkcpyTc},
.pacingTime = {PACING_NONE},
.numCh = {1U},
- .instId = {UDMA_INST_ID_MAIN_0},
+ .instId = {UDMA_TEST_INST_ID_MAIN_BC},
.chPrmId = {UDMA_TEST_CH_PRMID_BLKCPY_HC_INTR_DEF},
.qdepth = {UDMA_TEST_DEF_QDEPTH},
.icnt = {
{
.enableTest = TEST_ENABLE,
.tcId = 4104U,
- .tcName = "Main NAVSS HC Blockcpy DDR 1MB to DDR 1MB from multiple tasks",
+ .tcName = UDMA_TEST_MAIN_BC_TCNAME_PREFIX "HC Blockcpy DDR 1MB to DDR 1MB from multiple tasks",
.disableInfo= NULL,
.printEnable= PRINT_DISABLE,
.prfEnable = PRF_ENABLE,
.testFxnPtr = {&udmaTestBlkcpyTc, &udmaTestBlkcpyTc, &udmaTestBlkcpyTc, &udmaTestBlkcpyTc},
.pacingTime = {PACING_NONE, PACING_NONE, PACING_NONE, PACING_NONE},
.numCh = {1U, 1U, 1U, 1U},
- .instId = {UDMA_INST_ID_MAIN_0, UDMA_INST_ID_MAIN_0, UDMA_INST_ID_MAIN_0, UDMA_INST_ID_MAIN_0},
+ .instId = {UDMA_TEST_INST_ID_MAIN_BC, UDMA_TEST_INST_ID_MAIN_BC, UDMA_TEST_INST_ID_MAIN_BC, UDMA_TEST_INST_ID_MAIN_BC},
.chPrmId = {UDMA_TEST_CH_PRMID_BLKCPY_HC_INTR_DEF, UDMA_TEST_CH_PRMID_BLKCPY_HC_INTR_DEF, UDMA_TEST_CH_PRMID_BLKCPY_HC_INTR_DEF, UDMA_TEST_CH_PRMID_BLKCPY_HC_INTR_DEF},
.qdepth = {UDMA_TEST_PERF_QDEPTH, UDMA_TEST_PERF_QDEPTH, UDMA_TEST_PERF_QDEPTH, UDMA_TEST_PERF_QDEPTH},
.icnt = {
{
.enableTest = TEST_ENABLE,
.tcId = 4105U,
- .tcName = "Main NAVSS HC Blockcpy MSMC to MSMC 1KBx1K (1MB) circular from multiple tasks",
+ .tcName = UDMA_TEST_MAIN_BC_TCNAME_PREFIX "HC Blockcpy MSMC to MSMC 1KBx1K (1MB) circular from multiple tasks",
.disableInfo= NULL,
.printEnable= PRINT_DISABLE,
.prfEnable = PRF_ENABLE,
.testFxnPtr = {&udmaTestBlkcpyTc, &udmaTestBlkcpyTc, &udmaTestBlkcpyTc, &udmaTestBlkcpyTc},
.pacingTime = {PACING_NONE, PACING_NONE, PACING_NONE, PACING_NONE},
.numCh = {1U, 1U, 1U, 1U},
- .instId = {UDMA_INST_ID_MAIN_0, UDMA_INST_ID_MAIN_0, UDMA_INST_ID_MAIN_0, UDMA_INST_ID_MAIN_0},
+ .instId = {UDMA_TEST_INST_ID_MAIN_BC, UDMA_TEST_INST_ID_MAIN_BC, UDMA_TEST_INST_ID_MAIN_BC, UDMA_TEST_INST_ID_MAIN_BC},
.chPrmId = {UDMA_TEST_CH_PRMID_BLKCPY_HC_INTR_DEF, UDMA_TEST_CH_PRMID_BLKCPY_HC_INTR_DEF, UDMA_TEST_CH_PRMID_BLKCPY_HC_INTR_DEF, UDMA_TEST_CH_PRMID_BLKCPY_HC_INTR_DEF},
.qdepth = {UDMA_TEST_PERF_QDEPTH, UDMA_TEST_PERF_QDEPTH, UDMA_TEST_PERF_QDEPTH, UDMA_TEST_PERF_QDEPTH},
.icnt = {
{
.enableTest = TEST_ENABLE,
.tcId = 4106U,
- .tcName = "MCU NAVSS HC Blockcpy DDR 1MB to DDR 1MB performance test",
+ .tcName = UDMA_TEST_MCU_BC_TCNAME_PREFIX "HC Blockcpy DDR 1MB to DDR 1MB performance test",
.disableInfo= NULL,
.printEnable= PRINT_ENABLE,
.prfEnable = PRF_ENABLE,
.testFxnPtr = {&udmaTestBlkcpyTc},
.pacingTime = {PACING_NONE},
.numCh = {1U},
- .instId = {UDMA_INST_ID_MCU_0},
+ .instId = {UDMA_TEST_INST_ID_MCU_BC},
.chPrmId = {UDMA_TEST_CH_PRMID_BLKCPY_HC_INTR_DEF},
.qdepth = {UDMA_TEST_PERF_QDEPTH},
.icnt = {
{
.enableTest = TEST_ENABLE,
.tcId = 4107U,
- .tcName = "MCU NAVSS 2D HC Blockcpy MSMC circular 1KB to DDR 1MB performance test",
+ .tcName = UDMA_TEST_MCU_BC_TCNAME_PREFIX "2D HC Blockcpy MSMC circular 1KB to DDR 1MB performance test",
.disableInfo= NULL,
.printEnable= PRINT_ENABLE,
.prfEnable = PRF_ENABLE,
.testFxnPtr = {&udmaTestBlkcpyTc},
.pacingTime = {PACING_NONE},
.numCh = {1U},
- .instId = {UDMA_INST_ID_MCU_0},
+ .instId = {UDMA_TEST_INST_ID_MCU_BC},
.chPrmId = {UDMA_TEST_CH_PRMID_BLKCPY_HC_INTR_DEF},
.qdepth = {UDMA_TEST_DEF_QDEPTH},
.icnt = {
{
.enableTest = TEST_ENABLE,
.tcId = 4108U,
- .tcName = "MCU NAVSS 2D HC Blockcpy DDR 1MB to MSMC circular 1KB performance test",
+ .tcName = UDMA_TEST_MCU_BC_TCNAME_PREFIX "2D HC Blockcpy DDR 1MB to MSMC circular 1KB performance test",
.disableInfo= NULL,
.printEnable= PRINT_ENABLE,
.prfEnable = PRF_ENABLE,
.testFxnPtr = {&udmaTestBlkcpyTc},
.pacingTime = {PACING_NONE},
.numCh = {1U},
- .instId = {UDMA_INST_ID_MCU_0},
+ .instId = {UDMA_TEST_INST_ID_MCU_BC},
.chPrmId = {UDMA_TEST_CH_PRMID_BLKCPY_HC_INTR_DEF},
.qdepth = {UDMA_TEST_DEF_QDEPTH},
.icnt = {
{
.enableTest = TEST_ENABLE,
.tcId = 4109U,
- .tcName = "MCU NAVSS 2D HC Blockcpy MSMC circular 1KB to MSMC circular 1KB performance test",
+ .tcName = UDMA_TEST_MCU_BC_TCNAME_PREFIX "2D HC Blockcpy MSMC circular 1KB to MSMC circular 1KB performance test",
.disableInfo= NULL,
.printEnable= PRINT_ENABLE,
.prfEnable = PRF_ENABLE,
.testFxnPtr = {&udmaTestBlkcpyTc},
.pacingTime = {PACING_NONE},
.numCh = {1U},
- .instId = {UDMA_INST_ID_MCU_0},
+ .instId = {UDMA_TEST_INST_ID_MCU_BC},
.chPrmId = {UDMA_TEST_CH_PRMID_BLKCPY_HC_INTR_DEF},
.qdepth = {UDMA_TEST_DEF_QDEPTH},
.icnt = {
{
.enableTest = TEST_ENABLE,
.tcId = 4110U,
- .tcName = "MCU NAVSS HC Blockcpy DDR 1MB to DDR 1MB from multiple tasks",
+ .tcName = UDMA_TEST_MCU_BC_TCNAME_PREFIX "HC Blockcpy DDR 1MB to DDR 1MB from multiple tasks",
.disableInfo= NULL,
.printEnable= PRINT_DISABLE,
.prfEnable = PRF_ENABLE,
.testFxnPtr = {&udmaTestBlkcpyTc, &udmaTestBlkcpyTc},
.pacingTime = {PACING_NONE, PACING_NONE},
.numCh = {1U, 1U},
- .instId = {UDMA_INST_ID_MCU_0, UDMA_INST_ID_MCU_0},
+ .instId = {UDMA_TEST_INST_ID_MCU_BC, UDMA_TEST_INST_ID_MCU_BC},
.chPrmId = {UDMA_TEST_CH_PRMID_BLKCPY_HC_INTR_DEF, UDMA_TEST_CH_PRMID_BLKCPY_HC_INTR_DEF},
.qdepth = {UDMA_TEST_PERF_QDEPTH, UDMA_TEST_PERF_QDEPTH},
.icnt = {
{
.enableTest = TEST_ENABLE,
.tcId = 4111U,
- .tcName = "MCU NAVSS HC Blockcpy MSMC to MSMC 1KBx1K (1MB) circular from multiple tasks",
+ .tcName = UDMA_TEST_MCU_BC_TCNAME_PREFIX "HC Blockcpy MSMC to MSMC 1KBx1K (1MB) circular from multiple tasks",
.disableInfo= NULL,
.printEnable= PRINT_DISABLE,
.prfEnable = PRF_ENABLE,
.testFxnPtr = {&udmaTestBlkcpyTc, &udmaTestBlkcpyTc},
.pacingTime = {PACING_NONE, PACING_NONE},
.numCh = {1U, 1U},
- .instId = {UDMA_INST_ID_MCU_0, UDMA_INST_ID_MCU_0},
+ .instId = {UDMA_TEST_INST_ID_MCU_BC, UDMA_TEST_INST_ID_MCU_BC},
.chPrmId = {UDMA_TEST_CH_PRMID_BLKCPY_HC_INTR_DEF, UDMA_TEST_CH_PRMID_BLKCPY_HC_INTR_DEF},
.qdepth = {UDMA_TEST_PERF_QDEPTH, UDMA_TEST_PERF_QDEPTH},
.icnt = {
.runFlag = (UDMA_TEST_RF_MCU_BC_HC_MT),
.ringPrmId = UDMA_TEST_RING_PRMID_INVALID,
},
+#endif /* #ifndef UDMA_TEST_SOC_PRESILICON */
+#endif /* #if (UDMA_SOC_CFG_UDMAP_PRESENT == 1) */
{
.enableTest = TEST_ENABLE,
.tcId = 4656U,
{
.enableTest = TEST_ENABLE,
.tcId = 4841U,
- .tcName = "Main NAVSS Blockcpy DDR to DDR in interrupt mode chaining test",
+ .tcName = UDMA_TEST_MAIN_BC_TCNAME_PREFIX "Blockcpy DDR to DDR in interrupt mode chaining test",
.disableInfo= NULL,
.printEnable= PRINT_ENABLE,
.prfEnable = PRF_DISABLE,
.testFxnPtr = {&udmaTestBlkcpyChainingTc},
.pacingTime = {PACING_NONE},
.numCh = {2U},
- .instId = {UDMA_INST_ID_MAIN_0, UDMA_INST_ID_MAIN_0},
+ .instId = {UDMA_TEST_INST_ID_MAIN_BC, UDMA_TEST_INST_ID_MAIN_BC},
.chPrmId = {UDMA_TEST_CH_PRMID_INTR_DEF, UDMA_TEST_CH_PRMID_INTR_DEF},
.qdepth = {USE_DEF_QDEPTH, USE_DEF_QDEPTH},
.icnt = {
.heapIdDest = {DEF_HEAP_ID, DEF_HEAP_ID},
.srcBufSize = {UDMA_TEST_DEF_ICNT0, UDMA_TEST_DEF_ICNT0},
.destBufSize= {UDMA_TEST_DEF_DICNT0, UDMA_TEST_DEF_DICNT0},
- .runFlag = (UDMA_TEST_RF_MAIN_BC | UDMA_TEST_RF_CFG_DYN),
+ .runFlag = (UDMA_TEST_RF_CHAIN | UDMA_TEST_RF_CFG_DYN),
.ringPrmId = UDMA_TEST_RING_PRMID_INVALID,
},
-
+#if (UDMA_SOC_CFG_RA_LCDMA_PRESENT == 1)
+ {
+ .enableTest = TEST_ENABLE,
+ .tcId = 6282U,
+ .tcName = "PKTDMA Channel Paramter Check test",
+ .disableInfo= NULL,
+ .printEnable= PRINT_ENABLE,
+ .prfEnable = PRF_DISABLE,
+ .tcType = (UDMA_TCT_SANITY | UDMA_TCT_NEGATIVE),
+ .dcEnable = DATA_CHECK_DISABLE,
+ .loopCnt = 1U,
+ .numTasks = 1U,
+ .testType = {UDMA_TT_MISC},
+ .testFxnPtr = {&udmaTestChPktdmaParamCheckTc},
+ /* All other below parameters not used in this testcase */
+ .pacingTime = {PACING_NONE},
+ .numCh = {1U},
+ .instId = {UDMA_TEST_DEFAULT_UDMA_INST},
+ .chPrmId = {UDMA_TEST_CH_PRMID_DEF},
+ .qdepth = {USE_DEF_QDEPTH},
+ .icnt = {
+ {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
+ },
+ .dicnt = {
+ {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
+ },
+ .dim = {
+ {0U, 0U, 0U}
+ },
+ .ddim = {
+ {0U, 0U, 0U}
+ },
+ .heapIdSrc = {DEF_HEAP_ID},
+ .heapIdDest = {DEF_HEAP_ID},
+ .srcBufSize = {UDMA_TEST_DEF_ICNT0},
+ .destBufSize= {UDMA_TEST_DEF_DICNT0},
+ .runFlag = (UDMA_TEST_RF_SOC_ALL | UDMA_TEST_RF_CORE_ALL | UDMA_TEST_RF_CFG_DEF | UDMA_TEST_RF_CFG_DYN),
+ .ringPrmId = UDMA_TEST_RING_PRMID_EVENT_POLLED,
+ },
+ {
+ .enableTest = TEST_ENABLE,
+ .tcId = 6279U,
+ .tcName = "PKTDMA Channel API's test",
+ .disableInfo= NULL,
+ .printEnable= PRINT_ENABLE,
+ .prfEnable = PRF_DISABLE,
+ .tcType = (UDMA_TCT_SANITY | UDMA_TCT_NEGATIVE),
+ .dcEnable = DATA_CHECK_DISABLE,
+ .loopCnt = 1U,
+ .numTasks = 1U,
+ .testType = {UDMA_TT_MISC},
+ .testFxnPtr = {&udmaTestChPktdmaChApiTc},
+ /* All other below parameters not used in this testcase */
+ .pacingTime = {PACING_NONE},
+ .numCh = {1U},
+ .instId = {UDMA_TEST_DEFAULT_UDMA_INST},
+ .chPrmId = {UDMA_TEST_CH_PRMID_DEF},
+ .qdepth = {USE_DEF_QDEPTH},
+ .icnt = {
+ {UDMA_TEST_DEF_ICNT0, 1U, 1U, 1U}
+ },
+ .dicnt = {
+ {UDMA_TEST_DEF_DICNT0, 1U, 1U, 1U}
+ },
+ .dim = {
+ {0U, 0U, 0U}
+ },
+ .ddim = {
+ {0U, 0U, 0U}
+ },
+ .heapIdSrc = {DEF_HEAP_ID},
+ .heapIdDest = {DEF_HEAP_ID},
+ .srcBufSize = {UDMA_TEST_DEF_ICNT0},
+ .destBufSize= {UDMA_TEST_DEF_DICNT0},
+ .runFlag = (UDMA_TEST_RF_SOC_ALL | UDMA_TEST_RF_CORE_ALL | UDMA_TEST_RF_CFG_DEF | UDMA_TEST_RF_CFG_DYN),
+ .ringPrmId = UDMA_TEST_RING_PRMID_EVENT_POLLED,
+ },
+#endif /* #if (UDMA_SOC_CFG_RA_LCDMA_PRESENT == 1) */
};
#ifdef __cplusplus