PDK-5002: Board: Diabled board PLL config in csirx diag REL.CORESDK.07.01.01.03
authorM V Pratap Reddy <x0257344@ti.com>
Sat, 31 Oct 2020 07:05:08 +0000 (12:35 +0530)
committerSivaraj R <sivaraj@ti.com>
Sat, 31 Oct 2020 07:21:25 +0000 (02:21 -0500)
commita3955b9d1991942ad3ca01e3a20d138280f85f36
tree701a97946afe5f1d102bc7af2c6d6c2044390e2f
parent845312c582a579401f9c5877cb00e53e9ce4f121
PDK-5002: Board: Diabled board PLL config in csirx diag
packages/ti/board/diag/csirx/src/csirx_test_tpr12.c