summary | shortlog | log | commit | commitdiff | tree
raw | patch | inline | side by side (from parent 1: 16ce983)
raw | patch | inline | side by side (from parent 1: 16ce983)
author | Vishal Mahaveer <vishalm@ti.com> | |
Tue, 24 Nov 2020 16:32:50 +0000 (10:32 -0600) | ||
committer | Vishal Mahaveer <vishalm@ti.com> | |
Tue, 24 Nov 2020 19:25:51 +0000 (13:25 -0600) |
Add RAT configuration offset for doing pinmux from M4F.
Signed-off-by: Vishal Mahaveer <vishalm@ti.com>
Signed-off-by: Vishal Mahaveer <vishalm@ti.com>
packages/ti/board/src/am64x_evm/board_mmr.c | patch | blob | history | |
packages/ti/board/src/am64x_evm/board_pinmux.c | patch | blob | history |
diff --git a/packages/ti/board/src/am64x_evm/board_mmr.c b/packages/ti/board/src/am64x_evm/board_mmr.c
index 190db2d7d17d5e2db76ee2248f0ef74e8f155d5d..7e623dafc0aa4a4797c98f59020b88d679a4e1cc 100644 (file)
#define MAIN_PLL_MMR_BASE_ADDRESS CSL_PLL0_CFG_BASE\r
#define MCU_PLL_MMR_BASE_ADDRESS CSL_MCU_PLL0_CFG_BASE\r
\r
+#ifdef BUILD_M4F\r
+#define MAIN_PADCONFIG_MMR_BASE_ADDRESS CSL_PADCFG_CTRL0_CFG0_BASE + 0x60000000\r
+#define MCU_PADCONFIG_MMR_BASE_ADDRESS CSL_MCU_PADCFG_CTRL0_CFG0_BASE + 0x60000000\r
+#else\r
#define MAIN_PADCONFIG_MMR_BASE_ADDRESS CSL_PADCFG_CTRL0_CFG0_BASE\r
#define MCU_PADCONFIG_MMR_BASE_ADDRESS CSL_MCU_PADCFG_CTRL0_CFG0_BASE\r
+#endif\r
\r
uint32_t MMR_change_lock(mmr_lock_actions_t target_state, uint32_t * kick0);\r
uint32_t generic_mmr_change_all_locks(mmr_lock_actions_t target_state, uint32_t base_addr, const uint32_t * offset_array, uint32_t array_size);\r
diff --git a/packages/ti/board/src/am64x_evm/board_pinmux.c b/packages/ti/board/src/am64x_evm/board_pinmux.c
index 6a3466f9e66d2cb23af070e362a9d294ae2197cf..09d466e6448bd5b0d7a65fd0a412aaf1e89a125a 100644 (file)
#include "board_internal.h"\r
#include "board_pinmux.h"\r
\r
-#define MAIN_PADCONFIG_CTRL_BASE 0x000F0000\r
+#ifdef BUILD_M4F\r
+#define MAIN_PADCONFIG_CTRL_BASE CSL_PADCFG_CTRL0_CFG0_BASE + 0x60000000\r
+#define MCU_PADCONFIG_CTRL_BASE CSL_MCU_PADCFG_CTRL0_CFG0_BASE + 0x60000000\r
+#else\r
+#define MAIN_PADCONFIG_CTRL_BASE CSL_PADCFG_CTRL0_CFG0_BASE\r
+#define MCU_PADCONFIG_CTRL_BASE CSL_MCU_PADCFG_CTRL0_CFG0_BASE\r
+#endif\r
#define CTRL_MMR0_PARTITION_SIZE 0x4000\r
#define MAIN_CTRL_PINCFG_BASE (MAIN_PADCONFIG_CTRL_BASE + (1 * CTRL_MMR0_PARTITION_SIZE))\r
\r
\r
Board_STATUS Board_pinmuxConfig (void)\r
{\r
-#ifndef BUILD_M4F\r
\r
Board_unlockMMR();\r
\r
pInstanceData = pModuleData[j].instPins;\r
for(k = 0; (PINMUX_END != pInstanceData[k].pinOffset); k++)\r
{\r
- HW_WR_REG32((CSL_PADCFG_CTRL0_CFG0_BASE + 0x4000 + pInstanceData[k].pinOffset),\r
+ HW_WR_REG32((MAIN_PADCONFIG_CTRL_BASE + 0x4000 + pInstanceData[k].pinOffset),\r
(pInstanceData[k].pinSettings));\r
}\r
}\r
pInstanceData = pModuleData[j].instPins;\r
for(k = 0; (PINMUX_END != pInstanceData[k].pinOffset); k++)\r
{\r
- HW_WR_REG32((CSL_MCU_PADCFG_CTRL0_CFG0_BASE + 0x4000 + pInstanceData[k].pinOffset),\r
+ HW_WR_REG32((MCU_PADCONFIG_CTRL_BASE + 0x4000 + pInstanceData[k].pinOffset),\r
(pInstanceData[k].pinSettings));\r
}\r
}\r
}\r
\r
Board_lockMMR();\r
-#endif /* #ifndef BUILD_M4F */\r
return BOARD_SOK;\r
}\r
\r
void Board_uartTxPinmuxConfig(void)\r
{\r
-#ifndef BUILD_M4F\r
/* Board_unlockMMR */\r
HW_WR_REG32(BOARD_UART_TX_LOCK_KICK_ADDR, KICK0_UNLOCK_VAL);\r
HW_WR_REG32(BOARD_UART_TX_LOCK_KICK_ADDR + 4U, KICK1_UNLOCK_VAL);\r
/* Board_lockMMR */\r
HW_WR_REG32(BOARD_UART_TX_LOCK_KICK_ADDR + 4U, 0);\r
HW_WR_REG32(BOARD_UART_TX_LOCK_KICK_ADDR, 0);\r
-#endif\r
}\r
\r
/**\r