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raw | patch | inline | side by side (parent: a5187d2)
raw | patch | inline | side by side (parent: a5187d2)
| author | Tinku Mannan <tmannan@ti.com> | |
| Wed, 29 Jan 2020 22:26:09 +0000 (17:26 -0500) | ||
| committer | Mahesh Radhakrishnan <a0875154@ti.com> | |
| Sat, 1 Feb 2020 03:56:01 +0000 (21:56 -0600) |
Signed-off-by: Tinku Mannan <tmannan@ti.com>
diff --git a/packages/ti/board/diag/icssg_emac/build/am65xx_idk/armv8/linker_a53.lds b/packages/ti/board/diag/icssg_emac/build/am65xx_idk/armv8/linker_a53.lds
--- /dev/null
@@ -0,0 +1,205 @@
+/* File: linker_a53.lds
+ * Semihosting supported gcc Linker script for maxwell A53 for QT
+ * Purpose: single core A53 C app
+*/
+__STACK_SIZE = 0x8000;
+__TI_STACK_SIZE = __STACK_SIZE;
+
+MEMORY
+{
+ OCMCRAM : ORIGIN = 0x000041C00000, LENGTH = 0x00080000 /* MCUSS-OCMC RAM - 512KB */
+ BOOTVECTOR : ORIGIN = 0x000070000100, LENGTH = 0x00001000 - 0x100 /* MSMC RAM INIT CODE (4 KB) */
+ DIAG_FRAMEWORK : ORIGIN = 0x000070001000, LENGTH = 0x80000 - 0x1000 /* MSMC resrved for diag framework - Don't use for diag tests */
+ DIAG_COMMON : ORIGIN = 0x000070080000, LENGTH = 0x68000 /* MSMC for diag common usage */
+ DIAG_STACK : ORIGIN = 0x0000700E8000, LENGTH = 0x8000 /* MSMC for diag stack */
+ DMSC_RSVD : ORIGIN = 0x0000700F0000, LENGTH = 0x10000 /* MSMC reserved for DMSC - DO NOT use it */
+ DIAG_DATA : ORIGIN = 0x000070100000, LENGTH = 0xF0000 /* MSMC for diag data */
+ DDR_0 (RWX) : ORIGIN = 0x80000000, LENGTH = 0x10000000
+ DDR_1 (RWX) : ORIGIN = 0x90000000, LENGTH = 0x10000000
+ DDR_2 (RWX) : ORIGIN = 0xA0000000, LENGTH = 0x60000000
+}
+
+REGION_ALIAS("REGION_TEXT", DIAG_COMMON);
+REGION_ALIAS("REGION_BSS", DIAG_DATA);
+REGION_ALIAS("REGION_USB_RAMDISK", DIAG_DATA);
+REGION_ALIAS("REGION_DIAG_DATA", DIAG_COMMON);
+REGION_ALIAS("REGION_DIAG_CODE", DIAG_DATA);
+REGION_ALIAS("REGION_DATA", DIAG_DATA);
+REGION_ALIAS("REGION_STACK", DIAG_STACK);
+REGION_ALIAS("REGION_HEAP", DIAG_DATA);
+REGION_ALIAS("REGION_ARM_EXIDX", DIAG_COMMON);
+REGION_ALIAS("REGION_ARM_EXTAB", DIAG_COMMON);
+REGION_ALIAS("REGION_TEXT_STARTUP", DIAG_COMMON);
+REGION_ALIAS("REGION_DISPLAY_BUFFER", DDR_0);
+REGION_ALIAS("REGION_DATA_BUFFER", DDR_1);
+REGION_ALIAS("REGION_UART_BUFFER", DDR_0);
+
+SECTIONS {
+
+ .vecs : {
+ *(.vecs)
+ } > BOOTVECTOR AT> BOOTVECTOR
+
+ .text.csl_a53_startup : {
+ *(.text.csl_a53_startup)
+ *(.Entry)
+ } > REGION_TEXT_STARTUP AT> REGION_TEXT_STARTUP
+
+ .text : {
+ CREATE_OBJECT_SYMBOLS
+ *(.text)
+ *(.text.*)
+ . = ALIGN(0x8);
+ KEEP (*(.ctors))
+ . = ALIGN(0x4);
+ KEEP (*(.dtors))
+ . = ALIGN(0x8);
+ __init_array_start = .;
+ KEEP (*(.init_array*))
+ __init_array_end = .;
+ *(.init)
+ *(.fini*)
+ } > REGION_TEXT AT> REGION_TEXT
+
+ PROVIDE (__etext = .);
+ PROVIDE (_etext = .);
+ PROVIDE (etext = .);
+
+ .rodata : {
+ *(.rodata)
+ *(.rodata*)
+ } > REGION_TEXT AT> REGION_TEXT
+
+ .data_buffer (NOLOAD) : ALIGN (8) {
+ __data_buffer_load__ = LOADADDR (.data_buffer);
+ __data_buffer_start__ = .;
+ *(.data_buffer)
+ *(.data_buffer*)
+ . = ALIGN (8);
+ __data_buffer_end__ = .;
+ } > REGION_DATA_BUFFER AT> REGION_DATA_BUFFER
+
+ .data : ALIGN (8) {
+ __data_load__ = LOADADDR (.data);
+ __data_start__ = .;
+ *(.data)
+ *(.data*)
+ . = ALIGN (8);
+ __data_end__ = .;
+ } > REGION_DATA AT> REGION_DATA_BUFFER
+
+ .ARM.exidx : {
+ __exidx_start = .;
+ *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+ __exidx_end = .;
+ } > REGION_ARM_EXIDX AT> REGION_ARM_EXIDX
+
+ .ARM.extab : {
+ *(.ARM.extab* .gnu.linkonce.armextab.*)
+ } > REGION_ARM_EXTAB AT> REGION_ARM_EXTAB
+
+ .bss : {
+ __bss_start__ = .;
+ *(.shbss)
+ *(.bss)
+ *(.bss.*)
+ . = ALIGN (8);
+ __bss_end__ = .;
+ . = ALIGN (8);
+ __bss_common_start__ = .;
+ *(COMMON)
+ __bss_common_end__ = .;
+ } > REGION_BSS AT> REGION_BSS
+
+ .heap : {
+ __heap_start__ = .;
+ end = __heap_start__;
+ _end = end;
+ __end = end;
+ KEEP(*(.heap))
+ __heap_end__ = .;
+ __HeapLimit = __heap_end__;
+ } > REGION_HEAP AT> REGION_HEAP
+
+ .stack (NOLOAD) : ALIGN(16) {
+ _stack = .;
+ __stack = .;
+ KEEP(*(.stack))
+ } > REGION_STACK AT> REGION_STACK
+
+ __TI_STACK_BASE = __stack;
+
+ usbramdisk :
+ {
+ . = ALIGN(8);
+ *(usbramdisk*)
+ } > REGION_USB_RAMDISK
+
+ displaybuffer :
+ {
+ . = ALIGN(8);
+ *(displaybuffer*)
+ } > REGION_DISPLAY_BUFFER AT> REGION_DISPLAY_BUFFER
+
+ uartbuffer (NOLOAD):
+ {
+ . = ALIGN(8);
+ *(uartbuffer*)
+ } > REGION_UART_BUFFER AT> REGION_UART_BUFFER
+
+ diagData :
+ {
+ . = ALIGN(8);
+ *(diagData*)
+ } > REGION_DIAG_DATA AT> REGION_DIAG_DATA
+
+ diagCode : {
+ CREATE_OBJECT_SYMBOLS
+ *(.text)
+ *(.text.*)
+ . = ALIGN(0x8);
+ } > REGION_DIAG_CODE AT> REGION_DIAG_CODE
+
+ /* Stabs debugging sections. */
+ .stab 0 : { *(.stab) }
+ .stabstr 0 : { *(.stabstr) }
+ .stab.excl 0 : { *(.stab.excl) }
+ .stab.exclstr 0 : { *(.stab.exclstr) }
+ .stab.index 0 : { *(.stab.index) }
+ .stab.indexstr 0 : { *(.stab.indexstr) }
+ .comment 0 : { *(.comment) }
+ /*
+ * DWARF debug sections.
+ * Symbols in the DWARF debugging sections are relative to the beginning
+ * of the section so we begin them at 0.
+ */
+ /* DWARF 1 */
+ .debug 0 : { *(.debug) }
+ .line 0 : { *(.line) }
+ /* GNU DWARF 1 extensions */
+ .debug_srcinfo 0 : { *(.debug_srcinfo) }
+ .debug_sfnames 0 : { *(.debug_sfnames) }
+ /* DWARF 1.1 and DWARF 2 */
+ .debug_aranges 0 : { *(.debug_aranges) }
+ .debug_pubnames 0 : { *(.debug_pubnames) }
+ /* DWARF 2 */
+ .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
+ .debug_abbrev 0 : { *(.debug_abbrev) }
+ .debug_line 0 : { *(.debug_line .debug_line.* .debug_line_end ) }
+ .debug_frame 0 : { *(.debug_frame) }
+ .debug_str 0 : { *(.debug_str) }
+ .debug_loc 0 : { *(.debug_loc) }
+ .debug_macinfo 0 : { *(.debug_macinfo) }
+ /* SGI/MIPS DWARF 2 extensions */
+ .debug_weaknames 0 : { *(.debug_weaknames) }
+ .debug_funcnames 0 : { *(.debug_funcnames) }
+ .debug_typenames 0 : { *(.debug_typenames) }
+ .debug_varnames 0 : { *(.debug_varnames) }
+ /* DWARF 3 */
+ .debug_pubtypes 0 : { *(.debug_pubtypes) }
+ .debug_ranges 0 : { *(.debug_ranges) }
+ /* DWARF Extension. */
+ .debug_macro 0 : { *(.debug_macro) }
+ .note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) }
+ /DISCARD/ : { *(.note.GNU-stack) *(.gnu_debuglink) *(.gnu.lto_*) }
+}
diff --git a/packages/ti/board/diag/icssg_emac/build/am65xx_idk/armv8/makefile b/packages/ti/board/diag/icssg_emac/build/am65xx_idk/armv8/makefile
index d15851f1069d7b3a875c0d8c6a4b6d8769efb311..e4bc4c05d47ffd472171bbf8dd98ac3055b75792 100644 (file)
INTERNALDEFS = -Wimplicit -Wall $(DEBUG_FLAG) -D__ARMv8 -D$(BOARD) -DSOC_$(DEVICE) -Wunused -Wunknown-pragmas -ffunction-sections -fdata-sections -c -mcpu=cortex-a53+fp+simd -g -mabi=lp64 -mcmodel=large -mstrict-align -mfix-cortex-a53-835769 -mfix-cortex-a53-843419 -Wno-int-to-pointer-cast -Wno-pointer-to-int-cast -Werror
# Linker options
-INTERNALLINKDEFS = -Werror -Wl,-static -Wl,--gc-sections -nostartfiles -Wl,-T $(PDK_DIAG_DIR)/diag/common/$(DEVICE)/linker_a53.lds -Wl,--build-id=none --entry Entry -Wl,--start-group -l"c" -lrdimon -l"m" -l"gcc" -l"stdc++" $(BOARD_LIB) $(PERIPHERAL_LIB) $(OSAL_LIB) -Wl,--end-group $(LDFLAGS)
+INTERNALLINKDEFS = -Werror -Wl,-static -Wl,--gc-sections -nostartfiles -Wl,-T $(PDK_DIAG_DIR)/diag/icssg_emac/build/am65xx_idk/armv8/linker_a53.lds -Wl,--build-id=none --entry Entry -Wl,--start-group -l"c" -lrdimon -l"m" -l"gcc" -l"stdc++" $(BOARD_LIB) $(PERIPHERAL_LIB) $(OSAL_LIB) -Wl,--end-group $(LDFLAGS)
# Executable using device independent library and device object file
ifeq ($(TESTMODE),STRESS_TEST)
diff --git a/packages/ti/board/diag/icssg_emac/src/icssg_emac_test.c b/packages/ti/board/diag/icssg_emac/src/icssg_emac_test.c
index 3628c82a1fb5f5f075b71828529aae83b99f80c6..fdc5516f1c9b5775713df933b496dfdff0482bd3 100644 (file)
*
*/
-
#include "icssg_emac_test.h"
/**********************************************************************
Board_IDInfo_v2 gIcssEmacBoardInfo;
+#define APP_TEST_AM65XX_PG1_0_VERSION (0x0BB5A02FU)
+/* Maxwell PG version */
+uint32_t gPgVersion;
+
/*
* UDMA driver objects
*/
struct Udma_DrvObj gUdmaDrvObj;
-struct Udma_ChObj gUdmaTxChObj[EMAC_MAX_PORTS][4];
-struct Udma_ChObj gUdmaRxChObj[EMAC_MAX_PORTS][4];
-struct Udma_EventObj gUdmaRxCqEventObj[EMAC_MAX_PORTS][4];
+struct Udma_ChObj gUdmaTxChObj[BOARD_DIAG_ICSS_EMAC_MAX_PORTS][4];
+struct Udma_ChObj gUdmaRxChObj[BOARD_DIAG_ICSS_EMAC_MAX_PORTS][4];
+struct Udma_EventObj gUdmaRxCqEventObj[BOARD_DIAG_ICSS_EMAC_MAX_PORTS][4];
-struct Udma_ChObj gUdmaRxCfgPsiChObj[EMAC_MAX_PORTS];
-struct Udma_EventObj gUdmaRxCfgPsiCqEventObj[EMAC_MAX_PORTS];
+struct Udma_ChObj gUdmaRxCfgPsiChObj[BOARD_DIAG_ICSS_EMAC_MAX_PORTS];
+struct Udma_EventObj gUdmaRxCfgPsiCqEventObj[BOARD_DIAG_ICSS_EMAC_MAX_PORTS];
Udma_DrvHandle gDrvHandle = NULL;
-uint8_t app_pkt_buffer[APP_TOTAL_PKTBUF_SIZE] __attribute__ ((aligned (128))) __attribute__ ((section (".data_buffer")));
+uint8_t app_pkt_buffer[BOARD_DIAG_ICSS_EMAC_TOTAL_PKTBUF_SIZE] __attribute__ ((aligned (128))) __attribute__ ((section (".data_buffer")));
/* TX/RX ring entries memory */
-uint8_t gTxRingMem[EMAC_MAX_PORTS][RING_TRSIZE * RING_TRCNT] __attribute__ ((aligned (CACHE_LINESZ)));
-uint8_t gTxCompRingMem[EMAC_MAX_PORTS][RING_TRSIZE * RING_TRCNT] __attribute__ ((aligned (CACHE_LINESZ)));
-uint8_t gRxRingMem[EMAC_MAX_PORTS][RING_TRSIZE * RING_TRCNT] __attribute__ ((aligned (CACHE_LINESZ)));
-uint8_t gRxCompRingMem[EMAC_MAX_PORTS][RING_TRSIZE * RING_TRCNT] __attribute__ ((aligned (CACHE_LINESZ)));
-uint8_t gRxCfgPsiRingMem[EMAC_MAX_PORTS][RING_TRSIZE * RING_TRCNT] __attribute__ ((aligned(CACHE_LINESZ)));
-uint8_t gRxCfgPsiCompRingMem[EMAC_MAX_PORTS][RING_TRSIZE * RING_TRCNT] __attribute__ ((aligned(CACHE_LINESZ)));
+uint8_t gTxRingMem[BOARD_DIAG_ICSS_EMAC_MAX_PORTS][BOARD_DIAG_ICSS_EMAC_RING_TRSIZE * BOARD_DIAG_ICSS_EMAC_RING_TRCNT] __attribute__ ((aligned (BOARD_DIAG_ICSS_EMAC_CACHE_LINESZ)));
+uint8_t gTxCompRingMem[BOARD_DIAG_ICSS_EMAC_MAX_PORTS][BOARD_DIAG_ICSS_EMAC_RING_TRSIZE * BOARD_DIAG_ICSS_EMAC_RING_TRCNT] __attribute__ ((aligned (BOARD_DIAG_ICSS_EMAC_CACHE_LINESZ)));
+uint8_t gRxRingMem[BOARD_DIAG_ICSS_EMAC_MAX_PORTS][BOARD_DIAG_ICSS_EMAC_RING_TRSIZE * BOARD_DIAG_ICSS_EMAC_RING_TRCNT] __attribute__ ((aligned (BOARD_DIAG_ICSS_EMAC_CACHE_LINESZ)));
+uint8_t gRxCompRingMem[BOARD_DIAG_ICSS_EMAC_MAX_PORTS][BOARD_DIAG_ICSS_EMAC_RING_TRSIZE * BOARD_DIAG_ICSS_EMAC_RING_TRCNT] __attribute__ ((aligned (BOARD_DIAG_ICSS_EMAC_CACHE_LINESZ)));
+uint8_t gRxCfgPsiRingMem[BOARD_DIAG_ICSS_EMAC_MAX_PORTS][BOARD_DIAG_ICSS_EMAC_RING_TRSIZE * BOARD_DIAG_ICSS_EMAC_RING_TRCNT] __attribute__ ((aligned(BOARD_DIAG_ICSS_EMAC_CACHE_LINESZ)));
+uint8_t gRxCfgPsiCompRingMem[BOARD_DIAG_ICSS_EMAC_MAX_PORTS][BOARD_DIAG_ICSS_EMAC_RING_TRSIZE * BOARD_DIAG_ICSS_EMAC_RING_TRCNT] __attribute__ ((aligned(BOARD_DIAG_ICSS_EMAC_CACHE_LINESZ)));
/* TX/RX ring CPPI descriptor memory */
-uint8_t gUdmapDescRamTx[EMAC_MAX_PORTS][RING_TRCNT*UDMAP_DESC_SIZE] __attribute__ ((aligned (CACHE_LINESZ)))__attribute__ ((section (".data_buffer")));
-uint8_t gUdmapDescRamRx[EMAC_MAX_PORTS][RING_TRCNT*UDMAP_DESC_SIZE] __attribute__ ((aligned (CACHE_LINESZ)))__attribute__ ((section (".data_buffer")));
-uint8_t gUdmapDescRamRxCfgPsi[EMAC_MAX_PORTS][RING_TRCNT * UDMAP_DESC_SIZE] __attribute__ ((aligned(CACHE_LINESZ))) __attribute__ ((section (".data_buffer")));
+uint8_t gUdmapDescRamTx[BOARD_DIAG_ICSS_EMAC_MAX_PORTS][BOARD_DIAG_ICSS_EMAC_RING_TRCNT*BOARD_DIAG_ICSS_EMAC_UDMAP_DESC_SIZE] __attribute__ ((aligned (BOARD_DIAG_ICSS_EMAC_CACHE_LINESZ)))__attribute__ ((section (".data_buffer")));
+uint8_t gUdmapDescRamRx[BOARD_DIAG_ICSS_EMAC_MAX_PORTS][BOARD_DIAG_ICSS_EMAC_RING_TRCNT*BOARD_DIAG_ICSS_EMAC_UDMAP_DESC_SIZE] __attribute__ ((aligned (BOARD_DIAG_ICSS_EMAC_CACHE_LINESZ)))__attribute__ ((section (".data_buffer")));
+uint8_t gUdmapDescRamRxCfgPsi[BOARD_DIAG_ICSS_EMAC_MAX_PORTS][BOARD_DIAG_ICSS_EMAC_RING_TRCNT * BOARD_DIAG_ICSS_EMAC_UDMAP_DESC_SIZE] __attribute__ ((aligned(BOARD_DIAG_ICSS_EMAC_CACHE_LINESZ))) __attribute__ ((section (".data_buffer")));
-
-static pru_rtu_fw_t firmware[2] = {
- { PDSPcode_0, sizeof(PDSPcode_0), PDSP2code_0, sizeof(PDSP2code_0) },
- { PDSP3code_0, sizeof(PDSP3code_0), PDSP4code_0, sizeof(PDSP4code_0) },
+static BOARD_DIAG_ICSSG_EMAC_PRUICSS_FW_T firmware_pg1[2] = {
+ { PDSPcode_0, sizeof(PDSPcode_0), PDSP2code_0, sizeof(PDSP2code_0), NULL, 0},
+ { PDSP3code_0, sizeof(PDSP3code_0), PDSP4code_0, sizeof(PDSP4code_0), NULL, 0}
};
+static BOARD_DIAG_ICSSG_EMAC_PRUICSS_FW_T firmware_pg2[2] = {
+ { PDSPcode_0_PG2, sizeof(PDSPcode_0_PG2), PDSP2code_0_PG2, sizeof(PDSP2code_0_PG2), PDSP5code_0_PG2, sizeof(PDSP5code_0_PG2)},
+ { PDSP3code_0_PG2, sizeof(PDSP3code_0_PG2), PDSP4code_0_PG2, sizeof(PDSP4code_0_PG2), PDSP6code_0_PG2, sizeof(PDSP6code_0_PG2)}
+};
-static uint32_t pkt_rcv_count = 0;
-volatile uint32_t pkt_rcvd = 0;
+static uint32_t gPktRcvCount = 0;
+volatile uint32_t gPktRcvd = 0;
uint32_t gTxPktCount = 0;
-uint32_t linkCheckTime = 0;
+uint32_t gLinkCheckTime = 0;
uint32_t linkUp = 0;
-int hs_index[EMAC_MAX_ICSS * EMAC_MAC_PORTS_PER_ICSS];//one per icss slice
-uint8_t icss_tx_port_queue[3][100352] __attribute__ ((aligned (CACHE_LINESZ)));
+uint8_t icss_tx_port_queue[3][100352] __attribute__ ((aligned (BOARD_DIAG_ICSS_EMAC_CACHE_LINESZ)));
-PRUICSS_Handle prussHandle[EMAC_MAX_ICSS] = {NULL, NULL, NULL};
-APP_EMAC_MCB_T app_mcb;
+PRUICSS_Handle prussHandle[BOARD_DIAG_ICSS_EMAC_MAX_INTANCES] = {NULL, NULL, NULL};
+BOARD_DIAG_ICSSG_EMAC_MCB_T app_mcb;
EMAC_LINK_INFO_T link_info;
EMAC_MAC_ADDR_T macTest;
EMAC_HwAttrs_V5 emac_cfg;
-EMAC_CHAN_MAC_ADDR_T chan_cfg[APP_EMAC_NUM_CHANS_PER_CORE];
+EMAC_CHAN_MAC_ADDR_T chan_cfg[BOARD_DIAG_ICSS_EMAC_NUM_CHANS_PER_CORE];
-pruicssgDiagMdioInfo gPruicssTestMdioInfo[EMAC_MAX_PORTS_ICSS] = {{(CSL_PRU_ICSSG0_DRAM0_SLV_RAM_BASE+CSL_ICSS_MDIO_CFG_BASE), BOARD_ICSS0_EMAC_PHY0_ADDR, 0x6000, 0x0500},
+BOARD_DIAG_MDIO_INFO_T gBoardDiagMdioInfo[BOARD_DIAG_ICSS_EMAC_MAX_PORTS] = {{(CSL_PRU_ICSSG0_DRAM0_SLV_RAM_BASE+CSL_ICSS_MDIO_CFG_BASE), BOARD_ICSS0_EMAC_PHY0_ADDR, 0x6000, 0x0500},
{(CSL_PRU_ICSSG0_DRAM0_SLV_RAM_BASE+CSL_ICSS_MDIO_CFG_BASE), BOARD_ICSS0_EMAC_PHY1_ADDR, 0x6003, 0x0500},
{(CSL_PRU_ICSSG1_DRAM0_SLV_RAM_BASE+CSL_ICSS_MDIO_CFG_BASE), BOARD_ICSS1_EMAC_PHY0_ADDR, 0x6000, 0x0500},
{(CSL_PRU_ICSSG1_DRAM0_SLV_RAM_BASE+CSL_ICSS_MDIO_CFG_BASE), BOARD_ICSS1_EMAC_PHY1_ADDR, 0x6003, 0x0500},
****************** Test Configuration Variables **********************
**********************************************************************/
-static const uint8_t test_pkt[TEST_PKT_SIZE] = {
+static const uint8_t test_pkt[BOARD_DIAG_ICSS_EMAC_TEST_PKT_SIZE] = {
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* broadcast mac */
0x01, 0xbb, 0xcc, 0xdd, 0xee, 0xff,
0x08, 0x06, 0x00, 0x01,
0xfe,0xfe
};
-
-
-
-
/**********************************************************************
************************ EMAC TEST FUNCTIONS *************************
**********************************************************************/
-
-
-
/**
* \brief Detect presence of interposer card
*
* \return TRUE if present, FALSE if NOT present
*
*/
-
bool BoardDiag_DetectInterposerCard(void)
{
EMAC_HwAttrs_V5 emac_cfg;
}
}
-
/**
* \brief Application queue pop function
*
* \return EMAC_Pkt popped from the queue
*
*/
-static EMAC_PKT_DESC_T* BoardDiag_appQueuePop(APP_PKT_QUEUE_T *pq)
+static EMAC_PKT_DESC_T* BoardDiag_appQueuePop(BOARD_DIAG_ICSSG_EMAC_PKT_QUEUE_T *pq)
{
EMAC_PKT_DESC_T *pPktHdr;
* pPktHdr [IN] Packet to push
*
*/
-static void BoardDiag_appQueuePush(APP_PKT_QUEUE_T *pq,
+static void BoardDiag_appQueuePush(BOARD_DIAG_ICSSG_EMAC_PKT_QUEUE_T *pq,
EMAC_PKT_DESC_T *pPktHdr)
{
pPktHdr->pNext = 0;
{
EMAC_PKT_DESC_T *p_pkt_desc = NULL;
- if (pktSize <= APP_EMAC_MAX_PKT_SIZE)
+ if (pktSize <= BOARD_DIAG_ICSS_EMAC_MAX_PKT_SIZE)
{
/* Get a packet descriptor from the free queue */
p_pkt_desc = BoardDiag_appQueuePop(&app_mcb.emac_pcb[portNum].freeQueue);
if(p_pkt_desc != NULL)
{
p_pkt_desc->AppPrivate = (uint32_t)p_pkt_desc;
- p_pkt_desc->BufferLen = APP_EMAC_MAX_PKT_SIZE;
+ p_pkt_desc->BufferLen = BOARD_DIAG_ICSS_EMAC_MAX_PKT_SIZE;
p_pkt_desc->DataOffset = 0;
p_pkt_desc->pPrev = NULL;
p_pkt_desc->pNext = NULL;
UART_printf ("\nEMAC loopback test application initialization\n");
/* Reset application control block */
- memset(&app_mcb, 0, sizeof (APP_EMAC_MCB_T));
+ memset(&app_mcb, 0, sizeof (BOARD_DIAG_ICSSG_EMAC_MCB_T));
app_mcb.core_num = 0;
/* packet buffer stores in internal memory */
/* Initialize the free packet queue */
for (index = 0; index < EMAC_MAX_NUM_EMAC_PORTS; index++)
{
- for (count = 0; count < APP_MAX_PKTS; count++)
+ for (count = 0; count < BOARD_DIAG_ICSSG_EMAC_MAX_PKTS; count++)
{
p_pkt_desc = &app_mcb.emac_pcb[index].pkt_desc[count];
p_pkt_desc->pDataBuffer = pktbuf_ptr;
- p_pkt_desc->BufferLen = APP_EMAC_MAX_PKT_SIZE;
+ p_pkt_desc->BufferLen = BOARD_DIAG_ICSS_EMAC_MAX_PKT_SIZE;
BoardDiag_appQueuePush(&app_mcb.emac_pcb[index].freeQueue,
p_pkt_desc );
- pktbuf_ptr += APP_EMAC_MAX_PKT_SIZE;
+ pktbuf_ptr += BOARD_DIAG_ICSS_EMAC_MAX_PKT_SIZE;
}
}
}
*/
static void BoardDiag_appTestSendPkts(uint32_t portNum)
{
- if(gTxPktCount < PKT_SEND_COUNT)
+ if(gTxPktCount < BOARD_DIAG_ICSS_EMAC_PKT_SEND_COUNT)
{
EMAC_PKT_DESC_T *p_pkt_desc = BoardDiag_AppAllocPkt(portNum,
- TEST_PKT_SIZE);
+ BOARD_DIAG_ICSS_EMAC_TEST_PKT_SIZE);
if(p_pkt_desc!=NULL)
{
- memcpy (p_pkt_desc->pDataBuffer, &test_pkt[0], TEST_PKT_SIZE);
+ memcpy (p_pkt_desc->pDataBuffer, &test_pkt[0], BOARD_DIAG_ICSS_EMAC_TEST_PKT_SIZE);
p_pkt_desc->AppPrivate = (uint32_t)p_pkt_desc;
- p_pkt_desc->ValidLen = TEST_PKT_SIZE;
+ p_pkt_desc->ValidLen = BOARD_DIAG_ICSS_EMAC_TEST_PKT_SIZE;
p_pkt_desc->DataOffset = 0;
p_pkt_desc->PktChannel = 0;
- p_pkt_desc->PktLength = TEST_PKT_SIZE;
- p_pkt_desc->BufferLen = TEST_PKT_SIZE;
+ p_pkt_desc->PktLength = BOARD_DIAG_ICSS_EMAC_TEST_PKT_SIZE;
+ p_pkt_desc->BufferLen = BOARD_DIAG_ICSS_EMAC_TEST_PKT_SIZE;
p_pkt_desc->PktFrags = 1;
p_pkt_desc->pNext = NULL;
p_pkt_desc->pPrev = NULL;
void BoardDiag_AppTestRxPktCb(uint32_t portNum, EMAC_PKT_DESC_T *pDesc)
{
/* Change buffer length to not compare checksum data */
- pDesc->BufferLen = TEST_PKT_SIZE;
+ pDesc->BufferLen = BOARD_DIAG_ICSS_EMAC_TEST_PKT_SIZE;
if (memcmp(pDesc->pDataBuffer, test_pkt, pDesc->BufferLen) == 0)
{
- pkt_rcvd = 1;
- pkt_rcv_count++;
+ gPktRcvd = 1;
+ gPktRcvCount++;
}
else
{
*/
static int8_t BoardDiag_icssgEmacLinkDetect(uint32_t portNum)
{
- linkCheckTime = 0;
+ gLinkCheckTime = 0;
do
{
emac_poll(portNum, &link_info);
BOARD_delay(10);
- linkCheckTime++;
- if(linkCheckTime > LINK_TIMOUT_COUNT)
+ gLinkCheckTime++;
+ if(gLinkCheckTime > BOARD_DIAG_ICSS_EMAC_LINK_TIMEOUT_COUNT)
{
return (-1);
}
uint16_t regAddr;
uint16_t regVal = 0;
int8_t ret = 0;
- uint32_t baseAddr = gPruicssTestMdioInfo[portNum].mdioBaseAddrs;
- uint8_t phyAddr = gPruicssTestMdioInfo[portNum].phyAddrs;
+ uint32_t baseAddr = gBoardDiagMdioInfo[portNum].mdioBaseAddrs;
+ uint8_t phyAddr = gBoardDiagMdioInfo[portNum].phyAddrs;
/* Initialize MDIO module. MDIO will get initialized multiple times
by keeping this function call here which should be OK. Will help
UART_printf("\n\nRegister Dump for PHY Addr - 0x%04X\n", phyAddr);
- for (regAddr = 0; regAddr < BOARD_ICSS_EMAC_REG_DUMP_MAX; regAddr++)
+ for (regAddr = 0; regAddr < BOARD_DIAG_ICSS_EMAC_REG_DUMP_MAX; regAddr++)
{
BoardDiag_emacPhyRegRead(baseAddr, phyAddr, regAddr, ®Val);
UART_printf("PHY Register 0x%04X - 0x%04X\n", regAddr, regVal);
BoardDiag_emacPhyExtendedRegRead(baseAddr, phyAddr,
BOARD_ICSS_EMAC_STRAP_STS1_ADDR, ®Val);
- if(regVal != gPruicssTestMdioInfo[portNum].strapst1)
+ if(regVal != gBoardDiagMdioInfo[portNum].strapst1)
{
UART_printf("Default PHY Register(STRAP1) Data mismatch\n");
ret = -1;
BoardDiag_emacPhyExtendedRegRead(baseAddr, phyAddr,
BOARD_ICSS_EMAC_STRAP_STS2_ADDR, ®Val);
- if(regVal != gPruicssTestMdioInfo[portNum].strapst2)
+ if(regVal != gBoardDiagMdioInfo[portNum].strapst2)
{
UART_printf("Default PHY Register(STRAP2) Data mismatch\n");
ret = -1;
return ret;
}
-
-
/**
* \brief PRU disable test function
*
* \param instance [IN] PRU-ICSS port number
*
*/
-
-int32_t BoardDiag_disablePruss(uint32_t portNum)
+static int32_t BoardDiag_disablePruss(uint32_t portNum)
{
PRUICSS_Handle prussDrvHandle;
- uint8_t pru_n, rtu_n, slice_n ;
+ uint8_t pru_n, rtu_n, txpru_n, slice_n;
if (portNum > 5)
return -1;
slice_n = (portNum & 1);
pru_n = (slice_n) ? PRUICCSS_PRU1 : PRUICCSS_PRU0;
rtu_n = (slice_n) ? PRUICCSS_RTU1 : PRUICCSS_RTU0;
+ txpru_n = (slice_n) ? PRUICCSS_TPRU1 : PRUICCSS_TPRU0;
if (PRUICSS_pruDisable(prussDrvHandle, pru_n) != 0)
UART_printf("PRUICSS_pruDisable for PRUICCSS_PRU%d failed\n", slice_n);
if (PRUICSS_pruDisable(prussDrvHandle, rtu_n) != 0)
UART_printf("PRUICSS_pruDisable for PRUICCSS_RTU%d failed\n", slice_n);
+ /* pg version check: only disable txpru if NOT version PG1.0 */
+ if (gPgVersion != APP_TEST_AM65XX_PG1_0_VERSION)
+ {
+ if (PRUICSS_pruDisable(prussDrvHandle, txpru_n) != 0)
+ UART_printf("PRUICSS_pruDisable for PRUICCSS_RTU%d failed\n", slice_n);
+ }
+
/* CLEAR SHARED MEM which is used for host/firmware handshake */
PRUICSS_pruInitMemory(prussDrvHandle, PRU_ICSS_SHARED_RAM);
-
return 0;
}
* \param instance [IN] PRU-ICSS port number
*
*/
-static int32_t BoardDiag_initPruss(uint32_t portNum)
+static int32_t BoardDiag_initPruss(uint32_t portNum)
{
PRUICSS_Handle prussDrvHandle;
- uint8_t firmwareLoad_done = FALSE;
- uint8_t pru_n, rtu_n, slice_n ;
+ uint8_t pru_n, rtu_n, txpru_n, slice_n;
+ BOARD_DIAG_ICSSG_EMAC_PRUICSS_FW_T *firmware;
if (portNum > 5)
return -1;
prussDrvHandle =prussHandle[portNum >> 1];
if (prussDrvHandle == NULL)
return -1;
-
slice_n = (portNum & 1);
pru_n = (slice_n) ? PRUICCSS_PRU1 : PRUICCSS_PRU0;
rtu_n = (slice_n) ? PRUICCSS_RTU1 : PRUICCSS_RTU0;
+ txpru_n = (slice_n) ? PRUICCSS_TPRU1 : PRUICCSS_TPRU0;
+ txpru_n = txpru_n;
+ firmware = (gPgVersion == APP_TEST_AM65XX_PG1_0_VERSION)?firmware_pg1:firmware_pg2;
- if (PRUICSS_pruWriteMemory(prussDrvHandle,PRU_ICSS_IRAM(slice_n), 0,
- firmware[slice_n].pru, firmware[slice_n].pru_size)) {
- if (PRUICSS_pruWriteMemory(prussDrvHandle,PRU_ICSS_IRAM(slice_n + 2), 0,
- firmware[slice_n].rtu, firmware[slice_n].rtu_size))
- firmwareLoad_done = TRUE;
- else
- UART_printf("PRUICSS_pruWriteMemory for PRUICCSS_PRU%d failed\n", slice_n);
+ if (PRUICSS_pruWriteMemory(prussDrvHandle,PRU_ICSS_IRAM_PRU(slice_n), 0,
+ firmware[slice_n].pru, firmware[slice_n].pru_size) == 0)
+ {
+ UART_printf("PRUICSS_pruWriteMemory(port %d) for PRUICCSS_PRU%d failed\n", portNum, slice_n);
+ return -1;
}
- else
- UART_printf("PRUICSS_pruWriteMemory for PRUICCSS_RTU%d failed\n", slice_n);
-
- if( firmwareLoad_done)
+ if (PRUICSS_pruWriteMemory(prussDrvHandle,PRU_ICSS_IRAM_RTU(slice_n), 0,
+ firmware[slice_n].rtu, firmware[slice_n].rtu_size) == 0)
{
- if (PRUICSS_pruEnable(prussDrvHandle, pru_n) != 0)
- UART_printf("PRUICSS_pruEnable for PRUICCSS_PRU%d failed\n", slice_n);
- if (PRUICSS_pruEnable(prussDrvHandle, rtu_n) != 0)
- UART_printf("PRUICSS_pruEnable for PRUICCSS_RTU%d failed\n", slice_n);
+ UART_printf("PRUICSS_pruWriteMemory(port %d) for PRUICCSS_RTU%d failed\n", portNum, slice_n);
+ return -1;
+ }
+ if (gPgVersion != APP_TEST_AM65XX_PG1_0_VERSION)
+ {
+ if (PRUICSS_pruWriteMemory(prussDrvHandle,PRU_ICSS_IRAM_TXPRU(slice_n), 0,
+ firmware[slice_n].txpru, firmware[slice_n].txpru_size) == 0)
+ {
+ UART_printf("PRUICSS_pruWriteMemory(port %d) for PRUICCSS_TXPRU%d failed\n", portNum, slice_n);
+ return -1;
+ }
+ }
+ if (PRUICSS_pruEnable(prussDrvHandle, pru_n) != 0)
+ {
+ UART_printf("PRUICSS_pruEnable(port: %d) for PRUICCSS_PRU%d failed\n", portNum, slice_n);
+ return -1;
+ }
+ if (PRUICSS_pruEnable(prussDrvHandle, rtu_n) != 0)
+ {
+ UART_printf("PRUICSS_pruEnable(port: %d) for PRUICCSS_RTU%d failed\n",portNum, slice_n);
+ return -1;
+ }
+ if (gPgVersion != APP_TEST_AM65XX_PG1_0_VERSION)
+ {
+ if (PRUICSS_pruEnable(prussDrvHandle, txpru_n) != 0)
+ {
+ UART_printf("PRUICSS_pruEnable(port: %d) for PRUICCSS_TXPRU%d failed\n", portNum, slice_n);
+ return -1;
+ }
}
return 0;
-
}
-
void BoardDiag_setupFwDualmac(uint32_t port_num, EMAC_HwAttrs_V5 *pEmacCfg)
{
EMAC_FW_APP_CONFIG *pFwAppCfg;
emac_cfg.portCfg[portNum].rxChannelCfgOverPSI.subChan[subChanNum].hPdMem[0] = (void*)&gUdmapDescRamRxCfgPsi[portNum][0];
emac_cfg.portCfg[portNum].rxChannelCfgOverPSI.subChan[subChanNum].eventHandle = (void *)&gUdmaRxCfgPsiCqEventObj[portNum];
-
/* Firmware config */
BoardDiag_setupFwDualmac(portNum, &emac_cfg);
open_cfg.free_pkt_cb = BoardDiag_AppFreePkt;
open_cfg.loop_back = 0;
open_cfg.master_core_flag = 1;
- open_cfg.max_pkt_size = APP_EMAC_INIT_PKT_SIZE;
+ open_cfg.max_pkt_size = BOARD_DIAG_ICSS_EMAC_INIT_PKT_SIZE;
open_cfg.mdio_flag = 1;
open_cfg.num_of_chans = 1;
- open_cfg.num_of_rx_pkt_desc = EMAC_RX_PKT_DESC_COUNT;
- open_cfg.num_of_tx_pkt_desc = EMAC_RX_PKT_DESC_COUNT;
- open_cfg.phy_addr = gPruicssTestMdioInfo[portNum].phyAddrs;
+ open_cfg.num_of_rx_pkt_desc = BOARD_DIAG_ICSS_EMAC_TX_PKT_DESC_COUNT;
+ open_cfg.num_of_tx_pkt_desc = BOARD_DIAG_ICSS_EMAC_RX_PKT_DESC_COUNT;
+ open_cfg.phy_addr = gBoardDiagMdioInfo[portNum].phyAddrs;
open_cfg.p_chan_mac_addr = &chan_cfg[0];
open_cfg.rx_pkt_cb = BoardDiag_AppTestRxPktCb;
open_cfg.mode_of_operation = EMAC_MODE_POLL;
- open_cfg.udmaHandle = (void*)gDrvHandle;
+ open_cfg.udmaHandle = (void*)gDrvHandle;
/* Set the channel configuration */
chan_cfg[0].chan_num = 0;
macTest.addr[5] = 0x44;
chan_cfg[0].p_mac_addr = & macTest;
-
-
-
open_ret = emac_open(portNum, &open_cfg);
if (open_ret == EMAC_DRV_RESULT_OPEN_PORT_ERR)
{
UART_printf("PRU_ICSS port %d LINK IS UP!\n",portNum);
}
-
-#if !defined(ICSSG_PORT2PORT_TEST)
- BoardDiag_appTestSendPkts(portNum);
-#ifdef DIAG_STRESS_TEST
- emac_poll_pkt(portNum);
-#else
- emac_poll_pkt(portNum);
- emac_close(portNum);
-#if defined(SOC_AM65XX)
- Udma_deinit(&gUdmaDrvObj);
-#endif
-#endif
-
- if (pkt_rcv_count == PKT_SEND_COUNT)
- {
- UART_printf("\nPackets sent: %d, Packets received: %d\n",
- PKT_SEND_COUNT, pkt_rcv_count);
- UART_printf("\nEthernet Loopback test passed\n");
- ret = 0;
- }
- else
- {
- UART_printf("\nEthernet Loopback test failed!!\n");
- ret = -1;
- }
- pkt_rcv_count = 0;
-
- UART_printf("All tests completed\n");
-#endif /* ICSSG_PORT2PORT_TEST */
-
return (ret);
}
-#if !defined(DIAG_STRESS_TEST) && !defined(ICSSG_PORT2PORT_TEST)
-/**
- * \brief emac cable connect and disconnect test function
- *
- * This function verifies the Ethernet interface by disconnecting and
- * reconnecting the Ethernet loopback cable and re-running the test.
- *
- * \param portNum [IN] EMAC port number
- *
- * \return int8_t
- * 0 - in case of success
- * -1 - in case of failure
- *
- */
-static int8_t BoardDiag_emacCableDisconTest(uint8_t portNum)
-{
- UART_printf("Please disconnect the loopback cable \n");
-
- /* Waiting to disconnect the Ethernet cable
- * After disconnecting the cable shows the link status
- */
- while(1)
- {
- emac_poll(portNum, &link_info);
-
- if((link_info.link_status_change) && (link_info.link_status ==
- EMAC_LINKSTATUS_NOLINK))
- {
- UART_printf("Link is Down\n");
- break;
- }
- }
-
- UART_printf("Please reconnect the loopback cable \n");
-
- /* Waiting to reconnect the Ethernet cable
- * After connecting the cable shows the link status
- */
- while(1)
- {
- emac_poll(portNum, &link_info);
-
- if((link_info.link_status_change) && (link_info.link_status !=
- EMAC_LINKSTATUS_NOLINK))
- {
- UART_printf("Link is UP\n");
- break;
- }
- }
-
- /* Re-run the loopback test to confirm the interface functionality is intact
- after cable disconnect and connect */
- return BoardDiag_icssgemacLoopbackTest(portNum);
-}
-#endif
-
-
-
-
-
/**
* \brief emac test function
*
instId = UDMA_INST_ID_MCU_0;
#endif
UdmaInitPrms_init(instId, &initPrms);
- initPrms.rmInitPrms.numIrIntr = EMAC_MAX_PORTS;
+ initPrms.rmInitPrms.numIrIntr = BOARD_DIAG_ICSS_EMAC_MAX_PORTS;
retVal = Udma_init(&gUdmaDrvObj, &initPrms);
if(UDMA_SOK == retVal)
{
@@ -1019,10 +946,10 @@ int8_t BoardDiag_IcssgEmacTestDisplayResults(uint32_t portNum, uint32_t pktRcvCo
{
int8_t retVal;
UART_printf("\nPackets Sent: %d, Packets Received: %d\n",
- PKT_SEND_COUNT, pktRcvCount);
- if (pktRcvCount == PKT_SEND_COUNT)
+ BOARD_DIAG_ICSS_EMAC_PKT_SEND_COUNT, pktRcvCount);
+ if (pktRcvCount == BOARD_DIAG_ICSS_EMAC_PKT_SEND_COUNT)
{
- if (portNum == (EMAC_MAX_PORTS_ICSS -1))
+ if (portNum == (BOARD_DIAG_ICSS_EMAC_MAX_PORTS -1))
UART_printf("Port %d Send to Port %d Receive Test Passed!!\n",
portNum, (portNum -1));
else
@@ -1032,7 +959,7 @@ int8_t BoardDiag_IcssgEmacTestDisplayResults(uint32_t portNum, uint32_t pktRcvCo
}
else
{
- if (portNum == (EMAC_MAX_PORTS_ICSS-1))
+ if (portNum == (BOARD_DIAG_ICSS_EMAC_MAX_PORTS-1))
UART_printf("Port %d Send to Port %d Receive Test Failed!!\n",
portNum, (portNum -1));
else
BoardDiag_IcssgUdmaInit();
UART_printf("\n\nReading Ethernet PHY Register Dump...\n");
- for(portNum = startPort; portNum < EMAC_MAX_PORTS_ICSS; portNum++)
+ for(portNum = startPort; portNum < BOARD_DIAG_ICSS_EMAC_MAX_PORTS; portNum++)
{
if((portNum == 2) || (portNum == 3))
continue;
prussHandle[1] = PRUICSS_create((PRUICSS_Config*)prussCfg,PRUICCSS_INSTANCE_TWO);
prussHandle[2] = PRUICSS_create((PRUICSS_Config*)prussCfg,PRUICCSS_INSTANCE_THREE);
- for(portNum = startPort; portNum < EMAC_MAX_PORTS_ICSS; portNum++)
+ for(portNum = startPort; portNum < BOARD_DIAG_ICSS_EMAC_MAX_PORTS; portNum++)
{
BoardDiag_disablePruss(portNum);
}
- for(portNum = startPort; portNum < EMAC_MAX_PORTS_ICSS; portNum++)
+ for(portNum = startPort; portNum < BOARD_DIAG_ICSS_EMAC_MAX_PORTS; portNum++)
{
ret = BoardDiag_icssgemacLoopbackTest(portNum);
if(ret != 0)
return ret;
}
}
-#if defined(ICSSG_PORT2PORT_TEST)
uint32_t index;
- for(portNum = startPort; portNum < EMAC_MAX_PORTS_ICSS;portNum++)
+ for(portNum = startPort; portNum < BOARD_DIAG_ICSS_EMAC_MAX_PORTS;portNum++)
{
gTxPktCount = 0;
- pkt_rcv_count = 0;
+ gPktRcvCount = 0;
/* with presence of interposer card, we dont send on ports 0 and 2 */
if((portNum == 0) || (portNum == 2))
continue;
UART_printf("\n\nSending Packets on Port - %d\n", portNum);
- for (index = 0; index < PKT_SEND_COUNT; index++)
+ for (index = 0; index < BOARD_DIAG_ICSS_EMAC_PKT_SEND_COUNT; index++)
{
BoardDiag_appTestSendPkts(portNum);
/* Wait to allow packets to come back */
}
}
- ret = BoardDiag_IcssgEmacTestDisplayResults(portNum, pkt_rcv_count);
+ ret = BoardDiag_IcssgEmacTestDisplayResults(portNum, gPktRcvCount);
if (ret == -1)
{
break;
}
}
- for(portNum = startPort; portNum < EMAC_MAX_PORTS_ICSS; portNum++)
+ for(portNum = startPort; portNum < BOARD_DIAG_ICSS_EMAC_MAX_PORTS; portNum++)
{
emac_close(portNum);
}
-#if defined(SOC_AM65XX)
Udma_deinit(&gUdmaDrvObj);
-#endif
if(ret)
{
}
UART_printf("All Tests Completed\n");
-#endif /* ICSSG_PORT2PORT_TEST */
return ret;
}
-
/**
* \brief emac test function
*
{
for(portNum = startPort; portNum < BOARD_ICSS_MAX_PORTS_IDK; portNum++)
{
- gPruicssTestMdioInfo[portNum].strapst1 &= ~0x6000;
+ gBoardDiagMdioInfo[portNum].strapst1 &= ~0x6000;
}
}
}
BoardDiag_IcssgUdmaInit();
UART_printf("\n\nReading Ethernet PHY Register Dump...\n");
- for(portNum = startPort; portNum < EMAC_MAX_PORTS_ICSS; portNum++)
+ for(portNum = startPort; portNum < BOARD_DIAG_ICSS_EMAC_MAX_PORTS; portNum++)
{
ret = BoardDiag_getPhyRegDump(portNum);
if(ret != 0)
prussHandle[1] = PRUICSS_create((PRUICSS_Config*)prussCfg,PRUICCSS_INSTANCE_TWO);
prussHandle[2] = PRUICSS_create((PRUICSS_Config*)prussCfg,PRUICCSS_INSTANCE_THREE);
- for(portNum = startPort; portNum < EMAC_MAX_PORTS_ICSS; portNum++)
+ for(portNum = startPort; portNum < BOARD_DIAG_ICSS_EMAC_MAX_PORTS; portNum++)
{
BoardDiag_disablePruss(portNum);
}
- for(portNum = startPort; portNum < EMAC_MAX_PORTS_ICSS; portNum++)
+ for(portNum = startPort; portNum < BOARD_DIAG_ICSS_EMAC_MAX_PORTS; portNum++)
{
ret = BoardDiag_icssgemacLoopbackTest(portNum);
if(ret != 0)
return ret;
}
}
-
-#if defined(DIAG_STRESS_TEST)
- for(portNum = startPort; portNum < EMAC_MAX_PORTS_ICSS;portNum++)
+ for(portNum = startPort; portNum < BOARD_DIAG_ICSS_EMAC_MAX_PORTS;portNum++)
{
uint32_t timeout;
- char rdBuf = 'y';
UART_printf("\n\nSending Packets on Port - %d\n", portNum);
- if (portNum == (EMAC_MAX_PORTS_ICSS-1))
- UART_printf("Receiving Packets on Port - %d\n\n", (portNum -1));
+ if ((portNum % 2U) == 0)
+ UART_printf("Receiving Packets on Port - %d\n\n", (portNum +1));
else
- UART_printf("Receiving Packets on Port - %d\n\n", (portNum + 1));
+ UART_printf("Receiving Packets on Port - %d\n\n", (portNum - 1));
gTxPktCount = 0;
- pkt_rcv_count = 0;
- for (index = 0; index < PKT_SEND_COUNT; index++)
+ gPktRcvCount = 0;
+ for (index = 0; index < BOARD_DIAG_ICSS_EMAC_PKT_SEND_COUNT; index++)
{
- pkt_rcvd = 0;
+ gPktRcvd = 0;
timeout = 0;
BoardDiag_appTestSendPkts(portNum);
- while(pkt_rcvd == 0)
+ while(gPktRcvd == 0)
{
if ((portNum % 2U) == 0)
emac_poll_pkt(portNum +1);
break;
}
}
+#if defined(DIAG_STRESS_TEST)
+ char rdBuf = 'y';
/* Check if there a input from console to break the test */
rdBuf = (char)BoardDiag_getUserInput(BOARD_UART_INSTANCE);
if((rdBuf == 'b') || (rdBuf == 'B'))
{
UART_printf("Received Test Termination... Exiting the Test\n\n");
UART_printf("\nPackets Sent: %d, Packets Received: %d\n",
- gTxPktCount, pkt_rcv_count);
+ gTxPktCount, gPktRcvCount);
- if (pkt_rcv_count != gTxPktCount)
+ if (gPktRcvCount != gTxPktCount)
{
UART_printf("Port %d Send to Port %d Receive Test Failed!!\n",
portNum, (portNum + 1));
portNum, (portNum + 1));
ret = 0;
}
-
goto end_test;
}
+#endif
}
- ret = BoardDiag_IcssgEmacTestDisplayResults(portNum, pkt_rcv_count);
+ ret = BoardDiag_IcssgEmacTestDisplayResults(portNum, gPktRcvCount);
if (ret == -1)
{
break;
}
}
-#else
- for(portNum = startPort; portNum < EMAC_MAX_PORTS_ICSS;portNum++)
- {
- UART_printf("\n\nSending Packets on Port - %d\n", portNum);
- if (portNum == (EMAC_MAX_PORTS_ICSS-1))
- UART_printf("Receiving Packets on Port - %d\n\n", (portNum -1));
- else
- UART_printf("Receiving Packets on Port - %d\n\n", (portNum + 1));
- gTxPktCount = 0;
- pkt_rcv_count = 0;
- for (index = 0; index < PKT_SEND_COUNT; index++)
- {
- pkt_rcvd = 0;
- BoardDiag_appTestSendPkts(portNum);
-
- while(pkt_rcvd == 0)
- {
- if (portNum == (EMAC_MAX_PORTS_ICSS-1))
- emac_poll_pkt(portNum - 1);
- else
- emac_poll_pkt(portNum +1);
- /* Wait 1msec */
- BOARD_delay(1000);
- }
- }
- ret = BoardDiag_IcssgEmacTestDisplayResults(portNum, pkt_rcv_count);
- if (ret == -1)
- {
- break;
- }
- }
-
-#endif
#if defined(DIAG_STRESS_TEST)
end_test:
#endif
- for(portNum = startPort; portNum < EMAC_MAX_PORTS_ICSS; portNum++)
+ for(portNum = startPort; portNum < BOARD_DIAG_ICSS_EMAC_MAX_PORTS; portNum++)
{
emac_close(portNum);
}
-#if defined(SOC_AM65XX)
Udma_deinit(&gUdmaDrvObj);
-#endif
if(ret)
{
return ret;
}
+
/**
* \brief main function
*
#endif
Board_init(boardCfg);
-
- if (BoardDiag_DetectInterposerCard() == TRUE)
+ gPgVersion = CSL_REG32_RD(CSL_WKUP_CTRL_MMR0_CFG0_BASE + CSL_WKUP_CTRL_MMR_CFG0_JTAGID);
+ if (gPgVersion == APP_TEST_AM65XX_PG1_0_VERSION)
{
- UART_printf("Interposer card is present\n");
- interposerCardPresent = 1;
- return BoardDiag_IcssgEmacTestInterposer();
+ if (BoardDiag_DetectInterposerCard() == TRUE)
+ {
+ UART_printf("Interposer card is present\n");
+ interposerCardPresent = 1;
+ return BoardDiag_IcssgEmacTestInterposer();
+ }
+ else
+ {
+ UART_printf("Interposer card is not present\n");
+ return BoardDiag_IcssgEmacTest();
+ }
}
else
{
diff --git a/packages/ti/board/diag/icssg_emac/src/icssg_emac_test.h b/packages/ti/board/diag/icssg_emac/src/icssg_emac_test.h
index 24d229fcb508a2bc73ace6cd71c140d757e484c5..57546d39c4c64f84933b85914768bda69d7c0536 100644 (file)
/******************************************************************************
- * Copyright (c) 2018-2019 Texas Instruments Incorporated - http://www.ti.com
+ * Copyright (c) 2018-2020 Texas Instruments Incorporated - http://www.ti.com
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
/**
* \file icssg_emac_test.h
*
- * \brief This file contains all Local definitions for ICSSG EMAC test
+ * \brief This file contains all Local definitions for ICSSG EMAC diag
* application.
*
*/
#include <ti/drv/pruss/pruicss.h>
#include <ti/drv/pruss/soc/pruicss_v1.h>
-/* EMAC firmware header files */
+/* ICSSG EMAC firmware header files PG1.0 */
#include <ti/drv/emac/firmware/icss_dualmac/bin/rxl2_txl2_rgmii0_bin.h> /* PDSPcode */
#include <ti/drv/emac/firmware/icss_dualmac/bin/rtu_test0_bin.h> /* PDSP2code */
#include <ti/drv/emac/firmware/icss_dualmac/bin/rxl2_txl2_rgmii1_bin.h> /*PDSP3code */
#include <ti/drv/emac/firmware/icss_dualmac/bin/rtu_test1_bin.h> /* PDSP4code */
+/* ICSSG EMAC firmware header files PG2.0 */
+#include <ti/drv/emac/firmware/icss_dualmac/bin_pg2/rxl2_rgmii0_bin.h> /* PDSPcode */
+#include <ti/drv/emac/firmware/icss_dualmac/bin_pg2/rtu_test0_bin.h> /* PDSP2code */
+#include <ti/drv/emac/firmware/icss_dualmac/bin_pg2/rxl2_rgmii1_bin.h> /* PDSP3code */
+#include <ti/drv/emac/firmware/icss_dualmac/bin_pg2/rtu_test1_bin.h> /* PDSP4code */
+#include <ti/drv/emac/firmware/icss_dualmac/bin_pg2/txl2_rgmii0_bin.h> /* PDSP5code */
+#include <ti/drv/emac/firmware/icss_dualmac/bin_pg2/txl2_rgmii1_bin.h> /* PDSP6code */
+
/* EMAC firmware config header files */
#include <ti/drv/emac/firmware/icss_dualmac/config/emac_fw_config_dual_mac.h>
extern "C" {
#endif
-#define ICSSG_PORT2PORT_TEST (TRUE)
+extern void BOARD_delay(uint32_t usecs);
/**********************************************************************
************************** LOCAL Definitions *************************
**********************************************************************/
-#define PRU0_FIRMWARE_NAME PDSPcode_0
-#define RTU0_FIRMWARE_NAME PDSP2code_0
-#define PRU1_FIRMWARE_NAME PDSP3code_0
-#define RTU1_FIRMWARE_NAME PDSP4code_0
-
-#define IDK_BOARD_DET_PIN (0U)
-#define EMAC_MAC_PORTS_PER_ICSS ((uint32_t)2U)
-#define EMAC_MAX_ICSS ((uint32_t)3U)
-#define EMAC_MAX_CPSW ((uint32_t)1U)
-#define EMAC_MAX_PORTS ((EMAC_MAX_ICSS)*(EMAC_MAC_PORTS_PER_ICSS) \
- + (EMAC_MAX_CPSW))
-#define EMAC_MAX_PORTS_ICSS ((EMAC_MAX_ICSS)*(EMAC_MAC_PORTS_PER_ICSS))
-
-#define PRUICSS_SLICE1_OFFSET (0x8000)
-
-#define DELAY (1000U)
-#define LINK_DELAY (100U)
-#define LINK_TIMOUT_COUNT (100U)
-
-#define RXTX (0x10U)
-#define ADD_FDB (0x1U)
-#define SET_RUN (0x4U)
-#define ENABLE_VLAN (0x5U)
-#define DISABLE_VLAN (0x6U)
-#define ADD_FILTER (0x7U)
-#define ADD_MAC (0x8U)
+#define BOARD_DIAG_ICSS_EMAC_MAX_PORTS_PER_INSTANCE ((uint32_t)2U)
+#define BOARD_DIAG_ICSS_EMAC_MAX_INTANCES ((uint32_t)3U)
+#define BOARD_DIAG_ICSS_EMAC_MAX_PORTS ((BOARD_DIAG_ICSS_EMAC_MAX_INTANCES)*(BOARD_DIAG_ICSS_EMAC_MAX_PORTS_PER_INSTANCE))
+
+#define BOARD_DIAG_ICSS_EMAC_LINK_TIMEOUT_COUNT (100U)
+
/* Ring definitions */
-#define RING_TRCNT (128U) /* Number of ring entries */
+#define BOARD_DIAG_ICSS_EMAC_RING_TRCNT (128U) /* Number of ring entries */
/* Size (in bytes) of each ring entry (for 48-bit packet descriptor ptr) */
-#define RING_TRSIZE (8U)
-#define UDMAP_DESC_SIZE (128U)
-#define CACHE_LINESZ (128U)
+#define BOARD_DIAG_ICSS_EMAC_RING_TRSIZE (8U)
+#define BOARD_DIAG_ICSS_EMAC_UDMAP_DESC_SIZE (128U)
+#define BOARD_DIAG_ICSS_EMAC_CACHE_LINESZ (128U)
#ifdef DIAG_STRESS_TEST
-#define PKT_SEND_COUNT (10240U)
+#define BOARD_DIAG_ICSS_EMAC_PKT_SEND_COUNT (10240U)
#else
-#define PKT_SEND_COUNT (5U)
+#define BOARD_DIAG_ICSS_EMAC_PKT_SEND_COUNT (5U)
#endif
-/* Strap configuration Status register values */
-#define EMAC_STRAP_STS1_VAL (0x0U)
-#define EMAC_STRAP_STS2_VAL (0x0U)
-
-/* DO NOT CHANGE test_pkt UNLESS TEST_PKT_SIZE IS UPDATED */
-#define TEST_PKT_SIZE (64U)
+/* DO NOT CHANGE test_pkt UNLESS BOARD_DIAG_ICSS_EMAC_TEST_PKT_SIZE IS UPDATED */
+#define BOARD_DIAG_ICSS_EMAC_TEST_PKT_SIZE (64U)
-#define APP_NUM_HOST_DESC (128U)
+#define BOARD_DIAG_ICSS_EMAC_NUM_HOST_DESC (128U)
/**
* @brief Number of channels configured by a core on one port
*/
-#define APP_EMAC_NUM_CHANS_PER_CORE (1U)
+#define BOARD_DIAG_ICSS_EMAC_NUM_CHANS_PER_CORE (1U)
/**
* @brief Number of EMAC MAC addresses configured per channel
*/
-#define APP_EMAC_NUM_MACADDRS_PER_CHAN (1U)
+#define BOARD_DIAG_ICSS_EMAC_NUM_MACADDRS_PER_CHAN (1U)
/**
* @brief Max EMAC packet size in bytes initialized for the driver
*/
-#define APP_EMAC_INIT_PKT_SIZE (128U)
+#define BOARD_DIAG_ICSS_EMAC_INIT_PKT_SIZE (128U)
/**
* @brief Max packet size in bytes used in the application,
* align to 128 byte cache line size
*/
-#define APP_EMAC_MAX_PKT_SIZE (128U)
+#define BOARD_DIAG_ICSS_EMAC_MAX_PKT_SIZE (128U)
/**
* @brief Total packet buffer size in bytes per core
*
*/
-#define APP_TOTAL_PKTBUF_SIZE (EMAC_MAX_NUM_EMAC_PORTS*APP_MAX_PKTS* \
- APP_EMAC_MAX_PKT_SIZE)
-
-/**
- * @brief EMAC port 0 phy address
- */
-#define APP_PORT0_PHY_ADDR (0U)
-
-/**
- * @brief EMAC port 0 phy address
- */
-#define APP_PORT1_PHY_ADDR (3U)
-
+#define BOARD_DIAG_ICSS_EMAC_TOTAL_PKTBUF_SIZE (BOARD_DIAG_ICSS_EMAC_MAX_PORTS*BOARD_DIAG_ICSSG_EMAC_MAX_PKTS* \
+ BOARD_DIAG_ICSS_EMAC_MAX_PKT_SIZE)
/**
* @brief Max number of packets in the application free packet queue
*
*/
-#define APP_MAX_PKTS (64U)
-
+#define BOARD_DIAG_ICSSG_EMAC_MAX_PKTS (64U)
/**
* @brief Max number of packet descriptors per port initialized
* for driver managed RX queue
*/
-#define APP_EMAC_INIT_RX_PKTS (8*APP_EMAC_NUM_CHANS_PER_CORE)
+#define BOARD_DIAG_ICSS_EMAC_INIT_RX_PKTS (8*BOARD_DIAG_ICSS_EMAC_NUM_CHANS_PER_CORE)
/**
* @brief Max number of packet descriptors per port initialized
* for driver managed TX queue
*/
-#define APP_EMAC_INIT_TX_PKTS (APP_MAX_PKTS-APP_EMAC_INIT_RX_PKTS)
+#define BOARD_DIAG_ICSS_EMAC_INIT_TX_PKTS (BOARD_DIAG_ICSSG_EMAC_MAX_PKTS-BOARD_DIAG_ICSS_EMAC_INIT_RX_PKTS)
/* Number of TX packet descriptor */
-#define EMAC_TX_PKT_DESC_COUNT (64U)
+#define BOARD_DIAG_ICSS_EMAC_TX_PKT_DESC_COUNT (16U)
/* Number of RX packet descriptor */
-#define EMAC_RX_PKT_DESC_COUNT (16U)
+#define BOARD_DIAG_ICSS_EMAC_RX_PKT_DESC_COUNT (16U)
-#define BOARD_ICSS_EMAC_REG_DUMP_MAX (16U)
-
-#define IDK_BOARD "AM65XIDK"
+#define BOARD_DIAG_ICSS_EMAC_REG_DUMP_MAX (16U)
#define BOARD_DIAG_ICSSEMAC_TEST_TIMEOUT (100U)
#define TX_BUFF_POOL_SIZE (0X1800U)
#define BOARD_ICSS_EMAC_APP_BOARDID_ADDR (0x52U)
#define BOARD_ICSS_MAX_PORTS_IDK (4U)
-typedef struct pruicssMdioInfo
+typedef struct BOARD_DIAG_MDIO_INFO_tag
{
uint32_t mdioBaseAddrs;
uint8_t phyAddrs;
uint16_t strapst1;
uint16_t strapst2;
-} pruicssgDiagMdioInfo;
+} BOARD_DIAG_MDIO_INFO_T;
/**
* @brief
* Application Queue Data Structure
*/
-typedef struct APP_PKT_QUEUE_tag
+typedef struct BOARD_DIAG_ICSSG_EMAC_PKT_QUEUE_tag
{
uint32_t Count;
/**< Number of packets in queue */
/**< Pointer to the first packet */
EMAC_PKT_DESC_T* pTail;
/**< Pointer to the last packet */
-} APP_PKT_QUEUE_T;
+} BOARD_DIAG_ICSSG_EMAC_PKT_QUEUE_T;
/**
* @brief
* @details
* Maintains the EMAC port control information of a core
*/
-typedef struct APP_EMAC_PCB_tag
+typedef struct BOARD_DIAG_ICSSG_EMAC_EMAC_PCB_tag
{
Uint32 emac_state;
/**< EMAC Port state */
Uint32 phy_addr;
/**< Physical layer transceiver address mapped to the EMAC port */
- EMAC_PKT_DESC_T pkt_desc[APP_MAX_PKTS];
+ EMAC_PKT_DESC_T pkt_desc[BOARD_DIAG_ICSSG_EMAC_MAX_PKTS];
/**< Pre-allocated/initialized packet descriptiors for both free queue and RX queues */
- APP_PKT_QUEUE_T freeQueue;
+ BOARD_DIAG_ICSSG_EMAC_PKT_QUEUE_T freeQueue;
/**< Free packet descriptor queue, one queue per channel */
- APP_PKT_QUEUE_T rxQueue[APP_EMAC_NUM_CHANS_PER_CORE];
+ BOARD_DIAG_ICSSG_EMAC_PKT_QUEUE_T rxQueue[BOARD_DIAG_ICSS_EMAC_NUM_CHANS_PER_CORE];
/**< Received packet descriptor queue, one queue per channel */
- EMAC_MAC_ADDR_T mac_addr[APP_EMAC_NUM_CHANS_PER_CORE][APP_EMAC_NUM_MACADDRS_PER_CHAN];
+ EMAC_MAC_ADDR_T mac_addr[BOARD_DIAG_ICSS_EMAC_NUM_CHANS_PER_CORE][BOARD_DIAG_ICSS_EMAC_NUM_MACADDRS_PER_CHAN];
/**< MAC address for all the channels */
-} APP_EMAC_PCB_T;
-
+} BOARD_DIAG_ICSSG_EMAC_EMAC_PCB_T;
-extern void BOARD_delay(uint32_t usecs);
-void Mdio_PhyExtendedRegRead(uint32_t baseAddr, uint32_t phyAddr,
- uint32_t regNum, uint16_t *pData);
/**
* @brief
* EMAC Master Control Block
* @details
* Maintains the EMAC control information and error statistics.
*/
-typedef struct APP_EMAC_MCB_tag
+typedef struct BOARD_DIAG_ICSSG_EMAC_MCB_tag
{
Uint32 core_num;
/**< DSP core number */
Uint32 timer_count;
/**< 100 msec timer count */
- APP_EMAC_PCB_T emac_pcb[EMAC_MAX_NUM_EMAC_PORTS];
+ BOARD_DIAG_ICSSG_EMAC_EMAC_PCB_T emac_pcb[EMAC_MAX_NUM_EMAC_PORTS];
/**< EMAC port control block */
-} APP_EMAC_MCB_T;
+} BOARD_DIAG_ICSSG_EMAC_MCB_T;
-/* EMAC firmware header files */
-typedef struct {
+typedef struct BOARD_DIAG_ICSSG_EMAC_PRUICSS_FW_tag {
const uint32_t *pru;
uint32_t pru_size;
const uint32_t *rtu;
uint32_t rtu_size;
-} pru_rtu_fw_t;
+ const uint32_t *txpru;
+ uint32_t txpru_size;
+} BOARD_DIAG_ICSSG_EMAC_PRUICSS_FW_T;
/**
* \brief ICSSG emac test function
* 0 - in case of success
* 1 - in case of failure
*/
-
int8_t BoardDiag_IcssgEmacTestInterposer(void);
#ifdef __cplusplus