]> Gitweb @ Texas Instruments - Open Source Git Repositories - git.TI.com/gitweb - processor-sdk/pdk.git/commitdiff
[UART]: Build fix.
authorMriganka Chakravarty <m-chakravarty@ti.com>
Thu, 21 Jul 2022 04:50:20 +0000 (10:20 +0530)
committerMriganka Chakravarty <m-chakravarty@ti.com>
Thu, 21 Jul 2022 04:50:20 +0000 (10:20 +0530)
- UART_socConfigIntrPath is also called for MPU cores.
- retVal was not declared for MPU cores.

Signed-off-by: Mriganka Chakravarty <m-chakravarty@ti.com>
packages/ti/drv/uart/soc/j721e/UART_soc.c

index 3c75f515dfea5251f687e01f91b78ecc90701fc3..5fb3af9905946ec96487c20aff4f625b70251c3d 100755 (executable)
@@ -758,10 +758,9 @@ static uint16_t UART_socGetSciSrcID(uint32_t baseAddr)
 
 static int32_t UART_socConfigIntrPath(const void *pHwAttrs, bool setIntrPath)
 {
-   int32_t ret = UART_SUCCESS;
+   int32_t ret = UART_SUCCESS, retVal = CSL_PASS;
 
 #if defined (BUILD_C66X) || defined (BUILD_MCU)
-    int32_t                              retVal;
     UART_HwAttrs                         *hwAttrs = (UART_HwAttrs *)(pHwAttrs);
     struct tisci_msg_rm_irq_set_req      rmIrqReq;
     struct tisci_msg_rm_irq_set_resp     rmIrqResp;
@@ -912,7 +911,6 @@ static int32_t UART_socConfigIntrPath(const void *pHwAttrs, bool setIntrPath)
         }
     }
 #elif defined (BUILD_C7X)
-    int32_t               retVal;
     UART_HwAttrs         *hwAttrs = (UART_HwAttrs *)(pHwAttrs);
     CSL_ClecEventConfig   cfgClec;
     CSL_CLEC_EVTRegs     *clecBaseAddr = (CSL_CLEC_EVTRegs *)CSL_COMPUTE_CLUSTER0_CLEC_REGS_BASE;