]> Gitweb @ Texas Instruments - Open Source Git Repositories - git.TI.com/gitweb - processor-sdk/pdk.git/commitdiff
[PDK-12013] sciserver: safertos: Fix OCMC RAM SCISERVER memory overlap
authorDon Dominic <a0486429@ti.com>
Mon, 11 Apr 2022 12:01:38 +0000 (17:31 +0530)
committerDon Dominic <a0486429@ti.com>
Thu, 26 May 2022 15:08:03 +0000 (20:38 +0530)
- OCMC_RAM_SCISERVER in sciserver_testapp linker file
  was encroaching into OCMC_RAM used by other linker files
- Fix this by reducing the length of OCMC_RAM_SCISERVER in sciserver_testapp linker file
  - Also relocate various sections in sciserver_testapp linker file TCMB and TCMA
    to fit all sections in available memories

- update checked-in sciserver binaries

- This fixes UDMA UT failure in R5F non-mcu1_0 cores

Signed-off-by: Don Dominic <a0486429@ti.com>
packages/ti/drv/sciclient/examples/sciserver_testapp/linker_r5_safertos.lds
packages/ti/drv/sciclient/tools/ccsLoadDmsc/j721e/sciserver_testapp_safertos_mcu1_0_release.rprc
packages/ti/drv/sciclient/tools/ccsLoadDmsc/j721e/sciserver_testapp_safertos_mcu1_0_release.xer5f

index e9302c0947c817fbe205c71ed1a4abe8562186b3..3fc2a82f721f01c4fe4f21493fc8f65327f759ee 100644 (file)
@@ -28,9 +28,9 @@
 /*       Stack Sizes for various modes       */
 /*-------------------------------------------*/
 __IRQ_STACK_SIZE   = 0x1000;
-__FIQ_STACK_SIZE   = 0x1000;
-__ABORT_STACK_SIZE = 0x1000;
-__UND_STACK_SIZE   = 0x1000;
+__FIQ_STACK_SIZE   = 0x0100;
+__ABORT_STACK_SIZE = 0x0100;
+__UND_STACK_SIZE   = 0x0100;
 __SVC_STACK_SIZE   = 0x1000;
 
 /*--------------------------------------------------------------------------*/
@@ -39,10 +39,11 @@ __SVC_STACK_SIZE   = 0x1000;
 MEMORY
 {
     VECTORS (X)                 : ORIGIN = 0x00000000 , LENGTH = 0x00000100
+    R5F_TCMA0(RWIX)             : ORIGIN = 0x00000100 , LENGTH = 0x00007F00
     R5F_TCMB0(RWIX)             : ORIGIN = 0x41010100 , LENGTH = 0x00007F00
     OCMC_RAM_BOARD_CFG (RWIX)   : ORIGIN = 0x41c80000 , LENGTH = 0x2000
     /* Sciserver App Space */
-    OCMC_RAM_SCISERVER (RWIX)   : ORIGIN = 0x41C82000 , LENGTH = 0x7BB00
+    OCMC_RAM_SCISERVER (RWIX)   : ORIGIN = 0x41C82000 , LENGTH = 0x61100
     OCMC_RAM_X509_HEADER1 (RWIX) : ORIGIN = 0x41cffb00 , LENGTH = 0x500 /* covers header for J7200/J721E */
     OCMC_RAM_X509_HEADER2 (RWIX) : ORIGIN = 0x41cfdb00 , LENGTH = 0x500 /* covers header for J721S2 */
 }  /* end of MEMORY */
@@ -67,14 +68,16 @@ SECTIONS
         .cinit                                                  : {} align( 32 )
         .MPU_INIT_FUNCTION                                      : {} palign( 8 )
         .startupData                                            : {} palign( 8 ), type = NOINIT
-    } > OCMC_RAM_SCISERVER
+    } > R5F_TCMA0
+
+
 
 /* Code sections. */
     GROUP LOAD_START( lnkFlashStartAddr ), LOAD_END( lnkFlashEndAddr )
     {
         .KERNEL_FUNCTION LOAD_START( lnkKernelFuncStartAddr ),
                          LOAD_END( lnkKernelFuncEndAddr ) 
-    } > OCMC_RAM_SCISERVER
+    } > R5F_TCMB0
 
     .unpriv_flash palign( 32 ) :
     {
@@ -82,23 +85,28 @@ SECTIONS
         *(.rodata)
     } > OCMC_RAM_SCISERVER
 
-
 /* Data sections. */
-    GROUP  palign( 0x10000 ), LOAD_START( lnkRamStartAddr ), LOAD_END( lnkRamEndAddr )
+
+    .KERNEL_DATA LOAD_START( lnkKernelDataStartAddr ),
+                    LOAD_END( lnkKernelDataEndAddr )        : {} palign( 32 )  > R5F_TCMB0
+    .boardcfg_data                                          : {} palign( 128 ) > R5F_TCMB0
+
+    GROUP  palign( 32 ), LOAD_START( lnkRamStartAddr ), LOAD_END( lnkRamEndAddr )
     {
-        .bss                                                    : {} align( 4 )
         .far                                                    : {} align( 4 )
-        .data                                                   : {} palign( 128 )
-        .boardcfg_data                                          : {} palign( 128 )
         .sysmem                                                 : {}
-        .bss.devgroup*                                          : {} align( 4 )
+        .bss                                                    : {} align( 4 ) 
+        .data                                                   : {} palign( 128 ) 
         .const.devgroup*                                        : {} align( 4 )
-        .KERNEL_DATA LOAD_START( lnkKernelDataStartAddr ),
-                     LOAD_END( lnkKernelDataEndAddr )           : {} palign( 0x800 )
+        .bss.devgroup*                                          : {} align( 4 )
 
+    } > OCMC_RAM_SCISERVER
 
     /* Stack sections. */
-        .stack  RUN_START( lnkStacksStartAddr ) : {}                            align(4)
+    .stack  RUN_START( lnkStacksStartAddr ) : {} align(4) > R5F_TCMA0
+
+    GROUP
+    {
         .irqStack                               : {. = . + __IRQ_STACK_SIZE;}   align(4)
         RUN_START(__IRQ_STACK_START)
         RUN_END(__IRQ_STACK_END)
@@ -114,6 +122,6 @@ SECTIONS
         .svcStack    END( lnkStacksEndAddr )    : {. = . + __SVC_STACK_SIZE;}   align(4)
         RUN_START(__SVC_STACK_START)
         RUN_END(__SVC_STACK_END)
-    } > OCMC_RAM_SCISERVER
+    } > R5F_TCMB0
 
 }
index d8f136041e5391a30bee4fe5556eab351b6784b2..a77ac0d6238955241140e451826a46dd37901434 100644 (file)
Binary files a/packages/ti/drv/sciclient/tools/ccsLoadDmsc/j721e/sciserver_testapp_safertos_mcu1_0_release.rprc and b/packages/ti/drv/sciclient/tools/ccsLoadDmsc/j721e/sciserver_testapp_safertos_mcu1_0_release.rprc differ
index 2549d7d448095aca0cc1e2a95cec8e6176977205..1579866e32f4dc06adbe3ac5d5293dfecd827ae1 100644 (file)
Binary files a/packages/ti/drv/sciclient/tools/ccsLoadDmsc/j721e/sciserver_testapp_safertos_mcu1_0_release.xer5f and b/packages/ti/drv/sciclient/tools/ccsLoadDmsc/j721e/sciserver_testapp_safertos_mcu1_0_release.xer5f differ