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raw | patch | inline | side by side (parent: 74d0f52)
author | Rishabh Garg <rishabh@ti.com> | |
Tue, 23 Nov 2021 14:13:15 +0000 (19:43 +0530) | ||
committer | Rishabh Garg <rishabh@ti.com> | |
Tue, 23 Nov 2021 14:13:15 +0000 (19:43 +0530) |
packages/ti/osal/arch/core/r5/Arch_util.c | patch | blob | history |
index d2bb0886d2e713deb8f0242c49e248fb45d3cb88..a86b1efe1f13c4cce42ac32d3b28b8e08952e384 100755 (executable)
{
uint32_t cpsr = CSL_armR5GetCpsrRegVal();
- DebugP_assert((cpsr & 0xC0) == 0xC0);
+ DebugP_assert((cpsr & 0xC0) != 0xC0);
Intc_SystemRestore(restoreValue);
}