PDK-7119: SBL: Adds basic config for Ethernet PHY

Adds basic board config for external Ethernet GESI
board connected to J721E/J7200.

Signed-off-by: Jonathan Bergsagel <jbergsagel@ti.com>

diff --git a/packages/ti/boot/sbl/board/k3/sbl_main.c b/packages/ti/boot/sbl/board/k3/sbl_main.c
index 761e8dfe945768d03e8bd1f4ceb558f59506c166..ff1cbaaef057fd9fda8be782f3e20d85da0fa362 100755 (executable)
--- a/packages/ti/boot/sbl/board/k3/sbl_main.c
+++ b/packages/ti/boot/sbl/board/k3/sbl_main.c
@@ -490,6 +490,11 @@ int main()
     SBL_log(SBL_LOG_MAX, "Initializing GTC ...");
     volatile uint32_t *gtcRegister = (uint32_t *) CSL_GTC0_GTC_CFG1_BASE;
     *gtcRegister = *gtcRegister | CSL_GTC_CFG1_CNTCR_EN_MASK | CSL_GTC_CFG1_CNTCR_HDBG_MASK;
+
+#if defined(SOC_J721E) || defined(SOC_J7200)
+    /* Configure external Ethernet PHY and pinmux */
+    SBL_ConfigureEthernet();
+#endif
 #endif
 
     SBL_log(SBL_LOG_MAX, "Begin parsing user application\n");

diff --git a/packages/ti/boot/sbl/soc/k3/sbl_soc.c b/packages/ti/boot/sbl/soc/k3/sbl_soc.c
index 2ed92deb6f72012337003de1abbe0d31f0841564..d21a521a8364201195e5a3252ef9082c48cb2018 100755 (executable)
--- a/packages/ti/boot/sbl/soc/k3/sbl_soc.c
+++ b/packages/ti/boot/sbl/soc/k3/sbl_soc.c
@@ -44,6 +44,14 @@
 #include <ti/drv/i2c/soc/I2C_soc.h>
 #include <ti/board/board.h>
 #include <ti/board/src/devices/board_devices.h>
+#if defined(SOC_J721E)
+#include <ti/board/src/j721e_evm/include/board_control.h>
+#include <ti/board/src/j721e_evm/include/board_ethernet_config.h>
+#endif
+#if defined(SOC_J7200)
+#include <ti/board/src/j7200_evm/include/board_control.h>
+#include <ti/board/src/j7200_evm/include/board_ethernet_config.h>
+#endif
 
 #if SBL_USE_DMA
 #include "sbl_dma.h"
@@ -513,6 +521,57 @@ void SBL_SetupPmicCfg(sblCfgPmic_t *pmicVoltCfg, uint32_t opp)
     SBL_ADD_PROFILE_POINT;
 }
 
+#if defined(SOC_J721E) || defined(SOC_J7200)
+void SBL_ConfigureEthernet(void)
+{
+#if !defined(SBL_USE_MCU_DOMAIN_ONLY) && !defined(SBL_ENABLE_DEV_GRP_MCU)
+    Board_STATUS status = BOARD_SOK;
+    bool gesiDetected = false;
+
+    gesiDetected = Board_detectBoard(BOARD_ID_GESI);
+
+#if defined(SOC_J721E)
+    /* Ethernet config: set proper board muxes for Eth. firmware */
+    /* Set IO Expander to use RMII on GESI board */
+    if (gesiDetected)
+    {
+        status = Board_control(BOARD_CTRL_CMD_SET_RMII_DATA_MUX, NULL);
+    }
+    if (status != BOARD_SOK)
+    {
+        SBL_log(SBL_LOG_ERR,"Board_control failed to configure RMII pins\r\n");
+    }
+#endif
+
+    /* Enable CPSW9G MDIO mux */
+    if (gesiDetected)
+    {
+        status = Board_control(BOARD_CTRL_CMD_SET_GESI_CPSW_MDIO_MUX, NULL);
+    }
+    if (status != BOARD_SOK)
+    {
+        SBL_log(SBL_LOG_ERR,"Board_control failed to configure CPSW9G MDIO mux\r\n");
+    }
+
+    if (Board_detectBoard(BOARD_ID_ENET))
+    {
+        /* Release PHY reset */
+        status = Board_cpswEnetExpPhyReset(0U);
+        if (status != BOARD_SOK)
+        {
+            SBL_log(SBL_LOG_ERR,"Board_cpswEnetExpPhyReset failed to reset the ENET PHY\r\n");
+        }
+        /* Release the COMA_MODE pin */
+        status = Board_cpswEnetExpComaModeCfg(0U);
+        if (status != BOARD_SOK)
+        {
+            SBL_log(SBL_LOG_ERR,"Board_cpswEnetExpComaModeCfg failed to release COMA_MODE pin\r\n");
+        }
+    }
+#endif
+}
+#endif
+
 /**********************************************************************
  ******************* SoC Specific Initilization ***********************
  **********************************************************************/

diff --git a/packages/ti/boot/sbl/soc/k3/sbl_soc_cfg.h b/packages/ti/boot/sbl/soc/k3/sbl_soc_cfg.h
index 175b1190e72616a785479f2accee08d778193a60..6200dd08b0e6463ff85ef86f0610b286e6f3a6ae 100755 (executable)
--- a/packages/ti/boot/sbl/soc/k3/sbl_soc_cfg.h
+++ b/packages/ti/boot/sbl/soc/k3/sbl_soc_cfg.h
@@ -833,6 +833,9 @@ extern uint16_t sblMapOtpVidToMilliVolts[256];
 void SBL_RAT_Config(sblRatCfgInfo_t *remap_list);
 void SBL_SocEarlyInit(uint32_t isBuildHs);
 void SBL_SocLateInit(void);
+#if defined(SOC_J721E) || defined(SOC_J7200)
+void SBL_ConfigureEthernet(void);
+#endif
 uint32_t sblAtcmSize(void);
 uint32_t sblBtcmSize(void);
 #endif