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raw | patch | inline | side by side (parent: 12817b3)
| author | Danny Jochelson <dsjochel@ti.com> | |
| Wed, 8 Jul 2020 14:33:36 +0000 (09:33 -0500) | ||
| committer | Sivaraj R <sivaraj@ti.com> | |
| Wed, 8 Jul 2020 17:08:46 +0000 (12:08 -0500) |
Removed extra debug prints in makefile.
Cleaned up J721E linker command file.
Cleaned up J721E linker command file.
| packages/ti/diag/examples/esm_example_app/j721e/linker_mcu1_0.lds | patch | blob | history | |
| packages/ti/diag/examples/esm_example_app/makefile | patch | blob | history |
diff --git a/packages/ti/diag/examples/esm_example_app/j721e/linker_mcu1_0.lds b/packages/ti/diag/examples/esm_example_app/j721e/linker_mcu1_0.lds
index a3bb4a064af5dc90a7ed9b64f0a0328ec59c2c11..5a7387ceaf0fb7803aaa8ccbfb3ee0d0ed113c05 100755 (executable)
/*----------------------------------------------------------------------------*/
/* Linker Settings */
/* Standard linker options */
---retain="*(.bootCode)" /* DSJ - ADDED */
---retain="*(.startupCode)" /* DSJ - ADDED */
---retain="*(.startupData)" /* DSJ - ADDED */
+--retain="*(.bootCode)"
+--retain="*(.startupCode)"
+--retain="*(.startupData)"
--retain="*(.intvecs)"
--retain="*(.intc_text)"
--retain="*(.rstvectors)"
/* Memory Map */
MEMORY
{
- VECTORS_MCU1_0 (X) : origin=0x41C7F000 length=0x1000
- VECTORS_MCU1_1 (X) : origin=0x41C7E000 length=0x1000
- /* VECTORS (X) : origin=0x41C7F000 length=0x1000 */
- /* Reset Vectors base address(RESET_VECTORS) should be 64 bytes aligned */ /* DSJ - changed */
- MCU1_0_RESET_VECTORS (X) : origin=0x41C00000 length=0x100
- MCU1_1_RESET_VECTORS (X) : origin=0x41C00100 length=0x200 - 0x100
- /* RESET_VECTORS (X) : origin=0x41C00000 length=0x100 */ /* DSJ - changed */
+ VECTORS_MCU1_0 (X) : origin=0x41C7F000 length=0x1000
+ VECTORS_MCU1_1 (X) : origin=0x41C7E000 length=0x1000
+ /* Reset Vectors base address(RESET_VECTORS) should be 64 bytes aligned */
+ MCU1_0_RESET_VECTORS (X) : origin=0x41C00000 length=0x100
+ MCU1_1_RESET_VECTORS (X) : origin=0x41C00100 length=0x200 - 0x100
/* MCU0_R5F_0 local view */
- MCU0_R5F_TCMA (X) : origin=0x0 length=0x7c00 fill=0xffffffff
+ MCU0_R5F_TCMA (X) : origin=0x0 length=0x7c00 fill=0xffffffff
MCU0_R5F_TCMA_TEST (X) : origin=0x7c00 length=0x400 fill=0xffffffff
- MCU0_R5F_TCMB0 (RWIX) : origin=0x41010000 length=0x8000
+ MCU0_R5F_TCMB0 (RWIX) : origin=0x41010000 length=0x8000
/* MCU0_R5F_1 SoC view */
MCU0_R5F1_ATCM (RWIX) : origin=0x41400000 length=0x8000
MCU0_R5F1_BTCM (RWIX) : origin=0x41410000 length=0x8000
/* MCU0 memory used for SBL and SYSFW. Avaiable after boot for appi starts for dynamic use */
- SBL_RESERVED (RWIX) : origin=0x41C00100 length=0x60000 - 0x100 /* ~383KB */
+ SBL_RESERVED (RWIX) : origin=0x41C00100 length=0x60000 - 0x100 /* ~383KB */
/* MCU0 share locations */
- OCMRAM (RWIX) : origin=0x41C60000 length=0x20000 - 0x2000 /* ~124KB */
+ OCMRAM (RWIX) : origin=0x41C60000 length=0x20000 - 0x2000 /* ~124KB */
/* MCU0 Location RESERVED for SDR RAT Self Test */
SDR_OCMC_RAT_SELFTEST (R) : origin=0x41C7EFC0 length=32
SDR_OCMC_MPU_SELFTEST (R) : origin=0x41C7EFE0 length=32
/* J721E R5F locations */
- /*MSMC3_SDR (RWIX) : origin=0x70000000 length=0x20000 */ /* 128 K */ /* DSJ - REMOVED */
MSMC3 (RWIX) : origin=0x70020000 length=0xD0000 /* 840 K */
/* Reserved for DMSC */
MSMC3_DMSC_FW (RWIX) : origin=0x700F0000 length=0x10000 /* 64K */
-/* MSMC3_H (RWIX) : origin=0x70100000 length=0xF2000 */ /* 1MB -56K */ /* DSJ - REMOVED */
-/* MSMC3_NOCACHE (RWIX) : origin=0x701F2000 length=0xE000 */ /* 56K */ /* DSJ - REMOVED */
DDR0 (RWIX) : origin=0x80000000 length=0x80000000 /* 2GB */
/* Additional memory settings */
+/* N/A */
} /* end of MEMORY */
{
/* 'intvecs' and 'intc_text' sections shall be placed within */
/* a range of +\- 16 MB */
- .intvecs : {} palign(8) > VECTORS_MCU1_0
- .intc_text : {} palign(8) > VECTORS_MCU1_0
- .rstvectors : {} palign(8) > MCU0_R5F_TCMA
-/*
- .sdr_text_esm align(8) : {
- sdr.*<sdr_esm.o*> (.text)
- } > MSMC3_SDR
- .sdr_text_ecc align(8) : {
- sdr.*<sdr_ecc.o*> (.text)
- } > MSMC3_SDR
- .sdr_text_ccm align(8) : {
- sdr.*<sdr_ccm.o*> (.text)
- } > MSMC3_SDR
- .sdr_text_crc align(8) : {
- sdr.*<sdr_crc.o*> (.text)
- } > MSMC3_SDR
- .sdr_text_mpu align(8) : {
- sdr.*<sdr_mpu.o*> (.text)
- } > MSMC3_SDR
- .sdr_text_wdt align(8) : {
- sdr.*<sdr_wdt.o*> (.text)
- } > MSMC3_SDR
- .sdr__esm align(8) : {
- } > MSMC3_SDR
- .sdr_data_ecc align(8) : {
- sdr.*<sdr_ecc.o*> (.const)
- } > MSMC3_SDR
- .sdr_data_mpu align(8) : {
- sdr.*<sdr_mpu*> (.const)
- } > MSMC3_SDR
- .sdr_bss_esm align(8) : {
- sdr.*<sdr_esm.o*> (.bss)
- } > MSMC3_SDR
- .sdr_bss_ecc align(8) : {
- sdr.*<sdr_ecc.o*> (.bss)
- } > MSMC3_SDR
- .sdr_bss_ccm align(8) : {
- sdr.*<sdr_ccm.o*> (.bss)
- } > MSMC3_SDR
- .sdr_bss_crc align(8) : {
- sdr.*<sdr_crc.o*> (.bss)
- } > MSMC3_SDR
- .sdr_bss_mpu align(8) : {
- sdr.*<sdr_mpu.o*> (.bss)
- } > MSMC3_SDR
- .sdr_bss_wdt align(8) : {
- sdr.*<sdr_wdt.o*> (.bss)
- } > MSMC3_SDR
- .sdr_bss_exception align(8) : {
- sdr.*<sdr_exception*> (.bss)
- } > MSMC3_SDR
-*/ /* DSJ - removed */
- .bootCode : {} palign(8) > MSMC3
- .startupCode: {} palign(8) > MSMC3
- .text : {} palign(8) > MSMC3
- .const : {} palign(8) > MSMC3
- .cinit : {} palign(8) > MSMC3
- .pinit : {} palign(8) > MSMC3
- .bss : {} align(4) > MSMC3
- .data : {} palign(128) > MSMC3
- .boardcfg_data : {} palign(128) > MSMC3
- .sysmem : {} > MSMC3
+ .intvecs : {} palign(8) > VECTORS_MCU1_0
+ .intc_text : {} palign(8) > VECTORS_MCU1_0
+ .rstvectors : {} palign(8) > MCU0_R5F_TCMA
+ .bootCode : {} palign(8) > MSMC3
+ .startupCode : {} palign(8) > MSMC3
+ .text : {} palign(8) > MSMC3
+ .const : {} palign(8) > MSMC3
+ .cinit : {} palign(8) > MSMC3
+ .pinit : {} palign(8) > MSMC3
+ .bss : {} align(4) > MSMC3
+ .data : {} palign(128) > MSMC3
+ .boardcfg_data : {} palign(128) > MSMC3
+ .sysmem : {} > MSMC3
.bss:extMemCache:ramdisk : {} align (32) > DDR0
- .stack : {} align(4) > MSMC3 (HIGH)
- .irqStack : {. = . + __IRQ_STACK_SIZE;} align(4) > MSMC3 (HIGH)
+ .stack : {} align(4) > MSMC3 (HIGH)
+ .irqStack : {. = . + __IRQ_STACK_SIZE;} align(4) > MSMC3 (HIGH)
RUN_START(__IRQ_STACK_START)
RUN_END(__IRQ_STACK_END)
- .fiqStack : {. = . + __FIQ_STACK_SIZE;} align(4) > MSMC3 (HIGH)
+ .fiqStack : {. = . + __FIQ_STACK_SIZE;} align(4) > MSMC3 (HIGH)
RUN_START(__FIQ_STACK_START)
RUN_END(__FIQ_STACK_END)
- .abortStack : {. = . + __ABORT_STACK_SIZE;} align(4) > MSMC3 (HIGH)
+ .abortStack : {. = . + __ABORT_STACK_SIZE;} align(4) > MSMC3 (HIGH)
RUN_START(__ABORT_STACK_START)
RUN_END(__ABORT_STACK_END)
- .undStack : {. = . + __UND_STACK_SIZE;} align(4) > MSMC3 (HIGH)
+ .undStack : {. = . + __UND_STACK_SIZE;} align(4) > MSMC3 (HIGH)
RUN_START(__UND_STACK_START)
RUN_END(__UND_STACK_END)
- .svcStack : {. = . + __SVC_STACK_SIZE;} align(4) > MSMC3 (HIGH)
+ .svcStack : {. = . + __SVC_STACK_SIZE;} align(4) > MSMC3 (HIGH)
RUN_START(__SVC_STACK_START)
RUN_END(__SVC_STACK_END)
/* Additional sections settings */
- .sdtf_rat_testsection : {} palign(32) > SDR_OCMC_RAT_SELFTEST
-
- .sdtf_ecc_testcodesection : {} palign(32) > MCU0_R5F_TCMA_TEST
+/* N/A */
} /* end of SECTIONS */
diff --git a/packages/ti/diag/examples/esm_example_app/makefile b/packages/ti/diag/examples/esm_example_app/makefile
index 16d5523bc12ab0bab8d3c465284c496db789d721..731d22631fed5b05d2ddb2c9c382f4efbbcb8631 100644 (file)
APP_NAME = diag_ex_esm_example_app
-$(info DSJ - GOT HERE)
BUILD_OS_TYPE=baremetal
SRCDIR = . ../common