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raw | patch | inline | side by side (parent: f8ddaa7)
author | sujith <sujith.s@ti.com> | |
Sat, 21 Nov 2020 05:03:00 +0000 (10:33 +0530) | ||
committer | Sujith Shivalingappa <sujith.s@ti.com> | |
Fri, 27 Nov 2020 06:35:39 +0000 (00:35 -0600) |
1. Enabled to used dummy interrupt
2. Corrected MPU config
3. Tested MMC/SD eMMC on MCU 10 & MPU 10
Signed-off-by: sujith <sujith.s@ti.com>
2. Corrected MPU config
3. Tested MMC/SD eMMC on MCU 10 & MPU 10
Signed-off-by: sujith <sujith.s@ti.com>
packages/ti/build/am65xx/sysbios_r5f.cfg | patch | blob | history | |
packages/ti/drv/mmcsd/test/am65xx/r5/mmcsdUnitTest_r5.cfg | patch | blob | history | |
packages/ti/drv/mmcsd/test/am65xx/r5/mpu.xs | [changed mode: 0644->0755] | patch | blob | history |
index ef581538073ac9155508b58493fec1d5811a06f0..90ed2862cfd8c8f768f4d9ce3276ac1a97d62430 100755 (executable)
* Details of silicon issue : https://confluence.itg.ti.com/display/PROCIPDEV/%2310+The+same+interrupt+cannot+be+nested+back-2-back+within+another+interrupt
* Sysbios Requirement Details: https://jira.itg.ti.com/browse/SYSBIOS-1419
* Workaround requires use of a resevred dummyIRQ.
- * Using DummyIRQ#383 as per cslr_intr_mss.h it is a reserved interrupt not connected to any
+ * Using DummyIRQ#352 as per cslr_intr_mcu0.h it is a reserved interrupt not connected to any
* peripheral interrupt sources
*/
Hwi.dummyIRQ = 352;
diff --git a/packages/ti/drv/mmcsd/test/am65xx/r5/mmcsdUnitTest_r5.cfg b/packages/ti/drv/mmcsd/test/am65xx/r5/mmcsdUnitTest_r5.cfg
index cff59b222a38bfa4e54ae5f44e2fad0a9722cba2..fecef94d9b41e53b053105ae03dc2710a04bb458 100755 (executable)
var Reset = xdc.useModule("xdc.runtime.Reset");
Reset.fxns[Reset.fxns.length++] = "&utilsCopyVecs2ATcm";
+/* Sysbios supports workaround for Silicon issue https://jira.itg.ti.com/browse/K3_OPEN_SI-148
+ * Details of silicon issue : https://confluence.itg.ti.com/display/PROCIPDEV/%2310+The+same+interrupt+cannot+be+nested+back-2-back+within+another+interrupt
+ * Sysbios Requirement Details: https://jira.itg.ti.com/browse/SYSBIOS-1419
+ * Workaround requires use of a resevred dummyIRQ.
+ * Using DummyIRQ#352 as per cslr_intr_mcu0.h it is a reserved interrupt not connected to any
+ * peripheral interrupt sources
+ */
+Hwi.dummyIRQ = 352;
+
/*
* Initialize MPU and enable it
*
diff --git a/packages/ti/drv/mmcsd/test/am65xx/r5/mpu.xs b/packages/ti/drv/mmcsd/test/am65xx/r5/mpu.xs
*/
/*
* ======== event_MPU.xs ========
- * MPU Settings for SIMMAXWELL device's Cortex-R5F
+ * MPU Settings for AM65XX device's Cortex-R5F
*/
/*
MPU.setRegionMeta(0, 0x00000000, MPU.RegionSize_4G, attrs);
attrs.enable = true;
-attrs.bufferable = true;
-attrs.cacheable = true;
+attrs.bufferable = false;
+attrs.cacheable = false;
attrs.shareable = false;
attrs.noExecute = false;
attrs.accPerm = 1; /* RW at PL1 */
MPU.setRegionMeta(1, 0x00000000, MPU.RegionSize_32K, attrs);
attrs.enable = true;
-attrs.bufferable = true;
-attrs.cacheable = true;
+attrs.bufferable = false;
+attrs.cacheable = false;
attrs.shareable = false;
attrs.noExecute = false;
attrs.accPerm = 1; /* RW at PL1 */
MPU.setRegionMeta(2, 0x41000000, MPU.RegionSize_32K, attrs);
attrs.enable = true;
-attrs.bufferable = true;
-attrs.cacheable = true;
+attrs.bufferable = false;
+attrs.cacheable = false;
attrs.shareable = false;
attrs.noExecute = false;
attrs.accPerm = 1; /* RW at PL1 */
attrs.subregionDisableMask = 0;
MPU.setRegionMeta(4, 0x41C00000, MPU.RegionSize_512K, attrs);
-attrs.enable = true;
-attrs.bufferable = true;
-attrs.cacheable = true;
-attrs.shareable = false;
-attrs.noExecute = false;
-attrs.accPerm = 1; /* RW at PL1 */
-attrs.tex = 1;
-attrs.subregionDisableMask = 0;
-MPU.setRegionMeta(4, 0x4F800000, MPU.RegionSize_512K, attrs);
-
-
attrs.enable = true;
attrs.bufferable = true;
attrs.cacheable = true;
attrs.accPerm = 1; /* RW at PL1 */
attrs.tex = 1;
attrs.subregionDisableMask = 0;
-MPU.setRegionMeta(6, 0x04000000, MPU.RegionSize_2M, attrs);
-
-
-attrs.enable = true;
-attrs.bufferable = true;
-attrs.cacheable = true;
-attrs.shareable = false;
-attrs.noExecute = false;
-attrs.accPerm = 1; /* RW at PL1 */
-attrs.tex = 1;
-attrs.subregionDisableMask = 0;
-MPU.setRegionMeta(7, 0x80000000, MPU.RegionSize_2G, attrs);
+MPU.setRegionMeta(6, 0x80000000, MPU.RegionSize_2G, attrs);