| author | Mahesh Radhakrishnan <a0875154@ti.com> | |
| Fri, 8 Nov 2019 19:53:23 +0000 (13:53 -0600) | ||
| committer | Mahesh Radhakrishnan <a0875154@ti.com> | |
| Fri, 8 Nov 2019 19:53:23 +0000 (13:53 -0600) |
* commit 'dd60d55e88c5335ce2b2f4209e6c8aa86f55e03e':
dm f/w: [tmp] enable pa_stat
dm_f/w: add collision counters
dm_f/w: add pa_stat macros
dm f/w: add Copyright header to hd_helper.h
dm_f/w: add half duplex support
dm f/w: store BD to smem if half duplex
dm f/w: add macros, structures fields and definitions for HD
dm f/w: [tmp] enable pa_stat
dm_f/w: add collision counters
dm_f/w: add pa_stat macros
dm f/w: add Copyright header to hd_helper.h
dm_f/w: add half duplex support
dm f/w: store BD to smem if half duplex
dm f/w: add macros, structures fields and definitions for HD
diff --git a/packages/ti/drv/emac/firmware/icss_dualmac/src/hd_helper.h b/packages/ti/drv/emac/firmware/icss_dualmac/src/hd_helper.h
--- /dev/null
@@ -0,0 +1,165 @@
+;
+; TEXAS INSTRUMENTS TEXT FILE LICENSE
+;
+; Copyright (c) 2018-2019 Texas Instruments Incorporated
+;
+; All rights reserved not granted herein.
+;
+; Limited License.
+;
+; Texas Instruments Incorporated grants a world-wide, royalty-free, non-exclusive
+; license under copyrights and patents it now or hereafter owns or controls to
+; make, have made, use, import, offer to sell and sell ("Utilize") this software
+; subject to the terms herein. With respect to the foregoing patent license,
+; such license is granted solely to the extent that any such patent is necessary
+; to Utilize the software alone. The patent license shall not apply to any
+; combinations which include this software, other than combinations with devices
+; manufactured by or for TI (“TI Devices”). No hardware patent is licensed hereunder.
+;
+; Redistributions must preserve existing copyright notices and reproduce this license
+; (including the above copyright notice and the disclaimer and (if applicable) source
+; code license limitations below) in the documentation and/or other materials provided
+; with the distribution.
+;
+; Redistribution and use in binary form, without modification, are permitted provided
+; that the following conditions are met:
+; No reverse engineering, decompilation, or disassembly of this software is
+; permitted with respect to any software provided in binary form.
+; Any redistribution and use are licensed by TI for use only with TI Devices.
+; Nothing shall obligate TI to provide you with source code for the software
+; licensed and provided to you in object code.
+;
+; If software source code is provided to you, modification and redistribution of the
+; source code are permitted provided that the following conditions are met:
+; Any redistribution and use of the source code, including any resulting derivative
+; works, are licensed by TI for use only with TI Devices.
+; Any redistribution and use of any object code compiled from the source code
+; and any resulting derivative works, are licensed by TI for use only with TI Devices.
+;
+; Neither the name of Texas Instruments Incorporated nor the names of its suppliers
+; may be used to endorse or promote products derived from this software without
+; specific prior written permission.
+;
+; DISCLAIMER.
+;
+; THIS SOFTWARE IS PROVIDED BY TI AND TI’S LICENSORS "AS IS" AND ANY EXPRESS OR IMPLIED
+; WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+; AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL TI AND TI’S
+; LICENSORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+; GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+READ_RGMII_CFG .macro rtmp, speed_flags
+ TM_DISABLE
+ lbco &rtmp, c9, 0x4, 4
+ and rtmp.b0, rtmp.b0, f_mask_o ; takes only speed/duplex related bits
+ and speed_flags, speed_flags, f_mask_a ; clean old status
+ or speed_flags, speed_flags, rtmp.b0
+ TM_ENABLE
+ .endm
+
+; most likely IPG and backoff is the same timer
+; so, we will need only one macro
+if_ipg_not_expired .macro then_go
+ ; TODO check IPG
+ ; if not expired jmp then_go
+ ldi32 r2, FW_CONFIG
+ lbbo &r3, r2, TX_IPG, 4 ;
+ lbco &r4, c11, 0x0c, 4 ; read cycle counte
+ qbgt then_go, r4, r3 ; not expired yet
+ clr GRegs.speed_f, GRegs.speed_f, f_wait_ipg
+ .endm
+
+; touch r2, r3, r4
+reset_cycle_cnt .macro
+ lbco &r2, c11, 0x0, 4 ; disable cycle counter
+ clr r2.t3
+ sbco &r2, c11, 0x0, 4
+ zero &r3, 4 ; reset cycle counter
+ sbco &r3, c11, 0xc, 4
+ set r2.t3 ; enable cycle counter
+ sbco &r2, c11, 0x0, 4
+ .endm
+
+IPG_10MBPS .set 2400 ; (12 * 8 * 100) nsec / 4
+IPG_10MBPS7 .set 3800 ; ((12 + 7) * 8 * 100) nsec / 4
+IPG_10MBPS_ADJ .set 600 ; (3 * 8 * 100) / 4
+IPG_100MBPS_ADJ .set 60 ; (3 * 8 * 10) / 4
+
+start_backoff_timer .macro num
+ reset_cycle_cnt
+ mov r2, num
+ qbge $3, r2, 9
+ ldi r2, 9
+$3: ldi r3, 1 ; create mask
+ not r3, r3 ;
+ lsl r3, r3, r2 ;
+ not r3, r3 ;
+ GET_IEP_CNT r4 ;
+ xor r4.w0, r4.w0, r4.w2
+ ldi32 r2, FW_CONFIG ; read value from SEED
+ lbbo &r5, r2, CFG_SEED, 4 ; get seed
+ xor r4, r4, r5 ; xor time with seed
+ and r4, r4, r3 ; mask with backoff interval
+ qbbc $1, GRegs.speed_f, f_100mbps
+ ; for 100 mbps multiply on 5.12 usec (r4 << 7)
+ lsl r3, r4, 7
+ ldi r5, IPG_100MBPS_ADJ ;
+ qba $2
+$1: ; for 10 mbps multiply on 51.2 usec (r4 << 10) + (r4 << 8)
+ lsl r3, r4, 10
+ lsl r4, r4, 8
+ add r3, r3, r4
+ ; for 10 MBPS we need to maintain IPG manually
+ ; so if r3 is 0 then set it to 9.6 usec
+ qbne $2, r3, 0
+ ldi r3, IPG_10MBPS
+ ldi r5, IPG_10MBPS_ADJ ;
+$2: add r3, r3, r5
+ sbbo &r3, r2, TX_IPG, 4 ; store it to TX_IPG
+ set GRegs.speed_f, GRegs.speed_f, f_wait_ipg
+ .endm
+
+start_ipg_timer .macro
+ reset_cycle_cnt
+ ldi32 r2, FW_CONFIG ;
+ ldi r4, IPG_10MBPS7
+ sbbo &r4, r2, TX_IPG, 4 ; store it to TX_IPG
+ set GRegs.speed_f, GRegs.speed_f, f_wait_ipg
+ .endm
+
+
+; read 8bytes from smem offset to reg and reg+1
+; we use r0
+read_bd_from_smem .macro reg, offset
+ ldi32 r0, FW_CONFIG + offset
+ lbbo ®, r0, 0, 8
+ .endm
+
+write_bd_to_smem .macro reg, offset
+ ldi32 r0, FW_CONFIG + offset
+ sbbo ®, r0, 0, 8
+ .endm
+
+update_col_status .macro
+ .if $defined("SLICE0")
+ lbco &r2, c27, 0x38, 4
+ .else
+ lbco &r2, c27, 0x3c, 4
+ .endif
+ qbbc $1, r2, 1
+ set GRegs.speed_f, GRegs.speed_f, f_col_detected
+$1:
+ .endm
+
+read_col_status .macro reg
+ .if $defined("SLICE0")
+ lbco ®, c27, 0x38, 4
+ .else
+ lbco ®, c27, 0x3c, 4
+ .endif
+ .endm
+
diff --git a/packages/ti/drv/emac/firmware/icss_dualmac/src/iep.h b/packages/ti/drv/emac/firmware/icss_dualmac/src/iep.h
index 6582a3db2f12aa3d2837470379fc3597c5991eaf..843d7dbbab8703a57afe022823ebb0a7ea001875 100644 (file)
IEP_CFG1_BASEx .set (0x26000+0x30)
IEP_GCFG .set 0x00
-IEP_C64_HI .set 0x10
-IEP_C64_LO .set 0x14
+IEP_C64_HI .set 0x14
+IEP_C64_LO .set 0x10
IEP_CAP_RX_S0 .set 0x20
IEP_CAP_RX_S1 .set 0x30
IEP_CAP_TX_S0 .set 0x40
lbbo &r_ts_h, r0, 0, 8
.endm
+GET_IEP_CNT .macro reg
+ .if $isdefed("SLICE0")
+ ldi32 r0, (IEP_BASE0+IEP_C64_LO)
+ .else ; slice1
+ ldi32 r0, (IEP_BASE1+IEP_C64_LO)
+ .endif
+ lbbo ®, r0, 0, 4
+ .endm
+
diff --git a/packages/ti/drv/emac/firmware/icss_dualmac/src/makefile b/packages/ti/drv/emac/firmware/icss_dualmac/src/makefile
index 2c1b6463c838f03853bbf1e6edac8633daa978ae..9c179c90fe2a95c6a2048490999e32971848be2b 100644 (file)
--preproc_with_compile \
-eo.opru \
-EF_PRU0 = -DMAC -DSLICE0
-EF_PRU1 = -DMAC -DSLICE1
-EF_RTU0 = -DMAC -DSLICE0 -DDO_PSI_ABORT
-EF_RTU1 = -DMAC -DSLICE1 -DDO_PSI_ABORT
+EF_PRU0 = -DMAC -DSLICE0 -DPRU0
+EF_PRU1 = -DMAC -DSLICE1 -DPRU1
+EF_RTU0 = -DMAC -DSLICE0 -DRTU0 -DDO_PSI_ABORT
+EF_RTU1 = -DMAC -DSLICE1 -DRTU1 -DDO_PSI_ABORT
APP_DEFS = --define=RGMII \
-z \
diff --git a/packages/ti/drv/emac/firmware/icss_dualmac/src/pa_stat.h b/packages/ti/drv/emac/firmware/icss_dualmac/src/pa_stat.h
--- /dev/null
@@ -0,0 +1,76 @@
+;
+; TEXAS INSTRUMENTS TEXT FILE LICENSE
+;
+; Copyright (c) 2019 Texas Instruments Incorporated
+;
+; All rights reserved not granted herein.
+;
+; Limited License.
+;
+; Texas Instruments Incorporated grants a world-wide, royalty-free, non-exclusive
+; license under copyrights and patents it now or hereafter owns or controls to
+; make, have made, use, import, offer to sell and sell ("Utilize") this software
+; subject to the terms herein. With respect to the foregoing patent license,
+; such license is granted solely to the extent that any such patent is necessary
+; to Utilize the software alone. The patent license shall not apply to any
+; combinations which include this software, other than combinations with devices
+; manufactured by or for TI (“TI Devices”). No hardware patent is licensed hereunder.
+;
+; Redistributions must preserve existing copyright notices and reproduce this license
+; (including the above copyright notice and the disclaimer and (if applicable) source
+; code license limitations below) in the documentation and/or other materials provided
+; with the distribution.
+;
+; Redistribution and use in binary form, without modification, are permitted provided
+; that the following conditions are met:
+; No reverse engineering, decompilation, or disassembly of this software is
+; permitted with respect to any software provided in binary form.
+; Any redistribution and use are licensed by TI for use only with TI Devices.
+; Nothing shall obligate TI to provide you with source code for the software
+; licensed and provided to you in object code.
+;
+; If software source code is provided to you, modification and redistribution of the
+; source code are permitted provided that the following conditions are met:
+; Any redistribution and use of the source code, including any resulting derivative
+; works, are licensed by TI for use only with TI Devices.
+; Any redistribution and use of any object code compiled from the source code
+; and any resulting derivative works, are licensed by TI for use only with TI Devices.
+;
+; Neither the name of Texas Instruments Incorporated nor the names of its suppliers
+; may be used to endorse or promote products derived from this software without
+; specific prior written permission.
+;
+; DISCLAIMER.
+;
+; THIS SOFTWARE IS PROVIDED BY TI AND TI’S LICENSORS "AS IS" AND ANY EXPRESS OR IMPLIED
+; WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+; AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL TI AND TI’S
+; LICENSORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+; GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+TX_COL_RETRIES .set 80
+TX_COL_DROPPED .set 81
+
+; index is just a number but not an offset.
+m_inc_stat .macro reg, index
+ .if $defined("PRU0")
+ ldi reg, index
+ sbco ®, c9, 0x40, 1
+ .endif
+ .if $defined("PRU1")
+ ldi reg, (index + 128)
+ sbco ®, c9, 0x44, 1
+ .endif
+ .if $defined("RTU0")
+ ldi reg, index
+ sbco ®, c9, 0x48, 1
+ .endif
+ .if $defined("RTU1")
+ ldi reg, (index + 128)
+ sbco ®, c9, 0x4c, 1
+ .endif
+ .endm
diff --git a/packages/ti/drv/emac/firmware/icss_dualmac/src/reg_alias.h b/packages/ti/drv/emac/firmware/icss_dualmac/src/reg_alias.h
index d3d461541ec919193496570a49555b3c79c6193f..e4e4da568f1d77e35e135a9a58b79d528f29495c 100644 (file)
.endstruct
.endunion ;rx
-scratch .uint
+speed_f .ubyte ; speed/duplex flags
+ret_cnt .ubyte ; retransmission counter
+tx_blk .ubyte ; tx 64 byte blocks counter
+res .ubyte ;
tx .union
x .uint
GRegs .sassign r24, Struct_GLOBAL
+; 100/10Mbps/half duplex port flags. That is mirror of the correcponding bits
+; of the ICSSG_RGMII_CFG register
+ .if $isdefed("SLICE0")
+f_100mbps .set 1
+f_1gbps .set 2
+f_half_d .set 3
+f_mask_o .set 0xe
+f_mask_a .set 0xf1
+
+f_col_detected .set 4
+f_stopped_due_col .set 5
+f_wait_ipg .set 6
+
+
+ .else
+f_100mbps .set 5
+f_1gbps .set 6
+f_half_d .set 7
+f_mask_o .set 0xe0
+f_mask_a .set 0x1f
+
+f_col_detected .set 0
+f_stopped_due_col .set 1
+f_wait_ipg .set 2
+ .endif
+
;RX flags
f_tohost .set 0
f_rx_sof .set 7
Struct_RTU_GLOBAL .struct
;-1-
ret_addr .ushort
-res1 .ushort
+res .ubyte
+speed_f .ubyte
+
;-2-
StallMask .ubyte
ActThrdNum .ubyte
diff --git a/packages/ti/drv/emac/firmware/icss_dualmac/src/rtu_v2.asm b/packages/ti/drv/emac/firmware/icss_dualmac/src/rtu_v2.asm
index 020ba0de54ae968105c32f22b2037aeb2f80db03..9cde7d8d75c68b974469455719edd46d9bde5929 100644 (file)
.include "portq.h"
.include "lebe.h"
.include "bpool.h"
+ .include "hd_helper.h"
.include "scheduler.h"
.include "ipc.h"
.include "filter.h"
no_psi: jmp psi_idle2
psi_idle3:
+ READ_RGMII_CFG r1, GRrtu.speed_f
CALL_SUB sstate_00, psi_idle
jmp psi_idle
diff --git a/packages/ti/drv/emac/firmware/icss_dualmac/src/rxl2_txl2.asm b/packages/ti/drv/emac/firmware/icss_dualmac/src/rxl2_txl2.asm
index c158c8985bb54b05cdb41a2c97834fdc3fcada36..9d05fbf8892c7618d3cb96fb2af47ab2f8309446 100644 (file)
.include "ipc.h"
.include "iep.h"
.include "psisandf.h"
+ .include "hd_helper.h"
+ .include "pa_stat.h"
loop_here .macro
here?: jmp here?
.endif
.endm
+; we need to read DMA back only if there is ongoing transfer
+; assume when we read DMA status it shouldn't be 0,
+; otherwise let's think it is already stopped
+flush_dma .macro unit
+ XFR2VBUS_CANCEL_READ_AUTO_64_CMD unit
+ nop
+$1: xin unit, &r18, 4
+ qbeq $2, r18.w0, 0
+ qbne $1, r18.w0, 0x5
+ XFR2VBUS_READ64_RESULT unit
+$2:
+ .endm
+
+stop_tx_due_colission .macro
+ qbbc $1, GRegs.tx.b.flags, f_next_dma
+ flush_dma XFR2VBUS_XID_READ0
+ qba $2 ;
+$1: flush_dma XFR2VBUS_XID_READ1
+$2: set r31, r31, 29 ;tx.eof
+ set GRegs.speed_f, GRegs.speed_f, f_stopped_due_col
+ ldi GRegs.tx.b.state, TX_S_W_EOF
+ .endm
+
; Code starts {{{1
.retain ; Required forbuilding .out with assembly file
.retainrefs ; Required forbuilding .out with assembly file
Start:
TM_DISABLE
+ ldi32 r0, 0x80000000 ;TODO: driver has to enable PA_STAT
+ ldi32 r1, 0x3c000
+ sbbo &r0, r1, 8, 4
+
zero &r0, 124
P2P_IPC_ZAP ;zap IPC area
xout XFR2VBUS_XID_READ0, &r18, 4 ;disable xfr2vbus autoread mode
;-------------------------------------------------------------------------
zero &r18, 24
+ ldi GRegs.ret_cnt, 0
;================================
; BG LOOP: until cmd cancel seen
;================================
;schedule TX2WIRE ?
;----------------------
scheduler:
+ READ_RGMII_CFG r2, GRegs.speed_f ; update speed/duplex fields
+ sbco &r25, c28, 0x20, 4
+ qbbs sch_10, GRegs.speed_f, f_half_d ; don't check col if full duplex
+; if TX is idle and colission is set, probably it is from the
+; previouse packet. Just wait
+ read_col_status r2
+ qbne sch_05, GRegs.tx.b.state, TX_S_IDLE ; TODO: check error case
+ qbbs bg_loop, r2, 1 ; still active
+sch_05: qbbc sch_10, r2, 1 ;
+; we came here if TX is active and collission is detected
+; we need to cancel the current TX and schedule retransmission
+ qbbs sch_10, GRegs.speed_f, f_stopped_due_col ; don't stop twice
TM_DISABLE
- qbeq bg_schedule0, GRegs.tx.b.state, TX_S_IDLE ;if tx state is idle, check IPC for new descriptor
- qbne sched_done, GRegs.tx.b.state, TX_S_ERR ;if tx state is idle, check IPC for new descriptor
+ set GRegs.speed_f, GRegs.speed_f, f_col_detected
+ flip_tx_r0_r23
+ stop_tx_due_colission
+ flip_tx_r0_r23
+ TM_ENABLE
+sch_10:
+ TM_DISABLE
+ ;if tx state is idle, check IPC for new descriptor
+ qbeq bg_schedule0, GRegs.tx.b.state, TX_S_IDLE
+ qbne sched_done, GRegs.tx.b.state, TX_S_ERR
;error case (underflow)
;todo
ldi GRegs.tx.b.state, TX_S_IDLE
jmp bg_loop
bg_schedule0:
-;non PSA case only check expected next dma
+ ldi GRegs.tx_blk, 0
+ clr GRegs.speed_f, GRegs.speed_f, f_col_detected
+ clr GRegs.speed_f, GRegs.speed_f, f_stopped_due_col
+ qbbs bg_new_pkt, GRegs.speed_f, f_1gbps ; process as usual
+ qbbc bg_half_duplex, GRegs.speed_f, f_half_d ;
+bg_schedule1:
+ qbbs bg_new_pkt, GRegs.speed_f, f_100mbps ;
+ if_ipg_not_expired sched_done
+ qba bg_new_pkt
+
+bg_half_duplex:
+ qbne sched_done, GRegs.rx.b.state, RX_STATE_IDLE ; we have active RX,don't start TX
+ qbeq bg_schedule1, GRegs.ret_cnt, 0 ; just new packet
+ if_ipg_not_expired sched_done
+; OK we need to restart transmition of the same packet
+; use the same dma, which was used for the packet
+ qbbc retr_1, GRegs.tx.b.flags, f_next_dma
+ read_bd_from_smem r2, BD_OFS_0
+ XFR2VBUS_ISSUE_READ_AUTO_64_CMD XFR2VBUS_XID_READ0, r2, ADDR_HI
+ TM_ENABLE
+ XFR2VBUS_WAIT4READY XFR2VBUS_XID_READ0
+ qba retr_2
+retr_1:
+ read_bd_from_smem r2, BD_OFS_1
+ XFR2VBUS_ISSUE_READ_AUTO_64_CMD XFR2VBUS_XID_READ1, r2, ADDR_HI
+ TM_ENABLE
+ XFR2VBUS_WAIT4READY XFR2VBUS_XID_READ1
+
+retr_2: TM_DISABLE
+ TX_TASK_INIT2_shell r3
+ TM_ENABLE
+ jmp bg_loop
+
+bg_new_pkt:
+ ldi GRegs.ret_cnt, 0
qbbs bg_chk1, GRegs.tx.b.flags, f_next_dma
-;check dma0
PRU_IPC_RX_CH0Q sched_done, r2, XFR2VBUS_XID_READ0
-; have new packet in r2= len-flags
TX_TASK_INIT2_shell r2
set GRegs.tx.b.flags, GRegs.tx.b.flags, f_next_dma
TM_ENABLE
jmp bg_loop
bg_chk1:
-;check 2nd dma
PRU_IPC_RX_CH0Q sched_done, r3, XFR2VBUS_XID_READ1
TX_TASK_INIT2_shell r3
clr GRegs.tx.b.flags, GRegs.tx.b.flags, f_next_dma
;---------------------------------------------------------------------
TX_EOF:
qbne tx_underflow, GRegs.tx.b.state, TX_S_W_EOF
-; TX TS processing
flip_tx_r0_r23
+ m_inc_stat r0.b0, 82
+ qbbs tx_proc_col, GRegs.speed_f, f_stopped_due_col
+; TX TS processing
qbbc no_tx_ts, TxRegs.ds_flags, 5 ; we don't need tx_ts
GET_PKT_TX_TS r2
ldi32 r10, FW_CONFIG + TX_TS_BASE
sbbo &r2, r10, 0, 8
SPIN_TOG_LOCK_LOC PRU_RTU_TX_TS_READY
no_tx_ts:
+; if half duplex IPC to RTU
+ qbbs tx_eof_0, GRegs.speed_f, f_half_d
+ qbbs tx_eof_ipc1, GRegs.tx.b.flags, f_next_dma
+ SPIN_TOG_LOCK_LOC PRU_RTU_EOD_P_FLAG
+ qba tx_eof_0
+tx_eof_ipc1:
+ SPIN_TOG_LOCK_LOC PRU_RTU_EOD_E_FLAG
+; we don't check if the next packet scheduled for 10Mbps
+tx_eof_0:
+ qbbs tx_eof_1, GRegs.speed_f, f_1gbps
+ qbbc no_new_tx_10mbps, GRegs.speed_f, f_100mbps
+tx_eof_1:
+ ldi GRegs.tx_blk, 0
+ clr GRegs.speed_f, GRegs.speed_f, f_col_detected
+ clr GRegs.speed_f, GRegs.speed_f, f_stopped_due_col
+ ldi GRegs.ret_cnt, 0
+
qbbs teof_chk1, GRegs.tx.b.flags, f_next_dma
PRU_IPC_RX_CH0Q no_new_tx, r2, XFR2VBUS_XID_READ0
TX_TASK_INIT2 r2
add GRegs.pkt_cnt.w.tx, GRegs.pkt_cnt.w.tx, 1
loop_here
+no_new_tx_10mbps:
+ ldi GRegs.tx_blk, 0
+ clr GRegs.speed_f, GRegs.speed_f, f_col_detected
+ clr GRegs.speed_f, GRegs.speed_f, f_stopped_due_col
+ ldi GRegs.ret_cnt, 0
+ start_ipg_timer
+
no_new_tx:
ldi GRegs.tx.b.state, TX_S_IDLE
qba tx_eof_on_deck_done
-
+;
+; we came here due to collision, so we are in half duplex mode.
+; We either retranssmit or drop the packet
+;
+tx_proc_col:
+ m_inc_stat r1.b0, TX_COL_RETRIES
+ qble txp_max_retry, GRegs.ret_cnt, 16 ; todo: define
+ qblt txp_max_retry, GRegs.tx_blk, 2 ; TODO: update for late col
+ start_backoff_timer GRegs.ret_cnt
+ add GRegs.ret_cnt, GRegs.ret_cnt, 1
+ qba no_new_tx
+txp_max_retry:
+ m_inc_stat r1.b0, TX_COL_DROPPED
+ qbbs txp_max_01, GRegs.tx.b.flags, f_next_dma
+ SPIN_TOG_LOCK_LOC PRU_RTU_EOD_P_FLAG
+ qba txp_max_02
+txp_max_01:
+ SPIN_TOG_LOCK_LOC PRU_RTU_EOD_E_FLAG
+txp_max_02:
+ start_ipg_timer
+ ldi GRegs.ret_cnt, 0
+ qbbc no_new_tx_10mbps, GRegs.speed_f, f_100mbps
+ qba no_new_tx
+
;------exception cases------
tx_underflow:
ldi GRegs.tx.b.state, TX_S_ERR
handle_portq:
flip_tx_r0_r23
+ add GRegs.tx_blk, GRegs.tx_blk, 1
+ qbbs tx_fifo1, GRegs.speed_f, f_half_d
+ qbbs txf_90, GRegs.speed_f, f_stopped_due_col ; don't stop twice
+
+ update_col_status
+ qbbc tx_fifo1, GRegs.speed_f, f_col_detected
+ ; collision was detected, we need to stop pushing to TXL2
+ stop_tx_due_colission
+ qba txf_90
+
+tx_fifo1:
TX_FILL_FIFO XFR2VBUS_XID_READ0
- TM_YIELD
+txf_90: TM_YIELD
flip_tx_r0_r23
loop_here
diff --git a/packages/ti/drv/emac/firmware/icss_dualmac/src/scheduler.h b/packages/ti/drv/emac/firmware/icss_dualmac/src/scheduler.h
index 10c5274a90fa53cabdb50c985a0e6d8a811c9a75..38b24917645b6f1108d4761dfa6a1eeb0670a242 100644 (file)
clr r8.t20
mov r20, r0
mov r2, r8
- RTU_IPC_TX_CH0_PPKT
-
+ qbbs $5, GRrtu.speed_f, f_half_d
+ write_bd_to_smem r7, BD_OFS_0
+$5: RTU_IPC_TX_CH0_PPKT
PAGE_SAVE2 SCHED_MAIN
jmp done?
set GRrtu.flags, GRrtu.flags, f_dma1
mov r20, r0
mov r3, r8
- RTU_IPC_TX_CH0_EPKT
+ qbbs $6, GRrtu.speed_f, f_half_d
+ write_bd_to_smem r7, BD_OFS_1
+$6: RTU_IPC_TX_CH0_EPKT
PAGE_SAVE2 SCHED_MAIN2
jmp done?
diff --git a/packages/ti/drv/emac/firmware/icss_dualmac/src/smem.h b/packages/ti/drv/emac/firmware/icss_dualmac/src/smem.h
index 6f63a69df5d32666f0e37107595220adedeea858..0afdd5d7d52e230e8610d1577fd90b9d43a03572 100644 (file)
CFG_N_BURST .set CFG_FLAGS + 4 ;just for debug
CFG_RTU_STATUS .set CFG_N_BURST + 4 ; only RTU can write here
CFG_OUT .set CFG_RTU_STATUS + 4
+CFG_RES .set CFG_OUT + 4
+
+CFG_SEED .set CFG_RES + 4 ; seed to calculate random value
+BD_OFS_0 .set CFG_SEED + 4;
+BD_OFS_1 .set BD_OFS_0 + 8
+TX_IPG .set BD_OFS_1 + 8
+BD_FREE .set TX_IPG + 4
+
TX_TS_BASE .set 0x300
diff --git a/packages/ti/drv/emac/firmware/icss_dualmac/src/tx.h b/packages/ti/drv/emac/firmware/icss_dualmac/src/tx.h
index 819a674e1845ac6cf69dbef33340442b0ed041cd..6af0291b66d96ac1ea38fb845f35e3f6235f69eb 100644 (file)
;main macro to initialize TX from s&f IPC 'queue'
; r_d holds descriptor
TX_TASK_INIT2 .macro r_d
-
;temporary
mov TxRegs.ds_flags, r_d.w2 ;descriptor2(flags, etc)
mov GRegs.tx.b.len, r_d.w0 ;save length we are expecting to transmit
jmp $9
$4: LAST_DMA_TO_TXL2 runit
+ qbbc $6, GRegs.speed_f, f_half_d ; don't tell RTU yet
SPIN_TOG_LOCK_LOC PRU_RTU_EOD_P_FLAG
jmp $6
$5: LAST_DMA_TO_TXL2 (runit + 1)
+ qbbc $6, GRegs.speed_f, f_half_d ; don't tell RTU yet
SPIN_TOG_LOCK_LOC PRU_RTU_EOD_E_FLAG
$6: ;close out tx
qbbs $7, TxRegs.ds_flags, 0 ;f_desc_do_crc