[PDK-10497] OSAL: TimerP: Fix Timer TIOCP_CFG Register configuration

- Set 'emulation mode' and 'idle mode' in TIOCP_CFG
  after Soft Reset(if required)

- Earlier, it was setting all bits except soft reset bit to 1 due to wrong implementation

Signed-off-by: Don Dominic <a0486429@ti.com>

diff --git a/packages/ti/osal/src/nonos/timer/v1/TimerP_nonos.c b/packages/ti/osal/src/nonos/timer/v1/TimerP_nonos.c
index 3eb94dbfab395811e19b660b9e6dca303b1b345d..bee22637b06554c18d75acc390feb1ab5945ff76 100755 (executable)
--- a/packages/ti/osal/src/nonos/timer/v1/TimerP_nonos.c
+++ b/packages/ti/osal/src/nonos/timer/v1/TimerP_nonos.c
@@ -297,8 +297,10 @@ static TimerP_Status TimerP_dmTimerDeviceCfg(TimerP_Struct *timer, uint32_t base
      (void)TIMERReset(baseAddr);
     }
 
+    /* Soft Reset(if required) is already issued. Now Set 'emulation mode' and 'idle mode' in TIOCP_CFG. */
     HW_WR_REG32(baseAddr + TIMER_TIOCP_CFG,
-                 (~(uint32_t)TIMER_TIOCP_CFG_SOFTRESET_SOFTRESET_VALUE_1));
+                 (timer->tiocpCfg & (~(uint32_t)TIMER_TIOCP_CFG_SOFTRESET_SOFTRESET_VALUE_1)));
+  
 
     /*xfer 'posted' setting if not current */
     tsicr = HW_RD_REG32(baseAddr + TIMER_TSICR);