PDK-9697:Board: Reverting the pinmux mask changes for TPR12//AWR294x

 - Pinmux changes done for retaining the reset values are impacting
   the functionality. Reverting the changes.

diff --git a/packages/ti/board/src/awr294x_evm/board_pinmux.c b/packages/ti/board/src/awr294x_evm/board_pinmux.c
index 6a5d58102b2fac8853d4fac96e8a0d14cab83753..1a46d22c8aa6ad85dbb3f5d4cc364280023b1dd2 100644 (file)
--- a/packages/ti/board/src/awr294x_evm/board_pinmux.c
+++ b/packages/ti/board/src/awr294x_evm/board_pinmux.c
@@ -94,8 +94,8 @@ Board_STATUS Board_pinmuxConfig (void)
                 {
                     rdRegVal = HW_RD_REG32((PMUX_CTRL + pInstanceData[k].pinOffset));
                     rdRegVal = (rdRegVal & PINMUX_BIT_MASK);
-                    rdRegVal = (rdRegVal | pInstanceData[k].pinSettings);
-                    HW_WR_REG32((PMUX_CTRL + pInstanceData[k].pinOffset), rdRegVal);
+                    HW_WR_REG32((PMUX_CTRL + pInstanceData[k].pinOffset),
+                                (pInstanceData[k].pinSettings));
                 }
             }
         }

diff --git a/packages/ti/board/src/awr294x_evm/include/board_pinmux.h b/packages/ti/board/src/awr294x_evm/include/board_pinmux.h
index 54e818a051a82b428005f8b052a1e1035a00fd72..b455a2e6bff589aac8685f07db3b0889ed0a08b6 100644 (file)
--- a/packages/ti/board/src/awr294x_evm/include/board_pinmux.h
+++ b/packages/ti/board/src/awr294x_evm/include/board_pinmux.h
@@ -56,7 +56,7 @@ extern "C" {
 #endif
 
 #define MODE_PIN_MASK                   (0xFU)
-#define PINMUX_BIT_MASK                 (0xFFFFFCF0U)
+#define PINMUX_BIT_MASK                 (0xFFF8FFF0U)
 
 /* MAIN CTRL base address + offset to beginning of PAD CONFIG  section */
 #define PMUX_CTRL      (CSL_MSS_IOMUX_U_BASE)

diff --git a/packages/ti/board/src/tpr12_evm/board_pinmux.c b/packages/ti/board/src/tpr12_evm/board_pinmux.c
index 0d1a5a5b0fb4fd6864ce235ac5656614ff60bc6c..5df2e6cba85fb2c5412c404569756af9a5ebda06 100755 (executable)
--- a/packages/ti/board/src/tpr12_evm/board_pinmux.c
+++ b/packages/ti/board/src/tpr12_evm/board_pinmux.c
@@ -1,5 +1,5 @@
 /******************************************************************************
- * Copyright (c) 2020-2021 Texas Instruments Incorporated - http://www.ti.com
+ * Copyright (c) 2020 Texas Instruments Incorporated - http://www.ti.com
  *
  *  Redistribution and use in source and binary forms, with or without
  *  modification, are permitted provided that the following conditions
@@ -94,8 +94,8 @@ Board_STATUS Board_pinmuxConfig (void)
                 {
                     rdRegVal = HW_RD_REG32((PMUX_CTRL + pInstanceData[k].pinOffset));
                     rdRegVal = (rdRegVal & PINMUX_BIT_MASK);
-                    rdRegVal = (rdRegVal | pInstanceData[k].pinSettings);
-                    HW_WR_REG32((PMUX_CTRL + pInstanceData[k].pinOffset), rdRegVal);
+                    HW_WR_REG32((PMUX_CTRL + pInstanceData[k].pinOffset),
+                                (pInstanceData[k].pinSettings));
                 }
             }
         }

diff --git a/packages/ti/board/src/tpr12_evm/include/board_pinmux.h b/packages/ti/board/src/tpr12_evm/include/board_pinmux.h
index 3628715559be95df17361196aa7621ac72a2dbfa..b71a6c1aa35dc573865c577b94bef9189ced177c 100755 (executable)
--- a/packages/ti/board/src/tpr12_evm/include/board_pinmux.h
+++ b/packages/ti/board/src/tpr12_evm/include/board_pinmux.h
@@ -1,5 +1,5 @@
 /******************************************************************************
- * Copyright (c) 2020-2021 Texas Instruments Incorporated - http://www.ti.com
+ * Copyright (c) 2020 Texas Instruments Incorporated - http://www.ti.com
  *
  *  Redistribution and use in source and binary forms, with or without
  *  modification, are permitted provided that the following conditions
@@ -56,7 +56,7 @@ extern "C" {
 #endif
 
 #define MODE_PIN_MASK                   (0xFU)
-#define PINMUX_BIT_MASK                 (0xFFFFFCF0U)
+#define PINMUX_BIT_MASK                 (0xFFF8FFF0U)
 
 /* MAIN CTRL base address + offset to beginning of PAD CONFIG  section */
 #define PMUX_CTRL      (CSL_MSS_IOMUX_U_BASE)