summary | shortlog | log | commit | commitdiff | tree
raw | patch | inline | side by side (parent: 5921212)
raw | patch | inline | side by side (parent: 5921212)
| author | Eric Ruei <e-ruei1@ti.com> | |
| Thu, 7 May 2020 00:09:42 +0000 (20:09 -0400) | ||
| committer | Sivaraj R <sivaraj@ti.com> | |
| Fri, 15 May 2020 03:35:11 +0000 (22:35 -0500) |
Porting the UART(SCI) driver from mmWave SDK to PDK UART/v3 with minimum
changes as described below:
- Move the IP-specific configuration parameters from UART_Params to
SoC-specific UART_HwAttrs
- Add EDMA Rx support
- Add Callback, polling timeout support
- Add interrupt control
Signed-off-by: Eric Ruei <e-ruei1@ti.com>
changes as described below:
- Move the IP-specific configuration parameters from UART_Params to
SoC-specific UART_HwAttrs
- Add EDMA Rx support
- Add Callback, polling timeout support
- Add interrupt control
Signed-off-by: Eric Ruei <e-ruei1@ti.com>
19 files changed:
index cb4c6c542a30bd3c3a19b330b370610ec6b7d0cb..5ec7b88d555bf44682e7ee20e723484a5fbea71f 100644 (file)
#define UART_SUCCESS ((int32_t)(0))
#define UART_ERROR (-((int32_t)1))
+/** @defgroup UART_DRIVER_ERROR_CODE UART Driver Error code
+\ingroup UART_DRIVER
+ *@note: The following error codes are not used by all the UART implementations,
+ * some driver implementation only use UART_ERROR.
+ @{ */
+
+/** @brief UART driver error base */
+#define UART_ERRNO_BASE (0)
+
+/**
+ * @brief Error Code: Invalid argument
+ */
+#define UART_EINVAL (UART_ERRNO_BASE-1)
+
+/**
+ * @brief Error Code: Operation cannot be implemented because a previous
+ * operation is still not complete.
+ */
+#define UART_EINUSE (UART_ERRNO_BASE-2)
+
+/**
+ * @brief Error Code: Operation is not implemented.
+ */
+#define UART_ENOTIMPL (UART_ERRNO_BASE-3)
+
+/** @}*/
+
/*!
* @brief A handle that is returned from a UART_open() call.
*/
/*!
* @brief UART echo settings
*
- * This enumeration defines if the driver will echo data.
+ * This enumeration defines if the driver will echo data when uses in
+ * UART_DATA_TEXT mode. This only applies to data received by the UART.
+ *
+ * UART_ECHO_ON will echo back characters it received while in UART_DATA_TEXT
+ * mode.
+ * UART_ECHO_OFF will not echo back characters it received in UART_DATA_TEXT
+ * mode.
+ *
+ * @pre UART driver must be used in UART_DATA_TEXT mode.
*/
typedef enum UART_Echo_e {
UART_ECHO_OFF = 0, /*!< Data is not echoed */
/*!
* @brief A function pointer to a driver specific implementation of
- * UART_control().
+ * UART_ControlFxn().
*/
-typedef int32_t (*UART_ControlFxn) (UART_Handle handle,
+typedef int32_t (*UART_ControlFxn) (UART_Handle handle,
uint32_t cmd,
void *arg);
/*!
* @brief A function pointer to a driver specific implementation of
- * UART_init().
+ * UART_InitFxn().
*/
typedef void (*UART_InitFxn) (UART_Handle handle);
} UART_FxnTable;
-
-/*! @brief UART Global configuration */
+/*!
+ * @brief UART Global configuration
+ *
+ * The UART_Config structure contains a set of pointers used to characterize
+ * the UART driver implementation.
+ *
+ * This structure needs to be defined before calling UART_init() and it must
+ * not be changed thereafter.
+ *
+ * @sa UART_init()
+ */
typedef struct UART_Config_s {
/*! Pointer to a table of a driver-specific implementation of UART functions */
UART_FxnTable const *fxnTablePtr;
#define UART_MAX_CONFIG_CNT (14U)
typedef UART_Config UART_config_list[UART_MAX_CONFIG_CNT];
-
/*!
* @brief Function to closes a given UART peripheral specified by the UART
* handle.
index 50cc5e1e4411cb55b8a75e2cac16bd66f46805fc..1698b4163deab8380147bc5fc30e38bee0948dd6 100644 (file)
MODULE_NAME = uart
-ifeq ($(SOC),$(filter $(SOC), am571x am572x am574x dra72x dra75x dra78x k2h k2k k2l k2e k2g c6678 c6657 am437x am335x omapl137 omapl138 am65xx j721e j7200 am64x))
+ifeq ($(SOC),$(filter $(SOC), am571x am572x am574x dra72x dra75x dra78x k2h k2k k2l k2e k2g c6678 c6657 am437x am335x omapl137 omapl138 am65xx j721e j7200 am64x tpr12))
include $(PDK_UART_COMP_PATH)/src/src_files_uart_console.mk
endif
# List all the external components/interfaces, whose interface header files
# need to be included for this component
-INCLUDE_EXTERNAL_INTERFACES = pdk edma
+ifeq ($(SOC),$(filter $(SOC), tpr12))
+ INCLUDE_EXTERNAL_INTERFACES = pdk
+else
+ INCLUDE_EXTERNAL_INTERFACES = pdk edma
+endif
PACKAGE_SRCS_COMMON += soc/$(SOC) soc/UART_soc.h
diff --git a/packages/ti/drv/uart/build/makefile_console.mk b/packages/ti/drv/uart/build/makefile_console.mk
index a9022fa0b98358f8c5ccacea04796725e9227e1b..ccfcf0f07209802686a154c770a2d6391990eaf8 100644 (file)
# List all the external components/interfaces, whose interface header files
# need to be included for this component
-INCLUDE_EXTERNAL_INTERFACES = pdk edma
+ifeq ($(SOC),$(filter $(SOC), tpr12))
+ INCLUDE_EXTERNAL_INTERFACES = pdk
+else
+ INCLUDE_EXTERNAL_INTERFACES = pdk edma
+endif
CFLAGS_LOCAL_COMMON = $(PDK_CFLAGS)
diff --git a/packages/ti/drv/uart/build/makefile_dma.mk b/packages/ti/drv/uart/build/makefile_dma.mk
index af8b5b93cfb820a2c722b8d7f6854ab0f8f1d8a1..774c1c9a1febf6aa2dfac918624adabea053b13f 100644 (file)
MODULE_NAME = uart_dma
-ifeq ($(SOC),$(filter $(SOC), am571x am572x am574x dra72x dra75x dra78x k2h k2k k2l k2e k2g c6678 c6657 am437x am335x omapl137 omapl138 am65xx j721e j7200 am64x))
+ifeq ($(SOC),$(filter $(SOC), am571x am572x am574x dra72x dra75x dra78x k2h k2k k2l k2e k2g c6678 c6657 am437x am335x omapl137 omapl138 am65xx j721e j7200 am64x tpr12))
include $(PDK_UART_COMP_PATH)/src/src_files_uart_console.mk
endif
@@ -45,10 +45,14 @@ ifeq ($(SOC),$(filter $(SOC), k2h k2k k2l k2e k2g c6678 c6657 omapl137 omapl138)
else
ifeq ($(SOC),$(filter $(SOC), am571x am572x am574x dra72x dra75x dra78x am437x am335x))
SRCDIR += soc/dma/v1
+else
+ifeq ($(SOC),$(filter $(SOC), tpr12))
+ SRCDIR += soc/dma/v3
else
SRCDIR += soc/dma/v2
endif
endif
+endif
INCDIR += soc
# Common source files across all platforms and cores
SRCS_COMMON += UART_soc.c UART_dma.c
@@ -66,10 +70,14 @@ ifeq ($(SOC),$(filter $(SOC), k2h k2k k2l k2e k2g c6678 c6657 omapl137 omapl138)
else
ifeq ($(SOC),$(filter $(SOC), am571x am572x am574x dra72x dra75x dra78x am437x am335x))
PACKAGE_SRCS_COMMON += soc/dma/v1
+else
+ifeq ($(SOC),$(filter $(SOC), tpr12))
+ PACKAGE_SRCS_COMMON += soc/dma/v3
else
PACKAGE_SRCS_COMMON += soc/dma/v2
endif
endif
+endif
CFLAGS_LOCAL_COMMON = $(PDK_CFLAGS) -DUART_DMA_ENABLE
diff --git a/packages/ti/drv/uart/build/makefile_dma_profile.mk b/packages/ti/drv/uart/build/makefile_dma_profile.mk
index 1def1404d13d424c9a4299fe12c7fa339d5a01e7..790bd530e5e1304eea03280613bc7c9afde9d82b 100644 (file)
MODULE_NAME = uart_dma_profile
-ifeq ($(SOC),$(filter $(SOC), am571x am572x am574x dra72x dra75x dra78x k2h k2k k2l k2e k2g c6678 c6657 am437x am335x omapl137 omapl138 am65xx j721e j7200 am64x))
+ifeq ($(SOC),$(filter $(SOC), am571x am572x am574x dra72x dra75x dra78x k2h k2k k2l k2e k2g c6678 c6657 am437x am335x omapl137 omapl138 am65xx j721e j7200 am64x tpr12))
include $(PDK_UART_COMP_PATH)/src/src_files_uart_console.mk
endif
@@ -45,10 +45,14 @@ ifeq ($(SOC),$(filter $(SOC), k2h k2k k2l k2e k2g c6678 c6657 omapl137 omapl138)
else
ifeq ($(SOC),$(filter $(SOC), am571x am572x am574x dra72x dra75x dra78x am437x am335x))
SRCDIR += soc/dma/v1
+else
+ifeq ($(SOC),$(filter $(SOC), tpr12))
+ SRCDIR += soc/dma/v3
else
SRCDIR += soc/dma/v2
endif
endif
+endif
INCDIR += soc
# Common source files across all platforms and cores
SRCS_COMMON += UART_soc.c UART_dma.c
@@ -68,10 +72,14 @@ ifeq ($(SOC),$(filter $(SOC), k2h k2k k2l k2e k2g c6678 c6657 omapl137 omapl138)
else
ifeq ($(SOC),$(filter $(SOC), am571x am572x am574x dra72x dra75x dra78x am437x am335x))
PACKAGE_SRCS_COMMON += soc/dma/v1
+else
+ifeq ($(SOC),$(filter $(SOC), tpr12))
+ PACKAGE_SRCS_COMMON += soc/dma/v3
else
PACKAGE_SRCS_COMMON += soc/dma/v2
endif
endif
+endif
ifeq ($(CORE),$(filter $(CORE), mpu1_0 a15_0 a9host a8host))
CFLAGS_LOCAL_COMMON = $(PDK_CFLAGS) -finstrument-functions -gdwarf-3 -g -D_ENABLE_BM -DUART_DMA_ENABLE
diff --git a/packages/ti/drv/uart/build/makefile_profile.mk b/packages/ti/drv/uart/build/makefile_profile.mk
index bc8253d0f6746a957dc65975ec5f82f59dba1978..eeaf2dcbcc97341655f770be2aabcf77a1147399 100644 (file)
MODULE_NAME = uart_profile
-ifeq ($(SOC),$(filter $(SOC), dra72x dra75x dra78x am571x am572x am574x k2h k2k k2l k2e k2g c6678 c6657 am437x am335x omapl137 omapl138 am65xx j721e j7200 am64x))
+ifeq ($(SOC),$(filter $(SOC), dra72x dra75x dra78x am571x am572x am574x k2h k2k k2l k2e k2g c6678 c6657 am437x am335x omapl137 omapl138 am65xx j721e j7200 am64x tpr12))
include $(PDK_UART_COMP_PATH)/src/src_files_uart_console.mk
endif
# List all the external components/interfaces, whose interface header files
# need to be included for this component
-INCLUDE_EXTERNAL_INTERFACES = pdk edma
+ifeq ($(SOC),$(filter $(SOC), tpr12))
+ INCLUDE_EXTERNAL_INTERFACES = pdk
+else
+ INCLUDE_EXTERNAL_INTERFACES = pdk edma
+endif
PACKAGE_SRCS_COMMON += soc/$(SOC) soc/UART_soc.h
index 9a2917945c1d9cb5cddfa38ba0a470bcaff8a6b1..bdfe0a21fd0b021ecfa0bee3d7f00f26d89ec1f8 100644 (file)
* @brief UART SoC level driver
*/
/*
- * Copyright (c) 2015 - 2019, Texas Instruments Incorporated
+ * Copyright (c) 2015 - 2020, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
defined(DEVICE_K2H) || defined(DEVICE_K2K) || defined(DEVICE_K2L) || defined(DEVICE_K2E) || defined(DEVICE_K2G) || defined(DEVICE_C6678) || defined(DEVICE_C6657) || defined(DEVICE_OMAPL137) || defined(DEVICE_OMAPL138)
#include <ti/csl/src/ip/uart/V0/uart.h>
#include <ti/drv/uart/src/v0/UART_v0.h>
+#elif defined(SOC_TPR12)
+#include <ti/drv/uart/src/v3/uartsci_soc.h>
#else
#include <ti/csl/src/ip/uart/V1/uart.h>
#include <ti/drv/uart/src/v1/UART_v1.h>
diff --git a/packages/ti/drv/uart/soc/dma/v3/UART_dma.c b/packages/ti/drv/uart/soc/dma/v3/UART_dma.c
--- /dev/null
@@ -0,0 +1,610 @@
+/**
+ * @file UART_dma.c
+ *
+ * @brief
+ * The file implements the UART(SCI) driver EDMA Interface
+ * functionality. This file is renamed from uartsci_edma.c
+ * to be consistent with UART DMA naming convention.
+ *
+ * \par
+ * NOTE:
+ * (C) Copyright 2016-2020 Texas Instruments, Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ *
+ * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**************************************************************************
+ *************************** Include Files ********************************
+ **************************************************************************/
+#include <stdint.h>
+#include <string.h>
+#include <ti/drv/uart/UART.h>
+#include <ti/drv/uart/src/v3/uartsci.h>
+#include <ti/drv/uart/src/UART_osal.h>
+#include <ti/csl/cslr_sci.h>
+#include <ti/drv/uart/src/UART_drv_log.h>
+
+/**************************************************************************
+ ************************** Local Definitions *****************************
+ **************************************************************************/
+#define UART_DMA_TX 0
+#define UART_DMA_RX 1
+
+/**************************************************************************
+ ************************** Local Structures ******************************
+ **************************************************************************/
+
+/**************************************************************************
+ ************************** Local Definitions *****************************
+ **************************************************************************/
+static void UartSci_TxEDMACallbackFxn(uintptr_t arg, uint8_t transferCompletionCode);
+static void UartSci_RxEDMACallbackFxn(uintptr_t arg, uint8_t transferCompletionCode);
+
+/**************************************************************************
+ ************************** UART EDMA Functions ***************************
+ **************************************************************************/
+
+/**
+ * @b Description
+ * @n
+ * The function is the registered callback function which is invoked after
+ * the Transmit DMA has completed its operation.
+ *
+ * @param[in] arg
+ * Argument registered during callback function which has been set to the
+ * UART Driver Instance.
+ * @param[in] transferCompletionCode
+ * Transfer completion code
+ *
+ * \ingroup UART_SCI_INTERNAL_FUNCTION
+ *
+ * @retval
+ * Not applicable
+ */
+static void UartSci_TxEDMACallbackFxn(uintptr_t arg, uint8_t transferCompletionCode)
+{
+ UartSci_Driver* ptrUartSciDriver;
+ UartSci_DriverEDMA* ptrDriverEDMA;
+
+ /* Get the UART Driver: */
+ ptrUartSciDriver = (UartSci_Driver*)arg;
+
+ /* Get the DMA Block: */
+ ptrDriverEDMA = &ptrUartSciDriver->dmaInfo[UART_DMA_TX];
+
+ /* Disable the UART Transmit DMA mode */
+ UartSci_disableTxDMA(ptrDriverEDMA->ptrHwCfg->ptrSCIRegs);
+
+ /* Increment the number of transmit DMA interrupts */
+ ptrUartSciDriver->stats.numTxDMAInterrupts++;
+
+ /* Write operation for the driver is complete */
+ ptrUartSciDriver->writeCount = ptrUartSciDriver->writeSize;
+ ptrUartSciDriver->writeSize = 0U;
+
+ /* The callee was blocked so post the semaphore to wakeup the callee */
+ UartSci_callback(ptrUartSciDriver->handle, false);
+
+ return;
+}
+
+/**
+ * @b Description
+ * @n
+ * The function is the registered callback function which is invoked after
+ * the Receive DMA has completed its operation.
+ *
+ * @param[in] arg
+ * Argument registered during callback function which has been set to the
+ * UART Driver Instance.
+ * @param[in] transferCompletionCode
+ * Transfer completion code
+ *
+ * \ingroup UART_SCI_INTERNAL_FUNCTION
+ *
+ * @retval
+ * Not applicable
+ */
+static void UartSci_RxEDMACallbackFxn(uintptr_t arg, uint8_t transferCompletionCode)
+{
+ UartSci_Driver* ptrUartSciDriver;
+ UartSci_DriverEDMA* ptrDriverEDMA;
+
+ /* Get the UART Driver: */
+ ptrUartSciDriver = (UartSci_Driver*)arg;
+
+ /* Get the DMA Block: */
+ ptrDriverEDMA = &ptrUartSciDriver->dmaInfo[UART_DMA_RX];
+
+ /* Disable the UART Receive DMA mode */
+ UartSci_disableRxDMA(ptrDriverEDMA->ptrHwCfg->ptrSCIRegs);
+
+ /* Increment the number of receive DMA interrupts */
+ ptrUartSciDriver->stats.numRxDMAInterrupts++;
+
+ /* Read operation for the driver is complete */
+ ptrUartSciDriver->readCount = ptrUartSciDriver->readSize;
+ ptrUartSciDriver->readSize = 0U;
+
+ /* The callee was blocked so post the semaphore to wakeup the callee */
+ UartSci_callback(ptrUartSciDriver->handle, true);
+
+ return;
+}
+
+/**
+ * @b Description
+ * @n
+ * The function returns the status of the DMA configuration.
+ *
+ * @param[in] ptrUartSciDriver
+ * Pointer to the UART Driver Instance
+ *
+ * \ingroup UART_SCI_INTERNAL_FUNCTION
+ *
+ * @retval
+ * true - DMA services are enabled
+ * @retval
+ * false - DMA services are not enabled
+ */
+bool UartSci_isEDMAEnabled (UartSci_Driver* ptrUartSciDriver)
+{
+ return ptrUartSciDriver->isDMAEnabled;
+}
+
+/**
+ * @b Description
+ * @n
+ * The function is used to initiate the receive DMA. Since the UART
+ * on the DSS is Transmit only this function should never be invoked
+ *
+ * @param[in] ptrUartSciDriver
+ * Pointer to the UART Driver Instance
+ * @param[in] dstAddress
+ * Destination address of the buffer where the data is to be placed
+ * @param[in] numBytes
+ * Number of bytes to be transmitted
+ * @param[in] pollingMode
+ * Set to true to indicate that we need to poll for completion else
+ * set to false
+ *
+ * \ingroup UART_SCI_INTERNAL_FUNCTION
+ *
+ * @retval
+ * Always returns error
+ */
+int32_t UartSci_initiateRxEDMA
+(
+ UartSci_Driver* ptrUartSciDriver,
+ uint32_t dstAddress,
+ uint32_t numBytes,
+ bool pollingMode
+)
+{
+ UartSci_DriverEDMA* ptrDriverEDMA;
+ EDMA_channelConfig_t* ptrEDMACfg;
+ int32_t retVal = -1;
+ int32_t errCode;
+ bool isTransferComplete = false;
+
+ /* Get the DMA Block: */
+ ptrDriverEDMA = &ptrUartSciDriver->dmaInfo[UART_DMA_RX];
+
+ /* Disable the UART Receive DMA mode */
+ UartSci_disableRxDMA(ptrDriverEDMA->ptrHwCfg->ptrSCIRegs);
+
+ /* Get the pointer to the EDMA configuration */
+ ptrEDMACfg = &ptrDriverEDMA->config;
+
+ /* Populate the remaining fields in the EDMA configuration: */
+ ptrEDMACfg->paramSetConfig.destinationAddress = dstAddress;
+ ptrEDMACfg->paramSetConfig.bCount = numBytes;
+
+ /* Is Polling Mode enabled? */
+ if (pollingMode == true)
+ {
+ /* Polling Mode: There is no need to register the callback function */
+ ptrEDMACfg->transferCompletionCallbackFxn = NULL;
+ ptrEDMACfg->transferCompletionCallbackFxnArg = 0U;
+ }
+ else
+ {
+ /* Blocking Mode: Register the callback function to be invoked on interrupt */
+ ptrEDMACfg->transferCompletionCallbackFxn = UartSci_RxEDMACallbackFxn;
+ ptrEDMACfg->transferCompletionCallbackFxnArg = (uintptr_t)ptrUartSciDriver;
+ }
+
+ /* Configure the EDMA Channel: */
+ errCode = EDMA_configChannel(ptrDriverEDMA->ptrHwCfg->swCfg.edmaHandle, ptrEDMACfg, true);
+ if (errCode != EDMA_NO_ERROR)
+ {
+ /* Error: Unable to configure the EDMA channel. Setup the return value */
+ UART_drv_log1 ("Error: UART EDMA configuration failed [Error code %d]\n", errCode);
+ retVal = errCode;
+ goto exit;
+ }
+
+ /* Enable the UART to operate in receive DMA mode */
+ UartSci_enableRxDMA(ptrDriverEDMA->ptrHwCfg->ptrSCIRegs);
+
+ /* Are we operating in polled mode or blocking mode? */
+ if (pollingMode == true)
+ {
+ /* Polling Mode: Poll for the DMA completion status here */
+ while (isTransferComplete == false)
+ {
+ errCode = EDMA_isTransferComplete(ptrDriverEDMA->ptrHwCfg->swCfg.edmaHandle,
+ ptrDriverEDMA->ptrHwCfg->rxDMARequestLine,
+ &isTransferComplete);
+
+ /* Sanity Check: Ensure that there is no EDMA Error. */
+ UART_osalAssert (errCode == EDMA_NO_ERROR);
+ }
+
+ /* Write operation for the driver is complete */
+ ptrUartSciDriver->readCount = ptrUartSciDriver->readSize;
+ ptrUartSciDriver->readSize = 0U;
+ }
+ else
+ {
+ /* Blocking Mode: Fall through and allow the UART Driver to pend on the semaphore
+ * The Rx DMA interrupt has been enabled which will post the semaphore. */
+ }
+
+ /* We have successfully completed the EDMA operation */
+ retVal = 0;
+
+exit:
+ return retVal;
+}
+
+/**
+ * @b Description
+ * @n
+ * The function is used to initiate the DMA for the UART transmit
+ *
+ * @param[in] ptrUartSciDriver
+ * Pointer to the UART Driver Instance
+ * @param[in] srcAddress
+ * Source address of the buffer which is to be transmitted
+ * @param[in] numBytes
+ * Number of bytes to be transmitted
+ * @param[in] pollingMode
+ * Set to true to indicate that we need to poll for completion else
+ * set to false
+ *
+ * \ingroup UART_SCI_INTERNAL_FUNCTION
+ *
+ * @retval
+ * Success - 0
+ * @retval
+ * Error Code - <0
+ */
+int32_t UartSci_initiateTxEDMA
+(
+ UartSci_Driver* ptrUartSciDriver,
+ uint32_t srcAddress,
+ uint32_t numBytes,
+ bool pollingMode
+)
+{
+ UartSci_DriverEDMA* ptrDriverEDMA;
+ EDMA_channelConfig_t* ptrEDMACfg;
+ EDMA_paramConfig_t* ptrDummyEDMACfg;
+ int32_t retVal = -1;
+ int32_t errCode;
+ bool isTransferComplete = false;
+
+ /* Get the DMA Block: */
+ ptrDriverEDMA = &ptrUartSciDriver->dmaInfo[UART_DMA_TX];
+
+ /* Disable the UART Transmit DMA mode */
+ UartSci_disableTxDMA(ptrDriverEDMA->ptrHwCfg->ptrSCIRegs);
+
+ /* Get the pointer to the EDMA configuration */
+ ptrEDMACfg = &ptrDriverEDMA->config;
+ ptrDummyEDMACfg = &ptrDriverEDMA->dummyParamConfig;
+
+ /* Populate the remaining fields in the EDMA configuration: */
+ ptrEDMACfg->paramSetConfig.sourceAddress = srcAddress;
+ ptrEDMACfg->paramSetConfig.bCount = numBytes;
+
+ /* Configure the EDMA Channel: */
+ errCode = EDMA_configChannel(ptrDriverEDMA->ptrHwCfg->swCfg.edmaHandle, ptrEDMACfg, true);
+ if (errCode != EDMA_NO_ERROR)
+ {
+ /* Error: Unable to configure the EDMA channel. Setup the return value */
+ UART_drv_log1 ("Error: UART EDMA configuration failed [Error code %d]\n", errCode);
+ retVal = errCode;
+ goto exit;
+ }
+
+ /* Is Polling Mode enabled? */
+ if (pollingMode == true)
+ {
+ /* Polling Mode: There is no need to register the callback function */
+ ptrDummyEDMACfg->transferCompletionCallbackFxn = NULL;
+ ptrDummyEDMACfg->transferCompletionCallbackFxnArg = 0U;
+ }
+ else
+ {
+ /* Blocking Mode: Register the callback function to be invoked on interrupt */
+ ptrDummyEDMACfg->transferCompletionCallbackFxn = UartSci_TxEDMACallbackFxn;
+ ptrDummyEDMACfg->transferCompletionCallbackFxnArg = (uintptr_t)ptrUartSciDriver;
+ }
+
+ /* Configure the PaRAM set: */
+ errCode = EDMA_configParamSet (ptrDriverEDMA->ptrHwCfg->swCfg.edmaHandle,
+ ptrDriverEDMA->ptrHwCfg->swCfg.paramSetId,
+ ptrDummyEDMACfg);
+ if (errCode != EDMA_NO_ERROR)
+ {
+ /* Error: Unable to configure the param set. Setup the return value */
+ UART_drv_log1 ("Error: UART EDMA configuration failed [Error code %d]\n", errCode);
+ retVal = errCode;
+ goto exit;
+ }
+
+ /* Link the PaRAM sets: */
+ errCode = EDMA_linkParamSets (ptrDriverEDMA->ptrHwCfg->swCfg.edmaHandle,
+ ptrEDMACfg->channelId,
+ ptrDriverEDMA->ptrHwCfg->swCfg.paramSetId);
+ if (errCode != EDMA_NO_ERROR)
+ {
+ /* Error: Unable to link the param set. Setup the return value */
+ UART_drv_log1 ("Error: UART EDMA configuration failed [Error code %d]\n", errCode);
+ retVal = errCode;
+ goto exit;
+ }
+
+ /* Enable the UART to operate in Transmit DMA mode */
+ UartSci_enableTxDMA(ptrDriverEDMA->ptrHwCfg->ptrSCIRegs);
+
+ /* Are we operating in polled mode or blocking mode? */
+ if (pollingMode == true)
+ {
+ /* Polling Mode: Poll for the DMA completion status here */
+ while (isTransferComplete == false)
+ {
+ errCode = EDMA_isTransferComplete(ptrDriverEDMA->ptrHwCfg->swCfg.edmaHandle,
+ ptrDriverEDMA->ptrHwCfg->txDMARequestLine,
+ &isTransferComplete);
+
+ /* Sanity Check: Ensure that there is no EDMA Error. */
+ UART_osalAssert (errCode == EDMA_NO_ERROR);
+ }
+
+ /* Write operation for the driver is complete */
+ ptrUartSciDriver->writeCount = ptrUartSciDriver->writeSize;
+ ptrUartSciDriver->writeSize = 0U;
+ }
+ else
+ {
+ /* Blocking Mode: Fall through and allow the UART Driver to pend on the semaphore
+ * The Tx DMA interrupt has been enabled which will post the semaphore. */
+ }
+
+ /* We have successfully completed the EDMA operation */
+ retVal = 0;
+
+exit:
+ return retVal;
+}
+
+
+/**
+ * @b Description
+ * @n
+ * The function is used to initialize the EDMA info
+ *
+ * @param[in] ptrDriverEDMA
+ * Pointer to the EDMA Info
+ * @param[in] ptrHwCfg
+ * Pointer to the UART SCI Hardware configuration
+ * @param[in] fTx
+ * Indicate whether it is tx channel
+ *
+ * \ingroup UART_SCI_INTERNAL_FUNCTION
+ *
+ */
+static void UartSci_initEDMAInfo(UartSci_DriverEDMA* ptrDriverEDMA,
+ UartSci_HwCfg* ptrHwCfg,
+ bool isTx)
+{
+
+ uint8_t chanIdTcc;
+ EDMA_channelConfig_t* ptrEDMACfg;
+ EDMA_paramConfig_t* ptrDummyEDMACfg;
+
+ /* Initialize the EDMA Info */
+ memset ((void *)ptrDriverEDMA, 0, sizeof(UartSci_DriverEDMA));
+
+ /* Populate the DMA Information Block: */
+ ptrDriverEDMA->ptrHwCfg = ptrHwCfg;
+
+ /* Get the pointer to the EDMA configuration */
+ ptrEDMACfg = &ptrDriverEDMA->config;
+ ptrDummyEDMACfg = &ptrDriverEDMA->dummyParamConfig;
+
+ /*********************************************************************************
+ * Initialize the EDMA configuration:
+ * - We dont initialize all the fields here but most of them dont change in
+ * the data path.
+ *********************************************************************************/
+ if (isTx)
+ {
+ chanIdTcc = ptrHwCfg->txDMARequestLine;
+ ptrEDMACfg->paramSetConfig.destinationAddress = (uint32_t)&ptrHwCfg->ptrSCIRegs->SCITD;
+ ptrEDMACfg->paramSetConfig.sourceBindex = 1U;
+ ptrEDMACfg->paramSetConfig.destinationBindex = 0U;
+ ptrEDMACfg->paramSetConfig.isFinalTransferInterruptEnabled = false;
+ }
+ else
+ {
+ chanIdTcc = ptrHwCfg->rxDMARequestLine;
+ ptrEDMACfg->paramSetConfig.sourceAddress = (uint32_t)&ptrHwCfg->ptrSCIRegs->SCIRD;
+ ptrEDMACfg->paramSetConfig.sourceBindex = 0U;
+ ptrEDMACfg->paramSetConfig.destinationBindex = 1U;
+ ptrEDMACfg->paramSetConfig.isFinalTransferInterruptEnabled = true;
+ }
+
+ ptrEDMACfg->channelId = chanIdTcc;
+ ptrEDMACfg->channelType = (uint8_t)EDMA3_CHANNEL_TYPE_DMA;
+ ptrEDMACfg->paramId = chanIdTcc;
+ ptrEDMACfg->eventQueueId = 0;
+ ptrEDMACfg->transferCompletionCallbackFxn = NULL;
+ ptrEDMACfg->transferCompletionCallbackFxnArg = 0U;
+ ptrEDMACfg->paramSetConfig.aCount = 1U;
+ ptrEDMACfg->paramSetConfig.cCount = 1U;
+ ptrEDMACfg->paramSetConfig.bCountReload = 0U;
+ ptrEDMACfg->paramSetConfig.sourceCindex = 0U;
+ ptrEDMACfg->paramSetConfig.destinationCindex = 0U;
+ ptrEDMACfg->paramSetConfig.linkAddress = EDMA_NULL_LINK_ADDRESS;
+ ptrEDMACfg->paramSetConfig.transferType = (uint8_t)EDMA3_SYNC_A;
+ ptrEDMACfg->paramSetConfig.transferCompletionCode = chanIdTcc;
+ ptrEDMACfg->paramSetConfig.sourceAddressingMode = (uint8_t)EDMA3_ADDRESSING_MODE_LINEAR;
+ ptrEDMACfg->paramSetConfig.destinationAddressingMode = (uint8_t)EDMA3_ADDRESSING_MODE_LINEAR;
+ ptrEDMACfg->paramSetConfig.fifoWidth = (uint8_t)EDMA3_FIFO_WIDTH_128BIT;
+ ptrEDMACfg->paramSetConfig.isStaticSet = false;
+ ptrEDMACfg->paramSetConfig.isEarlyCompletion = false;
+ ptrEDMACfg->paramSetConfig.isIntermediateTransferInterruptEnabled = false;
+ ptrEDMACfg->paramSetConfig.isFinalChainingEnabled = false;
+ ptrEDMACfg->paramSetConfig.isIntermediateChainingEnabled = false;
+
+ if (isTx)
+ {
+ /* Copy over the EDMA configuration into the dummy configuration:
+ * This will reduce the code size instead of explicitly initializing all
+ * the fields. We will now modify only the fields which are different */
+ memcpy ((void *)&ptrDummyEDMACfg->paramSetConfig, (void*)&ptrEDMACfg->paramSetConfig,
+ sizeof(EDMA_paramSetConfig_t));
+
+ /* Modify the fields which are different between the EDMA Transfers:-
+ * - Set the bCount to be 0 to indicate that this is a Dummy Transfer
+ * - Generate an interrupt once the final transfer for Tx is done. */
+ ptrDummyEDMACfg->paramSetConfig.bCount = 0U;
+ ptrDummyEDMACfg->paramSetConfig.isFinalTransferInterruptEnabled = true;
+ }
+}
+
+/**
+ * @b Description
+ * @n
+ * The function is used to open the EDMA
+ *
+ * @param[in] ptrUartSciDriver
+ * Pointer to the UART SCI Driver
+ * @param[in] ptrHwCfg
+ * Pointer to the UART SCI Hardware configuration
+ *
+ * \ingroup UART_SCI_INTERNAL_FUNCTION
+ *
+ * @retval
+ * Success - 0
+ * @retval
+ * Error - <0
+ */
+int32_t UartSci_openEDMA (UartSci_Driver* ptrUartSciDriver, UartSci_HwCfg* ptrHwCfg)
+{
+ /* Do we need to use the EDMA? */
+ if (ptrHwCfg->swCfg.edmaHandle != NULL)
+ {
+ /* Extract and setup transmit EDMA Information Block */
+ UartSci_initEDMAInfo(&ptrUartSciDriver->dmaInfo[UART_DMA_TX],
+ ptrHwCfg, true);
+
+ /* Extract and setup receive EDMA Information Block */
+ UartSci_initEDMAInfo(&ptrUartSciDriver->dmaInfo[UART_DMA_RX],
+ ptrHwCfg, false);
+
+ /* Register the DMA Information Block with the UART Driver: */
+ ptrUartSciDriver->isDMAEnabled = true;
+
+ }
+ else
+ {
+ ptrUartSciDriver->isDMAEnabled = false;
+ }
+
+ return 0;
+}
+
+/**
+ * @b Description
+ * @n
+ * The function is used to close the EDMA for the specific UART Instance
+ *
+ * @param[in] ptrUartSciDriver
+ * Pointer to the UART driver for which the DMA is being closed
+ *
+ * \ingroup UART_SCI_INTERNAL_FUNCTION
+ *
+ * @retval
+ * Success - 0
+ * @retval
+ * Error - <0
+ */
+int32_t UartSci_closeEDMA (UartSci_Driver* ptrUartSciDriver)
+{
+ int32_t retVal = -1;
+ UartSci_DriverEDMA* ptrDriverEDMA;
+
+ /* Were we using the DMA? */
+ if (ptrUartSciDriver->isDMAEnabled)
+ {
+ /* Disable the transmit EDMA channel */
+ ptrDriverEDMA = &ptrUartSciDriver->dmaInfo[UART_DMA_TX];
+ retVal = EDMA_disableChannel(ptrDriverEDMA->ptrHwCfg->swCfg.edmaHandle,
+ ptrDriverEDMA->ptrHwCfg->txDMARequestLine,
+ (uint8_t)EDMA3_CHANNEL_TYPE_DMA);
+ if (retVal != EDMA_NO_ERROR)
+ {
+ goto exit;
+ }
+
+ /* Disable the receive EDMA channel */
+ ptrDriverEDMA = &ptrUartSciDriver->dmaInfo[UART_DMA_RX];
+ retVal = EDMA_disableChannel(ptrDriverEDMA->ptrHwCfg->swCfg.edmaHandle,
+ ptrDriverEDMA->ptrHwCfg->rxDMARequestLine,
+ (uint8_t)EDMA3_CHANNEL_TYPE_DMA);
+ if (retVal != EDMA_NO_ERROR)
+ {
+ goto exit;
+ }
+
+ /* Deregister the DMA Information: */
+ ptrUartSciDriver->isDMAEnabled = false;
+ retVal = 0;
+ }
+exit:
+ return retVal;
+}
+
+
+
diff --git a/packages/ti/drv/uart/soc/tpr12/UART_soc.c b/packages/ti/drv/uart/soc/tpr12/UART_soc.c
--- /dev/null
@@ -0,0 +1,294 @@
+/**
+ * @file UART_soc.c
+ *
+ * @brief This file defines the UART interface structure specific to TPR12
+ */
+/*
+ * Copyright (c) 2020, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** ============================================================================*/
+
+#include <ti/csl/soc.h>
+#include <ti/drv/uart/UART.h>
+#include <ti/drv/uart/soc/UART_soc.h>
+#include <ti/drv/uart/src/v3/uartsci.h>
+
+/**************************************************************************
+ ************************* Extern Declarations ****************************
+ **************************************************************************/
+
+/**
+ * @brief This is the UART Driver registered function table
+ */
+extern UART_FxnTable gUartSciFxnTable;
+
+/**************************************************************************
+ ************************** Global Variables ******************************
+ **************************************************************************/
+
+/**************************************************************************
+ * On the XWR18xx: The UART is available on both the DSS and MSS. The UART
+ * platform configuration is MSS and DSS specific
+ **************************************************************************/
+
+#define UART_MODULE_FREQ_200M (200000000U)
+
+
+#ifdef BUILD_MCU
+#define CSL_UART_PER_CNT CSL_MSS_UART_PER_CNT
+
+/**
+ * @brief This is the TPR12 MSS specific UART configuration. There are
+ * 2 UART instances (SCI-A and SCI-B) available on the MSS.
+ */
+UartSci_HwCfg uartInitCfg[CSL_UART_PER_CNT] =
+{
+ /* UART1 Hardware configuration:
+ * - Capable of sending and receiving data
+ */
+ {
+ (CSL_sciRegs *)CSL_MSS_SCIA_U_BASE,
+ UartSci_Duplexity_FULL,
+ CSL_MSS_INTR_MSS_SCIA_INT0,
+ EDMA_MSS_TPCC_A_EVT_SCIA_TX_DMA_REQ,
+ EDMA_MSS_TPCC_A_EVT_SCIA_RX_DMA_REQ,
+#ifdef UART_DMA_ENABLE
+ &UartSci_openEDMA,
+ &UartSci_closeEDMA,
+ &UartSci_isEDMAEnabled,
+ &UartSci_initiateRxEDMA,
+ &UartSci_initiateTxEDMA,
+#else
+ NULL,
+ NULL,
+ NULL,
+ NULL,
+ NULL,
+#endif
+ {
+ UART_MODULE_FREQ_200M,
+ NULL,
+ 0,
+ TRUE, /* default DMA mode */
+ FALSE, /* Loopback disabled by default */
+ TRUE /* Interrupt enabled by default */
+ }
+ },
+
+ /* UART2 Hardware configuration:
+ * - Capable of only sending data
+ */
+ {
+ (CSL_sciRegs *)CSL_MSS_SCIB_U_BASE,
+ UartSci_Duplexity_TX_ONLY,
+ CSL_MSS_INTR_MSS_SCIB_INT0,
+ EDMA_MSS_TPCC_A_EVT_SCIB_TX_DMA_REQ,
+ EDMA_MSS_TPCC_A_EVT_SCIB_RX_DMA_REQ,
+#ifdef UART_DMA_ENABLE
+ &UartSci_openEDMA,
+ &UartSci_closeEDMA,
+ &UartSci_isEDMAEnabled,
+ &UartSci_initiateRxEDMA,
+ &UartSci_initiateTxEDMA,
+#else
+ NULL,
+ NULL,
+ NULL,
+ NULL,
+ NULL,
+#endif
+ {
+ UART_MODULE_FREQ_200M,
+ NULL,
+ 0,
+ TRUE, /* default DMA mode */
+ FALSE, /* Loopback disabled by default */
+ TRUE /* Interrupt enabled by default */
+ }
+ }
+};
+
+/* UART objects */
+UartSci_Driver UartObjects[CSL_UART_PER_CNT];
+
+/**
+ * @brief The MSS on the TPR12 Platform has 2 UART Modules which can be used.
+ */
+UART_Config UART_config[] =
+{
+ {
+ &gUartSciFxnTable, /* UART SCI Driver Function Table: */
+ (void *)&UartObjects[0], /* UART Driver Object: */
+ (void *)&uartInitCfg[0] /* UART Hw configuration: */
+ },
+ {
+ &gUartSciFxnTable, /* UART SCI Driver Function Table: */
+ (void *)&UartObjects[1], /* UART Driver Object: */
+ (void *)&uartInitCfg[1] /* UART Hw configuration: */
+ },
+ {
+ NULL, /* UART SCI Driver Function Table: */
+ NULL, /* UART Driver Object: */
+ NULL /* UART Hw configuration: */
+ }
+};
+
+#elif defined (BUILD_DSP_1)
+
+/**
+ * @brief This is the TPR12 DSS specific UART configuration. There is only 1 available
+ * UART instance. This should *NOT* be modified by the customer.
+ */
+#define CSL_UART_PER_CNT CSL_DSS_UART_PER_CNT
+
+UartSci_HwCfg uartInitCfg[CSL_UART_PER_CNT] =
+{
+ /* UART2 Hardware configuration:
+ * - Capable of sending and receiving data
+ */
+ {
+ (CSL_sciRegs *)CSL_DSS_SCIA_U_BASE,
+ UartSci_Duplexity_FULL,
+ CSL_DSS_INTR_DSS_SCIA_INT0,
+ EDMA_DSS_TPCC_B_EVT_SCIA_TX_DMA_REQ,
+ EDMA_DSS_TPCC_B_EVT_SCIA_RX_DMA_REQ,
+#ifdef UART_DMA_ENABLE
+ &UartSci_openEDMA,
+ &UartSci_closeEDMA,
+ &UartSci_isEDMAEnabled,
+ &UartSci_initiateRxEDMA,
+ &UartSci_initiateTxEDMA,
+#else
+ NULL,
+ NULL,
+ NULL,
+ NULL,
+ NULL,
+#endif
+ {
+ UART_MODULE_FREQ_200M,
+ NULL,
+ 0,
+ TRUE, /* default DMA mode */
+ FALSE, /* Loopback disabled by default */
+ TRUE /* Interrupt enabled by default */
+ }
+ }
+};
+
+/* UART objects */
+UartSci_Driver UartObjects[CSL_UART_PER_CNT];
+
+/**
+ * @brief The DSS on the TPR12 Platform has 1 UART Modules which can be used.
+ */
+UART_Config UART_config[] =
+{
+ {
+ &gUartSciFxnTable, /* UART SCI Driver Function Table: */
+ (void *)&UartObjects[0], /* UART Driver Object: */
+ (void *)&uartInitCfg[0] /* UART Hw configuration: */
+ },
+ {
+ NULL, /* UART SCI Driver Function Table: */
+ NULL, /* UART Driver Object: */
+ NULL /* UART Hw configuration: */
+ }
+};
+
+#else
+#error "Error: Please check the compiler flags since BUILD_XXX is not defined for the TPR12 device"
+#endif
+
+/**
+ * \brief This API gets the SoC level of UART intial configuration
+ *
+ * \param index UART instance index.
+ * \param cfg Pointer to UART SOC initial config.
+ *
+ * \return 0 success: -1: error
+ *
+ */
+int32_t UART_socGetInitCfg(uint32_t index, UART_HwAttrs *cfg)
+{
+ int32_t ret = 0;
+
+ if (index < CSL_UART_PER_CNT)
+ {
+ *cfg = uartInitCfg[index].swCfg;
+ }
+ else
+ {
+ ret = (-((int32_t)1));
+ }
+
+ return ret;
+}
+
+/**
+ * \brief This API sets the SoC level of UART intial configuration
+ *
+ * \param index UART instance index.
+ * \param cfg Pointer to UART SOC initial config.
+ *
+ * \return 0 success: -1: error
+ *
+ */
+int32_t UART_socSetInitCfg(uint32_t index, const UART_HwAttrs *cfg)
+{
+ int32_t ret = 0;
+
+ if (index < CSL_UART_PER_CNT)
+ {
+ uartInitCfg[index].swCfg = *cfg;
+ }
+ else
+ {
+ ret = (-((int32_t)1));
+ }
+
+ return ret;
+}
+
+#if defined (BUILD_MCU)
+/**
+ * \brief This API initializes the SoC level of UART configuration
+ * based on the core and domain
+ *
+ * \param none
+ *
+ * \return none
+ *
+ */
+void UART_socInit(void)
+{
+}
+#endif
index 0643f3e6271655dd7b7458ec03f5cfeaec3088a6..57b7729310ac8f7e4fb7547e400518b908ba20b7 100644 (file)
*
* \par
* NOTE:
- * (C) Copyright 2014-2015 Texas Instruments, Inc.
+ * (C) Copyright 2014-2020 Texas Instruments, Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
#define UART_osalPostLock(X) (SemaphoreP_post(X))
-
#define UART_osalHardwareIntDisable() (HwiP_disable())
#define UART_osalDelay(X) (Osal_delay(X))
+#define UART_osalAssert(expr) (OSAL_Assert(!(expr)))
#ifdef __cplusplus
}
diff --git a/packages/ti/drv/uart/src/src_files_common.mk b/packages/ti/drv/uart/src/src_files_common.mk
index 7b71034dfcabab2068d7d23e59e70f496d78c835..3f56cc679b6edc9401006b5f7615152e3b3c4599 100644 (file)
build/makefile_profile_indp.mk build/makefile_dma.mk build/makefile_dma_profile.mk \
build/makefile_console.mk
+# For TPR12, the following v3 files are all that is shipped
+ifeq ($(SOC),$(filter $(SOC), tpr12))
+ SRCDIR = . src src/v3
+ INCDIR = . src src/v3
+ SRCS_COMMON += UART_drv.c uartsci.c
+ PACKAGE_SRCS_COMMON += src/v3
+else
# The following v1 files are all that is shipped with TDA devices
SRCDIR = . src src/v1
INCDIR = . src src/v1
SRCS_COMMON += UART_v0.c
PACKAGE_SRCS_COMMON += src/v0 src/v0/UART_v0.h
endif
+endif
\ No newline at end of file
diff --git a/packages/ti/drv/uart/src/v3/uartsci.c b/packages/ti/drv/uart/src/v3/uartsci.c
--- /dev/null
@@ -0,0 +1,2768 @@
+/**
+ * @file uartsci.c
+ *
+ * @brief
+ * The file implements the UART Serial Communication Interface Driver
+ * for the XWR14xx and XWR16xx. The file implements the driver to conform
+ * to the MCPI standards.
+ *
+ * \par
+ * NOTE:
+ * (C) Copyright 2016-2020 Texas Instruments, Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ *
+ * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**************************************************************************
+ *************************** Include Files ********************************
+ **************************************************************************/
+#include <stdint.h>
+#include <string.h>
+#include <ti/drv/uart/UART.h>
+#include <ti/drv/uart/src/UART_osal.h>
+#include <ti/drv/uart/src/UART_drv_log.h>
+#include <ti/drv/uart/src/v3/uartsci.h>
+#include <ti/csl/cslr_sci.h>
+
+/**************************************************************************
+ ************************** Local Definitions *****************************
+ **************************************************************************/
+
+/* Registered callback functions: */
+static void UartSci_close(UART_Handle handle);
+static void UartSci_init(UART_Handle handle);
+static UART_Handle UartSci_open(UART_Handle handle, const UART_Params *params);
+static int32_t UartSci_read(UART_Handle handle, void *buffer, size_t size);
+static int32_t UartSci_readPolling(UART_Handle handle, void *buffer, size_t size);
+static void UartSci_readCancel(UART_Handle handle);
+static int32_t UartSci_write(UART_Handle handle, const void *buffer, size_t size);
+static int32_t UartSci_writePolling(UART_Handle handle, const void* buffer, size_t size);
+static void UartSci_writeCancel(UART_Handle handle);
+static int32_t UartSci_control(UART_Handle handle, uint32_t cmd, void *arg);
+static int32_t UartSci_read2(UART_Handle handle, UART_Transaction *transaction);
+static int32_t UartSci_write2(UART_Handle handle, UART_Transaction *transaction);
+
+/* Read/Write SCI Registers API: */
+static void UartSci_enableTxInterrupt (CSL_sciRegs* ptrSCIRegs);
+static void UartSci_disableTxInterrupt (CSL_sciRegs* ptrSCIRegs);
+static uint32_t UartSci_isTxInterruptEnabled (const CSL_sciRegs* ptrSCIRegs);
+static void UartSci_enableRxInterrupt (CSL_sciRegs* ptrSCIRegs);
+static void UartSci_disableRxInterrupt (CSL_sciRegs* ptrSCIRegs);
+static uint32_t UartSci_isRxInterruptEnabled (const CSL_sciRegs* ptrSCIRegs);
+static uint32_t UartSci_isRxFree (const CSL_sciRegs* ptrSCIRegs);
+static uint32_t UartSci_isTxFree (const CSL_sciRegs* ptrSCIRegs);
+static uint32_t UartSci_isRxOverrun (const CSL_sciRegs* ptrSCIRegs);
+static void UartSci_clearRxOverrun (CSL_sciRegs* ptrSCIRegs);
+static uint32_t UartSci_isParityError (const CSL_sciRegs* ptrSCIRegs);
+static void UartSci_clearParityError (CSL_sciRegs* ptrSCIRegs);
+static uint32_t UartSci_isFramingError (const CSL_sciRegs* ptrSCIRegs);
+static void UartSci_clearFramingError (CSL_sciRegs* ptrSCIRegs);
+static uint8_t UartSci_getCh (const CSL_sciRegs* ptrSCIRegs);
+static void UartSci_putCh (CSL_sciRegs* ptrSCIRegs, uint8_t ch);
+
+/* SCI Driver API: */
+static void UartSci_ISR (uintptr_t arg);
+static int32_t UartSci_validateParams (const UART_Params* params, UartSci_HwCfg* ptrHwCfg);
+static void UartSci_writeChar(UartSci_Driver* ptrUartSciDriver, UartSci_HwCfg* ptrHwCfg);
+static void UartSci_readChar(UartSci_Driver* ptrUartSciDriver, UartSci_HwCfg* ptrHwCfg);
+
+/**************************************************************************
+ ************************** Local Declarations ****************************
+ **************************************************************************/
+
+/**
+ * @brief Global Constant CR
+ */
+static const uint8_t CONST_CR = (uint8_t)'\r';
+
+/**
+ * @brief Global Constant LF
+ */
+static const uint8_t CONST_LF = (uint8_t)'\n';
+
+/** @brief
+ *
+ * Defines SCI frame format: number of stop bits
+ */
+typedef uint32_t UARTSCI_FORMAT_STOPBIT;
+#define UARTSCI_FORMAT_STOPBIT_ONE ((uint32_t) 0U)
+#define UARTSCI_FORMAT_STOPBIT_TWO ((uint32_t) 1U)
+
+/** @brief
+ *
+ * Defines SCI frame format: partty type
+ */
+typedef uint32_t UARTSCI_FORMAT_PARITY_TYPE;
+#define UARTSCI_FORMAT_PARITY_NONE ((uint32_t) 0U)
+#define UARTSCI_FORMAT_PARITY_EVEN ((uint32_t) 1U)
+#define UARTSCI_FORMAT_PARITY_ODD ((uint32_t) 2U)
+
+/** @brief
+ *
+ * Defines SCI frame format: character length in bits
+ */
+typedef uint32_t UARTSCI_FORMAT_CHAR_LEN;
+#define UARTSCI_FORMAT_CHAR_LEN_1 ((uint32_t) 0U)
+#define UARTSCI_FORMAT_CHAR_LEN_2 ((uint32_t) 1U)
+#define UARTSCI_FORMAT_CHAR_LEN_3 ((uint32_t) 2U)
+#define UARTSCI_FORMAT_CHAR_LEN_4 ((uint32_t) 3U)
+#define UARTSCI_FORMAT_CHAR_LEN_5 ((uint32_t) 4U)
+#define UARTSCI_FORMAT_CHAR_LEN_6 ((uint32_t) 5U)
+#define UARTSCI_FORMAT_CHAR_LEN_7 ((uint32_t) 6U)
+#define UARTSCI_FORMAT_CHAR_LEN_8 ((uint32_t) 7U)
+#define UARTSCI_FORMAT_CHAR_LEN_MAX UARTSCI_FORMAT_CHAR_LEN_8
+
+/** @brief
+ *
+ * Defines SCI Timing mode
+ */
+typedef uint32_t UARTSCI_TIMING_MODE;
+#define UARTSCI_TIMING_MODE_SYNC ((uint32_t) 0U)
+#define UARTSCI_TIMING_MODE_ASYNC ((uint32_t) 1U)
+
+/** @brief
+ *
+ * Defines SCI Clock mode
+ */
+typedef uint32_t UARTSCI_CLOCK_MODE;
+#define UARTSCI_CLOCK_MODE_EXTERNAL ((uint32_t) 0U)
+#define UARTSCI_CLOCK_MODE_INTERNAL ((uint32_t) 1U)
+
+/** @brief
+ *
+ * Defines SCI Communication mode
+ */
+typedef uint32_t UARTSCI_COMM_MODE;
+#define UARTSCI_COMM_MODE_IDLE ((uint32_t) 0U)
+#define UARTSCI_COMM_MODE_ADDRESS ((uint32_t) 1U)
+
+/** @brief
+ *
+ * Defines SCI interrupt indication
+ */
+typedef uint32_t UARTSCI_INT_IND;
+#define UARTSCI_INT_IND_BREAK ((uint32_t) 1U)
+#define UARTSCI_INT_IND_PE ((uint32_t) 2U)
+#define UARTSCI_INT_IND_FE ((uint32_t) 3U)
+#define UARTSCI_INT_IND_BREAK_DET_ERR ((uint32_t) 4U)
+#define UARTSCI_INT_IND_OE ((uint32_t) 5U)
+#define UARTSCI_INT_IND_RX ((uint32_t) 6U)
+#define UARTSCI_INT_IND_TX ((uint32_t) 7U)
+
+/** @brief
+ *
+ * Defines SCI interrupt contrl bitmap
+ */
+#define UARTSCI_INT_BITMAP_BREAK ((uint32_t) 0x01U)
+#define UARTSCI_INT_BITMAP_WAKEUP ((uint32_t) 0x02U)
+#define UARTSCI_INT_BITMAP_TX ((uint32_t) 0x04U)
+#define UARTSCI_INT_BITMAP_RX ((uint32_t) 0x08U)
+#define UARTSCI_INT_BITMAP_PE ((uint32_t) 0x10U)
+#define UARTSCI_INT_BITMAP_OE ((uint32_t) 0x20U)
+#define UARTSCI_INT_BITMAP_FE ((uint32_t) 0x30U)
+
+/** @brief
+ *
+ * Holds the SCI UART configuration info.
+ */
+typedef struct UART_SCI_CONFI_s {
+ /** Receive Enable */
+ uint32_t rxEn;
+
+ /** Transmit Enable */
+ uint32_t txEn;
+
+ /** Clock Mode internal or external
+ * @note: If an external clock source is selected, the internal baud rate
+ * generator is bypassed. The maximum frequency allowed for external
+ * clock is VCLK/16
+ */
+ UARTSCI_CLOCK_MODE clkMode;
+
+ /** Timing mode: Asynchronous or Synchronous mode
+ */
+ UARTSCI_TIMING_MODE timingMode;
+
+ /** Communication mode: idle-line or address-bit for multiprocessor operation
+ * only
+ */
+ UARTSCI_COMM_MODE commMode;
+
+ /** Number of stop bits: one or two */
+ UARTSCI_FORMAT_STOPBIT stopBits;
+
+ /** Parity: none, even or odd */
+ UARTSCI_FORMAT_PARITY_TYPE parityType;
+
+ /** Data length in bits */
+ UARTSCI_FORMAT_CHAR_LEN charLen;
+
+ /** Baud rate */
+ uint32_t baudRate;
+
+ /** Input Clock Frequency */
+ uint32_t clockFrequency;
+
+ /** flag to indicate in loopback mode */
+ uint32_t loopback;
+
+} UART_SCI_CONFIG;
+
+/**************************************************************************
+ ************************** Global Variables ******************************
+ **************************************************************************/
+
+/**
+ * @brief UART-SCI Driver Function Table
+ */
+UART_FxnTable gUartSciFxnTable =
+{
+ &UartSci_close,
+ &UartSci_control,
+ &UartSci_init,
+ &UartSci_open,
+ &UartSci_read,
+ &UartSci_readPolling,
+ &UartSci_readCancel,
+ &UartSci_write,
+ &UartSci_writePolling,
+ &UartSci_writeCancel,
+ &UartSci_read2,
+ &UartSci_write2,
+};
+
+/**************************************************************************
+ ************************* UART SCI Driver Functions **********************
+ **************************************************************************/
+/**
+ * @b Description
+ * @n
+ * Utility function which is used to enable the specific SCI
+ * Instance by taking it out of reset
+ *
+ * @param[in] ptrSCIRegs
+ * Point to the SCI Base
+ *
+ * \ingroup UART_SCI_INTERNAL_FUNCTION
+ *
+ * @retval
+ * Not applicable
+ */
+void UartSci_enable (CSL_sciRegs* ptrSCIRegs)
+{
+ CSL_FINS(ptrSCIRegs->SCIGCR0, SCI_SCIGCR0_RESET, 1U);
+}
+
+/**
+ * @b Description
+ * @n
+ * Utility function which is used to check if the specific SCI
+ * Instance is enabled or not
+ *
+ * @param[in] ptrSCIRegs
+ * Point to the SCI Base
+ *
+ * \ingroup UART_SCI_INTERNAL_FUNCTION
+ *
+ * @retval
+ * 1 - SCI is enabled
+ * @retval
+ * 0 - SCI is disabled
+ */
+uint32_t UartSci_isEnabled (const CSL_sciRegs* ptrSCIRegs)
+{
+ return CSL_FEXT(ptrSCIRegs->SCIGCR0, SCI_SCIGCR0_RESET);
+}
+
+/**
+ * @b Description
+ * @n
+ * Utility function which is used to disable the specific SCI
+ * Instance by putting it into reset state
+ *
+ * @param[in] ptrSCIRegs
+ * Point to the SCI Base
+ *
+ * \ingroup UART_SCI_INTERNAL_FUNCTION
+ *
+ * @retval
+ * Not applicable
+ */
+void UartSci_disable (CSL_sciRegs* ptrSCIRegs)
+{
+ CSL_FINS(ptrSCIRegs->SCIGCR0, SCI_SCIGCR0_RESET, 0U);
+}
+
+/**
+ * @b Description
+ * @n
+ * Utility function which is used to put the specific SCI
+ * Instance into software reset for configuration
+ *
+ * @param[in] ptrSCIRegs
+ * Point to the SCI Base
+ *
+ * \ingroup UART_SCI_INTERNAL_FUNCTION
+ *
+ * @retval
+ * Not applicable
+ */
+void UartSci_enableSwReset (CSL_sciRegs* ptrSCIRegs)
+{
+ CSL_FINS(ptrSCIRegs->SCIGCR1, SCI_SCIGCR1_SW_NRESET, 0U);
+}
+
+/**
+ * @b Description
+ * @n
+ * Utility function which is used to check if the specific SCI
+ * Instance is at Software Reset state
+ *
+ * @param[in] ptrSCIRegs
+ * Point to the SCI Base
+ *
+ * \ingroup UART_SCI_INTERNAL_FUNCTION
+ *
+ * @retval
+ * 1 - SCI is at software reset
+ * @retval
+ * 0 - SCI is operational
+ */
+uint32_t UartSci_isSwReset (const CSL_sciRegs* ptrSCIRegs)
+{
+ return (CSL_FEXT(ptrSCIRegs->SCIGCR1, SCI_SCIGCR1_SW_NRESET)?0U:1U);
+}
+
+/**
+ * @b Description
+ * @n
+ * Utility function which is used to take the specific SCI
+ * instance out of software reset for normal operation
+ *
+ * @param[in] ptrSCIRegs
+ * Point to the SCI Base
+ *
+ * \ingroup UART_SCI_INTERNAL_FUNCTION
+ *
+ * @retval
+ * Not applicable
+ */
+void UartSci_disableSwReset (CSL_sciRegs* ptrSCIRegs)
+{
+ CSL_FINS(ptrSCIRegs->SCIGCR1, SCI_SCIGCR1_SW_NRESET, 1U);
+}
+
+/**
+ * @b Description
+ * @n
+ * Utility function which is used to disable all interrupts
+ * for the specific SCI Instance
+ *
+ * @param[in] ptrSCIRegs
+ * Point to the SCI Base
+ *
+ * \ingroup UART_SCI_INTERNAL_FUNCTION
+ *
+ * @retval
+ * Not applicable
+ */
+void UartSci_disableAllInterrupts (CSL_sciRegs* ptrSCIRegs)
+{
+ CSL_REG_WR(&ptrSCIRegs->SCICLEARINT, 0xFFFFFFFFU);
+}
+
+/**
+ * @b Description
+ * @n
+ * Utility function which is used to configure the specific SCI
+ * Instance to its desired operation modes
+ *
+ * @param[in] ptrSCIRegs
+ * Point to the SCI Base
+ * @param[in] ptrSCIConfig
+ * Point to the Configuartion structure
+ *
+ * \ingroup UART_SCI_INTERNAL_FUNCTION
+ *
+ * @retval
+ * <b> Return Value </b>
+ * @n 0 = success
+ * @n -1 = bad state or bad parameters
+ *
+ * <b> Pre Condition </b>
+ * @n SCI should be at software reset state.
+ */
+int32_t UartSci_config (CSL_sciRegs* ptrSCIRegs, UART_SCI_CONFIG* ptrSCIConfig)
+{
+ uint32_t resetVal;
+ uint32_t val32 = 0;
+ int32_t retVal = 0;
+ uint32_t divisionFactor = 1U;
+
+ resetVal = UartSci_isSwReset(ptrSCIRegs);
+ if (resetVal == 0)
+ {
+ retVal = -1;
+ }
+ else
+ {
+ if (ptrSCIConfig->txEn)
+ {
+ val32 |= CSL_FMK (SCI_SCIGCR1_TXENA, 1U);
+ CSL_FINS(ptrSCIRegs->SCIPIO0, SCI_SCIPIO0_TX_FUNC, 1U);
+ }
+
+ if (ptrSCIConfig->rxEn)
+ {
+ val32 |= CSL_FMK (SCI_SCIGCR1_RXENA, 1U);
+ CSL_FINS(ptrSCIRegs->SCIPIO0, SCI_SCIPIO0_RX_FUNC, 1U);
+ }
+
+ if (ptrSCIConfig->clkMode == UARTSCI_CLOCK_MODE_INTERNAL)
+ {
+ val32 |= CSL_FMK (SCI_SCIGCR1_CLOCK, 1U);
+ CSL_FINS(ptrSCIRegs->SCIPIO0, SCI_SCIPIO0_CLK_FUNC, 1U);
+ }
+
+ if (ptrSCIConfig->timingMode == UARTSCI_TIMING_MODE_ASYNC)
+ {
+ val32 |= CSL_FMK (SCI_SCIGCR1_TIMING_MODE, 1U);
+ divisionFactor = 16U;
+ }
+
+ if (ptrSCIConfig->commMode == UARTSCI_COMM_MODE_ADDRESS)
+ {
+ val32 |= CSL_FMK (SCI_SCIGCR1_COMM_MODE, 1U);
+ }
+
+ if (ptrSCIConfig->stopBits == UARTSCI_FORMAT_STOPBIT_TWO)
+ {
+ val32 |= CSL_FMK (SCI_SCIGCR1_STOP, 1U);
+ }
+
+ if (ptrSCIConfig->parityType == UARTSCI_FORMAT_PARITY_EVEN)
+ {
+ val32 |= CSL_FMK (SCI_SCIGCR1_PARITY_ENA, 1U) |
+ CSL_FMK (SCI_SCIGCR1_PARITY, 1U);
+ }
+ else if (ptrSCIConfig->parityType == UARTSCI_FORMAT_PARITY_ODD)
+ {
+ val32 |= CSL_FMK (SCI_SCIGCR1_PARITY_ENA, 1U);
+ }
+
+ CSL_REG_WR(&ptrSCIRegs->SCIGCR1, val32);
+
+ if(ptrSCIConfig->charLen > UARTSCI_FORMAT_CHAR_LEN_MAX)
+ {
+ retVal = -1;
+ }
+ else
+ {
+ CSL_REG_WR(&ptrSCIRegs->SCICHAR, CSL_FMK(SCI_SCICHAR_CHAR, ptrSCIConfig->charLen));
+ }
+
+ /* Calculate the baud value to generate the desired baud rate */
+ if (ptrSCIConfig->baudRate == 0U)
+ {
+ val32 = ptrSCIConfig->clockFrequency/32U;
+ }
+ else
+ {
+ val32 = ptrSCIConfig->clockFrequency/(ptrSCIConfig->baudRate * divisionFactor) - 1U;
+ }
+ CSL_REG_WR(&ptrSCIRegs->SCIBAUD, val32);
+
+ if (ptrSCIConfig->loopback)
+ {
+ /* Enable Loopback: */
+ CSL_FINS(ptrSCIRegs->SCIGCR1, SCI_SCIGCR1_LOOP_BACK , 1U);
+ }
+ }
+
+ return(retVal);
+}
+
+/**
+ * @b Description
+ * @n
+ * Utility function which is used to enable multiple interrupt
+ * for the specific SCI Instance
+ *
+ * @param[in] ptrSCIRegs
+ * Point to the SCI Base
+ * @param[in] intBitMap
+ * Intrrupts to be enabled
+ *
+ * \ingroup UART_SCI_INTERNAL_FUNCTION
+ *
+ * @retval
+ * Not applicable
+ */
+void UartSci_enableInterrupts (CSL_sciRegs* ptrSCIRegs, uint32_t intBitMap)
+{
+ uint32_t val32 = 0;
+
+ if(intBitMap & UARTSCI_INT_BITMAP_BREAK)
+ {
+ val32 |= CSL_FMK(SCI_SCISETINT_SET_BRKDT_INT, 1U);
+ }
+
+ if(intBitMap & UARTSCI_INT_BITMAP_WAKEUP)
+ {
+ val32 |= CSL_FMK(SCI_SCISETINT_SET_WAKEUP_INT, 1U);
+ }
+
+ if(intBitMap & UARTSCI_INT_BITMAP_TX)
+ {
+ val32 |= CSL_FMK(SCI_SCISETINT_SET_TX_INT, 1U);
+ }
+
+ if(intBitMap & UARTSCI_INT_BITMAP_RX)
+ {
+ val32 |= CSL_FMK(SCI_SCISETINT_SET_RX_INT, 1U);
+ }
+
+ if(intBitMap & UARTSCI_INT_BITMAP_PE)
+ {
+ val32 |= CSL_FMK(SCI_SCISETINT_SET_PE_INT, 1U);
+ }
+
+ if(intBitMap & UARTSCI_INT_BITMAP_OE)
+ {
+ val32 |= CSL_FMK(SCI_SCISETINT_SET_OE_INT, 1U);
+ }
+
+ if(intBitMap & UARTSCI_INT_BITMAP_FE)
+ {
+ val32 |= CSL_FMK(SCI_SCISETINT_SET_FE_INT, 1U);
+ }
+
+ CSL_REG_WR(&ptrSCIRegs->SCISETINT, val32);
+}
+
+/**
+ * @b Description
+ * @n
+ * Utility function which is used to disable multiple interrupt
+ * for the specific SCI Instance
+ *
+ * @param[in] ptrSCIRegs
+ * Point to the SCI Base
+ * @param[in] intBitMap
+ * Intrrupts to be enabled
+ *
+ * \ingroup UART_SCI_INTERNAL_FUNCTION
+ *
+ * @retval
+ * Not applicable
+ */
+void UartSci_disableInterrupts (CSL_sciRegs* ptrSCIRegs, uint32_t intBitMap)
+{
+ uint32_t val32 = 0;
+
+ if(intBitMap & UARTSCI_INT_BITMAP_BREAK)
+ {
+ val32 |= CSL_FMK(SCI_SCICLEARINT_CLR_BRKDT_INT, 1U);
+ }
+
+ if(intBitMap & UARTSCI_INT_BITMAP_WAKEUP)
+ {
+ val32 |= CSL_FMK(SCI_SCICLEARINT_CLR_WAKEUP_INT, 1U);
+ }
+
+ if(intBitMap & UARTSCI_INT_BITMAP_TX)
+ {
+ val32 |= CSL_FMK(SCI_SCICLEARINT_CLR_TX_INT, 1U);
+ }
+
+ if(intBitMap & UARTSCI_INT_BITMAP_RX)
+ {
+ val32 |= CSL_FMK(SCI_SCICLEARINT_CLR_RX_INT, 1U);
+ }
+
+ if(intBitMap & UARTSCI_INT_BITMAP_PE)
+ {
+ val32 |= CSL_FMK(SCI_SCICLEARINT_CLR_PE_INT, 1U);
+ }
+
+ if(intBitMap & UARTSCI_INT_BITMAP_OE)
+ {
+ val32 |= CSL_FMK(SCI_SCICLEARINT_CLR_OE_INT, 1U);
+ }
+
+ if(intBitMap & UARTSCI_INT_BITMAP_FE)
+ {
+ val32 |= CSL_FMK(SCI_SCICLEARINT_CLR_FE_INT, 1U);
+ }
+
+ CSL_REG_WR(&ptrSCIRegs->SCICLEARINT, val32);
+}
+
+/**
+ * @b Description
+ * @n
+ * Utility function which is used to set multiple interrupt
+ * levels from int0 to int1 for the specific SCI Instance
+ *
+ * @param[in] ptrSCIRegs
+ * Point to the SCI Base
+ * @param[in] intBitMap
+ * Intrrupts to be enabled
+ *
+ * \ingroup UART_SCI_INTERNAL_FUNCTION
+ *
+ * @retval
+ * Not applicable
+ */
+void UartSci_setInterruptLevels (CSL_sciRegs* ptrSCIRegs, uint32_t intBitMap)
+{
+ uint32_t val32 = 0;
+
+ if(intBitMap & UARTSCI_INT_BITMAP_BREAK)
+ {
+ val32 |= CSL_FMK(SCI_SCISETINTLVL_SET_BRKDT_INT_LVL, 1U);
+ }
+
+ if(intBitMap & UARTSCI_INT_BITMAP_WAKEUP)
+ {
+ val32 |= CSL_FMK(SCI_SCISETINTLVL_SET_WAKEUP_INT_LVL, 1U);
+ }
+
+ if(intBitMap & UARTSCI_INT_BITMAP_TX)
+ {
+ val32 |= CSL_FMK(SCI_SCISETINTLVL_SET_TX_INT_LVL, 1U);
+ }
+
+ if(intBitMap & UARTSCI_INT_BITMAP_RX)
+ {
+ val32 |= CSL_FMK(SCI_SCISETINTLVL_SET_RX_INT_LVL, 1U);
+ }
+
+ if(intBitMap & UARTSCI_INT_BITMAP_PE)
+ {
+ val32 |= CSL_FMK(SCI_SCISETINTLVL_SET_PE_INT_LVL, 1U);
+ }
+
+ if(intBitMap & UARTSCI_INT_BITMAP_OE)
+ {
+ val32 |= CSL_FMK(SCI_SCISETINTLVL_SET_OE_INT_LVL, 1U);
+ }
+
+ if(intBitMap & UARTSCI_INT_BITMAP_FE)
+ {
+ val32 |= CSL_FMK(SCI_SCISETINTLVL_SET_FE_INT_LVL, 1U);
+ }
+
+ CSL_REG_WR(&ptrSCIRegs->SCISETINTLVL, val32);
+}
+
+/**
+ * @b Description
+ * @n
+ * Utility function which is used to clear multiple interrupt
+ * levels back from int1 to int0 for the specific SCI Instance
+ *
+ * @param[in] ptrSCIRegs
+ * Point to the SCI Base
+ * @param[in] intBitMap
+ * Intrrupts to be enabled
+ *
+ * \ingroup UART_SCI_INTERNAL_FUNCTION
+ *
+ * @retval
+ * Not applicable
+ */
+void UartSci_clearInterruptLevels (CSL_sciRegs* ptrSCIRegs, uint32_t intBitMap)
+{
+ uint32_t val32 = 0;
+
+ if(intBitMap & UARTSCI_INT_BITMAP_BREAK)
+ {
+ val32 |= CSL_FMK(SCI_SCICLEARINTLVL_CLR_BRKDT_INT_LVL, 1U);
+ }
+
+ if(intBitMap & UARTSCI_INT_BITMAP_WAKEUP)
+ {
+ val32 |= CSL_FMK(SCI_SCICLEARINTLVL_CLR_WAKEUP_INT_LVL, 1U);
+ }
+
+ if(intBitMap & UARTSCI_INT_BITMAP_TX)
+ {
+ val32 |= CSL_FMK(SCI_SCICLEARINTLVL_CLR_TX_INT_LVL, 1U);
+ }
+
+ if(intBitMap & UARTSCI_INT_BITMAP_RX)
+ {
+ val32 |= CSL_FMK(SCI_SCICLEARINTLVL_CLR_RX_INT_LVL, 1U);
+ }
+
+ if(intBitMap & UARTSCI_INT_BITMAP_PE)
+ {
+ val32 |= CSL_FMK(SCI_SCICLEARINTLVL_CLR_PE_INT_LVL, 1U);
+ }
+
+ if(intBitMap & UARTSCI_INT_BITMAP_OE)
+ {
+ val32 |= CSL_FMK(SCI_SCICLEARINTLVL_CLR_OE_INT_LVL, 1U);
+ }
+
+ if(intBitMap & UARTSCI_INT_BITMAP_FE)
+ {
+ val32 |= CSL_FMK(SCI_SCICLEARINTLVL_CLR_FE_INT_LVL, 1U);
+ }
+
+ CSL_REG_WR(&ptrSCIRegs->SCICLEARINTLVL, val32);
+}
+
+/**
+ * @b Description
+ * @n
+ * Utility function which is used to clear all interrupt
+ * levels back to int0 for the specific SCI Instance
+ *
+ * @param[in] ptrSCIRegs
+ * Point to the SCI Base
+ *
+ * \ingroup UART_SCI_INTERNAL_FUNCTION
+ *
+ * @retval
+ * Not applicable
+ */
+void UartSci_clearAllInterruptLevels (CSL_sciRegs* ptrSCIRegs)
+{
+ CSL_REG_WR(&ptrSCIRegs->SCICLEARINTLVL, 0xFFFFFFFFU);
+}
+/**
+ * @b Description
+ * @n
+ * Utility function which is used to enable/disable loopback mode
+ * for the specific SCI Instance
+ *
+ * @param[in] ptrSCIRegs
+ * Point to the SCI Base
+ * @param[in] enable
+ * 0/1: disable/enable loopback
+ *
+ * \ingroup UART_SCI_INTERNAL_FUNCTION
+ *
+ * @retval
+ * Not applicable
+ */
+void UartSci_loopbackControl (CSL_sciRegs* ptrSCIRegs, uint32_t enable)
+{
+ uint32_t resetVal = UartSci_isSwReset(ptrSCIRegs);
+
+ if (resetVal == 1U)
+ {
+ UartSci_enableSwReset(ptrSCIRegs);
+ }
+
+ if (enable == 1U)
+ {
+ CSL_FINS(ptrSCIRegs->SCIGCR1, SCI_SCIGCR1_LOOP_BACK , 1U);
+ }
+ else
+ {
+ CSL_FINS(ptrSCIRegs->SCIGCR1, SCI_SCIGCR1_LOOP_BACK , 0U);
+ }
+
+ if (resetVal == 1U)
+ {
+ UartSci_disableSwReset(ptrSCIRegs);
+ }
+}
+
+/**
+ * @b Description
+ * @n
+ * Utility function which is used to enable the transmit interrupt
+ * for the specific SCI Instance
+ *
+ * @param[in] ptrSCIRegs
+ * Point to the SCI Base
+ *
+ * \ingroup UART_SCI_INTERNAL_FUNCTION
+ *
+ * @retval
+ * Not applicable
+ */
+static void UartSci_enableTxInterrupt (CSL_sciRegs* ptrSCIRegs)
+{
+ CSL_FINS(ptrSCIRegs->SCISETINT, SCI_SCISETINT_SET_TX_INT, 1U);
+}
+
+/**
+ * @b Description
+ * @n
+ * Utility function which is used to check if the transmit interrupt
+ * for the specific SCI Instance is enabled or not
+ *
+ * @param[in] ptrSCIRegs
+ * Point to the SCI Base
+ *
+ * \ingroup UART_SCI_INTERNAL_FUNCTION
+ *
+ * @retval
+ * 1 - Interrupt is enabled
+ * @retval
+ * 0 - Interrupt is disabled
+ */
+static uint32_t UartSci_isTxInterruptEnabled (const CSL_sciRegs* ptrSCIRegs)
+{
+ return CSL_FEXT(ptrSCIRegs->SCISETINT, SCI_SCISETINT_SET_TX_INT);
+}
+
+/**
+ * @b Description
+ * @n
+ * Utility function which is used to enable the transmit DMA
+ * functionality for the specific SCI Instance
+ *
+ * @param[in] ptrSCIRegs
+ * Point to the SCI Base
+ *
+ * \ingroup UART_SCI_INTERNAL_FUNCTION
+ *
+ * @retval
+ * Not applicable
+ */
+void UartSci_enableTxDMA (CSL_sciRegs* ptrSCIRegs)
+{
+ /* Enable Transmit DMA */
+ CSL_FINS(ptrSCIRegs->SCISETINT, SCI_SCISETINT_SET_TX_DMA, 1U);
+}
+
+/**
+ * @b Description
+ * @n
+ * Utility function which is used to disable the transmit DMA
+ * functionality for the specific SCI Instance
+ *
+ * @param[in] ptrSCIRegs
+ * Point to the SCI Base
+ *
+ * \ingroup UART_SCI_INTERNAL_FUNCTION
+ *
+ * @retval
+ * Not applicable
+ */
+void UartSci_disableTxDMA (CSL_sciRegs* ptrSCIRegs)
+{
+ /* Disable the Transmit DMA */
+ CSL_REG_WR(&ptrSCIRegs->SCICLEARINT, CSL_FMK(SCI_SCICLEARINT_CLR_TX_DMA, 1U));
+}
+
+/**
+ * @b Description
+ * @n
+ * Utility function which is used to disable the transmit interrupt
+ * for the specific SCI Instance
+ *
+ * @param[in] ptrSCIRegs
+ * Point to the SCI Base
+ *
+ * \ingroup UART_SCI_INTERNAL_FUNCTION
+ *
+ * @retval
+ * Not applicable
+ */
+static void UartSci_disableTxInterrupt (CSL_sciRegs* ptrSCIRegs)
+{
+ CSL_REG_WR(&ptrSCIRegs->SCICLEARINT, CSL_FMK(SCI_SCICLEARINT_CLR_TX_INT, 1U));
+}
+
+/**
+ * @b Description
+ * @n
+ * Utility function which is used to enable the receive interrupt
+ * for the specific SCI Instance
+ *
+ * @param[in] ptrSCIRegs
+ * Point to the SCI Base
+ *
+ * \ingroup UART_SCI_INTERNAL_FUNCTION
+ *
+ * @retval
+ * Not applicable
+ */
+static void UartSci_enableRxInterrupt (CSL_sciRegs* ptrSCIRegs)
+{
+ CSL_FINS(ptrSCIRegs->SCISETINT, SCI_SCISETINT_SET_RX_INT, 1U);
+}
+
+/**
+ * @b Description
+ * @n
+ * Utility function which is used to check if the transmit interrupt
+ * for the specific SCI Instance is enabled or not
+ *
+ * @param[in] ptrSCIRegs
+ * Point to the SCI Base
+ *
+ * \ingroup UART_SCI_INTERNAL_FUNCTION
+ *
+ * @retval
+ * 1 - Interrupt is enabled
+ * @retval
+ * 0 - Interrupt is disabled
+ */
+static uint32_t UartSci_isRxInterruptEnabled (const CSL_sciRegs* ptrSCIRegs)
+{
+ return CSL_FEXT(ptrSCIRegs->SCISETINT, SCI_SCISETINT_SET_RX_INT);
+}
+
+/**
+ * @b Description
+ * @n
+ * Utility function which is used to disable the receive interrupt
+ * for the specific SCI Instance
+ *
+ * @param[in] ptrSCIRegs
+ * Point to the SCI Base
+ *
+ * \ingroup UART_SCI_INTERNAL_FUNCTION
+ *
+ * @retval
+ * Not applicable
+ */
+static void UartSci_disableRxInterrupt (CSL_sciRegs* ptrSCIRegs)
+{
+ CSL_REG_WR(&ptrSCIRegs->SCICLEARINT,
+ CSL_FMK(SCI_SCICLEARINT_CLR_RX_INT, 1U));
+}
+
+/**
+ * @b Description
+ * @n
+ * Utility function which is used to enable the receive DMA
+ * functionality for the specific SCI Instance
+ *
+ * @param[in] ptrSCIRegs
+ * Point to the SCI Base
+ *
+ * \ingroup UART_SCI_INTERNAL_FUNCTION
+ *
+ * @retval
+ * Not applicable
+ */
+void UartSci_enableRxDMA (CSL_sciRegs* ptrSCIRegs)
+{
+ /* Enable the Rx DMA All and Rx DMA */
+ CSL_FINS(ptrSCIRegs->SCISETINT, SCI_SCISETINT_SET_RX_DMA_ALL, 1U);
+ CSL_FINS(ptrSCIRegs->SCISETINT, SCI_SCISETINT_SET_RX_DMA, 1U);
+}
+
+/**
+ * @b Description
+ * @n
+ * Utility function which is used to disable the receive DMA
+ * functionality for the specific SCI Instance
+ *
+ * @param[in] ptrSCIRegs
+ * Point to the SCI Base
+ *
+ * \ingroup UART_SCI_INTERNAL_FUNCTION
+ *
+ * @retval
+ * Not applicable
+ */
+void UartSci_disableRxDMA (CSL_sciRegs* ptrSCIRegs)
+{
+ /* Disable the Rx DMA All and Rx DMA */
+ CSL_REG_WR(&ptrSCIRegs->SCICLEARINT, CSL_FMK(SCI_SCICLEARINT_CLR_RX_DMA_ALL, 1U));
+ CSL_REG_WR(&ptrSCIRegs->SCICLEARINT, CSL_FMK(SCI_SCICLEARINT_CLR_RX_DMA, 1U));
+}
+
+/**
+ * @b Description
+ * @n
+ * Utility function which is used to determine if the SCI receiver
+ * has been overrun or not?
+ *
+ * @param[in] ptrSCIRegs
+ * Point to the SCI Base
+ *
+ * \ingroup UART_SCI_INTERNAL_FUNCTION
+ *
+ * @retval
+ * 1 - Receiver overrun has been detected
+ * @retval
+ * 0 - Receiver overrun not detected
+ */
+static uint32_t UartSci_isRxOverrun (const CSL_sciRegs* ptrSCIRegs)
+{
+ return CSL_FEXT(ptrSCIRegs->SCIFLR, SCI_SCIFLR_OE);
+}
+
+/**
+ * @b Description
+ * @n
+ * Utility function which is used to clear the SCI receiver.
+ *
+ * @param[in] ptrSCIRegs
+ * Point to the SCI Base
+ *
+ * \ingroup UART_SCI_INTERNAL_FUNCTION
+ *
+ * @retval
+ * Not applicable
+ */
+static void UartSci_clearRxOverrun (CSL_sciRegs* ptrSCIRegs)
+{
+ /* Write a 1 to the Overrun bit will clear the status of the overrun */
+ CSL_REG_WR(&ptrSCIRegs->SCIFLR, CSL_FMK(SCI_SCIFLR_OE, 1U));
+}
+
+/**
+ * @b Description
+ * @n
+ * Utility function which is used to determine if there is a
+ * framing error or not?
+ *
+ * @param[in] ptrSCIRegs
+ * Point to the SCI Base
+ *
+ * \ingroup UART_SCI_INTERNAL_FUNCTION
+ *
+ * @retval
+ * 1 - Framing error has been detected
+ * @retval
+ * 0 - Framing error has not been detected
+ */
+static uint32_t UartSci_isFramingError (const CSL_sciRegs* ptrSCIRegs)
+{
+ return CSL_FEXT(ptrSCIRegs->SCIFLR, SCI_SCIFLR_FE);
+}
+
+/**
+ * @b Description
+ * @n
+ * Utility function which is used to clear the framing error
+ *
+ * @param[in] ptrSCIRegs
+ * Point to the SCI Base
+ *
+ * \ingroup UART_SCI_INTERNAL_FUNCTION
+ *
+ * @retval
+ * Not applicable
+ */
+static void UartSci_clearFramingError (CSL_sciRegs* ptrSCIRegs)
+{
+ /* Write a 1 to the Overrun bit will clear the status of the overrun */
+ CSL_REG_WR(&ptrSCIRegs->SCIFLR, CSL_FMK(SCI_SCIFLR_FE, 1U));
+}
+
+/**
+ * @b Description
+ * @n
+ * Utility function which is used to determine if there is a
+ * parity error or not?
+ *
+ * @param[in] ptrSCIRegs
+ * Point to the SCI Base
+ *
+ * \ingroup UART_SCI_INTERNAL_FUNCTION
+ *
+ * @retval
+ * 1 - Parity error has been detected
+ * @retval
+ * 0 - Parity error has not been detected
+ */
+static uint32_t UartSci_isParityError (const CSL_sciRegs* ptrSCIRegs)
+{
+ return CSL_FEXT(ptrSCIRegs->SCIFLR, SCI_SCIFLR_PE);
+}
+
+/**
+ * @b Description
+ * @n
+ * Utility function which is used to clear the parity error
+ *
+ * @param[in] ptrSCIRegs
+ * Point to the SCI Base
+ *
+ * \ingroup UART_SCI_INTERNAL_FUNCTION
+ *
+ * @retval
+ * Not applicable
+ */
+static void UartSci_clearParityError (CSL_sciRegs* ptrSCIRegs)
+{
+ /* Write a 1 to the Parity Error bit will clear the status */
+ CSL_REG_WR(&ptrSCIRegs->SCIFLR, CSL_FMK(SCI_SCIFLR_PE, 1U));
+}
+
+/**
+ * @b Description
+ * @n
+ * Utility function which is used to determine if the SCI receiver
+ * is free or not.
+ *
+ * @param[in] ptrSCIRegs
+ * Point to the SCI Base
+ *
+ * \ingroup UART_SCI_INTERNAL_FUNCTION
+ *
+ * @retval
+ * 1 - Receiver is free
+ * @retval
+ * 0 - Receiver is not free
+ */
+static uint32_t UartSci_isRxFree (const CSL_sciRegs* ptrSCIRegs)
+{
+ return CSL_FEXT(ptrSCIRegs->SCIFLR, SCI_SCIFLR_RXRDY);
+}
+
+/**
+ * @b Description
+ * @n
+ * Utility function which is used to determine if the SCI transmitter
+ * is free or not.
+ *
+ * @param[in] ptrSCIRegs
+ * Point to the SCI Base
+ *
+ * \ingroup UART_SCI_INTERNAL_FUNCTION
+ *
+ * @retval
+ * 1 - Transmitter is free
+ * @retval
+ * 0 - Transmitter is not free
+ */
+static uint32_t UartSci_isTxFree (const CSL_sciRegs* ptrSCIRegs)
+{
+ return CSL_FEXT(ptrSCIRegs->SCIFLR, SCI_SCIFLR_TXRDY);
+}
+
+/**
+ * @b Description
+ * @n
+ * Utility function which is used to put a character
+ *
+ * @param[in] ptrSCIRegs
+ * Point to the SCI Base
+ * @param[in] ch
+ * Character to be placed
+ *
+ * \ingroup UART_SCI_INTERNAL_FUNCTION
+ *
+ * @retval
+ * Not applicable
+ */
+static void UartSci_putCh (CSL_sciRegs* ptrSCIRegs, uint8_t ch)
+{
+ CSL_FINS(ptrSCIRegs->SCITD, SCI_SCITD_TD, ch);
+}
+
+/**
+ * @b Description
+ * @n
+ * Utility function which is used to get a character
+ *
+ * @param[in] ptrSCIRegs
+ * Point to the SCI Base
+ *
+ * \ingroup UART_SCI_INTERNAL_FUNCTION
+ *
+ * @retval
+ * Character which is read from the SCI Register
+ */
+static uint8_t UartSci_getCh (const CSL_sciRegs* ptrSCIRegs)
+{
+ return (uint8_t)CSL_FEXT(ptrSCIRegs->SCIRD, SCI_SCIRD_RD);
+}
+
+extern uint64_t TimerP_getTimeInUsecs(void);
+
+/**
+ * @b Description
+ * @n
+ * Utility function of delay in micro-second
+ *
+ * @param[in] nTicks
+ * dealy ticks in us
+ *
+ * \ingroup UART_SCI_INTERNAL_FUNCTION
+ *
+ * @retval
+ * None
+ */
+static void Uartsci_usDelay(uint64_t nTicks)
+{
+ uint64_t start, end;
+
+ start = TimerP_getTimeInUsecs();
+
+ /* Every 32 cycle increment is 1ms */
+ do {
+ end = TimerP_getTimeInUsecs();
+ } while ((end - start) <= nTicks);
+}
+
+/**
+ * @b Description
+ * @n
+ * The function is used to write the character from the write buffer
+ * on the UART.
+ *
+ * @param[in] handle
+ * Handle to the UART Driver
+ * @param[in] isRx
+ * true: receive operation
+ * false: transmit operation
+ *
+ * \ingroup UART_SCI_INTERNAL_FUNCTION
+ *
+ * @retval
+ * Not applicable
+ */
+void UartSci_callback (UART_Handle handle, bool isRx)
+{
+ UART_Config* ptrUARTConfig;
+ UartSci_Driver* ptrUartSciDriver;
+
+ /* Get the UART Configuration: */
+ ptrUARTConfig = (UART_Config*)handle;
+
+ /* Get the UART Driver Instance: */
+ ptrUartSciDriver = (UartSci_Driver*)ptrUARTConfig->object;
+
+ /* Call back to application */
+ if (isRx)
+ {
+ if (ptrUartSciDriver->params.readMode == UART_MODE_CALLBACK)
+ {
+ ptrUartSciDriver->params.readCallback(handle,
+ (void *)ptrUartSciDriver->ptrReadBuffer,
+ ptrUartSciDriver->readCount);
+ }
+ else
+ {
+ (void)UART_osalPostLock(ptrUartSciDriver->readSem);
+ }
+ }
+ else
+ {
+ if ( ptrUartSciDriver->params.writeMode == UART_MODE_CALLBACK)
+ {
+ ptrUartSciDriver->params.writeCallback(handle,
+ (void *)(ptrUartSciDriver->ptrWriteBuffer),
+ ptrUartSciDriver->writeCount);
+ }
+ else
+ {
+ (void)UART_osalPostLock( ptrUartSciDriver->writeSem);
+ }
+ }
+}
+
+
+/**
+ * @b Description
+ * @n
+ * The function is used to write the character from the write buffer
+ * on the UART.
+ *
+ * @param[in] ptrUartSciDriver
+ * Pointer to the UART Driver Instance
+ * @param[in] ptrHwCfg
+ * Pointer to the UART Driver Hardware configuration
+ *
+ * \ingroup UART_SCI_INTERNAL_FUNCTION
+ *
+ * @retval
+ * Not applicable
+ */
+static void UartSci_writeChar
+(
+ UartSci_Driver* ptrUartSciDriver,
+ UartSci_HwCfg* ptrHwCfg
+)
+{
+ /* Is the UART Driver operating in TEXT/BINARY Mode? */
+ if (ptrUartSciDriver->params.writeDataMode == UART_DATA_TEXT)
+ {
+ /* TEXT Mode: */
+ if (ptrUartSciDriver->writeCR)
+ {
+ /* Write the return character */
+ UartSci_putCh (ptrHwCfg->ptrSCIRegs, CONST_CR);
+
+ /* Write size is incremented an additional time on the detection of '\n'
+ * So we decrement it back again here. */
+ ptrUartSciDriver->writeSize--;
+ ptrUartSciDriver->writeCount++;
+ ptrUartSciDriver->writeCR = 0;
+ }
+ else
+ {
+ /* Add a return if next character is a newline. */
+ if (*(char *)ptrUartSciDriver->ptrWriteBuffer == CONST_LF)
+ {
+ ptrUartSciDriver->writeSize++;
+ ptrUartSciDriver->writeCR = 1;
+ }
+
+ /* Write the character to the transmit buffer: */
+ UartSci_putCh (ptrHwCfg->ptrSCIRegs, *(uint8_t*)ptrUartSciDriver->ptrWriteBuffer);
+
+ /* Move to the next character */
+ ptrUartSciDriver->ptrWriteBuffer = (uint8_t *)ptrUartSciDriver->ptrWriteBuffer + 1;
+ ptrUartSciDriver->writeSize--;
+ ptrUartSciDriver->writeCount++;
+ }
+ }
+ else
+ {
+ /* Binary Mode: */
+ UartSci_putCh (ptrHwCfg->ptrSCIRegs, *(uint8_t *)ptrUartSciDriver->ptrWriteBuffer);
+
+ /* Move to the next character */
+ ptrUartSciDriver->ptrWriteBuffer = (uint8_t *)ptrUartSciDriver->ptrWriteBuffer + 1;
+ ptrUartSciDriver->writeSize--;
+ ptrUartSciDriver->writeCount++;
+ }
+}
+
+/**
+ * @b Description
+ * @n
+ * The function is used to read the character and place this into the
+ * read buffer.
+ *
+ * @param[in] ptrUartSciDriver
+ * Pointer to the UART Driver Instance
+ * @param[in] ptrHwCfg
+ * Pointer to the UART Driver Hardware configuration
+ *
+ * \ingroup UART_SCI_INTERNAL_FUNCTION
+ *
+ * @retval
+ * Not applicable
+ */
+static void UartSci_readChar
+(
+ UartSci_Driver* ptrUartSciDriver,
+ UartSci_HwCfg* ptrHwCfg
+)
+{
+ uint8_t readIn;
+
+ /* Read the char: */
+ readIn = UartSci_getCh (ptrHwCfg->ptrSCIRegs) >> ptrUartSciDriver->shiftJustification;
+
+ /* Is the UART Driver operating in TEXT/BINARY Mode? */
+ if (ptrUartSciDriver->params.readDataMode == UART_DATA_TEXT)
+ {
+ /* TEXT Mode: */
+ if (readIn == CONST_CR)
+ {
+ /* Do we need to echo character? */
+ if (ptrUartSciDriver->params.readEcho)
+ {
+ /* YES: Loop around and wait until TX is ready */
+ while (1)
+ {
+ if (UartSci_isTxFree(ptrHwCfg->ptrSCIRegs) == 1U)
+ {
+ UartSci_putCh (ptrHwCfg->ptrSCIRegs, CONST_CR);
+ break;
+ }
+ }
+ }
+ readIn = CONST_LF;
+ }
+ }
+
+ /* Do we need to echo character? */
+ if (ptrUartSciDriver->params.readEcho)
+ {
+ /* YES: Loop around and wait until TX is ready */
+ while (1)
+ {
+ if (UartSci_isTxFree(ptrHwCfg->ptrSCIRegs) == 1U)
+ {
+ UartSci_putCh (ptrHwCfg->ptrSCIRegs, readIn);
+ break;
+ }
+ }
+ }
+
+ /* Place the character into the receive buffer and increment the various counters */
+ *(uint8_t *)ptrUartSciDriver->ptrReadBuffer = readIn;
+ ptrUartSciDriver->ptrReadBuffer = (uint8_t *)ptrUartSciDriver->ptrReadBuffer + 1;
+ ptrUartSciDriver->readCount++;
+ ptrUartSciDriver->readSize--;
+
+ /* Is the read complete? */
+ if ((ptrUartSciDriver->params.readReturnMode == UART_RETURN_NEWLINE) && (readIn == CONST_LF))
+ {
+ /* YES: In return mode; NEWLINE we can stop the reception operation when we receive
+ * a new line character. */
+ ptrUartSciDriver->readSize = 0;
+ }
+}
+
+/**
+ * @b Description
+ * @n
+ * The function is the registered ISR for the UART SCI Driver.
+ *
+ * @param[in] arg
+ * Argument which is registered with the OS while registering
+ * the ISR
+ *
+ * \ingroup UART_SCI_INTERNAL_FUNCTION
+ *
+ * @retval
+ * Not applicable
+ */
+static void UartSci_ISR (uintptr_t arg)
+{
+ UART_Config* ptrUARTConfig;
+ UartSci_Driver* ptrUartSciDriver;
+ UartSci_HwCfg* ptrHwCfg;
+
+ /* Get the UART Configuration: */
+ ptrUARTConfig = (UART_Config*)arg;
+
+ /* Get the UART Driver Instance: */
+ ptrUartSciDriver = (UartSci_Driver*)ptrUARTConfig->object;
+
+ /* Get the hardware configuration: */
+ ptrHwCfg = (UartSci_HwCfg*)ptrUARTConfig->hwAttrs;
+
+ /* Increment the total number of interrupts received. */
+ ptrUartSciDriver->stats.totalInterrupts++;
+
+ /* Are receive interrupts enabled? Only then do we handle them in the ISR context. */
+ if (UartSci_isRxInterruptEnabled (ptrHwCfg->ptrSCIRegs) == 1U)
+ {
+ /* Increment the total number of receive interrupts: */
+ ptrUartSciDriver->stats.numRxInterrupts++;
+
+ /* Is there a Rx Interrupt? */
+ if (UartSci_isRxFree(ptrHwCfg->ptrSCIRegs) == 1U)
+ {
+ /* YES: Do we have a valid data buffer where we need to place the data? */
+ if (ptrUartSciDriver->readSize > 0)
+ {
+ /* Read the character: */
+ UartSci_readChar (ptrUartSciDriver, ptrHwCfg);
+
+ /* Sanity Check: The read size can never be negative */
+ UART_osalAssert (ptrUartSciDriver->readSize >= 0);
+
+ /* Are we done with the read buffer ? */
+ if (ptrUartSciDriver->readSize == 0)
+ {
+ /* Disable RX interrupt until we do a new read */
+ UartSci_disableRxInterrupt(ptrHwCfg->ptrSCIRegs);
+ UartSci_callback((UART_Handle)arg, true);
+ }
+ }
+ else
+ {
+ /* We received a character but there was no application provided buffer. We
+ * cannot keep this. */
+ ptrUartSciDriver->stats.numDummyRead++;
+
+ /* Dummy read and drop the received character */
+ UartSci_getCh (ptrHwCfg->ptrSCIRegs);
+ }
+ }
+ }
+
+ /* Are transmit interrupts enabled? Only then do we handle them in the ISR context. */
+ if (UartSci_isTxInterruptEnabled (ptrHwCfg->ptrSCIRegs) == 1U)
+ {
+ /* Increment the total number of transmit interrupts: */
+ ptrUartSciDriver->stats.numTxInterrupts++;
+
+ /* Is there a Tx Interrupt? */
+ if (UartSci_isTxFree(ptrHwCfg->ptrSCIRegs) == 1U)
+ {
+ /* YES: Is there any data which needs to be written? */
+ if (ptrUartSciDriver->writeSize > 0)
+ {
+ /* Write the character: */
+ UartSci_writeChar (ptrUartSciDriver, ptrHwCfg);
+
+ /* Sanity Check: The write size can never be negative */
+ UART_osalAssert (ptrUartSciDriver->writeSize >= 0);
+
+ /* Are we done with the write buffer ? */
+ if (ptrUartSciDriver->writeSize <= 0)
+ {
+ /* Disable TX interrupt until we do a new write */
+ UartSci_disableTxInterrupt(ptrHwCfg->ptrSCIRegs);
+ UartSci_callback((UART_Handle)arg, false);
+ }
+ }
+ }
+ }
+
+ /* Is there an overrun error? */
+ if (UartSci_isRxOverrun(ptrHwCfg->ptrSCIRegs) == 1U)
+ {
+ /* Increment the number of overrun counter: */
+ ptrUartSciDriver->stats.numRxOverrunInterrupts++;
+
+ /* Clear the overrun status: */
+ UartSci_clearRxOverrun (ptrHwCfg->ptrSCIRegs);
+ }
+
+ /* Is there a framing error? */
+ if (UartSci_isFramingError(ptrHwCfg->ptrSCIRegs) == 1U)
+ {
+ /* Increment the stats: */
+ ptrUartSciDriver->stats.numFramingErrors++;
+
+ /* Clear the framing error: */
+ UartSci_clearFramingError (ptrHwCfg->ptrSCIRegs);
+ }
+
+ /* Is there a parity error? */
+ if (UartSci_isParityError(ptrHwCfg->ptrSCIRegs) == 1U)
+ {
+ /* Increment the stats: */
+ ptrUartSciDriver->stats.numParityError++;
+
+ /* Clear the parity error: */
+ UartSci_clearParityError (ptrHwCfg->ptrSCIRegs);
+ }
+ return;
+}
+
+/**
+ * @b Description
+ * @n
+ * The function is the registered callback function which is invoked when
+ * the data is to be read from the UART Driver. This function implements
+ * a semaphore blocking operation if the UART driver instance is configured
+ * to operate in BLOCKING mode.
+ *
+ * @param[in] handle
+ * Handle to the UART Driver
+ * @param[in] buffer
+ * Pointer to the data buffer
+ * @param[in] size
+ * Size of the data which needs to be read
+ *
+ * \ingroup UART_SCI_INTERNAL_FUNCTION
+ *
+ * @retval
+ * Success - Number of bytes which have been read
+ * @retval
+ * Error - UART Error code
+ */
+static int32_t UartSci_read(UART_Handle handle, void *buffer, size_t size)
+{
+ UART_Config* ptrUARTConfig;
+ UartSci_Driver* ptrUartSciDriver;
+ UartSci_HwCfg* ptrHwCfg;
+ uintptr_t key;
+ SemaphoreP_Status status;
+ int32_t retVal = 0;
+
+ /* Get the UART Configuration: */
+ ptrUARTConfig = (UART_Config*)handle;
+
+ /* Get the UART Driver Instance: */
+ ptrUartSciDriver = (UartSci_Driver*)ptrUARTConfig->object;
+
+ /* Get the hardware configuration: */
+ ptrHwCfg = (UartSci_HwCfg*)ptrUARTConfig->hwAttrs;
+
+ /* Sanity Check: Validate the arguments */
+ if ((size == 0U) || (buffer == NULL) || (ptrHwCfg->duplexity == UartSci_Duplexity_TX_ONLY))
+ {
+ /* Error: Invalid Arguments */
+ retVal = UART_EINVAL;
+ goto exit;
+ }
+
+ if(ptrHwCfg->swCfg.enableInterrupt)
+ {
+ /* Disable preemption while checking if the uart is in use. */
+ key = UART_osalHardwareIntDisable();
+
+ /* Is the UART in use? */
+ if (ptrUartSciDriver->readSize != 0U)
+ {
+ /* YES: Restore the interrupts and report the error to the application. */
+ UART_osalHardwareIntRestore(key);
+ UART_drv_log1 ("UART:(%p) Could not read data, UART in use\n", ptrHwCfg->ptrSCIRegs);
+ retVal = UART_EINUSE;
+ goto exit;
+ }
+
+ /* Save the data to be read */
+ ptrUartSciDriver->ptrReadBuffer = (uint8_t *)buffer;
+ ptrUartSciDriver->readSize = (int32_t)size;
+ ptrUartSciDriver->readCount = 0;
+
+ /* Restore the interrupts: */
+ UART_osalHardwareIntRestore(key);
+
+#ifdef UART_DMA_ENABLE
+ /* Determine the DMA Mode for the Driver: */
+ if (ptrUartSciDriver->isDMAEnabled == true)
+ {
+ /****************************************************************
+ * DMA Mode: Initiate the Receive DMA
+ ****************************************************************/
+ retVal = ptrHwCfg->initiateRxDMAFxn (ptrUartSciDriver, (uint32_t)buffer, (uint32_t)size, false);
+ if (retVal < 0)
+ {
+ /* Error: Unable to initiate the receive DMA */
+ goto exit;
+ }
+ }
+ else
+#endif
+ {
+ /****************************************************************
+ * Normal Mode: Enable the receive interrupt
+ ****************************************************************/
+ UartSci_enableRxInterrupt (ptrHwCfg->ptrSCIRegs);
+ }
+
+ if (ptrUartSciDriver->params.readMode == UART_MODE_BLOCKING)
+ {
+ /* Block the callee; till the UART reads are complete */
+ status = UART_osalPendLock (ptrUartSciDriver->readSem, ptrUartSciDriver->params.readTimeout);
+ if (status == SemaphoreP_TIMEOUT)
+ {
+ /* Reset the read size */
+ ptrUartSciDriver->readSize = 0;
+
+ /* Report the error condition: */
+ UART_drv_log2 ("UART:(%p) Read timed out %d bytes read\n",
+ ptrHwCfg->ptrSCIRegs, ptrUartSciDriver->readCount);
+ }
+
+ /* Setup the number of bytes which have been read */
+ retVal = ptrUartSciDriver->readCount;
+ }
+ else
+ {
+ /*
+ * for callback mode, immediately return SUCCESS,
+ * once the transaction is done, callback function
+ * will return the transaction status and actual
+ * read count
+ */
+ retVal = UART_SUCCESS;
+ }
+ }
+ else
+ {
+ retVal = UartSci_readPolling(handle, buffer, size);
+ }
+
+exit:
+ return retVal;
+}
+
+/**
+ * @b Description
+ * @n
+ * The function is the registered callback function which is invoked when
+ * the data is to be read in polling mode from the UART Driver. The function
+ * will loop around till all the buffer is completely filled up or if the new
+ * line character is received.
+ *
+ * @param[in] handle
+ * Handle to the UART Driver
+ * @param[in] buffer
+ * Pointer to the data buffer
+ * @param[in] size
+ * Size of the data which needs to be read
+ *
+ * \ingroup UART_SCI_INTERNAL_FUNCTION
+ *
+ * @retval
+ * Success - Number of bytes which have been read
+ * @retval
+ * Error - UART Error code
+ */
+static int32_t UartSci_readPolling(UART_Handle handle, void *buffer, size_t size)
+{
+ UART_Config* ptrUARTConfig;
+ UartSci_Driver* ptrUartSciDriver;
+ UartSci_HwCfg* ptrHwCfg;
+ uintptr_t key;
+ int32_t retVal;
+
+ /* Get the UART Configuration: */
+ ptrUARTConfig = (UART_Config*)handle;
+
+ /* Get the UART Driver Instance: */
+ ptrUartSciDriver = (UartSci_Driver*)ptrUARTConfig->object;
+
+ /* Get the hardware configuration: */
+ ptrHwCfg = (UartSci_HwCfg*)ptrUARTConfig->hwAttrs;
+
+ /* Sanity Check: Validate the arguments */
+ if ((size == 0U) || (buffer == NULL) || (ptrHwCfg->duplexity == UartSci_Duplexity_TX_ONLY))
+ {
+ /* Error: Invalid Arguments */
+ retVal = UART_EINVAL;
+ goto exit;
+ }
+
+ /* Disable preemption while checking if the uart is in use. */
+ key = UART_osalHardwareIntDisable();
+
+ /* Is the UART in use? */
+ if (ptrUartSciDriver->readSize != 0)
+ {
+ /* YES: Restore the interrupts */
+ UART_osalHardwareIntRestore(key);
+
+ /* Report the error to the application. */
+ UART_drv_log1 ("UART:(%p) Could not read data, UART in use\n", ptrHwCfg->ptrSCIRegs);
+
+ /* Setup the error code: */
+ retVal = UART_EINUSE;
+ goto exit;
+ }
+
+ /* Save the data to be read */
+ ptrUartSciDriver->ptrReadBuffer = (uint8_t *)buffer;
+ ptrUartSciDriver->readSize = (int32_t)size;
+ ptrUartSciDriver->readCount = 0;
+
+ /* Restore the interrupts: */
+ UART_osalHardwareIntRestore(key);
+
+#ifdef UART_DMA_ENABLE
+ /* Determine the DMA Mode for the Driver: */
+ if (ptrUartSciDriver->isDMAEnabled == true)
+ {
+ /****************************************************************
+ * DMA Mode: Initiate the Receive DMA
+ ****************************************************************/
+ retVal = ptrHwCfg->initiateRxDMAFxn (ptrUartSciDriver, (uint32_t)buffer, size, true);
+ if (retVal < 0)
+ {
+ /* Error: Unable to initiate the receive DMA */
+ goto exit;
+ }
+ }
+ else
+#endif
+ {
+ /****************************************************************
+ * Normal Mode: Read out all the data
+ ****************************************************************/
+ bool isWaitForever = (ptrUartSciDriver->params.readTimeout == UART_WAIT_FOREVER);
+ uint64_t timeout = ptrUartSciDriver->params.readTimeout * 1000;
+
+ while (ptrUartSciDriver->readSize > 0)
+ {
+ /* Is the receiver free? */
+ if (UartSci_isRxFree(ptrHwCfg->ptrSCIRegs) == 1U)
+ {
+ /* YES: Read out a character from the buffer. */
+ UartSci_readChar (ptrUartSciDriver, ptrHwCfg);
+ }
+ else if (timeout < 10)
+ {
+ /* Debug Message: */
+ UART_drv_log2 ("Debug: UART(%p) readPolling timeout %d bytes have been read\n",
+ ptrHwCfg->ptrSCIRegs, ptrUartSciDriver->readCount);
+ break;
+ }
+ else if (!isWaitForever)
+ {
+ Uartsci_usDelay(10);
+ timeout -= 10;
+ }
+ }
+ }
+
+ /* Setup the number of bytes which have been read */
+ retVal = ptrUartSciDriver->readCount;
+
+exit:
+ return retVal;
+}
+
+/**
+ * @b Diption
+ * @n
+ * function is the registered callback function which is invoked when
+ * a previous data read operation has to be cancelled.
+ *
+ * @parn] handle
+ * le to the UART Driver
+ *
+ * \ing UART_SCI_INTERNAL_FUNCTION
+ *
+ * @ret
+ * applicable
+ */
+static void UartSci_readCancel(UART_Handle handle)
+{
+ UART_Config* ptrUARTConfig;
+ UartSci_Driver* ptrUartSciDriver;
+ UartSci_HwCfg* ptrHwCfg;
+ uintptr_t key;
+
+ /* Get the UART Configuration: */
+ ptrUARTConfig = (UART_Config*)handle;
+
+ /* Get the UART Driver Instance: */
+ ptrUartSciDriver = (UartSci_Driver*)ptrUARTConfig->object;
+
+ /* Get the hardware configuration: */
+ ptrHwCfg = (UartSci_HwCfg*)ptrUARTConfig->hwAttrs;
+
+ /* Disable preemption while checking if the uart is in use. */
+ key = UART_osalHardwareIntDisable();
+
+ /* Is the UART in use? */
+ if (ptrUartSciDriver->readSize == 0)
+ {
+ /* No: There is nothing to cancel */
+ UART_osalHardwareIntRestore(key);
+ }
+ else
+ {
+ /* YES: Reset the read size to 0; this will stop the read operations */
+ ptrUartSciDriver->readSize = 0;
+
+ /* Determine the DMA Mode for the Driver: */
+ if (ptrUartSciDriver->isDMAEnabled == true)
+ {
+ /****************************************************************
+ * DMA Mode: Disable the Rx DMA
+ ****************************************************************/
+ UartSci_disableRxDMA (ptrHwCfg->ptrSCIRegs);
+ }
+ else
+ {
+ /****************************************************************
+ * Normal Mode: Disable the Rx interrupt
+ ****************************************************************/
+ UartSci_disableRxInterrupt (ptrHwCfg->ptrSCIRegs);
+ }
+
+ /* Restore the interrupts: */
+ UART_osalHardwareIntRestore(key);
+
+ UartSci_callback(handle, true);
+
+ /* Debug Message: */
+ UART_drv_log2 ("Debug: UART(%p) read canceled %d bytes have been read\n",
+ ptrHwCfg->ptrSCIRegs, ptrUartSciDriver->readCount);
+ }
+ return;
+}
+
+/**
+ * @b Description
+ * @n
+ * The function is the registered callback function which is invoked when
+ * the data is to be written to the UART Driver. This function implements
+ * a semaphore blocking operation if the UART driver instance is configured
+ * to operate in BLOCKING mode.
+ *
+ * @param[in] handle
+ * Handle to the UART Driver
+ * @param[in] buffer
+ * Pointer to the data buffer
+ * @param[in] size
+ * Size of the data to be written
+ *
+ * \ingroup UART_SCI_INTERNAL_FUNCTION
+ *
+ * @retval
+ * Success - Number of bytes which have been transferred
+ * @retval
+ * Error - UART Error code
+ */
+static int32_t UartSci_write(UART_Handle handle, const void *buffer, size_t size)
+{
+ UART_Config* ptrUARTConfig;
+ UartSci_Driver* ptrUartSciDriver;
+ UartSci_HwCfg* ptrHwCfg;
+ SemaphoreP_Status status;
+ uintptr_t key;
+ int32_t retVal = 0;
+
+ /* Sanity Check: Validate the arguments */
+ if ((size == 0U) || (buffer == NULL))
+ {
+ /* Error: Invalid Arguments */
+ retVal = UART_EINVAL;
+ goto exit;
+ }
+
+ /* Get the UART Configuration: */
+ ptrUARTConfig = (UART_Config*)handle;
+
+ /* Get the UART Driver Instance: */
+ ptrUartSciDriver = (UartSci_Driver*)ptrUARTConfig->object;
+
+ /* Get the hardware configuration: */
+ ptrHwCfg = (UartSci_HwCfg*)ptrUARTConfig->hwAttrs;
+
+ if(ptrHwCfg->swCfg.enableInterrupt)
+ {
+ /* Disable preemption while checking if the uart is in use. */
+ key = UART_osalHardwareIntDisable();
+
+ /* Is the UART in use? */
+ if (ptrUartSciDriver->writeSize != 0)
+ {
+ /* YES: Restore the interrupts */
+ UART_osalHardwareIntRestore(key);
+
+ /* Log the error to the application: */
+ UART_drv_log1 ("UART:(%p) Could not write data, UART in use\n", (void *)ptrHwCfg->ptrSCIRegs);
+
+ /* Setup the error code: */
+ retVal = UART_EINUSE;
+ goto exit;
+ }
+
+ /* NO: Save the data to be written */
+ ptrUartSciDriver->ptrWriteBuffer = (uint8_t *)buffer;
+ ptrUartSciDriver->writeSize = (int32_t)size;
+ ptrUartSciDriver->writeCount = 0;
+
+ /* Restore the interrupts: */
+ UART_osalHardwareIntRestore(key);
+
+#ifdef UART_DMA_ENABLE
+ /* Determine the DMA Mode for the Driver: */
+ if (ptrUartSciDriver->isDMAEnabled == true)
+ {
+ /****************************************************************
+ * DMA Mode: Initiate the transmit DMA
+ ****************************************************************/
+ retVal = ptrHwCfg->initiateTxDMAFxn (ptrUartSciDriver, (uint32_t)buffer, (uint32_t)size, false);
+ if (retVal < 0)
+ {
+ /* Error: Unable to initiate the transmit DMA */
+ goto exit;
+ }
+ }
+ else
+#endif
+ {
+ /****************************************************************
+ * Normal Mode: We always need to send out the first character
+ * because the Transmit interrupt is only generated after the
+ * first transfer from the TD to the TXSHF
+ ****************************************************************/
+ UartSci_writeChar(ptrUartSciDriver, ptrHwCfg);
+
+ /* Do we have more data to send? */
+ if (ptrUartSciDriver->writeSize == 0U)
+ {
+ /* NO: This is the case where there is only 1 byte of data to be
+ * sent out. Setup the return value and we are done. */
+ retVal = ptrUartSciDriver->writeCount;
+ goto exit;
+ }
+
+ /* Enable the Transmit Interrupt: */
+ UartSci_enableTxInterrupt (ptrHwCfg->ptrSCIRegs);
+ }
+
+ if (ptrUartSciDriver->params.writeMode == UART_MODE_BLOCKING)
+ {
+ /* Block the callee; till the UART writes are complete */
+ status = UART_osalPendLock (ptrUartSciDriver->writeSem, ptrUartSciDriver->params.writeTimeout);
+ if (status == SemaphoreP_TIMEOUT)
+ {
+ /* Time out: Write has not been completed in the specified duration
+ * Disable the transmit interrupt */
+ UartSci_disableTxInterrupt (ptrHwCfg->ptrSCIRegs);
+
+ /* Reset the write size */
+ ptrUartSciDriver->writeSize = 0;
+
+ /* Report the error condition: */
+ UART_drv_log2 ("UART:(%p) Write timed out %d bytes written\n",
+ (void *)ptrHwCfg->ptrSCIRegs, ptrUartSciDriver->writeCount);
+ }
+
+ /* Return the number of bytes which have been sent out. */
+ retVal = ptrUartSciDriver->writeCount;
+ }
+ else
+ {
+ /*
+ * for callback mode, immediately return SUCCESS,
+ * once the transaction is done, callback function
+ * will return the transaction status and actual
+ * write count
+ */
+ retVal = UART_SUCCESS;
+ }
+ }
+ else
+ {
+ retVal = UartSci_writePolling(handle, buffer, size);
+ }
+
+exit:
+ return retVal;
+}
+
+/**
+ * @b Description
+ * @n
+ * The function is the registered callback function which is invoked when
+ * the data is to be written to the UART Driver but this will poll the UART
+ * driver in a while loop and will only return once all the data has been
+ * sent out.
+ *
+ * @param[in] handle
+ * Handle to the UART Driver
+ * @param[in] buffer
+ * Pointer to the data buffer
+ * @param[in] size
+ * Size of the data to be written
+ *
+ * \ingroup UART_SCI_INTERNAL_FUNCTION
+ *
+ * @retval
+ * Success - Number of bytes which have been transferred
+ * @retval
+ * Error - UART Error code
+ */
+static int32_t UartSci_writePolling(UART_Handle handle, const void* buffer, size_t size)
+{
+ UART_Config* ptrUARTConfig;
+ UartSci_Driver* ptrUartSciDriver;
+ UartSci_HwCfg* ptrHwCfg;
+ uintptr_t key;
+ int32_t retVal = 0;
+
+ /* Sanity Check: Validate the arguments */
+ if ((size == 0U) || (buffer == NULL))
+ {
+ /* Error: Invalid Arguments */
+ retVal = UART_EINVAL;
+ goto exit;
+ }
+
+ /* Get the UART Configuration: */
+ ptrUARTConfig = (UART_Config*)handle;
+
+ /* Get the UART Driver Instance: */
+ ptrUartSciDriver = (UartSci_Driver*)ptrUARTConfig->object;
+
+ /* Get the hardware configuration: */
+ ptrHwCfg = (UartSci_HwCfg*)ptrUARTConfig->hwAttrs;
+
+ /* Disable preemption while checking if the uart is in use. */
+ key = UART_osalHardwareIntDisable();
+
+ /* Is the UART in use? */
+ if (ptrUartSciDriver->writeSize != 0)
+ {
+ /* YES: Restore the interrupts and report the error to the application. */
+ UART_osalHardwareIntRestore(key);
+ UART_drv_log1 ("UART:(%p) Could not write data, UART in use\n", (void *)ptrHwCfg->ptrSCIRegs);
+
+ /* Setup the error code: */
+ retVal = UART_EINUSE;
+ goto exit;
+ }
+
+ /* NO: Save the data to be written */
+ ptrUartSciDriver->ptrWriteBuffer = (uint8_t*)buffer;
+ ptrUartSciDriver->writeSize = (int32_t)size;
+ ptrUartSciDriver->writeCount = 0U;
+
+ /* Restore the interrupts: */
+ UART_osalHardwareIntRestore(key);
+
+#ifdef UART_DMA_ENABLE
+ /* Determine the DMA Mode for the Driver: */
+ if (ptrUartSciDriver->isDMAEnabled == true)
+ {
+ /****************************************************************
+ * DMA Mode: Initiate the transmit DMA
+ ****************************************************************/
+ retVal = ptrHwCfg->initiateTxDMAFxn (ptrUartSciDriver, (uint32_t)buffer, (uint32_t)size, true);
+ if (retVal < 0)
+ {
+ /* Error: Unable to initiate the transmit DMA. The return value
+ * is already setup with the error code. */
+ goto exit;
+ }
+ }
+ else
+#endif
+ {
+ /****************************************************************
+ * Normal Mode: Write the data out one by one
+ ****************************************************************/
+ bool isWaitForever = (ptrUartSciDriver->params.writeTimeout == UART_WAIT_FOREVER);
+ uint64_t timeout = ptrUartSciDriver->params.writeTimeout * 1000;
+
+ /* Send out all the data: */
+ while (ptrUartSciDriver->writeSize > 0)
+ {
+ /* Is the transmitter free? */
+ if (UartSci_isTxFree(ptrHwCfg->ptrSCIRegs) == 1U)
+ {
+ /* YES: Write out a character from the buffer. */
+ UartSci_writeChar (ptrUartSciDriver, ptrHwCfg);
+ }
+ else if (timeout < 10)
+ {
+ /* Debug Message: */
+ UART_drv_log2 ("Debug: UART(%p) writePolling timeout %d bytes have been read\n",
+ ptrHwCfg->ptrSCIRegs, ptrUartSciDriver->writeCount);
+ break;
+ }
+ else if (!isWaitForever)
+ {
+ Uartsci_usDelay(10);
+ timeout -= 10;
+ }
+ }
+ }
+
+ /* Setup the number of bytes which have been written */
+ retVal = ptrUartSciDriver->writeCount;
+
+exit:
+ return retVal;
+}
+
+/**
+ * @b Description
+ * @n
+ * The function is the registered callback function which is invoked
+ * when the UART Driver write operations are ben canceled.
+ *
+ * @param[in] handle
+ * Handle to the UART Driver
+ *
+ * \ingroup UART_SCI_INTERNAL_FUNCTION
+ *
+ * @retval
+ * Not applicable
+ */
+static void UartSci_writeCancel(UART_Handle handle)
+{
+ UART_Config* ptrUARTConfig;
+ UartSci_Driver* ptrUartSciDriver;
+ UartSci_HwCfg* ptrHwCfg;
+ uintptr_t key;
+
+ /* Get the UART Configuration: */
+ ptrUARTConfig = (UART_Config*)handle;
+
+ /* Get the UART Driver Instance: */
+ ptrUartSciDriver = (UartSci_Driver*)ptrUARTConfig->object;
+
+ /* Get the hardware configuration: */
+ ptrHwCfg = (UartSci_HwCfg*)ptrUARTConfig->hwAttrs;
+
+ /* Disable preemption while checking if the uart is in use. */
+ key = UART_osalHardwareIntDisable();
+
+ /* Is the UART in use? */
+ if (ptrUartSciDriver->writeSize == 0)
+ {
+ /* NO: Restore the interrupts and report the error to the application. */
+ UART_osalHardwareIntRestore(key);
+ }
+ else
+ {
+ /* Set the write size to 0; this will prevent any more characters from being
+ * transmitted. */
+ ptrUartSciDriver->writeSize = 0;
+
+ /* Determine the DMA Mode for the Driver: */
+ if (ptrUartSciDriver->isDMAEnabled == true)
+ {
+ /* DMA Mode: Disable the Tx DMA */
+ UartSci_disableTxDMA (ptrHwCfg->ptrSCIRegs);
+ }
+ else
+ {
+ /* Normal Mode: Disable the Tx interrupt: */
+ UartSci_disableTxInterrupt (ptrHwCfg->ptrSCIRegs);
+ }
+
+ /* Restore the interrupts: */
+ UART_osalHardwareIntRestore(key);
+
+ /* We have cancelled the write operation. Invoke post-write operation */
+ UartSci_callback(handle, false);
+
+ /* Debug Message: */
+ UART_drv_log2 ("Debug: UART(%p) write canceled %d bytes have been written\n",
+ (void *)ptrHwCfg->ptrSCIRegs, ptrUartSciDriver->writeCount);
+ }
+ return;
+}
+
+/**
+ * @b Description
+ * @n
+ * The function is the registered callback function which is invoked when
+ * the UART Driver instance is being passed a control command.
+ *
+ * @param[in] handle
+ * Handle to the UART Driver
+ * @param[in] cmd
+ * UART command
+ * @param[in] arg
+ * Opaque handle to the argument
+ *
+ * \ingroup UART_SCI_INTERNAL_FUNCTION
+ *
+ * @retval
+ * Success - 0
+ * @retval
+ * Error - UART Error code
+ */
+static int32_t UartSci_control(UART_Handle handle, uint32_t cmd, void *arg)
+{
+ UART_Config* ptrUARTConfig;
+ UartSci_Driver* ptrUartSciDriver;
+ UartSci_HwCfg* ptrHwCfg;
+ int32_t errCode;
+
+ /* Initialize and setup the error code: */
+ errCode = 0;
+
+ /* Get the UART Configuration: */
+ ptrUARTConfig = (UART_Config*)handle;
+
+ /* Get the UART Driver Instance: */
+ ptrUartSciDriver = (UartSci_Driver*)ptrUARTConfig->object;
+
+ /* Get the hardware configuration: */
+ ptrHwCfg = (UartSci_HwCfg*)ptrUARTConfig->hwAttrs;
+
+ /* Processing is done on the basis of the command: */
+ switch (cmd)
+ {
+ case UART_CMD_LOOPBACK:
+ {
+ uint32_t* loopback;
+
+ /* Sanity Check: We need to ensure that a valid argument was passed */
+ if (arg == NULL)
+ {
+ /* Error: No valid argument was passed. */
+ errCode = UART_EINVAL;
+ }
+ else
+ {
+ /* Get the loopback status from the argument */
+ loopback = (uint32_t*)arg;
+ UartSci_loopbackControl(ptrHwCfg->ptrSCIRegs, *loopback);
+ }
+ break;
+ }
+ case UART_CMD_GET_STATS:
+ {
+ UART_Stats* ptrUARTStats;
+
+ /* Sanity Check: We need to ensure that a valid argument was passed */
+ if (arg == NULL)
+ {
+ /* Error: No valid argument was passed. */
+ errCode = UART_EINVAL;
+ }
+ else
+ {
+ /* Get the pointer to the UART statistics */
+ ptrUARTStats = (UART_Stats*)arg;
+
+ /* Copy over the UART statistics */
+ memcpy ((void*)ptrUARTStats, (void*)&ptrUartSciDriver->stats, sizeof(UART_Stats));
+ }
+ break;
+ }
+ default:
+ {
+ /* Error: Unsuported/Invalid command specified */
+ errCode = UART_EINVAL;
+ break;
+ }
+ }
+ return errCode;
+}
+
+/**
+ * @b Description
+ * @n
+ * The function is used to validate the arguments
+ *
+ * @param[in] params
+ * UART Parameters to be validated
+ * @param[in] ptrHwCfg
+ * Pointer to the hardware configuration
+ *
+ * \ingroup UART_SCI_INTERNAL_FUNCTION
+ *
+ * @retval
+ * Success - 0
+ * @retval
+ * Error - <0
+ */
+static int32_t UartSci_validateParams (const UART_Params* params, UartSci_HwCfg* ptrHwCfg)
+{
+ int32_t retVal = 0;
+
+ /* Sanity Check: The current implementation of the UART Driver currently only supports
+ * NONE, ODD and EVEN Parity. */
+ if (params->parityType >= UART_PAR_ZERO)
+ {
+ retVal = -1;
+ }
+
+ /* Sanity Check: The current implementation of the UART Driver currently only supports
+ * 5/6/7/8-bit data length. */
+ if (params->dataLength > UART_LEN_8)
+ {
+ retVal = -1;
+ }
+
+ /* Sanity Check: Ensure that the clock frequency is NON-Zero. */
+ if ((params->baudRate == 0) || (ptrHwCfg->swCfg.clockFrequency == 0))
+ {
+ retVal = -1;
+ }
+
+ /* Sanity Check: Ensure the callback function is provided at callback mode. */
+ if (((params->readMode == UART_MODE_CALLBACK) && (params->readCallback == NULL)) ||
+ ((params->writeMode == UART_MODE_CALLBACK) && (params->writeCallback == NULL)))
+ {
+ retVal = -1;
+ }
+
+ return retVal;
+}
+
+/**
+ * @b Description
+ * @n
+ * The function is the registered callback function which is invoked when
+ * the UART Driver instance is being opened with a specific application
+ * supplied arguments.
+ *
+ * @param[in] handle
+ * Handle to the UART Driver
+ * @param[in] params
+ * UART Parameters with which the driver is being opened
+ *
+ * \ingroup UART_SCI_INTERNAL_FUNCTION
+ *
+ * @retval
+ * Success - Driver Handle
+ * @retval
+ * Error - NULL
+ */
+static UART_Handle UartSci_open(UART_Handle handle, const UART_Params* params)
+{
+ UART_Config* ptrUARTConfig;
+ UartSci_Driver* ptrUartSciDriver;
+ SemaphoreP_Params semParams;
+ OsalRegisterIntrParams_t interruptRegParams;
+ UartSci_HwCfg* ptrHwCfg;
+ UART_Handle retHandle = NULL;
+ CSL_sciRegs* ptrSCIRegs;
+ UART_SCI_CONFIG sciConfig;
+ uint32_t val32;
+ int32_t ret;
+
+ /* Get the UART Configuration: */
+ ptrUARTConfig = (UART_Config*)handle;
+
+ /* Get the hardware configuration: */
+ ptrHwCfg = (UartSci_HwCfg*)ptrUARTConfig->hwAttrs;
+
+ ptrUartSciDriver = (UartSci_Driver*)ptrUARTConfig->object;
+
+ /* Sanity Check: Validate the arguments */
+ if (UartSci_validateParams(params, ptrHwCfg) < 0)
+ {
+ /* Error: Invalid arguments have been passed to the driver */
+ UART_drv_log1 ("Debug: UART Driver (%p) Invalid arguments\n", (void *)ptrHwCfg->ptrSCIRegs);
+ goto exit;
+ }
+
+ /* Initialize the memory: */
+ memset ((void *)ptrUartSciDriver, 0, sizeof(UartSci_Driver));
+
+ /* Copy over the UART Parameters */
+ memcpy ((void*)&ptrUartSciDriver->params, (void *)params, sizeof(UART_Params));
+ ptrUartSciDriver->handle = handle;
+
+#ifdef UART_DMA_ENABLE
+ /* Open the DMA Block associated with the UART Instance */
+ if (ptrHwCfg->openDMAFxn (ptrUartSciDriver, ptrHwCfg) < 0)
+ {
+ /* Error: Unable to open the DMA Block. */
+ UART_drv_log1 ("Error: UART Driver (%p) Unable to open the DMA Block\n", (void *)ptrHwCfg->ptrSCIRegs);
+ goto exit;
+ }
+#endif
+
+ /* Create a binary semaphore which is used to handle the Blocking operation. */
+ UART_osalSemParamsInit(&semParams);
+ semParams.mode = SemaphoreP_Mode_BINARY;
+ ptrUartSciDriver->writeSem = UART_osalCreateBlockingLock(0, &semParams);
+
+ /* Create a binary semaphore which is used to handle the Blocking operation. */
+ UART_osalSemParamsInit(&semParams);
+ semParams.mode = SemaphoreP_Mode_BINARY;
+ ptrUartSciDriver->readSem = UART_osalCreateBlockingLock(0, &semParams);
+
+ ptrSCIRegs = ptrHwCfg->ptrSCIRegs;
+ /* Enable the SCI Module: */
+ UartSci_enable(ptrSCIRegs);
+
+ /* Put the SCI Module in Software Reset State: */
+ UartSci_enableSwReset(ptrSCIRegs);
+
+ /* Disable the interrupts: */
+ UartSci_disableAllInterrupts (ptrSCIRegs);
+ UartSci_clearAllInterruptLevels (ptrSCIRegs);
+
+ /* Setup the SCI Global Control Register:
+ * - Receiver Enabled
+ * - Transmit Enabled
+ * - Internal Clock
+ * - Asynchronous Timing Mode
+ * - Idle-line Communication mode
+ */
+ sciConfig.rxEn = 1U;
+ sciConfig.txEn = 1U;
+ sciConfig.clkMode = UARTSCI_CLOCK_MODE_INTERNAL;
+ sciConfig.timingMode = UARTSCI_TIMING_MODE_ASYNC;
+ sciConfig.commMode = UARTSCI_COMM_MODE_IDLE;
+
+ /* Setup the Stop Bits: */
+ if (params->stopBits == UART_STOP_ONE)
+ {
+ sciConfig.stopBits = UARTSCI_FORMAT_STOPBIT_ONE;
+ }
+ else
+ {
+ sciConfig.stopBits = UARTSCI_FORMAT_STOPBIT_ONE;
+ }
+
+ /* Setup the Parity: */
+ switch (params->parityType)
+ {
+ case UART_PAR_NONE:
+ {
+ sciConfig.parityType = UARTSCI_FORMAT_PARITY_NONE;
+ break;
+ }
+ case UART_PAR_EVEN:
+ {
+ sciConfig.parityType = UARTSCI_FORMAT_PARITY_EVEN;
+ break;
+ }
+ case UART_PAR_ODD:
+ {
+ sciConfig.parityType = UARTSCI_FORMAT_PARITY_ODD;
+ break;
+ }
+ default:
+ {
+ /* Error: We have already verified the parameters. Control should never come here. */
+ UART_osalAssert (0);
+ break;
+ }
+ }
+
+ /* Setup the Baud Rate: */
+ sciConfig.clockFrequency = ptrHwCfg->swCfg.clockFrequency;
+ sciConfig.baudRate = params->baudRate;
+
+ /* Setup the data length control: */
+ switch (params->dataLength)
+ {
+ case UART_LEN_5:
+ {
+ /* Data Length is 5 */
+ sciConfig.charLen = UARTSCI_FORMAT_CHAR_LEN_5;
+ ptrUartSciDriver->shiftJustification = 3U;
+ break;
+ }
+ case UART_LEN_6:
+ {
+ /* Data Length is 6 */
+ sciConfig.charLen = UARTSCI_FORMAT_CHAR_LEN_6;
+ ptrUartSciDriver->shiftJustification = 2U;
+ break;
+ }
+ case UART_LEN_7:
+ {
+ /* Data Length is 7 */
+ sciConfig.charLen = UARTSCI_FORMAT_CHAR_LEN_7;
+ ptrUartSciDriver->shiftJustification = 1U;
+ break;
+ }
+ case UART_LEN_8:
+ {
+ /* Data Length is 8 */
+ sciConfig.charLen = UARTSCI_FORMAT_CHAR_LEN_8;
+ ptrUartSciDriver->shiftJustification = 0U;
+ break;
+ }
+ default:
+ {
+ /* Error: We have already verified the parameters. Control should never come here. */
+ UART_osalAssert (0);
+ break;
+ }
+ }
+
+ if (ptrHwCfg->swCfg.loopback)
+ {
+ /* Enable Loopback: */
+ sciConfig.loopback = 1U;
+ }
+ else
+ {
+ /* Disable Loopback: */
+ sciConfig.loopback = 0U;
+ }
+
+ ret = UartSci_config (ptrSCIRegs, &sciConfig);
+ if (ret < 0)
+ {
+ UART_drv_log1 ("Error: UART Driver configure error with ret = %d\n", ret);
+ goto exit;
+ }
+
+ /* Enable the Interrupts:
+ * - Framing Error
+ * - Overrun Error
+ * - Parity Error */
+ val32 = UARTSCI_INT_BITMAP_FE |
+ UARTSCI_INT_BITMAP_OE |
+ UARTSCI_INT_BITMAP_PE;
+ UartSci_enableInterrupts(ptrSCIRegs, val32);
+
+ /* Register the Interrupt Handler: */
+ if(ptrHwCfg->swCfg.enableInterrupt)
+ {
+ /* Construct Hwi object for this UART peripheral. */
+ /* Initialize with defaults */
+ Osal_RegisterInterrupt_initParams(&interruptRegParams);
+
+ /* Populate the interrupt parameters */
+ interruptRegParams.corepacConfig.arg=(uintptr_t)handle;
+ interruptRegParams.corepacConfig.name=(char *)"UART";
+ interruptRegParams.corepacConfig.isrRoutine=UartSci_ISR;
+#ifdef __TI_ARM_V7R4__
+ interruptRegParams.corepacConfig.priority=0x8U;
+ interruptRegParams.corepacConfig.intVecNum = (int32_t)(ptrHwCfg->interruptNum); /* Host Interrupt vector */
+#elif defined(_TMS320C6X)
+ interruptRegParams.corepacConfig.priority=0x20U;
+ interruptRegParams.corepacConfig.corepacEventNum = (int32_t)(ptrHwCfg->interruptNum); /* Event going to INTC */
+ interruptRegParams.corepacConfig.intVecNum = (int32_t)(OSAL_REGINT_INTVEC_EVENT_COMBINER); /* Host Interrupt vector */
+#endif
+
+ /* Register interrupts */
+ (void)UART_osalRegisterInterrupt(&interruptRegParams,&(ptrUartSciDriver->hwiHandle));
+
+ if(ptrUartSciDriver->hwiHandle)
+ {
+ UART_drv_log2 ("Debug: UART Driver Registering HWI ISR [%p] for Interrupt %d\n",
+ ptrUartSciDriver->hwiHandle, ptrHwCfg->interruptNum);
+ }
+ else
+ {
+ goto exit;
+ }
+ }
+
+ /* Start the SCI: */
+ UartSci_disableSwReset (ptrSCIRegs);
+
+ /* Mark the driver to be operational */
+ ptrUartSciDriver->status = UartSci_DriverStatus_OPERATIONAL;
+
+ /* Debug Message: */
+ UART_drv_log1 ("Debug: UART Driver %p opened\n", (void *)ptrHwCfg->ptrSCIRegs);
+
+ /* Setup the return handle */
+ retHandle = (UART_Handle)handle;
+
+exit:
+ return retHandle;
+}
+
+/**
+ * @b Description
+ * @n
+ * The function is the registered callback function which is invoked when
+ * the UART Driver instance is being closed
+ *
+ * @param[in] handle
+ * Handle to the UART Driver
+ *
+ * \ingroup UART_SCI_INTERNAL_FUNCTION
+ *
+ * @retval
+ * Not applicable
+ */
+static void UartSci_close(UART_Handle handle)
+{
+ UART_Config* ptrUARTConfig;
+ UartSci_Driver* ptrUartSciDriver;
+ UartSci_HwCfg* ptrHwCfg;
+
+ /* Get the UART Configuration: */
+ ptrUARTConfig = (UART_Config*)handle;
+
+ /* Get the UART Driver Instance: */
+ ptrUartSciDriver = (UartSci_Driver*)ptrUARTConfig->object;
+
+ /* Get the hardware configuration: */
+ ptrHwCfg = (UartSci_HwCfg*)ptrUARTConfig->hwAttrs;
+
+ /* Is the driver in use? */
+ if (ptrUartSciDriver->status == UartSci_DriverStatus_UNINITIALIZED)
+ {
+ /* Error: UART has alreay been closed */
+ UART_drv_log1 ("Error: UART Driver has already been closed\n", (void *)ptrHwCfg->ptrSCIRegs);
+ goto exit;
+ }
+
+ /* Disable the interrupts: */
+ UartSci_disableAllInterrupts(ptrHwCfg->ptrSCIRegs);
+
+ /* Was the HWI registered? */
+ if (ptrUartSciDriver->hwiHandle)
+ {
+ /* YES: Delete and unregister the interrupt handler. */
+ (void)UART_osalHardwareIntDestruct(ptrUartSciDriver->hwiHandle, (int32_t)(ptrHwCfg->interruptNum));
+ }
+
+ /* Was the UART Driver operating in Write Blocking mode? */
+ if (ptrUartSciDriver->writeSem)
+ {
+ /* YES: Delete the write semaphore */
+ UART_osalDeleteBlockingLock (ptrUartSciDriver->writeSem);
+ }
+
+ /* Was the UART Driver operating in Read Blocking mode? */
+ if (ptrUartSciDriver->readSem)
+ {
+ /* YES: Delete the read semaphore */
+ UART_osalDeleteBlockingLock (ptrUartSciDriver->readSem);
+ }
+
+#ifdef UART_DMA_ENABLE
+ /* Close the DMA block associated with the UART Instance */
+ ptrHwCfg->closeDMAFxn (ptrUartSciDriver);
+#endif
+ /* The driver is not in use: */
+ ptrUartSciDriver->status = UartSci_DriverStatus_UNINITIALIZED;
+
+exit:
+ return;
+}
+
+/**
+ * @b Description
+ * @n
+ * The function is the registered callback function which is invoked when
+ * the UART drivers are initialized.
+ *
+ * @param[in] handle
+ * Handle to the UART Driver which is to be initialized.
+ *
+ * \ingroup UART_SCI_INTERNAL_FUNCTION
+ *
+ * @retval
+ * Not applicable
+ */
+static void
+UartSci_init(UART_Handle handle)
+{
+ return;
+}
+
+/**
+ * @b Description
+ * @n
+ * The function is the registered callback function which is invoked when
+ * the UART driver invokes UART_read2() to receive data .
+ *
+ * @param[in] handle
+ * Handle to the UART Driver which is to be initialized.
+ *
+ * @param[in/out] uartTrans
+ * A pointer to a UART_Transaction
+ *
+ * \ingroup UART_SCI_INTERNAL_FUNCTION
+ *
+ * @return Returns UART_SUCCESS or UART_ERROR on an error.
+ */
+static int32_t UartSci_read2(UART_Handle handle, UART_Transaction *transaction)
+{
+ return (UART_ENOTIMPL);
+}
+
+/**
+ * @b Description
+ * @n
+ * The function is the registered callback function which is invoked when
+ * the UART driver invokes UART_write2() to transmit data .
+ *
+ * @param[in] handle
+ * Handle to the UART Driver which is to be initialized.
+ *
+ * @param[in/out] uartTrans
+ * A pointer to a UART_Transaction
+ *
+ * \ingroup UART_SCI_INTERNAL_FUNCTION
+ *
+ * @return Returns UART_SUCCESS or UART_ERROR on an error.
+ */
+static int32_t UartSci_write2(UART_Handle handle, UART_Transaction *transaction)
+{
+ return (UART_ENOTIMPL);
+}
diff --git a/packages/ti/drv/uart/src/v3/uartsci.h b/packages/ti/drv/uart/src/v3/uartsci.h
--- /dev/null
@@ -0,0 +1,457 @@
+/**
+ * @file uartsci.h
+ *
+ * @brief
+ * This is the internal Header for the UART SCI Driver. This header
+ * file should *NOT* be directly included by applications.
+ *
+ * \par
+ * NOTE:
+ * (C) Copyright 2016-2020 Texas Instruments, Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ *
+ * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @defgroup UART_SCI UART Driver
+ */
+#ifndef UART_SCI_H
+#define UART_SCI_H
+
+#include <ti/osal/osal.h>
+#include <ti/drv/uart/UART.h>
+#include <ti/drv/edma/edma.h>
+#include <ti/csl/src/ip/sci/V0/cslr_sci.h>
+
+#include <ti/drv/uart/src/v3/uartsci_soc.h>
+
+/**
+@defgroup UART_SCI_INTERNAL_FUNCTION UART Driver Internal Functions
+@ingroup UART_SCI
+*/
+/**
+@defgroup UART_SCI_INTERNAL_DATA_STRUCTURE UART Driver Internal Data Structures
+@ingroup UART_SCI
+*/
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** @addtogroup UART_SCI_INTERNAL_DATA_STRUCTURE
+ @{ */
+
+/**
+ * @brief
+ * UART SCI Driver Duplexity capability
+ *
+ * @details
+ * The enumeration describes the duplexity capabilities of the UART
+ * SCI Driver
+ */
+typedef enum UartSci_Duplexity_e
+{
+ /**
+ * @brief Driver is capable of sending/receiving data
+ */
+ UartSci_Duplexity_FULL = 0x1,
+
+ /**
+ * @brief Driver is only capable of sending data
+ */
+ UartSci_Duplexity_TX_ONLY
+}UartSci_Duplexity;
+
+/**
+ * @brief
+ * UART SCI Driver Status
+ *
+ * @details
+ * The enumeration describes the status of the UART Driver Instance
+ */
+typedef enum UartSci_DriverStatus_e
+{
+ /**
+ * @brief Driver is uninitialized.
+ */
+ UartSci_DriverStatus_UNINITIALIZED = 0x0,
+
+ /**
+ * @brief Driver is operational.
+ */
+ UartSci_DriverStatus_OPERATIONAL
+}UartSci_DriverStatus;
+
+typedef struct UartSci_HwCfg_t UartSci_HwCfg;
+
+
+/**
+ * @brief
+ * SCI Driver EDMA Block
+ *
+ * @details
+ * The structure is used to hold all the pertinent information with respect
+ * to the UART DMA.
+ */
+typedef struct UartSci_DriverEDMA_t
+{
+ /**
+ * @brief This is a pointer to the hardware configuration.
+ */
+ UartSci_HwCfg* ptrHwCfg;
+
+ /**
+ * @brief EDMA Channel configuration which is populated to setup
+ * the transfer
+ */
+ EDMA_channelConfig_t config;
+
+ /**
+ * @brief Dummy EDMA Param configuration for the last transfer
+ */
+ EDMA_paramConfig_t dummyParamConfig;
+
+}UartSci_DriverEDMA;
+
+
+/**
+ * @brief
+ * SCI Driver Master Control Block
+ *
+ * @details
+ * The structure is used to hold all the pertinent information with respect
+ * to the UART Driver.
+ */
+typedef struct UartSci_Driver_t
+{
+ /**
+ * @brief Driver handle
+ */
+ UART_Handle handle;
+
+ /**
+ * @brief Status of the Driver Instance
+ */
+ UartSci_DriverStatus status;
+
+ /**
+ * @brief Pointer to the data buffer which is to be sent out by the UART
+ * Driver.
+ */
+ uint8_t* ptrWriteBuffer;
+
+ /**
+ * @brief This is the number of bits the data needs to be shifted. This is
+ * calculated using the data length.
+ */
+ uint8_t shiftJustification;
+
+ /**
+ * @brief Number of characters which have been sent out.
+ */
+ int32_t writeCount;
+
+ /**
+ * @brief Number of characters which remain in the write buffer.
+ */
+ int32_t writeSize;
+
+ /**
+ * @brief Flag which indicates if a return character is to be written.
+ * This is used only while operating in the TEXT Mode.
+ */
+ uint32_t writeCR;
+
+ /**
+ * @brief Handle to the Write semaphore.
+ */
+ SemaphoreP_Handle writeSem;
+
+ /**
+ * @brief Pointer to the data buffer where the recevied data is placed
+ */
+ uint8_t* ptrReadBuffer;
+
+ /**
+ * @brief Number of characters which have been read.
+ */
+ int32_t readCount;
+
+ /**
+ * @brief Number of characters which remain in the read buffer.
+ */
+ int32_t readSize;
+
+ /**
+ * @brief Handle to the Read semaphore.
+ */
+ SemaphoreP_Handle readSem;
+
+ /**
+ * @brief Registered Interrupt Handler.
+ */
+ HwiP_Handle hwiHandle;
+
+ /**
+ * @brief UART Parameters which were used to initialize the driver instance
+ */
+ UART_Params params;
+
+ /**
+ * @brief Rx/Tx EDMA information
+ */
+ UartSci_DriverEDMA dmaInfo[2];
+
+ /**
+ * @brief Flag which indicates if DMA is enabled
+ */
+ bool isDMAEnabled;
+
+ /**
+ * @brief Statistics associated with the driver instance:
+ */
+ UART_Stats stats;
+}UartSci_Driver;
+
+/**
+ * @brief
+ * This is the function prototype which is used by the UART driver
+ * to open and setup the DMA services.
+ *
+ * @param[in] ptrUartSciDriver
+ * Pointer to the UART Driver MCB
+ * @param[in] ptrHwCfg
+ * Pointer to the UART Driver Hardware configuration
+ *
+ * @retval
+ * Success - 0
+ * @retval
+ * Error - <0
+ */
+typedef int32_t (*UartSci_openDMAFxn) (UartSci_Driver* ptrUartSciDriver, UartSci_HwCfg* ptrHwCfg);
+
+/**
+ * @brief
+ * This is the function prototype which is used by the UART driver
+ * to close the DMA services
+ *
+ * @param[in] ptrUartSciDriver
+ * Pointer to the UART Driver MCB
+ * @param[in] ptrHwCfg
+ * Pointer to the UART Driver Hardware configuration
+ *
+ * @retval
+ * Success - 0
+ * @retval
+ * Error - <0
+ */
+typedef int32_t (*UartSci_closeDMAFxn) (UartSci_Driver* ptrUartSciDriver);
+
+/**
+ * @brief
+ * This is the function prototype which is used by the UART driver
+ * to check if the DMA services are available.
+ *
+ * @param[in] ptrUartSciDriver
+ * Pointer to the UART Driver MCB
+ *
+ * @retval
+ * true - DMA Services are available
+ * @retval
+ * false - DMA Services are not available
+ */
+typedef bool (*UartSci_isDMAEnabledFxn) (UartSci_Driver* ptrUartSciDriver);
+
+/**
+ * @brief
+ * This is the function prototype which is used by the UART driver
+ * to initiate the receive DMA
+ *
+ * @param[in] ptrUartSciDriver
+ * Pointer to the UART Driver MCB
+ * @param[in] dstAddress
+ * Destination address where the data is placed after it is received
+ * by the UART driver.
+ * @param[in] numBytes
+ * Number of bytes to be transmitted
+ * @param[in] pollingMode
+ * Set to true to indicate that we need to poll for completion else
+ * set to false
+ *
+ * @retval
+ * Not applicable
+ */
+typedef int32_t (*UartSci_initiateRxDMAFxn)
+(
+ UartSci_Driver* ptrUartSciDriver,
+ uint32_t dstAddress,
+ uint32_t numBytes,
+ bool pollingMode
+);
+
+/**
+ * @brief
+ * This is the function prototype which is used by the UART driver
+ * to initiate the transmit DMA
+ *
+ * @param[in] ptrUartSciDriver
+ * Pointer to the UART Driver MCB
+ * @param[in] srcAddress
+ * Source address of the buffer which is to be transmitted
+ * @param[in] numBytes
+ * Number of bytes to be transmitted
+ * @param[in] pollingMode
+ * Set to true to indicate that we need to poll for completion else
+ * set to false
+ *
+ * @retval
+ * Success - 0
+ * @retval
+ * Error Code - <0
+ */
+typedef int32_t (*UartSci_initiateTxDMAFxn)
+(
+ UartSci_Driver* ptrUartSciDriver,
+ uint32_t srcAddress,
+ uint32_t numBytes,
+ bool pollingMode
+);
+
+/**
+ * @brief
+ * SCI Driver HW configuration
+ *
+ * @details
+ * The structure is used to store the hardware specific configuration which is
+ * passed to each driver instance
+ */
+struct UartSci_HwCfg_t
+{
+
+ /**\r
+ * @brief Base address of the SCI registers to be used\r
+ */\r
+ CSL_sciRegs* ptrSCIRegs;
+
+ /**
+ * @brief Duplexity
+ */
+ UartSci_Duplexity duplexity;
+
+
+ /**
+ * @brief Interrupt Number or Event Id for C6x
+ */
+ uint32_t interruptNum;
+
+ /**
+ * @brief Transmit DMA Request Line or EMDA event number
+ */
+ uint32_t txDMARequestLine;
+
+ /**
+ * @brief Receive DMA Request Line or EDMA event number
+ */
+ uint32_t rxDMARequestLine;
+
+ /**
+ * @brief Registered DMA Open Fxn
+ */
+ UartSci_openDMAFxn openDMAFxn;
+
+ /**
+ * @brief Registered DMA Close Fxn
+ */
+ UartSci_closeDMAFxn closeDMAFxn;
+
+ /**
+ * @brief Registered Is DMA Enabled Fxn
+ */
+ UartSci_isDMAEnabledFxn isDMAEnabledFxn;
+
+ /**
+ * @brief Registered Initiate Receive DMA Fxn
+ */
+ UartSci_initiateRxDMAFxn initiateRxDMAFxn;
+
+ /**
+ * @brief Registered Initiate Transmit DMA Fxn
+ */
+ UartSci_initiateTxDMAFxn initiateTxDMAFxn;
+
+ /**
+ * @brief IP-specific sftware configurations
+ */
+ UartSci_SwCfg swCfg;
+};
+
+/*********************************************************************
+ * UART SCI DMA Enable/Disable Functions
+ *********************************************************************/
+extern void UartSci_enableTxDMA (CSL_sciRegs* ptrSCIRegs);
+extern void UartSci_disableTxDMA (CSL_sciRegs* ptrSCIRegs);
+extern void UartSci_disableRxDMA (CSL_sciRegs* ptrSCIRegs);
+extern void UartSci_enableRxDMA (CSL_sciRegs* ptrSCIRegs);
+
+/*********************************************************************
+ * Port of the UART-DMA Layer:
+ * - These use the EDMA Driver to provide the functionality to
+ * the UART Driver.
+ *********************************************************************/
+extern int32_t UartSci_openEDMA (UartSci_Driver* ptrUartSciDriver, UartSci_HwCfg* ptrHwCfg);
+extern int32_t UartSci_closeEDMA (UartSci_Driver* ptrUartSciDriver);
+extern bool UartSci_isEDMAEnabled (UartSci_Driver* ptrUartSciDriver);
+extern int32_t UartSci_initiateTxEDMA
+(
+ UartSci_Driver* ptrUartSciDriver,
+ uint32_t srcAddress,
+ uint32_t numBytes,
+ bool pollingMode
+);
+extern int32_t UartSci_initiateRxEDMA
+(
+ UartSci_Driver* ptrUartSciDriver,
+ uint32_t dstAddress,
+ uint32_t numBytes,
+ bool pollingMode
+);
+
+/*********************************************************************
+ * UART SCI Utility Functions
+ *********************************************************************/
+extern void UartSci_callback (UART_Handle handle, bool isRx);
+
+/**
+@}
+*/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* UART_SCI_H */
diff --git a/packages/ti/drv/uart/src/v3/uartsci_soc.h b/packages/ti/drv/uart/src/v3/uartsci_soc.h
--- /dev/null
@@ -0,0 +1,191 @@
+/**
+ * @file uartsci_soc.h
+ *
+ * @brief
+ * This is the SoC Header for the UART SCI Driver, which defines
+ * SoC specific parameters.
+ *
+ * \par
+ * NOTE:
+ * (C) Copyright 2020 Texas Instruments, Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ *
+ * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @defgroup UART_SCI_SOC UART Driver SoC Parameters
+ */
+#ifndef UART_SCI_SOC_H
+#define UART_SCI_SOC_H
+
+#include <stdint.h>
+#include <stddef.h>
+
+/**
+@defgroup UART_SCI_INTERNAL_DATA_STRUCTURE UART Driver Internal Data Structures
+@ingroup UART_SCI_SOC
+*/
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** @addtogroup UART_SCI_SOC_INTERNAL_DATA_STRUCTURE
+ @{ */
+
+/*!
+ * @brief Command code used by UART_control() to place the UART in loopback mode
+ *
+ * This command is available to place the UART Driver in loopback mode. This is
+ * a debug only feature. With this command code, @b arg is a pointer to an
+ * integer. @b *arg contains the status of the loopback. 1 will enable the loopback
+ * and 0 will disable it
+ */
+#define UART_CMD_LOOPBACK (0U)
+
+/*!
+ * @brief Command code used by UART_control() to get the UART Instance statistics
+ *
+ * This command is available to get the statistics associated with the UART instance.
+ * This is a debug only feature. With this command code, @b arg is a pointer to the
+ * UART_Stats structure.
+ */
+#define UART_CMD_GET_STATS (1U)
+
+/*!
+ * @brief UART Statistics
+ *
+ * This structure holds the statistics which are maintained by the UART
+ * driver instance and can be used for debugging purpose
+ *
+ * @sa UART_control()
+ */
+typedef struct UART_Stats_t
+{
+ /**
+ * @brief Number of receive interrupts
+ */
+ uint32_t numRxInterrupts;
+
+ /**
+ * @brief Number of transmit interrupts
+ */
+ uint32_t numTxInterrupts;
+
+ /**
+ * @brief Number of receive overrun interrupts
+ */
+ uint32_t numRxOverrunInterrupts;
+
+ /**
+ * @brief Number of dummy UART reads: Data was received on the console
+ * but the application did not provide a buffer.
+ */
+ uint32_t numDummyRead;
+
+ /**
+ * @brief Total Number of interrupts
+ */
+ uint32_t totalInterrupts;
+
+ /**
+ * @brief Number of Receive DMA Interrupts: This is only if the UART instance
+ * is configured to operate in DMA mode.
+ */
+ uint32_t numRxDMAInterrupts;
+
+ /**
+ * @brief Number of Transmit DMA Interrupts: This is only if the UART instance
+ * is configured to operate in DMA mode.
+ */
+ uint32_t numTxDMAInterrupts;
+
+ /**
+ * @brief Number of Framing Errors:
+ */
+ uint32_t numFramingErrors;
+
+ /**
+ * @brief Number of Parity Errors:
+ */
+ uint32_t numParityError;
+}UART_Stats;
+
+typedef struct UartSci_SwCfg_t UartSci_SwCfg;
+typedef struct UartSci_SwCfg_t UART_HwAttrs;
+
+/**
+ * @brief
+ * SCI Driver SW configuration
+ *
+ * @details
+ * The structure is used to store the software specific configuration which is
+ * passed to each driver instance
+ */
+struct UartSci_SwCfg_t
+{
+ /**
+ * @brief Input Clock Frequency
+ */
+ uint32_t clockFrequency;
+
+ /**
+ * @brief Handle to the EDMA Instance
+ */
+ void* edmaHandle;
+
+ /**
+ * @brief Id of EDMA PaRAM set used to setup the transfers
+ */
+ uint32_t paramSetId;
+
+ /**
+ * @brief flag to indicate in DMA mode
+ */
+ uint32_t dmaMode;
+
+ /**
+ * @brief flag to indicate in loopback mode
+ */
+ uint32_t loopback;
+
+ /**
+ * @brief flag to enable interrupt
+ */
+ uint32_t enableInterrupt;
+};
+
+/**
+@}
+*/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* UART_SCI_SOC_H */
index b0f4c75f6521e9d9ef5c6d97911b23822eee7208..3200b9221c785e8b34eef2d1193189e721d61ca3 100644 (file)
EXTERNAL_INTERFACES = bios xdc
COMP_LIST_COMMON = osal_tirtos
-ifeq ($(SOC),$(filter $(SOC), j721e j7200 am65xx am64x))
+ifeq ($(SOC),$(filter $(SOC), j721e j7200 am65xx am64x tpr12))
XDC_CFG_FILE_$(CORE) = $(PDK_INSTALL_PATH)/ti/build/$(SOC)/sysbios_$(ISA).cfg
else
XDC_CFG_FILE_mpu1_0 = ./$(SOC)/uartUnitTest_$(ISA).cfg
# Name of the binary if different from the default (APP_NAME)_$(BOARD_$(CORE)_<build_profile>
LOCAL_APP_NAME = UART$(UART_OS_TYPE)_DMA_$(BOARD)_$(CORE)TestApp
endif
- COMP_LIST_COMMON += uart_dma udma sciclient i2c
+ ifeq ($(SOC),$(filter $(SOC), tpr12))
+ COMP_LIST_COMMON += uart_dma edma
+ else
+ COMP_LIST_COMMON += uart_dma udma sciclient i2c
+ endif
#COMP_LIST_COMMON += uart_dma_profile udma
CFLAGS_UART_DMA = -DUART_DMA_ENABLE
else
COMP_LIST_COMMON += sciclient i2c
endif
+ ifeq ($(SOC),$(filter $(SOC), tpr12))
+ COMP_LIST_COMMON += edma
+ endif
+
#COMP_LIST_COMMON += uart_profile
CFLAGS_UART_DMA =
endif
diff --git a/packages/ti/drv/uart/test/src/UART_board.h b/packages/ti/drv/uart/test/src/UART_board.h
index e054f7686bc7f344e551c508d48f3dcffe02936e..b9ddac38a54b81a87d1147130ae72c085a6a687a 100644 (file)
*/
/*
- * Copyright (C) 2015 - 2017 Texas Instruments Incorporated - http://www.ti.com/
+ * Copyright (C) 2015 - 2020 Texas Instruments Incorporated - http://www.ti.com/
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
#ifdef UART_DMA_ENABLE
#if defined (SOC_AM65XX) || defined(SOC_J721E) || defined(SOC_J7200) || defined(SOC_AM64X)
#include <ti/drv/udma/udma.h>
+#elif defined (SOC_TPR12)
+#include <ti/drv/edma/edma.h>
+#include <ti/drv/edma/soc/edma_soc.h>
+static EDMA_Handle UartApp_edmaInit(void);
#else
/* EDMA3 Header files */
#include <ti/sdo/edma3/drv/edma3_drv.h>
#if defined(idkAM574x) || defined (idkAM572x) || defined (idkAM571x)
#define UART_INSTANCE (2U)
+#elif defined(SOC_TPR12)
+#define UART_INSTANCE (0U)
#else
#define UART_INSTANCE (BOARD_UART_INSTANCE)
#endif
diff --git a/packages/ti/drv/uart/test/src/main_uart_test.c b/packages/ti/drv/uart/test/src/main_uart_test.c
#include <ti/csl/arch/csl_arch.h>
#endif
+#if defined(SOC_TPR12)
+#define QT_BUILD
+#define UART_RX_LOOPBACK_ONLY
+#define UART_API2_NOT_SUPPORTED
+#define UART_NO_FIFO
+//#define UART_RW_INT_ONLY
+#endif
+
void Uart_appC7xPreInit(void);
/* Define the UART test interface */
#define UART_TEST_ID_INT_DISABLE 17 /* UART read write test with interrupt disabled */
#define UART_TEST_ID_RDVERIFY 18 /* UART non-DMA read API Test in loopback mode */
#define UART_TEST_ID_MULTI_INSTS 19 /* UART DMA multiple instances test in loopback mode */
+#define UART_TEST_ID_API 20 /* UART API Test */
+#define UART_TEST_ID_PROF_TX 21 /* UART non-DMA/DMA Blocking/Polling transmit polling */
+#define UART_TEST_ID_DMA_LB_DATA 22 /* UART DMA data transfer test in loopback mode */
+#define UART_TEST_ID_LB_DATA 23 /* UART non-DMA data transfer test in loopback mode */
/* Length of the input in number of characters */
#define UART_TEST_READ_LEN (16U)
#define UART_RDVERIFY_READ_LEN (4U)
/* Timeout value of read and write */
+#ifdef QT_BUILD
+#define UART_TEST_TIMEOUT (50U)
+#else
#define UART_TEST_TIMEOUT (5000U)
+#endif
/* Max number of instances to test in multiple instance test case */
#define UART_TEST_NUM_INSTS (2U)
+/* MAX Data Pattern Test Size for the Data Tests: */
+#define MAX_TEST_BUFFER_SIZE 128
#define UART_TEST_CACHE_LINE_SIZE (128U)
#if (defined(_TMS320C6X) || defined (__TI_ARM_V7M4__))
UART_PAR uartParity = UART_PAR_NONE;
+/* Global Variable which holds the UART Handle */
+UART_Handle gUARTHandle = NULL;
+
#if defined(SOC_AM65XX) || defined(SOC_J721E) || defined(SOC_J7200) || defined(SOC_AM64X)
#ifdef UART_DMA_ENABLE
/*
uart_cfg.edmaHandle = UartApp_udmaInit(&uart_cfg);
#else
uart_cfg.edmaHandle = UartApp_edmaInit();
+ #if defined(SOC_TPR12)
+ uart_cfg.paramSetId = EDMA_NUM_DMA_CHANNELS;
+ #endif
#endif
uart_cfg.dmaMode = TRUE;
}
#else
return addr;
#endif
+#elif defined (SOC_TPR12)
+ #ifdef _TMS320C6X
+ if ((addr>=0x00800000 && addr<=0x00860000) || (addr>=0x00F00000 && addr<=0x00F08000))
+ {
+ return (addr | 0x80000000);
+ }
+ else
+ {
+ return (addr);
+ }
+ #else
+ if(addr < 0x80000)
+ {
+ return (addr | 0xC1000000);
+ }
+ else if (addr < 0x100000)
+ {
+ return ((addr & 0xFFFF) | 0xC1800000);
+ }
+ else if ((addr >= 0x10200000) && (addr <= 0x102F0000))
+ {
+ return((addr & 0x00FFFFFF) | 0xC0000000);
+ }
+ else
+ {
+ return (addr);
+ }
+ #endif
#else
return addr;
#endif
}
+/**
+ * @b Description
+ * @n
+ * The function is used to populate the *test* buffer with a predefined
+ * signature
+ *
+ * @param[in] ptrBuffer
+ * Buffer to be populated
+ * @param[in] size
+ * Size of the buffer
+ *
+ * @retval
+ * Not applicable
+ */
+void UART_populateBuffer (uint8_t* ptrBuffer, uint32_t size)
+{
+ uint32_t index;
+ char ch = 'A';
+
+ /* Populate the data buffer: */
+ for (index = 0; index < size; index++)
+ {
+ *(ptrBuffer + index) = ch++;
+ if (ch == ('Z'+1))
+ ch = 'A';
+ }
+ return;
+}
+
+/**
+ * @b Description
+ * @n
+ * The function is used to validate the *test* buffer
+ *
+ * @param[in] ptrBuffer
+ * Buffer to be populated
+ * @param[in] size
+ * Size of the buffer
+ *
+ * @retval
+ * 0 - Validated
+ * @retval
+ * <0 - Not valid
+ */
+int32_t UART_validateBuffer (uint8_t* ptrBuffer, uint32_t size)
+{
+ uint32_t index;
+ char ch = 'A';
+
+
+ /* Populate the data buffer: */
+ for (index = 0; index < size; index++)
+ {
+ if (*(ptrBuffer + index) != ch)
+ {
+ printf ("Error: Invalid data buffer Expected %c got %c @ index %d\n",
+ ch, *(ptrBuffer + index), index);
+ return -1;
+ }
+
+ /* Continue the validation: */
+ ch++;
+ if (ch == ('Z'+1))
+ ch = 'A';
+ }
+ return 0;
+}
+
+
void UART_callback(UART_Handle handle, void *buf, size_t count)
{
UART_osalPostLock(callbackSem);
UART_osalPostLock(callbackSem);
}
+#if !defined(SOC_TPR12)
+
#define UART_NUM_TRIG_LVL (4U)
/*
return (ret);
}
+#endif /* TPR12: no UART fifo */
/*
* ======== UART stdio printf/scanf test ========
*
UART_printf(stdioPrint);
+#ifndef UART_RX_LOOPBACK_ONLY
memset(scanPrompt, 0, sizeof(scanPrompt));
if (UART_scanFmt(scanPrompt) != S_PASS)
{
goto Err;
}
-
ret = true;
Err:
+#else
+ ret = true;
+#endif
UART_stdioDeInit();
}
else
UART_printf(stdioPrint);
memset(scanPrompt, 0, sizeof(scanPrompt));
+#ifndef UART_RX_LOOPBACK_ONLY
if (UART_scanFmt(scanPrompt) != S_PASS)
{
goto Err;
}
-
ret = true;
Err:
+#else
+ ret = true;
+#endif
UART_stdioDeInit();
return (ret);
}
+#if !defined(UART_API2_NOT_SUPPORTED)
#ifdef USE_BIOS
/* Use a global variable to sync the read task and the write task */
volatile bool taskSyncFlag;
return (ret);
}
#endif
+#endif
/*
* ======== UART read cancel test ========
* the read is complete.
*
*/
-static bool UART_test_read_write_cancel(bool dmaMode)
+//static bool UART_test_read_write_cancel(bool dmaMode)
+bool UART_test_read_write_cancel(bool dmaMode)
{
UART_Handle uart = NULL;
UART_Params uartParams;
{
CacheP_wbInv((void *)(uintptr_t)addrScanPrompt, (int32_t)sizeof(scanPrompt));
}
+
UART_transactionInit(&callbackTransaction);
callbackTransaction.buf = (void *)(uintptr_t)addrScanPrompt;
callbackTransaction.count = UART_TEST_READ_LEN;
+#if !defined(UART_API2_NOT_SUPPORTED)
if (UART_read2(uart, &callbackTransaction) == UART_ERROR)
+#else
+ if (UART_read(uart, callbackTransaction.buf, UART_TEST_READ_LEN) == UART_ERROR)
+#endif
{
goto Err;
}
/* Delay for 10 seconds to allow user to enter chars */
+#if !defined(QT_BUILD)
Osal_delay(10000);
-
+#else
+ Osal_delay(100);
+#endif
/* Cancel the read before the read transfer is completed */
UART_readCancel(uart);
if (UART_osalPendLock(callbackSem, callbackTransaction.timeout) != SemaphoreP_OK)
UART_transactionInit(&transaction);
transaction.buf = (void *)(uintptr_t)addrRdCancelPrompt;
transaction.count = sizeof(rdCancelPrompt);
+#if !defined(UART_API2_NOT_SUPPORTED)
if (UART_write2(uart, &transaction) == UART_ERROR)
+#else
+ if (UART_write(uart, transaction.buf, transaction.count) == UART_ERROR)
+#endif
{
goto Err;
}
UART_transactionInit(&transaction);
transaction.buf = (void *)(uintptr_t)addrDataPrint;
transaction.count = sizeof(dataPrint);
+#if !defined(UART_API2_NOT_SUPPORTED)
if (UART_write2(uart, &transaction) == UART_ERROR)
+#else
+ if (UART_write(uart, transaction.buf, transaction.count) == UART_ERROR)
+#endif
{
goto Err;
}
{
CacheP_wbInv((void *)(uintptr_t)addrScanPrompt, (int32_t)sizeof(scanPrompt));
}
+
+#if !defined(UART_RX_LOOPBACK_ONLY)
UART_transactionInit(&callbackTransaction);
callbackTransaction.buf = (void *)(uintptr_t)addrScanPrompt;
callbackTransaction.count = UART_TEST_READ_LEN;
+#if !defined(UART_API2_NOT_SUPPORTED)
if (UART_read2(uart, &callbackTransaction) == UART_ERROR)
+#else
+ if (UART_read(uart, callbackTransaction.buf, UART_TEST_READ_LEN) == UART_ERROR)
+#endif
{
goto Err;
}
{
goto Err;
}
-
+#endif
UART_transactionInit(&transaction);
transaction.buf = (void *)(uintptr_t)addrEchoPrompt;
transaction.count = sizeof(echoPrompt);
+#if !defined(UART_API2_NOT_SUPPORTED)
if (UART_write2(uart, &transaction) == UART_ERROR)
+#else
+ if (UART_write(uart, transaction.buf, transaction.count) == UART_ERROR)
+#endif
{
goto Err;
}
UART_transactionInit(&transaction);
transaction.buf = (void *)(uintptr_t)addrScanPrompt;
transaction.count = sizeof(scanPrompt);
+#if !defined(UART_API2_NOT_SUPPORTED)
if (UART_write2(uart, &transaction) == UART_ERROR)
+#else
+ if (UART_write(uart, transaction.buf, transaction.count) == UART_ERROR)
+#endif
{
goto Err;
}
+
UART_close(uart);
/* write cancel test */
UART_transactionInit(&callbackTransaction);
callbackTransaction.buf = (void *)(uintptr_t)addrWrCancelPrompt;
callbackTransaction.count = sizeof(wrCancelPrompt);
+#if !defined(UART_API2_NOT_SUPPORTED)
if (UART_write2(uart, &callbackTransaction) == UART_ERROR)
+#else
+ if (UART_write(uart, callbackTransaction.buf, callbackTransaction.count) == UART_ERROR)
+#endif
{
goto Err;
}
UART_transactionInit(&callbackTransaction);
callbackTransaction.buf = (void *)(uintptr_t)addrWrCancelPrompt;
callbackTransaction.count = sizeof(wrCancelPrompt);
+#if !defined(UART_API2_NOT_SUPPORTED)
if (UART_write2(uart, &callbackTransaction) == UART_ERROR)
+#else
+ if (UART_write(uart, callbackTransaction.buf, callbackTransaction.count) == UART_ERROR)
+#endif
{
goto Err;
}
UART_osalDeleteBlockingLock(callbackSem);
callbackSem = NULL;
}
+
return (ret);
}
+#if !defined(UART_API2_NOT_SUPPORTED)
/*
* ======== UART receive error test ========
*
return (ret);
}
+#endif
+
/*
* ======== UART timeout test ========
*
/* Initialize the default configuration params. */
UART_Params_init(&uartParams);
uartParams.parityType = uartParity;
+#if defined(UART_API2_NOT_SUPPORTED)
+ uartParams.readTimeout = UART_TEST_TIMEOUT;
+#endif
if (dmaMode)
{
transaction.buf = (void *)(uintptr_t)scanPrompt;
transaction.count = UART_TEST_READ_LEN;
transaction.timeout = UART_TEST_TIMEOUT;
+#if defined(UART_API2_NOT_SUPPORTED)
if (UART_read2(uart, &transaction) == UART_ERROR)
+#else
+ if (UART_read(uart, transaction.buf, transaction.count) == UART_ERROR)
+#endif
{
UART_transactionInit(&transaction);
transaction.buf = (void *)(uintptr_t)addrReadTimeoutPrompt;
UART_writePolling(uart, (const void *)dataPrint, wrSize);
memset(scanPrompt, 0, sizeof(scanPrompt));
+
+#if !defined(UART_RX_LOOPBACK_ONLY)
if (UART_readPolling(uart, (void *)(uintptr_t)scanPrompt, rdSize) != rdSize)
{
goto Err;
}
-
+#endif
wrSize = sizeof(echoPrompt);
UART_writePolling(uart, (const void *)echoPrompt, wrSize);
UART_writePolling(uart, (const void *)scanPrompt, rdSize);
CacheP_wbInv((void *)(uintptr_t)addrScanPrompt, (int32_t)sizeof(scanPrompt));
}
+#if !defined(UART_RX_LOOPBACK_ONLY)
+
if (UART_read(uart, (void *)(uintptr_t)addrScanPrompt, UART_TEST_READ_LEN) == UART_ERROR)
{
goto Err;
goto Err;
}
+#endif
+
if (UART_write(uart, (void *)(uintptr_t)addrEchoPrompt, sizeof(echoPrompt)) == UART_ERROR)
{
goto Err;
}
UART_close(uart);
+ uart = NULL;
/* Test read2/write2 API's in callback mode */
-
+#if !defined(UART_API2_NOT_SUPPORTED)
uartParams.readCallback2 = UART_callback2;
uartParams.writeCallback2 = UART_callback2;
uartParams.readCallback = NULL;
{
CacheP_wbInv((void *)(uintptr_t)addrScanPrompt, (int32_t)sizeof(scanPrompt));
}
+
+#if !defined(UART_RX_LOOPBACK_ONLY)
UART_transactionInit(&callbackTransaction);
callbackTransaction.buf = (void *)(uintptr_t)addrScanPrompt;
callbackTransaction.count = UART_TEST_READ_LEN;
{
goto Err;
}
+#endif
UART_transactionInit(&callbackTransaction);
callbackTransaction.buf = (void *)(uintptr_t)addrEchoPrompt;
goto Err;
}
+#endif
ret = true;
Err:
int16_t length = 0;
bool ret = false;
uint8_t rBuff[UART_TEST_READ_LEN], tBuff[]="aaaabbbbccccddddeeee";
+#if !defined(UART_NO_FIFO)
+ uint8_t dummy = 'X';
+#endif
+ int i;
verifyLoopback = TRUE;
/* UART SoC init configuration */
goto Err;
}
+#if !defined(UART_NO_FIFO)
+
if (UART_write(uart, (void *)&tBuff[0], UART_TEST_READ_LEN) == UART_ERROR)
{
goto Err;
length = UART_read(uart, (void *)&rBuff[4], UART_RDVERIFY_READ_LEN);
length = UART_read(uart, (void *)&rBuff[8], UART_RDVERIFY_READ_LEN);
length = UART_read(uart, (void *)&rBuff[12], UART_RDVERIFY_READ_LEN);
+#else
+ memset(rBuff, 0, UART_TEST_READ_LEN);
+ Osal_delay(1);
+ for (i =0; i < UART_TEST_READ_LEN;i++)
+ {
+ if (UART_write(uart, (void *)&tBuff[i], 1) == UART_ERROR)
+ {
+ goto Err;
+ }
+
+ length += UART_readPolling(uart, (void *)&rBuff[i], 1);
+ }
+
+#endif
ret = true;
for(length=0; length<UART_TEST_READ_LEN; length++)
goto Err;
}
+#if !defined(UART_NO_FIFO)
if (UART_write(uart, (void *)&tBuff[0], UART_TEST_READ_LEN) == UART_ERROR)
{
goto Err;
memset(rBuff, 0, UART_TEST_READ_LEN);
UART_read(uart, (void *)&rBuff[0], UART_TEST_READ_LEN);
+#else
+ memset(rBuff, 0, UART_TEST_READ_LEN);
+ Osal_delay(1);
+ for (i =0; i < UART_TEST_READ_LEN;i++)
+ {
+ if (UART_write(uart, (void *)&tBuff[i], 1) == UART_ERROR)
+ {
+ goto Err;
+ }
+
+ length += UART_readPolling(uart, (void *)&rBuff[i], 1);
+ }
+#endif
for(length=0; length<UART_TEST_READ_LEN; length++)
{
if(tBuff[length] != rBuff[length])
goto Err;
}
+#if !defined(UART_NO_FIFO)
if (UART_write(uart, (void *)&tBuff[0], UART_TEST_READ_LEN) == UART_ERROR)
{
goto Err;
memset(rBuff, 0, UART_TEST_READ_LEN);
UART_read(uart, (void *)&rBuff[0], UART_TEST_READ_LEN);
+#else
+ memset(rBuff, 0, UART_TEST_READ_LEN);
+ Osal_delay(1);
+ for (i =0; i < UART_TEST_READ_LEN;i++)
+ {
+ if (UART_write(uart, (void *)&tBuff[i], 1) == UART_ERROR)
+ {
+ goto Err;
+ }
+
+ length += UART_readPolling(uart, (void *)&rBuff[i], 1);
+ }
+#endif
for(length=0; length<UART_TEST_READ_LEN; length++)
{
if ((tBuff[length] & ((1 << (uartParams.dataLength + 5)) - 1)) != rBuff[length])
{
goto Err;
}
-
+#if !defined(UART_NO_FIFO)
if (UART_write(uart, (void *)&tBuff[0], UART_TEST_READ_LEN) == UART_ERROR)
{
goto Err;
memset(rBuff, 0, UART_TEST_READ_LEN);
UART_read(uart, (void *)&rBuff[0], UART_TEST_READ_LEN);
+#else
+ memset(rBuff, 0, UART_TEST_READ_LEN);
+ Osal_delay(2);
+ for (i =0; i < UART_TEST_READ_LEN;i++)
+ {
+ if (UART_write(uart, (void *)&tBuff[i], 1) == UART_ERROR)
+ {
+ goto Err;
+ }
+
+ length += UART_readPolling(uart, (void *)&rBuff[i], 1);
+ }
+#endif
for(length=0; length<UART_TEST_READ_LEN; length++)
{
if(tBuff[length] != rBuff[length])
UART_Handle uart = NULL;
UART_Params uartParams;
int length = 0;
- uintptr_t addrDataPrint, addrScanPrompt, addrEchoPrompt;
- UART_Transaction transaction;
+ uintptr_t addrDataPrint, addrScanPrompt, addrEchoPrompt;
+ //UART_Transaction transaction;
bool ret = false;
/* UART SoC init configuration */
{
CacheP_wbInv((void *)(uintptr_t)addrScanPrompt, (int32_t)sizeof(scanPrompt));
}
+#ifndef UART_RX_LOOPBACK_ONLY
length = UART_read(uart, (void *)(uintptr_t)addrScanPrompt, UART_TEST_READ_LEN);
if (length != UART_TEST_READ_LEN)
{
goto Err;
}
+#endif
UART_write(uart, (void *)(uintptr_t)addrEchoPrompt, sizeof(echoPrompt));
UART_write(uart, (void *)(uintptr_t)addrScanPrompt, length);
UART_close(uart);
+#if !defined(UART_API2_NOT_SUPPORTED)
uart = UART_open(uartTestInstance, &uartParams);
if (uart == NULL)
{
goto Err;
}
+#else
+ uart = NULL;
+#endif
+
ret = true;
Err:
return (ret);
}
-
/*
* ======== UART read/write test with interrupt disabled ========
*
{
CacheP_wbInv((void *)(uintptr_t)addrScanPrompt, (int32_t)sizeof(scanPrompt));
}
+
+#if !defined(UART_RX_LOOPBACK_ONLY)
length = UART_read(uart, (void *)(uintptr_t)addrScanPrompt, UART_TEST_READ_LEN);
if (length != UART_TEST_READ_LEN)
{
goto Err;
}
-
+#endif
UART_write(uart, (void *)(uintptr_t)addrEchoPrompt, sizeof(echoPrompt));
UART_write(uart, (void *)(uintptr_t)addrScanPrompt, length);
goto Err;
}
+#if !defined(UART_API_NOT_SUPPORTED)
/* Test read2/write2 API's in blocking mode */
UART_transactionInit(&transaction);
transaction.buf = (void *)(uintptr_t)addrDataPrint;
goto Err;
}
+#endif
ret = true;
Err:
}
#ifdef UART_DMA_ENABLE
+#if !defined(UART_RX_LOOPBACK_ONLY)
static uint32_t UART_getMaxNumInst(uint32_t numInst)
{
uint32_t i = 0;
#endif
return (i);
}
-
SemaphoreP_Handle MiCbSem[UART_TEST_NUM_INSTS] = {NULL, };
UART_Handle MiUartHandle[UART_TEST_NUM_INSTS] = {NULL, };
void UART_miCallback(UART_Handle handle, void *buf, size_t count)
char MiRxBuf[UART_TEST_NUM_INSTS][UART_TEST_CACHE_LINE_SIZE] __attribute__ ((aligned (UART_TEST_CACHE_LINE_SIZE)));
char MiTxBuf[UART_TEST_CACHE_LINE_SIZE] __attribute__ ((aligned (UART_TEST_CACHE_LINE_SIZE)));
#endif
+
static bool UART_test_multiple_instances(bool dmaMode)
{
UART_Params uartParams;
uartTestInstance = uartTestStartInst;
return (ret);
}
+#endif /* if UART_RX_LOOPBACK_ONLY */
+#endif /* if DMA */
+
+/**
+ * @b Description
+ * @n
+ * The function is used to test the UART Driver *WRITE* functions with
+ * various invalid arguments.
+ *
+ * @param[in] handle
+ * UART Handle
+ *
+ * @retval
+ * Success - 0
+ * @retval
+ * Error - <0
+ */
+static bool UART_writeInvalidArgs(UART_Handle handle)
+{
+ uint8_t buffer[4];
+ int32_t status;
+
+ /**************************************************************************
+ * Test: Write with invalid buffer
+ **************************************************************************/
+ status = UART_write(handle, NULL, 128);
+ if (status >= 0)
+ {
+ printf("Error: UART Write with invalid buffer returned %d\n", status);
+ return false;
+ }
+
+ /**************************************************************************
+ * Test: Write with invalid size
+ **************************************************************************/
+ status = UART_write(handle, &buffer[0], 0);
+ if (status >= 0)
+ {
+ printf("Error: UART Write with invalid size returned %d\n", status);
+ return false;
+ }
+
+ /**************************************************************************
+ * Test: Write Polling with invalid buffer
+ **************************************************************************/
+ status = UART_writePolling(handle, NULL, 128);
+ if (status >= 0)
+ {
+ printf("Error: UART Write with invalid buffer returned %d\n", status);
+ return false;
+ }
+
+ /**************************************************************************
+ * Test: Write Polling with invalid size
+ **************************************************************************/
+ status = UART_writePolling(handle, &buffer[0], 0);
+ if (status >= 0)
+ {
+ printf("Error: UART Write with invalid size returned %d\n", status);
+ return false;
+ }
+
+ return true;
+}
+
+/**
+ * @b Description
+ * @n
+ * The function is used to test the UART Driver *READ* functions with
+ * various invalid arguments.
+ *
+ * @param[in] handle
+ * UART Handle
+ *
+ * @retval
+ * Success - 0
+ * @retval
+ * Error - <0
+ */
+static bool UART_readInvalidArgs(UART_Handle handle)
+{
+ uint8_t buffer[4];
+ int32_t status;
+
+ /**************************************************************************
+ * Test: Read with invalid buffer
+ **************************************************************************/
+ status = UART_read(handle, NULL, 128);
+ if (status != UART_EINVAL)
+ {
+ printf("Error: UART Read with invalid buffer returned %d\n", status);
+ return false;
+ }
+
+ /**************************************************************************
+ * Test: Read with invalid size
+ **************************************************************************/
+ status = UART_read(handle, &buffer[0], 0);
+ if (status != UART_EINVAL)
+ {
+ printf("Error: UART Read with invalid size returned %d\n", status);
+ return false;
+ }
+
+ /**************************************************************************
+ * Test: Read Polling with invalid buffer
+ **************************************************************************/
+ status = UART_readPolling(handle, NULL, 128);
+ if (status != UART_EINVAL)
+ {
+ printf("Error: UART Read with invalid buffer returned %d\n", status);
+ return false;
+ }
+
+ /**************************************************************************
+ * Test: Read Polling with invalid size
+ **************************************************************************/
+ status = UART_readPolling(handle, &buffer[0], 0);
+ if (status != UART_EINVAL)
+ {
+ printf("Error: UART Read with invalid size returned %d\n", status);
+ return false;
+ }
+
+ return true;
+}
+
+/**
+ * @b Description
+ * @n
+ * The function is used to test the exported UART API.
+ *
+ * @retval
+ * Success - 0
+ * @retval
+ * Error - <0
+ */
+bool UART_test_api (bool dmaMode)
+{
+ UART_Params params;
+ UART_Handle handle;
+
+ /* UART SoC init configuration */
+ UART_initConfig(dmaMode);
+
+ /* Setup the default UART Parameters */
+ UART_Params_init(¶ms);
+
+ /* Open the UART Instance */
+ handle = UART_open(uartTestInstance, ¶ms);
+ if (handle == NULL)
+ {
+ printf("Error: Unable to open the UART Instance\n");
+ return false;
+ }
+ /**************************************************************************
+ * Test: Graceful shutdown
+ **************************************************************************/
+ UART_close(handle);
+
+ /**************************************************************************
+ * Test: Reopen the driver
+ **************************************************************************/
+ handle = UART_open(0, ¶ms);
+ if (handle == NULL)
+ {
+ printf("Error: Unable to open the UART Instance\n");
+ return false;
+ }
+
+ /* Test: This will test the UART Write with Invalid arguments */
+ if (!UART_writeInvalidArgs(handle))
+ return false;
+
+ /* Test: This will test the UART Read with Invalid arguments */
+ if (!UART_readInvalidArgs(handle))
+ return false;
+
+ /* Close the driver: */
+ UART_close(handle);
+ return true;
+}
+
+/**
+ * @b Description
+ * @n
+ * The function is used to profile the UART Transmit API for
+ * comparison in DMA and Non-DMA mode
+ *
+ * @retval
+ * Success - 0
+ * @retval
+ * Error - <0
+ */
+uint8_t uartDataBuf[0x2000];
+
+bool UART_test_profile_tx(bool dmaMode)
+{
+ int32_t status;
+ UART_Params params;
+ UART_Handle handle;
+ int32_t testIndex;
+ int32_t dataSizeIndex;
+ uint32_t dataSize[] = { 64, 256, 1024, 4096, 8192 };
+ uint32_t numDataSize = sizeof(dataSize)/sizeof(uint32_t);
+ uint32_t baudRate = 921600;
+ uintptr_t ptrTxData;
+ uint32_t txTimeTaken;
+ UART_Stats stats;
+ char testDescription[128];
+
+#if defined(QT_BUILD)
+ numDataSize = 3;
+#endif
+
+ CycleprofilerP_init();
+
+ /********************************************************************************
+ * Execute the test for all data sizes
+ ********************************************************************************/
+ for (dataSizeIndex = 0; dataSizeIndex < numDataSize; dataSizeIndex++)
+ {
+ /********************************************************************************
+ * For each data size we will run through the following:-
+ * - Test Index 0: Non-DMA + Blocking Mode
+ * - Test Index 1: DMA + Blocking Mode
+ * - Test Index 2: Non-DMA + Polling Mode
+ * - Test Index 3: DMA + Polling Mode
+ ********************************************************************************/
+ for (testIndex = 0; testIndex < 4; testIndex++)
+ {
+
+#ifdef UART_DMA_ENABLE
+ if(testIndex & 1)
+ {
+ dmaMode = true;
+ ptrTxData = l2_global_address((uintptr_t)uartDataBuf);
+ }
+ else
#endif
+ {
+ dmaMode = false;
+ ptrTxData = (uintptr_t)uartDataBuf;
+ }
+
+ /* UART SoC init configuration */
+ UART_initConfig(dmaMode);
+
+ /*******************************************************************************
+ * Initialization:
+ *******************************************************************************/
+ UART_Params_init(¶ms);
+ params.readDataMode = UART_DATA_BINARY;
+ params.writeDataMode = UART_DATA_BINARY;
+ params.baudRate = baudRate;
+ params.readEcho = UART_ECHO_OFF;
+
+ /* Open the UART Instance: */
+ handle = UART_open(uartTestInstance, ¶ms);
+ if (handle == NULL)
+ {
+ printf ("Error: Unable to open the UART Driver while profiling Transmit Data\n");
+ return false;
+ }
+
+ /******************************************************************************
+ * Debug Message:
+ ******************************************************************************/
+ switch (testIndex)
+ {
+ case 0:
+ {
+ sprintf (testDescription, "UART %d Profile Test in Non-DMA Blocking Mode [Data Size %d bytes]",
+ uartTestInstance, dataSize[dataSizeIndex]);
+ break;
+ }
+ case 1:
+ {
+ sprintf (testDescription, "UART %d Profile Test in DMA Blocking Mode [Data Size %d bytes]",
+ uartTestInstance, dataSize[dataSizeIndex]);
+ break;
+ }
+ case 2:
+ {
+ sprintf (testDescription, "UART %d Profile Test in Non-DMA Polling Mode [Data Size %d bytes]",
+ uartTestInstance, dataSize[dataSizeIndex]);
+ break;
+ }
+ case 3:
+ {
+ sprintf (testDescription, "UART %d Profile Test in DMA Polling Mode [Data Size %d bytes]",
+ uartTestInstance, dataSize[dataSizeIndex]);
+ break;
+ }
+ default:
+ {
+ /* Control should never come here */
+ OSAL_Assert (!0);
+ return false;
+ }
+ }
+
+ /* Initialize the memory to be used: */
+ memset ((void *)uartDataBuf, 0, dataSize[dataSizeIndex]);
+
+ /* Populate the transmit buffer: */
+ UART_populateBuffer (uartDataBuf, dataSize[dataSizeIndex]);
+
+ /****************************************************************
+ * Profile the time taken to send out the data
+ ****************************************************************/
+ txTimeTaken = CycleprofilerP_getTimeStamp();
+
+ if ((testIndex == 0) || (testIndex == 1))
+ status = UART_write(handle, (void *)ptrTxData, dataSize[dataSizeIndex]);
+ else
+ status = UART_writePolling(handle, (void *)ptrTxData, dataSize[dataSizeIndex]);
+
+ txTimeTaken = CycleprofilerP_getTimeStamp() - txTimeTaken;
+
+ /* Were we able to send out the data */
+ if (status != dataSize[dataSizeIndex])
+ {
+ printf ("Error: Unable to send out the data [Status %d]\n", status);
+ UART_close(handle);
+ return false;
+ }
+
+ /* Get the UART Statistics: */
+ if (UART_control (handle, UART_CMD_GET_STATS, &stats) < 0)
+ {
+ UART_close(handle);
+ return false;
+ }
+
+ /* Debug Message: */
+ printf ("Debug: Transmit Measurements\n");
+ printf ("Debug: Baud Rate : %d\n", baudRate);
+ printf ("Debug: Data Size : %d\n", dataSize[dataSizeIndex]);
+ printf ("Debug: Transmit : %d ticks\n", txTimeTaken);
+ printf ("Debug: Tx Interrupt : %d\n", stats.numTxInterrupts);
+ printf ("Debug: Tx DMA Interrupt : %d\n", stats.numTxDMAInterrupts);
+
+ /* Close the driver: */
+ UART_close(handle);
+ }
+ }
+
+ /********************************************************************************************
+ * This is just a beautification; we have mucked around with the UART Console by dumping
+ * all the data. So here we open a console and just put a banner to make it clean
+ ********************************************************************************************/
+ {
+ char* ptrTestDelimitter = "\n\r*********************************************\n\r";
+
+ UART_Params_init(¶ms);
+ params.readDataMode = UART_DATA_BINARY;
+ params.writeDataMode = UART_DATA_BINARY;
+ params.baudRate = baudRate;
+ params.readEcho = UART_ECHO_OFF;
+
+ /* Open the UART Instance: */
+ handle = UART_open(uartTestInstance, ¶ms);
+ if (!handle)
+ {
+ printf ("Error: Unable to open the UART Driver while printing the test banner\n");
+ return false;
+ }
+
+ /* Write the banner on the console*/
+ UART_writePolling (handle, (uint8_t*)ptrTestDelimitter, strlen(ptrTestDelimitter));
+ UART_writePolling (handle, (uint8_t*)ptrTestDelimitter, strlen(ptrTestDelimitter));
+
+ /* Close the driver: */
+ UART_close(handle);
+ }
+
+ return true;
+}
+
+#ifdef USE_BIOS
+
+typedef struct UART_multiTaskTestCB_s
+{
+ bool testDone;
+ bool dmaMode;
+ bool testResult;
+} UART_multiTaskTestCB_t;
+
+
+UART_multiTaskTestCB_t gUARTTestCb;
+
+/**
+ * @b Description
+ * @n
+ * Receive Task
+ *
+ * @retval
+ * Not Applicable.
+ */
+uint8_t rxData[MAX_TEST_BUFFER_SIZE];
+static void UART_rxTask(UArg arg0, UArg arg1)
+{
+ int32_t status;
+ uintptr_t ptrDest;
+
+ /* Debug Message: */
+ printf ("Debug: UART Receive Task [Waiting for the UART Handle]\n");
+
+ if (gUARTTestCb.dmaMode)
+ {
+ ptrDest = l2_global_address((uintptr_t)&rxData[0]);
+ }
+ else
+ {
+ ptrDest = (uintptr_t)&rxData[0];
+ }
+
+ memset((void *)rxData, 0xDE, MAX_TEST_BUFFER_SIZE);
+
+ if (gUARTTestCb.dmaMode)
+ {
+ CacheP_wbInv((void *)(uintptr_t)rxData, (int32_t)sizeof(rxData));
+ }
+
+ /* Loop around and make sure that the UART Handle has been created: */
+ while (1)
+ {
+ if (gUARTHandle != NULL)
+ break;
+ Task_sleep(1);
+ }
+
+ /* Debug Message: */
+ printf ("Debug: UART Receive Task is active\n");
+ /* Read the data: */
+ status = UART_read(gUARTHandle, (void *)ptrDest, MAX_TEST_BUFFER_SIZE);
+ if (status < 0)
+ {
+ printf("Error: UART Read with invalid buffer returned %d\n", status);
+ gUARTTestCb.testResult = false;
+ goto Err;
+ }
+ printf("Debug: UART Read has been completed\n");
+
+ /***********************************************************************************
+ * Data Validation:
+ ***********************************************************************************/
+ if (gUARTTestCb.dmaMode)
+ {
+ CacheP_wbInv((void *)(uintptr_t)&rxData[0], (int32_t)sizeof(rxData));
+ }
+
+ if (UART_validateBuffer (&rxData[0], status) < 0)
+ {
+ gUARTTestCb.testResult = false;
+ }
+ else
+ {
+ gUARTTestCb.testResult = true;
+ }
+
+Err:
+ /* Close the driver: */
+ UART_close(gUARTHandle);
+ gUARTHandle = NULL;
+
+ /* disable the loopback */
+ verifyLoopback = 0;
+
+ gUARTTestCb.testDone = true;
+
+ return;
+}
+
+
+/**
+ * @b Description
+ * @n
+ * Transmit Task
+ *
+ * @retval
+ * Not Applicable.
+ */
+uint8_t txData[MAX_TEST_BUFFER_SIZE];
+static void UART_txTask(UArg arg0, UArg arg1)
+{
+ UART_Params params;
+ UART_Handle handle;
+ uint32_t baudRate = 921600;
+ int32_t status;
+ uintptr_t ptrSrc;
+
+ /* enable the loopback */
+ verifyLoopback = 1;
+
+ /* UART SoC init configuration */
+ UART_initConfig(gUARTTestCb.dmaMode);
+
+ /* Setup the default UART Parameters */
+ UART_Params_init(¶ms);
+ params.baudRate = baudRate;
+ params.readEcho = UART_ECHO_OFF;
+
+ /* Open the UART Instance */
+ handle = UART_open(uartTestInstance, ¶ms);
+ if (handle == NULL)
+ {
+ printf("Error: Unable to open the UART Instance\n");
+ return;
+ }
+
+ printf("Debug: Testing UART in Blocking Mode @ Baud Rate: %d\n", params.baudRate);
+
+ /* Populate the transmit buffer: */
+ UART_populateBuffer (&txData[0], sizeof(txData));
+
+ /* Implement the Loopback workaround */
+ //Test_sciLoopbackWorkaround (handle);
+
+ if (gUARTTestCb.dmaMode)
+ {
+ ptrSrc = l2_global_address((uintptr_t)&txData[0]);
+ CacheP_wb((void *)(uintptr_t)&txData[0], (int32_t)sizeof(txData));
+ }
+ else
+ {
+ ptrSrc = (uintptr_t)&txData[0];
+ }
+
+ /* We can now execute the test: Wake up the receive task. */
+ gUARTHandle = handle;
+ Task_sleep(2);
+
+ printf("Debug: txTask send block of %d bytes\n", MAX_TEST_BUFFER_SIZE);
+
+ /* Send out the data */
+ status = UART_write(gUARTHandle, (void *)ptrSrc, MAX_TEST_BUFFER_SIZE);
+ if (status < 0)
+ {
+ printf("Error: UART Write failed [Error code %d]\n", status);
+ return;
+ }
+
+ printf("Debug: UART Blocking Write has been completed\n");
+
+ return;
+}
+
+/**
+ * @b Description
+ * @n
+ * The function is used to test the blocking data transfer
+ *
+ * @retval
+ * Success - 0
+ * @retval
+ * Error - <0
+ */
+bool UART_test_loopback_data(bool dmaMode)
+{
+ Task_Params taskParams;
+ Task_Handle txHandle, rxHandle;
+
+ /* Initialize the test control block */
+ gUARTTestCb.testDone = false;
+ gUARTTestCb.dmaMode = dmaMode;
+ gUARTTestCb.testResult = false;
+
+ /********************************************************************
+ * Test: Blocking Data test launch the receive & transmit tasks
+ ********************************************************************/
+ Task_Params_init(&taskParams);
+ taskParams.stackSize = 2*1024;
+ taskParams.priority = 3;
+ rxHandle = Task_create(UART_rxTask, &taskParams, NULL);
+
+ Task_Params_init(&taskParams);
+ taskParams.stackSize = 2*1024;
+ taskParams.priority = 2;
+ txHandle = Task_create(UART_txTask, &taskParams, NULL);
+
+ /* wait for test to complete */
+ while(!gUARTTestCb.testDone)
+ {
+ Task_sleep(1);
+ }
+
+ Task_delete(&txHandle);
+ Task_delete(&rxHandle);
+
+ return (gUARTTestCb.testResult);
+}
+
+#endif /* USE_BIOS */
UART_Tests Uart_tests[] =
{
{UART_test_timeout, true, UART_TEST_ID_DMA_TO, "\r\n UART DMA timeout test, wait for 10 seconds to timeout read"},
#endif
{UART_test_timeout, false, UART_TEST_ID_TO, "\r\n UART non-DMA timeout test, wait for 10 seconds to timeout read"},
+#if !defined(UART_API2_NOT_SUPPORTED)
#ifdef UART_DMA_ENABLE
{UART_test_rx_err, true, UART_TEST_ID_DMA_RXERR, "\r\n UART DMA RX error test, enter a break"},
#endif
{UART_test_rx_err, false, UART_TEST_ID_RXERR, "\r\n UART non-DMA RX error test, enter a break"},
+#endif
#ifdef UART_DMA_ENABLE
{UART_test_read_write_cancel, true, UART_TEST_ID_DMA_CANCEL, "\r\n UART DMA read write cancel test, enter less than 16 chars"},
#endif
{UART_test_read_write_cancel, false, UART_TEST_ID_CANCEL, "\r\n UART non-DMA read write cancel test, enter less than 16 chars"},
#ifdef USE_BIOS
+#if !defined(UART_API2_NOT_SUPPORTED)
#ifdef UART_DMA_ENABLE
{UART_test_simultaneous_rw, true, UART_TEST_ID_DMA_RW, "\r\n UART DMA simultaneous read write test "},
#endif
{UART_test_simultaneous_rw, false, UART_TEST_ID_RW, "\r\n UART non-DMA simultaneous read write test "},
#endif
-#ifdef UART_DMA_ENABLE
+#endif
+#if defined(UART_DMA_ENABLE)
+#if !defined(UART_NO_FIFO)
{UART_test_fifo_trglvl, true, UART_TEST_ID_DMA_TRGLVL, "\r\n UART DMA TX/RX FIFO trigger level test "},
+#endif
#endif
{UART_test_printf_scanf, false, UART_TEST_ID_PRINTF, "\r\n UART stdio printf and scanf test "},
+#if !defined(UART_NO_FIFO)
{UART_test_fifo_trglvl, false, UART_TEST_ID_TRGLVL, "\r\n UART non-DMA TX/RX FIFO trigger level test "},
+#endif
{UART_test_polling_timeout, false, UART_TEST_ID_POLL_TO, "\r\n UART polling timeout test, wait for 10 seconds to timeout read"},
{UART_test_printf_scanf_stdio_params, false, UART_TEST_ID_STDIOPARAMS, "\r\n UART stdio printf and scanf test with STDIO params(Default) "},
{UART_test_read_write_int_disable, false, UART_TEST_ID_INT_DISABLE, "\r\n UART read write test with interrupt disabled"},
{UART_test_read_verify, false, UART_TEST_ID_RDVERIFY, "\r\n UART non-DMA read API test in loopback mode"},
#ifdef UART_DMA_ENABLE
+#if !defined(UART_RX_LOOPBACK_ONLY)
{UART_test_multiple_instances, true, UART_TEST_ID_MULTI_INSTS, "\r\n UART DMA multiple instances loopback test "},
+#endif
+#endif
+ {UART_test_api, false, UART_TEST_ID_API, "\r\n UART API Test"},
+ {UART_test_profile_tx, false, UART_TEST_ID_PROF_TX, "\r\n UART non-DMA/DMA Blocking/Polling transmit profiling"},
+#ifdef USE_BIOS
+ {UART_test_loopback_data, false, UART_TEST_ID_LB_DATA, "\r\n UART non-DMA read write test with loopback"},
+#ifdef UART_DMA_ENABLE
+ {UART_test_loopback_data, true, UART_TEST_ID_DMA_LB_DATA, "\r\n UART DMA read write test with loopback"},
+#endif
#endif
{NULL, }
};
void UART_test_print_test_desc(UART_Tests *test)
{
+
+#if !defined(QT_BUILD)
UART_Handle uart = NULL;
UART_Params uartParams;
char testIdPrompt[16] = "\r\n UART UT ";
UART_write(uart, (void *)(uintptr_t)crPrompt, sizeof(crPrompt));
UART_close(uart);
+#else
+ printf("UART UT %d: %s\n", test->testId, test->testDesc);
+#endif
}
void UART_test_print_test_result(UART_Tests *test, bool pass)
{
+#if !defined(QT_BUILD)
UART_Handle uart = NULL;
UART_Params uartParams;
char testIdPrompt[16] = "\r\n UART UT ";
UART_write(uart, (void *)(uintptr_t)crPrompt, sizeof(crPrompt));
UART_close(uart);
+#else
+ printf("UART UT %d: %s\n", test->testId, pass?"PASSED":"FAILED");
+#endif
}
void UART_test_print_test_results(bool pass)
const char resultPass[32] = "\r\n All tests have passed. \r\n";
const char resultFail[32] = "\r\n Some tests have failed. \r\n";
+#if !defined(QT_BUILD)
/* UART SoC init configuration */
UART_initConfig(false);
}
UART_stdioDeInit();
+#else
+ printf("%s", pass?resultPass:resultFail);
+#endif
}
#ifdef USE_BIOS
{
break;
}
+
}
UART_test_print_test_results(testResult);
#endif /* #ifdef USE_BIOS */
#ifdef UART_DMA_ENABLE
-#if !(defined (SOC_AM65XX) || defined(SOC_J721E) || defined(SOC_J7200) || defined(SOC_AM64X))
+#if !(defined (SOC_AM65XX) || defined(SOC_J721E) || defined(SOC_J7200) || defined(SOC_AM64X) || defined(SOC_TPR12))
EDMA3_RM_Handle gEdmaHandle = NULL;
/*
return(gEdmaHandle);
}
#endif
+#if defined(SOC_TPR12)
+EDMA_Handle gEdmaHandle = NULL;
+
+#ifdef BUILD_MCU
+#define UART_EDMA_INSTANCE_ID EDMA_DRV_INST_MSS_A
+#else
+#define UART_EDMA_INSTANCE_ID EDMA_DRV_INST_DSS_B
+#endif
+
+uint32_t UART_edmaErrCount = 0;
+uint32_t UART_edmaTCErrCount = 0;
+
+void Test_edmaErrorCallbackFxn(EDMA_Handle handle, EDMA_errorInfo_t *errorInfo)
+{
+ //OSAL_Assert(true);
+ UART_edmaErrCount++;
+ #if 0
+ printf("edmaError:isOutstandingTransferCompletionTransfersExceededLimit:%d\n",
+ errorInfo->isOutstandingTransferCompletionTransfersExceededLimit);
+ #endif
+}
+
+void Test_edmaTransferControllerErrorCallbackFxn
+(
+ EDMA_Handle handle,
+ EDMA_transferControllerErrorInfo_t* errorInfo
+)
+{
+ //OSAL_Assert(true);
+ UART_edmaTCErrCount++;
+ #if 0
+ printf("edmaTransferControllerError:ReqErr:%d, RsvdMemErr:%d, BusErr:%d, errCode:%d, tcc:%d\n",
+ errorInfo->isTransferRequestError,
+ errorInfo->isWriteToReservedConfigMemoryMap,
+ errorInfo->isBusError,
+ errorInfo->busErrorInfo.errorCode,
+ errorInfo->busErrorInfo.transferCompletionCode);
+ #endif
+}
+
+/*
+ * Initialize the edma driver and get the handle to the edma driver;
+ */
+static EDMA_Handle UartApp_edmaInit(void)
+{
+ EDMA_errorConfig_t errorConfig;
+ EDMA_instanceInfo_t instanceInfo;
+ int32_t errCode;
+
+ if (gEdmaHandle != NULL)
+ {
+ return(gEdmaHandle);
+ }
+
+ /* Initialize the UART edma instance */
+ errCode = EDMA_init(UART_EDMA_INSTANCE_ID);
+ if (errCode != EDMA_NO_ERROR)
+ {
+ printf("Error: Unable to initialize EDMA, errorCode = %d\n", errCode);
+ return NULL;
+ }
+
+ /* Open the UART edma Instance */
+ gEdmaHandle = EDMA_open(UART_EDMA_INSTANCE_ID, &errCode, &instanceInfo);
+ if (gEdmaHandle == NULL)
+ {
+ printf("Error: Unable to open the edma Instance(%d), erorCode = %d\n",
+ UART_EDMA_INSTANCE_ID, errCode);
+ return NULL;
+ }
+
+ /* Setup the EDMA Error Monitoring: */
+ errorConfig.isConfigAllEventQueues = true;
+ errorConfig.isConfigAllTransferControllers = true;
+ errorConfig.isEventQueueThresholdingEnabled = true;
+ errorConfig.eventQueueThreshold = EDMA_EVENT_QUEUE_THRESHOLD_MAX;
+ errorConfig.isEnableAllTransferControllerErrors = true;
+ errorConfig.callbackFxn = Test_edmaErrorCallbackFxn;
+ errorConfig.transferControllerCallbackFxn = Test_edmaTransferControllerErrorCallbackFxn;
+ errCode = EDMA_configErrorMonitoring(gEdmaHandle, &errorConfig);
+ if (errCode != EDMA_NO_ERROR)
+ {
+ printf("Debug: EDMA_configErrorMonitoring() failed with errorCode = %d\n", errCode);
+ //return NULL;
+ }
+
+ return(gEdmaHandle);
+}
+#endif
#endif
#if defined(BUILD_MPU) || defined (__C7100__)
index 234125cec75c89d6d7e11d189241a5e274d0e6ce..1d912263f815eaf5252d834cf89ef00cffb940f5 100755 (executable)
ifeq ($(uart_component_make_include), )
# under other list
-drvuart_BOARDLIST = am65xx_evm am65xx_idk j721e_sim j721e_evm j7200_evm am64x_evm
+drvuart_BOARDLIST = am65xx_evm am65xx_idk j721e_sim j721e_evm j7200_evm am64x_evm tpr12_evm
drvuart_dma_SOCLIST = tda2xx tda2px dra72x dra75x tda2ex tda3xx dra78x am574x am572x am571x k2h k2k k2l k2e k2g c6678 c6657 omapl137 omapl138 am437x am65xx j721e j7200
-drvuart_SOCLIST = tda2xx tda2px dra72x dra75x tda2ex tda3xx dra78x am574x am572x am571x k2h k2k k2l k2e k2g c6678 c6657 am437x am335x omapl137 omapl138 am65xx j721e j7200 am64x
+drvuart_SOCLIST = tda2xx tda2px dra72x dra75x tda2ex tda3xx dra78x am574x am572x am571x k2h k2k k2l k2e k2g c6678 c6657 am437x am335x omapl137 omapl138 am65xx j721e j7200 am64x tpr12
drvuart_tda2xx_CORELIST = ipu1_0
drvuart_tda2px_CORELIST = ipu1_0
drvuart_tda2ex_CORELIST = ipu1_0
drvuart_j7200_CORELIST = $(DEFAULT_j7200_CORELIST)
drvuart_j7200_CORELISTARM = mpu1_0 mcu1_0 mcu1_1 mcu2_0 mcu2_1
drvuart_am64x_CORELIST = $(DEFAULT_am64x_CORELIST)
+drvuart_tpr12_CORELIST = mcu1_0 c66xdsp_1
############################
# uart package
export uart_SOC_DEPENDENCY
uart_PKG_LIST = uart
uart_INCLUDE = $(uart_PATH)
-uart_SOCLIST = tda2xx tda2px tda2ex tda3xx dra78x am574x am572x am571x dra72x dra75x k2h k2k k2l k2e k2g c6678 c6657 am437x am335x omapl137 omapl138 am65xx j721e j7200 am64x
+uart_SOCLIST = tda2xx tda2px tda2ex tda3xx dra78x am574x am572x am571x dra72x dra75x k2h k2k k2l k2e k2g c6678 c6657 am437x am335x omapl137 omapl138 am65xx j721e j7200 am64x tpr12
export uart_SOCLIST
uart_$(SOC)_CORELIST = $(drvuart_$(SOC)_CORELIST)
ifeq ($(SOC),$(filter $(SOC), j721e))
export uart_dma_SOC_DEPENDENCY
uart_dma_PKG_LIST = uart_dma
uart_dma_INCLUDE = $(uart_dma_PATH)
-uart_dma_SOCLIST = am574x am572x am571x dra72x dra75x dra78x k2h k2k k2l k2e k2g c6678 c6657 omapl137 omapl138 am437x am65xx j721e j7200 am335x am64x
+uart_dma_SOCLIST = am574x am572x am571x dra72x dra75x dra78x k2h k2k k2l k2e k2g c6678 c6657 omapl137 omapl138 am437x am65xx j721e j7200 am335x am64x tpr12
export uart_dma_SOCLIST
uart_dma_$(SOC)_CORELIST = $(drvuart_$(SOC)_CORELIST)
export uart_dma_$(SOC)_CORELIST
export uart_profile_SOC_DEPENDENCY
uart_profile_PKG_LIST = uart_profile
uart_profile_INCLUDE = $(uart_profile_PATH)
-uart_profile_SOCLIST = am574x am572x am571x dra72x dra75x dra78x k2h k2k k2l k2e k2g c6678 c6657 am437x am335x omapl137 omapl138 am65xx am64x
+uart_profile_SOCLIST = am574x am572x am571x dra72x dra75x dra78x k2h k2k k2l k2e k2g c6678 c6657 am437x am335x omapl137 omapl138 am65xx am64x tpr12
export uart_profile_SOCLIST
uart_profile_$(SOC)_CORELIST = $(drvuart_$(SOC)_CORELIST)
export uart_profile_$(SOC)_CORELIST
export uart_dma_profile_SOC_DEPENDENCY
uart_dma_profile_PKG_LIST = uart_dma_profile
uart_dma_profile_INCLUDE = $(uart_dma_profile_PATH)
-uart_dma_profile_SOCLIST = am574x am572x am571x dra72x dra75x dra78x k2h k2k k2l k2e k2g c6678 c6657 am437x am65xx am335x am64x
+uart_dma_profile_SOCLIST = am574x am572x am571x dra72x dra75x dra78x k2h k2k k2l k2e k2g c6678 c6657 am437x am65xx am335x am64x tpr12
export uart_dma_profile_SOCLIST
uart_dma_profile_$(SOC)_CORELIST = $(drvuart_$(SOC)_CORELIST)
export uart_dma_profile_$(SOC)_CORELIST
export uart_console_SOC_DEPENDENCY
uart_console_PKG_LIST = uart_console
uart_console_INCLUDE = $(uart_console_PATH)
-uart_console_SOCLIST = tda2xx tda2px tda2ex tda3xx am65xx j721e j7200
+uart_console_SOCLIST = tda2xx tda2px tda2ex tda3xx am65xx j721e j7200 tpr12
export uart_console_SOCLIST
uart_console_$(SOC)_CORELIST = $(drvuart_$(SOC)_CORELIST)
export uart_console_$(SOC)_CORELIST
index e5e22d9e405539d661a02bb8212607e023354f3f..f4bdac26be6ec73805b8b9ae159e1d00072a6b17 100644 (file)
--- a/packages/ti/osal/osal.h
+++ b/packages/ti/osal/osal.h
#include <ti/osal/TimerP.h>
#include <ti/osal/RegisterIntr.h>
#include <ti/osal/Queue.h>
+#include <ti/osal/CycleprofilerP.h>
#ifdef _TMS320C6X
#include <ti/osal/EventCombinerP.h>
#endif