Merge branch 'release/CORESDK_07.01.00' of ssh://bitbucket.itg.ti.com/processor-sdk...
authorsujith <sujith.s@ti.com>
Fri, 18 Dec 2020 13:37:10 +0000 (19:07 +0530)
committersujith <sujith.s@ti.com>
Fri, 18 Dec 2020 13:37:10 +0000 (19:07 +0530)
321 files changed:
packages/pdkAppImageCreate.bat
packages/pdkAppImageCreate.sh
packages/ti/board/board.h
packages/ti/board/board_cfg.h
packages/ti/board/build/makefile.mk
packages/ti/board/diag/automation_header/src/automation_header_test.c
packages/ti/board/diag/automation_header/src/automation_header_test.h
packages/ti/board/diag/board_diag_component.mk
packages/ti/board/diag/boot_switch/build/am64x_evm/boot_switch_config.c
packages/ti/board/diag/button/build/am64x_evm/GPIO_Button_config.c
packages/ti/board/diag/button/src/button_test.c
packages/ti/board/diag/common/am64x/diag_entry.asm
packages/ti/board/diag/common/tpr12/linker_mcu1_0.lds
packages/ti/board/diag/cpsw/build/makefile
packages/ti/board/diag/cpsw/src/cpsw_eth_test.c
packages/ti/board/diag/cpsw/src/cpsw_eth_test.h
packages/ti/board/diag/csirx/build/makefile
packages/ti/board/diag/csirx/frontendcfg/AWR2243/Readme.txt [moved from packages/ti/board/diag/csirx/frontendcfg/Readme.txt with 100% similarity]
packages/ti/board/diag/csirx/frontendcfg/AWR2243/tpr12_mmwave_full_dss.xe66 [moved from packages/ti/board/diag/csirx/frontendcfg/tpr12_mmwave_full_dss.xe66 with 100% similarity, mode: 0644]
packages/ti/board/diag/csirx/frontendcfg/AWR2243/tpr12_mmwave_full_mss.xer5f [moved from packages/ti/board/diag/csirx/frontendcfg/tpr12_mmwave_full_mss.xer5f with 100% similarity, mode: 0644]
packages/ti/board/diag/csirx/frontendcfg/IWR1443/Readme.txt [new file with mode: 0644]
packages/ti/board/diag/csirx/frontendcfg/IWR1443/tpr12_csi_stream_tx.xer4f [new file with mode: 0644]
packages/ti/board/diag/csirx/src/csirx_test_tpr12.c
packages/ti/board/diag/csirx/src/csirx_test_tpr12.h
packages/ti/board/diag/current_monitor/src/current_monitor_test.c
packages/ti/board/diag/current_monitor/src/current_monitor_test.h
packages/ti/board/diag/eeprom/src/eeprom_test_v2.c
packages/ti/board/diag/eeprom/src/eeprom_test_v2.h
packages/ti/board/diag/exp_header/build/am64x_evm/gpio_test_header_config.c
packages/ti/board/diag/exp_header/src/gpio_test_header.c
packages/ti/board/diag/led/src/led_test.c
packages/ti/board/diag/led_industrial/src/led_industrial_test.c
packages/ti/board/diag/mcan/src/mcan_test.c
packages/ti/board/diag/mcan/src/mcan_test.h
packages/ti/board/diag/norflash/src/spi_test.c [changed mode: 0755->0644]
packages/ti/board/diag/oled_display/build/makefile
packages/ti/board/diag/oled_display/src/icek2g_oled.c [deleted file]
packages/ti/board/diag/oled_display/src/oled_bitmap.h [moved from packages/ti/board/diag/oled_display/src/icek2g_oledbitmapDb.h with 100% similarity]
packages/ti/board/diag/oled_display/src/oled_display.c
packages/ti/board/diag/oled_display/src/oled_display.h
packages/ti/board/diag/oled_display/src/oled_test.c [new file with mode: 0644]
packages/ti/board/diag/oled_display/src/oled_test.h [new file with mode: 0644]
packages/ti/board/diag/ospi/src/ospi_test.c
packages/ti/board/diag/ospi/src/ospi_test.h
packages/ti/board/diag/uart/src/uart_diag.c
packages/ti/board/src/am64x_evm/AM64x_pinmux.h
packages/ti/board/src/am64x_evm/AM64x_pinmux_data.c
packages/ti/board/src/am64x_evm/AM64x_pinmux_data_GPMC.c [new file with mode: 0644]
packages/ti/board/src/am64x_evm/AM64x_pinmux_data_icssMII.c [new file with mode: 0644]
packages/ti/board/src/am64x_evm/am64x_evm.syscfg [new file with mode: 0644]
packages/ti/board/src/am64x_evm/am64x_evm_gpmc.syscfg [new file with mode: 0644]
packages/ti/board/src/am64x_evm/am64x_evm_icss.syscfg [new file with mode: 0644]
packages/ti/board/src/am64x_evm/board_clock.c
packages/ti/board/src/am64x_evm/board_ddr.c
packages/ti/board/src/am64x_evm/board_ethernet_config.c
packages/ti/board/src/am64x_evm/board_info.c
packages/ti/board/src/am64x_evm/board_init.c
packages/ti/board/src/am64x_evm/board_lld_init.c
packages/ti/board/src/am64x_evm/board_mmr.c
packages/ti/board/src/am64x_evm/board_pinmux.c
packages/ti/board/src/am64x_evm/board_pll.c
packages/ti/board/src/am64x_evm/include/board_cfg.h
packages/ti/board/src/am64x_evm/include/board_ddrRegInit.h
packages/ti/board/src/am64x_evm/include/board_ethernet_config.h
packages/ti/board/src/am64x_evm/include/board_internal.h
packages/ti/board/src/am64x_evm/include/board_pinmux.h
packages/ti/board/src/am64x_evm/include/board_pll.h
packages/ti/board/src/am64x_evm/src_files_am64x_evm.mk
packages/ti/board/src/flash/board_flash.c
packages/ti/board/src/flash/include/board_flash.h [changed mode: 0755->0644]
packages/ti/board/src/flash/nor/device/gd25b16csag.h [changed mode: 0755->0644]
packages/ti/board/src/flash/nor/device/gd25b64cw2g.h [changed mode: 0755->0644]
packages/ti/board/src/flash/nor/device/w25q16fwsf.h [new file with mode: 0644]
packages/ti/board/src/flash/nor/nor.c
packages/ti/board/src/flash/nor/ospi/nor_ospi.h
packages/ti/board/src/flash/nor/ospi/nor_qspi.c
packages/ti/board/src/flash/nor/ospi/nor_spi_phy_tune.c
packages/ti/board/src/flash/nor/ospi/nor_xspi.c
packages/ti/board/src/flash/nor/ospi/nor_xspi.h
packages/ti/board/src/flash/nor/qspi/nor_qspi.h
packages/ti/board/src/flash/nor/qspi/nor_qspi_v1.c [changed mode: 0755->0644]
packages/ti/board/src/flash/src_files_flash.mk
packages/ti/board/src/tpr12_evm/include/board_cfg.h
packages/ti/board/src/tpr12_qt/board_clock.c [deleted file]
packages/ti/board/src/tpr12_qt/board_ethernet_config.c [deleted file]
packages/ti/board/src/tpr12_qt/board_info.c [deleted file]
packages/ti/board/src/tpr12_qt/board_init.c [deleted file]
packages/ti/board/src/tpr12_qt/board_lld_init.c [deleted file]
packages/ti/board/src/tpr12_qt/board_mmr.c [deleted file]
packages/ti/board/src/tpr12_qt/board_pinmux.c [deleted file]
packages/ti/board/src/tpr12_qt/board_pll.c [deleted file]
packages/ti/board/src/tpr12_qt/include/board_cfg.h [deleted file]
packages/ti/board/src/tpr12_qt/include/board_clock.h [deleted file]
packages/ti/board/src/tpr12_qt/include/board_internal.h [deleted file]
packages/ti/board/src/tpr12_qt/include/board_pinmux.h [deleted file]
packages/ti/board/src/tpr12_qt/include/board_pll.h [deleted file]
packages/ti/board/src/tpr12_qt/include/board_utils.h [deleted file]
packages/ti/board/src/tpr12_qt/include/pinmux.h [deleted file]
packages/ti/board/src/tpr12_qt/src_files_tpr12_qt.mk [deleted file]
packages/ti/board/utils/board_utils_component.mk
packages/ti/board/utils/uniflash/target/build/uart_make.mk [changed mode: 0755->0644]
packages/ti/board/utils/uniflash/target/include/flash_programmer.h [changed mode: 0755->0644]
packages/ti/board/utils/uniflash/target/soc/k3/linker_am64x.cmd [new file with mode: 0644]
packages/ti/board/utils/uniflash/target/soc/k3/soc.c
packages/ti/board/utils/uniflash/target/soc/k3/soc_k3.h
packages/ti/board/utils/uniflash/target/soc/k3/ufp_init.asm [new file with mode: 0644]
packages/ti/board/utils/uniflash/target/soc/k3/ufp_misc.asm [new file with mode: 0644]
packages/ti/board/utils/uniflash/target/soc/tpr12/linker.cmd
packages/ti/board/utils/uniflash/target/soc/tpr12/soc.c
packages/ti/board/utils/uniflash/target/src/ospi/ospi.c
packages/ti/board/utils/uniflash/target/src/ospi/ospi.h
packages/ti/board/utils/uniflash/target/src/qspi/qspi.c [changed mode: 0755->0644]
packages/ti/board/utils/uniflash/target/src/qspi/qspi.h [changed mode: 0755->0644]
packages/ti/boot/sbl/board/evmTPR12/sbl_main.c
packages/ti/boot/sbl/board/k3/sbl_main.c
packages/ti/boot/sbl/build/sbl_img.mk
packages/ti/boot/sbl/build/sbl_tpr12_test.mk [changed mode: 0755->0644]
packages/ti/boot/sbl/example/tpr12MulticoreApp/sbl_smp_multicore.c
packages/ti/boot/sbl/sbl_component.mk
packages/ti/boot/sbl/soc/k3/sbl_misc.asm
packages/ti/boot/sbl/soc/k3/sbl_slave_core_boot.c
packages/ti/boot/sbl/soc/k3/sbl_soc_cfg.h
packages/ti/boot/sbl/src/ospi/sbl_ospi.c
packages/ti/boot/sbl/src/qspi/sbl_qspi_boardflash.c
packages/ti/boot/sbl/tools/tpr12SBLImageGen/windows/aarch64-none-elf-objcopy.exe [new file with mode: 0755]
packages/ti/build/am64x/linker_r5_sysbios.lds
packages/ti/build/am64x/sbl_mcux_0_dummy_app.map [new file with mode: 0644]
packages/ti/build/am64x/sbl_mcux_0_dummy_app.rprc
packages/ti/build/am64x/sysbios_r5f.cfg
packages/ti/build/comp_paths.mk
packages/ti/build/makerules/build_config.mk
packages/ti/build/makerules/common.mk
packages/ti/build/makerules/component.mk
packages/ti/build/makerules/env.mk
packages/ti/build/makerules/rules_66.mk
packages/ti/build/makerules/tpr12_x509template.txt [new file with mode: 0755]
packages/ti/build/makerules/tpr12rom_sign_non_secure.ps1 [new file with mode: 0644]
packages/ti/build/pdk_tools_path.mk
packages/ti/build/tpr12/linker_c66.cmd
packages/ti/build/tpr12/linker_c66_baremetal.cmd [new file with mode: 0644]
packages/ti/drv/canfd/.gitignore [new file with mode: 0755]
packages/ti/drv/canfd/Settings.xdc [new file with mode: 0755]
packages/ti/drv/canfd/canfd.h [new file with mode: 0644]
packages/ti/drv/canfd/canfd_component.mk [new file with mode: 0644]
packages/ti/drv/canfd/config_mk.bld [new file with mode: 0644]
packages/ti/drv/canfd/makefile [new file with mode: 0644]
packages/ti/drv/canfd/package.bld [new file with mode: 0644]
packages/ti/drv/canfd/package.xdc [new file with mode: 0644]
packages/ti/drv/canfd/package.xs [new file with mode: 0644]
packages/ti/drv/canfd/soc/canfd_soc.h [moved from packages/ti/board/src/tpr12_qt/include/board_ethernet_config.h with 56% similarity, mode: 0644]
packages/ti/drv/canfd/soc/tpr12/canfd_soc.c [new file with mode: 0644]
packages/ti/drv/canfd/soc/tpr12/canfd_soc.h [moved from packages/ti/board/diag/oled_display/src/icek2g_oled.h with 53% similarity]
packages/ti/drv/canfd/src/canfd.c [new file with mode: 0644]
packages/ti/drv/canfd/src/canfd_internal.h [new file with mode: 0644]
packages/ti/drv/canfd/src/makefile [new file with mode: 0644]
packages/ti/drv/canfd/test/makefile [new file with mode: 0644]
packages/ti/drv/canfd/test/src/main_canfd_test.c [new file with mode: 0644]
packages/ti/drv/canfd/test/tpr12/mss.cfg [new file with mode: 0644]
packages/ti/drv/canfd/test/tpr12/mss_canfd_linker.cmd [new file with mode: 0644]
packages/ti/drv/canfd/test/tpr12/r5_mpu.xs [new file with mode: 0644]
packages/ti/drv/gpio/test/led_blink/src/GPIO_board.h
packages/ti/drv/gpio/test/led_blink/src/main_led_blink.c
packages/ti/drv/gpmc/example/makefile [new file with mode: 0755]
packages/ti/drv/gpmc/example/src/main_gpmc_probing_example.c [new file with mode: 0755]
packages/ti/drv/gpmc/gpmc_component.mk
packages/ti/drv/icss_emac/build/makefile.mk
packages/ti/drv/icss_emac/firmware/icss_dualemac/config/icss_emacFwVersion.h
packages/ti/drv/icss_emac/firmware/icss_dualemac/src/emac_MII_Rcv.asm
packages/ti/drv/icss_emac/firmware/icss_dualemac/src/firmware_version.h
packages/ti/drv/icss_emac/firmware/icss_dualemac/src/icss_emacSwitch.h
packages/ti/drv/icss_emac/firmware/icss_dualemac/src/micro_scheduler.asm
packages/ti/drv/icss_emac/firmware/icss_switch/src/icss_switch.h
packages/ti/drv/ipc/examples/common/am64x/ipc_override.cfg
packages/ti/drv/ipc/examples/common/am64x/linker_a53_mpu1_0_sysbios.lds
packages/ti/drv/ipc/examples/common/am64x/linker_m4f_m4f_0.lds
packages/ti/drv/ipc/examples/common/am64x/linker_r5f_mcu1_0_sbl_sysbios.lds [new file with mode: 0644]
packages/ti/drv/ipc/examples/common/am65xx/ipc_override.cfg
packages/ti/drv/ipc/examples/common/j7200/ipc_override.cfg
packages/ti/drv/ipc/examples/common/j7200/linker_r5f_mcu1_0_sysbios.lds
packages/ti/drv/ipc/examples/common/j7200/linker_r5f_mcu1_1_sysbios.lds
packages/ti/drv/ipc/examples/common/j7200/linker_r5f_mcu2_0_sysbios.lds
packages/ti/drv/ipc/examples/common/j7200/linker_r5f_mcu2_1_sysbios.lds
packages/ti/drv/ipc/examples/common/j7200/r5_mpu_ipc.xs
packages/ti/drv/ipc/examples/common/j7200/sysbios_r5f.cfg
packages/ti/drv/ipc/examples/common/j721e/ipc_override.cfg
packages/ti/drv/ipc/examples/common/j721e/linker_r5f_mcu1_0_sysbios.lds
packages/ti/drv/ipc/examples/common/j721e/linker_r5f_mcu1_1_sysbios.lds
packages/ti/drv/ipc/examples/common/j721e/linker_r5f_mcu2_0_sysbios.lds
packages/ti/drv/ipc/examples/common/j721e/linker_r5f_mcu2_1_sysbios.lds
packages/ti/drv/ipc/examples/common/j721e/linker_r5f_mcu3_0_sysbios.lds
packages/ti/drv/ipc/examples/common/j721e/linker_r5f_mcu3_1_sysbios.lds
packages/ti/drv/ipc/examples/common/j721e/r5_mpu_ipc.xs
packages/ti/drv/ipc/examples/common/j721e/sysbios_r5f.cfg
packages/ti/drv/ipc/examples/common/src/ipc_testsetup_baremetal.c
packages/ti/drv/ipc/examples/ex05_bios_multicore_echo_negative_test/ipc_neg_testsetup.c
packages/ti/drv/ipc/examples/ipc_perf_test/am64x/sysbios_r5f_sbl.cfg [new file with mode: 0644]
packages/ti/drv/ipc/examples/ipc_perf_test/makefile.mk
packages/ti/drv/ipc/ipc_component.mk
packages/ti/drv/ipc/src/ipc_mailbox.c
packages/ti/drv/ipc/src/ipc_mailbox.h
packages/ti/drv/ipc/src/ipc_mailbox_lld.c
packages/ti/drv/ipc/src/ipc_mailbox_lld.h
packages/ti/drv/ipc/src/ipc_virtio.c
packages/ti/drv/mailbox/soc/am64x/mailbox_soc.c [changed mode: 0755->0644]
packages/ti/drv/mibspi/src/MIBSPI_api.c
packages/ti/drv/mmcsd/test/MMCSD_Baremetal_Regression_TestApp/makefile
packages/ti/drv/mmcsd/test/MMCSD_EMMC_Baremetal_Regression_TestApp/makefile
packages/ti/drv/sciclient/soc/V0/sciclient_defaultBoardcfg_hexhs.h
packages/ti/drv/sciclient/soc/V0/sciclient_defaultBoardcfg_pm_hexhs.h
packages/ti/drv/sciclient/soc/V0/sciclient_defaultBoardcfg_rm_hexhs.h
packages/ti/drv/sciclient/soc/V0/sciclient_defaultBoardcfg_rm_linux_hexhs.h
packages/ti/drv/sciclient/soc/V0/sciclient_defaultBoardcfg_security_hexhs.h
packages/ti/drv/sciclient/soc/V0/sciclient_firmware_V0-hs-enc.h
packages/ti/drv/sciclient/soc/V0/sciclient_firmware_V0.h
packages/ti/drv/sciclient/soc/V0/sciclient_firmware_V0_sr2-hs-enc.h
packages/ti/drv/sciclient/soc/V0/sciclient_firmware_V0_sr2.h
packages/ti/drv/sciclient/soc/V0/sysfw-hs-enc.bin
packages/ti/drv/sciclient/soc/V0/sysfw.bin
packages/ti/drv/sciclient/soc/V0/sysfw_sr2-hs-enc.bin
packages/ti/drv/sciclient/soc/V0/sysfw_sr2.bin
packages/ti/drv/sciclient/soc/V1/sciclient_defaultBoardcfg_hexhs.h
packages/ti/drv/sciclient/soc/V1/sciclient_defaultBoardcfg_pm_hexhs.h
packages/ti/drv/sciclient/soc/V1/sciclient_defaultBoardcfg_rm_hexhs.h
packages/ti/drv/sciclient/soc/V1/sciclient_defaultBoardcfg_security_hexhs.h
packages/ti/drv/sciclient/soc/V1/sciclient_firmware_V1-hs-enc.h
packages/ti/drv/sciclient/soc/V1/sciclient_firmware_V1.h
packages/ti/drv/sciclient/soc/V1/tifs-hs-enc.bin
packages/ti/drv/sciclient/soc/V1/tifs.bin
packages/ti/drv/sciclient/soc/V2/sciclient_defaultBoardcfg_hexhs.h
packages/ti/drv/sciclient/soc/V2/sciclient_defaultBoardcfg_pm_hexhs.h
packages/ti/drv/sciclient/soc/V2/sciclient_defaultBoardcfg_rm_hexhs.h
packages/ti/drv/sciclient/soc/V2/sciclient_defaultBoardcfg_security_hexhs.h
packages/ti/drv/sciclient/soc/V2/sciclient_firmware_V2.h
packages/ti/drv/sciclient/soc/V2/tifs.bin
packages/ti/drv/sciclient/soc/V3/sciclient_defaultBoardcfg_hexhs.h
packages/ti/drv/sciclient/soc/V3/sciclient_defaultBoardcfg_pm_hexhs.h
packages/ti/drv/sciclient/soc/V3/sciclient_defaultBoardcfg_rm.c
packages/ti/drv/sciclient/soc/V3/sciclient_defaultBoardcfg_rm_hex.h
packages/ti/drv/sciclient/soc/V3/sciclient_defaultBoardcfg_rm_hexhs.h
packages/ti/drv/sciclient/soc/V3/sciclient_defaultBoardcfg_security_hexhs.h
packages/ti/drv/sciclient/soc/V3/sciclient_firmware_V3-vlab.h
packages/ti/drv/sciclient/soc/V3/sciclient_firmware_V3-zebu.h
packages/ti/drv/sciclient/soc/V3/sciclient_firmware_V3.h
packages/ti/drv/sciclient/soc/V3/sciclient_secureProxyCfg.c
packages/ti/drv/sciclient/soc/V3/sciclient_soc_priv.h
packages/ti/drv/sciclient/soc/V3/sysfw-vlab.bin
packages/ti/drv/sciclient/soc/V3/sysfw-zebu.bin
packages/ti/drv/sciclient/soc/V3/sysfw.bin [new file with mode: 0644]
packages/ti/drv/sciclient/soc/sysfw/binaries/scripts/sysfw_trace_rules.json
packages/ti/drv/sciclient/soc/sysfw/binaries/sysfw-trace-w2020.17-am64x.json [moved from packages/ti/drv/sciclient/soc/sysfw/binaries/sysfw-trace-v2020.08b.json with 99% similarity]
packages/ti/drv/sciclient/soc/sysfw/binaries/system-firmware-public-documentation/2_tisci_msgs/pm/clocks.html
packages/ti/drv/sciclient/soc/sysfw/binaries/system-firmware-public-documentation/2_tisci_msgs/rm/rm_udmap.html
packages/ti/drv/sciclient/soc/sysfw/binaries/system-firmware-public-documentation/2_tisci_msgs/security/dkek_management.html
packages/ti/drv/sciclient/soc/sysfw/binaries/system-firmware-public-documentation/2_tisci_msgs/security/runtime_debug.html
packages/ti/drv/sciclient/soc/sysfw/binaries/system-firmware-public-documentation/2_tisci_msgs/security/sec_cert_format.html
packages/ti/drv/sciclient/soc/sysfw/binaries/system-firmware-public-documentation/3_boardcfg/BOARDCFG_RM.html
packages/ti/drv/sciclient/soc/sysfw/binaries/system-firmware-public-documentation/5_soc_doc/index.html
packages/ti/drv/sciclient/soc/sysfw/binaries/system-firmware-public-documentation/_images/swimpact.png
packages/ti/drv/sciclient/soc/sysfw/binaries/system-firmware-public-documentation/_sources/2_tisci_msgs/rm/rm_udmap.rst.txt
packages/ti/drv/sciclient/soc/sysfw/binaries/system-firmware-public-documentation/_sources/2_tisci_msgs/security/dkek_management.rst.txt
packages/ti/drv/sciclient/soc/sysfw/binaries/system-firmware-public-documentation/_sources/2_tisci_msgs/security/runtime_debug.rst.txt
packages/ti/drv/sciclient/soc/sysfw/binaries/system-firmware-public-documentation/_static/pygments.css
packages/ti/drv/sciclient/soc/sysfw/binaries/system-firmware-public-documentation/searchindex.js
packages/ti/drv/sciclient/soc/sysfw/binaries/ti-sci-firmware-am64x-gp-vlab.bin
packages/ti/drv/sciclient/soc/sysfw/binaries/ti-sci-firmware-am64x-gp-zebu.bin
packages/ti/drv/sciclient/soc/sysfw/binaries/ti-sci-firmware-am64x-gp.bin [new file with mode: 0644]
packages/ti/drv/sciclient/soc/sysfw/include/am65x/tisci_resasg_types.h
packages/ti/drv/sciclient/soc/sysfw/include/tisci/rm/tisci_rm_udmap.h
packages/ti/drv/sciclient/soc/sysfw/include/tisci/security/tisci_dkek.h
packages/ti/drv/sciclient/src/sciclient/sciclient.c
packages/ti/drv/sciclient/src/sciclient/sciclient_direct.c
packages/ti/drv/sciclient/src/sciclient/sciclient_dummy.c
packages/ti/drv/sciclient/src/sciclient/sciclient_rm_irq.c
packages/ti/drv/sciclient/src/sciserver/sciserver.c
packages/ti/drv/sciclient/tools/bin2c/bin2c.out
packages/ti/drv/sciclient/tools/ccsLoadDmsc/am64x/launch.js
packages/ti/drv/sciclient/tools/ccsLoadDmsc/am64x/launch_qt.js [deleted file]
packages/ti/drv/sciclient/tools/ccsLoadDmsc/am64x/launch_zebu.js [deleted file]
packages/ti/drv/sciclient/tools/ccsLoadDmsc/am64x/sciclient_ccs_init_mcu1_0_release.xer5f
packages/ti/drv/sciclient/tools/ccsLoadDmsc/am65xx/sciclient_ccs_init_mcu1_0_release.xer5f
packages/ti/drv/sciclient/tools/ccsLoadDmsc/j7200/sciclient_ccs_init_mcu1_0_release.xer5f
packages/ti/drv/sciclient/tools/ccsLoadDmsc/j7200/sciserver_testapp_mcu1_0_release.xer5f
packages/ti/drv/sciclient/tools/ccsLoadDmsc/j721e/sciclient_ccs_init_mcu1_0_release.xer5f
packages/ti/drv/sciclient/tools/ccsLoadDmsc/j721e/sciserver_testapp_mcu1_0_release.xer5f
packages/ti/drv/sciclient/tools/firmwareHeaderGen.sh
packages/ti/drv/sciclient/tools/sysfw_migrate.sh
packages/ti/drv/spi/soc/am64x/SPI_soc.c
packages/ti/drv/spi/spi_component.mk
packages/ti/drv/spi/src/v1/SPI_v1.c
packages/ti/drv/spi/test/ospi_flash/src/main_ospi_flash_test.c
packages/ti/drv/spi/test/qspi_flash/src/Flash_S25FL/S25FL.c
packages/ti/drv/uart/test/src/UART_board.h
packages/ti/drv/uart/test/src/main_uart_test.c
packages/ti/drv/udma/examples/udma_ospi_flash_test/udma_ospi_flash_test.c [changed mode: 0644->0755]
packages/ti/drv/udma/include/udma_ch.h
packages/ti/drv/udma/soc/am64x/udma_rmcfg.c
packages/ti/drv/udma/soc/am64x/udma_soc.c
packages/ti/drv/udma/soc/am65xx/udma_soc.c
packages/ti/drv/udma/soc/j7200/udma_soc.c
packages/ti/drv/udma/soc/j721e/udma_soc.c
packages/ti/drv/udma/src/udma_ch.c
packages/ti/drv/udma/src/udma_rm.c
packages/ti/drv/udma/udma.h
packages/ti/drv/udma/unit_test/udma_ut/makefile
packages/ti/drv/udma/unit_test/udma_ut/rtos/am64x/linker_mcu1_0.lds
packages/ti/drv/udma/unit_test/udma_ut/rtos/am64x/linker_mcu1_1.lds
packages/ti/drv/udma/unit_test/udma_ut/rtos/am64x/linker_mcu2_0.lds
packages/ti/drv/udma/unit_test/udma_ut/rtos/am64x/linker_mcu2_1.lds
packages/ti/drv/udma/unit_test/udma_ut/rtos/am64x/linker_mpu1_0.lds
packages/ti/drv/udma/unit_test/udma_ut/src/soc/am64x/udma_test_soc.c
packages/ti/drv/udma/unit_test/udma_ut/src/soc/am64x/udma_test_soc.h
packages/ti/drv/udma/unit_test/udma_ut/src/udma_test.h
packages/ti/drv/udma/unit_test/udma_ut/src/udma_test_blkcpy.c
packages/ti/drv/udma/unit_test/udma_ut/src/udma_test_ch.c [new file with mode: 0644]
packages/ti/drv/udma/unit_test/udma_ut/src/udma_test_flow.c
packages/ti/drv/udma/unit_test/udma_ut/src/udma_test_ring.c
packages/ti/drv/udma/unit_test/udma_ut/src/udma_testcases.h
packages/ti/drv/udma/unit_test/udma_ut/src/udma_testconfig.h
packages/ti/osal/osal_component.mk
packages/ti/osal/src/nonos/timer/v1/TimerP_nonos.c
packages/ti/osal/test/src/main_osal_test.c

index ffcd721fd088e1b892a461f418434204107ad57e..a296a97a4187195dab3c795346d7934b0c5ec3a2 100755 (executable)
@@ -82,16 +82,66 @@ set PROCESSOR=%6
 \r
 :SOC_K3\r
     @REM Refer to SBL document for core ID value (0, or 4 bellow).\r
+    set CORE_ID=""\r
     if %PROCESSOR% == mpu (\r
-        set BIN_PATH=%APP_PATH%\r
-        set TOOLS_PATH=%PDK_PATH%/ti/boot/sbl/tools\r
-        call %PDK_PATH%/ti/boot/sbl/tools/scripts/K3ImageGen.bat 0 %APP_PATH%/%APP_NAME%.out\r
+        set CORE_ID=0\r
     )\r
     if %PROCESSOR% == mcu (\r
+        set CORE_ID=4\r
+    )\r
+    if %PROCESSOR% == mpu1_0 (\r
+        set CORE_ID=0\r
+    )\r
+    if %PROCESSOR% == mpu1_1 (\r
+        set CORE_ID=1\r
+    )\r
+    if %PROCESSOR% == mpu2_0 (\r
+        set CORE_ID=2\r
+    )\r
+    if %PROCESSOR% == mpu2_1 (\r
+        set CORE_ID=3\r
+    )\r
+    if %PROCESSOR% == mcu1_0 (\r
+        set CORE_ID=4\r
+    )\r
+    if %PROCESSOR% == mcu1_1 (\r
+        set CORE_ID=5\r
+    )\r
+    if %PROCESSOR% == mcu2_0 (\r
+        set CORE_ID=6\r
+    )\r
+    if %PROCESSOR% == mcu2_1 (\r
+        set CORE_ID=7\r
+    )\r
+    if %PROCESSOR% == mcu3_0 (\r
+        set CORE_ID=8\r
+    )\r
+    if %PROCESSOR% == mcu3_1 (\r
+        set CORE_ID=9\r
+    )\r
+    if %PROCESSOR% == c66xdsp_1 (\r
+        set CORE_ID=10\r
+    )\r
+    if %PROCESSOR% == c66xdsp_2 (\r
+        set CORE_ID=11\r
+    )\r
+    if %PROCESSOR% == c7x_1 (\r
+        set CORE_ID=12\r
+    )\r
+    if %PROCESSOR% == c7x_2 (\r
+        set CORE_ID=13\r
+    )\r
+    if %PROCESSOR% == m4f_0 (\r
+        set CORE_ID=14\r
+    )\r
+\r
+    if NOT %CORE_ID%=="" (\r
         set BIN_PATH=%APP_PATH%\r
         set TOOLS_PATH=%PDK_PATH%/ti/boot/sbl/tools\r
-        call %PDK_PATH%/ti/boot/sbl/tools/scripts/K3ImageGen.bat 4 %APP_PATH%/%APP_NAME%.out\r
+        set PDK_INSTALL_PATH=%PDK_PATH%\r
+        call %PDK_PATH%/ti/boot/sbl/tools/scripts/K3ImageGen.bat  %CORE_ID% %APP_PATH%/%APP_NAME%\r
     )\r
+\r
     goto ENDSCRIPT\r
 :SOC_K2G\r
     if %PROCESSOR% == arm (\r
index 8ddf9dcb1b43a8fbf4a86fc7971b8b7aa5fe6e1e..20ffb8316a6cb9eff7577ce755ab2eea3f6026df 100755 (executable)
@@ -101,16 +101,50 @@ fi
 
 
 if [ $SOC == am65xx ] || [ $SOC == j721e ] || [ $SOC == am64x ]; then
+    export CORE_ID=""
     #Refer to SBL document for core ID value (0, or 4 bellow).
     if [ "$PROCESSOR" == "mpu" ]; then
-        export BIN_PATH=$APP_PATH
-        export TOOLS_PATH=$PDK_PATH/ti/boot/sbl/tools
-        . $PDK_PATH/ti/boot/sbl/tools/scripts/K3ImageGen.sh 0 $APP_PATH/$APP_NAME.out
+        export CORE_ID=4
     elif [ "$PROCESSOR" == "mcu" ]; then
+        export CORE_ID=0
+    elif [ "$PROCESSOR" == "mpu1_0" ]; then
+        export CORE_ID=0
+    elif [ "$PROCESSOR" == "mpu1_1" ]; then
+        export CORE_ID=1
+    elif [ "$PROCESSOR" == "mpu2_0" ]; then
+        export CORE_ID=2
+    elif [ "$PROCESSOR" == "mpu2_1" ]; then
+        export CORE_ID=3
+    elif [ "$PROCESSOR" == "mcu1_0" ]; then
+        export CORE_ID=4
+    elif [ "$PROCESSOR" == "mcu1_1" ]; then
+        export CORE_ID=5
+    elif [ "$PROCESSOR" == "mcu2_0" ]; then
+        export CORE_ID=6
+    elif [ "$PROCESSOR" == "mcu2_1" ]; then
+        export CORE_ID=7
+    elif [ "$PROCESSOR" == "mcu3_0" ]; then
+        export CORE_ID=8
+    elif [ "$PROCESSOR" == "mcu3_1" ]; then
+        export CORE_ID=9
+    elif [ "$PROCESSOR" == "c66xdsp_1" ]; then
+        export CORE_ID=10
+    elif [ "$PROCESSOR" == "c66xdsp_2" ]; then
+        export CORE_ID=11
+    elif [ "$PROCESSOR" == "c7x_1" ]; then
+        export CORE_ID=12
+    elif [ "$PROCESSOR" == "c7x_1" ]; then
+        export CORE_ID=13
+    elif [ "$PROCESSOR" == "m4f_0" ]; then
+        export CORE_ID=14
+    fi
+
+    if [ "$CORE_ID" == "" ]; then
+        echo Invalid Processor core
+    else
         export BIN_PATH=$APP_PATH
         export TOOLS_PATH=$PDK_PATH/ti/boot/sbl/tools
-        . $PDK_PATH/ti/boot/sbl/tools/scripts/K3ImageGen.sh 4 $APP_PATH/$APP_NAME.out
-    else
-        echo Invalid Processor core
+        export PDK_INSTALL_PATH=$PDK_PATH
+        . $PDK_PATH/ti/boot/sbl/tools/scripts/K3ImageGen.sh $CORE_ID $APP_PATH/$APP_NAME
     fi
 fi
index c22ce59bbf952bf9b98ccaee72b874629744b06b..40c0e73c9549dc12b1bf0b0b136f0ec65a264ca9 100755 (executable)
@@ -119,15 +119,6 @@ extern "C" {
  * Return/Error values                                       *
  *************************************************************/
 
-/**
- * @brief   The return type for board library API calls
- *
- * @details Board library function calls will return this value, which contains
- *          information as to whether the function succeeded or encountered an
- *          error.
- */
-typedef int32_t Board_STATUS;
-
 #include <ti/board/board_cfg.h>
 
 /** Board status OK */
@@ -359,6 +350,7 @@ typedef uint32_t Board_initCfg;
 #define BOARD_INIT_CPSW9G_ETH_PHY       (1 << 26U)
 
 /* Configures ENET Control(mac mode, delay settings) for CPSW/ICCS ports */
+#define BOARD_INIT_ENETCTRL_CPSW3G      (1 << 27U)
 #define BOARD_INIT_ENETCTRL_CPSW2G      (1 << 27U)
 #define BOARD_INIT_ENETCTRL_CPSW9G      (1 << 28U)
 #define BOARD_INIT_ENETCTRL_ICSS        (1 << 29U)
index 480dc802f2c0376af3cda374875fa3ff02339fd6..b4cd73aa8f1e3ae4912ef01c85b74e2e0608f1e4 100644 (file)
 extern "C" {
 #endif
 
+#include <stdint.h>
+#include <ti/csl/hw_types.h>
+
+/**
+ * @brief   The return type for board library API calls
+ *
+ * @details Board library function calls will return this value, which contains
+ *          information as to whether the function succeeded or encountered an
+ *          error.
+ */
+typedef int32_t Board_STATUS;
+
 #if defined(evmAM335x)
 #include <ti/board/src/evmAM335x/include/board_cfg.h>
 
@@ -136,14 +148,12 @@ extern "C" {
 
 #elif defined (am64x_evm)
 #include <ti/board/src/am64x_evm/include/board_cfg.h>
+#include <ti/board/src/am64x_evm/include/board_pinmux.h>
 
 #elif defined (am64x_svb)
 #include <ti/board/src/am64x_svb/include/board_cfg.h>
 
-#elif defined (tpr12_qt)
-#include <ti/board/src/tpr12_qt/include/board_cfg.h>
-
-#elif defined (tpr12_evm)
+#elif defined (tpr12_evm) || defined (tpr12_qt)
 #include <ti/board/src/tpr12_evm/include/board_cfg.h>
 
 #endif
index 3a85614ed1d7ec9af11326bfb026e3c25d7ef5e5..7121891b013245c4f9495aa543e1022ccfb2fa59 100644 (file)
@@ -91,9 +91,9 @@ PACKAGE_SRCS_COMMON += src/devices
 endif
 
 ifeq ($(BOARD),$(filter $(BOARD), tpr12_evm tpr12_qt))
-include $(PDK_BOARD_COMP_PATH)/src/$(BOARD)/src_files_$(BOARD).mk
+include $(PDK_BOARD_COMP_PATH)/src/tpr12_evm/src_files_tpr12_evm.mk
 include $(PDK_BOARD_COMP_PATH)/src/flash/src_files_flash.mk
-PACKAGE_SRCS_COMMON += src/$(BOARD)
+PACKAGE_SRCS_COMMON += src/tpr12_evm
 endif
 
 ifeq ($(BOARD),$(filter $(BOARD), evmAM572x idkAM571x idkAM572x idkAM574x))
index 0281bff35608d5b747e90f5fc8399d3c06631d50..6bcdbd87ab5248f236b86f3bfdf10f6ea55a8958 100755 (executable)
@@ -263,7 +263,7 @@ static int8_t BoardDiag_run_automation_header_test(void)
         return -1;
     }
 
-#if (!(defined(SOC_J721E) || defined(SOC_J7200)))
+#if (!(defined(SOC_J721E) || defined(SOC_J7200) || defined(SOC_AM64X)))
     UART_printf("\n\rWriting the output PORT2 register value "
                 "of I2C Boot mode buffer...\n\r");
     ret = BoardDiag_write_register(handle,
@@ -464,7 +464,7 @@ int main(void)
     {
         return -1;
     }
-#if (defined(SOC_J721E) || defined(SOC_J7200) || defined(SOC_AM65XX) || defined(SOC_AM64X)) && !defined (__aarch64__)
+#if (defined(SOC_J721E) || defined(SOC_J7200) || defined(SOC_AM65XX)) && !defined (__aarch64__)
     /* MCU I2C instance will be active by default for R5 core.
      * Need update HW attrs to enable MAIN I2C instance.
      */
index 30bd6ca748c40950c87f9d9b8bee80d60a58591f..b19865da0cf391c8dd87d2379e876676b18b1445 100755 (executable)
@@ -92,8 +92,8 @@ extern "C" {
 #define BOOTMODE_CFG_SET1_PIN_POS                  (0x00U)
 #define BOOTMODE_CFG_SET2_PIN_POS                  (0x07U)
 #elif defined(SOC_AM64X)
-#define BOOTMODE_CFG_SET1_PIN_POS                  (0x06U) /* SW3 */ //AM64X_TODO: Need to update the value
-#define BOOTMODE_CFG_SET2_PIN_POS                  (0x10U) /* SW2  */ //AM64X_TODO: Need to update the value
+#define BOOTMODE_CFG_SET1_PIN_POS                  (0x3BU) /* SW2 */
+#define BOOTMODE_CFG_SET2_PIN_POS                  (0x00U) /* SW3 */
 #else
 #define BOOTMODE_CFG_SET1_PIN_POS                  (0x06U) /* SW3 */
 #define BOOTMODE_CFG_SET2_PIN_POS                  (0x10U) /* SW2 */
index 39525fe4b2349d73460edc7690de1d52c816bbc5..f2f9fe788084931b48a90b63e1cac96fca6d93a1 100644 (file)
@@ -246,15 +246,11 @@ export board_diag_cpsw_CORE_DEPENDENCY
 export board_diag_cpsw_MAKEFILE
 board_diag_cpsw_PKG_LIST = board_diag_cpsw
 board_diag_cpsw_INCLUDE = $(board_diag_cpsw_PATH)
-board_diag_cpsw_BOARDLIST = j721e_evm j7200_evm
-board_diag_cpsw_$(SOC)_CORELIST = mcu2_0
+board_diag_cpsw_BOARDLIST = tpr12_evm
+board_diag_cpsw_$(SOC)_CORELIST = $(board_diag_$(SOC)_CORELIST)
 export board_diag_cpsw_$(SOC)_CORELIST
 export board_diag_cpsw_SBL_APPIMAGEGEN = $(board_diag_APPIMAGEGEN_CTRL)
-
-# Add CPSW example only if the CPSW component path exists
-ifneq ($(wildcard $(PDK_CPSW_COMP_PATH)),)
 board_diag_EXAMPLE_LIST += board_diag_cpsw
-endif
 
 # csirx
 board_diag_csirx_COMP_LIST = board_diag_csirx
@@ -322,7 +318,7 @@ export board_diag_currentMonitor_CORE_DEPENDENCY
 export board_diag_currentMonitor_MAKEFILE
 board_diag_currentMonitor_PKG_LIST = board_diag_currentMonitor
 board_diag_currentMonitor_INCLUDE = $(board_diag_currentMonitor_PATH)
-board_diag_currentMonitor_BOARDLIST = j721e_evm am65xx_evm am65xx_idk j7200_evm tpr12_evm
+board_diag_currentMonitor_BOARDLIST = j721e_evm am65xx_evm am65xx_idk j7200_evm tpr12_evm am64x_evm
 board_diag_currentMonitor_$(SOC)_CORELIST = $(board_diag_$(SOC)_CORELIST)
 export board_diag_currentMonitor_$(SOC)_CORELIST
 export board_diag_currentMonitor_SBL_APPIMAGEGEN = $(board_diag_APPIMAGEGEN_CTRL)
@@ -702,7 +698,7 @@ export board_diag_mcan_CORE_DEPENDENCY
 export board_diag_mcan_MAKEFILE
 board_diag_mcan_PKG_LIST = board_diag_mcan
 board_diag_mcan_INCLUDE = $(board_diag_mcan_PATH)
-board_diag_mcan_BOARDLIST = j721e_evm am65xx_idk j7200_evm am64x_evm
+board_diag_mcan_BOARDLIST = j721e_evm am65xx_idk j7200_evm am64x_evm tpr12_evm
 board_diag_mcan_$(SOC)_CORELIST = $(board_diag_$(SOC)_CORELIST)
 export board_diag_mcan_$(SOC)_CORELIST
 export board_diag_mcan_SBL_APPIMAGEGEN = $(board_diag_APPIMAGEGEN_CTRL)
index dd5120c93dace30277ce03b37631a97286de7390..f897ba3a0ca9d032c8f971d58dca1deaea0a025b 100755 (executable)
@@ -50,8 +50,8 @@
 #define BOARD_BOOT_SW2_GPIO_PIN2          (0x0010U) /* GPIO0_16 */\r
 #define BOARD_BOOT_SW2_GPIO_PIN3          (0x0011U) /* GPIO0_17 */\r
 #define BOARD_BOOT_SW2_GPIO_PIN4          (0x0012U) /* GPIO0_18 */\r
-#define BOARD_BOOT_SW2_GPIO_PIN5          (0x0013U) /* GPIO0_19 */\r
-#define BOARD_BOOT_SW2_GPIO_PIN6          (0x0014U) /* GPIO0_20 */\r
+#define BOARD_BOOT_SW2_GPIO_PIN5          (0x0052U) /* GPIO0_82 */\r
+#define BOARD_BOOT_SW2_GPIO_PIN6          (0x0053U) /* GPIO0_83 */\r
 #define BOARD_BOOT_SW2_GPIO_PIN7          (0x0015U) /* GPIO0_21 */\r
 #define BOARD_BOOT_SW2_GPIO_PIN8          (0x0016U) /* GPIO0_22 */\r
 \r
index 15e02e61a13a1fcb6810cc153eedd97b2bdfe617..8b6950f6057c877acae3cd9adc846d9e24961564 100755 (executable)
 #include <ti/board/board.h>\r
 \r
 #define BOARD_DIAG_PUSH_BUTTON0                       (0x012B) /* Port1 & Pin43 */\r
-#define BOARD_DIAG_PUSH_BUTTON1                       (0x0006) /* Port0 & pin6 */\r
 \r
 /* GPIO Driver board specific pin configuration structure */\r
 GPIO_PinConfig gpioPinConfigs[] = {\r
     BOARD_DIAG_PUSH_BUTTON0 | GPIO_CFG_INPUT | GPIO_CFG_IN_INT_RISING,\r
-    BOARD_DIAG_PUSH_BUTTON1 | GPIO_CFG_INPUT | GPIO_CFG_IN_INT_RISING\r
 };\r
 \r
 /* GPIO Driver call back functions */\r
index 66d9e235e73607e3d64430aba25253b83e33a7b7..bf14fed8c92178994faa30ab1ce3ee1203ef3d37 100755 (executable)
@@ -183,12 +183,6 @@ int32_t BoardDiag_ButtonTest(keyPadInfo_t *pBoardKeyPad)
     GPIO_init();
 #elif defined(SOC_AM64X)
     GPIO_init();
-
-    GPIO_v0_HwAttrs gpioCfg;
-    GPIO_socGetInitCfg(1, &gpioCfg);
-    gpioCfg.baseAddr = CSL_MCU_GPIO0_BASE;
-    GPIO_socSetInitCfg(1, &gpioCfg);
-    GPIO_init();
 #else
 #if defined(SOC_TPR12)
     GPIO_v2_updateConfig(&GPIO_v2_config);
@@ -435,11 +429,11 @@ int32_t BoardDiag_GetKeyPadInfo(char *pBoardName, keyPadInfo_t *pBoardKeyPad)
 #endif
     /* Check if the board is EVM AM64X by comparing the string read from
        EEPROM. */
-    else if (strncmp("AM64-COMP", pBoardName, BOARD_NAME_LENGTH) == 0U)
+    else if (strncmp("AM64-GPEVM", pBoardName, BOARD_NAME_LENGTH) == 0U)
     {
 
         pBoardKeyPad->buttonSet = 1;
-        pBoardKeyPad->scnKeyNum = 2;
+        pBoardKeyPad->scnKeyNum = 1;
         pBoardKeyPad->pwrKeyNum = 1;
         pBoardKeyPad->pwrKeyIdx = 0;
         buttonStart[0]=5;
@@ -449,9 +443,6 @@ int32_t BoardDiag_GetKeyPadInfo(char *pBoardName, keyPadInfo_t *pBoardKeyPad)
         /* Update the GPIO data for keypad inputs. */
         KeyScn[0].instance=1;
         KeyScn[0].pin=43;
-
-        KeyScn[1].instance=0;
-        KeyScn[1].pin=6;
     }
     else
     {
index 7aab3fd3cc5657b63b5f9630f7e280dc397df22e..fa34b5ca3a88e77fe6f799081c4aed01dd800576 100755 (executable)
@@ -236,7 +236,7 @@ gnu_targets_arm_rtsv8A_startupAsm:
     stp     x21, x22, [sp, #-16]!  /* save SP and LR to stack */\r
 \r
     /* do more initialization in C, go to main() */\r
-    bl      main\r
+    bl      start_boot\r
     mov     x20, x0\r
     ldp     x0, x1, [sp], #16  /* Load SP and LR to stack */\r
     mov     sp, x0\r
index a43fe47fe723d1fc4c743329ce32829c27efa75c..be8fe02a401e4742cfbc9857e279de19f91777bd 100644 (file)
@@ -39,7 +39,8 @@ PAGE 0:
     TCMA_RAM (RX) : origin=0x00000100 length=0x00007F00
     TCMB_RAM (RW) : origin=0x00080000 length=0x00008000
     SBL_RESERVED_L2_RAM (RW)   : origin=0x10200000 length=0x00060000
-    L2_RAM (RW)   : origin=0x10260000 length=0x00090000
+    CPPI_DESC (RW): origin=0x10260000 length=0x00001000
+    L2_RAM (RW)   : origin=0x10261000 length=(0x00090000 - 0x00001000)
     L3_RAM (RW)   : origin=0x88000000 length=0x00300000
     L3_RAM_Ping (RW)   : origin=0x88300000 length=0x0040000
     L3_RAM_Pong (RW)   : origin=0x88340000 length=0x0040000
@@ -79,6 +80,14 @@ SECTIONS{
     .stack   : {} > TCMB_RAM | SBL_RESERVED_L2_RAM | L2_RAM
     .sysmem  : {} > SBL_RESERVED_L2_RAM | L2_RAM
     uartbuffer : {} palign(8) > L3_RAM
+
+    .bss:ENET_CPPI_DESC        (NOLOAD) {} ALIGN (128) > CPPI_DESC
+    /* For Ethernet packet memory*/
+    .bss:ENET_DMA_DESC_MEMPOOL (NOLOAD) {} ALIGN (128) > L3_RAM
+    .bss:ENET_DMA_RING_MEMPOOL (NOLOAD) {} ALIGN (128) > L3_RAM
+    .bss:ENET_DMA_PKT_MEMPOOL  (NOLOAD) {} ALIGN (128) > L3_RAM
+    .bss:ENET_DMA_OBJ_MEM      (NOLOAD) {} ALIGN (128) > L3_RAM
+
     .irqStack  : {. = . + __IRQ_STACK_SIZE;} align(4)    > L2_RAM  (HIGH)
     RUN_START(__IRQ_STACK_START)
     RUN_END(__IRQ_STACK_END)
index 6c6ade6fe98cb162d29ff0b031b865eace9130cd..7e37b332311fd57ca07af3e722a27a9cf8da2472 100755 (executable)
@@ -54,7 +54,7 @@ EXTERNAL_INTERFACES =
 XDC_CFG_FILE_mpu1_0 =\r
 XDC_CFG_FILE_mcu1_0 =\r
 \r
-SRCDIR = ../../../../drv/cpsw/examples/cpsw_loopback_test ../src ../../common/$(SOC) ./$(BOARD)\r
+SRCDIR = ../src  ../../common/$(SOC) ./$(BOARD)\r
 INCDIR = ../../../../board ../src ../../../src/$(BOARD)/include ../../../src/$(BOARD) ../../../src/flash ../../common/$(SOC) ../../../../csl\r
 \r
 # List all the external components/interfaces, whose interface header files\r
@@ -63,7 +63,7 @@ INCLUDE_EXTERNAL_INTERFACES = pdk
 \r
 # List all the components required by the application\r
 COMP_LIST_COMMON = $(PDK_COMMON_BAREMETAL_COMP)\r
-COMP_LIST_COMMON += cpsw cpswsoc cpsw_apputils\r
+COMP_LIST_COMMON += enet enetsoc enetphy enet_example_utils_baremetal\r
 \r
 # Common source files and CFLAGS across all platforms and cores\r
 PACKAGE_SRCS_COMMON = ../src makefile\r
@@ -73,7 +73,11 @@ PACKAGE_SRCS_COMMON += ../../create_sd.bat ../../create_sd.sh
 \r
 SRCS_COMMON += cpsw_eth_test.c diag_common_cfg.c\r
 \r
-CFLAGS_LOCAL_COMMON = $(PDK_CFLAGS) -DDIAG_$(TESTMODE) $(BOARD_DIAG_CFLAGS) -DCPSW_CFG_ASSERT_ENABLE -DCPSW_CFG_PRINT_ENABLE -DUART_ENABLED -DCPSW_TRACE_CFG_TRACE_LEVEL=4 -DCPSW_CFG_DEV_ERROR -DCPSWDMA_INSTRUMENTATION_ENABLED\r
+CFLAGS_LOCAL_COMMON += $(PDK_CFLAGS) -DDIAG_$(TESTMODE) $(BOARD_DIAG_CFLAGS) $(ENET_CFLAGS)\r
+\r
+ifeq ($(CORE),$(filter $(CORE), mcu1_0))\r
+EXTERNAL_LNKCMD_FILE_LOCAL = ../../common/$(SOC)/linker_$(CORE).lds\r
+endif\r
 \r
 # Include common make files\r
 ifeq ($(MAKERULEDIR), )\r
index c42fd4dc97d6d7cf6541a83bdf93b0aef368d34c..f4c4aa8d935fa47da75302260308249a8ff8d168 100644 (file)
-/******************************************************************************\r
- * Copyright (c) 2019 Texas Instruments Incorporated - http://www.ti.com\r
- *\r
- *  Redistribution and use in source and binary forms, with or without\r
- *  modification, are permitted provided that the following conditions\r
- *  are met:\r
- *\r
- *    Redistributions of source code must retain the above copyright\r
- *    notice, this list of conditions and the following disclaimer.\r
- *\r
- *    Redistributions in binary form must reproduce the above copyright\r
- *    notice, this list of conditions and the following disclaimer in the\r
- *    documentation and/or other materials provided with the\r
- *    distribution.\r
- *\r
- *    Neither the name of Texas Instruments Incorporated nor the names of\r
- *    its contributors may be used to endorse or promote products derived\r
- *    from this software without specific prior written permission.\r
- *\r
- *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\r
- *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\r
- *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
- *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT\r
- *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,\r
- *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\r
- *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
- *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
- *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\r
- *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE\r
- *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
- *\r
- *****************************************************************************/\r
-/**\r
- *  \file   cpsw_test.c\r
- *\r
- *  \brief  CPSW ethernet diagnostic test file\r
- *\r
- *  Targeted Functionality: Verification of basic functionality of\r
- *  CPSW Ethernet interface.\r
- *\r
- *  Operation: This is the Loopback test code for the Ethernet Interface.\r
- *  The test code showcases usage of the CPSW Driver exported API for\r
- *  sending/receiving Ethernet packets.\r
- *\r
- *  Supported SoCs: J721E.\r
- *\r
- *  Supported Platforms:j721e_evm.\r
- *\r
- */\r
-\r
-/* Test application local header file */\r
-#include "cpsw_eth_test.h"\r
-\r
-static volatile bool txSem = false;\r
-static volatile bool rxSem = false;\r
-\r
-/* Broadcast address */\r
-static uint8_t bcastAddr[CPSW_MAC_ADDR_LEN] =\r
-        { 0xffU, 0xffU, 0xffU, 0xffU, 0xffU, 0xffU };\r
-\r
-/* CPSW configuration */\r
-static CpswDma_OpenTxChPrms   cpswTxChCfg;\r
-\r
-static CpswDma_OpenRxFlowPrms cpswRxFlowCfg;\r
-\r
-static cpsw_Obj gCpswLpbkObj = {\r
-#if defined(SOC_J721E)\r
-    .cpswType = CPSW_9G,\r
-#else\r
-    .cpswType = CPSW_5G,\r
-#endif\r
-};\r
-\r
-/**\r
- * \brief   CPSW receive ISR function\r
- *\r
- * \param   hUdmaEvt     [IN]   UDMA event handle\r
- * \param   eventType    [IN]   Event type\r
- * \param   appData      [IN]   Pointer to application data\r
- *\r
- */\r
-static void BoardDiag_cpswRxIsrFxn(void *appData)\r
-{\r
-    rxSem = true;\r
-}\r
-\r
-/**\r
- * \brief   CPSW transmit ISR function\r
- *\r
- * \param   hUdmaEvt     [IN]   UDMA event handle\r
- * \param   eventType    [IN]   Event type\r
- * \param   appData      [IN]   Pointer to application data\r
- *\r
- */\r
-static void BoardDiag_cpswTxIsrFxn(void *appData)\r
-{\r
-    txSem = true;\r
-}\r
-\r
-/**\r
- * \brief   This function is used to queue the received packets to rx ready queue\r
- *\r
- * \return  uint32_t - Receive ready queue count\r
- *\r
- */\r
-static uint32_t BoardDiag_cpswReceivePkts(void)\r
-{\r
-    CpswDma_PktInfoQ rxReadyQ;\r
-    CpswDma_PktInfo *pktInfo;\r
-    int32_t          status;\r
-    uint32_t         rxReadyCnt = 0U;\r
-\r
-    CpswUtils_initQ(&rxReadyQ);\r
-\r
-    /* Retrieve any CPSW packets which are ready */\r
-    status = CpswDma_retrieveRxPackets(gCpswLpbkObj.hRxFlow, &rxReadyQ);\r
-    if (status == CPSW_SOK)\r
-    {\r
-        rxReadyCnt = CpswUtils_getQCount(&rxReadyQ);\r
-        /* Queue the received packet to rxReadyQ and pass new ones from rxFreeQ\r
-        **/\r
-        pktInfo = (CpswDma_PktInfo *) CpswUtils_deQ(&rxReadyQ);\r
-        while (pktInfo != NULL)\r
-        {\r
-            CpswUtils_checkPktState(&pktInfo->pktState,\r
-                                    CPSW_PKTSTATE_MODULE_APP,\r
-                                    CPSW_PKTSTATE_APP_WITH_DRIVER,\r
-                                    CPSW_PKTSTATE_APP_WITH_READYQ);\r
-\r
-            CpswUtils_enQ(&gCpswLpbkObj.rxReadyQ, &pktInfo->node);\r
-            pktInfo = (CpswDma_PktInfo *) CpswUtils_deQ(&rxReadyQ);\r
-        }\r
-    }\r
-    else\r
-    {\r
-        UART_printf("receivePkts() failed to retrieve pkts: %d\n",\r
-                           status);\r
-    }\r
-\r
-    return rxReadyCnt;\r
-}\r
-\r
-/**\r
- * \brief   This function is used to retrieve's any CPSW packets that may be free now\r
- *\r
- * \return  uint32_t - Transmit free queue count\r
- *\r
- */\r
-static uint32_t BoardDiag_cpswRetrieveFreeTxPkts(void)\r
-{\r
-    CpswDma_PktInfoQ txFreeQ;\r
-    CpswDma_PktInfo *pktInfo;\r
-    int32_t          status;\r
-    uint32_t         txFreeQCnt = 0U;\r
-\r
-    CpswUtils_initQ(&txFreeQ);\r
-\r
-    /* Retrieve any CPSW packets that may be free now */\r
-    status = CpswDma_retrieveTxDonePackets(gCpswLpbkObj.hTxCh, &txFreeQ);\r
-    if (status == CPSW_SOK)\r
-    {\r
-        txFreeQCnt = CpswUtils_getQCount(&txFreeQ);\r
-\r
-        pktInfo = (CpswDma_PktInfo *) CpswUtils_deQ(&txFreeQ);\r
-        while (pktInfo != NULL)\r
-        {\r
-            CpswUtils_checkPktState(&pktInfo->pktState,\r
-                                    CPSW_PKTSTATE_MODULE_APP,\r
-                                    CPSW_PKTSTATE_APP_WITH_DRIVER,\r
-                                    CPSW_PKTSTATE_APP_WITH_FREEQ);\r
-\r
-            CpswUtils_enQ(&gCpswLpbkObj.txFreePktInfoQ, &pktInfo->node);\r
-            pktInfo = (CpswDma_PktInfo *) CpswUtils_deQ(&txFreeQ);\r
-        }\r
-    }\r
-    else\r
-    {\r
-        UART_printf("retrieveFreeTxPkts() failed to retrieve pkts: %d\n",\r
-                           status);\r
-    }\r
-\r
-    return txFreeQCnt;\r
-}\r
-\r
-/**\r
- * \brief   CPSW delay function\r
- *\r
- * \param   waitTime     [IN]   Wait time\r
- *\r
- */\r
-static void BoardDiag_cpswWait(uint32_t waitTime)\r
-{\r
-    volatile uint32_t index;\r
-\r
-    /* we multiply waitTime by 10000 as 400MHz R5 takes 2.5ns for single cycle\r
-     * and we assume for loop takes 4 cycles */\r
-    for (index = 0; index < (waitTime*1000); index++);\r
-}\r
-\r
-/**\r
- * \brief   This function is used to initialize the receive ready packet queue\r
- *\r
- * \return  int8_t\r
- *               0 - in case of success\r
- *              -1 - in case of failure.\r
- *\r
- */\r
-static int8_t boarDiag_cpswInitRxReadyPktQ(void)\r
-{\r
-    CpswDma_PktInfoQ rxReadyQ;\r
-    int32_t          status;\r
-    uint32_t         index;\r
-    CpswDma_PktInfo *pPktInfo;\r
-\r
-    CpswUtils_initQ(&gCpswLpbkObj.rxFreeQ);\r
-    CpswUtils_initQ(&gCpswLpbkObj.rxReadyQ);\r
-    CpswUtils_initQ(&rxReadyQ);\r
-\r
-    for (index = 0U; index < CPSW_APPMEMUTILS_NUM_RX_PKTS; index++)\r
-    {\r
-        pPktInfo = CpswAppMemUtils_allocEthPktFxn(&gCpswLpbkObj,\r
-                                                  CPSW_APPMEMUTILS_LARGE_POOL_PKT_SIZE,\r
-                                                  UDMA_CACHELINE_ALIGNMENT);\r
-        if(pPktInfo == NULL)\r
-        {\r
-           UART_printf("CpswAppMemUtils_allocEthPktFxn Failed\n");\r
-           return -1;\r
-        }\r
-\r
-        CPSW_UTILS_SET_PKT_APP_STATE(&pPktInfo->pktState,\r
-                                     CPSW_PKTSTATE_APP_WITH_FREEQ);\r
-        CpswUtils_enQ(&gCpswLpbkObj.rxFreeQ,\r
-                      &pPktInfo->node);\r
-    }\r
-\r
-    /* Retrieve any CPSW packets which are ready */\r
-    status = CpswDma_retrieveRxPackets(gCpswLpbkObj.hRxFlow,\r
-                                       &rxReadyQ);\r
-    if( status != CPSW_SOK )\r
-    {\r
-        UART_printf("Failed to retrive the CPSW RX packets\n");\r
-        return -1;\r
-    }\r
-\r
-    /* There should not be any packet with DMA during init */\r
-    if(CpswUtils_getQCount(&rxReadyQ) != 0U )\r
-    {\r
-        UART_printf("rxReadyQ is not zero,...Exiting\n");\r
-        return -1;\r
-    }\r
-\r
-    CpswAppUtils_validatePacketState(&gCpswLpbkObj.rxFreeQ,\r
-                                     CPSW_PKTSTATE_APP_WITH_FREEQ,\r
-                                     CPSW_PKTSTATE_APP_WITH_DRIVER);\r
-\r
-    CpswAppUtils_submitRxPackets(gCpswLpbkObj.hRxFlow,\r
-                                 &gCpswLpbkObj.rxFreeQ);\r
-    /* Assert here as during init no. of DMA descriptors should be equal to\r
-     * no. of free Ethernet buffers available with app */\r
-\r
-    if(CpswUtils_getQCount(&gCpswLpbkObj.rxFreeQ) != 0)\r
-    {\r
-        UART_printf("rxFreeQ is not '0',...Exiting\n");\r
-        return -1;\r
-    }\r
-\r
-    return 0;\r
-}\r
-\r
-/**\r
- * \brief   This function is used to initialize the free packet\r
- *          info queue with the Ethernet packets to be transmitted.\r
- *\r
- * \return  int8_t\r
- *               0 - in case of success\r
- *              -1 - in case of failure.\r
- *\r
- */\r
-static int8_t BoardDiag_cpswInitTxFreePktQ(void)\r
-{\r
-    CpswDma_PktInfo *pktInfo;\r
-    uint32_t         index;\r
-\r
-    /* Initialize all queues */\r
-    CpswUtils_initQ(&gCpswLpbkObj.txFreePktInfoQ);\r
-\r
-    /* Initialize TX EthPkts and queue them to txFreePktInfoQ */\r
-    for(index = 0U; index < CPSWAPPUTILS_ARRAY_SIZE(gCpswLpbkObj.txFreePktInfo); index++)\r
-    {\r
-        pktInfo = CpswAppMemUtils_allocEthPktFxn(&gCpswLpbkObj,\r
-                                                  CPSW_APPMEMUTILS_LARGE_POOL_PKT_SIZE,\r
-                                                  UDMA_CACHELINE_ALIGNMENT);\r
-\r
-        if(pktInfo == NULL)\r
-        {\r
-            UART_printf("\n"); \r
-        }\r
-        CPSW_UTILS_SET_PKT_APP_STATE(&pktInfo->pktState,\r
-                                     CPSW_PKTSTATE_APP_WITH_FREEQ);\r
-\r
-        CpswUtils_enQ(&gCpswLpbkObj.txFreePktInfoQ,\r
-                      &pktInfo->node);\r
-\r
-    }\r
-\r
-    UART_printf("initQs() txFreePktInfoQ initialized with %d pkts\n",\r
-                 CpswUtils_getQCount(&gCpswLpbkObj.txFreePktInfoQ));\r
-    return 0;\r
-}\r
-\r
-/**\r
- * \brief   This function is used to set the ALE port state to forward.\r
- *\r
- * \param   macAddr     [IN]   host MAC address\r
- *\r
- * \return  int32_t\r
- *               0 - in case of success\r
- *              -1 - in case of failure.\r
- *\r
- */\r
-static int32_t BoardDiag_cpswChangeHostAleEntry(uint8_t macAddr[])\r
-{\r
-    int32_t status;\r
-    Cpsw_IoctlPrms prms;\r
-    CpswAle_AddEntryOutArgs setUcastOutArgs;\r
-    CpswAle_SetUcastEntryInArgs setUcastInArgs;\r
-\r
-    memcpy(&setUcastInArgs.addr.addr[0U],\r
-            macAddr,\r
-            sizeof(setUcastInArgs.addr.addr));\r
-\r
-    setUcastInArgs.addr.vlanId  = 0U;\r
-    setUcastInArgs.info.portNum = 0U;\r
-    setUcastInArgs.info.blocked = false;\r
-    setUcastInArgs.info.secure  = false;\r
-    setUcastInArgs.info.super   = 0U;\r
-    setUcastInArgs.info.ageable = false;\r
-\r
-\r
-    CPSW_IOCTL_SET_INOUT_ARGS(&prms,\r
-                              &setUcastInArgs,\r
-                              &setUcastOutArgs);\r
-\r
-    status = Cpsw_ioctl(gCpswLpbkObj.hCpsw,\r
-                        gCpswLpbkObj.coreId,\r
-                        CPSW_ALE_IOCTL_ADD_UNICAST,\r
-                        &prms);\r
-    if (status != CPSW_SOK)\r
-    {\r
-        UART_printf("Setting the ALE port state to forward failed with error status - %d\n\r", status);\r
-        return status;\r
-    }\r
-\r
-    return status;\r
-}\r
-\r
-/**\r
- * \brief   This function is used for converting the virtual address\r
- *          to physical address\r
- *\r
- * \param   virtAddr   [IN/OUT]   Pointer to virtual address\r
- * \param   appData    [IN]       Pointer to application data\r
- *\r
- * \return  uint64_t  -  CPSW physical address\r
- *\r
- */\r
-static uint64_t BoardDiag_cpswvirtToPhyFx(const void *virtAddr,\r
-                                          void       *appData)\r
-{\r
-    return ((uint64_t)virtAddr);\r
-}\r
-\r
-/**\r
- * \brief   This function is used for converting the physical address\r
- *          to virtual address\r
- *\r
- * \param   phyAddr     [IN]   Pointer to physical address\r
- * \param   appData     [IN]   Pointer to application data\r
- *\r
- * \return  void  -  Pointer to virtual address\r
- *\r
- */\r
-static void *BoardDiag_cpswPhyToVirtFxn(uint64_t phyAddr,\r
-                                        void    *appData)\r
-{\r
-#if defined (__aarch64__)\r
-    uint64_t temp = phyAddr;\r
-#else\r
-    /* R5 is 32-bit machine, need to truncate to avoid void * typecast error */\r
-    uint32_t temp = (uint32_t)phyAddr;\r
-#endif\r
-    return ((void *) temp);\r
-}\r
-\r
-/**\r
- * \brief   This function is used for initialize the ALE submodule.\r
- *\r
- * \param   aleConfig  [IN]   Pointer to ALE configuration structure\r
- *\r
- */\r
-static void BoardDiag_cpswInitAleConfig(CpswAle_Config *aleConfig)\r
-{\r
-    aleConfig->modeFlags =\r
-        (CPSW_ALE_CONFIG_MASK_ALE_MODULE_ENABLE);\r
-    aleConfig->agingConfig.enableAutoAging = TRUE;\r
-    aleConfig->agingConfig.agingPeriodInMs = 1000;\r
-    aleConfig->nwSecCfg.enableVid0Mode = TRUE;\r
-    aleConfig->vlanConfig.aleVlanAwareMode = FALSE;\r
-    aleConfig->vlanConfig.cpswVlanAwareMode = FALSE;\r
-    aleConfig->vlanConfig.unknownUnregMcastFloodMask = CPSW_ALE_ALL_PORTS_MASK;\r
-    aleConfig->vlanConfig.unknownRegMcastFloodMask = CPSW_ALE_ALL_PORTS_MASK;\r
-    aleConfig->vlanConfig.unknownVlanMemberListMask = CPSW_ALE_ALL_PORTS_MASK;\r
-}\r
-\r
-/**\r
- * \brief   This function is used for de-initialize the CPSW module.\r
- *\r
- */\r
-void BoardDiag_cpswClose(void)\r
-{\r
-    int32_t status;\r
-    Cpsw_IoctlPrms prms;\r
-\r
-    Cpsw_GenericPortLinkInArgs args0 = {\r
-        .portNum = gCpswLpbkObj.portNum0,\r
-    };\r
-\r
-\r
-    Cpsw_GenericPortLinkInArgs args1 = {\r
-        .portNum = gCpswLpbkObj.portNum1,\r
-    };\r
-\r
-    CPSW_IOCTL_SET_IN_ARGS(&prms,\r
-                           &gCpswLpbkObj.coreKey);\r
-\r
-    status = Cpsw_ioctl(gCpswLpbkObj.hCpsw,\r
-                        gCpswLpbkObj.coreId,\r
-                        CPSW_IOCTL_DETACH_CORE,\r
-                        &prms);\r
-    if (status != CPSW_SOK)\r
-    {\r
-        UART_printf("close() failed to close MAC port: %d\n", status);\r
-    }\r
-\r
-    CPSW_IOCTL_SET_IN_ARGS(&prms, &args0);\r
-    status = Cpsw_ioctl(gCpswLpbkObj.hCpsw,\r
-                        gCpswLpbkObj.coreId,\r
-                        CPSW_IOCTL_CLOSE_PORT_LINK,\r
-                        &prms);\r
-    if (status != CPSW_SOK)\r
-    {\r
-        UART_printf("close() failed to close MAC port0: %d\n", status);\r
-    }\r
-\r
-    CPSW_IOCTL_SET_IN_ARGS(&prms, &args1);\r
-    status = Cpsw_ioctl(gCpswLpbkObj.hCpsw,\r
-                        gCpswLpbkObj.coreId,\r
-                        CPSW_IOCTL_CLOSE_PORT_LINK,\r
-                        &prms);\r
-    if (status != CPSW_SOK)\r
-    {\r
-        UART_printf("close() failed to close MAC port1: %d\n", status);\r
-    }\r
-\r
-    Cpsw_close(gCpswLpbkObj.hCpsw);\r
-\r
-    Cpsw_deinit(gCpswLpbkObj.cpswType);\r
-}\r
-\r
-\r
-/**\r
- * \brief   This function is used for de-initialize the CPSW DMA driver.\r
- *\r
- */\r
-void BoardDiag_cpswCloseDma(void)\r
-{\r
-    CpswDma_PktInfoQ fqPktInfoQ;\r
-    CpswDma_PktInfoQ cqPktInfoQ;\r
-\r
-    CpswUtils_initQ(&fqPktInfoQ);\r
-    CpswUtils_initQ(&cqPktInfoQ);\r
-\r
-    /* Close RX Flow */\r
-    CpswAppUtils_closeRxFlow(gCpswLpbkObj.hCpsw,\r
-                             gCpswLpbkObj.coreKey,\r
-                             gCpswLpbkObj.coreId,\r
-                             true,\r
-                             &fqPktInfoQ,\r
-                             &cqPktInfoQ,\r
-                             gCpswLpbkObj.rxStartFlowIdx,\r
-                             gCpswLpbkObj.rxFlowIdx,\r
-                             gCpswLpbkObj.hostMacAddr0,\r
-                             gCpswLpbkObj.hRxFlow);\r
-\r
-    CpswAppUtils_freePktInfoQ(&fqPktInfoQ);\r
-    CpswAppUtils_freePktInfoQ(&cqPktInfoQ);\r
-\r
-    /* Close TX channel */\r
-    CpswUtils_initQ(&fqPktInfoQ);\r
-    CpswUtils_initQ(&cqPktInfoQ);\r
-\r
-    CpswAppUtils_closeTxCh(gCpswLpbkObj.hCpsw,\r
-                           gCpswLpbkObj.coreKey,\r
-                           gCpswLpbkObj.coreId,\r
-                           &fqPktInfoQ,\r
-                           &cqPktInfoQ,\r
-                           gCpswLpbkObj.hTxCh,\r
-                           gCpswLpbkObj.txChNum);\r
-\r
-    CpswAppUtils_freePktInfoQ(&fqPktInfoQ);\r
-    CpswAppUtils_freePktInfoQ(&cqPktInfoQ);\r
-\r
-    CpswAppUtils_freePktInfoQ(&gCpswLpbkObj.rxFreeQ);\r
-    CpswAppUtils_freePktInfoQ(&gCpswLpbkObj.txFreePktInfoQ);\r
-\r
-    CpswAppMemUtils_deInit();\r
-}\r
-\r
-/**\r
- * \brief   This function is used to display Mac and Host port statistics\r
- *\r
- */\r
-static void BoardDiag_cpswShowStats(void)\r
-{\r
-    Cpsw_IoctlPrms prms;\r
-    CpswStats_GenericMacPortInArgs inArgs;\r
-    CpswStats_PortStats portStats;\r
-    int32_t status = CPSW_SOK;\r
-\r
-    CPSW_IOCTL_SET_OUT_ARGS(&prms,\r
-                            &portStats);\r
-    status = Cpsw_ioctl(gCpswLpbkObj.hCpsw,\r
-                        gCpswLpbkObj.coreId,\r
-                        CPSW_STATS_IOCTL_GET_HOSTPORT_STATS,\r
-                        &prms);\r
-    if (status != CPSW_SOK)\r
-    {\r
-        UART_printf("CpswApp_showStats() failed to get host stats: %d\n",\r
-                     status);\r
-    }\r
-\r
-    if (status == CPSW_SOK)\r
-    {\r
-        inArgs.portNum = gCpswLpbkObj.portNum0;\r
-        CPSW_IOCTL_SET_INOUT_ARGS(&prms,\r
-                                  &inArgs,\r
-                                  &portStats);\r
-\r
-        status = Cpsw_ioctl(gCpswLpbkObj.hCpsw,\r
-                            gCpswLpbkObj.coreId,\r
-                            CPSW_STATS_IOCTL_GET_MACPORT_STATS,\r
-                            &prms);\r
-        if (status != CPSW_SOK)\r
-        {\r
-            UART_printf("CpswApp_showStats() failed to get MAC stats: %d\n",\r
-                         status);\r
-        }\r
-    }\r
-}\r
-\r
-/**\r
- * \brief   This function is used for CPSW packet transmission\r
- *          and reception\r
- *\r
- * \return  int32_t\r
- *               0 - in case of success\r
- *              -1 - in case of failure.\r
- *\r
- */\r
-int32_t BoardDiag_cpswPktRxTx(void)\r
-{\r
-    CpswDma_PktInfoQ txSubmitQ;\r
-    CpswDma_PktInfo  *pktInfo;\r
-    EthFrame         *frame;\r
-    uint32_t         txRetrievePktCnt;\r
-    uint32_t         loopTxPktCnt;\r
-    uint32_t         totalTxCnt;\r
-    uint32_t         rxReadyCnt;\r
-    uint32_t         loopCnt;\r
-    uint32_t         pktCnt;\r
-    uint32_t         loopRxPktCnt;\r
-    int32_t          status = CPSW_SOK;\r
-\r
-    totalTxCnt = 0U;\r
-    for (loopCnt = 0U; loopCnt < BOARD_DIAG_CPSW_TEST_NUM_LOOP; loopCnt++)\r
-    {\r
-        pktCnt = 0U;\r
-        while (pktCnt < BOARD_DIAG_CPSW_TEST_PTK_NUM)\r
-        {\r
-            loopRxPktCnt = loopTxPktCnt = 0U;\r
-            /* Transmit a single packet */\r
-            CpswUtils_initQ(&txSubmitQ);\r
-\r
-            /* Dequeue one free TX Eth packet */\r
-            pktInfo = (CpswDma_PktInfo *)CpswUtils_deQ(&gCpswLpbkObj.txFreePktInfoQ);\r
-\r
-            while ( NULL != pktInfo )\r
-            {\r
-                pktCnt++;\r
-                /* Fill the TX Eth frame with test content */\r
-                frame = (EthFrame *)pktInfo->bufPtr;\r
-\r
-                memcpy(frame->hdr.dstMac,\r
-                       bcastAddr,\r
-                       CPSW_MAC_ADDR_LEN);\r
-\r
-                memcpy(frame->hdr.srcMac,\r
-                       &gCpswLpbkObj.hostMacAddr0[0U],\r
-                       CPSW_MAC_ADDR_LEN);\r
-\r
-                frame->hdr.etherType = htons(ETHERTYPE_EXPERIMENTAL1);\r
-                memset(&frame->payload[0U],\r
-                       (uint8_t)(0xA5 + pktCnt),\r
-                       BOARD_DIAG_CPSW_TEST_LEN);\r
-                pktInfo->userBufLen = BOARD_DIAG_CPSW_TEST_LEN + sizeof (EthFrameHeader);\r
-                pktInfo->appPriv    = &gCpswLpbkObj;\r
-                CpswUtils_checkPktState(&pktInfo->pktState,\r
-                                        CPSW_PKTSTATE_MODULE_APP,\r
-                                        CPSW_PKTSTATE_APP_WITH_FREEQ,\r
-                                        CPSW_PKTSTATE_APP_WITH_DRIVER);\r
-\r
-                /* Enqueue the packet for later transmission */\r
-                CpswUtils_enQ(&txSubmitQ,\r
-                              &pktInfo->node);\r
-\r
-                if (pktCnt >= BOARD_DIAG_CPSW_TEST_PTK_NUM)\r
-                {\r
-                    break;\r
-                }\r
-                /* Dequeue one free TX Eth packet */\r
-                pktInfo = (CpswDma_PktInfo *)CpswUtils_deQ(&gCpswLpbkObj.txFreePktInfoQ);\r
-            }\r
-\r
-            loopTxPktCnt = CpswUtils_getQCount(&txSubmitQ);\r
-            while (0U != CpswUtils_getQCount(&txSubmitQ))\r
-            {\r
-                uint32_t txCnt = CpswUtils_getQCount(&txSubmitQ);\r
-                status = CpswAppUtils_submitTxPackets(gCpswLpbkObj.hTxCh,\r
-                                                      &txSubmitQ);\r
-                while (txSem != true);\r
-                txSem = false;\r
-\r
-                /* Retrieve TX free packets */\r
-                if (status == CPSW_SOK)\r
-                {\r
-                    txCnt = txCnt - CpswUtils_getQCount(&txSubmitQ);\r
-                    txRetrievePktCnt = 0U;\r
-                    while (txRetrievePktCnt != txCnt)\r
-                    {\r
-                        BOARD_delay(1);\r
-                        txRetrievePktCnt |= BoardDiag_cpswRetrieveFreeTxPkts();\r
-                    }\r
-                }\r
-                else\r
-                {\r
-                    break;\r
-                }\r
-            }\r
-\r
-            /* Wait for packet reception */\r
-            do\r
-            {\r
-                while (rxSem != true);\r
-                rxSem = false;\r
-\r
-                /* Get the packets received so far */\r
-                rxReadyCnt = BoardDiag_cpswReceivePkts();\r
-                if (rxReadyCnt > 0U)\r
-                {\r
-                    /* Consume the received packets and release them */\r
-                    pktInfo = (CpswDma_PktInfo *)CpswUtils_deQ(&gCpswLpbkObj.rxReadyQ);\r
-                    while (pktInfo != NULL)\r
-                    {\r
-                        CpswUtils_checkPktState(&pktInfo->pktState,\r
-                                                CPSW_PKTSTATE_MODULE_APP,\r
-                                                CPSW_PKTSTATE_APP_WITH_READYQ,\r
-                                                CPSW_PKTSTATE_APP_WITH_FREEQ);\r
-\r
-                        /* Consume the packet by just printing its content */\r
-                        frame = (EthFrame *)pktInfo->bufPtr;\r
-                        if (gCpswLpbkObj.printFrame)\r
-                        {\r
-                            CpswAppUtils_printFrame(frame,\r
-                                                    (pktInfo->userBufLen - sizeof (EthFrameHeader)));\r
-                        }\r
-\r
-                        /* Release the received packet */\r
-                        CpswUtils_enQ(&gCpswLpbkObj.rxFreeQ,\r
-                                      &pktInfo->node);\r
-                        pktInfo = (CpswDma_PktInfo *)CpswUtils_deQ(&gCpswLpbkObj.rxReadyQ);\r
-                    }\r
-\r
-                    /*Submit now processed buffers */\r
-                    if (status == CPSW_SOK)\r
-                    {\r
-                        CpswAppUtils_validatePacketState(&gCpswLpbkObj.rxFreeQ,\r
-                                                         CPSW_PKTSTATE_APP_WITH_FREEQ,\r
-                                                         CPSW_PKTSTATE_APP_WITH_DRIVER);\r
-\r
-                        CpswAppUtils_submitRxPackets(gCpswLpbkObj.hRxFlow,\r
-                                                     &gCpswLpbkObj.rxFreeQ);\r
-                    }\r
-                }\r
-                loopRxPktCnt |= rxReadyCnt;\r
-            }\r
-            while (loopRxPktCnt < loopTxPktCnt);\r
-\r
-            totalTxCnt |= loopTxPktCnt;\r
-        }\r
-    }\r
-\r
-    if (status == CPSW_SOK)\r
-    {\r
-        UART_printf("Transmitted & Received %d packets\n", totalTxCnt);\r
-    }\r
-    else\r
-    {\r
-        UART_printf("Failed to transmit/receive packets: %d, transmitted: %d \n",\r
-                    BOARD_DIAG_CPSW_TEST_PTK_NUM, totalTxCnt);\r
-    }\r
-\r
-    return status;\r
-}\r
-\r
-/**\r
- * \brief   This function is used to open the CPSW DMA module\r
- *\r
- * \param   testMode   [IN/OUT]   Pointer to virtual address\r
- *\r
- * \return  int32_t\r
- *               0 - in case of success\r
- *              -1 - in case of failure.\r
- *\r
- */\r
-int32_t BoardDiag_cpswOpenDma(void)\r
-{\r
-    int32_t status = CPSW_SOK;\r
-\r
-    /* Open the CPSW TX channel  */\r
-    CpswDma_initTxChParams(&cpswTxChCfg);\r
-\r
-    cpswTxChCfg.hUdmaDrv  = gCpswLpbkObj.hUdmaDrv;\r
-    cpswTxChCfg.hCbArg    = &gCpswLpbkObj;\r
-    cpswTxChCfg.notifyCb  = BoardDiag_cpswTxIsrFxn;\r
-\r
-    CpswAppUtils_setCommonTxChPrms(&cpswTxChCfg);\r
-\r
-    CpswAppUtils_openTxCh(gCpswLpbkObj.hCpsw,\r
-                          gCpswLpbkObj.coreKey,\r
-                          gCpswLpbkObj.coreId,\r
-                          &gCpswLpbkObj.txChNum,\r
-                          &gCpswLpbkObj.hTxCh,\r
-                          &cpswTxChCfg);\r
-\r
-    BoardDiag_cpswInitTxFreePktQ();\r
-\r
-    if (NULL != gCpswLpbkObj.hTxCh)\r
-    {\r
-        status = CpswDma_enableTxEvent(gCpswLpbkObj.hTxCh);\r
-        if (CPSW_SOK != status)\r
-        {\r
-            /* Free the Ch Num if enable event failed */\r
-            CpswAppUtils_freeTxCh(gCpswLpbkObj.hCpsw,\r
-                                  gCpswLpbkObj.coreKey,\r
-                                  gCpswLpbkObj.coreId,\r
-                                  gCpswLpbkObj.txChNum);\r
-            UART_printf("CpswDma_startTxCh() failed: %d\n", status);\r
-            status = CPSW_EFAIL;\r
-        }\r
-    }\r
-    else\r
-    {\r
-        /* Free the Ch Num if open Tx Ch failed */\r
-        CpswAppUtils_freeTxCh(gCpswLpbkObj.hCpsw,\r
-                              gCpswLpbkObj.coreKey,\r
-                              gCpswLpbkObj.coreId,\r
-                              gCpswLpbkObj.txChNum);\r
-        UART_printf("CpswDma_openTxCh() failed to open: %d\n",\r
-                     status);\r
-        status = CPSW_EFAIL;\r
-    }\r
-\r
-    /* Open the CPSW RX flow  */\r
-    if (status == CPSW_SOK)\r
-    {\r
-        CpswDma_initRxFlowParams(&cpswRxFlowCfg);\r
-        cpswRxFlowCfg.notifyCb  = BoardDiag_cpswRxIsrFxn;\r
-        cpswRxFlowCfg.hUdmaDrv  = gCpswLpbkObj.hUdmaDrv;\r
-        cpswRxFlowCfg.hCbArg    = &gCpswLpbkObj;\r
-\r
-        CpswAppUtils_setCommonRxFlowPrms(&cpswRxFlowCfg);\r
-\r
-        CpswAppUtils_openRxFlow(gCpswLpbkObj.hCpsw,\r
-                                gCpswLpbkObj.coreKey,\r
-                                gCpswLpbkObj.coreId,\r
-                                true,\r
-                                &gCpswLpbkObj.rxStartFlowIdx,\r
-                                &gCpswLpbkObj.rxFlowIdx,\r
-                                &gCpswLpbkObj.hostMacAddr0[0U],\r
-                                &gCpswLpbkObj.hRxFlow,\r
-                                &cpswRxFlowCfg);\r
-\r
-        if (NULL == gCpswLpbkObj.hRxFlow)\r
-        {\r
-            CpswAppUtils_freeRxFlow(gCpswLpbkObj.hCpsw,\r
-                                    gCpswLpbkObj.coreKey,\r
-                                    gCpswLpbkObj.coreId,\r
-                                    gCpswLpbkObj.rxFlowIdx);\r
-            UART_printf("CpswDma_openRxFlow() failed to open: %d\n",\r
-                         status);\r
-            if(gCpswLpbkObj.hRxFlow == NULL)\r
-            {\r
-                return -1;\r
-            }\r
-        }\r
-        else\r
-        {\r
-            CpswAppUtils_print("Host MAC0 address: ");\r
-            CpswAppUtils_printMacAddr(gCpswLpbkObj.hostMacAddr0);\r
-            /* For MAC loopback disable secure flag for the host port entry */\r
-            BoardDiag_cpswChangeHostAleEntry(&gCpswLpbkObj.hostMacAddr0[0U]);\r
-            \r
-            //CpswAppUtils_print("Host MAC1 address: ");\r
-            //CpswAppUtils_printMacAddr(gCpswLpbkObj.hostMacAddr1);\r
-            /* For MAC loopback disable secure flag for the host port entry */\r
-            //BoardDiag_cpswChangeHostAleEntry(&gCpswLpbkObj.hostMacAddr1[0U]);\r
-            \r
-\r
-            /* Submit all ready RX buffers to DMA.*/\r
-            boarDiag_cpswInitRxReadyPktQ();\r
-        }\r
-    }\r
-\r
-    return status;\r
-}\r
-\r
-/**\r
- * \brief   This function is used to open the CPSW driver\r
- *\r
- * \return  int32_t\r
- *               0 - in case of success\r
- *              -1 - in case of failure.\r
- *\r
- */\r
-static int32_t BoardDiag_cpswOpen(uint32_t testMode)\r
-{\r
-    Cpsw_Config    cpswCfg;\r
-    CpswOsal_Prms  osalPrms;\r
-    CpswUtils_Prms utilsPrms;\r
-    int32_t status = CPSW_SOK;\r
-    Cpsw_IoctlPrms prms;\r
-    Cpsw_AttachCoreOutArgs attachCoreOutArgs;\r
-\r
-    /* Set configuration parameters */\r
-    Cpsw_initParams(&cpswCfg);\r
-    cpswCfg.vlanConfig.vlanAware          = false;\r
-    cpswCfg.hostPortConfig.removeCrc      = true;\r
-    cpswCfg.hostPortConfig.padShortPacket = true;\r
-    cpswCfg.hostPortConfig.passCrcErrors  = true;\r
-    CpswAppUtils_initResourceConfig(gCpswLpbkObj.cpswType,\r
-                                    gCpswLpbkObj.coreId,\r
-                                    &cpswCfg.resourceConfig);\r
-    BoardDiag_cpswInitAleConfig(&cpswCfg.aleConfig);\r
-\r
-    cpswCfg.dmaConfig.rxChInitPrms.dmaPriority = UDMA_DEFAULT_RX_CH_DMA_PRIORITY;\r
-\r
-    /* App should open UDMA first as UDMA handle is needed to initialize\r
-     * CPSW RX channel */\r
-    gCpswLpbkObj.hUdmaDrv = CpswAppUtils_udmaOpen(gCpswLpbkObj.cpswType, NULL);\r
-    if(gCpswLpbkObj.hUdmaDrv != NULL)\r
-    {\r
-        cpswCfg.dmaConfig.hUdmaDrv = gCpswLpbkObj.hUdmaDrv;\r
-    }\r
-    else\r
-    {\r
-        UART_printf("Failed to get the UDMA handle\n");\r
-        return -1;\r
-    }\r
-\r
-    /* Initialize CPSW driver with default OSAL, utils */\r
-    utilsPrms.printFxn     = UART_printf;\r
-    utilsPrms.traceFxn     = UART_printf;\r
-    utilsPrms.phyToVirtFxn = &BoardDiag_cpswPhyToVirtFxn;\r
-    utilsPrms.virtToPhyFxn = &BoardDiag_cpswvirtToPhyFx;\r
-\r
-    Cpsw_initOsalPrms(&osalPrms);\r
-\r
-    Cpsw_init(gCpswLpbkObj.cpswType, &osalPrms, &utilsPrms);\r
-\r
-    /* Open the CPSW driver */\r
-    gCpswLpbkObj.hCpsw = Cpsw_open(gCpswLpbkObj.cpswType,\r
-                                   &cpswCfg);\r
-    if(gCpswLpbkObj.hCpsw == NULL)\r
-    {\r
-        UART_printf("BoardDiag_cpswOpen() failed to open: %d\n", status);\r
-        status = CPSW_EFAIL;\r
-    }\r
-\r
-    if(status == CPSW_SOK)\r
-    {\r
-        /* Attach the core with RM */\r
-        CPSW_IOCTL_SET_INOUT_ARGS(&prms,\r
-                                  &gCpswLpbkObj.coreId,\r
-                                  &attachCoreOutArgs);\r
-\r
-        status = Cpsw_ioctl(gCpswLpbkObj.hCpsw,\r
-                            gCpswLpbkObj.coreId,\r
-                            CPSW_IOCTL_ATTACH_CORE,\r
-                            &prms);\r
-        if(status != CPSW_SOK)\r
-        {\r
-            UART_printf("CpswApp_loopbackTest failed CPSW_IOCTL_ATTACH_CORE: %d\n",\r
-                         status);\r
-        }\r
-        else\r
-        {\r
-            gCpswLpbkObj.coreKey = attachCoreOutArgs.coreKey;\r
-        }\r
-    }\r
-\r
-    if(status == CPSW_SOK)\r
-    {\r
-        /* memutils open should happen after Cpsw is opened as it uses CpswUtils_Q\r
-         * functions */\r
-        status = CpswAppMemUtils_init();\r
-        if(status != CPSW_SOK)\r
-        {\r
-            UART_printf("cpsw memutils open function failed\n");\r
-        }\r
-    }\r
-\r
-    if(status == CPSW_SOK)\r
-    {\r
-        Cpsw_OpenPortLinkInArgs linkArgs0 = {\r
-            .portNum = gCpswLpbkObj.portNum0,\r
-        };\r
-        CpswMacPort_Config     *macConfig  = &linkArgs0.macConfig;\r
-        CpswMacPort_LinkConfig *linkConfig = &linkArgs0.linkConfig;\r
-        CpswPhy_Config         *phyConfig  = &linkArgs0.phyConfig;\r
-        CpswMacPort_Interface  *interface  = &linkArgs0.interface;\r
-\r
-        Cpsw_initMacPortParams(macConfig);\r
-\r
-        BoardDiag_cpswChangeHostAleEntry(&gCpswLpbkObj.hostMacAddr0[0U]);\r
-\r
-#if defined(j7200_evm)\r
-        if(testMode == BOARD_DIAG_CPSW_RGMII_TEST)\r
-        {\r
-            /*\r
-             * J7200 EVM has only one RGMII port supported on GESI board.\r
-             * Loopback test is done between GESI RGMII port and one SGMII Ethernet port.\r
-             * Port0 is configured for SGMII and port1 is configured for RGMII.\r
-             */\r
-            CpswAppBoardUtils_setPhyConfigQsgmii(gCpswLpbkObj.cpswType,\r
-                                                 linkArgs0.portNum,\r
-                                                 macConfig,\r
-                                                 interface,\r
-                                                 phyConfig);\r
-        }\r
-        else\r
-        {\r
-            CpswAppBoardUtils_setPhyConfig(gCpswLpbkObj.cpswType,\r
-                                           linkArgs0.portNum,\r
-                                           macConfig,\r
-                                           interface,\r
-                                           phyConfig);\r
-        }\r
-#else\r
-        CpswAppBoardUtils_setPhyConfig(gCpswLpbkObj.cpswType,\r
-                                       linkArgs0.portNum,\r
-                                       macConfig,\r
-                                       interface,\r
-                                       phyConfig);\r
-#endif\r
-        macConfig->enableLoopback = false;\r
-        linkConfig->speed     = CPSW_SPEED_AUTO;\r
-        linkConfig->duplexity = CPSW_DUPLEX_AUTO;\r
-\r
-        Cpsw_OpenPortLinkInArgs linkArgs1 = {\r
-            .portNum = gCpswLpbkObj.portNum1,\r
-        };\r
-\r
-        macConfig = &linkArgs1.macConfig;\r
-        linkConfig = &linkArgs1.linkConfig;\r
-        phyConfig = &linkArgs1.phyConfig;\r
-        interface = &linkArgs1.interface;\r
-\r
-        Cpsw_initMacPortParams(macConfig);\r
-\r
-        BoardDiag_cpswChangeHostAleEntry(&gCpswLpbkObj.hostMacAddr1[0U]);\r
-\r
-#if defined(j7200_evm)\r
-        if(testMode == BOARD_DIAG_CPSW_RGMII_TEST)\r
-        {\r
-            /*\r
-             * J7200 EVM has only one RGMII port supported on GESI board.\r
-             * Loopback test is done between GESI RGMII port and one SGMII Ethernet port.\r
-             * Port0 is configured for SGMII and port1 is configured for RGMII.\r
-             */\r
-            CpswAppBoardUtils_setPhyConfigRgmii(gCpswLpbkObj.cpswType,\r
-                                                linkArgs1.portNum,\r
-                                                macConfig,\r
-                                                interface,\r
-                                                phyConfig);\r
-        }\r
-        else\r
-        {\r
-            CpswAppBoardUtils_setPhyConfig(gCpswLpbkObj.cpswType,\r
-                                           linkArgs1.portNum,\r
-                                           macConfig,\r
-                                           interface,\r
-                                           phyConfig);\r
-        }\r
-#else\r
-        CpswAppBoardUtils_setPhyConfig(gCpswLpbkObj.cpswType,\r
-                                       linkArgs1.portNum,\r
-                                       macConfig,\r
-                                       interface,\r
-                                       phyConfig);\r
-#endif\r
-        if(status == CPSW_PHY_INVALID_PHYADDR)\r
-        {\r
-            UART_printf("PHY configuration failed\n\r");\r
-            return -1;\r
-        }\r
-\r
-        macConfig->enableLoopback = false;\r
-        linkConfig->speed     = CPSW_SPEED_AUTO;\r
-        linkConfig->duplexity = CPSW_DUPLEX_AUTO;\r
-\r
-        CPSW_IOCTL_SET_IN_ARGS(&prms, &linkArgs0);\r
-\r
-        status = Cpsw_ioctl(gCpswLpbkObj.hCpsw,\r
-                            gCpswLpbkObj.coreId,\r
-                            CPSW_IOCTL_OPEN_PORT_LINK,\r
-                            &prms);\r
-        if (status != CPSW_SOK)\r
-        {\r
-            UART_printf("CpswApp_openCpsw() failed to open MAC port: %d\n",\r
-                         status);\r
-        }\r
-\r
-        CPSW_IOCTL_SET_IN_ARGS(&prms, &linkArgs1);\r
-        status = Cpsw_ioctl(gCpswLpbkObj.hCpsw,\r
-                            gCpswLpbkObj.coreId,\r
-                            CPSW_IOCTL_OPEN_PORT_LINK,\r
-                            &prms);\r
-        if(status != CPSW_SOK)\r
-        {\r
-            UART_printf("CpswApp_openCpsw() failed to open MAC port: %d\n",\r
-                         status);\r
-        }\r
-\r
-    }\r
-\r
-    return status;\r
-}\r
-\r
-void BoardDiag_enetPhyEnable(void)\r
-{\r
-    Board_I2cInitCfg_t i2cCfg;\r
-\r
-    i2cCfg.i2cInst   = BOARD_I2C_IOEXP_DEVICE2_INSTANCE;\r
-    i2cCfg.socDomain = BOARD_SOC_DOMAIN_MAIN;\r
-    i2cCfg.enableIntr = false;\r
-    Board_setI2cInitConfig(&i2cCfg);\r
-\r
-    Board_i2cIoExpInit();\r
-\r
-\r
-    Board_i2cIoExpSetPinDirection(BOARD_I2C_IOEXP_DEVICE2_ADDR,\r
-                                  THREE_PORT_IOEXP,\r
-                                  PORTNUM_2,\r
-                                  PIN_NUM_0,\r
-                                  PIN_DIRECTION_OUTPUT);\r
-\r
-    Board_i2cIoExpPinLevelSet(BOARD_I2C_IOEXP_DEVICE2_ADDR,\r
-                              THREE_PORT_IOEXP,\r
-                              PORTNUM_2,\r
-                              PIN_NUM_0,\r
-                              GPIO_SIGNAL_LEVEL_LOW);\r
-\r
-    Board_i2cIoExpSetPinDirection(BOARD_I2C_IOEXP_DEVICE2_ADDR,\r
-                                  THREE_PORT_IOEXP,\r
-                                  PORTNUM_2,\r
-                                  PIN_NUM_1,\r
-                                  PIN_DIRECTION_OUTPUT);\r
-\r
-    Board_i2cIoExpPinLevelSet(BOARD_I2C_IOEXP_DEVICE2_ADDR,\r
-                              THREE_PORT_IOEXP,\r
-                              PORTNUM_2,\r
-                              PIN_NUM_1,\r
-                              GPIO_SIGNAL_LEVEL_HIGH);\r
-}\r
-\r
-/**\r
- * \brief   This function is used to perform the CPSW\r
- *          Ethernet port to port external loopback test\r
- *\r
- * \param   testMode   [IN/OUT]   Pointer to virtual address\r
- *\r
- * \return  int32_t\r
- *               0 - in case of success\r
- *              -1 - in case of failure.\r
- *\r
- */\r
-int32_t BoardDiag_cpswLoopbackTest(uint32_t testMode)\r
-{\r
-    int32_t       status;\r
-    bool          alive;\r
-    uint8_t       index;\r
-\r
-    Cpsw_IoctlPrms prms;\r
-    CpswAle_SetPortStateInArgs setPortStateInArgs;\r
-\r
-    CpswAppBoardUtils_initEthFw();\r
-    CpswAppUtils_enableClocks(gCpswLpbkObj.cpswType);\r
-\r
-    gCpswLpbkObj.coreId = CpswAppSoc_getCoreId();\r
-\r
-    /* Open the CPSW */\r
-    status = BoardDiag_cpswOpen(testMode);\r
-    if (status != CPSW_SOK)\r
-    {\r
-        UART_printf("Failed to open CPSW: %d\n", status);\r
-    }\r
-\r
-    /* Open CPSW DMA driver */\r
-    if (status == CPSW_SOK)\r
-    {\r
-        status = BoardDiag_cpswOpenDma();\r
-        if (status != CPSW_SOK)\r
-        {\r
-            UART_printf("Failed to open CPSW DMA: %d\n", status);\r
-        }\r
-    }\r
-\r
-    /* Enable host port */\r
-    if (status == CPSW_SOK)\r
-    {\r
-        setPortStateInArgs.portNum   = CPSW_ALE_HOST_PORT_NUM;\r
-        setPortStateInArgs.portState = CPSW_ALE_PORTSTATE_FORWARD;\r
-\r
-        CPSW_IOCTL_SET_IN_ARGS(&prms, &setPortStateInArgs);\r
-        prms.outArgs = NULL;\r
-\r
-        status = Cpsw_ioctl(gCpswLpbkObj.hCpsw,\r
-                            gCpswLpbkObj.coreId,\r
-                            CPSW_ALE_IOCTL_SET_PORT_STATE,\r
-                            &prms);\r
-        if (status != CPSW_SOK)\r
-        {\r
-            UART_printf("CpswApp_openCpsw() failed CPSW_ALE_IOCTL_SET_PORT_STATE: %d\n", status);\r
-        }\r
-\r
-        if (status == CPSW_SOK)\r
-        {\r
-            status = Cpsw_ioctl(gCpswLpbkObj.hCpsw,\r
-                                gCpswLpbkObj.coreId,\r
-                                CPSW_HOSTPORT_IOCTL_ENABLE,\r
-                                NULL);\r
-            if (status != CPSW_SOK)\r
-            {\r
-                UART_printf("Failed to enable host port: %d\n", status);\r
-            }\r
-        }\r
-    }\r
-\r
-    /* Show alive PHYs */\r
-    if (status == CPSW_SOK)\r
-    {\r
-        for (index = BOARD_DIAG_CPSW_PHY_START_ADDRESS; index < BOARD_DIAG_CPSW_PHY_END_ADDRESS; index++)\r
-        {\r
-            CPSW_IOCTL_SET_INOUT_ARGS(&prms, &index, &alive);\r
-\r
-            status = Cpsw_ioctl(gCpswLpbkObj.hCpsw,\r
-                                gCpswLpbkObj.coreId,\r
-                                CPSW_MDIO_IOCTL_GET_ALIVE_STATUS,\r
-                                &prms);\r
-            if (status == CPSW_SOK)\r
-            {\r
-                if (alive == true)\r
-                {\r
-                    UART_printf("PHY %d is alive\n", index);\r
-                }\r
-            }\r
-            else\r
-            {\r
-                UART_printf("Failed to get PHY %d alive status: %d\n", index,\r
-                             status);\r
-            }\r
-        }\r
-    }\r
-\r
-    UART_printf("Waiting for link to up for portNum-%d and portNum-%d...\n\r",\r
-                 gCpswLpbkObj.portNum0,\r
-                 gCpswLpbkObj.portNum1);\r
-\r
-    if (status == CPSW_SOK)\r
-    {\r
-\r
-        while (!CpswAppUtils_isPortLinkUp(gCpswLpbkObj.hCpsw,\r
-                                          gCpswLpbkObj.coreId,\r
-                                          gCpswLpbkObj.portNum0))\r
-        {\r
-            BoardDiag_cpswWait(1000);\r
-            /* Cpsw_periodicTick should be called from non-ISR context.\r
-             * Calling Cpsw_periodicTick at regular intervals for port link detect before\r
-             * starting packet RX/TX */\r
-            Cpsw_periodicTick(gCpswLpbkObj.hCpsw);\r
-        }\r
-\r
-        while (!CpswAppUtils_isPortLinkUp(gCpswLpbkObj.hCpsw,\r
-                                          gCpswLpbkObj.coreId,\r
-                                          gCpswLpbkObj.portNum1))\r
-        {\r
-            BoardDiag_cpswWait(1000);\r
-            /* Cpsw_periodicTick should be called from non-ISR context.\r
-             * Calling Cpsw_periodicTick at regular intervals for port link detect before\r
-             * starting packet RX/TX */\r
-            Cpsw_periodicTick(gCpswLpbkObj.hCpsw);\r
-        }\r
-\r
-        UART_printf("Link up for portNum-%d and portNum-%d\n\r",\r
-                     gCpswLpbkObj.portNum0,\r
-                     gCpswLpbkObj.portNum1);\r
-\r
-        BoardDiag_cpswWait(20000);\r
-        UART_printf("Started with the packet rx tx test\n\r");\r
-        status = BoardDiag_cpswPktRxTx();\r
-        if (status != CPSW_SOK)\r
-        {\r
-            UART_printf("Failed to enable host port: %d\n", status);\r
-            return -1;\r
-        }\r
-    }\r
-\r
-    /* Print CPSW statistics of all ports */\r
-    BoardDiag_cpswShowStats();\r
-\r
-    /* Disable host port */\r
-    status = Cpsw_ioctl(gCpswLpbkObj.hCpsw,\r
-                        gCpswLpbkObj.coreId,\r
-                        CPSW_HOSTPORT_IOCTL_DISABLE,\r
-                        NULL);\r
-    if (status != CPSW_SOK)\r
-    {\r
-        UART_printf("Failed to disable host port: %d\n", status);\r
-        return -1;\r
-    }\r
-\r
-    /* Close CPSW DMA driver */\r
-    BoardDiag_cpswCloseDma();\r
-    /* Close CPSW */\r
-    BoardDiag_cpswClose();\r
-    /* Close UDMA driver */\r
-    CpswAppUtils_udmaclose(gCpswLpbkObj.hUdmaDrv);\r
-\r
-    CpswAppUtils_disableClocks(gCpswLpbkObj.cpswType);\r
-    CpswAppBoardUtils_deInit();\r
-\r
-    return 0;\r
-}\r
-\r
-#if defined (j721e_evm)\r
-void BoardDiag_rgmiiPortSelect(void)\r
-{\r
-    uint32_t userInput = 0;\r
-\r
-    UART_printf("Select any one option from below\n\r");\r
-    UART_printf("1 - PRG0 Port Loopback Test\n\r");\r
-    UART_printf("2 - PRG1 Port Loopback Test\n\r");\r
-\r
-    UART_scanFmt("%d", (uint8_t*)&userInput);\r
-\r
-    while((userInput != BOARD_DIAG_CPSW_RGMII_PRG0_TEST) &&\r
-          (userInput != BOARD_DIAG_CPSW_RGMII_PRG1_TEST))\r
-    {\r
-        UART_printf("Invalid userInput, Please try again\n\r");\r
-        UART_scanFmt("%d", &userInput);\r
-    }\r
-\r
-    if(userInput == BOARD_DIAG_CPSW_RGMII_PRG0_TEST)\r
-    {\r
-        gCpswLpbkObj.portNum0 = CPSW_MAC_PORT_2;\r
-        gCpswLpbkObj.portNum1 = CPSW_MAC_PORT_3;\r
-    }\r
-    else\r
-    {\r
-        gCpswLpbkObj.portNum0 = CPSW_MAC_PORT_0;\r
-        gCpswLpbkObj.portNum1 = CPSW_MAC_PORT_7;\r
-    }\r
-}\r
-#else\r
-void BoardDiag_rgmiiPortSelect(void)\r
-{\r
-    gCpswLpbkObj.portNum0 = CPSW_MAC_PORT_0;\r
-    gCpswLpbkObj.portNum1 = CPSW_MAC_PORT_1;\r
-\r
-    Board_serdesCfgQsgmii();\r
-    BoardDiag_enetPhyEnable();\r
-}\r
-#endif\r
-\r
-void BoardDiag_sgmiiPortSelect(void)\r
-{\r
-    uint32_t userInput = 0;\r
-\r
-    UART_printf("Select any one option from below\n\r");\r
-    UART_printf("1 - Port0 & Port1 Loopback Test\n\r");\r
-    UART_printf("2 - Port2 & Port3 Loopback Test\n\r");\r
-\r
-    UART_scanFmt("%d", (uint8_t*)&userInput);\r
-\r
-    while((userInput != BOARD_DIAG_CPSW_SGMII_P0P1_TEST) &&\r
-          (userInput != BOARD_DIAG_CPSW_SGMII_P2P3_TEST))\r
-    {\r
-        UART_printf("Invalid userInput, Please try again\n\r");\r
-        UART_scanFmt("%d", &userInput);\r
-    }\r
-\r
-#if defined (j721e_evm)\r
-    if(userInput == BOARD_DIAG_CPSW_SGMII_P0P1_TEST)\r
-    {\r
-        gCpswLpbkObj.portNum0 = CPSW_MAC_PORT_1;\r
-        gCpswLpbkObj.portNum1 = CPSW_MAC_PORT_4;\r
-    }\r
-    else\r
-    {\r
-        gCpswLpbkObj.portNum0 = CPSW_MAC_PORT_5;\r
-        gCpswLpbkObj.portNum1 = CPSW_MAC_PORT_6;\r
-    }\r
-#else\r
-    if(userInput == BOARD_DIAG_CPSW_SGMII_P0P1_TEST)\r
-    {\r
-        gCpswLpbkObj.portNum0 = CPSW_MAC_PORT_0;\r
-        gCpswLpbkObj.portNum1 = CPSW_MAC_PORT_1;\r
-    }\r
-    else\r
-    {\r
-        gCpswLpbkObj.portNum0 = CPSW_MAC_PORT_2;\r
-        gCpswLpbkObj.portNum1 = CPSW_MAC_PORT_3;\r
-    }\r
-#endif\r
-\r
-    Board_serdesCfgQsgmii();\r
-    BoardDiag_enetPhyEnable();\r
-}\r
-\r
-/**\r
- *  \brief    This function runs CPSW ethernet test\r
- *\r
- *  \return   int8_t\r
- *               0 - in case of success\r
- *              -1 - in case of failure.\r
- *\r
- */\r
-int8_t BoardDiag_CpswEthRunTest(void)\r
-{\r
-    int8_t ret;\r
-    uint32_t userInput = 0;\r
-\r
-    UART_printf  ("************************************************\n");\r
-    UART_printf  ("*             CPSW Ethernet Test               *\n");\r
-    UART_printf  ("************************************************\n");\r
-\r
-    UART_printf("Select any one option from below\n\r");\r
-#if defined (j721e_evm)\r
-    UART_printf("1 - CPSW9G RGMII Ethernet Test\n\r");\r
-    UART_printf("2 - CPSW9G SGMII Ethernet Test\n\r");\r
-#else\r
-    UART_printf("1 - CPSW5G RGMII Ethernet Test\n\r");\r
-    UART_printf("2 - CPSW5G SGMII Ethernet Test\n\r");\r
-#endif\r
-    UART_scanFmt("%d", (uint8_t*)&userInput);\r
-\r
-    if(userInput == BOARD_DIAG_CPSW_RGMII_TEST)\r
-    {\r
-        BoardDiag_rgmiiPortSelect();\r
-    }\r
-    else\r
-    {\r
-        BoardDiag_sgmiiPortSelect();\r
-    }\r
-\r
-    /* Run the loopback test */\r
-    ret = BoardDiag_cpswLoopbackTest(userInput);\r
-\r
-    return ret;\r
-}\r
-\r
-/**\r
- * \brief  CPSW diagnostic test main function\r
- *\r
- *  This function performs board initializations and calls cpsw ethernet test\r
- *\r
- * \return  int\r
- *              0  - in case of success\r
- *             -1  - in case of failure\r
- *\r
- */\r
-int main(void)\r
-{\r
-    Board_initCfg boardCfg;\r
-    Board_STATUS status;\r
-    int8_t ret = 0;\r
-\r
-    Board_PinmuxConfig_t gesiIcssgPinmux;\r
-\r
-    Board_pinmuxGetCfg(&gesiIcssgPinmux);\r
-    gesiIcssgPinmux.autoCfg = BOARD_PINMUX_CUSTOM;\r
-    gesiIcssgPinmux.gesiExp = BOARD_PINMUX_GESI_CPSW;\r
-    Board_pinmuxSetCfg(&gesiIcssgPinmux);\r
-\r
-#ifdef PDK_RAW_BOOT\r
-    boardCfg = BOARD_INIT_MODULE_CLOCK |\r
-               BOARD_INIT_PINMUX_CONFIG |\r
-               BOARD_INIT_UART_STDIO;\r
-#else\r
-    boardCfg = BOARD_INIT_PINMUX_CONFIG |\r
-               BOARD_INIT_UART_STDIO;\r
-#endif\r
-\r
-#if defined (j721e_evm)\r
-    boardCfg |= BOARD_INIT_ENETCTRL_CPSW9G |\r
-                BOARD_INIT_CPSW9G_ETH_PHY;\r
-#else\r
-    boardCfg |= BOARD_INIT_ENETCTRL_CPSW5G |\r
-                BOARD_INIT_CPSW5G_ETH_PHY;\r
-#endif\r
-\r
-    status = Board_init(boardCfg);\r
-    if(status != BOARD_SOK)\r
-    {\r
-        return -1;\r
-    }\r
-\r
-    /* Enable CPSW RGMII MDIO mux */\r
-    status = Board_control(BOARD_CTRL_CMD_SET_GESI_CPSW_MDIO_MUX,\r
-                           NULL);\r
-    if(status != BOARD_SOK)\r
-    {\r
-        return -1;\r
-    }\r
-\r
-    ret = BoardDiag_CpswEthRunTest();\r
-    if(ret == 0)\r
-    {\r
-        UART_printf("CPSW Loopback Test Passed\n\r");\r
-        UART_printf("All tests have passed\n\r");\r
-    }\r
-    else\r
-    {\r
-        UART_printf("CPSW Loopback Test failed\n\r");\r
-    }\r
-\r
-    return ret;\r
-\r
-}\r
+/******************************************************************************
+* Copyright (c) 2020 Texas Instruments Incorporated - http://www.ti.com
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+*
+* Redistributions of source code must retain the above copyright
+* notice, this list of conditions and the following disclaimer.
+*
+* Redistributions in binary form must reproduce the above copyright
+* notice, this list of conditions and the following disclaimer in the
+* documentation and/or other materials provided with the
+* distribution.
+*
+* Neither the name of Texas Instruments Incorporated nor the names of
+* its contributors may be used to endorse or promote products derived
+* from this software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*
+*****************************************************************************/
+
+/**
+ *  \file   cpsw_eth_test.c
+ *
+ *  \brief  CPSW ethernet diagnostic test file
+ *
+ *  Targeted Functionality: Verification of basic functionality of
+ *  CPSW Ethernet interface.
+ *
+ *  Operation: This is the Loopback test code for the Ethernet Interface.
+ *  The test code showcases usage of the CPSW Driver exported API for
+ *  sending/receiving Ethernet packets.
+ *
+ *  Supported SoCs: TPR12.
+ *
+ *  Supported Platforms:tpr12_evm.
+ *
+ */
+
+/* Test application local header file */
+#include "cpsw_eth_test.h"
+
+/* Trasnmitt and receive status variables */
+static volatile bool gTxSem = false;
+static volatile bool gRxSem = false;
+
+/* Enet loopback test object */
+static BoardDiag_EnetLpbkObj_t gEnetLpbk;
+
+/**
+ * \brief   ENET receive ISR function
+ *
+ * \param   void *appData   application data
+ *
+ * \return  NULL
+ */
+static void BoardDiag_enetLpbkRxIsrFxn(void *appData)
+{
+    gRxSem = true;
+}
+
+/**
+ * \brief   ENET transmit ISR function
+ *
+ * \param   void *appData   application data
+ *
+ * \return  NULL
+ */
+static void BoardDiag_enetLpbkTxIsrFxn(void *appData)
+{
+    gTxSem = true;
+}
+
+/**
+ * \brief   This function is used for close the ENET module.
+ *
+ * \param   NULL
+ *
+ * \return  NULL
+ */
+static void BoardDiag_enetLpbkCloseEnet(void)
+{
+    Enet_IoctlPrms prms;
+    int32_t status;
+
+    /* Close port link */
+    ENET_IOCTL_SET_IN_ARGS(&prms, &gEnetLpbk.macPort);
+
+    status = Enet_ioctl(gEnetLpbk.hEnet, gEnetLpbk.coreId,
+                        ENET_PER_IOCTL_CLOSE_PORT_LINK, &prms);
+    if (status != ENET_SOK)
+    {
+        UART_printf("Failed to close port link: %d\n", status);
+    }
+
+#if !defined(SOC_TPR12)
+    /* Detach core */
+    if (status == ENET_SOK)
+    {
+        ENET_IOCTL_SET_IN_ARGS(&prms, &gEnetLpbk.coreKey);
+
+        status = Enet_ioctl(gEnetLpbk.hEnet, gEnetLpbk.coreId,
+                            ENET_PER_IOCTL_DETACH_CORE, &prms);
+        if (status != ENET_SOK)
+        {
+            UART_printf("Failed to detach core key %u: %d\n", gEnetLpbk.coreKey, status);
+        }
+    }
+#endif
+    /* Close Enet driver */
+    Enet_close(gEnetLpbk.hEnet);
+
+    gEnetLpbk.hEnet = NULL;
+}
+
+/**
+ * \brief   This function is used for de-initialize the ENET DMA driver.
+ *
+ * \param   NULL
+ *
+ * \return  NULL
+ */
+static void BoardDiag_enetLpbkCloseDma()
+{
+    EnetDma_PktQ fqPktInfoQ;
+    EnetDma_PktQ cqPktInfoQ;
+
+    EnetQueue_initQ(&fqPktInfoQ);
+    EnetQueue_initQ(&cqPktInfoQ);
+
+    UART_printf("Closing DMA\n");
+    /* There should not be any ready packet */
+    if(EnetQueue_getQCount(&gEnetLpbk.rxReadyQ) != 0)
+    {
+        UART_printf("EnetQueue_getQCount Failed\n");
+        return;
+    }
+
+    /* Close RX Flow */
+    EnetAppUtils_closeRxCh(gEnetLpbk.hEnet,
+                           gEnetLpbk.coreKey,
+                           gEnetLpbk.coreId,
+                           &fqPktInfoQ,
+                           &cqPktInfoQ,
+                           gEnetLpbk.hRxCh,
+                           gEnetLpbk.rxChNum);
+    EnetAppUtils_freePktInfoQ(&fqPktInfoQ);
+    EnetAppUtils_freePktInfoQ(&cqPktInfoQ);
+
+    /* Close TX channel */
+    EnetQueue_initQ(&fqPktInfoQ);
+    EnetQueue_initQ(&cqPktInfoQ);
+
+    EnetAppUtils_closeTxCh(gEnetLpbk.hEnet,
+                           gEnetLpbk.coreKey,
+                           gEnetLpbk.coreId,
+                           &fqPktInfoQ,
+                           &cqPktInfoQ,
+                           gEnetLpbk.hTxCh,
+                           gEnetLpbk.txChNum);
+    EnetAppUtils_freePktInfoQ(&fqPktInfoQ);
+    EnetAppUtils_freePktInfoQ(&cqPktInfoQ);
+
+    EnetAppUtils_freePktInfoQ(&gEnetLpbk.rxFreeQ);
+    EnetAppUtils_freePktInfoQ(&gEnetLpbk.txFreePktInfoQ);
+
+    EnetMem_deInit();
+}
+
+/**
+ * \brief   This function is used to Mac port statistics
+ *
+ * \param   CpswStats_HostPort_2g *st   Cpsw stats
+ *
+ * \return  NULL
+ */
+static void BoardDiag_printMacPortStats2G(CpswStats_MacPort_2g *st)
+{
+    uint32_t i;
+
+    UART_printf("rxGoodFrames            = %d\n", (uint32_t)st->rxGoodFrames);
+    UART_printf("rxBcastFrames           = %d\n", (uint32_t)st->rxBcastFrames);
+    UART_printf("rxOctets                = %d\n", (uint32_t)st->rxOctets);
+    UART_printf("txGoodFrames            = %d\n", (uint32_t)st->txGoodFrames);
+    UART_printf("txBcastFrames           = %d\n", (uint32_t)st->txBcastFrames);
+    UART_printf("txOctets                = %d\n", (uint32_t)st->txOctets);
+    UART_printf("octetsFrames512to1023   = %d\n",
+                (uint32_t)st->octetsFrames512to1023);
+
+    for (i = 0U; i < ENET_ARRAYSIZE((uint32_t)st->txPri); i++)
+    {
+        UART_printf("txPri[%u]                = %d\n", i,
+                    (uint32_t)st->txPri[i]);
+    }
+
+    for (i = 0U; i < ENET_ARRAYSIZE((uint32_t)st->txPriBcnt); i++)
+    {
+        UART_printf("txPriBcnt[%u]            = %d\n", i,
+                    (uint32_t)st->txPriBcnt[i]);
+    }
+}
+
+/**
+ * \brief   This function is used to Host port statistics
+ *
+ * \param   CpswStats_HostPort_2g *st   Cpsw stats
+ *
+ * \return  NULL
+ */
+static void BoardDiag_printHostPortStats2G(CpswStats_HostPort_2g *st)
+{
+    UART_printf("rxGoodFrames            = %d\n", (uint32_t)st->rxGoodFrames);
+    UART_printf("rxBcastFrames           = %u\n", (uint32_t)st->rxBcastFrames);
+    UART_printf("rxOctets                = %d\n", (uint32_t)st->rxOctets);
+    UART_printf("txGoodFrames            = %d\n", (uint32_t)st->txGoodFrames);
+    UART_printf("txBcastFrames           = %d\n", (uint32_t)st->txBcastFrames);
+    UART_printf("txOctets                = %d\n", (uint32_t)st->txOctets);
+    UART_printf("octetsFrames512to1023   = %d\n",
+                (uint32_t)st->octetsFrames512to1023);
+}
+
+/**
+ * \brief   This function is used to display Mac and Host port statistics
+ *
+ * \param   NULL
+ *
+ * \return  NULL
+ *
+ */
+static void BoardDiag_enetLpbkShowCpswStats(void)
+{
+    Enet_IoctlPrms prms;
+    CpswStats_PortStats portStats;
+    int32_t status;
+
+    /* Show host port statistics */
+    ENET_IOCTL_SET_OUT_ARGS(&prms, &portStats);
+    status = Enet_ioctl(gEnetLpbk.hEnet, gEnetLpbk.coreId,
+                        ENET_STATS_IOCTL_GET_HOSTPORT_STATS, &prms);
+    if (status == ENET_SOK)
+    {
+        UART_printf("\n Port 0 Statistics\n");
+        UART_printf("-----------------------------------------\n");
+        BoardDiag_printHostPortStats2G((CpswStats_HostPort_2g *)&portStats);
+        UART_printf("\n");
+    }
+    else
+    {
+        UART_printf("Failed to get host stats: %d\n", status);
+    }
+
+    /* Show MAC port statistics */
+    if (status == ENET_SOK)
+    {
+        ENET_IOCTL_SET_INOUT_ARGS(&prms, &gEnetLpbk.macPort, &portStats);
+        status = Enet_ioctl(gEnetLpbk.hEnet, gEnetLpbk.coreId,
+                            ENET_STATS_IOCTL_GET_MACPORT_STATS, &prms);
+        if (status == ENET_SOK)
+        {
+            UART_printf("\n Port 1 Statistics\n");
+            UART_printf("-----------------------------------------\n");
+            BoardDiag_printMacPortStats2G((CpswStats_MacPort_2g *)&portStats);
+            UART_printf("\n");
+        }
+        else
+        {
+            UART_printf("Failed to get MAC stats: %d\n", status);
+        }
+    }
+}
+
+/**
+ * \brief   This function is used to display Mac address
+ *
+ * \param   uint8_t macAddr[] MAC Address
+ *
+ * \return   NULL
+ *
+ */
+static void BoardDiag_printMacAddr(uint8_t macAddr[])
+{
+    UART_printf("%02x:%02x:%02x:%02x:%02x:%02x\n",
+                       macAddr[0] & 0xFF,
+                       macAddr[1] & 0xFF,
+                       macAddr[2] & 0xFF,
+                       macAddr[3] & 0xFF,
+                       macAddr[4] & 0xFF,
+                       macAddr[5] & 0xFF);
+}
+
+/**
+ * \brief   This function is used to display Mac address
+ *
+ * \param   EthFrame EthFrame[] frame to be displayed
+ *          uint32_t len        length of the frame
+ * \return  NULL
+ *
+ */
+static void BoardDiag_printFrame(EthFrame *frame,
+                                uint32_t len)
+{
+    uint8_t *payload;
+    uint32_t i;
+
+    UART_printf("Dst addr : ");
+    BoardDiag_printMacAddr(&frame->hdr.dstMac[0]);
+
+    UART_printf("Src addr : ");
+    BoardDiag_printMacAddr(&frame->hdr.srcMac[0]);
+
+    if (frame->hdr.etherType == htons(ETHERTYPE_VLAN_TAG))
+    {
+        EthVlanFrame *vlanFrame = (EthVlanFrame *)frame;
+
+        UART_printf("TPID     : 0x%04x\n", 
+                    ntohs(vlanFrame->hdr.tpid) & 0xFFFFU);
+        UART_printf("Priority : %d\n",
+                    (ntohs(vlanFrame->hdr.tci) & 0xFFFFU) >> 13);
+        UART_printf("VLAN Id  : %d\n",
+                    ntohs(vlanFrame->hdr.tci) & 0xFFFU);
+        UART_printf("EtherType: 0x%04x\n",
+                    ntohs(vlanFrame->hdr.etherType) & 0xFFFFU);
+        payload = vlanFrame->payload;
+        len    -= ETH_VLAN_TAG_LEN;
+    }
+    else
+    {
+        UART_printf("EtherType: 0x%04x\n", 
+                    ntohs(frame->hdr.etherType) & 0xFFFFU);
+        payload = frame->payload;
+    }
+
+    UART_printf("Payload  : ");
+    for (i = 0; i < len; i++)
+    {
+        UART_printf("0x%02x ", payload[i]);
+        if (i && (((i + 1) % OCTETS_PER_ROW) == 0))
+        {
+            UART_printf("\n           ");
+        }
+    }
+
+    if (len && ((len % OCTETS_PER_ROW) != 0))
+    {
+        UART_printf("\n");
+    }
+
+    UART_printf("\n");
+}
+
+/**
+ * \brief   This function is used to queue the received packets to rx ready queue
+ *
+ * \param   NULL
+ *
+ * \return  uint32_t - Receive ready queue count
+ *
+ */
+static uint32_t BoardDiag_enetLpbkReceivePkts(void)
+{
+    EnetDma_PktQ rxReadyQ;
+    EnetDma_Pkt *pktInfo;
+    int32_t status;
+    uint32_t rxReadyCnt = 0U;
+
+    EnetQueue_initQ(&rxReadyQ);
+
+    /* Retrieve any CPSW packets which are ready */
+    status = EnetDma_retrieveRxPktQ(gEnetLpbk.hRxCh, &rxReadyQ);
+
+    if (status == ENET_SOK)
+    {
+        rxReadyCnt = EnetQueue_getQCount(&rxReadyQ);
+
+        /* Queue the received packet to rxReadyQ and pass new ones from rxFreeQ
+        **/
+        pktInfo = (EnetDma_Pkt *)EnetQueue_deq(&rxReadyQ);
+        while (pktInfo != NULL)
+        {
+            EnetDma_checkPktState(&pktInfo->pktState,
+                                    ENET_PKTSTATE_MODULE_APP,
+                                    ENET_PKTSTATE_APP_WITH_DRIVER,
+                                    ENET_PKTSTATE_APP_WITH_READYQ);
+
+            EnetQueue_enq(&gEnetLpbk.rxReadyQ, &pktInfo->node);
+            pktInfo = (EnetDma_Pkt *)EnetQueue_deq(&rxReadyQ);
+        }
+    }
+    else
+    {
+        UART_printf("receivePkts() failed to retrieve pkts: %d\n",
+                           status);
+    }
+
+    return rxReadyCnt;
+}
+
+/**
+ * \brief   This function is used to retrieve's any CPSW packets that may be free now
+ *
+ * \param   NULL
+ *
+ * \return  uint32_t - Transmit free queue count
+ *
+ */
+static uint32_t BoardDiag_enetLpbkRetrieveFreeTxPkts(void)
+{
+    EnetDma_PktQ txFreeQ;
+    EnetDma_Pkt *pktInfo;
+    int32_t status;
+    uint32_t txFreeQCnt = 0U;
+
+    EnetQueue_initQ(&txFreeQ);
+
+    /* Retrieve any CPSW packets that may be free now */
+    status = EnetDma_retrieveTxPktQ(gEnetLpbk.hTxCh, &txFreeQ);
+    if (status == ENET_SOK)
+    {
+        txFreeQCnt = EnetQueue_getQCount(&txFreeQ);
+
+        pktInfo = (EnetDma_Pkt *)EnetQueue_deq(&txFreeQ);
+        while (NULL != pktInfo)
+        {
+            EnetDma_checkPktState(&pktInfo->pktState,
+                                    ENET_PKTSTATE_MODULE_APP,
+                                    ENET_PKTSTATE_APP_WITH_DRIVER,
+                                    ENET_PKTSTATE_APP_WITH_FREEQ);
+
+            EnetQueue_enq(&gEnetLpbk.txFreePktInfoQ, &pktInfo->node);
+            pktInfo = (EnetDma_Pkt *)EnetQueue_deq(&txFreeQ);
+        }
+    }
+    else
+    {
+        UART_printf("retrieveFreeTxPkts() failed to retrieve pkts: %d\n",
+                           status);
+    }
+
+    return txFreeQCnt;
+}
+
+/**
+ * \brief   This function is used for CPSW packet transmission
+ *          and reception
+ *
+ * \param   NULL
+ *
+ * \return  int32_t
+ *               0 - in case of success
+ *              -1 - in case of failure.
+ *
+ */
+static int32_t BoardDiag_cpswPktRxTx(void)
+{
+    EnetDma_PktQ txSubmitQ;
+    EnetDma_Pkt *pktInfo;
+    EthFrame *frame;
+    uint32_t txRetrievePktCnt = 0;
+    uint32_t loopTxPktCnt = 0;
+    uint32_t loopRxPktCnt = 0;
+    uint32_t loopCnt = 0, pktCnt = 0;
+    uint32_t rxReadyCnt = 0;
+    int32_t status = ENET_SOK;
+    uint8_t bcastAddr[ENET_MAC_ADDR_LEN] = 
+            {0xffU, 0xffU, 0xffU, 0xffU, 0xffU, 0xffU};
+
+    gEnetLpbk.totalTxCnt = 0U;
+    for (loopCnt = 0U; loopCnt < BOARD_DIAG_ENETLPBK_NUM_ITERATION; loopCnt++)
+    {
+        pktCnt = 0U;
+        while (pktCnt < BOARD_DIAG_ENETLPBK_TEST_PKT_NUM)
+        {
+            loopRxPktCnt = loopTxPktCnt = 0U;
+            /* Transmit a single packet */
+            EnetQueue_initQ(&txSubmitQ);
+
+            /* Dequeue one free TX Eth packet */
+            pktInfo = (EnetDma_Pkt *)EnetQueue_deq(&gEnetLpbk.txFreePktInfoQ);
+
+            while (NULL != pktInfo)
+            {
+                pktCnt++;
+                /* Fill the TX Eth frame with test content */
+                frame = (EthFrame *)pktInfo->bufPtr;
+                memcpy(frame->hdr.dstMac, bcastAddr, ENET_MAC_ADDR_LEN);
+                memcpy(frame->hdr.srcMac, &gEnetLpbk.hostMacAddr[0U],
+                        ENET_MAC_ADDR_LEN);
+                frame->hdr.etherType = htons(ETHERTYPE_EXPERIMENTAL1);
+                memset(&frame->payload[0U], (uint8_t)(0xA5 + pktCnt),
+                        BOARD_DIAG_ENETLPBK_TEST_PKT_LEN);
+                pktInfo->userBufLen = BOARD_DIAG_ENETLPBK_TEST_PKT_LEN +
+                                      sizeof(EthFrameHeader);
+                pktInfo->appPriv    = &gEnetLpbk;
+                EnetDma_checkPktState(&pktInfo->pktState,
+                                        ENET_PKTSTATE_MODULE_APP,
+                                        ENET_PKTSTATE_APP_WITH_FREEQ,
+                                        ENET_PKTSTATE_APP_WITH_DRIVER);
+
+                /* Enqueue the packet for later transmission */
+                EnetQueue_enq(&txSubmitQ, &pktInfo->node);
+
+                if (pktCnt >= BOARD_DIAG_ENETLPBK_TEST_PKT_NUM)
+                {
+                    break;
+                }
+
+                /* Dequeue one free TX Eth packet */
+                pktInfo =
+                (EnetDma_Pkt *)EnetQueue_deq(&gEnetLpbk.txFreePktInfoQ);
+            }
+            loopTxPktCnt = EnetQueue_getQCount(&txSubmitQ);
+            while (0U != EnetQueue_getQCount(&txSubmitQ))
+            {
+                uint32_t txCnt = EnetQueue_getQCount(&txSubmitQ);
+                status = EnetDma_submitTxPktQ(gEnetLpbk.hTxCh,
+                                                   &txSubmitQ);
+                while (gTxSem != true);
+                gTxSem = false;
+
+                /* Retrieve TX free packets */
+                if (status == ENET_SOK)
+                {
+                    txCnt            = txCnt - EnetQueue_getQCount(&txSubmitQ);
+                    txRetrievePktCnt = 0U;
+                    while (txRetrievePktCnt != txCnt)
+                    {
+                        /* TODO this is not failure as HW is busy sending
+                         * packets, we need to wait and again call retrieve
+                         * packets */
+                        BOARD_delay(1);
+                        txRetrievePktCnt += BoardDiag_enetLpbkRetrieveFreeTxPkts();
+                    }
+                }
+                else
+                {
+                    break;
+                }
+            }
+            
+            /* wait to receive the packet */
+            do
+            {
+                while (gRxSem != true);
+                gRxSem = false;
+
+                /* Get the packets received so far */
+                rxReadyCnt = BoardDiag_enetLpbkReceivePkts();
+                if (rxReadyCnt > 0U)
+                {
+                    /* Consume the received packets and release them */
+                    pktInfo =
+                    (EnetDma_Pkt *)EnetQueue_deq(&gEnetLpbk.rxReadyQ);
+                    while (NULL != pktInfo)
+                    {
+                        EnetDma_checkPktState(&pktInfo->pktState,
+                                                ENET_PKTSTATE_MODULE_APP,
+                                                ENET_PKTSTATE_APP_WITH_READYQ,
+                                                ENET_PKTSTATE_APP_WITH_FREEQ);
+
+                        /* Consume the packet by just printing its content */
+                        if (gEnetLpbk.printFrame)
+                        {
+                            frame = (EthFrame *)pktInfo->bufPtr;
+
+                            BoardDiag_printFrame(frame, pktInfo->userBufLen -
+                                        sizeof(EthFrameHeader));
+                        }
+
+                        /* Release the received packet */
+                        EnetQueue_enq(&gEnetLpbk.rxFreeQ, &pktInfo->node);
+                        pktInfo =
+                        (EnetDma_Pkt *)EnetQueue_deq(&gEnetLpbk.rxReadyQ);
+                    }
+
+                    /*Submit now processed buffers */
+                    if (status == ENET_SOK)
+                    {
+                        EnetAppUtils_validatePacketState(
+                                                &gEnetLpbk.rxFreeQ,
+                                                ENET_PKTSTATE_APP_WITH_FREEQ,
+                                                ENET_PKTSTATE_APP_WITH_DRIVER);
+
+                        EnetDma_submitRxPktQ(gEnetLpbk.hRxCh,
+                                         &gEnetLpbk.rxFreeQ);
+                    }
+                }
+
+                loopRxPktCnt += rxReadyCnt;
+            }
+            while (loopRxPktCnt < loopTxPktCnt);
+
+            gEnetLpbk.totalRxCnt += loopTxPktCnt;
+        }
+
+        gEnetLpbk.totalTxCnt += pktCnt;
+    }
+    
+    if (status == ENET_SOK)
+    {
+        if(gEnetLpbk.totalTxCnt != gEnetLpbk.totalRxCnt)
+        {
+            UART_printf("Packet loss, Test Failed\n");
+            return -1;
+        }
+        UART_printf("\nTransmitted - %d packets\nReceived - %d packets\n",
+                        gEnetLpbk.totalTxCnt, gEnetLpbk.totalRxCnt);
+    }
+    else
+    {
+        UART_printf("Failed to transmit/receive packets: %d,transmitted: %d\n",
+                    BOARD_DIAG_ENETLPBK_TEST_PKT_NUM, gEnetLpbk.totalTxCnt);
+    }
+
+    return status;
+}
+
+/**
+ * \brief   CPSW delay function
+ *
+ * \param   waitTime     [IN]   Wait time
+ *
+ */
+static void BoardDiag_enetWait(uint32_t waitTime)
+{
+    volatile uint32_t index;
+
+    /* we multiply waitTime by 10000 as 400MHz R5 takes 2.5ns for single cycle
+     * and we assume for loop takes 4 cycles */
+    for (index = 0; index < (waitTime*1000); index++);
+}
+
+/**
+ * \brief   This function Waits till phy link is up.
+ *
+ * \param   NULL
+ *
+ * \return  int32_t
+ *               0 - in case of success
+ *              -1 - in case of failure.
+ *
+ */
+static int32_t BoardDiag_enetLpbkWaitForLinkUp(void)
+{
+    Enet_IoctlPrms prms;
+    bool linked = false;
+    int32_t status = ENET_SOK;
+
+    ENET_IOCTL_SET_INOUT_ARGS(&prms, &gEnetLpbk.macPort, &linked);
+
+    while (!linked)
+    {
+        status = Enet_ioctl(gEnetLpbk.hEnet, gEnetLpbk.coreId,
+                            ENET_PER_IOCTL_IS_PORT_LINK_UP, &prms);
+        if (status != ENET_SOK)
+        {
+            UART_printf("Failed to get port %u's link status: %d\n",
+                            ENET_MACPORT_ID(gEnetLpbk.macPort), status);
+            linked = false;
+            break;
+        }
+
+        if (!linked)
+        {
+            Enet_periodicTick(gEnetLpbk.hEnet);
+            BoardDiag_enetWait(1000U);
+        }
+    }
+
+    return status;
+}
+
+/**
+ * \brief   This function checks the live status of the phy
+ *
+ * \param   NULL
+ *
+ * \return  int32_t
+ *               0 - in case of success
+ *              -1 - in case of failure.
+ *
+ */
+static int32_t BoardDiag_enetLpbkShowAlivePhys(void)
+{
+    Enet_IoctlPrms prms;
+    bool alive = false;
+    int8_t phyCnt;
+    int32_t status;
+
+    for (phyCnt = 0U; phyCnt < ENET_MDIO_PHY_CNT_MAX; phyCnt++)
+    {
+        ENET_IOCTL_SET_INOUT_ARGS(&prms, &phyCnt, &alive);
+
+        status = Enet_ioctl(gEnetLpbk.hEnet, gEnetLpbk.coreId,
+                            ENET_MDIO_IOCTL_IS_ALIVE, &prms);
+        if (status == ENET_SOK)
+        {
+            if (alive == true)
+            {
+                UART_printf("PHY %u is alive\n", phyCnt);
+            }
+        }
+        else
+        {
+            UART_printf("Failed to get PHY %u alive status: %d\n", phyCnt, status);
+            return -1;
+        }
+    }
+
+    return status;
+}
+
+/**
+ * \brief   This function is used to set the ALE port state to forward.
+ *
+ * \param   NULL
+ *
+ * \return  int32_t
+ *               0 - in case of success
+ *              -1 - in case of failure.
+ *
+ */
+static int32_t BoardDiag_enetLpbkSetupCpswAle(void)
+{
+    Enet_IoctlPrms prms;
+    CpswAle_SetPortStateInArgs setPortStateInArgs;
+    CpswAle_SetUcastEntryInArgs setUcastInArgs;
+    uint32_t entryIdx;
+    int32_t status;
+
+    /* ALE entry with "secure" bit cleared is required for loopback */
+    setUcastInArgs.addr.vlanId  = 0U;
+    setUcastInArgs.info.portNum = CPSW_ALE_HOST_PORT_NUM;
+    setUcastInArgs.info.blocked = false;
+    setUcastInArgs.info.secure  = false;
+    setUcastInArgs.info.super   = false;
+    setUcastInArgs.info.ageable = false;
+    setUcastInArgs.info.trunk   = false;
+
+    EnetUtils_copyMacAddr(&setUcastInArgs.addr.addr[0U],
+                          gEnetLpbk.hostMacAddr);
+
+    ENET_IOCTL_SET_INOUT_ARGS(&prms, &setUcastInArgs, &entryIdx);
+
+    status = Enet_ioctl(gEnetLpbk.hEnet, gEnetLpbk.coreId,
+                        CPSW_ALE_IOCTL_ADD_UCAST, &prms);
+    if (status != ENET_SOK)
+    {
+        UART_printf("Failed to add ucast entry: %d\n", status);
+    }
+
+    /* Set host port to 'forwarding' state */
+    if (status == ENET_SOK)
+    {
+        setPortStateInArgs.portNum   = CPSW_ALE_HOST_PORT_NUM;
+        setPortStateInArgs.portState = CPSW_ALE_PORTSTATE_FORWARD;
+        ENET_IOCTL_SET_IN_ARGS(&prms, &setPortStateInArgs);
+
+        status = Enet_ioctl(gEnetLpbk.hEnet, gEnetLpbk.coreId,
+                            CPSW_ALE_IOCTL_SET_PORT_STATE, &prms);
+        if (status != ENET_SOK)
+        {
+            UART_printf("Failed to set ALE port state: %d\n", status);
+        }
+    }
+
+    return status;
+}
+
+/**
+ * \brief   This function is used to initialize the receive ready packet queue
+ *
+ * \param   NULL
+ *
+ * \return  int8_t
+ *               0 - in case of success
+ *              -1 - in case of failure.
+ *
+ */
+static int8_t BoardDiag_enetLpbkInitRxReadyPktQ(void)
+{
+    EnetDma_PktQ rxReadyQ;
+    EnetDma_Pkt *pPktInfo;
+    int32_t status;
+    uint32_t memUtilsRxPkts;
+
+    EnetQueue_initQ(&gEnetLpbk.rxFreeQ);
+    EnetQueue_initQ(&gEnetLpbk.rxReadyQ);
+    EnetQueue_initQ(&rxReadyQ);
+
+    for (memUtilsRxPkts = 0U; memUtilsRxPkts < ENET_MEM_NUM_RX_PKTS; memUtilsRxPkts++)
+    {
+        pPktInfo =
+        EnetMem_allocEthPkt(&gEnetLpbk,
+                            ENET_MEM_LARGE_POOL_PKT_SIZE,
+                            ENETDMA_CACHELINE_ALIGNMENT);
+        if(pPktInfo == NULL)
+        {
+            UART_printf("EnetMem_allocEthPkt failed\n");
+            return -1;
+        }
+        ENET_UTILS_SET_PKT_APP_STATE(&pPktInfo->pktState,
+                                     ENET_PKTSTATE_APP_WITH_FREEQ);
+        EnetQueue_enq(&gEnetLpbk.rxFreeQ, &pPktInfo->node);
+    }
+
+    /* Retrieve any CPSW packets which are ready */
+    status = EnetDma_retrieveRxPktQ(gEnetLpbk.hRxCh, &rxReadyQ);
+    if(status != ENET_SOK)
+    {
+        UART_printf("EnetDma_retrieveRxPktQ failed\n");
+        return -1;
+    }
+    /* There should not be any packet with DMA during init */
+    if(EnetQueue_getQCount(&rxReadyQ) != 0U)
+    {
+        UART_printf("EnetQueue_getQCount failed\n");
+        return -1;
+    }
+
+    EnetAppUtils_validatePacketState(&gEnetLpbk.rxFreeQ,
+                                     ENET_PKTSTATE_APP_WITH_FREEQ,
+                                     ENET_PKTSTATE_APP_WITH_DRIVER);
+
+    EnetDma_submitRxPktQ(gEnetLpbk.hRxCh,
+                         &gEnetLpbk.rxFreeQ);
+
+    /* Assert here as during init no. of DMA descriptors should be equal to
+     * no. of free Ethernet buffers available with app */
+    if(EnetQueue_getQCount(&gEnetLpbk.rxFreeQ) != 0U)
+    {
+        UART_printf("EnetQueue_getQCount failed\n");
+        return -1;
+    }
+    return 0;
+}
+
+/**
+ * \brief   This function is used to initialize the free packet
+ *          info queue with the Ethernet packets to be transmitted.
+ *
+ * \param   NULL
+ *
+ * \return  int8_t
+ *               0 - in case of success
+ *              -1 - in case of failure.
+ *
+ */
+static int8_t BoardDiag_enetLpbkInitTxFreePktQ(void)
+{
+    EnetDma_Pkt *pPktInfo;
+    uint32_t memUtilsTxPkts;
+
+    /* Initialize all queues */
+    EnetQueue_initQ(&gEnetLpbk.txFreePktInfoQ);
+
+    /* Initialize TX EthPkts and queue them to txFreePktInfoQ */
+    for (memUtilsTxPkts = 0U; memUtilsTxPkts < ENET_MEM_NUM_TX_PKTS; memUtilsTxPkts++)
+    {
+        pPktInfo = 
+        EnetMem_allocEthPkt(&gEnetLpbk,
+                                       ENET_MEM_LARGE_POOL_PKT_SIZE,
+                                       ENETDMA_CACHELINE_ALIGNMENT);
+        if(pPktInfo == NULL)
+        {
+            UART_printf("EnetMem_allocEthPkt failed\n");
+            return -1;
+        }
+        ENET_UTILS_SET_PKT_APP_STATE(&pPktInfo->pktState,
+                                     ENET_PKTSTATE_APP_WITH_FREEQ);
+
+        EnetQueue_enq(&gEnetLpbk.txFreePktInfoQ, &pPktInfo->node);
+    }
+
+    UART_printf("initQs() txFreePktInfoQ initialized with %d pkts\n",
+                       EnetQueue_getQCount(&gEnetLpbk.txFreePktInfoQ));
+    return 0;
+}
+
+/**
+ * \brief   This function is used to open the CPSW DMA module
+ *
+ * \param   NULL
+ *
+ * \return  int8_t
+ *               0 - in case of success
+ *              -1 - in case of failure.
+ *
+ */
+static int8_t BoardDiag_enetLpbkOpenDma()
+{
+    int32_t status = ENET_SOK;
+    EnetCpdma_OpenRxChPrms rxChCfg;
+    EnetCpdma_OpenTxChPrms txChCfg;
+
+    /* Open the CPSW TX channel  */
+    if (status == ENET_SOK)
+    {
+        EnetDma_initTxChParams(&txChCfg);
+
+        txChCfg.cbArg   = &gEnetLpbk;
+        txChCfg.notifyCb = BoardDiag_enetLpbkTxIsrFxn;
+
+        EnetAppUtils_setCommonTxChPrms(&txChCfg);
+
+        EnetAppUtils_openTxCh(gEnetLpbk.hEnet,
+                              gEnetLpbk.coreKey,
+                              gEnetLpbk.coreId,
+                              &gEnetLpbk.txChNum,
+                              &gEnetLpbk.hTxCh,
+                              &txChCfg);
+
+        if(BoardDiag_enetLpbkInitTxFreePktQ() != BOARD_DIAG_SUCCESS)
+        {
+            UART_printf("BoardDiag_enetLpbkInitTxFreePktQ Failed\n");
+            return -1;
+        }
+
+        if (NULL == gEnetLpbk.hTxCh)
+        {
+            /* Free the Ch Num if open Tx Ch failed */
+            EnetAppUtils_freeTxCh(gEnetLpbk.hEnet,
+                                  gEnetLpbk.coreKey,
+                                  gEnetLpbk.coreId,
+                                  gEnetLpbk.txChNum);
+            UART_printf("EnetDma_openTxCh() failed to open: %d\n",
+                               status);
+        }
+    }
+
+    /* Open the CPSW RX Channel  */
+    if (status == ENET_SOK)
+    {
+        EnetDma_initRxChParams(&rxChCfg);
+        rxChCfg.notifyCb = BoardDiag_enetLpbkRxIsrFxn;
+        rxChCfg.cbArg   = &gEnetLpbk;
+
+        EnetAppUtils_setCommonRxChPrms(&rxChCfg);
+
+        EnetAppUtils_openRxCh(gEnetLpbk.hEnet,
+                              gEnetLpbk.coreKey,
+                              gEnetLpbk.coreId,
+                              &gEnetLpbk.rxChNum,
+                              &gEnetLpbk.hRxCh,
+                              &rxChCfg);
+
+        if (NULL == gEnetLpbk.hRxCh)
+        {
+            UART_printf("EnetDma_openRxCh() failed to open: %d\n",
+                               status);
+
+           /* TODO: should we close TxCh here */
+        }
+        else
+        {
+            status = EnetAppUtils_allocMac(gEnetLpbk.hEnet,
+                                           gEnetLpbk.coreKey,
+                                           gEnetLpbk.coreId,
+                                           gEnetLpbk.hostMacAddr);
+            UART_printf("Host MAC address: ");
+            BoardDiag_printMacAddr(gEnetLpbk.hostMacAddr);
+            /* Submit all ready RX buffers to DMA.*/
+            if(BoardDiag_enetLpbkInitRxReadyPktQ() != BOARD_DIAG_SUCCESS)
+            {
+                UART_printf("BoardDiag_enetLpbkInitRxReadyPktQ failed\n");
+                return -1;
+            }
+        }
+    }
+    if(status != ENET_SOK)
+    {
+        return -1;
+    }
+    return 0;
+}
+
+/**
+ * \brief   This function is used set MII mode.
+ *
+ * \param   emac_mode       macMode   mac mode
+ *          EnetPhy_Mii     *mii      MII mode
+ *
+ * \return  int8_t
+ *               0 - in case of success
+ *              -1 - in case of failure.
+ *
+ */
+static int8_t BoardDiag_enetLpbkMacMode2PhyMii(emac_mode macMode,
+                                    EnetPhy_Mii *mii)
+{
+    switch (macMode)
+    {
+        case RMII:
+            *mii = ENETPHY_MAC_MII_RMII;
+            break;
+        case RGMII:
+            *mii = ENETPHY_MAC_MII_RGMII;
+            break;
+        default:
+            UART_printf("Invalid MAC mode: %u\n", macMode);
+            return -1;
+    }
+    return 0;
+}
+
+
+/**
+ * \brief   This function is used set layerType,sublayerType and variantType.
+ *
+ * \param   emac_mode                   macMode   mac mode
+ *          EnetMacPort_Interface       *mii      MII mode
+ *
+ * \return  int8_t
+ *               0 - in case of success
+ *              -1 - in case of failure.
+ *
+ */
+static int8_t BoardDiag_enetLpbkMacMode2MacMii(emac_mode macMode,
+                                    EnetMacPort_Interface *mii)
+{
+    switch (macMode)
+    {
+        case RMII:
+            mii->layerType    = ENET_MAC_LAYER_MII;
+            mii->sublayerType = ENET_MAC_SUBLAYER_REDUCED;
+            mii->variantType  = ENET_MAC_VARIANT_NONE;
+            break;
+        case RGMII:
+            mii->layerType    = ENET_MAC_LAYER_GMII;
+            mii->sublayerType = ENET_MAC_SUBLAYER_REDUCED;
+            mii->variantType  = ENET_MAC_VARIANT_FORCED;
+            break;
+        default:
+            UART_printf("Invalid MAC mode: %u\n", macMode);
+            return -1;
+    }
+    return 0;
+}
+
+/**
+ * \brief   This function is used init cpsw configurations.
+ *
+ * \param   Cpsw_Cfg *cpswCfg           cpsw configurations
+ *
+ * \return  NULL
+ *
+ */
+static void BoardDiag_enetLpbkInitCpswCfg(Cpsw_Cfg *cpswCfg)
+{
+    CpswHostPort_Cfg *hostPortCfg = &cpswCfg->hostPortCfg;
+    CpswAle_Cfg *aleCfg = &cpswCfg->aleCfg;
+    CpswCpts_Cfg *cptsCfg = &cpswCfg->cptsCfg;
+
+    /* Set initial config */
+    Enet_initCfg(gEnetLpbk.enetType, gEnetLpbk.instId, cpswCfg,
+                sizeof(*cpswCfg));
+
+    /* Peripheral config */
+    cpswCfg->vlanCfg.vlanAware = false;
+
+    /* Host port config */
+    hostPortCfg->removeCrc      = true;
+    hostPortCfg->padShortPacket = true;
+    hostPortCfg->passCrcErrors  = true;
+
+    /* ALE config */
+    aleCfg->modeFlags                          = CPSW_ALE_CFG_MODULE_EN;
+    aleCfg->agingCfg.autoAgingEn           = true;
+    aleCfg->agingCfg.agingPeriodInMs           = 1000;
+    aleCfg->nwSecCfg.vid0ModeEn            = true;
+    aleCfg->vlanCfg.aleVlanAwareMode           = false;
+    aleCfg->vlanCfg.cpswVlanAwareMode          = false;
+    aleCfg->vlanCfg.unknownUnregMcastFloodMask = CPSW_ALE_ALL_PORTS_MASK;
+    aleCfg->vlanCfg.unknownRegMcastFloodMask   = CPSW_ALE_ALL_PORTS_MASK;
+    aleCfg->vlanCfg.unknownVlanMemberListMask  = CPSW_ALE_ALL_PORTS_MASK;
+
+    /* CPTS config */
+    /* Note: Timestamping and MAC loopback are not supported together because
+     * of IP limitation, so disabling timestamping for this application */
+    cptsCfg->hostRxTsEn = false;
+
+    EnetAppUtils_initResourceConfig(gEnetLpbk.enetType, gEnetLpbk.coreId,
+                                    &cpswCfg->resCfg);
+}
+
+/**
+ * \brief   This function is used to open the ENET driver
+ *
+ * \param   NULL
+ *
+ * \return  int8_t
+ *               0 - in case of success
+ *              -1 - in case of failure.
+ *
+ */
+static int8_t BoardDiag_enetLpbkOpenEnet(void)
+{
+    Cpsw_Cfg cpswCfg;
+    EnetCpdma_Cfg dmaCfg;
+    Enet_IoctlPrms prms;
+    EnetPer_PortLinkCfg portLinkCfg;
+    CpswMacPort_Cfg macCfg;
+    int32_t status = ENET_SOK;
+
+    cpswCfg.dmaCfg = &dmaCfg;
+    /* Initialize peripheral config */
+    BoardDiag_enetLpbkInitCpswCfg(&cpswCfg);
+
+    UART_printf("CPSW_2G Test on MCU NAVSS\n");
+    /* Set Enet global runtime log level */
+    Enet_setTraceLevel(ENET_TRACE_DEBUG);
+
+    /* Open the Enet driver */
+    gEnetLpbk.hEnet = Enet_open(gEnetLpbk.enetType, gEnetLpbk.instId, &cpswCfg,
+                                sizeof(cpswCfg));
+
+    if (gEnetLpbk.hEnet == NULL)
+    {
+        UART_printf("Failed to open Enet driver\n");
+        return -1;
+    }
+
+    /* Setup port link open parameters */
+    if (status == ENET_SOK)
+    {
+        EnetBoard_EthPort ethPort;
+        EnetMacPort_LinkCfg *linkCfg = &portLinkCfg.linkCfg;
+        EnetMacPort_Interface *mii = &portLinkCfg.mii;
+        EnetPhy_Cfg *phyCfg = &portLinkCfg.phyCfg;
+        EnetPhy_Mii phyMii;
+
+        /* Setup board for requested Ethernet port */
+        ethPort.enetType = gEnetLpbk.enetType;
+        ethPort.instId   = gEnetLpbk.instId;
+        ethPort.macPort  = gEnetLpbk.macPort;
+        ethPort.boardId  = gEnetLpbk.boardId;
+        if(BoardDiag_enetLpbkMacMode2MacMii(gEnetLpbk.macMode, &ethPort.mii) != 
+                                            BOARD_DIAG_SUCCESS)
+        {
+            UART_printf("BoardDiag_enetLpbkMacMode2MacMii failed\n");
+            return -1;
+        }
+
+        status = EnetBoard_setupPorts(&ethPort, 1U);
+        if(status != ENET_SOK)
+        {
+            UART_printf("EnetBoard_setupPorts failed\n");
+            return -1;
+        }
+
+        /* Set port link params */
+        portLinkCfg.macPort = gEnetLpbk.macPort;
+        portLinkCfg.macCfg = &macCfg;
+
+        CpswMacPort_initCfg(&macCfg);
+
+        if(BoardDiag_enetLpbkMacMode2MacMii(gEnetLpbk.macMode, mii) 
+                                            != BOARD_DIAG_SUCCESS)
+        {
+            UART_printf("BoardDiag_enetLpbkMacMode2MacMii failed\n");
+            return -1;
+        }
+
+        if (gEnetLpbk.testPhyLoopback)
+        {
+            const EnetBoard_PhyCfg *boardPhyCfg = NULL;
+
+            /* Set PHY configuration params */
+            EnetPhy_initCfg(phyCfg);
+
+            if (BoardDiag_enetLpbkMacMode2PhyMii(gEnetLpbk.macMode, &phyMii) 
+                                                == BOARD_DIAG_SUCCESS)
+            {
+                boardPhyCfg = EnetBoard_getPhyCfg(&ethPort);
+                if (boardPhyCfg != NULL)
+                {
+                    phyCfg->phyAddr     = boardPhyCfg->phyAddr;
+                    phyCfg->isStrapped  = boardPhyCfg->isStrapped;
+                    phyCfg->skipExtendedCfg = boardPhyCfg->skipExtendedCfg;
+                    phyCfg->extendedCfgSize = boardPhyCfg->extendedCfgSize;
+                    memcpy(phyCfg->extendedCfg, boardPhyCfg->extendedCfg,
+                            phyCfg->extendedCfgSize);
+                }
+                else
+                {
+                    UART_printf("PHY info not found\n");
+                    return -1;
+                }
+
+                if ((phyMii == ENETPHY_MAC_MII_MII) ||
+                    (phyMii == ENETPHY_MAC_MII_RMII))
+                {
+                    linkCfg->speed = ENET_SPEED_100MBIT;
+                }
+                else
+                {
+                    /* TODO: TPR12 always 100 Mbits */
+                    linkCfg->speed = ENET_SPEED_100MBIT;
+                }
+
+                linkCfg->duplexity = ENET_DUPLEX_FULL;
+            }
+            else
+            {
+                UART_printf("BoardDiag_enetLpbkMacMode2PhyMii failed\n");
+                return -1;
+            }
+        }
+        else
+        {
+            phyCfg->phyAddr = ENETPHY_INVALID_PHYADDR;
+
+            if (mii->layerType == ENET_MAC_LAYER_MII)
+            {
+                linkCfg->speed = ENET_SPEED_100MBIT;
+            }
+            else
+            {
+                linkCfg->speed = ENET_SPEED_1GBIT;
+            }
+
+            linkCfg->duplexity = ENET_DUPLEX_FULL;
+
+        }
+
+        /* MAC and PHY loopbacks are mutually exclusive */
+        phyCfg->loopbackEn = gEnetLpbk.testPhyLoopback &&
+                                 !gEnetLpbk.testExtLoopback;
+
+        macCfg.loopbackEn = !gEnetLpbk.testPhyLoopback;
+    }
+
+    /* Open port link */
+    if (status == ENET_SOK)
+    {
+        ENET_IOCTL_SET_IN_ARGS(&prms, &portLinkCfg);
+
+        status = Enet_ioctl(gEnetLpbk.hEnet, gEnetLpbk.coreId,
+                            ENET_PER_IOCTL_OPEN_PORT_LINK, &prms);
+        if (status != ENET_SOK)
+        {
+            UART_printf("Failed to open port link: %d\n", status);
+            return -1;
+        }
+    }
+
+    return 0;
+}
+
+/**
+ * \brief   This function is used to initialiaze the enet
+            parameters(gEnetLpbk) Ethernet external loopback test.
+ *
+ * \param   NULL
+ *
+ * \return  NULL
+ *
+ */
+static void BoardDiag_enetIniParams()
+{
+     /* Initialize loopback test config */
+    memset(&gEnetLpbk, 0, sizeof(gEnetLpbk));
+    
+    gEnetLpbk.enetType        = ENET_CPSW_9G;
+    gEnetLpbk.instId          = 0U;
+    gEnetLpbk.testPhyLoopback = true;
+    gEnetLpbk.testExtLoopback = true;
+    gEnetLpbk.macPort         = ENET_MAC_PORT_1;
+    gEnetLpbk.macMode         = RGMII;
+    gEnetLpbk.enetType        = ENET_CPSW_2G;
+    gEnetLpbk.boardId         = ENETBOARD_CPB_ID;
+
+}
+
+/**
+ * \brief   This function is used to perform the CPSW
+ *          Ethernet external loopback test
+ *
+ * \param   NULL
+ *
+ * \return  int8_t
+ *               0 - in case of success
+ *              -1 - in case of failure.
+ *
+ */
+static int8_t BoardDiag_cpswLoopbackTest()
+{
+    EnetOsal_Cfg osalCfg;
+    EnetUtils_Cfg utilsCfg;
+    Enet_IoctlPrms prms;
+    int32_t status;
+
+    /* Initialize the phy configurations */
+    EnetBoard_init();
+
+    /* Initialize the enet parameters */
+    BoardDiag_enetIniParams();
+
+    EnetAppUtils_enableClocks(gEnetLpbk.enetType, gEnetLpbk.instId);
+
+    /* Local core id */
+    gEnetLpbk.coreId = EnetSoc_getCoreId();
+
+    /* Initialize Enet driver (use default OSAL and utils) */
+    Enet_initOsalCfg(&osalCfg);
+    Enet_initUtilsCfg(&utilsCfg);
+    utilsCfg.print = EnetAppUtils_print;
+    Enet_init(&osalCfg, &utilsCfg);
+
+    /* Open Enet driver */
+    status = BoardDiag_enetLpbkOpenEnet();
+    if (status != 0)
+    {
+        UART_printf("Failed to open Enet driver: %d\n", status);
+        return -1;
+    }
+#if !defined(SOC_TPR12)
+    if (status == ENET_SOK)
+    {
+        /* Attach the core with RM */
+        uint32_t coreId;
+        EnetPer_AttachCoreOutArgs attachCoreOutArgs;
+        coreId = gEnetLpbk.coreId;
+
+        ENET_IOCTL_SET_INOUT_ARGS(&prms, &coreId, &attachCoreOutArgs);
+        status = Enet_ioctl(gEnetLpbk.hEnet, gEnetLpbk.coreId,
+                            ENET_PER_IOCTL_ATTACH_CORE, &prms);
+        if (status != ENET_SOK)
+        {
+            UART_printf("EnetLpbk_loopbackTest failed"
+                         "ENET_PER_IOCTL_ATTACH_CORE: %d\n", status);
+            return -1;
+        }
+        else
+        {
+            gEnetLpbk.coreKey = attachCoreOutArgs.coreKey;
+        }
+    }
+#endif
+    if (status == ENET_SOK)
+    {
+        /* memutils open should happen after Cpsw is opened as it uses 
+         * CpswUtils_Q functions */
+        status = EnetMem_init();
+        if (status != ENET_SOK)
+        {
+            UART_printf("EnetMem_init failed: "
+                        "%d\n", status);
+            return -1;
+        }
+    }
+
+    /* Open DMA driver */
+    if (status == ENET_SOK)
+    {
+        status = BoardDiag_enetLpbkOpenDma();
+        if (status != ENET_SOK)
+        {
+            UART_printf("Failed to open DMA: %d\n", status);
+            return -1;
+        }
+    }
+
+    /* Enable host port */
+    if (status == ENET_SOK)
+    {
+        if (Enet_isCpswFamily(gEnetLpbk.enetType))
+        {
+            status = BoardDiag_enetLpbkSetupCpswAle();
+            if (status != ENET_SOK)
+            {
+                UART_printf("Failed to setup CPSW ALE: %d\n", status);
+                return -1;
+            }
+        }
+
+        if (status == ENET_SOK)
+        {
+            ENET_IOCTL_SET_NO_ARGS(&prms);
+            status = Enet_ioctl(gEnetLpbk.hEnet, gEnetLpbk.coreId,
+                                ENET_HOSTPORT_IOCTL_ENABLE, &prms);
+            if (status != ENET_SOK)
+            {
+                UART_printf("Failed to enable host port: %d\n", status);
+                return -1;
+            }
+        }
+    }
+
+    /* Show alive PHYs */
+    if (status == ENET_SOK)
+    {
+        status = BoardDiag_enetLpbkShowAlivePhys();
+    }
+
+    /* Wait for link up */
+    if ((status == ENET_SOK) && gEnetLpbk.testPhyLoopback)
+    {
+        status = BoardDiag_enetLpbkWaitForLinkUp();
+    }
+
+    /* Do packet transmission and reception */
+    if (status == ENET_SOK)
+    {
+       status = BoardDiag_cpswPktRxTx();
+    }
+
+    /* Print network statistics */
+    if (status == ENET_SOK)
+    {
+        if (Enet_isCpswFamily(gEnetLpbk.enetType))
+        {
+            BoardDiag_enetLpbkShowCpswStats();
+        }
+    }
+
+    /* Disable host port */
+    if (status == ENET_SOK)
+    {
+        ENET_IOCTL_SET_NO_ARGS(&prms);
+        status = Enet_ioctl(gEnetLpbk.hEnet, gEnetLpbk.coreId,
+                            ENET_HOSTPORT_IOCTL_DISABLE, &prms);
+        if (status != ENET_SOK)
+        {
+            UART_printf("Failed to disable host port: %d\n", status);
+            return -1;
+        }
+    }
+
+    /* Print DMA statistics */
+    if (status == ENET_SOK)
+    {
+        EnetAppUtils_showRxChStats(gEnetLpbk.hRxCh);
+        EnetAppUtils_showTxChStats(gEnetLpbk.hTxCh);
+    }
+
+    /* Close Enet DMA driver */
+    BoardDiag_enetLpbkCloseDma();
+
+    /* Close Enet driver */
+    BoardDiag_enetLpbkCloseEnet();
+
+    /* Disable peripheral clocks */
+    EnetAppUtils_disableClocks(gEnetLpbk.enetType, gEnetLpbk.instId);
+
+    /* Deinit Enet driver */
+    Enet_deinit();
+    UART_printf("Deinitializing of Enet driver done\n");
+
+    if(status == ENET_SOK)
+    {
+        UART_printf("Test Passed\n");
+    }
+    else
+    {
+        UART_printf("Test Failed\n");
+        return -1;
+    }
+
+    return 0;
+}
+
+/**
+ *  \brief    This function runs CPSW ethernet test
+ *
+ *  \return   int8_t
+ *               0 - in case of success
+ *              -1 - in case of failure.
+ *
+ */
+int8_t BoardDiag_cpswEthRunTest(void)
+{
+    int8_t ret;
+
+    UART_printf("\n*********************************************\n");
+    UART_printf  ("*            ENET Ethernet Test             *\n");
+    UART_printf  ("*********************************************\n");
+
+    /* Run the loopback test */
+    ret = BoardDiag_cpswLoopbackTest();
+
+    return ret;
+}
+
+/**
+ * \brief  CPSW diagnostic test main function
+ *
+ *  This function performs board initializations and calls cpsw ethernet test
+ *
+ * \return  int
+ *              0  - in case of success
+ *             -1  - in case of failure
+ *
+ */
+#ifndef SPI_BOOT_FRAMEWORK
+int main(void)
+{
+    Board_initCfg boardCfg;
+    Board_STATUS status;
+    int8_t ret = 0;
+
+#ifdef PDK_RAW_BOOT
+    boardCfg = BOARD_INIT_MODULE_CLOCK |
+               BOARD_INIT_PINMUX_CONFIG |
+               BOARD_INIT_UART_STDIO;
+#else
+    boardCfg = BOARD_INIT_UART_STDIO | BOARD_INIT_PINMUX_CONFIG;
+#endif
+
+    status = Board_init(boardCfg);
+    if(status != BOARD_SOK)
+    {
+        return -1;
+    }
+
+    ret = BoardDiag_cpswEthRunTest();
+    if(ret == 0)
+    {
+        UART_printf("CPSW Loopback Test Passed\n\r");
+        UART_printf("All tests have passed\n\r");
+    }
+    else
+    {
+        UART_printf("CPSW Loopback Test failed\n\r");
+    }
+
+    return ret;
+
+}
+#endif
+
index 3ee1edf7ca0ea1c62ea1c462fbc580add9554593..ebb263b8a40eaed648b9561b7044cb42282d8883 100644 (file)
-/******************************************************************************\r
- * Copyright (c) 2019 Texas Instruments Incorporated - http://www.ti.com\r
- *\r
- *  Redistribution and use in source and binary forms, with or without\r
- *  modification, are permitted provided that the following conditions\r
- *  are met:\r
- *\r
- *    Redistributions of source code must retain the above copyright\r
- *    notice, this list of conditions and the following disclaimer.\r
- *\r
- *    Redistributions in binary form must reproduce the above copyright\r
- *    notice, this list of conditions and the following disclaimer in the\r
- *    documentation and/or other materials provided with the\r
- *    distribution.\r
- *\r
- *    Neither the name of Texas Instruments Incorporated nor the names of\r
- *    its contributors may be used to endorse or promote products derived\r
- *    from this software without specific prior written permission.\r
- *\r
- *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\r
- *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\r
- *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
- *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT\r
- *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,\r
- *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\r
- *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
- *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
- *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\r
- *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE\r
- *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
- *\r
- *****************************************************************************/\r
-\r
-/**\r
- *  \file   cpsw_eth_test.h\r
- *\r
- *  \brief  This file contains all Local definitions for CPSW 9G Ethernet test\r
- *          application.\r
- *\r
- */\r
-\r
-#ifndef __CPSW_ETH_TEST_H__\r
-#define __CPSW_ETH_TEST_H__\r
-\r
-#include <stdint.h>\r
-#include <stdio.h>\r
-#include <stdlib.h>\r
-#include <string.h>\r
-\r
-#include "board.h"\r
-#include "board_cfg.h"\r
-#include "board_ethernet_config.h"\r
-#include "board_pinmux.h"\r
-#include "board_control.h"\r
-#include "board_serdes_cfg.h"\r
-\r
-#include <ti/drv/sciclient/sciclient.h>\r
-\r
-#include <ti/drv/uart/UART.h>\r
-#include <ti/drv/uart/UART_stdio.h>\r
-\r
-#include <ti/osal/TimerP.h>\r
-#include <ti/osal/osal.h>\r
-\r
-#include <ti/drv/pm/include/dmsc/pmlib_clkrate.h>\r
-\r
-#include <ti/drv/udma/udma.h>\r
-\r
-#include <ti/drv/cpsw/cpsw.h>\r
-\r
-#include <ti/drv/cpsw/soc/cpsw_soc.h>\r
-\r
-#include <ti/drv/cpsw/include/cpsw_dma.h>\r
-#include <ti/drv/cpsw/include/dp83867.h>\r
-#include <ti/drv/cpsw/include/cpsw_queue.h>\r
-#include <ti/drv/cpsw/include/cpsw_ale.h>\r
-#include <ti/drv/cpsw/include/cpsw_cfg.h>\r
-#include <ti/drv/cpsw/include/cpsw_types.h>\r
-#include <ti/drv/cpsw/include/cpsw_rm.h>\r
-\r
-#include <ti/drv/cpsw/examples/cpsw_apputils/inc/cpsw_apputils.h>\r
-#include <ti/drv/cpsw/examples/cpsw_apputils/inc/cpsw_appsoc.h>\r
-#include <ti/drv/cpsw/examples/cpsw_apputils/inc/cpsw_appmemutils_cfg.h>\r
-#include <ti/drv/cpsw/examples/cpsw_apputils/inc/cpsw_appmemutils.h>\r
-#include <ti/drv/cpsw/examples/cpsw_apputils/inc/cpsw_appboardutils.h>\r
-#include <ti/drv/cpsw/examples/cpsw_apputils/inc/cpswapp_ethutils.h>\r
-\r
-#include "diag_common_cfg.h"\r
-\r
-#ifdef __cplusplus\r
-extern "C" {\r
-#endif\r
-\r
-/* ========================================================================== */\r
-/*                           Macros & Typedefs                                */\r
-/* ========================================================================== */\r
-\r
-#define BOARD_DIAG_CPSW_TEST_LEN                (500U)\r
-\r
-#define BOARD_DIAG_CPSW_TEST_NUM_LOOP           (1U)\r
-#define BOARD_DIAG_CPSW_TEST_PTK_NUM            (128U)\r
-\r
-#define BOARD_DIAG_CPSW_RGMII_TEST              (1U)\r
-#define BOARD_DIAG_CPSW_SGMII_TEST              (2U)\r
-#define BOARD_DIAG_MCU_CPSW_RGMII_TEST          (3U)\r
-\r
-#define BOARD_DIAG_CPSW_RGMII_PRG0_TEST         (1U)\r
-#define BOARD_DIAG_CPSW_RGMII_PRG1_TEST         (2U)\r
-\r
-#define BOARD_DIAG_CPSW_SGMII_P0P1_TEST         (1U)\r
-#define BOARD_DIAG_CPSW_SGMII_P2P3_TEST         (2U)\r
-\r
-#define BOARD_DIAG_CPSW_PHY_START_ADDRESS       (0U)\r
-#define BOARD_DIAG_CPSW_PHY_END_ADDRESS         (31U)\r
-\r
-typedef void *CpswApp_ClkHandle;\r
-\r
-/**\r
- * \brief  CPSW device object structure\r
- */\r
-typedef struct\r
-{\r
-    /* CPSW instance type */\r
-    Cpsw_Type            cpswType;\r
-\r
-    /* Core Id */\r
-    uint32_t             coreId;\r
-    /*Core Key */\r
-    uint32_t             coreKey;\r
-\r
-    /* MAC port number */\r
-    Cpsw_MacPort         portNum0;\r
-\r
-    /* MAC port number */\r
-    Cpsw_MacPort         portNum1;\r
-\r
-    /* CPSW driver handle */\r
-    Cpsw_Handle          hCpsw;\r
-    Udma_DrvHandle       hUdmaDrv;\r
-\r
-    CpswDma_RxFlowHandle hRxFlow;\r
-    CpswDma_PktInfoQ     rxFreeQ;\r
-    CpswDma_PktInfoQ     rxReadyQ;\r
-\r
-    CpswDma_TxChHandle   hTxCh;\r
-    CpswDma_PktInfoQ     txFreePktInfoQ;\r
-\r
-    /* TX Eth packet memory */\r
-    uint8_t              txBufMem[CPSW_APPMEMUTILS_NUM_TX_PKTS][CPSWAPPUTILS_ALIGN(ETH_MAX_FRAME_LEN)]\r
-                                __attribute__((aligned(UDMA_CACHELINE_ALIGNMENT)));\r
-    /* TX DMA packet info memory */\r
-    CpswDma_PktInfo      txFreePktInfo[CPSW_APPMEMUTILS_NUM_TX_PKTS];\r
-\r
-    uint8_t              hostMacAddr0[ETH_MAC_ADDR_LEN];\r
-\r
-    uint8_t              hostMacAddr1[CPSW_MAC_ADDR_LEN];\r
-\r
-    /* Whether to print received Ethernet frames */\r
-    bool printFrame;\r
-\r
-    uint32_t             rxStartFlowIdx;\r
-\r
-    uint32_t             rxFlowIdx;\r
-\r
-    uint32_t             txChNum;\r
-}cpsw_Obj;\r
-\r
-/**\r
- *  \brief    This function runs CPSW9G ethernet test\r
- *\r
- *  \return   int8_t\r
- *               0 - in case of success\r
- *              -1 - in case of failure.\r
- *\r
- */\r
-int8_t BoardDiag_CpswEthRunTest(void);\r
-\r
-#ifdef __cplusplus\r
-}\r
-#endif\r
-#endif /* __CPSW_ETH_TEST_H__ */\r
+/******************************************************************************
+* Copyright (c) 2020 Texas Instruments Incorporated - http://www.ti.com
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+*
+* Redistributions of source code must retain the above copyright
+* notice, this list of conditions and the following disclaimer.
+*
+* Redistributions in binary form must reproduce the above copyright
+* notice, this list of conditions and the following disclaimer in the
+* documentation and/or other materials provided with the
+* distribution.
+*
+* Neither the name of Texas Instruments Incorporated nor the names of
+* its contributors may be used to endorse or promote products derived
+* from this software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*
+*****************************************************************************/
+
+/**
+ *  \file   cpsw_eth_test.h
+ *
+ *  \brief  This file contains all Local definitions for CPSW Ethernet test
+ *          application.
+ *
+ */
+
+#ifndef __CPSW_ETH_TEST_H__
+#define __CPSW_ETH_TEST_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+#include <string.h>
+#include <assert.h>
+
+#include <ti/drv/uart/UART.h>
+#include <ti/drv/uart/UART_stdio.h>
+
+#include <ti/board/board.h>
+#include <ti/board/src/tpr12_evm/include/board_ethernet_config.h>
+#include <ti/board/src/tpr12_evm/include/board_utils.h>
+
+#include <ti/drv/enet/enet.h>
+#include <ti/drv/enet/include/core/enet_dma.h>
+#include <ti/drv/enet/include/per/cpsw.h>
+
+#include <ti/drv/enet/examples/utils/include/enet_apputils.h>
+#include <ti/drv/enet/examples/utils/include/enet_appmemutils.h>
+#include <ti/drv/enet/examples/utils/include/enet_appmemutils_cfg.h>
+#include <ti/drv/enet/examples/utils/include/enet_appboardutils.h>
+#include <ti/drv/enet/examples/utils/include/enet_apputils_rtos.h>
+#include <ti/drv/enet/examples/utils/include/enet_board_tpr12evm.h>
+
+/* Loopback test iteration count */
+#define BOARD_DIAG_ENETLPBK_NUM_ITERATION          (1U)
+/* Loopback test Number of packets count */
+#define BOARD_DIAG_ENETLPBK_TEST_PKT_NUM           (20U)
+/* Loopback test packet length */
+#define BOARD_DIAG_ENETLPBK_TEST_PKT_LEN           (500U)
+/* Status check */
+#define BOARD_DIAG_SUCCESS                          (0U)
+
+extern void EnetAppUtils_timerInit(void);
+/** 
+  * @brief Enet device object structure 
+  *
+  */
+typedef struct BoardDiag_EnetLpbkObj_s
+{
+    /* Enet handle */
+    Enet_Handle hEnet;
+    /* CPSW instance type */
+    Enet_Type enetType;
+    /* Instant Id */
+    uint32_t instId;
+    /* Core Id */
+    uint32_t coreId;
+    /* Core Key */
+    uint32_t coreKey;
+    /* Board Id */
+    uint32_t boardId;
+    /* MAC port number */
+    Enet_MacPort macPort;
+    /* MAC mode (defined in board library) */
+    emac_mode macMode;
+    /* CPSW driver handle */
+    EnetDma_RxChHandle hRxCh;
+
+    EnetDma_PktQ rxFreeQ;
+    EnetDma_PktQ rxReadyQ;
+    EnetDma_TxChHandle hTxCh;
+    /* TX DMA packet info memory */
+    EnetDma_PktQ txFreePktInfoQ;
+
+    /* Rx channel number */
+    uint32_t rxChNum;
+    /* Tx channel number */
+    uint32_t txChNum;
+    /* Host mac address */
+    uint8_t hostMacAddr[ENET_MAC_ADDR_LEN];
+
+    /* Test config params */
+    /* external LoopBack enable */
+    bool testExtLoopback;
+    /* PHY loopback */
+    bool testPhyLoopback;
+    /* Print received Ethernet frames */
+    bool printFrame;
+
+    /* Packet transmission */
+    uint32_t totalTxCnt;
+
+    /* Packet reception */
+    uint32_t totalRxCnt;
+
+} BoardDiag_EnetLpbkObj_t;
+
+/**
+ *  \brief    This function runs CPSW2G ethernet test
+ *
+ *  \return   int8_t
+ *               0 - in case of success
+ *              -1 - in case of failure.
+ *
+ */
+int8_t BoardDiag_cpswEthRunTest(void);
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* __CPSW_ETH_TEST_H__ */
index 080beeb75239562fb24da516486c0f6d48d9e475..be367b24b1eaebc04911a45f8e2bb62087a9c77f 100644 (file)
@@ -47,6 +47,7 @@ endif
 PROFILE ?= release
 TESTMODE ?= FUNCTIONAL_TEST
 MODENAME ?=
+FE_DEVICE ?= AWR2243
 BOARD_DIAG_CFLAGS ?=
 APP_NAME ?= board_diag_$(DIAGNAME)
 
@@ -104,7 +105,7 @@ PACKAGE_SRCS_COMMON += ../../create_sd.bat ../../create_sd.sh
 
 ifeq ($(SOC), $(filter $(SOC), tpr12))
 PACKAGE_SRCS_COMMON += ../src/csirx_test_tpr12.c ../src/csirx_test_tpr12.h
-#AWR2243 configuration binaries
+#AWR2243/IWR1443 configuration binaries
 PACKAGE_SRCS_COMMON += ../frontendcfg
 SRCS_COMMON += csirx_test_tpr12.c
 else
@@ -135,7 +136,7 @@ else
     endif
 endif
 
-CFLAGS_LOCAL_COMMON = $(PDK_CFLAGS) -DDIAG_$(TESTMODE) $(BOARD_DIAG_CFLAGS) $(CFLAGS_OS_DEFINES)
+CFLAGS_LOCAL_COMMON = $(PDK_CFLAGS) -DDIAG_$(TESTMODE) $(BOARD_DIAG_CFLAGS) $(CFLAGS_OS_DEFINES) -DFE_$(FE_DEVICE)
 
 # Include common make files
 ifeq ($(MAKERULEDIR), )
diff --git a/packages/ti/board/diag/csirx/frontendcfg/IWR1443/Readme.txt b/packages/ti/board/diag/csirx/frontendcfg/IWR1443/Readme.txt
new file mode 100644 (file)
index 0000000..82333dd
--- /dev/null
@@ -0,0 +1,19 @@
+The binaries are for configuration of IWR1443 front end to match the configuration
+expected by the TPR12 CSIRX Diag app.
+
+tpr12_csi_stream_tx.xer4f should be run from r4f on the FE device.
+
+This binary is generated from mmWaveSDK release 3.4 with customizations specific to TPR12 EVM.
+
+Follow below steps to build the mmWaveSDK to create the binaries
+-----------------------------------------------------------------
+1. Update the mmwave device type in setenv.bat
+    $ cd <path_to_mmwave_sdk>/packages/scripts/windows
+    Update the below line in the setenv.bat file
+    set MMWAVE_SDK_DEVICE=iwr14xx
+2. Execute the below commands to setup environmen variable
+    $ setenv.bat
+3. Execute the below commands to build the CSIStream tx application
+    $ cd ..\..\ti\drivers\test\csi_stream
+    $ gmake csiStreamTxClean
+    $ gmake csiStreamTx
diff --git a/packages/ti/board/diag/csirx/frontendcfg/IWR1443/tpr12_csi_stream_tx.xer4f b/packages/ti/board/diag/csirx/frontendcfg/IWR1443/tpr12_csi_stream_tx.xer4f
new file mode 100644 (file)
index 0000000..8af136f
Binary files /dev/null and b/packages/ti/board/diag/csirx/frontendcfg/IWR1443/tpr12_csi_stream_tx.xer4f differ
index 5ef108b44f532264054f2a384295db81661aee01..32c0ac9ce5c105dbb9981f5bf6eefcae4bcd26c9 100644 (file)
 *
 *****************************************************************************/
 
-
 /**
  *  \file   csirx_test_tpr12.c
  *
  *  \brief  csirx diagnostic test file.
  *
- *  Targeted Functionality: Verification of csirx interface by receiving fixed
- *                          pattern data from Radar sensor.
+ *  Targeted Functionality: Verification of csirx interface by receiving frames from
+ *                          IWR1443 and AWR2243 radar sensors.
  *
- *  Operation: This test verifies CSIRX interface by receiving the userDefinedMapping
- *          user defined from IWR143 radar sensor.
+ *  Operation: This test verifies CSIRX interface by receiving
+ *              1. User defined fixed data pattern from IWR1443 radar sensor
+ *                    - fixed data validation done in case of IWR1443 sensor along
+ *                                         with verifying number of frames and frame size.
+ *              2. Actual frames transmitted from the AWR2243 radar sensor
+ *                    - Varifying the number of frames received and
+ *                      size of each frame received in case of AWR2243 sensor.
  *
  *  Supported SoCs: TPR12.
  *
  *  Supported Platforms: tp12_evm.
  */
 
-#ifdef USE_BIOS
-/* XDCtools Header files */
-#include <xdc/std.h>
-#include <xdc/cfg/global.h>
-#include <xdc/runtime/System.h>
-#include <stdio.h>
-#include <ti/sysbios/knl/Task.h>
-
-/* BIOS Header files */
-#include <ti/sysbios/BIOS.h>
-#include <xdc/runtime/Error.h>
-#endif /* #ifdef USE_BIOS */
-
-
 #include <csirx_test_tpr12.h>
 
-BoardDaig_State gTestState = {0};
+/* Global variable to indicate the frame received */
 volatile bool gFrameReceived = 0;
+/* Global variable to check the error code */
 uint32_t gErrorCode = 0;
+/* Global variable to count the number of frame received */
 uint32_t gFrameCounter = 0;
 
-#define BOARD_DIAG_CSIRX_A_TEST             (1U)
-#define BOARD_DIAG_TEST_BUF_INIT_PATTERN    (0xBE)
-#define BOARD_DIAG_TEST_PAYLOAD_PATTERN_NUM_BYTES_PER_FRAME (128U)
-#define BOARD_DIAG_INIT_PATTERN_SIZE        (BOARD_DIAG_PING_OR_PONG_BUF_SIZE_ALIGNED + 32U)
-/* Ping */
-#pragma DATA_SECTION(testPingBufL3, ".l3ram");
-uint8_t testPingBufL3[BOARD_DIAG_INIT_PATTERN_SIZE]       \
-        __attribute__ ((aligned(BOARD_DIAG_PING_PONG_ALIGNMENT)));
-
-#pragma DATA_SECTION(testPingBufHWA, ".hwaram");
-uint8_t testPingBufHWA[BOARD_DIAG_INIT_PATTERN_SIZE]       \
-        __attribute__ ((aligned(BOARD_DIAG_PING_PONG_ALIGNMENT)));
-
-#pragma DATA_SECTION(testPingBufL2, ".l2ram");
-uint8_t testPingBufL2[BOARD_DIAG_INIT_PATTERN_SIZE]       \
-        __attribute__ ((aligned(BOARD_DIAG_PING_PONG_ALIGNMENT)));
-
-/* Pong */
-#pragma DATA_SECTION(testPongBufL3, ".l3ram");
-uint8_t testPongBufL3[BOARD_DIAG_INIT_PATTERN_SIZE]       \
-        __attribute__ ((aligned(BOARD_DIAG_PING_PONG_ALIGNMENT)));
-
-#pragma DATA_SECTION(testPongBufHWA, ".hwaram");
-uint8_t testPongBufHWA[BOARD_DIAG_INIT_PATTERN_SIZE]       \
-        __attribute__ ((aligned(BOARD_DIAG_PING_PONG_ALIGNMENT)));
-
-#pragma DATA_SECTION(testPongBufL2, ".l2ram");
-uint8_t testPongBufL2[BOARD_DIAG_INIT_PATTERN_SIZE]       \
-        __attribute__ ((aligned(BOARD_DIAG_PING_PONG_ALIGNMENT)));
-
-/**
- *  \brief    Used to read the payload data from the ping-pong buffers
- *            This function comapres the data received from the buffers
- *            to expected value.
- *
- *  \param    handle              [IN]     CSIRX Handler
- *
- *  \return   NULL
- *
- */
-void BoardDiag_CheckPayloadReceived(CSIRX_Handle handle)
-{
-    uint32_t numBytes = 0;
-    uint32_t buffer, bufIndx = 0;
-    uint8_t *buf;
-
-    gErrorCode = CSIRX_getContextReceivedBuffer(handle, BOARD_DIAG_TEST_CONTEXT, &buffer);
-    DebugP_assert(gErrorCode == CSIRX_NO_ERROR);
-    buffer = CSL_globToLocAddr(buffer);
-    buf = (uint8_t *)buffer;
-    CacheP_Inv(buf,BOARD_DIAG_PING_OR_PONG_BUF_SIZE_ALIGNED);
-#if defined(PAYLOAD_PATTERN_CHECK)
-    for(numBytes = 0; numBytes < BOARD_DIAG_PING_OR_PONG_BUF_SIZE_ALIGNED; numBytes++)
-    {
-        if(buf[bufIndx++] != BOARD_DIAG_TEST_PATTERN)
-        {
-            gTestState.isReceivedPayloadCorrect = false;
-            printf("Frame - %d is invalid\n",
-            gTestState.contextIRQcounts[BOARD_DIAG_TEST_CONTEXT].frameEndCodeDetect);
-            break;
-        }
-    }
-#else
-    numBytes = BOARD_DIAG_PING_OR_PONG_BUF_SIZE_ALIGNED;
-    bufIndx = BOARD_DIAG_PING_OR_PONG_BUF_SIZE_ALIGNED;
+/* L3 RAM Ping Buffer */
+#pragma DATA_SECTION(gTestPingBufL3, ".l3ram");
+uint8_t gTestPingBufL3[BOARD_DIAG_CSIRX_TEST_INIT_PATTERN_SIZE]       \
+        __attribute__ ((aligned(BOARD_DIAG_CSIRX_TEST_PING_PONG_ALIGNMENT)));
+/* HWA RAM Ping Buffer */
+#pragma DATA_SECTION(gTestPingBufHWA, ".hwaram");
+uint8_t gTestPingBufHWA[BOARD_DIAG_CSIRX_TEST_INIT_PATTERN_SIZE]       \
+        __attribute__ ((aligned(BOARD_DIAG_CSIRX_TEST_PING_PONG_ALIGNMENT)));
+/* L2 RAM Ping Buffer */
+#pragma DATA_SECTION(gTestPingBufL2, ".l2ram");
+uint8_t gTestPingBufL2[BOARD_DIAG_CSIRX_TEST_INIT_PATTERN_SIZE]       \
+        __attribute__ ((aligned(BOARD_DIAG_CSIRX_TEST_PING_PONG_ALIGNMENT)));
+
+/* L3 RAM Pong Buffer */
+#pragma DATA_SECTION(gTestPongBufL3, ".l3ram");
+uint8_t gTestPongBufL3[BOARD_DIAG_CSIRX_TEST_INIT_PATTERN_SIZE]       \
+        __attribute__ ((aligned(BOARD_DIAG_CSIRX_TEST_PING_PONG_ALIGNMENT)));
+/* HWA RAM Pong Buffer */
+#pragma DATA_SECTION(gTestPongBufHWA, ".hwaram");
+uint8_t gTestPongBufHWA[BOARD_DIAG_CSIRX_TEST_INIT_PATTERN_SIZE]       \
+        __attribute__ ((aligned(BOARD_DIAG_CSIRX_TEST_PING_PONG_ALIGNMENT)));
+/* L2 RAM Pong Buffer */
+#pragma DATA_SECTION(gTestPongBufL2, ".l2ram");
+uint8_t gTestPongBufL2[BOARD_DIAG_CSIRX_TEST_INIT_PATTERN_SIZE]       \
+        __attribute__ ((aligned(BOARD_DIAG_CSIRX_TEST_PING_PONG_ALIGNMENT)));
+
+/* Global structure to hold the states of CSIRX test */
+static BoardDiag_State_t gTestState = {0};
+/* Common callback function */
+static void BoardDiag_commonCallback(CSIRX_Handle handle, uint32_t arg,
+                              CSIRX_CommonIRQ_t *IRQ);
+#ifndef BUILD_DSP_1
+/* Combined EOF callback function */
+static void BoardDiag_combinedEOFcallback(CSIRX_Handle handle, uint32_t arg);
 #endif
-    if (numBytes == BOARD_DIAG_PING_OR_PONG_BUF_SIZE_ALIGNED)
-    {
-        for (; numBytes < (BOARD_DIAG_INIT_PATTERN_SIZE);numBytes++)
-        {
-            if(buf[bufIndx++] != BOARD_DIAG_TEST_BUF_INIT_PATTERN)
-            {
-                gTestState.isReceivedPayloadCorrect = false;
-                printf("Buffer corruption - %d is invalid\n",
-                gTestState.contextIRQcounts[BOARD_DIAG_TEST_CONTEXT].frameEndCodeDetect);
-                break;
-            }
-        }
-    }
-}
-
-/**
- *  \brief    Callback function for common.irq interrupt, generated when
- *            end of frame code and line code detected.
- *
- *  \param    handle              [IN]     CSIRX Handler
- *            arg                 [IN]     CALLBACK function argument
- *            IRQ                 [OUT]    CSIRX common irq
- *
- */
-void BoardDiag_commonCallback(CSIRX_Handle handle, uint32_t arg,
-                              CSIRX_CommonIRQ_t *IRQ)
-{
-    uint8_t i;
-    uint32_t frameCounter =
-    gTestState.contextIRQcounts[BOARD_DIAG_TEST_CONTEXT].frameEndCodeDetect + 1;
-
-    DebugP_assert(handle != NULL);
-    DebugP_assert(arg == BOARD_DIAG_TEST_COMMON_CB_ARG);
-    gTestState.callbackCount.common++;
-
-    gTestState.IRQ.common = *IRQ;
-
-    /* Counts book-keeping */
-    if(IRQ->isOCPerror == true)
-    {
-        gTestState.commonIRQcount.isOCPerror++;
-    }
-    if(IRQ->isComplexIOerror == true)
-    {
-        gTestState.commonIRQcount.isComplexIOerror++;
-    }
-    if(IRQ->isFIFOoverflow == true)
-    {
-        gTestState.commonIRQcount.isFIFOoverflow++;
-    }
-
-    if(IRQ->isComplexIOerror)
-    {
-        gErrorCode = CSIRX_getComplexIOlanesIRQ(handle,
-                                               &gTestState.IRQ.complexIOlanes);
-        if(gErrorCode != CSIRX_NO_ERROR)
-        {
-            DebugP_log1("Error occured while recieving the frame-%d\n", frameCounter);
-        }
-        DebugP_assert(gErrorCode == CSIRX_NO_ERROR);
-
-        gErrorCode = CSIRX_clearAllcomplexIOlanesIRQ(handle);
-        DebugP_assert(gErrorCode == CSIRX_NO_ERROR);
-    }
-
-    for(i = 0; i < CSIRX_NUM_CONTEXTS; i++)
-    {
-        if(IRQ->isContext[i] == true)
-        {
-            gErrorCode = CSIRX_getContextIRQ(handle, i,
-                                            &gTestState.IRQ.context[i]);
-            DebugP_assert(gErrorCode == CSIRX_NO_ERROR);
-
-            if(gTestState.IRQ.context[i].isFrameEndCodeDetect == true)
-            {
-                gTestState.contextIRQcounts[i].frameEndCodeDetect++;
-                  /* Single frame is received */
-                gFrameReceived = true;
-
-            }
-
-            if(gTestState.IRQ.context[i].isLineEndCodeDetect == true)
-            {
-                gTestState.contextIRQcounts[i].lineEndCodeDetect++;
-            }
-
-            gErrorCode = CSIRX_clearAllcontextIRQ(handle, i);
-            DebugP_assert(gErrorCode == CSIRX_NO_ERROR);
-        }
-    }
-}
-
-void BoardDiag_CheckStateError(bool *isTestPass)
-{
-    if(gTestState.commonIRQcount.isOCPerror != 0)
-    {
-        printf("OCP error has occured %d number of times \n", gTestState.commonIRQcount.isOCPerror);
-        *isTestPass = false;
-    }
-    if(gTestState.commonIRQcount.isComplexIOerror != 0)
-    {
-        printf("Complex IO error has occured %d number of times \n", gTestState.commonIRQcount.isComplexIOerror);
-        *isTestPass = false;
-    }
-    if(gTestState.commonIRQcount.isFIFOoverflow != 0)
-    {
-        printf("FIFO Overflow error has occured %d number of times \n",gTestState.commonIRQcount.isFIFOoverflow);
-        *isTestPass = false;
-    }
-}
-
-void BoardDiag_combinedEOFcallback(CSIRX_Handle handle, uint32_t arg)
-{
-    DebugP_assert(handle != NULL);
-    DebugP_assert(arg == BOARD_DIAG_TEST_COMBINED_EOF_CB_ARG);
-    gTestState.callbackCount.combinedEOF++;
-}
-
-Board_DiagConfig testConfig =
+/* Intialization of CSIRX configuration structure */
+static BoardDiag_Config_t gTestConfig =
 {
     /* DDR clock set to 300 MHz */
     .DPHYcfg.ddrClockInHz = 300000000U,
@@ -310,9 +154,9 @@ Board_DiagConfig testConfig =
     .commonCfg.stopStateFSMtimeoutInNanoSecs = 200000U,
     .commonCfg.burstSize = 8,
     .commonCfg.endianness = CSIRX_ALL_LITTLE_ENDIAN,
-    .commonCfg.startOfFrameIRQ0contextId = BOARD_DIAG_TEST_CONTEXT,
+    .commonCfg.startOfFrameIRQ0contextId = BOARD_DIAG_CSIRX_TEST_CONTEXT,
     .commonCfg.startOfFrameIRQ1contextId = 0,
-    .commonCfg.endOfFrameIRQ0contextId = BOARD_DIAG_TEST_CONTEXT,
+    .commonCfg.endOfFrameIRQ0contextId = BOARD_DIAG_CSIRX_TEST_CONTEXT,
     .commonCfg.endOfFrameIRQ1contextId = 0,
     .commonCfg.IRQ.isOCPerror = true,
     .commonCfg.IRQ.isGenericShortPacketReceive = false,
@@ -329,7 +173,7 @@ Board_DiagConfig testConfig =
     .commonCfg.IRQ.isContext[6] = false,
     .commonCfg.IRQ.isContext[7] = false,
     .commonCfg.IRQcallbacks.common.fxn = BoardDiag_commonCallback,
-    .commonCfg.IRQcallbacks.common.arg = BOARD_DIAG_TEST_COMMON_CB_ARG,
+    .commonCfg.IRQcallbacks.common.arg = BOARD_DIAG_CSIRX_TEST_COMMON_CB_ARG,
     .commonCfg.IRQcallbacks.combinedEndOfLine.fxn = NULL,
     .commonCfg.IRQcallbacks.combinedEndOfLine.arg = 0,
 #ifdef BUILD_DSP_1
@@ -339,7 +183,7 @@ Board_DiagConfig testConfig =
     .commonCfg.IRQcallbacks.combinedEndOfFrame.fxn =
         BoardDiag_combinedEOFcallback,
     .commonCfg.IRQcallbacks.combinedEndOfFrame.arg =
-        BOARD_DIAG_TEST_COMBINED_EOF_CB_ARG,
+        BOARD_DIAG_CSIRX_TEST_COMBINED_EOF_CB_ARG,
 #endif
     .commonCfg.IRQcallbacks.startOfFrameIRQ0.fxn = NULL,
     .commonCfg.IRQcallbacks.startOfFrameIRQ0.arg = 0,
@@ -350,9 +194,10 @@ Board_DiagConfig testConfig =
     .commonCfg.IRQcallbacks.endOfFrameIRQ1.fxn = NULL,
     .commonCfg.IRQcallbacks.endOfFrameIRQ1.arg = 0,
 
-    .contextCfg.virtualChannelId = BOARD_DIAG_TEST_VC,
-    .contextCfg.format = BOARD_DIAG_TEST_FORMAT,
-    .contextCfg.userDefinedMapping = BOARD_DIAG_TEST_USER_DEFINED_MAPPING,
+    .contextCfg.virtualChannelId = BOARD_DIAG_CSIRX_TEST_VC,
+    .contextCfg.format = BOARD_DIAG_CSIRX_TEST_FORMAT,
+    .contextCfg.userDefinedMapping =
+            BOARD_DIAG_CSIRX_TEST_USER_DEFINED_MAPPING,
     .contextCfg.isByteSwapEnabled = false,
     .contextCfg.isGenericEnabled = false,
     .contextCfg.isTranscodingEnabled = false,
@@ -364,7 +209,8 @@ Board_DiagConfig testConfig =
     .contextCfg.transcodeConfig.crop.verticalCount = 0,
     .contextCfg.transcodeConfig.crop.verticalSkip = 0,
     .contextCfg.alpha = 0,
-    .contextCfg.pingPongConfig.pingPongSwitchMode = CSIRX_PING_PONG_FRAME_SWITCHING,
+    .contextCfg.pingPongConfig.pingPongSwitchMode =
+            CSIRX_PING_PONG_FRAME_SWITCHING,
     .contextCfg.pingPongConfig.numFramesForFrameBasedPingPongSwitching = 1,
     .contextCfg.pingPongConfig.lineOffset =
                             CSIRX_LINEOFFSET_CONTIGUOUS_STORAGE,
@@ -388,28 +234,220 @@ Board_DiagConfig testConfig =
     .contextCfg.isChecksumEnabled = true
 };
 
+/**
+ *  \brief    Used to read the payload data from the ping-pong buffers
+ *            This function compares the data received from the buffers
+ *            to expected value.
+ *
+ *  \param    handle              [IN]     CSIRX Handler
+ *
+ *  \return   NULL
+ *
+ */
+static void BoardDiag_checkPayloadReceived(CSIRX_Handle handle)
+{
+    uint32_t numBytes = 0;
+    uint32_t buffer, bufIndx = 0;
+    uint8_t *pBuf;
+
+    gErrorCode = CSIRX_getContextReceivedBuffer(handle,
+                        BOARD_DIAG_CSIRX_TEST_CONTEXT, &buffer);
+    DebugP_assert(gErrorCode == CSIRX_NO_ERROR);
+    buffer = CSL_globToLocAddr(buffer);
+    pBuf = (uint8_t *)buffer;
+    CacheP_Inv(pBuf,BOARD_DIAG_CSIRX_TEST_PING_OR_PONG_BUF_SIZE_ALIGNED);
+/* Verifying fixed data pattern received for IWR1443 device only */
+#if defined(FE_IWR1443)
+    for(numBytes = 0; numBytes <
+        BOARD_DIAG_CSIRX_TEST_PING_OR_PONG_BUF_SIZE_ALIGNED; numBytes++)
+    {
+        if(pBuf[bufIndx++] != BOARD_DIAG_CSIRX_TEST_PATTERN)
+        {
+            gTestState.isReceivedPayloadCorrect = false;
+            UART_printf("Frame - %d is invalid\n",
+            gTestState.contextIRQcounts[BOARD_DIAG_CSIRX_TEST_CONTEXT].
+                                        frameEndCodeDetect);
+            break;
+        }
+    }
+#else
+    numBytes = BOARD_DIAG_CSIRX_TEST_PING_OR_PONG_BUF_SIZE_ALIGNED;
+    bufIndx = BOARD_DIAG_CSIRX_TEST_PING_OR_PONG_BUF_SIZE_ALIGNED;
+#endif
+/* Verifying the buffer overflow check */
+    if (numBytes == BOARD_DIAG_CSIRX_TEST_PING_OR_PONG_BUF_SIZE_ALIGNED)
+    {
+        for (; numBytes < (BOARD_DIAG_CSIRX_TEST_INIT_PATTERN_SIZE);numBytes++)
+        {
+            if(pBuf[bufIndx++] != BOARD_DIAG_CSIRX_TEST_BUF_INIT_PATTERN)
+            {
+                gTestState.isReceivedPayloadCorrect = false;
+                UART_printf("Buffer corruption - %d is invalid\n",
+                gTestState.contextIRQcounts[BOARD_DIAG_CSIRX_TEST_CONTEXT].
+                                            frameEndCodeDetect);
+                break;
+            }
+        }
+    }
+}
+
+/**
+ *  \brief    Callback function for common.irq interrupt, generated when
+ *            end of frame code and line code detected.
+ *
+ *  \param    handle              [IN]     CSIRX Handler
+ *  \param    arg                 [IN]     CALLBACK function argument
+ *  \param    IRQ                 [OUT]    CSIRX common irq
+ *
+ *  \return   NULL
+ *
+ */
+static void BoardDiag_commonCallback(CSIRX_Handle handle, uint32_t arg,
+                              CSIRX_CommonIRQ_t *IRQ)
+{
+    uint8_t context;
+    uint32_t frameCounter =
+    gTestState.contextIRQcounts[BOARD_DIAG_CSIRX_TEST_CONTEXT].
+                                frameEndCodeDetect + 1;
+
+    DebugP_assert(handle != NULL);
+    DebugP_assert(arg == BOARD_DIAG_CSIRX_TEST_COMMON_CB_ARG);
+    gTestState.callbackCount.common++;
+
+    gTestState.IRQ.common = *IRQ;
+
+    /* Counts book-keeping */
+    if(IRQ->isOCPerror == true)
+    {
+        gTestState.commonIRQcount.isOCPerror++;
+    }
+    if(IRQ->isComplexIOerror == true)
+    {
+        gTestState.commonIRQcount.isComplexIOerror++;
+    }
+    if(IRQ->isFIFOoverflow == true)
+    {
+        gTestState.commonIRQcount.isFIFOoverflow++;
+    }
+
+    if(IRQ->isComplexIOerror)
+    {
+        gErrorCode = CSIRX_getComplexIOlanesIRQ(handle,
+                                               &gTestState.IRQ.complexIOlanes);
+        if(gErrorCode != CSIRX_NO_ERROR)
+        {
+            UART_printf("Error occured while recieving the frame-%d\n",
+                        frameCounter);
+        }
+        DebugP_assert(gErrorCode == CSIRX_NO_ERROR);
+
+        gErrorCode = CSIRX_clearAllcomplexIOlanesIRQ(handle);
+        DebugP_assert(gErrorCode == CSIRX_NO_ERROR);
+    }
+
+    for(context = 0; context < CSIRX_NUM_CONTEXTS; context++)
+    {
+        if(IRQ->isContext[context] == true)
+        {
+            gErrorCode = CSIRX_getContextIRQ(handle, context,
+                                            &gTestState.IRQ.context[context]);
+            DebugP_assert(gErrorCode == CSIRX_NO_ERROR);
+
+            if(gTestState.IRQ.context[context].isFrameEndCodeDetect == true)
+            {
+                gTestState.contextIRQcounts[context].frameEndCodeDetect++;
+                  /* Single frame is received */
+                gFrameReceived = true;
+
+            }
+
+            if(gTestState.IRQ.context[context].isLineEndCodeDetect == true)
+            {
+                gTestState.contextIRQcounts[context].lineEndCodeDetect++;
+            }
+
+            gErrorCode = CSIRX_clearAllcontextIRQ(handle, context);
+            DebugP_assert(gErrorCode == CSIRX_NO_ERROR);
+        }
+    }
+}
+
+/**
+ *  \brief    State error check function, this function will be called
+ *            Once all the frames are received to check the error states.
+ *
+ *  \param    pIsTestPass              [OUT]    true if there is no state error
+ *
+ *  \return   NULL
+ *
+ */
+static void BoardDiag_checkStateError(bool *pIsTestPass)
+{
+    if(gTestState.commonIRQcount.isOCPerror != 0)
+    {
+        UART_printf("OCP error has occured %d number of times \n",
+                    gTestState.commonIRQcount.isOCPerror);
+        *pIsTestPass = false;
+    }
+    if(gTestState.commonIRQcount.isComplexIOerror != 0)
+    {
+        UART_printf("Complex IO error has occured %d number of times \n",
+                    gTestState.commonIRQcount.isComplexIOerror);
+        *pIsTestPass = false;
+    }
+    if(gTestState.commonIRQcount.isFIFOoverflow != 0)
+    {
+        UART_printf("FIFO Overflow error has occured %d number of times \n",
+                    gTestState.commonIRQcount.isFIFOoverflow);
+        *pIsTestPass = false;
+    }
+}
+#ifndef BUILD_DSP_1
+/**
+ *  \brief    Callback function to be called once the Combined EOF detected.
+ *
+ *  \param    handle              [IN]     CSIRX Handler
+ *  \param    arg                 [IN]     CB function argument
+ *
+ *  \return   NULL
+ *
+ */
+static void BoardDiag_combinedEOFcallback(CSIRX_Handle handle, uint32_t arg)
+{
+    DebugP_assert(handle != NULL);
+    DebugP_assert(arg == BOARD_DIAG_CSIRX_TEST_COMBINED_EOF_CB_ARG);
+    gTestState.callbackCount.combinedEOF++;
+}
+#endif
 /**
  *  \brief    Initialize the ping pong buffers to reset values
+ *
  *  \param    pingBuf   [OUT]    Ping buffer
- *            pongBuf   [OUT]    Pong buffer
- *            sizeBuf   [OUT]    Size of the buffer
+ *  \param    pongBuf   [OUT]    Pong buffer
+ *  \param    sizeBuf   [IN]    Size of the buffer
+ *
+ *  \return   NULL
  *
- * \retval
- *      none
  */
-void BoardDiag_InitBuf(uint32_t pingBuf, uint32_t pongBuf, uint32_t sizeBuf)
+static void BoardDiag_initBuf(uint32_t pingBuf, uint32_t pongBuf,
+                              uint32_t sizeBuf)
 {
     /* initialize ping/pong bufs to known failing pattern */
-    memset((void *)pingBuf, BOARD_DIAG_TEST_BUF_INIT_PATTERN, sizeBuf);
+    memset((void *)pingBuf, BOARD_DIAG_CSIRX_TEST_BUF_INIT_PATTERN, sizeBuf);
     CacheP_wbInv((void *)pingBuf, sizeBuf);
-    memset((void *)pongBuf, BOARD_DIAG_TEST_BUF_INIT_PATTERN, sizeBuf);
+    memset((void *)pongBuf, BOARD_DIAG_CSIRX_TEST_BUF_INIT_PATTERN, sizeBuf);
     CacheP_wbInv((void *)pongBuf, sizeBuf);
 }
 
 /**
  *  \brief    This function initializes test state variable.
+ *
+ *  \param    NULL
+ *
+ *  \return   NULL
+ *
  */
-void BoardDiag_TestInit(void)
+static void BoardDiag_testInit(void)
 {
     memset(&gTestState, 0, sizeof(gTestState));
 
@@ -419,28 +457,30 @@ void BoardDiag_TestInit(void)
 
 /**
  *  \brief    Gets test buffer address from a bunch of input parameters
- *  \param    BoardDiag_RAMtype   [IN]    Type of buffer RAM
- *            buf                 [OUT]   Pointer to where the buffer address is returned
- *            isPing              [IN]    true if ping buffer else pong buffer
  *
+ *  \param    BoardDiag_RamType   [IN]    Type of buffer RAM
+ *  \param    pBuf                [OUT]   Pointer to where the buffer address
+ *                                        is returned
+ *  \param    isPing              [IN]    true if ping buffer else pong buffer
+ *
+ *  \return   NULL
  *
- *  \retval
- *      none
  */
-void BoardDiag_getBuf(BoardDiag_RAMtype bufRAMtype, uint32_t *buf, bool isPing)
+static void BoardDiag_getBuf(BoardDiag_RamType bufRAMtype, uint32_t *pBuf,
+                             bool isPing)
 {
     if(isPing == true)
     {
         switch(bufRAMtype)
         {
-        case BOARD_DIAG_L3RAM:
-            *buf = (uint32_t) &testPingBufL3;
+        case BOARD_DIAG_CSIRX_TEST_L3RAM:
+            *pBuf = (uint32_t) &gTestPingBufL3;
             break;
-        case BOARD_DIAG_HWARAM:
-            *buf = (uint32_t) &testPingBufHWA;
+        case BOARD_DIAG_CSIRX_TEST_HWARAM:
+            *pBuf = (uint32_t) &gTestPingBufHWA;
             break;
-        case BOARD_DIAG_L2RAM:
-            *buf = (uint32_t) &testPingBufL2;
+        case BOARD_DIAG_CSIRX_TEST_L2RAM:
+            *pBuf = (uint32_t) &gTestPingBufL2;
             break;
         }
     }
@@ -448,14 +488,14 @@ void BoardDiag_getBuf(BoardDiag_RAMtype bufRAMtype, uint32_t *buf, bool isPing)
     {
         switch(bufRAMtype)
         {
-        case BOARD_DIAG_L3RAM:
-            *buf = (uint32_t) &testPongBufL3;
+        case BOARD_DIAG_CSIRX_TEST_L3RAM:
+            *pBuf = (uint32_t) &gTestPongBufL3;
             break;
-        case BOARD_DIAG_HWARAM:
-            *buf = (uint32_t) &testPongBufHWA;
+        case BOARD_DIAG_CSIRX_TEST_HWARAM:
+            *pBuf = (uint32_t) &gTestPongBufHWA;
             break;
-        case BOARD_DIAG_L2RAM:
-            *buf = (uint32_t) &testPongBufL2;
+        case BOARD_DIAG_CSIRX_TEST_L2RAM:
+            *pBuf = (uint32_t) &gTestPongBufL2;
             break;
         }
     }
@@ -465,43 +505,44 @@ void BoardDiag_getBuf(BoardDiag_RAMtype bufRAMtype, uint32_t *buf, bool isPing)
  *  \brief    The function performs the CSI-Rx Diagnostic
  *            test.
  *
- *  \return   int8_t
- *               0 - in case of success
- *              -1 - in case of failure.
+ *  \param    instanceId        [IN]        Csirx instance ID
+ *
+ *  \return   bool
+ *              true  - in case of success.
+ *              false - in case of failure.
  *
  */
-bool BoardDiag_CsirxTestRun(uint8_t instanceId)
+static bool BoardDiag_csirxTestRun(uint8_t instanceId)
 {
     CSIRX_Handle         handle;
     int32_t errorCode;
     uint32_t pingBuf, pongBuf;
     CSIRX_InstanceInfo_t instanceInfo;
     bool isTestPass = true;
-    CSL_rcss_rcmRegs *rcss_rcm = (CSL_rcss_rcmRegs *)CSL_RCSS_RCM_U_BASE;
-    volatile bool isComplexIOresetDone, isForceRxModeDeasserted;
-    volatile uint32_t numComplexIOresetDonePolls, numComplexIOPowerStatusPolls,
-             numForceRxModeDeassertedPolls;
+    CSL_rcss_rcmRegs *pRcssRcmRegs = (CSL_rcss_rcmRegs *)CSL_RCSS_RCM_U_BASE;
+    volatile bool isComplexIOresetDone;
     volatile uint8_t isComplexIOpowerStatus;
-    volatile bool isForceRxModeOnComplexIOdeasserted;
 
     /* get ping-pong buffer addresses based on the RAM type and context */
-    BoardDiag_getBuf(BOARD_DIAG_HWARAM, &pingBuf, true);
-    BoardDiag_getBuf(BOARD_DIAG_HWARAM, &pongBuf, false);
+    BoardDiag_getBuf(BOARD_DIAG_CSIRX_TEST_HWARAM, &pingBuf, true);
+    BoardDiag_getBuf(BOARD_DIAG_CSIRX_TEST_HWARAM, &pongBuf, false);
 
-    BoardDiag_InitBuf(pingBuf, pongBuf, BOARD_DIAG_INIT_PATTERN_SIZE);
+    BoardDiag_initBuf(pingBuf, pongBuf,
+                      BOARD_DIAG_CSIRX_TEST_INIT_PATTERN_SIZE);
     /* initialize the ping-pong buffers */
-    BoardDiag_TestInit();
-
-    CSL_FINS(rcss_rcm->RCSS_CSI2A_RST_CTRL, RCSS_RCM_RCSS_CSI2A_RST_CTRL_RCSS_CSI2A_RST_CTRL_ASSERT, 0x7);
+    BoardDiag_testInit();
 
-    CSL_FINS(rcss_rcm->RCSS_CSI2A_RST_CTRL, RCSS_RCM_RCSS_CSI2A_RST_CTRL_RCSS_CSI2A_RST_CTRL_ASSERT, 0U);
+    CSL_FINS(pRcssRcmRegs->RCSS_CSI2A_RST_CTRL,
+             RCSS_RCM_RCSS_CSI2A_RST_CTRL_RCSS_CSI2A_RST_CTRL_ASSERT, 0x7);
 
+    CSL_FINS(pRcssRcmRegs->RCSS_CSI2A_RST_CTRL,
+            RCSS_RCM_RCSS_CSI2A_RST_CTRL_RCSS_CSI2A_RST_CTRL_ASSERT, 0U);
 
     /* Initialize CSIRX */
     errorCode = CSIRX_init();
     if(errorCode != CSIRX_NO_ERROR)
     {
-        printf("CSIRX_init failed with errorCode = %d\n", errorCode);
+        UART_printf("CSIRX_init failed with errorCode = %d\n", errorCode);
         isTestPass = false;
         return isTestPass;
     }
@@ -512,16 +553,17 @@ bool BoardDiag_CsirxTestRun(uint8_t instanceId)
     {
         if(errorCode == CSIRX_E_INVALID__INSTANCE_ID)
         {
-            printf("Csirx Instance not supported\n");
+            UART_printf("Csirx Instance not supported\n");
         }
         else
         {
-            printf("Unable to open the csirx Instance, erorCode = %d\n", errorCode);
+            UART_printf("Unable to open the csirx Instance, erorCode = %d\n",
+                        errorCode);
         }
         isTestPass = false;
         return isTestPass;
     }
-    DebugP_log3("Instance opened, Revision = %d.%d, Number of "
+    UART_printf("Instance opened, Revision = %d.%d, Number of "
             "Contexts = %d\n", instanceInfo.majorRevisionId,
             instanceInfo.minorRevisionId,
             instanceInfo.numContexts);
@@ -530,152 +572,154 @@ bool BoardDiag_CsirxTestRun(uint8_t instanceId)
     errorCode = CSIRX_reset(handle);
     if(errorCode != CSIRX_NO_ERROR)
     {
-        printf("CSIRX_reset failed, errorCode = %d\n", errorCode);
+        UART_printf("CSIRX_reset failed, errorCode = %d\n", errorCode);
         isTestPass = false;
-        return isTestPass;
+        goto exit;
     }
     /* config complex IO - lanes and IRQ */
-    errorCode = CSIRX_configComplexIO(handle, &testConfig.complexIOcfg);
+    errorCode = CSIRX_configComplexIO(handle, &gTestConfig.complexIOcfg);
     if(errorCode != CSIRX_NO_ERROR)
     {
-        printf("CSIRX_configComplexIO failed, errorCode = %d\n",
+        UART_printf("CSIRX_configComplexIO failed, errorCode = %d\n",
                     errorCode);
         isTestPass = false;
-        return isTestPass;
+        goto exit;
     }
 
     /* deassert complex IO reset */
     errorCode = CSIRX_deassertComplexIOreset(handle);
     if(errorCode != CSIRX_NO_ERROR)
     {
-        printf("CSIRX_deassertComplexIOreset failed, errorCode = %d\n",
+        UART_printf("CSIRX_deassertComplexIOreset failed, errorCode = %d\n",
                     errorCode);
         isTestPass = false;
-        return isTestPass;
+        goto exit;
     }
 
     /* config DPHY */
-    errorCode = CSIRX_configDPHY(handle, &testConfig.DPHYcfg);
+    errorCode = CSIRX_configDPHY(handle, &gTestConfig.DPHYcfg);
     if(errorCode != CSIRX_NO_ERROR)
     {
-        printf("CSIRX_configDPHY failed, errorCode = %d\n", errorCode);
+        UART_printf("CSIRX_configDPHY failed, errorCode = %d\n", errorCode);
         isTestPass = false;
-        return isTestPass;
+        goto exit;
     }
 
     errorCode = CSIRX_setComplexIOpowerCommand(handle, 1);
     if(errorCode != CSIRX_NO_ERROR)
     {
-        printf("CSIRX_setComplexIOpowerCommand failed, errorCode = %d\n",
+        UART_printf("CSIRX_setComplexIOpowerCommand failed, errorCode = %d\n",
                     errorCode);
         isTestPass = false;
-        return isTestPass;
+        goto exit;
     }
+    UART_printf("Wait till the complex IO power up!\n");
 
-    numComplexIOPowerStatusPolls = 0;
     do
     {
         errorCode = CSIRX_getComplexIOpowerStatus(handle,
                                             (uint8_t*)&isComplexIOpowerStatus);
         if(errorCode != CSIRX_NO_ERROR)
         {
-            printf("CSIRX_getComplexIOpowerStatus failed, errorCode = "
+            UART_printf("CSIRX_getComplexIOpowerStatus failed, errorCode = "
             " %d\n", errorCode);
             isTestPass = false;
-        return isTestPass;
-        }
-        if (isComplexIOpowerStatus == 0)
-        {
-            Osal_delay(1);
+            goto exit;
         }
-        numComplexIOPowerStatusPolls++;
+
     } while((isComplexIOpowerStatus == 0));
-    printf("Complex IO Powered up.Run AWR FE binrary config now\n");
+    UART_printf("Complex IO Powered up.Run FE binrary config now\n");
     /* config common */
-    testConfig.commonCfg.IRQ.isContext[BOARD_DIAG_TEST_CONTEXT] = true,
-    errorCode = CSIRX_configCommon(handle, &testConfig.commonCfg);
+    gTestConfig.commonCfg.IRQ.isContext[BOARD_DIAG_CSIRX_TEST_CONTEXT] = true,
+    errorCode = CSIRX_configCommon(handle, &gTestConfig.commonCfg);
     if(errorCode != CSIRX_NO_ERROR)
     {
-        printf("CSIRX_configCommon failed, errorCode = %d\n", errorCode);
+        UART_printf("CSIRX_configCommon failed, errorCode = %d\n", errorCode);
         isTestPass = false;
-        return isTestPass;
-    }
-
+        goto exit;
+    }
+#ifndef USE_BIOS
+#ifdef BUILD_C66X_1
+    /* !! HACK to workaround c66x OSAL baremetal issue with not enabling Hwi interrupt associated with EventCombiner */
+    /* Osal baremetal lib for c66x does not enable the Hwi interrupt number when Osal_enableInterrupt is called.
+     * This is correct behaviour but the issue is when registering interrupt the Hwi interrupt number is not
+     * enabled if Osal_registerInterrupt enableIntr param is set to FALSE> This iswrong and the Hwi interrupt
+     * number should be enabled irrespective of a particular eventCombiner event is enabled or not.
+     * Until this is fixed in c6xx osal baremetal library, adding hack in application to enable the interrupt
+     */
+    OsalArch_enableInterrupt(CSIRX_C66X_COMMON_ISR_HWI_INT_NUM);
+#endif
+#endif
     /* config contexts */
     /* assign ping pong address */
-    testConfig.contextCfg.pingPongConfig.pingAddress =
+    gTestConfig.contextCfg.pingPongConfig.pingAddress =
             (uint32_t) CSL_locToGlobAddr(pingBuf);
-    testConfig.contextCfg.pingPongConfig.pongAddress =
+    gTestConfig.contextCfg.pingPongConfig.pongAddress =
             (uint32_t) CSL_locToGlobAddr(pongBuf);
 
-    errorCode = CSIRX_configContext(handle, BOARD_DIAG_TEST_CONTEXT,
-                                &testConfig.contextCfg);
+    errorCode = CSIRX_configContext(handle, BOARD_DIAG_CSIRX_TEST_CONTEXT,
+                                &gTestConfig.contextCfg);
     if(errorCode != CSIRX_NO_ERROR)
     {
-        printf("CSIRX_configContext failed, errorCode = %d\n", errorCode);
-        
+        UART_printf("CSIRX_configContext failed, errorCode = %d\n", errorCode);
         isTestPass = false;
-        return isTestPass;
+        goto exit;
     }
 
     /* enable context */
-    errorCode = CSIRX_enableContext(handle, BOARD_DIAG_TEST_CONTEXT);
+    errorCode = CSIRX_enableContext(handle, BOARD_DIAG_CSIRX_TEST_CONTEXT);
     if(errorCode != CSIRX_NO_ERROR)
     {
-        printf("CSIRX_enableContext failed, errorCode = %d\n", errorCode);
+        UART_printf("CSIRX_enableContext failed, errorCode = %d\n", errorCode);
         isTestPass = false;
-        return isTestPass;
+        goto exit;
     }
 
     /* enable interface */
     errorCode = CSIRX_enableInterface(handle);
     if(errorCode != CSIRX_NO_ERROR)
     {
-        printf("CSIRX_enableInterface failed, errorCode = %d\n",
+        UART_printf("CSIRX_enableInterface failed, errorCode = %d\n",
                     errorCode);
         isTestPass = false;
-        return isTestPass;
+        goto exit;
     }
 
     /* Wait until complex IO reset complete */
-    numComplexIOresetDonePolls = 0;
     do
     {
         errorCode = CSIRX_isComplexIOresetDone(handle,
                                             (bool *)&isComplexIOresetDone);
         if(errorCode != CSIRX_NO_ERROR)
         {
-            printf("CSIRX_isComplexIOresetDone failed, errorCode = "
+            UART_printf("CSIRX_isComplexIOresetDone failed, errorCode = "
             " %d\n", errorCode);
             isTestPass = false;
-            return isTestPass;
+            goto exit;
         }
         if (isComplexIOresetDone == false)
         {
-            /* NOTE: This delay should be much smaller than frame time, default BIOS tick = 1 ms */
+            /* NOTE: This delay should be much smaller than frame time,
+                     default BIOS tick = 1 ms */
             Osal_delay(1);
         }
-        numComplexIOresetDonePolls++;
     }while((isComplexIOresetDone == false));
 
     if(isComplexIOresetDone == false)
     {
-        printf("CSIRX_isComplexIOresetDone attempts exceeded\n");
+        UART_printf("CSIRX_isComplexIOresetDone attempts exceeded\n");
         isTestPass = false;
-        return isTestPass;
+        goto exit;
     }
 
     /*Wait csirx receive the data */
     while(gFrameCounter !=
-          BOARD_DIAG_TEST_NUM_FRAMES)
+          BOARD_DIAG_CSIRX_TEST_NUM_FRAMES)
     {
         if(gFrameReceived)
         {
-            /* TODO: Added global variable counter to check the while loop is not optimized */
             gFrameCounter++;
-            BoardDiag_CheckPayloadReceived(handle);
-            DebugP_log1("Frame - %d received\n" ,
-            gTestState.contextIRQcounts[BOARD_DIAG_TEST_CONTEXT].frameEndCodeDetect);
+            BoardDiag_checkPayloadReceived(handle);
             gFrameReceived = false;
 
             /* Test is considered as failed even if any one of the frame
@@ -688,40 +732,40 @@ bool BoardDiag_CsirxTestRun(uint8_t instanceId)
         Osal_delay(1);
     }
 
-    if(gFrameCounter != BOARD_DIAG_TEST_NUM_FRAMES)
+    if(gFrameCounter != BOARD_DIAG_CSIRX_TEST_NUM_FRAMES)
     {
-        printf("Number of frames recieved does not match\n");
+        UART_printf("Number of frames recieved does not match\n");
         isTestPass = false;
     }
 
-    BoardDiag_CheckStateError(&isTestPass);
+    UART_printf("Number of frame received - %d\n", gFrameCounter);
 
+    BoardDiag_checkStateError(&isTestPass);
+
+exit:
     /* disable context */
-    errorCode = CSIRX_disableContext(handle, BOARD_DIAG_TEST_CONTEXT);
+    errorCode = CSIRX_disableContext(handle, BOARD_DIAG_CSIRX_TEST_CONTEXT);
     if(errorCode != CSIRX_NO_ERROR)
     {
-        printf("CSIRX_disableContext failed,errorCode = %d\n", errorCode);
+        UART_printf("CSIRX_disableContext failed,errorCode = %d\n", errorCode);
         isTestPass = false;
-        return isTestPass;
     }
 
     /* disable interface */
     errorCode = CSIRX_disableInterface(handle);
     if(errorCode != CSIRX_NO_ERROR)
     {
-        printf("CSIRX_disableInterface failed, errorCode = %d\n",
+        UART_printf("CSIRX_disableInterface failed, errorCode = %d\n",
                     errorCode);
         isTestPass = false;
-        return isTestPass;
     }
 
     /* close instance */
     errorCode = CSIRX_close(handle);
     if(errorCode != CSIRX_NO_ERROR)
     {
-        printf("CSIRX_close failed, errorCode = %d\n", errorCode);
+        UART_printf("CSIRX_close failed, errorCode = %d\n", errorCode);
         isTestPass = false;
-        return isTestPass;
     }
 
     return(isTestPass);
@@ -731,47 +775,57 @@ bool BoardDiag_CsirxTestRun(uint8_t instanceId)
  *  \brief    The function performs the CSIRX Diagnostic
  *            test.
  *
+ *  \param    NULL      For Bare Metal test.
+ *
+ *  \param    arg0      [IN]    argument-0 for BIOS test
+ *  \param    arg1      [IN]    argument-1 for BIOS test
+ *
  *  \return   int8_t
  *               0 - in case of success
  *              -1 - in case of failure.
  *
  */
 #ifdef USE_BIOS
-int8_t BoardDiag_CsirxTest(UArg arg0, UArg arg1)
+int8_t BoardDiag_csirxTest(UArg arg0, UArg arg1)
 #else
-int8_t BoardDiag_CsirxTest(void)
+int8_t BoardDiag_csirxTest(void)
 #endif
 {
     uint8_t result;
-    /* TPR12_TODO: Update this to menu based after initial testing */
-#if defined (BOARD_DIAG_CSIRX_A_TEST)
-    uint8_t instanceId = CSIRX_INST_ID_FIRST;
-#else
-    uint8_t instanceId = CSIRX_INST_ID_LAST;
-#endif
-    char instName[25];
+    uint32_t instanceId;
+    uint8_t instName[25];
 
-    printf("\n**********************************************\n");
-    printf  ("*                CSI-Rx Test                 *\n");
-    printf  ("**********************************************\n");
+    UART_printf("\n**********************************************\n");
+    UART_printf  ("*                CSI-Rx Test                 *\n");
+    UART_printf  ("**********************************************\n");
 
-    CSIRX_getInstanceName(instanceId, &instName[0], sizeof(instName));
+    UART_printf("Please select the CSIRX instance id\n");
+    UART_printf("0 -  CSIRX-A\n1 -  CSIRX-B\n");
+    UART_scanFmt("%d\n", &instanceId);
 
-    printf("Receiving data from CSIRX instance #%d: %s\n", instanceId,
+    if((instanceId != CSIRX_INST_A_ID) && (instanceId != CSIRX_INST_B_ID))
+    {
+        UART_printf("Please select the valid CSIRX instance\n");
+        return -1;
+    }
+
+    CSIRX_getInstanceName(instanceId, (char *)instName, sizeof(instName));
+
+    UART_printf("Receiving data from CSIRX instance #%d: %s\n", instanceId,
                  instName);
 
-    result = BoardDiag_CsirxTestRun(instanceId);
+    result = BoardDiag_csirxTestRun(instanceId);
     if(result != true)
     {
-        printf("Failed to receive data from CSIRX instance #%d\n",
+        UART_printf("Failed to receive data from CSIRX instance #%d\n",
                     instanceId);
         return -1;
     }
     else
     {
-        printf("CSIRX diag test passed\n");
+        UART_printf("CSIRX diag test passed\n");
     }
-    printf("csirx test finished\n");
+    UART_printf("csirx test finished\n");
 
     return 0;
 
@@ -780,11 +834,14 @@ int8_t BoardDiag_CsirxTest(void)
 /**
  *  \brief   CSIRX Diagnostic test main function
  *
+ *  \param   NULL
+ *
  *  \return  int - CSIRX Diagnostic test status.
  *             0 - in case of success
  *            -1 - in case of failure.
  *
  */
+#ifndef SPI_BOOT_FRAMEWORK
 int main (void)
 {
     Board_STATUS status;
@@ -795,7 +852,7 @@ int main (void)
     Error_Block eb;
 
     Error_init(&eb);
-    task = Task_create((Task_FuncPtr)BoardDiag_CsirxTest, NULL, &eb);
+    task = Task_create((Task_FuncPtr)BoardDiag_csirxTest, NULL, &eb);
     if (task == NULL) {
         System_printf("Task_create() failed!\n");
         BIOS_exit(0);
@@ -822,17 +879,18 @@ int main (void)
     /* Start BIOS */
     BIOS_start();
 #else
-    ret = BoardDiag_CsirxTest();
+    ret = BoardDiag_csirxTest();
     if(ret != 0)
     {
-        printf("\nCSIRX Test Failed\n");
+        UART_printf("\nCSIRX Test Failed\n");
         return -1;
     }
     else
     {
-        printf("\nCSIRX Test Passed\n");
+        UART_printf("\nCSIRX Test Passed\n");
     }
 #endif
 
     return 0;
 }
+#endif
index 383f21f6d17c3a884701315628df7553fc432be7..645916c53e284c8cfacc1769eac4b791ec082e07 100644 (file)
 #ifndef _CSIRX_TEST_TPR12_H_
 #define _CSIRX_TEST_TPR12_H_
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifdef USE_BIOS
+/* XDCtools Header files */
+#include <xdc/std.h>
+#include <xdc/cfg/global.h>
+#include <xdc/runtime/System.h>
+#include <stdio.h>
+#include <ti/sysbios/knl/Task.h>
+
+/* BIOS Header files */
+#include <ti/sysbios/BIOS.h>
+#include <xdc/runtime/Error.h>
+#else
+#ifdef BUILD_C66X_1
+/* !! HACK to workaround c66x OSAL baremetal issue with not enabling Hwi interrupt associated with EventCombiner */
+/* Osal baremetal lib for c66x does not enable the Hwi interrupt number when Osal_enableInterrupt is called.
+ * This is correct behaviour but the issue is when registering interrupt the Hwi interrupt number is not
+ * enabled if Osal_registerInterrupt enableIntr param is set to FALSE> This iswrong and the Hwi interrupt
+ * number should be enabled irrespective of a particular eventCombiner event is enabled or not.
+ * Until this is fixed in c6xx osal baremetal library, adding hack in application to enable the interrupt
+ */
+#include <ti/osal/src/nonos/Nonos_config.h>
+#define CSIRX_C66X_COMMON_ISR_HWI_INT_NUM                                                         (6U)
+#endif
+#endif /* #ifdef USE_BIOS */
+
 /* Standard Include Files. */
 #include <stdint.h>
 #include <stdlib.h>
 #include <ti/drv/uart/UART.h>
 #include <ti/drv/uart/UART_stdio.h>
 
+
 /* ======================================================================== */
 /*                           Macros & Typedefs                              */
 /* ======================================================================== */
 
 /* should match with CSI TX, assumes complex sample */
-//#define PAYLOAD_PATTERN_CHECK             (1)
-
-#define BOARD_DIAG_TEST_NUM_ADC_SAMPLES_PER_CHIRP (256U)
-#define BOARD_DIAG_TEST_BYTES_PER_ADC_SAMPLE      (4U) //complex
-#define BOARD_DIAG_TEST_NUM_CHIRPS                (1U)
-#define BOARD_DIAG_TEST_NUM_FRAMES                (10U)
-#define BOARD_DIAG_TEST_NUM_RX                    (4U)
-
-#define BOARD_DIAG_TEST_PATTERN                                  (0xFFU)
-#define BOARD_DIAG_TEST_CONTEXT               (2U)
-#define BOARD_DIAG_TEST_FORMAT                (CSIRX_FORMAT_RAW8)
-#define BOARD_DIAG_TEST_VC                    (0U)
-#define BOARD_DIAG_TEST_USER_DEFINED_MAPPING  (CSIRX_USER_DEFINED_FORMAT_RAW8)
-#define BOARD_DIAG_NUM_INSTANCES                         (2U)
+/* Number of ADC Samples per chirp */
+#define BOARD_DIAG_CSIRX_TEST_NUM_ADC_SAMPLES_PER_CHIRP     (256U)
+/* Number of bytes per ADC sample */
+#define BOARD_DIAG_CSIRX_TEST_BYTES_PER_ADC_SAMPLE          (4U)
+/* Number of Chirps */
+#define BOARD_DIAG_CSIRX_TEST_NUM_CHIRPS                    (1U)
+/* Number of frames to be received */
+#define BOARD_DIAG_CSIRX_TEST_NUM_FRAMES                    (10U)
+/* Number of RX channels */
+#define BOARD_DIAG_CSIRX_TEST_NUM_RX                        (4U)
 
-#define BOARD_DIAG_TEST_NUM_BYTES_PER_FRAME \
-    ((BOARD_DIAG_TEST_NUM_ADC_SAMPLES_PER_CHIRP * BOARD_DIAG_TEST_BYTES_PER_ADC_SAMPLE * \
-        BOARD_DIAG_TEST_NUM_CHIRPS * BOARD_DIAG_TEST_NUM_RX))
+/* CSIRX fixed frame pattern */
+#define BOARD_DIAG_CSIRX_TEST_PATTERN                       (0xFFU)
+/* CSIRX context to be used in the test */
+#define BOARD_DIAG_CSIRX_TEST_CONTEXT                       (2U)
+/* CSIRX test frame format */
+#define BOARD_DIAG_CSIRX_TEST_FORMAT                        (CSIRX_FORMAT_RAW8)
+/* CSIRX virtual channel used in the test */
+#define BOARD_DIAG_CSIRX_TEST_VC                            (0U)
+/* CSIRX User defined maaping */
+#define BOARD_DIAG_CSIRX_TEST_USER_DEFINED_MAPPING          \
+        (CSIRX_USER_DEFINED_FORMAT_RAW8)
+/* CSIRX Available instances */
+#define BOARD_DIAG_CSIRX_TEST_NUM_INSTANCES                 (2U)
+/* Number of bytes per frame */
+#define BOARD_DIAG_CSIRX_TEST_NUM_BYTES_PER_FRAME           \
+    ((BOARD_DIAG_CSIRX_TEST_NUM_ADC_SAMPLES_PER_CHIRP *     \
+      BOARD_DIAG_CSIRX_TEST_BYTES_PER_ADC_SAMPLE *          \
+      BOARD_DIAG_CSIRX_TEST_NUM_CHIRPS * BOARD_DIAG_CSIRX_TEST_NUM_RX))
+/* Argument to be passed for common callback function */
+#define BOARD_DIAG_CSIRX_TEST_COMMON_CB_ARG                 (0x11112222U)
+/* Argument to be passed for combined end of frame callback function */
+#define BOARD_DIAG_CSIRX_TEST_COMBINED_EOF_CB_ARG           (0x33334444U)
+/* Allignment for ping-pong buffers */
+#define BOARD_DIAG_CSIRX_TEST_PING_PONG_ALIGNMENT           \
+    CSL_MAX(CSIRX_PING_PONG_ADDRESS_LINEOFFSET_ALIGNMENT_IN_BYTES,  \
+            CSL_CACHE_L1D_LINESIZE)
+/* Ping-Pong total buffer size */
+#define BOARD_DIAG_CSIRX_TEST_PING_OR_PONG_BUF_SIZE_ALIGNED \
+    CSL_NEXT_MULTIPLE_OF(BOARD_DIAG_CSIRX_TEST_NUM_BYTES_PER_FRAME, \
+                         BOARD_DIAG_CSIRX_TEST_PING_PONG_ALIGNMENT)
 
-#define BOARD_DIAG_TEST_COMMON_CB_ARG       (0x11112222U)
-#define BOARD_DIAG_TEST_COMBINED_EOF_CB_ARG (0x33334444U)
+/* Ping-Pong Buffer initialization pattern */
+#define BOARD_DIAG_CSIRX_TEST_BUF_INIT_PATTERN              (0xBE)
+/* Ping-Pong buffer total initialization pattern size */
+#define BOARD_DIAG_CSIRX_TEST_INIT_PATTERN_SIZE             \
+        (BOARD_DIAG_CSIRX_TEST_PING_OR_PONG_BUF_SIZE_ALIGNED + 32U)
 
-#define BOARD_DIAG_PING_PONG_ALIGNMENT CSL_MAX(CSIRX_PING_PONG_ADDRESS_LINEOFFSET_ALIGNMENT_IN_BYTES, \
-                                         CSL_CACHE_L1D_LINESIZE)
-
-#define BOARD_DIAG_PING_OR_PONG_BUF_SIZE_ALIGNED CSL_NEXT_MULTIPLE_OF(BOARD_DIAG_TEST_NUM_BYTES_PER_FRAME, \
-                                                                BOARD_DIAG_PING_PONG_ALIGNMENT)
-
-
-/*! Defines RAM types for choosing ping-pong buffers */
-typedef enum BoardDiag_RAMtype_e
+/**
+ * @brief Defines RAM types for choosing ping-pong buffers
+ *
+ */
+typedef enum BoardDiag_RamType_e
 {
-    BOARD_DIAG_L3RAM,
-    BOARD_DIAG_HWARAM,
-    BOARD_DIAG_L2RAM
-} BoardDiag_RAMtype;
+    /** L3 Ram type */
+    BOARD_DIAG_CSIRX_TEST_L3RAM,
+    /** HWA Ram type */
+    BOARD_DIAG_CSIRX_TEST_HWARAM,
+    /** L2 Ram type */
+    BOARD_DIAG_CSIRX_TEST_L2RAM
+} BoardDiag_RamType;
 
+/**
+ * @brief This structure holds the different structure configurations
+ *        to be initialized in the csirx diag test
+ *
+ */
 typedef struct Board_DiagConfig_s
 {
+    /** Dphy configuration structure */
     CSIRX_DphyConfig_t DPHYcfg;
+    /** complex IO configuration structure */
     CSIRX_ComplexIoConfig_t complexIOcfg;
+    /** Common configuration structure */
     CSIRX_CommonConfig_t commonCfg;
+    /** context configuration structure */
     CSIRX_ContextConfig_t contextCfg;
-} Board_DiagConfig;
+} BoardDiag_Config_t;
 
+/**
+ * @brief This structure holds the frame end code and line end code detect
+ *        IRQ counts
+ *
+ */
 typedef struct BoardDiag_ContextIRQcount_s
 {
+    /** Frame end code detect IRQ */
     volatile uint32_t frameEndCodeDetect;
+    /** Line end code detec IRQ */
     uint32_t lineEndCodeDetect;
-} BoardDiag_ContextIRQcount;
+} BoardDiag_ContextIRQcount_t;
 
-/*! holds common IRQ counts */
+/**
+ * @brief This structure holds common IRQ error counts
+ *
+ */
 typedef struct BoardDiag_CommonIRQcount_s
 {
+    /** OCP error detect variable */
     uint32_t isOCPerror;
+    /** Generic packet detect variable */
     uint32_t isGenericShortPacketReceive;
+    /** ECC One bit short packet error detect variable */
     uint32_t isECConeBitShortPacketErrorCorrect;
+    /** ECC more than one bit cannot correct detect variable */
     uint32_t isECCmoreThanOneBitCannotCorrect;
+    /** Complex IO error detect */
     uint32_t isComplexIOerror;
+    /** FIFO Overflow error detect */
     uint32_t isFIFOoverflow;
-} BoardDiag_CommonIRQcount;
+} BoardDiag_CommonIRQcount_t;
 
+/**
+ * @brief This structure holds common IRQs, Context IRQs and Lane IRQs
+ *
+ */
 typedef struct BoardDiag_IRQs_s
 {
+    /** context IRQ structure */
     CSIRX_ContextIRQ_t context[CSIRX_NUM_CONTEXTS];
+    /** common IRQ structure */
     CSIRX_CommonIRQ_t common;
+    /** Lane IRQ structure */
     CSIRX_LanesIRQ_t  complexIOlanes;
-} BoardDiag_IRQs;
+} BoardDiag_IRQs_t;
 
+/**
+ * @brief This structure holds count of common callback functions
+ *
+ */
 typedef struct BoardDiag_CallBackCounts_s
 {
+    /** common CB count */
     uint32_t common;
+    /** combined end of CB line count */
     uint32_t combinedEOL;
+    /** combined end of CB frame count */
     uint32_t combinedEOF;
+    /** End of frame0 CB count */
     uint32_t EOF0;
+    /** End of frame1 CB count */
     uint32_t EOF1;
+    /** Start of frame0 CB count */
     uint32_t SOF0;
+    /** Start of frame1 CB count */
     uint32_t SOF1;
+    /** context end of line CB count */
     uint32_t contextEOL[CSIRX_NUM_CONTEXTS];
-} BoardDaig_CallBackCounts;
+} BoardDaig_CallBackCounts_t;
 
+/**
+ * @brief This structure holds all states of frame reception
+ *
+ */
 typedef struct BoardDaig_State_s
 {
-       BoardDiag_CommonIRQcount commonIRQcount;
-    BoardDiag_IRQs IRQ;
-    BoardDaig_CallBackCounts callbackCount;
+    /** Common IRQ count */
+       BoardDiag_CommonIRQcount_t commonIRQcount;
+    /** IRQ count */
+    BoardDiag_IRQs_t IRQ;
+    /** callback count */
+    BoardDaig_CallBackCounts_t callbackCount;
+    /** payload received correction detect */
     bool isReceivedPayloadCorrect;
-       BoardDiag_ContextIRQcount contextIRQcounts[CSIRX_NUM_CONTEXTS];
+    /** context IRQ count */
+       BoardDiag_ContextIRQcount_t contextIRQcounts[CSIRX_NUM_CONTEXTS];
+    /** Frame ID to be received */
     uint32_t frameId;
+    /** Line ID to be received */
     uint32_t lineId;
+    /** Buffer used to receive frame */
        uint32_t receivedBuffer;
-} BoardDaig_State;
+} BoardDiag_State_t;
 
-#ifdef __cplusplus
-extern "C" {
+/**
+ *  \brief    The function performs the CSIRX Diagnostic
+ *            test.
+ *
+ *  \param    NULL      For Bare Metal test.
+ *
+ *  \param    arg0      [IN]    argument-0 for BIOS test
+ *  \param    arg1      [IN]    argument-1 for BIOS test
+ *
+ *  \return   int8_t
+ *               0 - in case of success
+ *              -1 - in case of failure.
+ *
+ */
+#ifdef USE_BIOS
+int8_t BoardDiag_csirxTest(UArg arg0, UArg arg1);
+#else
+int8_t BoardDiag_csirxTest(void);
 #endif
 
-
 #ifdef __cplusplus
 }
 #endif /* __cplusplus */
index 3ca4a7057835c364a0253cdffb263b0f9e38cb68..9f503454fa5081115b86be4d7e251ae0cd2821dd 100755 (executable)
@@ -141,14 +141,14 @@ inaCfgObj_t inaDevice[NUM_OF_INA_DEVICES] = {
     {"VIOIN_3V3",    0x44, {0.002, 0.0025, 1.25, 0.001068115, 0.0000427, 59919}},
     {"VDD_SRAM_1V2", 0x45, {0.002, 0.0025, 1.25, 0.000991821, 0.0000397, 64528}}
 };
-#elif defined(SOC_AM64X)  //AM64X_TODO: Need to update Values
+#elif defined(SOC_AM64X)
 inaCfgObj_t inaDevice[NUM_OF_INA_DEVICES] = {
-    {"VDD_CORE",      0x40, {0.002, 0.0025, 1.25, 305.17, 0.000152, 16777}},
-    {"VDDR_CORE",     0x41, {0.01, 0.0025, 1.25,  38.14,  0.0000305, 16777}},
-    {"VDDS_DDR",      0x46, {0.01, 0.0025, 1.25,  86.21,  0.0000610, 8388}},
-    {"SoC_DVDD1V8",   0x4B, {0.01, 0.0025, 1.25, 152.58,  0.0000915, 5592}},
-    {"SoC_DVDD3V3",   0x4C, {0.002, 0.0025, 1.25, 95.36,  0.0000915, 27962}},
-    {"SoC_AVDD1V8",   0x4E, {0.01, 0.0025, 1.25,  38.14,  0.0000122, 41943}}
+    {"VDD_CORE",      0x40, {0.002, 0.0025, 1.25, 0.001804352, 0.0000722, 35469}},
+    {"VDDR_CORE",     0x41, {0.01,  0.0025, 1.25, 0.000198364, 0.0000079, 64527}},
+    {"VDDS_DDR",      0x46, {0.01,  0.0025, 1.25, 0.000196838, 0.0000079, 65027}},
+    {"SoC_DVDD1V8",   0x4B, {0.01,  0.0025, 1.25, 0.000268555, 0.0000107, 47662}},
+    {"SoC_DVDD3V3",   0x4C, {0.01,  0.0025, 1.25, 0.0002388,   0.0000096, 53601}},
+    {"SoC_AVDD1V8",   0x4E, {0.01,  0.0025, 1.25, 0.001266479, 0.0000507, 10106}}
 };
 #else
 /* TODO: Need to update the values for iceK2G */
@@ -806,7 +806,7 @@ int main(void)
        enableMAINI2C(2, CSL_I2C2_CFG_BASE);
 #endif
 
-#if (defined(SOC_J721E) || defined(SOC_J7200) || defined(SOC_AM64X)) && !defined (__aarch64__)
+#if (defined(SOC_J721E) || defined(SOC_J7200)) && !defined (__aarch64__)
     /* MCU I2C instance will be active by default for R5 core.
      * Need update HW attrs to enable MAIN I2C instance.
      */
index ed8518b53a2b14cf35b9ba9fd4f3ea57e43c47c6..0204dc5c70239ede4f667df4afe97d5611a001d9 100755 (executable)
@@ -88,7 +88,7 @@ extern "C" {
 #elif defined(SOC_J7200)
 #define NUM_OF_INA_DEVICES                (32U)
 #define TOT_INA_IN_PM1                    (16U)
-#elif defined(SOC_AM64X)
+#elif defined(am64x_evm)
 #define NUM_OF_INA_DEVICES                (0x06U)
 #endif
 
index 172b99174aae3f816e65dbde624f6d8fb1e5c5f0..c78e2f5686acbc7b69e6ac026910eaea7b2390ff 100755 (executable)
@@ -74,10 +74,10 @@ Board_I2cInitCfg_t boardI2cInitCfg[MAX_NUM_OF_BOARDS] = {
 boardProgInfo_t boardProgInfo[MAX_NUM_OF_BOARDS] = {
     {"EVM Board\0",                 BOARD_I2C_EEPROM_ADDR,     true}
 };
-#elif defined(SOC_AM64X)
+#elif defined(am64x_evm)
 boardProgInfo_t boardProgInfo[MAX_NUM_OF_BOARDS] = {
-    {"CP Board\0",                  CP_EEPROM_SLAVE_ADDR,        true},
-    {"IO Link Board\0",             IOLINK_EEPROM_SLAVE_ADDR,    false}
+    {"AM64x EVM\0",                 EVM_EEPROM_SLAVE_ADDR,       true},
+    {"AM64x IO-Link Board\0",       IOLINK_EEPROM_SLAVE_ADDR,    false}
 };
 Board_I2cInitCfg_t boardI2cInitCfg[MAX_NUM_OF_BOARDS] = {
     {0,     BOARD_SOC_DOMAIN_MAIN, false},
@@ -261,12 +261,6 @@ int main(void)
     /* Detecting Boards */
     enableWKUPI2C();
 #endif
-#if defined(am64x_evm) && !defined (__aarch64__)
-    /* MCU I2C instance will be active by default for R5 core.
-     * Need to update HW attrs to enable MAIN I2C instance.
-     */
-       enableMAINI2C(BOARD_I2C_EEPROM_INSTANCE, CSL_I2C0_CFG_BASE);
-#endif
 #if !(defined(SOC_TPR12))
        for(index = STARTING_BOARD_NUM; index < MAX_NUM_OF_BOARDS; index++)
     {
index 9895e20b2ed38452d2bf27c3ad1b7086317e7fcd..4308e7ace88db9e28db481632d568dc8bb2032f5 100755 (executable)
@@ -95,8 +95,8 @@ extern "C" {
 #define I2C_INSTANCE                            (0U)
 #define MAX_NUM_OF_BOARDS                       (2U)
 
-#define CP_EEPROM_SLAVE_ADDR                    (0x50U)
-#define IOLINK_EEPROM_SLAVE_ADDR              (0x52U)
+#define EVM_EEPROM_SLAVE_ADDR                   (0x50U)
+#define IOLINK_EEPROM_SLAVE_ADDR                (0x52U)
 #define STARTING_BOARD_NUM                      (1U)
 #else  /* j721e_evm */
 #define MAX_NUM_OF_BOARDS                       (9U)
index 82f3ba199b665d6b5d3ff8a78e739f7726aa1c9b..61f48f95f285704301c79a1006ee0be0ef6e54ee 100755 (executable)
 #define PIN81      (0x0140)  /* GPIO1_64/GPIO1_65 */\r
 #define PIN82      (0x0141)\r
 \r
-#define PIN83      (0x012F)  /* GPIO1_27/GPIO0_41/GPIO1_9 */\r
+#define PIN83      (0x011B)  /* GPIO1_27/GPIO0_41/GPIO1_9 */\r
 #define PIN84      (0x0029)\r
 #define PIN85      (0x0109)\r
 /* Safety Connector Pins  */\r
index 9381b0a76e1af1a2ce3d4074d2c80be237038fab..fa583666658e0bcfb7167db7b005b7583b00d984 100755 (executable)
@@ -360,6 +360,17 @@ static int8_t BoardDiag_runGpioTestHeaderVerification(uint8_t index,
                 retVal = -1;
             }
         }
+        else
+        {
+            if(gpioSignalLevel == GPIO_PIN_VAL_HIGH)
+            {
+                UART_printf("Looping back the signal high Passed for pin %d \n\r", pinIndex);
+            }
+            else
+            {
+                UART_printf("Looping back the signal low Passed for pin %d \n\r", pinIndex);
+            }
+        }
     }
 
     return retVal;
@@ -686,9 +697,6 @@ int main(void)
     Board_STATUS status;
     Board_initCfg boardCfg;
     int8_t ret = 0;
-#if defined(SOC_AM64X)
-    char p = 'n';
-#endif
 #if (defined(SOC_J721E) || defined(SOC_AM64X))
     Board_I2cInitCfg_t i2cCfg;
 #endif
@@ -824,18 +832,6 @@ int main(void)
     GPIO_write(0, GPIO_PIN_VAL_HIGH);
 #endif
 
-#if defined(SOC_AM64X)
-    UART_printf("\nPress 'y' if Test Jig Connected");
-
-    UART_scanFmt("%c", &p);
-    if ( (p != 'Y') || (p != 'y') )
-    {
-        UART_printf("\nPlease Connect the HSE test Jig");
-        UART_printf("\nTest Failed");
-               return 0;
-       }
-#endif
-
 #ifdef DIAG_STRESS_TEST
     ret = BoardDiag_expHeaderStressTest();
 #else
index 6a850143d4ebc148682597c91054b5395cfc53e1..dc07e81898673f3344230c24b79dbbcc0d4c2d6a 100755 (executable)
@@ -295,13 +295,18 @@ static int8_t led_run_test(void)
                                                   gUserLeds[k],
                                                   GPIO_SIGNAL_LEVEL_LOW);
 #elif defined(SOC_AM64X)
-                        Board_i2cIoExpPinLevelSet(BOARD_I2C_IOEXP_DEVICE1_ADDR,
-                                                  THREE_PORT_IOEXP,
-                                                  PORTNUM_2,
-                                                  PIN_NUM_0,
-                                                  GPIO_SIGNAL_LEVEL_HIGH);
-
-                        GPIO_write(k, GPIO_PIN_VAL_HIGH);
+                        if(k == 0)
+                        {
+                            GPIO_write(k, GPIO_PIN_VAL_HIGH);
+                        }
+                        else
+                        {
+                            Board_i2cIoExpPinLevelSet(BOARD_I2C_IOEXP_DEVICE1_ADDR,
+                                                      THREE_PORT_IOEXP,
+                                                      PORTNUM_2,
+                                                      PIN_NUM_0,
+                                                      GPIO_SIGNAL_LEVEL_HIGH);
+                        }
 #else
                         GPIO_write(k, GPIO_PIN_VAL_HIGH);
 
@@ -315,13 +320,18 @@ static int8_t led_run_test(void)
                                                   gUserLeds[k],
                                                   GPIO_SIGNAL_LEVEL_HIGH);
 #elif defined(SOC_AM64X)
-                        Board_i2cIoExpPinLevelSet(BOARD_I2C_IOEXP_DEVICE1_ADDR,
-                                                  THREE_PORT_IOEXP,
-                                                  PORTNUM_2,
-                                                  PIN_NUM_0,
-                                                  GPIO_SIGNAL_LEVEL_LOW);
-
-                        GPIO_write(k, GPIO_PIN_VAL_LOW);
+                        if(k == 0)
+                        {
+                            GPIO_write(k, GPIO_PIN_VAL_LOW);
+                        }
+                        else
+                        {
+                            Board_i2cIoExpPinLevelSet(BOARD_I2C_IOEXP_DEVICE1_ADDR,
+                                                      THREE_PORT_IOEXP,
+                                                      PORTNUM_2,
+                                                      PIN_NUM_0,
+                                                      GPIO_SIGNAL_LEVEL_LOW);
+                        }
 #else
                         GPIO_write(k, GPIO_PIN_VAL_LOW);
 #endif
index 5a4e3c4e511ec7e85510ef94f0c1712ddeaca8db..b9fe723879386b7a896fa1accb683fbefdd75590 100755 (executable)
@@ -63,7 +63,7 @@ extern I2C_config_list I2C_config;
  *              -1 - in case of failure.
  *
  */
-#if (!(defined(SOC_AM65XX) || defined(SOC_AM64X)))
+#if !(defined(SOC_AM65XX))
 void led_write(I2C_Handle handle, uint8_t signalLevelData)
 {
     uint8_t tx[2];
@@ -89,7 +89,7 @@ void led_write(I2C_Handle handle, uint8_t signalLevelData)
  *  \param    delayValue          [IN]   Delay count.
  *
  */
-#if ((!(defined(SOC_AM65XX) || defined(SOC_AM64X))) || (!(defined(SOC_K2G))))
+#if ((!(defined(SOC_AM65XX))) || (!(defined(SOC_K2G))))
 void BoardDiag_AppDelay(uint32_t delayVal)
 {
     volatile uint32_t delay = 0;
@@ -116,7 +116,7 @@ static int8_t BoardDiag_i2c_slave_device_led_test(void)
     uint8_t writeRegData = 0;
     int8_t index;
 
-#if (!(defined(SOC_AM65XX) || defined(SOC_AM64X)))
+#if (!(defined(SOC_AM65XX)))
     I2C_Params i2cParams;
     I2C_HwAttrs i2cConfig;
     I2C_Handle handle = NULL;
@@ -152,18 +152,11 @@ static int8_t BoardDiag_i2c_slave_device_led_test(void)
         {
             if((writeRegData & 0xff) == 0)
                  writeRegData = 0x80;
-#if (!(defined(SOC_AM65XX) || defined(SOC_AM64X)))
+#if !defined(SOC_AM65XX)
             led_write(handle, writeRegData);
-#else
-#if defined(SOC_AM64X)
-            ret = Board_i2cIoExpWritePort(BOARD_I2C_IOEXP_DEVICE2_ADDR,
-                                          THREE_PORT_IOEXP,
-                                          PORTNUM_0,
-                                          writeRegData);
 #else
             ret = Board_i2cIoExpWritePort(BOARD_I2C_IOEXP_DEVICE1_ADDR,
                                           PORTNUM_NONE, writeRegData);
-#endif
             if(ret != 0)
             {
                 UART_printf("Writing on to the IO expander port "
@@ -248,7 +241,7 @@ static int8_t BoardDiag_i2c_slave_device_led_test(void)
 
 #endif
 
-#if defined(SOC_AM65XX) || defined(SOC_AM64X)
+#if defined(SOC_AM65XX)
     Board_i2cIoExpDeInit();
 #endif
 
@@ -374,10 +367,6 @@ int main(void)
     enableMAINI2C(0, CSL_I2C0_CFG_BASE);
 #endif
 
-#if defined(SOC_AM64X)
-    enableMAINI2C(BOARD_I2C_IOEXP_DEVICE1_INSTANCE, CSL_I2C1_CFG_BASE);
-#endif
-
 #ifdef SOC_K2G
     DIAG_IntrInit();
 #endif
index bf85b73c438656b87cfafc49da3bd103be12acf2..6a0e86152c87c5fc8ae5014366c7b2d3f38db1a2 100755 (executable)
@@ -42,9 +42,9 @@
  *  Operation: MCAN operational mode is set to CAN-FD. This test will need
  *  two MCAN ports.
  *
- *  Supported SoCs: AM65XX, J721E, J7200,AM64x.
+ *  Supported SoCs: AM65XX, J721E, J7200,AM64x, TPR12.
  *
- *  Supported Platforms: am65xx_idk, j721e_evm, j7200_evm, am64x_evm.
+ *  Supported Platforms: am65xx_idk, j721e_evm, j7200_evm, am64x_evm & tpr12_evm.
  *
  */
 
@@ -78,11 +78,15 @@ BoardDiag_McanPortInfo_t gMcanDiagPortInfo[MCAN_MAX_PORTS_EXP] =
  {CSL_MCAN8_MSGMEM_RAM_BASE,     8, MAIN_MCAN8_TX_INT_NUM, MAIN_MCAN8_RX_INT_NUM, MAIN_MCAN8_TS_INT_NUM},
  {CSL_MCAN10_MSGMEM_RAM_BASE,   10, MAIN_MCAN10_TX_INT_NUM, MAIN_MCAN10_RX_INT_NUM, MAIN_MCAN10_TS_INT_NUM}
 };
-#elif defined(SOC_AM64X)
+#elif defined(am64x_evm)
 BoardDiag_McanPortInfo_t  gMcanDiagPortInfo[MCAN_MAX_PORTS] = {{CSL_MCAN0_MSGMEM_RAM_BASE,     0, MAIN_MCAN0_TX_INT_NUM, MAIN_MCAN0_RX_INT_NUM, MAIN_MCAN0_TS_INT_NUM},
                                                        {CSL_MCAN1_MSGMEM_RAM_BASE,     1, MAIN_MCAN1_TX_INT_NUM, MAIN_MCAN1_RX_INT_NUM, MAIN_MCAN1_TS_INT_NUM},
                                                       };
 
+#elif defined(tpr12_evm)
+BoardDiag_McanPortInfo_t  gMcanDiagPortInfo[MCAN_MAX_PORTS] = {{CSL_MSS_MCANA_MSG_RAM_U_BASE,     0, MAIN_MCAN0_TX_INT_NUM, MAIN_MCAN0_RX_INT_NUM, MAIN_MCAN0_TS_INT_NUM},
+                                                       {CSL_MSS_MCANB_MSG_RAM_U_BASE,     1, MAIN_MCAN1_TX_INT_NUM, MAIN_MCAN1_RX_INT_NUM, MAIN_MCAN1_TS_INT_NUM},
+                                                      };
 #else
 BoardDiag_McanPortInfo_t gMcanDiagPortInfo[MCAN_MAX_PORTS_EXP] =
 {{CSL_MCU_MCAN0_MSGMEM_RAM_BASE, 0, MCU_MCAN0_TX_INT_NUM,  MCU_MCAN0_RX_INT_NUM,  MCU_MCAN0_TS_INT_NUM},
@@ -811,7 +815,7 @@ static void BoardDiag_mcanMainconfigs(void)
 }
 #endif  /* #if defined(SOC_J721E) || defined(SOC_J7200) */
 
-#if !defined(SOC_AM64X)
+#if !defined(SOC_AM64X) && !defined(SOC_TPR12)
 
 /**
  * \brief   This API Initializes the GPIO module
@@ -865,6 +869,7 @@ void BoardDiag_McanMuxEnable(i2cIoExpPinNumber_t pinNum,
 }
 #endif
 
+#if !defined(SOC_TPR12)
 /**
  * \brief   This API enables the CAN transceivers by setting the STB pins
  *
@@ -881,12 +886,12 @@ static void BoardDiag_mcanEnable(void)
     BoardDiag_mcanGpioConfig(CSL_GPIO1_BASE, 1);
     GPIO_write(0, 1);
     GPIO_write(1, 1);
-#elif defined(SOC_AM64X)
+#elif defined(am64x_evm)
     Board_I2cInitCfg_t i2cCfg;
 
     i2cCfg.i2cInst   = BOARD_I2C_IOEXP_DEVICE1_INSTANCE;
     i2cCfg.socDomain = BOARD_SOC_DOMAIN_MAIN;
-    i2cCfg.enableIntr = false;  //AM64X_TODO: Need to check this
+    i2cCfg.enableIntr = false;
     Board_setI2cInitConfig(&i2cCfg);
 
     Board_i2cIoExpInit();
@@ -897,12 +902,12 @@ static void BoardDiag_mcanEnable(void)
                                   PIN_NUM_0,
                                   PIN_DIRECTION_OUTPUT);
 
-    /* Pulling the MCAN0_STB_EN pin to high for the reset to happen */
+    /* Pulling the MCAN0_STB_EN pin to low for normal mode */
     Board_i2cIoExpPinLevelSet(BOARD_I2C_IOEXP_DEVICE1_ADDR,
                               THREE_PORT_IOEXP,
                               PORTNUM_1,
                               PIN_NUM_0,
-                              GPIO_SIGNAL_LEVEL_HIGH);
+                              GPIO_SIGNAL_LEVEL_LOW);
 
     /* Setting the pin direction as output */
     Board_i2cIoExpSetPinDirection(BOARD_I2C_IOEXP_DEVICE1_ADDR,
@@ -911,12 +916,12 @@ static void BoardDiag_mcanEnable(void)
                                   PIN_NUM_1,
                                   PIN_DIRECTION_OUTPUT);
 
-    /* Pulling the MCAN1_STB_EN pin to high for the reset to happen */
+    /* Pulling the MCAN1_STB_EN pin to low for normal mode */
     Board_i2cIoExpPinLevelSet(BOARD_I2C_IOEXP_DEVICE1_ADDR,
                               THREE_PORT_IOEXP,
                               PORTNUM_1,
                               PIN_NUM_1,
-                              GPIO_SIGNAL_LEVEL_HIGH);
+                              GPIO_SIGNAL_LEVEL_LOW);
 
     BOARD_delay(1000);
     Board_i2cIoExpDeInit();
@@ -967,6 +972,7 @@ static void BoardDiag_mcanEnable(void)
     }
 #endif
 }
+#endif /* ifndef SOC_TPR12 */
 
 /**
  * \brief  This function executes MCAN Diagnostic test
@@ -996,8 +1002,10 @@ int32_t BoardDiag_mcanTest(void)
     UART_printf  ("***********************************************\n");
 #endif
 
+#if !defined(SOC_TPR12)
     BoardDiag_mcanEnable();
-#if defined(am65xx_idk) || defined(am64x_evm)
+#endif
+#if defined(am65xx_idk) || defined(am64x_evm) || defined(SOC_TPR12)
     mcanMaxPorts = MCAN_MAX_PORTS;
 #else
     if(expBoardDetect)
index 1d35aa07c48e3c118021085f3036c620cf894ce1..de5a092b6b73b254817f19c88ba76511d92599ef 100755 (executable)
@@ -71,7 +71,7 @@
 #include "board_pinmux.h"
 #include "board_control.h"
 #endif
-#if !defined(am65xx_idk)
+#if !defined(am65xx_idk) && !defined(SOC_TPR12)
 #include "board_i2c_io_exp.h"
 #endif
 
@@ -196,6 +196,19 @@ extern "C" {
 #define MAIN_MCAN1_RX_INT_NUM   (CSLR_R5FSS0_CORE0_INTR_MCAN1_MCANSS_MCAN_LVL_INT_1)
 #define MAIN_MCAN1_TS_INT_NUM   (CSLR_R5FSS0_CORE0_INTR_MCAN1_MCANSS_EXT_TS_ROLLOVER_LVL_INT_0)
 
+#elif defined(SOC_TPR12)
+#define MCAN_MAX_PORTS    (2U)
+
+/* Interrupt configurations */
+
+#define MAIN_MCAN0_TX_INT_NUM   (CSL_MSS_INTR_MSS_MCANA_INT0)
+#define MAIN_MCAN0_RX_INT_NUM   (CSL_MSS_INTR_MSS_MCANA_INT1)
+#define MAIN_MCAN0_TS_INT_NUM   (ESMG1_MCANA_TS_ERR)
+
+#define MAIN_MCAN1_TX_INT_NUM   (CSL_MSS_INTR_MSS_MCANB_INT0)
+#define MAIN_MCAN1_RX_INT_NUM   (CSL_MSS_INTR_MSS_MCANB_INT1)
+#define MAIN_MCAN1_TS_INT_NUM   (ESMG1_MCANB_TS_ERR)
+
 #else
 #define MCAN_MAX_PORTS    (2U)
 #endif /* #if defined(j721e_evm) || defined(j7200_evm) */
old mode 100755 (executable)
new mode 100644 (file)
index 2a2f440..915c882
@@ -74,7 +74,12 @@ int BoardDiag_SpiReadWriteTest(Board_flashHandle  handle,
 {
     uint32_t blockNum, pageNum;      /* Block, page number */
     uint32_t failIndex;
-    
+#if defined(SOC_TPR12)
+    uint32_t ioMode = BOARD_FLASH_QSPI_IO_MODE_QUAD;
+#else
+    uint32_t ioMode = BOARD_FLASH_QSPI_IO_MODE_SINGLE;
+#endif
+
     if (Board_flashOffsetToBlkPage(handle,offset,&blockNum, &pageNum))
     {
         UART_printf("\n Board_flashOffsetToBlkPage failed. \n");
@@ -98,7 +103,7 @@ int BoardDiag_SpiReadWriteTest(Board_flashHandle  handle,
 
     /* Read the flash memory */
     if (Board_flashRead(handle, offset,
-                      (uint8_t *)&rxBuf, TEST_DATA_LEN, NULL))
+                      (uint8_t *)&rxBuf, TEST_DATA_LEN, (void *)(&ioMode)))
     {
         UART_printf("\n Board_flashRead failed. \n");
         return -1;
@@ -330,7 +335,7 @@ int BoardDiag_SpiFlashTest(void)
     /* Open the Board SPI NOR device with QSPI port 0
        and use default SPI configurations */
 
-    boardHandle = Board_flashOpen(BOARD_FLASH_ID_GD25B16CSAG,
+    boardHandle = Board_flashOpen(BOARD_FLASH_ID_GD25B64CW2G,
                                   BOARD_QSPI_NOR_INSTANCE, NULL);
 #else
     SPI_v1_HWAttrs spi_cfg;
@@ -442,7 +447,7 @@ int BoardDiag_SpiFlashStressTest(void)
     /* Open the Board SPI NOR device with QSPI port 0
        and use default SPI configurations */
 
-    boardHandle = Board_flashOpen(BOARD_FLASH_ID_GD25B16CSAG,
+    boardHandle = Board_flashOpen(BOARD_FLASH_ID_GD25B64CW2G,
                                   BOARD_QSPI_NOR_INSTANCE, params);
 #else
     /* Get the default SPI init configurations */
index 6d14d76a79d8609fcc17c1db52649f0025b003cd..bcc944558dd2e19e013c088490c2de5872702ebc 100755 (executable)
@@ -77,7 +77,7 @@ PACKAGE_SRCS_COMMON += ../../common/$(SOC)
 PACKAGE_SRCS_COMMON += ../../board_diag_component.mk\r
 PACKAGE_SRCS_COMMON += ../../create_sd.bat ../../create_sd.sh\r
 \r
-SRCS_COMMON += oled_display.c icek2g_oled.c diag_common_cfg.c\r
+SRCS_COMMON += oled_display.c oled_test.c diag_common_cfg.c\r
 \r
 ifeq ($(CORE),$(filter $(CORE), mcu1_0))\r
 SRCS_ASM_COMMON += diag_entry_r5.asm\r
diff --git a/packages/ti/board/diag/oled_display/src/icek2g_oled.c b/packages/ti/board/diag/oled_display/src/icek2g_oled.c
deleted file mode 100755 (executable)
index c33e676..0000000
+++ /dev/null
@@ -1,796 +0,0 @@
-/*
- * Copyright (c) 2016-2020, Texas Instruments Incorporated
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * *  Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- *
- * *  Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * *  Neither the name of Texas Instruments Incorporated nor the names of
- *    its contributors may be used to endorse or promote products derived
- *    from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
- * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
- * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
- * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
- * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
- * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
- * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
- * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- */
-
-/**
- *
- * \file  icek2g_oled.c
- *
- * \brief This contains specific oled functions.
- *
- *  Supported SoCs : K2G & AM64X
- *
- *  Supported Platforms: k2g_ice & am64x_evm.
- ******************************************************************************/
-
-#include "icek2g_oled.h"
-#include <ti/drv/i2c/I2C.h>
-#include <ti/drv/i2c/soc/I2C_soc.h>
-#include <ti/drv/uart/UART_stdio.h>
-
-#if defined(SOC_K2G) || defined(SOC_AM64X)
-#include "diag_common_cfg.h"
-#endif
-
-uint8_t totalcols;
-uint8_t row;
-uint8_t dir;
-uint8_t col[2];
-uint8_t rolling0;
-uint8_t rolling1;
-
-const uint8_t * FontBitmap;
-const FONT_CHAR_INFO * FontDescriptors;
-const FONT_INFO * FontInfo;
-extern I2C_config_list I2C_config;
-extern void BOARD_delay(uint32_t usecs);
-
-I2C_Params i2cParams;
-I2C_Handle handle = NULL;
-
-/******************************************************************************
- *
- * Function:   oledwrite
- *
- * Description:        Writes a specified number of bytes to the given slave address.
- *
- * Parameters: uint8_t *data          - Pointer to the buffer base address
- *                             uint32_t numBytes      - Number of bytes of buffer
- *
- * Return Value: OLED_RET - OLED_SUCCESS
- *                              OLED_RET - OLED_ERR
- *
- ******************************************************************************/
-static OLED_RET oledwrite(uint8_t *data,uint32_t numBytes)
-{
-       I2C_Transaction i2cTransaction;
-       
-       I2C_transactionInit(&i2cTransaction);
-       i2cTransaction.slaveAddress = OLED_SLAVE_ADDR;
-       i2cTransaction.writeBuf = data;
-       i2cTransaction.writeCount = numBytes;
-       i2cTransaction.readCount = 0;
-       I2C_transfer(handle, &i2cTransaction);
-               
-       return (OLED_SUCCESS);
-}
-
-/******************************************************************************
- *
- * Function:   send
- *
- * Description:        Sends 2 bytes of data to the OSD9616
- *
- * Parameters: uint8_t comdat            - Identifies command or data
- *              uint8_t data              - Data to be sent
- *
- * Return Value: OLED_RET - OLED_SUCCESS
- *                              OLED_RET - OLED_ERR
- *
- ************************************************