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raw | patch | inline | side by side (parent: 93462a8)
author | Badri S <badri@ti.com> | |
Sun, 1 Nov 2020 17:30:11 +0000 (23:00 +0530) | ||
committer | Sivaraj R <sivaraj@ti.com> | |
Mon, 2 Nov 2020 07:49:57 +0000 (01:49 -0600) |
Osal_delay takes delay in ms in ti_rtos configuration
but in CPU cycles in baremetal configuration.The test
case was invoking Osal_delay with large values assuming
CPU cycles but results in huge delay in execution as it
is interpreted as ms delay.Setting delay value to min 1
which is sufficient. Osal_delay API has to be fixed so that
API behaviour is same for both baremetal and ti_rtos
Signed-off-by: Badri S <badri@ti.com>
but in CPU cycles in baremetal configuration.The test
case was invoking Osal_delay with large values assuming
CPU cycles but results in huge delay in execution as it
is interpreted as ms delay.Setting delay value to min 1
which is sufficient. Osal_delay API has to be fixed so that
API behaviour is same for both baremetal and ti_rtos
Signed-off-by: Badri S <badri@ti.com>
packages/ti/drv/edma/unit_test/edma_ut/main.c | [changed mode: 0755->0644] | patch | blob | history |
diff --git a/packages/ti/drv/edma/unit_test/edma_ut/main.c b/packages/ti/drv/edma/unit_test/edma_ut/main.c
/* Comment above line when running from the EVM. */
-#if defined (SIM_BUILD)
#define OSAL_DELAY_SMALL (1U)
#define OSAL_DELAY_BIG (1U)
-#else
-#define OSAL_DELAY_SMALL (1000U)
-#define OSAL_DELAY_BIG (100000U)
-#endif
/* ========================================================================== */
/* Function Declarations */
/* ========================================================================== */
/* Global Variables */
/* ========================================================================== */
-#define TF_CACHE_LINESZ (128U)\r
-#define TF_ROUND_UP(x, y) (((x) + ((y)-1))/(y)*(y))\r
+#define TF_CACHE_LINESZ (128U)
+#define TF_ROUND_UP(x, y) (((x) + ((y)-1))/(y)*(y))
/**
* @brief