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raw | patch | inline | side by side (parent: 0603332)
raw | patch | inline | side by side (parent: 0603332)
author | Sivaraj R <sivaraj@ti.com> | |
Tue, 19 May 2020 05:40:14 +0000 (11:10 +0530) | ||
committer | Sujith Shivalingappa <a0393175@ti.com> | |
Tue, 19 May 2020 06:40:29 +0000 (01:40 -0500) |
Signed-off-by: Sivaraj R <sivaraj@ti.com>
packages/ti/drv/udma/udma_component.mk | patch | blob | history | |
packages/ti/drv/udma/unit_test/udma_ut/src/soc/j721e/udma_test_soc.h | patch | blob | history |
index cf372556ca9e43d5f24f8b4635772522d4afe84b..c41859badd49003d3ffedd713e6fc87caab1df3c 100644 (file)
udma_dru_testapp_INCLUDE = $(udma_dru_testapp_PATH)
export udma_dru_testapp_BOARDLIST = $(drvudma_dru_BOARDLIST)
ifeq ($(SOC),$(filter $(SOC), j721e))
udma_dru_testapp_INCLUDE = $(udma_dru_testapp_PATH)
export udma_dru_testapp_BOARDLIST = $(drvudma_dru_BOARDLIST)
ifeq ($(SOC),$(filter $(SOC), j721e))
-export udma_dru_testapp_$(SOC)_CORELIST = mcu2_1 c66xdsp_1 c66xdsp_2 c7x_1
+export udma_dru_testapp_$(SOC)_CORELIST = mcu2_0 c66xdsp_1 c66xdsp_2 c7x_1
else
export udma_dru_testapp_$(SOC)_CORELIST = $(drvudma_$(SOC)_example_CORELIST)
endif
else
export udma_dru_testapp_$(SOC)_CORELIST = $(drvudma_$(SOC)_example_CORELIST)
endif
udma_dru_direct_tr_testapp_INCLUDE = $(udma_dru_direct_tr_testapp_PATH)
export udma_dru_direct_tr_testapp_BOARDLIST = $(drvudma_dru_BOARDLIST)
ifeq ($(SOC),$(filter $(SOC), j721e))
udma_dru_direct_tr_testapp_INCLUDE = $(udma_dru_direct_tr_testapp_PATH)
export udma_dru_direct_tr_testapp_BOARDLIST = $(drvudma_dru_BOARDLIST)
ifeq ($(SOC),$(filter $(SOC), j721e))
-export udma_dru_direct_tr_testapp_$(SOC)_CORELIST = mcu2_1 c66xdsp_1 c7x_1
+export udma_dru_direct_tr_testapp_$(SOC)_CORELIST = mcu2_0 c66xdsp_1 c7x_1
else
export udma_dru_direct_tr_testapp_$(SOC)_CORELIST = $(drvudma_$(SOC)_example_CORELIST)
endif
else
export udma_dru_direct_tr_testapp_$(SOC)_CORELIST = $(drvudma_$(SOC)_example_CORELIST)
endif
diff --git a/packages/ti/drv/udma/unit_test/udma_ut/src/soc/j721e/udma_test_soc.h b/packages/ti/drv/udma/unit_test/udma_ut/src/soc/j721e/udma_test_soc.h
index 91d55500998c2d5ba3b34b6ab025583b04b578d5..3343edcc89388be25265fa2c5bcbac9c47a1b394 100644 (file)
#define UDMA_TEST_RF_CORE (UDMA_TEST_RF_CORE_MCU2_0)
#define UDMA_TEST_MAX_MAIN_BC_UHC_CH (0U)
#define UDMA_TEST_MAX_MAIN_BC_HC_CH (4U)
#define UDMA_TEST_RF_CORE (UDMA_TEST_RF_CORE_MCU2_0)
#define UDMA_TEST_MAX_MAIN_BC_UHC_CH (0U)
#define UDMA_TEST_MAX_MAIN_BC_HC_CH (4U)
-#define UDMA_TEST_MAX_MAIN_BC_CH (3U)
+#define UDMA_TEST_MAX_MAIN_BC_CH (4U)
#define UDMA_TEST_MAX_MCU_BC_UHC_CH (0U)
#define UDMA_TEST_MAX_MCU_BC_HC_CH (0U)
#define UDMA_TEST_MAX_MCU_BC_CH (1U)
#define UDMA_TEST_MAX_MCU_BC_UHC_CH (0U)
#define UDMA_TEST_MAX_MCU_BC_HC_CH (0U)
#define UDMA_TEST_MAX_MCU_BC_CH (1U)
-#define UDMA_TEST_MAX_DRU_CH (0U)
+#define UDMA_TEST_MAX_DRU_CH (2U)
#define UDMA_TEST_MAIN_HC_START (8U)
#define UDMA_TEST_MCU_HC_START (0U)
#endif
#if defined (BUILD_MCU2_1)
#define UDMA_TEST_RF_CORE (UDMA_TEST_RF_CORE_MCU2_1)
#define UDMA_TEST_MAX_MAIN_BC_UHC_CH (0U)
#define UDMA_TEST_MAIN_HC_START (8U)
#define UDMA_TEST_MCU_HC_START (0U)
#endif
#if defined (BUILD_MCU2_1)
#define UDMA_TEST_RF_CORE (UDMA_TEST_RF_CORE_MCU2_1)
#define UDMA_TEST_MAX_MAIN_BC_UHC_CH (0U)
-#define UDMA_TEST_MAX_MAIN_BC_HC_CH (4U)
-#define UDMA_TEST_MAX_MAIN_BC_CH (4U)
+#define UDMA_TEST_MAX_MAIN_BC_HC_CH (0U)
+#define UDMA_TEST_MAX_MAIN_BC_CH (2U)
#define UDMA_TEST_MAX_MCU_BC_UHC_CH (0U)
#define UDMA_TEST_MAX_MCU_BC_HC_CH (0U)
#define UDMA_TEST_MAX_MCU_BC_CH (1U)
#define UDMA_TEST_MAX_MCU_BC_UHC_CH (0U)
#define UDMA_TEST_MAX_MCU_BC_HC_CH (0U)
#define UDMA_TEST_MAX_MCU_BC_CH (1U)
-#define UDMA_TEST_MAX_DRU_CH (2U)
-#define UDMA_TEST_MAIN_HC_START (12U)
+#define UDMA_TEST_MAX_DRU_CH (0U)
+#define UDMA_TEST_MAIN_HC_START (0U)
#define UDMA_TEST_MCU_HC_START (0U)
#endif
#if defined (BUILD_MCU3_0)
#define UDMA_TEST_MCU_HC_START (0U)
#endif
#if defined (BUILD_MCU3_0)