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raw | patch | inline | side by side (parent: 70e6c3d)
raw | patch | inline | side by side (parent: 70e6c3d)
author | Aditya Wadhwa <a0485151@ti.com> | |
Tue, 24 Nov 2020 15:25:13 +0000 (20:55 +0530) | ||
committer | Sivaraj R <sivaraj@ti.com> | |
Wed, 25 Nov 2020 04:14:35 +0000 (22:14 -0600) |
Removed SIM_BUILD.
Semantic corrections.
WAs added for PDK-8724 and PDK-8607.
Order of tests changed to 166MHz then 133MHz.
Signed-off-by: Aditya Wadhwa <a0485151@ti.com>
Semantic corrections.
WAs added for PDK-8724 and PDK-8607.
Order of tests changed to 166MHz then 133MHz.
Signed-off-by: Aditya Wadhwa <a0485151@ti.com>
packages/ti/drv/spi/soc/am64x/SPI_soc.c | patch | blob | history | |
packages/ti/drv/spi/test/ospi_flash/src/main_ospi_flash_test.c | patch | blob | history |
index e04dbe556eac4070d5a7f6c0105a53587f46596a..94e9bebc3de3b8adedcd8ecb18400e7270f7675f 100644 (file)
OSPI_DEV_DELAY_CSDA /* default Chip Select De-Assert Delay */
},
256, /* device page size is 256 bytes */
- 17, /* device block size is 2 ^ 17 = 128K bytes */
+ 18, /* device block size is 2 ^ 18 = 256K bytes */
OSPI_XFER_LINES_OCTAL, /* xferLines */
(bool)false, /* Interrupt mode */
(bool)true, /* Direct Access Controller mode */
diff --git a/packages/ti/drv/spi/test/ospi_flash/src/main_ospi_flash_test.c b/packages/ti/drv/spi/test/ospi_flash/src/main_ospi_flash_test.c
index 1413eff58d3d14e7874caa9d47837700f27d2877..b199388c3759c45837eca3742f408d120792a20b 100755 (executable)
#define TEST_ADDR_OFFSET (0U)
/* Test read/write buffer length in bytes */
-#ifdef SIM_BUILD
-#define TEST_BUF_LEN (0x100U)
-#else
#define TEST_BUF_LEN (0x100000U)
-#endif
/* Total read/write length in bytes */
#define TEST_DATA_LEN (TEST_BUF_LEN)
@@ -187,16 +183,12 @@ static uint8_t gAppTskStackMain[APP_TSK_STACK_MAIN] __attribute__((aligned(32))
/* Buffer containing the known data that needs to be written to flash */
#if defined(SOC_AM65XX) || defined(SOC_AM64X)
-#ifdef SIM_BUILD
-uint8_t txBuf[TEST_BUF_LEN] __attribute__((aligned(128)));
-#else
#ifdef SPI_DMA_ENABLE
uint8_t txBuf[TEST_BUF_LEN] __attribute__((aligned(UDMA_CACHELINE_ALIGNMENT))) __attribute__((section(".benchmark_buffer")));
#else
uint8_t txBuf[TEST_BUF_LEN] __attribute__((aligned(128))) __attribute__((section(".benchmark_buffer")));
#endif
#endif
-#endif
#if defined(SOC_J721E) || defined(SOC_J7200)
#ifdef SPI_DMA_ENABLE
/* Buffer containing the received data */
#if defined(SOC_AM65XX) || defined(SOC_AM64X)
-#ifdef SIM_BUILD
-uint8_t rxBuf[TEST_BUF_LEN] __attribute__((aligned(128)));
-#else
#ifdef SPI_DMA_ENABLE
uint8_t rxBuf[TEST_BUF_LEN] __attribute__((aligned(UDMA_CACHELINE_ALIGNMENT))) __attribute__((section(".benchmark_buffer")));
#else
uint8_t rxBuf[TEST_BUF_LEN] __attribute__((aligned(128))) __attribute__((section(".benchmark_buffer")));
#endif
#endif
-#endif
#if defined(SOC_J721E) || defined(SOC_J7200)
#ifdef SPI_DMA_ENABLE
ospi_cfg.dmaEnable = test->dmaMode;
/* Enable PHY in DAC mode */
ospi_cfg.phyEnable = true;
+ ospi_cfg.intrEnable = false;
#ifdef SPI_DMA_ENABLE
if (ospi_cfg.dmaEnable)
{
Ospi_udma_init(&ospi_cfg);
}
-#endif
-#if defined(SOC_J7200)
- ospi_cfg.phyEnable = false;
- ospi_cfg.dtrEnable = true;
- ospi_cfg.dacEnable = false;
#endif
}
else
{
/* Enable interrupt in INDAC mode */
-#if defined(USE_BIOS) || defined(BUILD_MCU2_0) || defined(BUILD_MCU2_1) /* interrupts are crashing in these cases */
+#if (defined(SOC_J7200) && (defined(BUILD_MCU2_0)||defined(BUILD_MCU2_1)))
+ ospi_cfg.intrEnable = false;
+#elif (defined(SOC_J721E) && (defined(BUILD_MCU2_0)||defined(BUILD_MCU2_1)||defined(BUILD_MCU3_0)||defined(BUILD_MCU3_1))) /* Work Around until PDK-8607 is addressed */
ospi_cfg.intrEnable = false;
#else
ospi_cfg.intrEnable = true;
#endif
/* Disable PHY in INDAC mode */
ospi_cfg.phyEnable = false;
+ ospi_cfg.dmaEnable = false;
}
if (test->testId == OSPI_TEST_ID_DAC_133M_SPI)
}
ospi_cfg.funcClk = test->clk;
-#if defined(SIM_BUILD)
- ospi_cfg.phyEnable = false;
-#endif
+
if (ospi_cfg.funcClk == OSPI_MODULE_CLK_133M)
{
ospi_cfg.devDelays[3] = OSPI_DEV_DELAY_CSDA;
uint32_t pageNum; /* flash page number */
#endif
bool testPassed = true; /* return value */
- uint32_t ioMode = OSPI_FLASH_OCTAL_READ;
+ uint32_t writeMode = OSPI_FLASH_OCTAL_PAGE_PROG;
+ uint32_t readMode = OSPI_FLASH_OCTAL_READ;
uint32_t deviceId; /* flash device ID */
OSPI_Tests *test = (OSPI_Tests *)arg;
uint32_t i;
#endif
uint32_t startOffset;
uint8_t *pBuf;
- uint32_t tuneEnable = TRUE;
+ uint32_t tuneEnable;
if (test->testId == OSPI_TEST_ID_WR_TUNING)
{
startOffset = TEST_ADDR_OFFSET;
}
+ if(test->dacMode)
+ {
+ tuneEnable = TRUE;
+ }
+ else
+ {
+ tuneEnable = FALSE;
+ }
+
OSPI_initConfig(test);
/* Default Device, SoC's specifics overrides shall follow */
deviceId = BOARD_FLASH_ID_MT35XU512ABA1G12;
-#if defined(SOC_AM64X)
-#ifdef OSPI_QSPI_FLASH
- deviceId = BOARD_FLASH_ID_S25FL256S;
-#else
- deviceId = BOARD_FLASH_ID_MT35XU256ABA1G12;
-#endif
-#endif
-
-#if defined(SOC_J7200)
+#if defined(SOC_J7200) || defined(SOC_AM64X)
deviceId = BOARD_FLASH_ID_S28HS512T;
#endif
#endif
#ifdef OSPI_WRITE
-#if defined(SOC_J7200)
+#if defined(SOC_J7200) || defined(SOC_AM64X)
if (!(test->dmaMode)) /* DAC DMA write does not work on J7200 */
#endif
{
}
/* Write buffer to flash */
if (Board_flashWrite(boardHandle, offset, &pBuf[i],
- xferLen, (void *)(&ioMode)))
+ xferLen, (void *)(&writeMode)))
{
SPI_log("\n Board_flashWrite failed. \n");
testPassed = false;
xferLen = testSegLen;
}
if (Board_flashRead(boardHandle, offset, &rxBuf[i],
- xferLen, (void *)(&ioMode)))
+ xferLen, (void *)(&readMode)))
{
SPI_log("\n Board_flashRead failed. \n");
testPassed = false;
#endif
#ifdef OSPI_WRITE
-#if defined(SOC_J7200)
+#if defined(SOC_J7200) || defined(SOC_AM64X)
if (!(test->dmaMode)) /* DAC DMA write does not work on J7200 */
#endif
{
SPI_log("\r\n %s\r\n", test->testDesc);
}
+/* The order of tests has been changed to 166MHz followed by 133MHz as a work around to PDK-8724 */
OSPI_Tests Ospi_tests[] =
{
#ifdef OSPI_WRITE_TUNING
-#if defined(SOC_J7200)
+#if defined(SOC_J7200) || defined(SOC_AM64X)
{OSPI_flash_test, OSPI_TEST_ID_WR_TUNING, false, false, OSPI_MODULE_CLK_133M, "\r\n OSPI flash test slave to write tuning data to flash"},
#else
{OSPI_flash_test, OSPI_TEST_ID_WR_TUNING, true, false, OSPI_MODULE_CLK_133M, "\r\n OSPI flash test slave to write tuning data to flash"},
#endif
#endif
-#if !defined(SOC_J7200) /* Shall be enabled for J7200 when PDK-7115 is addressed */
+#if !defined(SOC_J7200) && !defined(SOC_AM64X)
+ {OSPI_flash_test, OSPI_TEST_ID_DAC_166M, true, false, OSPI_MODULE_CLK_166M, "\r\n OSPI flash test slave in DAC mode at 166MHz RCLK"},
+#endif
+ {OSPI_flash_test, OSPI_TEST_ID_INDAC_166M, false, false, OSPI_MODULE_CLK_166M, "\r\n OSPI flash test slave in INDAC mode at 166MHz RCLK"},
+#ifdef SPI_DMA_ENABLE
+ {OSPI_flash_test, OSPI_TEST_ID_DAC_DMA_166M, true, true, OSPI_MODULE_CLK_166M, "\r\n OSPI flash test slave in DAC DMA mode at 166MHz RCLK"},
+#endif
+#if !defined(SOC_J7200) && !defined(SOC_AM64X) /* Shall be enabled for J7200 when PDK-7115 is addressed */
/* testFunc testID dacMode dmaMode clk testDesc */
{OSPI_flash_test, OSPI_TEST_ID_DAC_133M, true, false, OSPI_MODULE_CLK_133M, "\r\n OSPI flash test slave in DAC mode at 133MHz RCLK"},
#endif
-
{OSPI_flash_test, OSPI_TEST_ID_INDAC_133M, false, false, OSPI_MODULE_CLK_133M, "\r\n OSPI flash test slave in INDAC mode at 133MHz RCLK"},
#ifdef SPI_DMA_ENABLE
{OSPI_flash_test, OSPI_TEST_ID_DAC_DMA_133M, true, true, OSPI_MODULE_CLK_133M, "\r\n OSPI flash test slave in DAC DMA mode at 133MHz RCLK"},
#endif
-#if !defined(SOC_J7200)
- {OSPI_flash_test, OSPI_TEST_ID_DAC_166M, true, false, OSPI_MODULE_CLK_166M, "\r\n OSPI flash test slave in DAC mode at 166MHz RCLK"},
-#endif
- {OSPI_flash_test, OSPI_TEST_ID_INDAC_166M, false, false, OSPI_MODULE_CLK_166M, "\r\n OSPI flash test slave in INDAC mode at 166MHz RCLK"},
-#ifdef SPI_DMA_ENABLE
- {OSPI_flash_test, OSPI_TEST_ID_DAC_DMA_166M, true, true, OSPI_MODULE_CLK_166M, "\r\n OSPI flash test slave in DAC DMA mode at 166MHz RCLK"},
-#endif
-#if !defined(SOC_J7200) /* Shall be enabled for J7200 when PDK-7115 is addressed */
+#if !defined(SOC_J7200) && !defined(SOC_AM64X) /* Shall be enabled for J7200 when PDK-7115 is addressed */
{OSPI_flash_test, OSPI_TEST_ID_DAC_133M_SPI, true, false, OSPI_MODULE_CLK_133M, "\r\n OSPI flash test slave in DAC Legacy SPI mode at 133MHz RCLK"},
#endif
{NULL, }