PDK-5002: Board: Added csirx diagnostic test for tpr12 evm
authorM V Pratap Reddy <x0257344@ti.com>
Mon, 28 Sep 2020 13:02:48 +0000 (18:32 +0530)
committerSivaraj R <sivaraj@ti.com>
Fri, 30 Oct 2020 09:31:23 +0000 (04:31 -0500)
packages/ti/board/diag/board_diag_component.mk
packages/ti/board/diag/common/tpr12/linker_mcu1_0.lds
packages/ti/board/diag/csirx/build/makefile
packages/ti/board/diag/csirx/src/csirx_test_tpr12.c [new file with mode: 0755]
packages/ti/board/diag/csirx/src/csirx_test_tpr12.h [new file with mode: 0644]

index 297acc3f020b391370618efcfdc852e62741f655..0a53ba67e74814a4b5d5c9a1bcc2f91325788d72 100755 (executable)
@@ -274,8 +274,12 @@ export board_diag_csirx_CORE_DEPENDENCY
 export board_diag_csirx_MAKEFILE
 board_diag_csirx_PKG_LIST = board_diag_csirx
 board_diag_csirx_INCLUDE = $(board_diag_csirx_PATH)
-board_diag_csirx_BOARDLIST = j721e_evm
+board_diag_csirx_BOARDLIST = j721e_evm tpr12_evm
+ifeq ($(SOC),$(filter $(SOC), tpr12))
+board_diag_csirx_$(SOC)_CORELIST = mcu1_0
+else
 board_diag_csirx_$(SOC)_CORELIST = mcu2_0
+endif
 export board_diag_csirx_$(SOC)_CORELIST
 export board_diag_csirx_SBL_APPIMAGEGEN = $(board_diag_APPIMAGEGEN_CTRL)
 
index f49577e0d8969f5a8fe2d25434edfc68f26d9648..316796e96cfb05c5685ed4821ad652411ac2909f 100755 (executable)
@@ -40,7 +40,9 @@ PAGE 0:
     TCMA_RAM (RX) : origin=0x00000100 length=0x00007F00
     TCMB_RAM (RW) : origin=0x00080000 length=0x00008000
     L2_RAM (RW)   : origin=0x10200000 length=0x000EF000
-    L3_RAM (RW)   : origin=0x88000000 length=0x00390000
+    L3_RAM (RW)   : origin=0x88000000 length=0x00300000
+    L3_RAM_Ping (RW)   : origin=0x88300000 length=0x0040000
+    L3_RAM_Pong (RW)   : origin=0x88340000 length=0x0040000
     HWA_RAM (RW)  : origin=0x82000000 length=0x00020000
 
 PAGE 1:
@@ -63,6 +65,11 @@ SECTIONS{
        and allowed to overflow into Z and cannot be split from Y to Z. Some sections
        like bss are not allowed to be split so > notation is used for them
     */
+    .l2ram   : {} > L2_RAM
+    .l3ram   : {} > L3_RAM
+    .pingl3ram   : {} > L3_RAM_Ping
+    .pongl3ram   : {} > L3_RAM_Pong
+       .hwaram  : {} > HWA_RAM
     .text    : {} >> TCMA_RAM | L2_RAM
 
     .const   : {} > L2_RAM
index 81d618136eb692b819d1dcafc8502144fdf8e119..105741ed83609c8aa12abfd4b2353f5515d7219f 100755 (executable)
@@ -69,15 +69,35 @@ INCLUDE_EXTERNAL_INTERFACES = pdk
 \r
 # List all the components required by the application\r
 COMP_LIST_COMMON = $(PDK_COMMON_BAREMETAL_COMP)\r
+\r
+ifeq ($(SOC), $(filter $(SOC), tpr12))\r
+COMP_LIST_COMMON += csirx\r
+else\r
 COMP_LIST_COMMON += fvid2 csirx dss\r
+endif\r
 \r
 # Common source files and CFLAGS across all platforms and cores\r
-PACKAGE_SRCS_COMMON = ../src makefile\r
+PACKAGE_SRCS_COMMON = makefile\r
 PACKAGE_SRCS_COMMON += ../../common/$(SOC)\r
 PACKAGE_SRCS_COMMON += ../../board_diag_component.mk\r
 PACKAGE_SRCS_COMMON += ../../create_sd.bat ../../create_sd.sh\r
 \r
-SRCS_COMMON += csirx_test.c csirx_display.c diag_common_cfg.c\r
+ifeq ($(SOC), $(filter $(SOC), tpr12))\r
+PACKAGE_SRCS_COMMON += ../src/csirx_test_tpr12.c ../src/csirx_test_tpr12.h\r
+SRCS_COMMON += csirx_test_tpr12.c\r
+else\r
+PACKAGE_SRCS_COMMON += ../src/csirx_display.c ../src/csirx_display.h ../src/csirx_test.c ../src/csirx_test.h\r
+SRCS_COMMON += csirx_test.c csirx_display.c\r
+endif\r
+\r
+SRCS_COMMON += diag_common_cfg.c\r
+\r
+ifeq ($(SOC), $(filter $(SOC), tpr12))\r
+ifeq ($(CORE),$(filter $(CORE), mcu1_0))\r
+SRCS_ASM_COMMON += diag_entry_r5.asm\r
+EXTERNAL_LNKCMD_FILE_LOCAL = ../../common/$(SOC)/linker_$(CORE).lds\r
+endif\r
+endif\r
 \r
 CFLAGS_LOCAL_COMMON = $(PDK_CFLAGS) -DDIAG_$(TESTMODE) $(BOARD_DIAG_CFLAGS)\r
 \r
diff --git a/packages/ti/board/diag/csirx/src/csirx_test_tpr12.c b/packages/ti/board/diag/csirx/src/csirx_test_tpr12.c
new file mode 100755 (executable)
index 0000000..cc9f9fc
--- /dev/null
@@ -0,0 +1,804 @@
+/******************************************************************************\r
+* Copyright (c) 2020 Texas Instruments Incorporated - http://www.ti.com\r
+*\r
+* Redistribution and use in source and binary forms, with or without\r
+* modification, are permitted provided that the following conditions\r
+* are met:\r
+*\r
+* Redistributions of source code must retain the above copyright\r
+* notice, this list of conditions and the following disclaimer.\r
+*\r
+* Redistributions in binary form must reproduce the above copyright\r
+* notice, this list of conditions and the following disclaimer in the\r
+* documentation and/or other materials provided with the\r
+* distribution.\r
+*\r
+* Neither the name of Texas Instruments Incorporated nor the names of\r
+* its contributors may be used to endorse or promote products derived\r
+* from this software without specific prior written permission.\r
+*\r
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\r
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\r
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
+* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT\r
+* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,\r
+* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\r
+* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
+* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
+* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\r
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE\r
+* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+*\r
+*****************************************************************************/\r
+\r
+\r
+/**\r
+ *  \file   csirx_test_tpr12.c\r
+ *\r
+ *  \brief  csirx diagnostic test file.\r
+ *\r
+ *  Targeted Functionality: Verification of csirx interface by receiving fixed\r
+ *                          pattern data from Radar sensor.\r
+ *\r
+ *  Operation: This test verifies CSIRX interface by receiving the userDefinedMapping\r
+ *          user defined from IWR143 radar sensor.\r
+ *\r
+ *  Supported SoCs: TPR12.\r
+ *\r
+ *  Supported Platforms: tp12_evm.\r
+ */\r
+\r
+\r
+\r
+#include <csirx_test_tpr12.h>\r
+\r
+BoardDaig_State gTestState = {0};\r
+volatile bool gFrameReceived = 0;\r
+uint32_t gErrorCode = 0;\r
+uint32_t gFrameCounter = 0;\r
+\r
+#define BOARD_DIAG_CSIRX_A_TEST             (1U)\r
+#define BOARD_DIAG_TEST_BUF_INIT_PATTERN    (0xBE)\r
+#define BOARD_DIAG_TEST_PAYLOAD_PATTERN_NUM_BYTES_PER_FRAME (128U)\r
+#define BOARD_DIAG_INIT_PATTERN_SIZE        (BOARD_DIAG_PING_OR_PONG_BUF_SIZE_ALIGNED + 32U)\r
+/* Ping */\r
+#pragma DATA_SECTION(testPingBufL3, ".l3ram");\r
+uint8_t testPingBufL3[BOARD_DIAG_INIT_PATTERN_SIZE]       \\r
+        __attribute__ ((aligned(BOARD_DIAG_PING_PONG_ALIGNMENT)));\r
+\r
+#pragma DATA_SECTION(testPingBufHWA, ".hwaram");\r
+uint8_t testPingBufHWA[BOARD_DIAG_INIT_PATTERN_SIZE]       \\r
+        __attribute__ ((aligned(BOARD_DIAG_PING_PONG_ALIGNMENT)));\r
+\r
+#pragma DATA_SECTION(testPingBufL2, ".l2ram");\r
+uint8_t testPingBufL2[BOARD_DIAG_INIT_PATTERN_SIZE]       \\r
+        __attribute__ ((aligned(BOARD_DIAG_PING_PONG_ALIGNMENT)));\r
+\r
+/* Pong */\r
+#pragma DATA_SECTION(testPongBufL3, ".l3ram");\r
+uint8_t testPongBufL3[BOARD_DIAG_INIT_PATTERN_SIZE]       \\r
+        __attribute__ ((aligned(BOARD_DIAG_PING_PONG_ALIGNMENT)));\r
+\r
+#pragma DATA_SECTION(testPongBufHWA, ".hwaram");\r
+uint8_t testPongBufHWA[BOARD_DIAG_INIT_PATTERN_SIZE]       \\r
+        __attribute__ ((aligned(BOARD_DIAG_PING_PONG_ALIGNMENT)));\r
+\r
+#pragma DATA_SECTION(testPongBufL2, ".l2ram");\r
+uint8_t testPongBufL2[BOARD_DIAG_INIT_PATTERN_SIZE]       \\r
+        __attribute__ ((aligned(BOARD_DIAG_PING_PONG_ALIGNMENT)));\r
+\r
+/**\r
+ *  \brief    Used to read the payload data from the ping-pong buffers\r
+ *            This function comapres the data received from the buffers\r
+ *            to expected value.\r
+ *\r
+ *  \param    handle              [IN]     CSIRX Handler\r
+ *\r
+ *  \return   NULL\r
+ *\r
+ */\r
+void BoardDiag_CheckPayloadReceived(CSIRX_Handle handle)\r
+{\r
+    uint32_t numBytes = 0;\r
+    uint32_t buffer, bufIndx = 0;\r
+    uint8_t *buf;\r
+\r
+    gErrorCode = CSIRX_getContextReceivedBuffer(handle, BOARD_DIAG_TEST_CONTEXT, &buffer);\r
+    DebugP_assert(gErrorCode == CSIRX_NO_ERROR);\r
+    buffer = CSL_globToLocAddr(buffer);\r
+    buf = (uint8_t *)buffer;\r
+    CacheP_Inv(buf,BOARD_DIAG_PING_OR_PONG_BUF_SIZE_ALIGNED);\r
+#if defined(PAYLOAD_PATTERN_CHECK)\r
+    for(numBytes = 0; numBytes < BOARD_DIAG_PING_OR_PONG_BUF_SIZE_ALIGNED; numBytes++)\r
+    {\r
+        if(buf[bufIndx++] != BOARD_DIAG_TEST_PATTERN)\r
+        {\r
+            gTestState.isReceivedPayloadCorrect = false;\r
+            DebugP_log1("Frame - %d is invalid\n",\r
+            gTestState.contextIRQcounts[BOARD_DIAG_TEST_CONTEXT].frameEndCodeDetect);\r
+            break;\r
+        }\r
+    }\r
+#else\r
+    numBytes = BOARD_DIAG_PING_OR_PONG_BUF_SIZE_ALIGNED;\r
+    bufIndx = BOARD_DIAG_PING_OR_PONG_BUF_SIZE_ALIGNED;\r
+#endif\r
+    if (numBytes == BOARD_DIAG_PING_OR_PONG_BUF_SIZE_ALIGNED)\r
+    {\r
+        for (; numBytes < (BOARD_DIAG_INIT_PATTERN_SIZE);numBytes++)\r
+        {\r
+            if(buf[bufIndx++] != BOARD_DIAG_TEST_BUF_INIT_PATTERN)\r
+            {\r
+                gTestState.isReceivedPayloadCorrect = false;\r
+                UART_printf("Buffer corruption - %d is invalid\n",\r
+                gTestState.contextIRQcounts[BOARD_DIAG_TEST_CONTEXT].frameEndCodeDetect);\r
+                break;\r
+            }\r
+        }\r
+    }\r
+}\r
+\r
+/**\r
+ *  \brief    Callback function for common.irq interrupt, generated when\r
+ *            end of frame code and line code detected.\r
+ *\r
+ *  \param    handle              [IN]     CSIRX Handler\r
+ *            arg                 [IN]     CALLBACK function argument\r
+ *            IRQ                 [OUT]    CSIRX common irq\r
+ *\r
+ */\r
+void BoardDiag_commonCallback(CSIRX_Handle handle, uint32_t arg,\r
+                              CSIRX_CommonIRQ_t *IRQ)\r
+{\r
+    uint8_t i;\r
+    uint32_t frameCounter =\r
+    gTestState.contextIRQcounts[BOARD_DIAG_TEST_CONTEXT].frameEndCodeDetect + 1;\r
+\r
+    DebugP_assert(handle != NULL);\r
+    DebugP_assert(arg == BOARD_DIAG_TEST_COMMON_CB_ARG);\r
+    gTestState.callbackCount.common++;\r
+\r
+    gTestState.IRQ.common = *IRQ;\r
+\r
+    /* Counts book-keeping */\r
+    if(IRQ->isOCPerror == true)\r
+    {\r
+        gTestState.commonIRQcount.isOCPerror++;\r
+    }\r
+    if(IRQ->isComplexIOerror == true)\r
+    {\r
+        gTestState.commonIRQcount.isComplexIOerror++;\r
+    }\r
+    if(IRQ->isFIFOoverflow == true)\r
+    {\r
+        gTestState.commonIRQcount.isFIFOoverflow++;\r
+    }\r
+\r
+    if(IRQ->isComplexIOerror)\r
+    {\r
+        gErrorCode = CSIRX_getComplexIOlanesIRQ(handle,\r
+                                               &gTestState.IRQ.complexIOlanes);\r
+        if(gErrorCode != CSIRX_NO_ERROR)\r
+        {\r
+            DebugP_log1("Error occured while recieving the frame-%d\n", frameCounter);\r
+        }\r
+        DebugP_assert(gErrorCode == CSIRX_NO_ERROR);\r
+\r
+        gErrorCode = CSIRX_clearAllcomplexIOlanesIRQ(handle);\r
+        DebugP_assert(gErrorCode == CSIRX_NO_ERROR);\r
+    }\r
+\r
+    for(i = 0; i < CSIRX_NUM_CONTEXTS; i++)\r
+    {\r
+        if(IRQ->isContext[i] == true)\r
+        {\r
+            gErrorCode = CSIRX_getContextIRQ(handle, i,\r
+                                            &gTestState.IRQ.context[i]);\r
+            DebugP_assert(gErrorCode == CSIRX_NO_ERROR);\r
+\r
+            if(gTestState.IRQ.context[i].isFrameEndCodeDetect == true)\r
+            {\r
+                gTestState.contextIRQcounts[i].frameEndCodeDetect++;\r
+                  /* Single frame is received */\r
+                gFrameReceived = true;\r
+\r
+            }\r
+\r
+            if(gTestState.IRQ.context[i].isLineEndCodeDetect == true)\r
+            {\r
+                gTestState.contextIRQcounts[i].lineEndCodeDetect++;\r
+            }\r
+\r
+            gErrorCode = CSIRX_clearAllcontextIRQ(handle, i);\r
+            DebugP_assert(gErrorCode == CSIRX_NO_ERROR);\r
+        }\r
+    }\r
+}\r
+\r
+void BoardDiag_CheckStateError(bool *isTestPass)\r
+{\r
+    if(gTestState.commonIRQcount.isOCPerror != 0)\r
+    {\r
+        DebugP_log1("OCP error has occured %d number of times \n", gTestState.commonIRQcount.isOCPerror);\r
+        *isTestPass = false;\r
+    }\r
+    if(gTestState.commonIRQcount.isComplexIOerror != 0)\r
+    {\r
+        DebugP_log1("Complex IO error has occured %d number of times \n", gTestState.commonIRQcount.isComplexIOerror);\r
+        *isTestPass = false;\r
+    }\r
+    if(gTestState.commonIRQcount.isFIFOoverflow != 0)\r
+    {\r
+        DebugP_log1("FIFO Overflow error has occured %d number of times \n",gTestState.commonIRQcount.isFIFOoverflow);\r
+        *isTestPass = false;\r
+    }\r
+}\r
+\r
+void BoardDiag_combinedEOFcallback(CSIRX_Handle handle, uint32_t arg)\r
+{\r
+    DebugP_assert(handle != NULL);\r
+    DebugP_assert(arg == BOARD_DIAG_TEST_COMBINED_EOF_CB_ARG);\r
+    gTestState.callbackCount.combinedEOF++;\r
+}\r
+\r
+Board_DiagConfig testConfig =\r
+{\r
+    /* DDR clock set to 300 MHz */\r
+    .DPHYcfg.ddrClockInHz = 300000000U,\r
+    .DPHYcfg.isClockMissingDetectionEnabled = true,\r
+    .DPHYcfg.triggerEscapeCode[0] = 0x0,\r
+    .DPHYcfg.triggerEscapeCode[1] = 0x0,\r
+    .DPHYcfg.triggerEscapeCode[2] = 0x0,\r
+    .DPHYcfg.triggerEscapeCode[3] = 0x0,\r
+\r
+    .complexIOcfg.lanesConfig.dataLane[0].polarity = 0,\r
+    .complexIOcfg.lanesConfig.dataLane[0].position = CSIRX_LANE_POSITION_1,\r
+    .complexIOcfg.lanesConfig.dataLane[1].polarity = 0,\r
+    .complexIOcfg.lanesConfig.dataLane[1].position = CSIRX_LANE_POSITION_2,\r
+    .complexIOcfg.lanesConfig.dataLane[2].polarity = 0,\r
+    .complexIOcfg.lanesConfig.dataLane[2].position = CSIRX_LANE_POSITION_4,\r
+    .complexIOcfg.lanesConfig.dataLane[3].polarity = 0,\r
+    .complexIOcfg.lanesConfig.dataLane[3].position = CSIRX_LANE_POSITION_5,\r
+    .complexIOcfg.lanesConfig.clockLane.polarity = 0,\r
+    .complexIOcfg.lanesConfig.clockLane.position = CSIRX_LANE_POSITION_3,\r
+    .complexIOcfg.lanesIRQ.isAllLanesULPMenter = true,\r
+    .complexIOcfg.lanesIRQ.isAllLanesULPMexit = true,\r
+    .complexIOcfg.lanesIRQ.dataLane[0].isStateTransitionToULPM = true,\r
+    .complexIOcfg.lanesIRQ.dataLane[0].isControlError = true,\r
+    .complexIOcfg.lanesIRQ.dataLane[0].isEscapeEntryError = true,\r
+    .complexIOcfg.lanesIRQ.dataLane[0].isStartOfTransmisionSyncError = true,\r
+    .complexIOcfg.lanesIRQ.dataLane[0].isStartOfTransmisionError = true,\r
+    .complexIOcfg.lanesIRQ.dataLane[1].isStateTransitionToULPM = true,\r
+    .complexIOcfg.lanesIRQ.dataLane[1].isControlError = true,\r
+    .complexIOcfg.lanesIRQ.dataLane[1].isEscapeEntryError = true,\r
+    .complexIOcfg.lanesIRQ.dataLane[1].isStartOfTransmisionSyncError = true,\r
+    .complexIOcfg.lanesIRQ.dataLane[1].isStartOfTransmisionError = true,\r
+    .complexIOcfg.lanesIRQ.dataLane[2].isStateTransitionToULPM = true,\r
+    .complexIOcfg.lanesIRQ.dataLane[2].isControlError = true,\r
+    .complexIOcfg.lanesIRQ.dataLane[2].isEscapeEntryError = true,\r
+    .complexIOcfg.lanesIRQ.dataLane[2].isStartOfTransmisionSyncError = true,\r
+    .complexIOcfg.lanesIRQ.dataLane[2].isStartOfTransmisionError = true,\r
+    .complexIOcfg.lanesIRQ.dataLane[3].isStateTransitionToULPM = true,\r
+    .complexIOcfg.lanesIRQ.dataLane[3].isControlError = true,\r
+    .complexIOcfg.lanesIRQ.dataLane[3].isEscapeEntryError = true,\r
+    .complexIOcfg.lanesIRQ.dataLane[3].isStartOfTransmisionSyncError = true,\r
+    .complexIOcfg.lanesIRQ.dataLane[3].isStartOfTransmisionError = true,\r
+    .complexIOcfg.lanesIRQ.clockLane.isStateTransitionToULPM = true,\r
+    .complexIOcfg.lanesIRQ.clockLane.isControlError = true,\r
+    .complexIOcfg.lanesIRQ.clockLane.isEscapeEntryError = true,\r
+    .complexIOcfg.lanesIRQ.clockLane.isStartOfTransmisionSyncError = true,\r
+    .complexIOcfg.lanesIRQ.clockLane.isStartOfTransmisionError = true,\r
+\r
+    .commonCfg.isSoftStoppingOnInterfaceDisable = true,\r
+    .commonCfg.isECCenabled = false,\r
+    .commonCfg.isEXP16SignExtensionEnabled = false,\r
+    .commonCfg.isBurstSizeExpand = false,\r
+    .commonCfg.isNonPostedWrites = true,\r
+    .commonCfg.isOCPautoIdle = true,\r
+    .commonCfg.stopStateFSMtimeoutInNanoSecs = 200000U,\r
+    .commonCfg.burstSize = 8,\r
+    .commonCfg.endianness = CSIRX_ALL_LITTLE_ENDIAN,\r
+    .commonCfg.startOfFrameIRQ0contextId = BOARD_DIAG_TEST_CONTEXT,\r
+    .commonCfg.startOfFrameIRQ1contextId = 0,\r
+    .commonCfg.endOfFrameIRQ0contextId = BOARD_DIAG_TEST_CONTEXT,\r
+    .commonCfg.endOfFrameIRQ1contextId = 0,\r
+    .commonCfg.IRQ.isOCPerror = true,\r
+    .commonCfg.IRQ.isGenericShortPacketReceive = false,\r
+    .commonCfg.IRQ.isECConeBitShortPacketErrorCorrect = false,\r
+    .commonCfg.IRQ.isECCmoreThanOneBitCannotCorrect = false,\r
+    .commonCfg.IRQ.isComplexIOerror = true,\r
+    .commonCfg.IRQ.isFIFOoverflow = true,\r
+    .commonCfg.IRQ.isContext[0] = false,\r
+    .commonCfg.IRQ.isContext[1] = false,\r
+    .commonCfg.IRQ.isContext[2] = false,\r
+    .commonCfg.IRQ.isContext[3] = false,\r
+    .commonCfg.IRQ.isContext[4] = false,\r
+    .commonCfg.IRQ.isContext[5] = false,\r
+    .commonCfg.IRQ.isContext[6] = false,\r
+    .commonCfg.IRQ.isContext[7] = false,\r
+    .commonCfg.IRQcallbacks.common.fxn = BoardDiag_commonCallback,\r
+    .commonCfg.IRQcallbacks.common.arg = BOARD_DIAG_TEST_COMMON_CB_ARG,\r
+    .commonCfg.IRQcallbacks.combinedEndOfLine.fxn = NULL,\r
+    .commonCfg.IRQcallbacks.combinedEndOfLine.arg = 0,\r
+#ifdef BUILD_DSP_1\r
+    .commonCfg.IRQcallbacks.combinedEndOfFrame.fxn = NULL,\r
+    .commonCfg.IRQcallbacks.combinedEndOfFrame.arg = 0,\r
+#else\r
+    .commonCfg.IRQcallbacks.combinedEndOfFrame.fxn =\r
+        BoardDiag_combinedEOFcallback,\r
+    .commonCfg.IRQcallbacks.combinedEndOfFrame.arg =\r
+        BOARD_DIAG_TEST_COMBINED_EOF_CB_ARG,\r
+#endif\r
+    .commonCfg.IRQcallbacks.startOfFrameIRQ0.fxn = NULL,\r
+    .commonCfg.IRQcallbacks.startOfFrameIRQ0.arg = 0,\r
+    .commonCfg.IRQcallbacks.startOfFrameIRQ1.fxn = NULL,\r
+    .commonCfg.IRQcallbacks.startOfFrameIRQ1.arg = 0,\r
+    .commonCfg.IRQcallbacks.endOfFrameIRQ0.fxn = NULL,\r
+    .commonCfg.IRQcallbacks.endOfFrameIRQ0.arg = 0,\r
+    .commonCfg.IRQcallbacks.endOfFrameIRQ1.fxn = NULL,\r
+    .commonCfg.IRQcallbacks.endOfFrameIRQ1.arg = 0,\r
+\r
+    .contextCfg.virtualChannelId = BOARD_DIAG_TEST_VC,\r
+    .contextCfg.format = BOARD_DIAG_TEST_FORMAT,\r
+    .contextCfg.userDefinedMapping = BOARD_DIAG_TEST_USER_DEFINED_MAPPING,\r
+    .contextCfg.isByteSwapEnabled = false,\r
+    .contextCfg.isGenericEnabled = false,\r
+    .contextCfg.isTranscodingEnabled = false,\r
+    .contextCfg.transcodeConfig.transcodeFormat =\r
+                                CSIRX_TRANSCODE_FORMAT_NO_TRANSCODE,\r
+    .contextCfg.transcodeConfig.isHorizontalDownscalingBy2Enabled = false,\r
+    .contextCfg.transcodeConfig.crop.horizontalCount = 0,\r
+    .contextCfg.transcodeConfig.crop.horizontalSkip = 0,\r
+    .contextCfg.transcodeConfig.crop.verticalCount = 0,\r
+    .contextCfg.transcodeConfig.crop.verticalSkip = 0,\r
+    .contextCfg.alpha = 0,\r
+    .contextCfg.pingPongConfig.pingPongSwitchMode = CSIRX_PING_PONG_FRAME_SWITCHING,\r
+    .contextCfg.pingPongConfig.numFramesForFrameBasedPingPongSwitching = 1,\r
+    .contextCfg.pingPongConfig.lineOffset =\r
+                            CSIRX_LINEOFFSET_CONTIGUOUS_STORAGE,\r
+    .contextCfg.pingPongConfig.pingAddress = NULL,\r
+    .contextCfg.pingPongConfig.pongAddress = NULL,\r
+    .contextCfg.numFramesToAcquire = CSIRX_NUM_FRAMES_TO_ACQUIRE_INFINITE,\r
+    .contextCfg.IRQ.isNumLines = false,\r
+    .contextCfg.isNumLinesForIRQmoduloWithinFrame = false,\r
+    .contextCfg.numLinesForIRQ = 0,\r
+    .contextCfg.IRQ.isFramesToAcquire = false,\r
+    .contextCfg.IRQ.isPayloadChecksumMismatch = false,\r
+    .contextCfg.IRQ.isFrameStartCodeDetect = true,\r
+    .contextCfg.IRQ.isFrameEndCodeDetect = true,\r
+    .contextCfg.IRQ.isLineStartCodeDetect = false,\r
+    .contextCfg.IRQ.isLineEndCodeDetect = true,\r
+    .contextCfg.IRQ.isECConeBitLongPacketCorrect = false,\r
+    .contextCfg.endOfLineIRQcallback.fxn = NULL,\r
+    .contextCfg.endOfLineIRQcallback.arg = NULL,\r
+    .contextCfg.isEndOfFramePulseEnabled = true,\r
+    .contextCfg.isEndOfLinePulseEnabled = false,\r
+    .contextCfg.isChecksumEnabled = true\r
+};\r
+\r
+/**\r
+ *  \brief    Initialize the ping pong buffers to reset values\r
+ *  \param    pingBuf   [OUT]    Ping buffer\r
+ *            pongBuf   [OUT]    Pong buffer\r
+ *            sizeBuf   [OUT]    Size of the buffer\r
+ *\r
+ * \retval\r
+ *      none\r
+ */\r
+void BoardDiag_InitBuf(uint32_t pingBuf, uint32_t pongBuf, uint32_t sizeBuf)\r
+{\r
+    /* initialize ping/pong bufs to known failing pattern */\r
+    memset((void *)pingBuf, BOARD_DIAG_TEST_BUF_INIT_PATTERN, sizeBuf);\r
+    CacheP_wbInv((void *)pingBuf, sizeBuf);\r
+    memset((void *)pongBuf, BOARD_DIAG_TEST_BUF_INIT_PATTERN, sizeBuf);\r
+    CacheP_wbInv((void *)pongBuf, sizeBuf);\r
+}\r
+\r
+/**\r
+ *  \brief    This function initializes test state variable.\r
+ */\r
+void BoardDiag_TestInit(void)\r
+{\r
+    memset(&gTestState, 0, sizeof(gTestState));\r
+\r
+    gTestState.isReceivedPayloadCorrect = true;\r
+\r
+}\r
+\r
+/**\r
+ *  \brief    Gets test buffer address from a bunch of input parameters\r
+ *  \param    BoardDiag_RAMtype   [IN]    Type of buffer RAM\r
+ *            buf                 [OUT]   Pointer to where the buffer address is returned\r
+ *            isPing              [IN]    true if ping buffer else pong buffer\r
+ *\r
+ *\r
+ *  \retval\r
+ *      none\r
+ */\r
+void BoardDiag_getBuf(BoardDiag_RAMtype bufRAMtype, uint32_t *buf, bool isPing)\r
+{\r
+    if(isPing == true)\r
+    {\r
+        switch(bufRAMtype)\r
+        {\r
+        case BOARD_DIAG_L3RAM:\r
+            *buf = (uint32_t) &testPingBufL3;\r
+            break;\r
+        case BOARD_DIAG_HWARAM:\r
+            *buf = (uint32_t) &testPingBufHWA;\r
+            break;\r
+        case BOARD_DIAG_L2RAM:\r
+            *buf = (uint32_t) &testPingBufL2;\r
+            break;\r
+        }\r
+    }\r
+    else\r
+    {\r
+        switch(bufRAMtype)\r
+        {\r
+        case BOARD_DIAG_L3RAM:\r
+            *buf = (uint32_t) &testPongBufL3;\r
+            break;\r
+        case BOARD_DIAG_HWARAM:\r
+            *buf = (uint32_t) &testPongBufHWA;\r
+            break;\r
+        case BOARD_DIAG_L2RAM:\r
+            *buf = (uint32_t) &testPongBufL2;\r
+            break;\r
+        }\r
+    }\r
+}\r
+\r
+/**\r
+ *  \brief    The function performs the CSI-Rx Diagnostic\r
+ *            test.\r
+ *\r
+ *  \return   int8_t\r
+ *               0 - in case of success\r
+ *              -1 - in case of failure.\r
+ *\r
+ */\r
+bool BoardDiag_CsirxTestRun(uint8_t instanceId)\r
+{\r
+    CSIRX_Handle         handle;\r
+    int32_t errorCode;\r
+    uint32_t pingBuf, pongBuf;\r
+    CSIRX_InstanceInfo_t instanceInfo;\r
+    bool isTestPass = true;\r
+    CSL_rcss_rcmRegs *rcss_rcm = (CSL_rcss_rcmRegs *)CSL_RCSS_RCM_U_BASE;\r
+    volatile bool isComplexIOresetDone, isForceRxModeDeasserted;\r
+    volatile uint32_t numComplexIOresetDonePolls, numComplexIOPowerStatusPolls,\r
+             numForceRxModeDeassertedPolls;\r
+    volatile uint8_t isComplexIOpowerStatus;\r
+    volatile bool isForceRxModeOnComplexIOdeasserted;\r
+\r
+    /* get ping-pong buffer addresses based on the RAM type and context */\r
+    BoardDiag_getBuf(BOARD_DIAG_HWARAM, &pingBuf, true);\r
+    BoardDiag_getBuf(BOARD_DIAG_HWARAM, &pongBuf, false);\r
+\r
+    BoardDiag_InitBuf(pingBuf, pongBuf, BOARD_DIAG_INIT_PATTERN_SIZE);\r
+    /* initialize the ping-pong buffers */\r
+    BoardDiag_TestInit();\r
+\r
+    CSL_FINS(rcss_rcm->RCSS_CSI2A_RST_CTRL, RCSS_RCM_RCSS_CSI2A_RST_CTRL_RCSS_CSI2A_RST_CTRL_ASSERT, 0x7);\r
+\r
+    CSL_FINS(rcss_rcm->RCSS_CSI2A_RST_CTRL, RCSS_RCM_RCSS_CSI2A_RST_CTRL_RCSS_CSI2A_RST_CTRL_ASSERT, 0U);\r
+\r
+\r
+    /* Initialize CSIRX */\r
+    errorCode = CSIRX_init();\r
+    if(errorCode != CSIRX_NO_ERROR)\r
+    {\r
+        DebugP_log1("CSIRX_init failed with errorCode = %d\n", errorCode);\r
+        isTestPass = false;\r
+        return isTestPass;\r
+    }\r
+\r
+    /* Open the CSI Instance */\r
+    handle = CSIRX_open(instanceId, NULL, &errorCode, &instanceInfo);\r
+    if(handle == NULL)\r
+    {\r
+        if(errorCode == CSIRX_E_INVALID__INSTANCE_ID)\r
+        {\r
+            printf("Csirx Instance not supported\n");\r
+        }\r
+        else\r
+        {\r
+            printf("Unable to open the csirx Instance, erorCode = %d\n", errorCode);\r
+        }\r
+        isTestPass = false;\r
+        return isTestPass;\r
+    }\r
+    DebugP_log3("Instance opened, Revision = %d.%d, Number of "\r
+            "Contexts = %d\n", instanceInfo.majorRevisionId,\r
+            instanceInfo.minorRevisionId,\r
+            instanceInfo.numContexts);\r
+\r
+    /* reset csi */\r
+    errorCode = CSIRX_reset(handle);\r
+    if(errorCode != CSIRX_NO_ERROR)\r
+    {\r
+        DebugP_log1("CSIRX_reset failed, errorCode = %d\n", errorCode);\r
+        isTestPass = false;\r
+        return isTestPass;\r
+    }\r
+    /* config complex IO - lanes and IRQ */\r
+    errorCode = CSIRX_configComplexIO(handle, &testConfig.complexIOcfg);\r
+    if(errorCode != CSIRX_NO_ERROR)\r
+    {\r
+        DebugP_log1("CSIRX_configComplexIO failed, errorCode = %d\n",\r
+                    errorCode);\r
+        isTestPass = false;\r
+        return isTestPass;\r
+    }\r
+\r
+    /* deassert complex IO reset */\r
+    errorCode = CSIRX_deassertComplexIOreset(handle);\r
+    if(errorCode != CSIRX_NO_ERROR)\r
+    {\r
+        DebugP_log1("CSIRX_deassertComplexIOreset failed, errorCode = %d\n",\r
+                    errorCode);\r
+        isTestPass = false;\r
+        return isTestPass;\r
+    }\r
+\r
+    /* config DPHY */\r
+    errorCode = CSIRX_configDPHY(handle, &testConfig.DPHYcfg);\r
+    if(errorCode != CSIRX_NO_ERROR)\r
+    {\r
+        DebugP_log1("CSIRX_configDPHY failed, errorCode = %d\n", errorCode);\r
+        isTestPass = false;\r
+        return isTestPass;\r
+    }\r
+\r
+    errorCode = CSIRX_setComplexIOpowerCommand(handle, 1);\r
+    if(errorCode != CSIRX_NO_ERROR)\r
+    {\r
+        DebugP_log1("CSIRX_setComplexIOpowerCommand failed, errorCode = %d\n",\r
+                    errorCode);\r
+        isTestPass = false;\r
+        return isTestPass;\r
+    }\r
+\r
+    numComplexIOPowerStatusPolls = 0;\r
+    do\r
+    {\r
+        errorCode = CSIRX_getComplexIOpowerStatus(handle,\r
+                                            (uint8_t*)&isComplexIOpowerStatus);\r
+        if(errorCode != CSIRX_NO_ERROR)\r
+        {\r
+            DebugP_log1("CSIRX_getComplexIOpowerStatus failed, errorCode = "\r
+            " %d\n", errorCode);\r
+            isTestPass = false;\r
+        return isTestPass;\r
+        }\r
+        if (isComplexIOpowerStatus == 0)\r
+        {\r
+            Osal_delay(1);\r
+        }\r
+        numComplexIOPowerStatusPolls++;\r
+    } while((isComplexIOpowerStatus == 0));\r
+    \r
+    /* config common */\r
+    testConfig.commonCfg.IRQ.isContext[BOARD_DIAG_TEST_CONTEXT] = true,\r
+    errorCode = CSIRX_configCommon(handle, &testConfig.commonCfg);\r
+    if(errorCode != CSIRX_NO_ERROR)\r
+    {\r
+        DebugP_log1("CSIRX_configCommon failed, errorCode = %d\n", errorCode);\r
+        isTestPass = false;\r
+        return isTestPass;\r
+    }\r
+\r
+    /* config contexts */\r
+    /* assign ping pong address */\r
+    testConfig.contextCfg.pingPongConfig.pingAddress =\r
+            (uint32_t) CSL_locToGlobAddr(pingBuf);\r
+    testConfig.contextCfg.pingPongConfig.pongAddress =\r
+            (uint32_t) CSL_locToGlobAddr(pongBuf);\r
+\r
+    errorCode = CSIRX_configContext(handle, BOARD_DIAG_TEST_CONTEXT,\r
+                                &testConfig.contextCfg);\r
+    if(errorCode != CSIRX_NO_ERROR)\r
+    {\r
+        DebugP_log1("CSIRX_configContext failed, errorCode = %d\n", errorCode);\r
+        \r
+        isTestPass = false;\r
+        return isTestPass;\r
+    }\r
+\r
+    /* enable context */\r
+    errorCode = CSIRX_enableContext(handle, BOARD_DIAG_TEST_CONTEXT);\r
+    if(errorCode != CSIRX_NO_ERROR)\r
+    {\r
+        DebugP_log1("CSIRX_enableContext failed, errorCode = %d\n", errorCode);\r
+        isTestPass = false;\r
+        return isTestPass;\r
+    }\r
+\r
+    /* enable interface */\r
+    errorCode = CSIRX_enableInterface(handle);\r
+    if(errorCode != CSIRX_NO_ERROR)\r
+    {\r
+        DebugP_log1("CSIRX_enableInterface failed, errorCode = %d\n",\r
+                    errorCode);\r
+        isTestPass = false;\r
+        return isTestPass;\r
+    }\r
+\r
+    /* Wait until complex IO reset complete */\r
+    numComplexIOresetDonePolls = 0;\r
+    do\r
+    {\r
+        errorCode = CSIRX_isComplexIOresetDone(handle,\r
+                                            (bool *)&isComplexIOresetDone);\r
+        if(errorCode != CSIRX_NO_ERROR)\r
+        {\r
+            DebugP_log1("CSIRX_isComplexIOresetDone failed, errorCode = "\r
+            " %d\n", errorCode);\r
+            isTestPass = false;\r
+            return isTestPass;\r
+        }\r
+        if (isComplexIOresetDone == false)\r
+        {\r
+            /* NOTE: This delay should be much smaller than frame time, default BIOS tick = 1 ms */\r
+            Osal_delay(1);\r
+        }\r
+        numComplexIOresetDonePolls++;\r
+    }while((isComplexIOresetDone == false));\r
+\r
+    if(isComplexIOresetDone == false)\r
+    {\r
+        DebugP_log0("CSIRX_isComplexIOresetDone attempts exceeded\n");\r
+        isTestPass = false;\r
+        return isTestPass;\r
+    }\r
+\r
+    /*Wait csirx receive the data */\r
+    while(gFrameCounter !=\r
+          BOARD_DIAG_TEST_NUM_FRAMES)\r
+    {\r
+        if(gFrameReceived)\r
+        {\r
+            /* TODO: Added global variable counter to check the while loop is not optimized */\r
+            gFrameCounter++;\r
+            BoardDiag_CheckPayloadReceived(handle);\r
+            DebugP_log1("Frame - %d received\n" ,\r
+            gTestState.contextIRQcounts[BOARD_DIAG_TEST_CONTEXT].frameEndCodeDetect);\r
+            gFrameReceived = false;\r
+\r
+            /* Test is considered as failed even if any one of the frame\r
+               received is invalid */\r
+            if(isTestPass != false)\r
+            {\r
+                isTestPass = isTestPass & gTestState.isReceivedPayloadCorrect;\r
+            }\r
+        }\r
+        Osal_delay(1);\r
+    }\r
+\r
+    if(gFrameCounter != BOARD_DIAG_TEST_NUM_FRAMES)\r
+    {\r
+        DebugP_log0("Number of frames recieved does not match\n");\r
+        isTestPass = false;\r
+    }\r
+\r
+    BoardDiag_CheckStateError(&isTestPass);\r
+\r
+    /* disable context */\r
+    errorCode = CSIRX_disableContext(handle, BOARD_DIAG_TEST_CONTEXT);\r
+    if(errorCode != CSIRX_NO_ERROR)\r
+    {\r
+        DebugP_log1("CSIRX_disableContext failed,errorCode = %d\n", errorCode);\r
+        isTestPass = false;\r
+        return isTestPass;\r
+    }\r
+\r
+    /* disable interface */\r
+    errorCode = CSIRX_disableInterface(handle);\r
+    if(errorCode != CSIRX_NO_ERROR)\r
+    {\r
+        DebugP_log1("CSIRX_disableInterface failed, errorCode = %d\n",\r
+                    errorCode);\r
+        isTestPass = false;\r
+        return isTestPass;\r
+    }\r
+\r
+    /* close instance */\r
+    errorCode = CSIRX_close(handle);\r
+    if(errorCode != CSIRX_NO_ERROR)\r
+    {\r
+        DebugP_log1("CSIRX_close failed, errorCode = %d\n", errorCode);\r
+        isTestPass = false;\r
+        return isTestPass;\r
+    }\r
+\r
+    return(isTestPass);\r
+}\r
+\r
+/**\r
+ *  \brief    The function performs the CSIRX Diagnostic\r
+ *            test.\r
+ *\r
+ *  \return   int8_t\r
+ *               0 - in case of success\r
+ *              -1 - in case of failure.\r
+ *\r
+ */\r
+int8_t BoardDiag_CsirxTest()\r
+{\r
+    uint8_t result;\r
+    /* TPR12_TODO: Update this to menu based after initial testing */\r
+#if defined (BOARD_DIAG_CSIRX_A_TEST)\r
+    uint8_t instanceId = CSIRX_INST_ID_FIRST;\r
+#else\r
+    uint8_t instanceId = CSIRX_INST_ID_LAST;\r
+#endif\r
+    char instName[25];\r
+\r
+    UART_printf("\n**********************************************\n");\r
+    UART_printf  ("*                CSI-Rx Test                 *\n");\r
+    UART_printf  ("**********************************************\n");\r
+\r
+    CSIRX_getInstanceName(instanceId, &instName[0], sizeof(instName));\r
+\r
+    UART_printf("Receiving data from CSIRX instance #%d: %s\n", instanceId,\r
+                 instName);\r
+\r
+    result = BoardDiag_CsirxTestRun(instanceId);\r
+    if(result != true)\r
+    {\r
+        UART_printf("Failed to receive data from CSIRX instance #%d\n",\r
+                    instanceId);\r
+        return -1;\r
+    }\r
+    else\r
+    {\r
+        UART_printf("CSIRX diag test passed\n");\r
+    }\r
+    UART_printf("csirx test finished\n");\r
+\r
+    return 0;\r
+\r
+}\r
+\r
+/**\r
+ *  \brief   CSIRX Diagnostic test main function\r
+ *\r
+ *  \return  int - CSIRX Diagnostic test status.\r
+ *             0 - in case of success\r
+ *            -1 - in case of failure.\r
+ *\r
+ */\r
+int main (void)\r
+{\r
+    Board_STATUS status;\r
+    Board_initCfg boardCfg;\r
+    int8_t ret;\r
+\r
+#ifdef PDK_RAW_BOOT\r
+    boardCfg = BOARD_INIT_MODULE_CLOCK |\r
+               BOARD_INIT_PINMUX_CONFIG |\r
+               BOARD_INIT_UART_STDIO;\r
+#else\r
+    boardCfg = BOARD_INIT_PINMUX_CONFIG | BOARD_INIT_UART_STDIO | BOARD_INIT_MODULE_CLOCK | BOARD_INIT_PLL ;\r
+#endif\r
+\r
+    status = Board_init(boardCfg);\r
+    if(status != BOARD_SOK)\r
+    {\r
+        return -1;\r
+    }\r
+\r
+    ret = BoardDiag_CsirxTest();\r
+    if(ret != 0)\r
+    {\r
+        UART_printf("\nCSIRX Test Failed\n");\r
+        return -1;\r
+    }\r
+    else\r
+    {\r
+        UART_printf("\nCSIRX Test Passed\n");\r
+    }\r
+\r
+    return 0;\r
+}\r
diff --git a/packages/ti/board/diag/csirx/src/csirx_test_tpr12.h b/packages/ti/board/diag/csirx/src/csirx_test_tpr12.h
new file mode 100644 (file)
index 0000000..8fd03b6
--- /dev/null
@@ -0,0 +1,186 @@
+/******************************************************************************\r
+* Copyright (c) 2020 Texas Instruments Incorporated - http://www.ti.com\r
+*\r
+* Redistribution and use in source and binary forms, with or without\r
+* modification, are permitted provided that the following conditions\r
+* are met:\r
+*\r
+* Redistributions of source code must retain the above copyright\r
+* notice, this list of conditions and the following disclaimer.\r
+*\r
+* Redistributions in binary form must reproduce the above copyright\r
+* notice, this list of conditions and the following disclaimer in the\r
+* documentation and/or other materials provided with the\r
+* distribution.\r
+*\r
+* Neither the name of Texas Instruments Incorporated nor the names of\r
+* its contributors may be used to endorse or promote products derived\r
+* from this software without specific prior written permission.\r
+*\r
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\r
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\r
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
+* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT\r
+* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,\r
+* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\r
+* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
+* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
+* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\r
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE\r
+* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+*\r
+*****************************************************************************/\r
+\r
+/**\r
+ *\r
+ * \file   csirx_test_tpr12.h\r
+ *\r
+ * \brief  This is the header file for CSI-Rx diagnostic test.\r
+ *\r
+ */\r
+\r
+#ifndef _CSIRX_TEST_TPR12_H_\r
+#define _CSIRX_TEST_TPR12_H_\r
+\r
+/* Standard Include Files. */\r
+#include <stdint.h>\r
+#include <stdlib.h>\r
+#include <stddef.h>\r
+#include <string.h>\r
+#include <stdio.h>\r
+#include <time.h>\r
+\r
+#include <ti/drv/csirx/soc/csirx_soc_priv.h>\r
+#include <ti/drv/csirx/csirx.h>\r
+#include <ti/csl/cslr_csirx.h>\r
+#include <ti/osal/CacheP.h>\r
+\r
+#include <assert.h>\r
+#include <ti/drv/csirx/csirx.h>\r
+\r
+#include <ti/csl/soc.h>\r
+#include <ti/osal/osal.h>\r
+#include <ti/osal/DebugP.h>\r
+#include <ti/osal/CycleprofilerP.h>\r
+#include <ti/board/board.h>\r
+\r
+#include <ti/drv/uart/UART.h>\r
+#include <ti/drv/uart/UART_stdio.h>\r
+\r
+/* ======================================================================== */\r
+/*                           Macros & Typedefs                              */\r
+/* ======================================================================== */\r
+\r
+/* should match with CSI TX, assumes complex sample */\r
+//#define PAYLOAD_PATTERN_CHECK             (1)\r
+\r
+#define BOARD_DIAG_TEST_NUM_ADC_SAMPLES_PER_CHIRP (256U)\r
+#define BOARD_DIAG_TEST_BYTES_PER_ADC_SAMPLE      (4U) //complex\r
+#define BOARD_DIAG_TEST_NUM_CHIRPS                (1U)\r
+#define BOARD_DIAG_TEST_NUM_FRAMES                (10U)\r
+#define BOARD_DIAG_TEST_NUM_RX                    (4U)\r
+\r
+#define BOARD_DIAG_TEST_PATTERN                                  (0xFFU)\r
+#define BOARD_DIAG_TEST_CONTEXT               (2U)\r
+#define BOARD_DIAG_TEST_FORMAT                (CSIRX_FORMAT_RAW8)\r
+#define BOARD_DIAG_TEST_VC                    (0U)\r
+#define BOARD_DIAG_TEST_USER_DEFINED_MAPPING  (CSIRX_USER_DEFINED_FORMAT_RAW8)\r
+#define BOARD_DIAG_NUM_INSTANCES                         (2U)\r
+\r
+#define BOARD_DIAG_TEST_NUM_BYTES_PER_FRAME \\r
+    ((BOARD_DIAG_TEST_NUM_ADC_SAMPLES_PER_CHIRP * BOARD_DIAG_TEST_BYTES_PER_ADC_SAMPLE * \\r
+        BOARD_DIAG_TEST_NUM_CHIRPS * BOARD_DIAG_TEST_NUM_RX))\r
+\r
+#define BOARD_DIAG_TEST_COMMON_CB_ARG       (0x11112222U)\r
+#define BOARD_DIAG_TEST_COMBINED_EOF_CB_ARG (0x33334444U)\r
+\r
+#define BOARD_DIAG_PING_PONG_ALIGNMENT CSL_MAX(CSIRX_PING_PONG_ADDRESS_LINEOFFSET_ALIGNMENT_IN_BYTES, \\r
+                                         CSL_CACHE_L1D_LINESIZE)\r
+\r
+#define BOARD_DIAG_PING_OR_PONG_BUF_SIZE_ALIGNED CSL_NEXT_MULTIPLE_OF(BOARD_DIAG_TEST_NUM_BYTES_PER_FRAME, \\r
+                                                                BOARD_DIAG_PING_PONG_ALIGNMENT)\r
+\r
+\r
+/*! Defines RAM types for choosing ping-pong buffers */\r
+typedef enum BoardDiag_RAMtype_e\r
+{\r
+    BOARD_DIAG_L3RAM,\r
+    BOARD_DIAG_HWARAM,\r
+    BOARD_DIAG_L2RAM\r
+} BoardDiag_RAMtype;\r
+\r
+typedef struct Board_DiagConfig_s\r
+{\r
+    CSIRX_DphyConfig_t DPHYcfg;\r
+    CSIRX_ComplexIoConfig_t complexIOcfg;\r
+    CSIRX_CommonConfig_t commonCfg;\r
+    CSIRX_ContextConfig_t contextCfg;\r
+} Board_DiagConfig;\r
+\r
+typedef struct BoardDiag_ContextIRQcount_s\r
+{\r
+    volatile uint32_t frameEndCodeDetect;\r
+    uint32_t lineEndCodeDetect;\r
+} BoardDiag_ContextIRQcount;\r
+\r
+/*! holds common IRQ counts */\r
+typedef struct BoardDiag_CommonIRQcount_s\r
+{\r
+    uint32_t isOCPerror;\r
+    uint32_t isGenericShortPacketReceive;\r
+    uint32_t isECConeBitShortPacketErrorCorrect;\r
+    uint32_t isECCmoreThanOneBitCannotCorrect;\r
+    uint32_t isComplexIOerror;\r
+    uint32_t isFIFOoverflow;\r
+} BoardDiag_CommonIRQcount;\r
+\r
+typedef struct BoardDiag_IRQs_s\r
+{\r
+    CSIRX_ContextIRQ_t context[CSIRX_NUM_CONTEXTS];\r
+    CSIRX_CommonIRQ_t common;\r
+    CSIRX_LanesIRQ_t  complexIOlanes;\r
+} BoardDiag_IRQs;\r
+\r
+typedef struct BoardDiag_CallBackCounts_s\r
+{\r
+    uint32_t common;\r
+    uint32_t combinedEOL;\r
+    uint32_t combinedEOF;\r
+    uint32_t EOF0;\r
+    uint32_t EOF1;\r
+    uint32_t SOF0;\r
+    uint32_t SOF1;\r
+    uint32_t contextEOL[CSIRX_NUM_CONTEXTS];\r
+} BoardDaig_CallBackCounts;\r
+\r
+typedef struct BoardDaig_State_s\r
+{\r
+       BoardDiag_CommonIRQcount commonIRQcount;\r
+    BoardDiag_IRQs IRQ;\r
+    BoardDaig_CallBackCounts callbackCount;\r
+    bool isReceivedPayloadCorrect;\r
+       BoardDiag_ContextIRQcount contextIRQcounts[CSIRX_NUM_CONTEXTS];\r
+    uint32_t frameId;\r
+    uint32_t lineId;\r
+       uint32_t receivedBuffer;\r
+} BoardDaig_State;\r
+\r
+#ifdef __cplusplus\r
+extern "C" {\r
+#endif\r
+\r
+/**\r
+ * \brief   This function executes CSI-Rx diagnostic test\r
+ *\r
+ * \return  int8_t\r
+ *             0   - in case of success\r
+ *            -1   - in case of failure\r
+ *\r
+ */\r
+int8_t BoardDiag_CsirxTest(void);\r
+\r
+#ifdef __cplusplus\r
+}\r
+#endif /* __cplusplus */\r
+\r
+#endif /* _CSIRX_TEST_TPR12_H_ */\r