[PDK-8179]: ICSSG HwAttrs error
authorErick Narvaez <e-narvaez@ti.com>
Wed, 20 Jan 2021 22:49:36 +0000 (16:49 -0600)
committerAnkur <ankurbaranwal@ti.com>
Tue, 6 Apr 2021 13:15:03 +0000 (08:15 -0500)
Update incorrect marcro used for prussPru[0,1,2]IramSize. Previously
using IRAM_SIZE which is the size of the CTRL Registers (0x100), now fixed to
use the size of IRAM RAM size (0x4000).

Signed-off-by: Erick Narvaez <e-narvaez@ti.com>
packages/ti/drv/pruss/soc/am64x/pruicss_soc.c
packages/ti/drv/pruss/soc/am65xx/pruicss_soc.c
packages/ti/drv/pruss/soc/j721e/pruicss_soc.c

index 00562b7cc352cd9ef663f5c23a7f1c8de192961f..ee767b83d92a92951d04fb00814712aa517c286f 100644 (file)
@@ -70,8 +70,8 @@ PRUICSS_HwAttrs prussInitCfg[PRUICSS_INSTANCE_MAX-1] =
        CSL_PRU_ICSSG0_PR1_PDSP_TX1_IRAM_RAM_BASE,         /* prussTxPru1IramBase */
        CSL_PRU_ICSSG0_DRAM0_SLV_RAM_SIZE,                 /* prussPru0DramSize */
        CSL_PRU_ICSSG0_DRAM1_SLV_RAM_SIZE,                 /* prussPru1DramSize */
-       CSL_PRU_ICSSG0_PR1_PDSP0_IRAM_SIZE,                /* prussPru0IramSize */
-       CSL_PRU_ICSSG0_PR1_PDSP1_IRAM_SIZE,                /* prussPru1IramSize */
+       CSL_PRU_ICSSG0_PR1_PDSP0_IRAM_RAM_SIZE,            /* prussPru0IramSize */
+       CSL_PRU_ICSSG0_PR1_PDSP1_IRAM_RAM_SIZE,            /* prussPru1IramSize */
        CSL_PRU_ICSSG0_RAM_SLV_RAM_SIZE,                   /* prussSharedDramSize */
        CSL_PRU_ICSSG0_PR1_RTU0_PR1_RTU0_IRAM_RAM_SIZE,    /* prussRtu0IramSize */
        CSL_PRU_ICSSG0_PR1_RTU1_PR1_RTU1_IRAM_RAM_SIZE,    /* prussRtu1IramSize */
@@ -105,8 +105,8 @@ PRUICSS_HwAttrs prussInitCfg[PRUICSS_INSTANCE_MAX-1] =
            CSL_PRU_ICSSG1_PR1_PDSP_TX1_IRAM_RAM_BASE,         /* prussTxPru1IramBase */
            CSL_PRU_ICSSG1_DRAM0_SLV_RAM_SIZE,                 /* prussPru0DramSize */
            CSL_PRU_ICSSG1_DRAM1_SLV_RAM_SIZE,                 /* prussPru1DramSize */
-           CSL_PRU_ICSSG1_PR1_PDSP0_IRAM_SIZE,                /* prussPru0IramSize */
-           CSL_PRU_ICSSG1_PR1_PDSP1_IRAM_SIZE,                /* prussPru1IramSize */
+           CSL_PRU_ICSSG1_PR1_PDSP0_IRAM_RAM_SIZE,            /* prussPru0IramSize */
+           CSL_PRU_ICSSG1_PR1_PDSP1_IRAM_RAM_SIZE,            /* prussPru1IramSize */
            CSL_PRU_ICSSG1_RAM_SLV_RAM_SIZE,                   /* prussSharedDramSize */
            CSL_PRU_ICSSG1_PR1_RTU0_PR1_RTU0_IRAM_RAM_SIZE,    /* prussRtu0IramSize */
            CSL_PRU_ICSSG1_PR1_RTU1_PR1_RTU1_IRAM_RAM_SIZE,    /* prussRtu1IramSize */
index f44964f5264ce9b1afeb474498a2ae121b7e8b1c..9b90f2bf97b2f036d2ec51e3e04b6033ac62a88e 100644 (file)
@@ -70,8 +70,8 @@ PRUICSS_HwAttrs prussInitCfg[3] =
        CSL_PRU_ICSSG0_PR1_TX1_PR1_TX1_IRAM_RAM_BASE,      /* prussTxPru1IramBase */
        CSL_PRU_ICSSG0_DRAM0_SLV_RAM_SIZE,                 /* prussPru0DramSize */
        CSL_PRU_ICSSG0_DRAM1_SLV_RAM_SIZE,                 /* prussPru1DramSize */
-       CSL_PRU_ICSSG0_PR1_PDSP0_IRAM_SIZE,                /* prussPru0IramSize */
-       CSL_PRU_ICSSG0_PR1_PDSP1_IRAM_SIZE,                /* prussPru1IramSize */
+       CSL_PRU_ICSSG0_PR1_PDSP0_IRAM_RAM_SIZE,            /* prussPru0IramSize */
+       CSL_PRU_ICSSG0_PR1_PDSP1_IRAM_RAM_SIZE,            /* prussPru1IramSize */
        CSL_PRU_ICSSG0_RAM_SLV_RAM_SIZE,                   /* prussSharedDramSize */
        CSL_PRU_ICSSG0_PR1_RTU0_PR1_RTU0_IRAM_RAM_SIZE,    /* prussRtu0IramSize */
        CSL_PRU_ICSSG0_PR1_RTU1_PR1_RTU1_IRAM_RAM_SIZE,    /* prussRtu1IramSize */
@@ -105,8 +105,8 @@ PRUICSS_HwAttrs prussInitCfg[3] =
        CSL_PRU_ICSSG1_PR1_TX1_PR1_TX1_IRAM_RAM_BASE,      /* prussTxPru1IramBase */
        CSL_PRU_ICSSG1_DRAM0_SLV_RAM_SIZE,                 /* prussPru0DramSize */
        CSL_PRU_ICSSG1_DRAM1_SLV_RAM_SIZE,                 /* prussPru1DramSize */
-       CSL_PRU_ICSSG1_PR1_PDSP0_IRAM_SIZE,                /* prussPru0IramSize */
-       CSL_PRU_ICSSG1_PR1_PDSP1_IRAM_SIZE,                /* prussPru1IramSize */
+       CSL_PRU_ICSSG1_PR1_PDSP0_IRAM_RAM_SIZE,            /* prussPru0IramSize */
+       CSL_PRU_ICSSG1_PR1_PDSP1_IRAM_RAM_SIZE,            /* prussPru1IramSize */
        CSL_PRU_ICSSG1_RAM_SLV_RAM_SIZE,                   /* prussSharedDramSize */
        CSL_PRU_ICSSG1_PR1_RTU0_PR1_RTU0_IRAM_RAM_SIZE,    /* prussRtu0IramSize */
        CSL_PRU_ICSSG1_PR1_RTU1_PR1_RTU1_IRAM_RAM_SIZE,    /* prussRtu1IramSize */
@@ -140,8 +140,8 @@ PRUICSS_HwAttrs prussInitCfg[3] =
        CSL_PRU_ICSSG2_PR1_TX1_PR1_TX1_IRAM_RAM_BASE,      /* prussTxPru1IramBase */
        CSL_PRU_ICSSG2_DRAM0_SLV_RAM_SIZE,                 /* prussPru0DramSize */
        CSL_PRU_ICSSG2_DRAM1_SLV_RAM_SIZE,                 /* prussPru1DramSize */
-       CSL_PRU_ICSSG2_PR1_PDSP0_IRAM_SIZE,                /* prussPru0IramSize */
-       CSL_PRU_ICSSG2_PR1_PDSP1_IRAM_SIZE,                /* prussPru1IramSize */
+       CSL_PRU_ICSSG2_PR1_PDSP0_IRAM_RAM_SIZE,            /* prussPru0IramSize */
+       CSL_PRU_ICSSG2_PR1_PDSP1_IRAM_RAM_SIZE,            /* prussPru1IramSize */
        CSL_PRU_ICSSG2_RAM_SLV_RAM_SIZE,                   /* prussSharedDramSize */
        CSL_PRU_ICSSG2_PR1_RTU0_PR1_RTU0_IRAM_RAM_SIZE,    /* prussRtu0IramSize */
        CSL_PRU_ICSSG2_PR1_RTU1_PR1_RTU1_IRAM_RAM_SIZE,    /* prussRtu1IramSize */
index 0ddcfd9f99e9e2775db6f6c2c81692db448b587c..9ce0339d15d44fc58905e10306d0c7ead78b3731 100644 (file)
@@ -70,8 +70,8 @@ PRUICSS_HwAttrs prussInitCfg[PRUICSS_INSTANCE_TWO] =
        CSL_PRU_ICSSG0_PR1_TX1_PR1_TX1_IRAM_RAM_BASE,      /* prussTxPru1IramBase */
        CSL_PRU_ICSSG0_DRAM0_SLV_RAM_SIZE,                 /* prussPru0DramSize */
        CSL_PRU_ICSSG0_DRAM1_SLV_RAM_SIZE,                 /* prussPru1DramSize */
-       CSL_PRU_ICSSG0_PR1_PDSP0_IRAM_SIZE,                /* prussPru0IramSize */
-       CSL_PRU_ICSSG0_PR1_PDSP1_IRAM_SIZE,                /* prussPru1IramSize */
+       CSL_PRU_ICSSG0_PR1_PDSP0_IRAM_RAM_SIZE,            /* prussPru0IramSize */
+       CSL_PRU_ICSSG0_PR1_PDSP1_IRAM_RAM_SIZE,            /* prussPru1IramSize */
        CSL_PRU_ICSSG0_RAM_SLV_RAM_SIZE,                   /* prussSharedDramSize */
        CSL_PRU_ICSSG0_PR1_RTU0_PR1_RTU0_IRAM_RAM_SIZE,    /* prussRtu0IramSize */
        CSL_PRU_ICSSG0_PR1_RTU1_PR1_RTU1_IRAM_RAM_SIZE,    /* prussRtu1IramSize */
@@ -105,8 +105,8 @@ PRUICSS_HwAttrs prussInitCfg[PRUICSS_INSTANCE_TWO] =
        CSL_PRU_ICSSG1_PR1_TX1_PR1_TX1_IRAM_RAM_BASE,      /* prussTxPru1IramBase */
        CSL_PRU_ICSSG1_DRAM0_SLV_RAM_SIZE,                 /* prussPru0DramSize */
        CSL_PRU_ICSSG1_DRAM1_SLV_RAM_SIZE,                 /* prussPru1DramSize */
-       CSL_PRU_ICSSG1_PR1_PDSP0_IRAM_SIZE,                /* prussPru0IramSize */
-       CSL_PRU_ICSSG1_PR1_PDSP1_IRAM_SIZE,                /* prussPru1IramSize */
+       CSL_PRU_ICSSG1_PR1_PDSP0_IRAM_RAM_SIZE,            /* prussPru0IramSize */
+       CSL_PRU_ICSSG1_PR1_PDSP1_IRAM_RAM_SIZE,            /* prussPru1IramSize */
        CSL_PRU_ICSSG1_RAM_SLV_RAM_SIZE,                   /* prussSharedDramSize */
        CSL_PRU_ICSSG1_PR1_RTU0_PR1_RTU0_IRAM_RAM_SIZE,    /* prussRtu0IramSize */
        CSL_PRU_ICSSG1_PR1_RTU1_PR1_RTU1_IRAM_RAM_SIZE,    /* prussRtu1IramSize */