udma-lld: add to PDK
authorJacob Stiffler <j-stiffler@ti.com>
Fri, 1 Nov 2019 18:56:09 +0000 (14:56 -0400)
committerJacob Stiffler <j-stiffler@ti.com>
Fri, 1 Nov 2019 18:56:09 +0000 (14:56 -0400)
Development of udma-lld has been relocated here from:
* Repo: https://git.ti.com/keystone-rtos/udma-lld
* Branch: master
* Commit ID: d4c1aa7e121d28e8506db74b4f8493ab7833e64f

Signed-off-by: Jacob Stiffler <j-stiffler@ti.com>
134 files changed:
packages/ti/drv/udma/.gitignore [new file with mode: 0644]
packages/ti/drv/udma/Settings.xdc.xdt [new file with mode: 0644]
packages/ti/drv/udma/config_mk.bld [new file with mode: 0644]
packages/ti/drv/udma/dmautils/dmautils.h [new file with mode: 0755]
packages/ti/drv/udma/dmautils/include/dmautils_autoincrement_3d.h [new file with mode: 0755]
packages/ti/drv/udma/dmautils/makefile [new file with mode: 0644]
packages/ti/drv/udma/dmautils/src/dmautils_autoincrement_3d.c [new file with mode: 0644]
packages/ti/drv/udma/dmautils/src/dmautils_autoincrement_3d_priv.h [new file with mode: 0644]
packages/ti/drv/udma/dmautils/test/dmautils_autoinc_1d2d3d_test/c7x_vcop_lnk.cmd [new file with mode: 0644]
packages/ti/drv/udma/dmautils/test/dmautils_autoinc_1d2d3d_test/dmautils_autoinc_1d2d3d_example.c [new file with mode: 0644]
packages/ti/drv/udma/dmautils/test/dmautils_autoinc_1d2d3d_test/dmautils_autoinc_1d2d3d_example.h [new file with mode: 0644]
packages/ti/drv/udma/dmautils/test/dmautils_autoinc_1d2d3d_test/dmautils_autoinc_1d2d3d_test.c [new file with mode: 0644]
packages/ti/drv/udma/dmautils/test/dmautils_autoinc_1d2d3d_test/makefile [new file with mode: 0644]
packages/ti/drv/udma/dmautils/test/dmautils_autoinc_circular_test/c7x_vcop_lnk.cmd [new file with mode: 0644]
packages/ti/drv/udma/dmautils/test/dmautils_autoinc_circular_test/dmautils_autoinc_circular_example.c [new file with mode: 0644]
packages/ti/drv/udma/dmautils/test/dmautils_autoinc_circular_test/dmautils_autoinc_circular_example.h [new file with mode: 0644]
packages/ti/drv/udma/dmautils/test/dmautils_autoinc_circular_test/dmautils_autoinc_circular_test.c [new file with mode: 0644]
packages/ti/drv/udma/dmautils/test/dmautils_autoinc_circular_test/makefile [new file with mode: 0644]
packages/ti/drv/udma/dmautils/test/dmautils_autoincrement_test/c7x_vcop_lnk.cmd [new file with mode: 0644]
packages/ti/drv/udma/dmautils/test/dmautils_autoincrement_test/dmautils_autoincrement_example.c [new file with mode: 0644]
packages/ti/drv/udma/dmautils/test/dmautils_autoincrement_test/dmautils_autoincrement_example.h [new file with mode: 0644]
packages/ti/drv/udma/dmautils/test/dmautils_autoincrement_test/dmautils_autoincrement_test.c [new file with mode: 0644]
packages/ti/drv/udma/dmautils/test/dmautils_autoincrement_test/makefile [new file with mode: 0644]
packages/ti/drv/udma/docs/Doxyfile [new file with mode: 0755]
packages/ti/drv/udma/docs/Migrating_Applications_from_EDMA_to_UDMA_using_TI-RTOS.pdf [new file with mode: 0644]
packages/ti/drv/udma/docs/UDMA_Overview.pdf [new file with mode: 0644]
packages/ti/drv/udma/docs/UDMA_Overview.pptx [new file with mode: 0644]
packages/ti/drv/udma/docs/doxygen/ti_disclaim.htm [new file with mode: 0644]
packages/ti/drv/udma/docs/doxygen/tifooter.htm [new file with mode: 0644]
packages/ti/drv/udma/docs/doxygen/tiheader.htm [new file with mode: 0644]
packages/ti/drv/udma/docs/doxygen/tilogo.gif [new file with mode: 0644]
packages/ti/drv/udma/docs/doxygen/titagline.gif [new file with mode: 0644]
packages/ti/drv/udma/docs/internal/Migrating_Applications_from_EDMA_to_UDMA_using_TI-RTOS.doc [new file with mode: 0644]
packages/ti/drv/udma/docs/internal/Migrating_Applications_from_EDMA_to_UDMA_using_TI-RTOS_Diagrams.pptx [new file with mode: 0644]
packages/ti/drv/udma/examples/udma_adc_test/main_tirtos.c [new file with mode: 0644]
packages/ti/drv/udma/examples/udma_adc_test/makefile [new file with mode: 0644]
packages/ti/drv/udma/examples/udma_adc_test/udma_adc_test.c [new file with mode: 0644]
packages/ti/drv/udma/examples/udma_apputils/makefile [new file with mode: 0644]
packages/ti/drv/udma/examples/udma_apputils/udma_apputils.c [new file with mode: 0755]
packages/ti/drv/udma/examples/udma_apputils/udma_apputils.h [new file with mode: 0644]
packages/ti/drv/udma/examples/udma_chaining_test/main_tirtos.c [new file with mode: 0644]
packages/ti/drv/udma/examples/udma_chaining_test/makefile [new file with mode: 0644]
packages/ti/drv/udma/examples/udma_chaining_test/udma_chaining_test.c [new file with mode: 0644]
packages/ti/drv/udma/examples/udma_crc_test/main_tirtos.c [new file with mode: 0644]
packages/ti/drv/udma/examples/udma_crc_test/makefile [new file with mode: 0644]
packages/ti/drv/udma/examples/udma_crc_test/udma_crc_test.c [new file with mode: 0644]
packages/ti/drv/udma/examples/udma_dru_direct_tr_test/main_tirtos.c [new file with mode: 0644]
packages/ti/drv/udma/examples/udma_dru_direct_tr_test/makefile [new file with mode: 0644]
packages/ti/drv/udma/examples/udma_dru_direct_tr_test/udma_dru_direct_tr_test.c [new file with mode: 0644]
packages/ti/drv/udma/examples/udma_dru_test/main_tirtos.c [new file with mode: 0644]
packages/ti/drv/udma/examples/udma_dru_test/makefile [new file with mode: 0644]
packages/ti/drv/udma/examples/udma_dru_test/udma_dru_test.c [new file with mode: 0644]
packages/ti/drv/udma/examples/udma_memcpy_test/main_baremetal.c [new file with mode: 0644]
packages/ti/drv/udma/examples/udma_memcpy_test/main_tirtos.c [new file with mode: 0755]
packages/ti/drv/udma/examples/udma_memcpy_test/makefile [new file with mode: 0644]
packages/ti/drv/udma/examples/udma_memcpy_test/makefile.mk [new file with mode: 0644]
packages/ti/drv/udma/examples/udma_memcpy_test/makefile_baremetal [new file with mode: 0644]
packages/ti/drv/udma/examples/udma_memcpy_test/udma_memcpy_test.c [new file with mode: 0644]
packages/ti/drv/udma/include/udma_cfg.h [new file with mode: 0644]
packages/ti/drv/udma/include/udma_ch.h [new file with mode: 0644]
packages/ti/drv/udma/include/udma_dru.h [new file with mode: 0644]
packages/ti/drv/udma/include/udma_event.h [new file with mode: 0644]
packages/ti/drv/udma/include/udma_flow.h [new file with mode: 0644]
packages/ti/drv/udma/include/udma_osal.h [new file with mode: 0644]
packages/ti/drv/udma/include/udma_proxy.h [new file with mode: 0755]
packages/ti/drv/udma/include/udma_ring.h [new file with mode: 0644]
packages/ti/drv/udma/include/udma_rm.h [new file with mode: 0644]
packages/ti/drv/udma/include/udma_types.h [new file with mode: 0644]
packages/ti/drv/udma/include/udma_utils.h [new file with mode: 0644]
packages/ti/drv/udma/makefile [new file with mode: 0644]
packages/ti/drv/udma/package.bld [new file with mode: 0644]
packages/ti/drv/udma/package.xdc [new file with mode: 0644]
packages/ti/drv/udma/package.xs [new file with mode: 0644]
packages/ti/drv/udma/soc/V0/udma_rmcfg.c [new file with mode: 0644]
packages/ti/drv/udma/soc/V0/udma_soc.c [new file with mode: 0644]
packages/ti/drv/udma/soc/V0/udma_soc.h [new file with mode: 0644]
packages/ti/drv/udma/soc/V1/udma_rmcfg.c [new file with mode: 0755]
packages/ti/drv/udma/soc/V1/udma_soc.c [new file with mode: 0755]
packages/ti/drv/udma/soc/V1/udma_soc.h [new file with mode: 0644]
packages/ti/drv/udma/soc/udma_soc.h [new file with mode: 0644]
packages/ti/drv/udma/src/makefile [new file with mode: 0644]
packages/ti/drv/udma/src/udma.c [new file with mode: 0755]
packages/ti/drv/udma/src/udma_ch.c [new file with mode: 0755]
packages/ti/drv/udma/src/udma_dru.c [new file with mode: 0755]
packages/ti/drv/udma/src/udma_event.c [new file with mode: 0755]
packages/ti/drv/udma/src/udma_flow.c [new file with mode: 0755]
packages/ti/drv/udma/src/udma_osal.c [new file with mode: 0755]
packages/ti/drv/udma/src/udma_priv.h [new file with mode: 0644]
packages/ti/drv/udma/src/udma_proxy.c [new file with mode: 0755]
packages/ti/drv/udma/src/udma_ring.c [new file with mode: 0755]
packages/ti/drv/udma/src/udma_rm.c [new file with mode: 0755]
packages/ti/drv/udma/src/udma_utils.c [new file with mode: 0755]
packages/ti/drv/udma/udma.h [new file with mode: 0755]
packages/ti/drv/udma/udma_component.mk [new file with mode: 0755]
packages/ti/drv/udma/udmaver.h [new file with mode: 0644]
packages/ti/drv/udma/udmaver.h.xdt [new file with mode: 0644]
packages/ti/drv/udma/unit_test/udma_ut/rtos/am65xx/linker_mcu1_0.lds [new file with mode: 0644]
packages/ti/drv/udma/unit_test/udma_ut/rtos/am65xx/linker_mcu1_1.lds [new file with mode: 0644]
packages/ti/drv/udma/unit_test/udma_ut/rtos/am65xx/linker_mpu1_0.lds [new file with mode: 0644]
packages/ti/drv/udma/unit_test/udma_ut/rtos/j721e/linker_c66xdsp_1.lds [new file with mode: 0644]
packages/ti/drv/udma/unit_test/udma_ut/rtos/j721e/linker_c66xdsp_2.lds [new file with mode: 0644]
packages/ti/drv/udma/unit_test/udma_ut/rtos/j721e/linker_c7x_1.lds [new file with mode: 0755]
packages/ti/drv/udma/unit_test/udma_ut/rtos/j721e/linker_mcu1_0.lds [new file with mode: 0644]
packages/ti/drv/udma/unit_test/udma_ut/rtos/j721e/linker_mcu1_1.lds [new file with mode: 0644]
packages/ti/drv/udma/unit_test/udma_ut/rtos/j721e/linker_mcu2_0.lds [new file with mode: 0644]
packages/ti/drv/udma/unit_test/udma_ut/rtos/j721e/linker_mcu2_1.lds [new file with mode: 0644]
packages/ti/drv/udma/unit_test/udma_ut/rtos/j721e/linker_mcu3_0.lds [new file with mode: 0644]
packages/ti/drv/udma/unit_test/udma_ut/rtos/j721e/linker_mcu3_1.lds [new file with mode: 0644]
packages/ti/drv/udma/unit_test/udma_ut/rtos/j721e/linker_mpu1_0.lds [new file with mode: 0644]
packages/ti/drv/udma/unit_test/udma_ut/rtos/main_tirtos.c [new file with mode: 0755]
packages/ti/drv/udma/unit_test/udma_ut/rtos/makefile [new file with mode: 0755]
packages/ti/drv/udma/unit_test/udma_ut/rtos/udma_ut.cfg [new file with mode: 0644]
packages/ti/drv/udma/unit_test/udma_ut/src/soc/am65xx/udma_test_soc.c [new file with mode: 0644]
packages/ti/drv/udma/unit_test/udma_ut/src/soc/am65xx/udma_test_soc.h [new file with mode: 0644]
packages/ti/drv/udma/unit_test/udma_ut/src/soc/j721e/udma_test_soc.c [new file with mode: 0644]
packages/ti/drv/udma/unit_test/udma_ut/src/soc/j721e/udma_test_soc.h [new file with mode: 0644]
packages/ti/drv/udma/unit_test/udma_ut/src/udma_test.h [new file with mode: 0644]
packages/ti/drv/udma/unit_test/udma_ut/src/udma_test_blkcpy.c [new file with mode: 0644]
packages/ti/drv/udma/unit_test/udma_ut/src/udma_test_bug.c [new file with mode: 0644]
packages/ti/drv/udma/unit_test/udma_ut/src/udma_test_common.c [new file with mode: 0644]
packages/ti/drv/udma/unit_test/udma_ut/src/udma_test_event.c [new file with mode: 0644]
packages/ti/drv/udma/unit_test/udma_ut/src/udma_test_flow.c [new file with mode: 0644]
packages/ti/drv/udma/unit_test/udma_ut/src/udma_test_misc.c [new file with mode: 0644]
packages/ti/drv/udma/unit_test/udma_ut/src/udma_test_parser.c [new file with mode: 0644]
packages/ti/drv/udma/unit_test/udma_ut/src/udma_test_proxy.c [new file with mode: 0644]
packages/ti/drv/udma/unit_test/udma_ut/src/udma_test_ring.c [new file with mode: 0644]
packages/ti/drv/udma/unit_test/udma_ut/src/udma_test_ring_monitor.c [new file with mode: 0644]
packages/ti/drv/udma/unit_test/udma_ut/src/udma_testcases.h [new file with mode: 0644]
packages/ti/drv/udma/unit_test/udma_ut/src/udma_testconfig.h [new file with mode: 0644]
packages/ti/drv/udma/unit_test/udma_ut/src/utils_mem.c [new file with mode: 0644]
packages/ti/drv/udma/unit_test/udma_ut/src/utils_mem.h [new file with mode: 0644]
packages/ti/drv/udma/unit_test/udma_ut/src/utils_prf.c [new file with mode: 0644]
packages/ti/drv/udma/unit_test/udma_ut/src/utils_prf.h [new file with mode: 0644]
packages/ti/drv/udma/unit_test/udma_ut_component.mk [new file with mode: 0644]

diff --git a/packages/ti/drv/udma/.gitignore b/packages/ti/drv/udma/.gitignore
new file mode 100644 (file)
index 0000000..fa05c1c
--- /dev/null
@@ -0,0 +1,11 @@
+lib/*
+docs/doxygen/html/
+.dlls
+.executables
+.xdcenv.mak
+*.mak
+.interfaces
+.libraries
+package/*
+Settings.h
+Settings.xdc
diff --git a/packages/ti/drv/udma/Settings.xdc.xdt b/packages/ti/drv/udma/Settings.xdc.xdt
new file mode 100644 (file)
index 0000000..6f18358
--- /dev/null
@@ -0,0 +1,48 @@
+\r
+%%{\r
+/*!\r
+ *  This template implements the Settings.xdc\r
+ */\r
+  /* Versioning */\r
+  var ver = this;\r
+  for each(i=0;i<ver.length;i++)\r
+  {\r
+      if(String(ver[i]).length < 2)\r
+      {\r
+        ver[i]="0"+ver[i];\r
+      }\r
+  }\r
+\r
+  var packageVersion = "\""+ver[0]+"."+ver[1]+"."+ver[2]+"."+ver[3]+"\"";\r
+\r
+%%}\r
+\r
+module Settings\r
+{\r
+    config string udmaVersionString = `packageVersion`;\r
+\r
+    /*! This variable is to control the SoC type selection.\r
+     * By default this variable is set to NULL.\r
+     *\r
+     * To use UDMA for the selected device, add the following lines to config\r
+     * file and set the deviceType correctly:\r
+     *\r
+     *      var udmaSettings = xdc.useModule ('ti.drv.udma.Settings');\r
+     *      udmaSettings.socType = "am65xx";\r
+     *\r
+     */\r
+    metaonly config string socType = "";\r
+\r
+    /*! This variable is to control the device library type selection.\r
+     * By default this variable is set to release.\r
+     *\r
+     * To use the debug/release library, add the following lines to config\r
+     * file and set the library profile accordingly:\r
+     *\r
+     *      var udma Settings = xdc.useModule ('ti.drv.udma.Settings');\r
+     *      udmaSettings.libProfile = "debug";\r
+     *\r
+     */\r
+    metaonly config string libProfile = "release";\r
+}\r
+\r
diff --git a/packages/ti/drv/udma/config_mk.bld b/packages/ti/drv/udma/config_mk.bld
new file mode 100644 (file)
index 0000000..5febcda
--- /dev/null
@@ -0,0 +1,20 @@
+/******************************************************************************\r
+ * FILE PURPOSE: Build configuration Script for the UDMA Driver\r
+ ******************************************************************************\r
+ * FILE NAME: config.bld\r
+ *\r
+ * DESCRIPTION: \r
+ *  This file contains the build configuration script for the UDMA driver\r
+ *  and is responsible for configuration of the paths for the various \r
+ *  tools required to build the driver.\r
+ *\r
+ * Copyright (C) 2018, Texas Instruments, Inc.\r
+ *****************************************************************************/\r
+\r
+/* Configure the UDMA Release Version Information */\r
+var udmaDriverReleaseVersion = (""+Pkg.version.replace(/\s/g, "")).split(',');\r
+\r
+var Build = xdc.useModule('xdc.bld.BuildEnvironment');\r
+Build.useTargets=null;\r
+\r
+\r
diff --git a/packages/ti/drv/udma/dmautils/dmautils.h b/packages/ti/drv/udma/dmautils/dmautils.h
new file mode 100755 (executable)
index 0000000..538532b
--- /dev/null
@@ -0,0 +1,72 @@
+/*
+ *  Copyright (c) Texas Instruments Incorporated 2019
+ *
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions
+ *  are met:
+ *
+ *    Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *
+ *    Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the
+ *    distribution.
+ *
+ *    Neither the name of Texas Instruments Incorporated nor the names of
+ *    its contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+//:TODO: Need to figure out def group and requirement Id here
+
+/**
+ *  \file dmautils.h
+ *
+ *  \brief DMA Utils API/interface file.
+ *
+ *  Requirement: DOX_REQ_TAG(PDK-2494)
+ */
+
+#ifndef DMAUTILS_H_
+#define DMAUTILS_H_
+
+/* ========================================================================== */
+/*                             Include Files                                  */
+/* ========================================================================== */
+
+#include <stdint.h>
+
+#include <ti/drv/udma/dmautils/include/dmautils_autoincrement_3d.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+
+/* ========================================================================== */
+/*                           Macros & Typedefs                                */
+/* ========================================================================== */
+
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* #ifndef DMAUTILS_H_ */
+
+/* @} */
diff --git a/packages/ti/drv/udma/dmautils/include/dmautils_autoincrement_3d.h b/packages/ti/drv/udma/dmautils/include/dmautils_autoincrement_3d.h
new file mode 100755 (executable)
index 0000000..862cab3
--- /dev/null
@@ -0,0 +1,469 @@
+/*
+ *  Copyright (c) Texas Instruments Incorporated 2019
+ *
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions
+ *  are met:
+ *
+ *    Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *
+ *    Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the
+ *    distribution.
+ *
+ *    Neither the name of Texas Instruments Incorporated nor the names of
+ *    its contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+/**
+ *  \ingroup DRV_UDMA_MODULE
+ *  \defgroup DRV_UDMA_DMAUTILS_MODULE  DMA Utils API
+ *            This is DMA Utils related configuration parameters and
+ *            API
+ *
+ *  @{
+ */
+
+/**
+ *  \file dmautils_autoincrement_3d.h
+ *
+ *  \brief This file contains the data types and util function prototype for
+ *              configuring DMA Utility autoincrement 3D usecase.
+ *
+ *  Typical sequence of operation :
+ *      DmaUtilsAutoInc3d_getContextSize(numChannels) : Request memory required based on the number of
+ *                                                                  channels required for a usecase
+ *     DmaUtilsAutoInc3d_init : To allocate hardware resources required for for a usecase ( Need to be called only
+ *                                             once per frame
+ *     DmaUtilsAutoInc3d_getTrMemReq : Request memory required to prepare TR/TR descriptor based on the
+ *                                             number of transfer records that needs to be submitted on a particular channel
+ *    DmaUtilsAutoInc3d_prepareTr : Populate the tr based on the actual transfer property. This can be computed
+ *                                              upfront to avoid cycles consumed to prepare it
+ *    DmaUtilsAutoInc3d_configure : Configure a a particular channel by submitting the TR memory prepared earlier.
+ *                                               This can be called multiple times within a frame
+ *    DmaUtilsAutoInc3d_trigger : Trigger a particular channel
+ *    DmaUtilsAutoInc3d_wait : wait for transfer completion of  particular channel
+ *
+ *    Trigger and wait can be called multiple times till we finish requrested number of transfers
+ *
+ *    DmaUtilsAutoInc3d_deconfigure :
+ *    DmaUtilsAutoInc3d_deint :
+ *
+ *  Requirement: DOX_REQ_TAG(PDK-2644), DOX_REQ_TAG(PDK-2643), DOX_REQ_TAG(PDK-2642),
+ *                         DOX_REQ_TAG(PDK-2645), DOX_REQ_TAG(PDK-2646), DOX_REQ_TAG(PDK-2650),
+ *                         DOX_REQ_TAG(PDK-2652), DOX_REQ_TAG(PDK-3241)
+ */
+
+
+#ifndef DMAUTILS_AUTOINCREMENT_3D_H_
+#define DMAUTILS_AUTOINCREMENT_3D_H_
+
+#include <stdint.h>
+#include <stdarg.h>
+#include "ti/drv/udma/udma.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+
+//:TODO: Actual value on SOC is 3 but currently VLAB supports only on
+/** \brief Number of TR's that can be submitted back to back channel  */
+#define DMAUTILS_MAX_NUM_TR_DIRECT_TR_MODE (1U)
+
+
+/**
+ *  @enum   DmaUtilsAutoInc3d_SyncType
+ *
+ *  @brief   Describes the boundary at which the DMA is suppose to get
+ *          synced
+ *
+ */
+typedef enum{
+  DMAUTILSAUTOINC3D_SYNC_1D = 0,/*!< DMA is synced at each 1D transfer i.e. it is synced
+                                                                            whenever icnt1 is decremented by 1 */
+  DMAUTILSAUTOINC3D_SYNC_2D = 1,/*!< DMA is synced at each 2D transfer i.e. it is synced
+                                                                            whenever icnt2 is decremented by 1 */
+  DMAUTILSAUTOINC3D_SYNC_3D = 2,/*!< DMA is synced at each 3D transfer i.e. it is synced
+                                                                            whenever icnt3 is decremented by 1 */
+  DMAUTILSAUTOINC3D_SYNC_4D = 3/*!< DMA is synced at each 4D transfer i.e. it is synced
+                                                                            whenever one TR is completed */
+}DmaUtilsAutoInc3d_SyncType;
+
+/**
+ *  @enum    DmaUtilsAutoInc3d_AddrType
+ *
+ *  @brief    Describes the boundary at which the DMA is suppose to get
+ *          synced
+ *
+  */
+typedef enum{
+  DMAUTILSAUTOINC3D_ADDR_LINEAR = 0 , /*!< Linear addressing, addresses will be updated linearly as
+                                                                                        per the dim's and icnt's*/
+  DMAUTILSAUTOINC3D_ADDR_CIRC1 = 1,/*!< Circular addressing, address will hold the upper bits of the
+                                                                                       addresses to be constant. This enum is to use circSize1 for
+                                                                                       circularity */
+  DMAUTILSAUTOINC3D_ADDR_CIRC2 = 2 /*!< Circular addressing, address will hold the upper bits of the
+                                                                                       addresses to be constant. This enum is to use circSize2 for
+                                                                                       circularity*/
+}DmaUtilsAutoInc3d_AddrType;
+
+
+/**
+ *  @enum    DmaUtilsAutoInc3d_CircDirType
+ *
+ *  @brief    Describes the direction in which circular addressing is applied
+ *
+ */
+typedef enum{
+  DMAUTILSAUTOINC3D_CIRCDIR_SRC = 0,/*!< Circular addressing if enabled is applied on source side */
+  DMAUTILSAUTOINC3D_CIRCDIR_DST = 1/*!<  Circular addressing if enabled is applied on desination side */
+}DmaUtilsAutoInc3d_CircDirType;
+
+/**
+ *  @enum    DmaUtilsAutoInc3d_CircDirType
+ *
+ *  @brief    Describes the direction in which circular addressing is applied
+ *
+ */
+typedef enum{
+  DMAUTILSAUTOINC3D_DRUOWNER_DIRECT_TR = 0,/*!< DRU channel is used in Direct TR mode */
+  DMAUTILSAUTOINC3D_DRUOWNER_UDMA= 1/*!<  Dru channel is used via ring based mechanism*/
+}DmaUtilsAutoInc3d_druOwner;
+
+
+/* ========================================================================== */
+/*                         Structure Declarations                             */
+/* ========================================================================== */
+
+/**
+ *  \brief This structure specifies the properties of the transfer for
+ *          auto increment usecase.
+ *
+ */
+
+typedef struct
+{
+    /** Total loop iteration count for level 0 (innermost) for source*/
+    uint16_t    sicnt0;
+    /**  Total loop iteration count for level 1 for source*/
+    uint16_t    sicnt1;
+     /** Total loop iteration count for level 2 for source*/
+    uint16_t    sicnt2;
+    /** Total loop iteration count for level 3  for source*/
+    uint16_t    sicnt3;
+    /** Jump in bytes when moving from from icnt0 to icnt1 for source*/
+    int32_t     sdim1;
+    /** Jump in bytes when moving from from icnt1 to icnt2 for source*/
+    int32_t     sdim2;
+    /** Jump in bytes when moving from from icnt2 to icnt3 for source*/
+    int32_t     sdim3;
+    /** Total loop iteration count for level 0 (innermost) for destination*/
+    uint16_t    dicnt0;
+    /** Total loop iteration count for level 1 for destination*/
+    uint16_t    dicnt1;
+    /** Total loop iteration count for level 2 for destination*/
+    uint16_t    dicnt2;
+    /** Total loop iteration count for level 3  for destination*/
+    uint16_t    dicnt3;
+    /** Jump in bytes when moving from from icnt0 to icnt1 for destination*/
+    int32_t     ddim1;
+    /** Jump in bytes when moving from from icnt1 to icnt2 for destination*/
+    int32_t     ddim2;
+    /** Jump in bytes when moving from from icnt2 to icnt3 for destination*/
+    int32_t     ddim3;
+}DmaUtilsAutoInc3d_TransferDim;
+
+
+/**
+ *
+ *  \brief   This structure specifies the circular properties for each level of
+ *          the transfer count. User can specify 2 different sizes for each level
+ *
+ */
+
+typedef struct
+{
+  /** Size in Bytes of the first circular buffer. The minimum value is
+        512 and it should be a power of 2. Maximum value can be 16M */
+  uint64_t    circSize1;
+  /** Size in Bytes of the first circular buffer. The minimum value is
+      512 and it should be a power of 2. Maximum value can be 16M */
+  uint64_t    circSize2;
+  /**  Which addressing to be used for icnt0. Please refer DmaUtilsAutoInc3d_AddrType
+          for the valid values*/
+  uint8_t     addrModeIcnt0;
+    /**  Which addressing to be used for icnt1. Please refer DmaUtilsAutoInc3d_AddrType
+          for the valid values*/
+  uint8_t     addrModeIcnt1;
+  /**  Which addressing to be used for icnt2. Please refer DmaUtilsAutoInc3d_AddrType
+      for the valid values*/
+  uint8_t     addrModeIcnt2;
+  /**  Which addressing to be used for icnt3. Please refer DmaUtilsAutoInc3d_AddrType
+        for the valid values*/
+  uint8_t     addrModeIcnt3;
+  /**  Direction in which circular addressing needs to be applied, i.e. whether to apply
+         circular addressing on source side or destination side. Please refer
+         DmaUtilsAutoInc3d_CircDirType for the valid values. Circular addressing can only
+             be applied to one side (src/dst) of transfer other side will use linear addressing*/
+  uint8_t     circDir;
+}DmaUtilsAutoInc3d_TransferCirc;
+
+/**
+ *  \brief   This structure specifies the input and output pointers for the
+ *          transfer
+ */
+typedef struct
+{
+  /** Pointer to memory buffer for the source */
+  uint8_t    *srcPtr;
+  /** Pointer to memory buffer for the destination */
+  uint8_t    *dstPtr;
+}DmaUtilsAutoInc3d_IOPointers;
+
+
+/**
+ *  \brief   This structure specifies the properties of the transfer for
+ *          auto increment usecase.
+ *
+ *  ===============================================================
+ */
+typedef struct
+{
+    /** Trasnfer sync boundary, Refer DmaUtilsAutoInc3d_SyncType for valid values */
+    int32_t syncType;
+    /** Properties to describe transfer dimensions in terms of icnt's
+          and dim's */
+    DmaUtilsAutoInc3d_TransferDim transferDim;
+    /** Properties describing circularity */
+    DmaUtilsAutoInc3d_TransferCirc circProp;
+    /** Input and output pointers */
+    DmaUtilsAutoInc3d_IOPointers ioPointers;
+}DmaUtilsAutoInc3d_TransferProp;
+
+/** ========================================================
+ *
+ *  \brief   This structure specifies the parameter to initialize
+ *          auto increment related properties.
+ *
+ *  ===============================================================
+ */
+
+typedef struct
+{
+    /**  DRU queue number to which a particular channel should submit its
+         transfers */
+    uint8_t dmaQueNo;
+    /**  Owner of the DRU. Refer DmaUtilsAutoInc3d_druOwner for valid values*/
+    uint8_t druOwner;
+
+}DmaUtilsAutoInc3d_ChannelInitParam;
+
+typedef struct
+{
+    /**  DRU queue number to which a particular channel should submit its
+         transfers */
+    int32_t numChannels;
+    /**  Owner of the DRU. Refer DmaUtilsAutoInc3d_druOwner for valid values*/
+    int32_t contextSize;
+    /** Level for debug messages */
+    int32_t traceLogLevel;
+    /** Call back Function pointer to Write Log*/
+    int32_t(*DmaUtilsVprintf)(const char * format, va_list arg);
+    /** Handle to the UDMA driver to be used for the utility. If user sets
+    it to NULL then utility will use a default udma driver handle */
+    Udma_DrvHandle                    udmaDrvHandle;
+}DmaUtilsAutoInc3d_InitParam;
+
+
+typedef struct
+{
+    /**  Allocated memory for TR descriptor, Use DmaUtilsAutoInc3d_getTrMemReq AP
+    to know the actual size required for this memory*/
+    uint8_t * trMem;
+    /**  Size of the memory allocated for trMem*/
+    int32_t trMemSize;
+    /** Number of Transfer Records (TR's) that will be submitted to a particular channel */
+    int32_t numTRs;
+    /** channelId for which TR is prepared It is important to note
+    that this id is a virtual id for channel and is not related to the actual channel
+    used internally to do the transfer  */
+    int32_t channelId;
+}DmaUtilsAutoInc3d_TrPrepareParam;
+
+
+/* ========================================================================== */
+/*                          Function Declarations                             */
+/* ========================================================================== */
+
+/**
+ *  \brief Returns the size of dmautils context.
+ *
+ *  This function returns the size of the DMA UTILS autoincrement 3D handle. User is
+ *  then expected to allocate this memory and provide it to DMA UTILS autoincrement 3D
+ *  function as an input.
+ *
+ *  \param numChannels [IN] Number of channels required for a usecase
+ *
+ *  \return  Size of the DMA UTILS context in bytes
+ */
+
+int32_t DmaUtilsAutoInc3d_getContextSize(int32_t numChannels);
+
+/**
+ *  \brief     This function initializes the DMA UTILS context for autoincrement usecase.
+ *
+ *  This function initializes the DMA UTILS context for autoincrement usecase. Internally it allocates
+ *   numChannels DRU channels for the use case
+ *
+ *  \param    autoIncrementContext [IN] Memory allocated by the user as per DmaUtilsAutoInc3d_getContextSize
+ *                                                      API. Try to allocate this memory in the fastest available memory for optimal performance
+ *
+ *
+ *  \param    initParams [IN] Init params for the dmautils
+ *
+ *  \param    chInitParams [IN] Init parameter for each channel. This is an array and number of enteries should be same as numChannels
+ *
+ *
+ *  \return \ref Udma_ErrorCodes
+ *
+ *  =======================================================
+ */
+ int32_t DmaUtilsAutoInc3d_init(void * autoIncrementContext , DmaUtilsAutoInc3d_InitParam * initParams, DmaUtilsAutoInc3d_ChannelInitParam chInitParams[]);
+
+
+/**
+ *
+ *  \brief     This function returns the size of the TR descriptor required for the transfer configuration
+ *            given by the user.
+ *
+ * \param numTRs [IN] Number of Transfer Records (TR's) that will be submitted to a particular channel
+ *
+ *  \return   Size of the TR descriptor in bytes.
+ *
+ *  =======================================================
+ */
+ int32_t DmaUtilsAutoInc3d_getTrMemReq(int32_t numTRs);
+
+/**
+ *
+ *  \brief     This function will prepare a TR/ TR descriptor depending on the number of Tr's to be submitted
+ *                on a particular channel
+ *
+ *
+ *  \param trPrepParam [IN] Parameters required for preparing TR
+ *
+ * \param transferProp [IN] Transfer properties of all the TR'sr which needs to be submitted to a single channel
+ *
+ *  \return \ref Udma_ErrorCodes
+ *
+ */
+ int32_t DmaUtilsAutoInc3d_prepareTr(DmaUtilsAutoInc3d_TrPrepareParam* trPrepParam ,  DmaUtilsAutoInc3d_TransferProp transferProp[]);
+
+
+
+/**
+ *
+ *  \brief   This function configures autoincrement for a particular channel
+ *
+ *  \param autoIncrementContext [IN] Context allocated for dmautils usecase
+ *
+ *  \param channelId  [IN] Channel Id which needs to be configured. It is important to note
+ *                      that this id is a virtual id for channel and is not related to the actual channel
+ *                      used internally to do the transfer
+ *
+ *  \param trMem [IN] Populated TrMem after calling DmaUtilsAutoInc3d_prepareTr function
+ *
+  * \param numTr [IN] Number of Transfer Records (TR's) that will be submitted to a particular channel
+ *
+ *  \return \ref Udma_ErrorCodes
+ *
+ */
+ int32_t DmaUtilsAutoInc3d_configure(void * autoIncrementContext, int32_t channelId, uint8_t * trMem, int32_t numTr);
+
+
+/**
+ *
+ *  \brief   This function triggers transfer on a particular channel
+ *
+ *  \param autoIncrementContext [IN] Context allocated for dmautils usecase
+ *
+ *  \param  channelId [IN] Channel Id which needs to be triggered. It is important to note
+ *                      that this id is a virtual id for channel and is not related to the actual channel
+ *                      used internally to do the transfer
+ *
+ *  \return Number of triggered required to complete the full transfer
+ *
+ */
+int32_t DmaUtilsAutoInc3d_trigger(void * autoIncrementContext, int32_t channelId);
+
+/**
+ *
+ *  \brief   This function waits for completion transfer on a particular channel
+ *
+ *  \param autoIncrementContext [IN] Context allocated for dmautils usecase
+ *
+ *  \param channelId  [IN] Channel Id for which we need to wait for transfer completion. It is important to note
+ *                      that this id is a virtual id for channel and is not related to the actual channel
+ *                      used internally to do the transfer
+ *
+ *  \return Number of triggered required to complete the full transfer
+ *
+ */
+void  DmaUtilsAutoInc3d_wait(void * autoIncrementContext, int32_t channelId);
+
+/**
+ *
+ *  \brief   This function deconfigures autoincrement for a particular channel
+ *
+ *  \param autoIncrementContext [IN] Context allocated for dmautils usecase
+ *
+ *  \param channelId [IN] Channel Id which needs to be de-configured. It is important to note
+ *                      that this id is a virtual id for channel and is not related to the actual channel
+ *                      used internally to do the transfer
+ *
+ *  \param trMem [IN] Populated TrMem after calling DmaUtilsAutoInc3d_prepareTr function
+ *
+  * \param numTr [IN] Number of Transfer Records (TR's) that will be submitted to a particular channel
+ *
+ *  \return \ref Udma_ErrorCodes
+ */
+int32_t DmaUtilsAutoInc3d_deconfigure(void * autoIncrementContext, int32_t channelId, uint8_t * trMem, int32_t numTr);
+
+/**
+ *
+ *  \brief   This function deinit autoincrement by releasing all the resorces allocated
+ *
+ *  \param autoIncrementContext [IN] Context allocated for dmautils usecase
+ *
+ *  \return   \ref  Udma_ErrorCodes
+ *
+ */
+int32_t DmaUtilsAutoInc3d_deinit(void * autoIncrementContext);
+
+
+#ifdef __cplusplus
+}
+#endif
+
+/* @} */
+
+#endif /*#define DMAUTILS_AUTOINCREMENT_3D_H_*/
+
diff --git a/packages/ti/drv/udma/dmautils/makefile b/packages/ti/drv/udma/dmautils/makefile
new file mode 100644 (file)
index 0000000..b6623f3
--- /dev/null
@@ -0,0 +1,39 @@
+#
+# This file is the makefile for building DMA Utils library.
+#
+include $(PDK_INSTALL_PATH)/ti/build/Rules.make
+
+MODULE_NAME = dmautils
+
+SRCDIR = src
+INCDIR = . src inc
+
+
+# List all the external components/interfaces, whose interface header files
+# need to be included for this component
+INCLUDE_EXTERNAL_INTERFACES = pdk
+
+
+# Common source files and CFLAGS across all platforms and cores
+SRCS_COMMON += dmautils_autoincrement_3d.c
+
+PACKAGE_SRCS_COMMON = .
+CFLAGS_LOCAL_COMMON = $(PDK_CFLAGS) $(UDMA_CFLAGS)
+
+# Core/SoC/platform specific source files and CFLAGS
+# Example:
+#   SRCS_<core/SoC/platform-name> =
+#   CFLAGS_LOCAL_<core/SoC/platform-name> =
+
+# Include common make files
+ifeq ($(MAKERULEDIR), )
+#Makerule path not defined, define this and assume relative path from ROOTDIR
+  MAKERULEDIR := $(ROOTDIR)/ti/build/makerules
+  export MAKERULEDIR
+endif
+include $(MAKERULEDIR)/common.mk
+
+# OBJs and libraries are built by using rule defined in rules_<target>.mk
+#     and need not be explicitly specified here
+
+# Nothing beyond this point
diff --git a/packages/ti/drv/udma/dmautils/src/dmautils_autoincrement_3d.c b/packages/ti/drv/udma/dmautils/src/dmautils_autoincrement_3d.c
new file mode 100644 (file)
index 0000000..ceb9fe0
--- /dev/null
@@ -0,0 +1,1172 @@
+/*
+ *  Copyright (c) Texas Instruments Incorporated 2018
+ *
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions
+ *  are met:
+ *
+ *    Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *
+ *    Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the
+ *    distribution.
+ *
+ *    Neither the name of Texas Instruments Incorporated nor the names of
+ *    its contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+/*
+ *******************************************************************************
+ *
+ *  DMA utility functions
+ *
+ *******************************************************************************
+*/
+
+/**
+ *****************************************************************************
+ * \file  dmautils_autoincrement_3d.c
+ *
+ * \brief*  This file contains function implementation for dma util functions for
+ *  configuring DMA on J7 device for autoincrement 3D usecase.
+ *
+ *
+ *****************************************************************************
+ */
+
+/* ========================================================================== */
+/*                             Include Files                                  */
+/* ========================================================================== */
+#include <string.h>
+#include <math.h>
+#include <stdint.h>
+
+#include "ti/drv/udma/udma.h"
+#include "ti/drv/udma/dmautils/src/dmautils_autoincrement_3d_priv.h"
+#include "ti/drv/udma/dmautils/include/dmautils_autoincrement_3d.h"
+
+#if defined (HOST_EMULATION)
+  #if defined (__C7100__)
+    #include <c7x_host_emulation.h>
+  #endif
+#else
+  #if defined (__C7100__)
+    #include <c7x.h>
+  #endif
+#endif
+
+
+/* If its a Loki Build then force the mode to be in hostemulation as Loki doesnt support DRU */
+#if defined (LOKI_BUILD)
+#define HOST_EMULATION (1U)
+#endif
+
+#define DMAUTILS_ALIGN_CEIL(VAL, ALIGN) ((((VAL) + (ALIGN) - 1)/(ALIGN)) * (ALIGN) )
+
+
+#ifdef HOST_EMULATION
+#include "stdlib.h"
+
+void hostEmulation_updateTriggerCount(struct Udma_DrvObj * udmaDrvHandle,
+                                                                              volatile uint64_t *pSwTrigReg)
+{
+  uint32_t i;
+  CSL_DRU_t *druRegs = udmaDrvHandle->utcInfo[0].druRegs;
+  uintptr_t origPtr = (uintptr_t)pSwTrigReg;
+  uintptr_t currPtr;
+
+  for ( i = 0; i < udmaDrvHandle->utcInfo[0].numCh; i++)
+  {
+    currPtr = (uintptr_t)&druRegs->CHRT[i].CHRT_SWTRIG;
+    if ( currPtr == origPtr)
+    {
+      /* Use reserved space for tracking number of triggers submitted for a given channel */
+      druRegs->CHRT[i].Resv_256[0]++;
+      break;
+    }
+  }
+}
+
+void hostEmulation_druChSubmitAtomicTr(CSL_DRU_t *pRegs,
+                                           uint32_t chId,
+                                           void *  vdata)
+{
+  CSL_UdmapTR * tr = (CSL_UdmapTR *)vdata;
+  CSL_UdmapTR * origTransferRecord   = ( CSL_UdmapTR *)&pRegs->CHATOMIC[chId];
+  CSL_UdmapTR * nextTransferRecord  = (CSL_UdmapTR *)&pRegs->CHATOMIC[chId].DEBUG[0];
+  CSL_UdmapTR * nextTransferRecord1 = (CSL_UdmapTR *)&pRegs->CHATOMIC[chId].DEBUG[1];
+  CSL_UdmapTR * nextTransferRecord2 = (CSL_UdmapTR *)&pRegs->CHATOMIC[chId].DEBUG[2];
+
+  /* Use reserved space for tracking number of triggers submitted for a given channel */
+  pRegs->CHRT[chId].Resv_256[0] = 0;
+
+  *origTransferRecord  = *tr;
+  *nextTransferRecord = *tr;
+  *nextTransferRecord1 = *tr;
+  *nextTransferRecord2 = *tr;
+}
+
+
+uint64_t hostEmulation_addressUpdate( uint64_t base, int32_t offset, uint64_t addrMask )
+{
+  uint64_t newAddr;
+
+  newAddr = base + offset;
+
+  if ( addrMask != 0 )
+  {
+    newAddr = ( base & addrMask ) | ( newAddr & ~addrMask );
+  }
+
+  return newAddr;
+}
+
+void hostEmulation_circMask( uint32_t cbk0, uint32_t cbk1, uint64_t * circMask0, uint64_t * circMask1  )
+{
+  uint32_t blockSize0 = cbk0 + 9U; /* power-of-2 of block size in bytes */
+  uint32_t blockSize1 = cbk0 + cbk1 + 10U; /* power-of-2 of block size in bytes */
+
+  if ( blockSize1 > 31U )
+  {
+    blockSize1 = 32U; /* clamp to 4GB maximum size */
+  }
+  *circMask0 = (~0ULL) << blockSize0;
+  *circMask1 = (~0ULL) << blockSize1;
+}
+
+static void hostEmulation_triggerDMA(struct Udma_DrvObj * udmaDrvHandle)
+{
+  uint32_t chId;
+  CSL_DRU_t * druRegs;
+  CSL_UdmapCfg  * udmapRegs;
+  CSL_ringacc_cfgRegs * ringAccCfgRegs;
+
+
+  druRegs             = udmaDrvHandle->utcInfo[0].druRegs;
+  ringAccCfgRegs  = udmaDrvHandle->raRegs.pCfgRegs;
+  udmapRegs        = &udmaDrvHandle->udmapRegs;
+
+
+  for ( chId = 0; chId < 32; chId++)//:TODO: Remove hard coded value of 32
+  {
+    if ( (druRegs->CHRT[chId].CHRT_SWTRIG & CSL_DRU_CHRT_SWTRIG_GLOBAL_TRIGGER0_MASK) == 1U)
+    {
+      uint8_t *srcPtr;
+      uint8_t *dstPtr;
+      uint32_t triggerType;
+      uint32_t circDir;
+      uint32_t icnt0;
+      uint32_t CBK0, CBK1;
+      uint32_t AM0, AM1, AM2, AM3;
+      uint64_t srcAM0, srcAM1, srcAM2, srcAM3;
+      uint64_t dstAM0, dstAM1, dstAM2, dstAM3;
+      uint64_t circMask0;
+      uint64_t circMask1;
+      uint32_t AMODE;
+      uint32_t loopCnt1Reset, loopCnt2Reset;
+      uint8_t * interimBuffer = NULL;
+      uint32_t srcLoopExitCondition = 0;
+      uint32_t dstLoopExitCondition = 0;
+      uint32_t totalSrcCnt, totalDstCnt;
+      /* Clear the sw trigger so that next trigger can happen */
+
+
+      druRegs->CHRT[chId].Resv_256[0]--;
+      /* Use reserved space for tracking number of triggers submitted for a given channel */
+      if ( druRegs->CHRT[chId].Resv_256[0] == 0 )
+      {
+        druRegs->CHRT[chId].CHRT_SWTRIG  = druRegs->CHRT[chId].CHRT_SWTRIG & (uint64_t)(~CSL_DRU_CHRT_SWTRIG_GLOBAL_TRIGGER0_MASK);
+      }
+
+      CSL_UdmapTR * origTransferRecord  = (CSL_UdmapTR *)(void *) &druRegs->CHATOMIC[chId];
+      CSL_UdmapTR * nextTransferRecord = (CSL_UdmapTR *)(void *) &druRegs->CHATOMIC[chId].DEBUG[0];
+      CSL_UdmapTR * nextTransferRecord1 = (CSL_UdmapTR *)(void *) &druRegs->CHATOMIC[chId].DEBUG[1];
+      CSL_UdmapTR * nextTransferRecord2 = (CSL_UdmapTR *)(void *) &druRegs->CHATOMIC[chId].DEBUG[2];
+
+      /* Do the actual transfer */
+
+      triggerType = CSL_FEXT(origTransferRecord->flags, UDMAP_TR_FLAGS_TRIGGER0_TYPE);
+      AMODE = CSL_FEXT(origTransferRecord->fmtflags, UDMAP_TR_FMTFLAGS_AMODE);
+
+      if ( AMODE == CSL_UDMAP_TR_FMTFLAGS_AMODE_CIRCULAR)
+      {
+        circDir        = CSL_FEXT(origTransferRecord->fmtflags, UDMAP_TR_FMTFLAGS_DIR);
+        CBK0         = CSL_FEXT(origTransferRecord->fmtflags, UDMAP_TR_FMTFLAGS_AMODE_SPECIFIC_CBK0);
+        CBK1         = CSL_FEXT(origTransferRecord->fmtflags, UDMAP_TR_FMTFLAGS_AMODE_SPECIFIC_CBK1);
+        AM0           = CSL_FEXT(origTransferRecord->fmtflags, UDMAP_TR_FMTFLAGS_AMODE_SPECIFIC_AM0);
+        AM1           = CSL_FEXT(origTransferRecord->fmtflags, UDMAP_TR_FMTFLAGS_AMODE_SPECIFIC_AM1);
+        AM2           = CSL_FEXT(origTransferRecord->fmtflags, UDMAP_TR_FMTFLAGS_AMODE_SPECIFIC_AM2);
+        AM3           = CSL_FEXT(origTransferRecord->fmtflags, UDMAP_TR_FMTFLAGS_AMODE_SPECIFIC_AM3);
+        hostEmulation_circMask(CBK0, CBK1, &circMask0, &circMask1);
+      }
+      else
+      {
+        /* Linear Addressing */
+        circMask0 = (~0ULL);
+        circMask1 = (~0ULL);
+        AM0 = 0;
+        AM1 = 0;
+        AM2 = 0;
+        AM3 = 0;
+        circDir = 0;
+      }
+
+      if ( circDir == CSL_UDMAP_TR_FMTFLAGS_DIR_DST_USES_AMODE)
+      {
+        dstAM0 = (AM0 == 0 ) ? 0 : ( (AM0 == 1) ? circMask0 : circMask1  );/* Circular update */
+        srcAM0 = 0;/* Linear Update */
+
+        dstAM1 = (AM1 == 0 ) ? 0 : ( (AM1 == 1) ? circMask0 : circMask1  );/* Circular update */
+        srcAM1 = 0;/* Linear Update */
+
+        dstAM2 = (AM2 == 0 ) ? 0 : ( (AM2 == 1) ? circMask0 : circMask1  );/* Circular update */
+        srcAM2 = 0;/* Linear Update */
+
+        dstAM3 = (AM3 == 0 ) ? 0 : ( (AM3 == 1) ? circMask0 : circMask1  );/* Circular update */
+        srcAM3 = 0;/* Linear Update */
+      }
+      else
+      {
+        dstAM0 = 0;/* Linear Update */
+        srcAM0 = (AM0 == 0 ) ? 0 : ( (AM0 == 1) ? circMask0 : circMask1  );
+
+        dstAM1 = 0;/* Linear Update */
+        srcAM1 = (AM1 == 0 ) ? 0 : ( (AM1 == 1) ? circMask0 : circMask1  );
+
+        dstAM2 = 0;/* Linear Update */
+        srcAM2 = (AM2 == 0 ) ? 0 : ( (AM2 == 1) ? circMask0 : circMask1  );
+
+        dstAM3 = 0;/* Linear Update */
+        srcAM3 = (AM3 == 0 ) ? 0 : ( (AM3 == 1) ? circMask0 : circMask1  );
+
+      }
+
+      loopCnt1Reset = 0;
+      loopCnt2Reset = 0;
+
+      /* allocate worst case, actual buffer used will depend on trugerType */
+      interimBuffer = (uint8_t *)malloc(origTransferRecord->icnt0 * origTransferRecord->icnt1 * origTransferRecord->icnt2 *
+                                        origTransferRecord->icnt3);
+      dstPtr = interimBuffer;
+
+      totalSrcCnt = nextTransferRecord->icnt0 * nextTransferRecord->icnt1 * nextTransferRecord->icnt2 * nextTransferRecord->icnt3;
+      totalDstCnt = nextTransferRecord->dicnt0 * nextTransferRecord->dicnt1 * nextTransferRecord->dicnt2 * nextTransferRecord->dicnt3;
+
+      srcLoopExitCondition  = ( totalSrcCnt < totalDstCnt )? totalSrcCnt : totalDstCnt;
+      dstLoopExitCondition  = srcLoopExitCondition;
+      /* Set the minimum value of icnt3 for both src and dst as TR completes whenever anyone of them  is exauhsted */
+      /* Transfer source data to a intermediate linear buffer */
+
+      while (1)
+      {
+        srcPtr = (uint8_t *)nextTransferRecord->addr;
+/*        dstPtr = interimBuffer +
+                    (origTransferRecord->icnt1 - nextTransferRecord->icnt1) * origTransferRecord->icnt0 +
+                    (origTransferRecord->icnt2 - nextTransferRecord->icnt2) * origTransferRecord->icnt0 * origTransferRecord->icnt1;*/
+
+        for (icnt0 = 0; icnt0 < nextTransferRecord->icnt0; icnt0++)
+        {
+          *dstPtr = *srcPtr;
+            srcPtr = (uint8_t *)hostEmulation_addressUpdate((uint64_t)srcPtr, 1, srcAM0);
+            dstPtr++;
+        }
+        nextTransferRecord->icnt1--;
+        nextTransferRecord->addr   = hostEmulation_addressUpdate(nextTransferRecord->addr ,  nextTransferRecord->dim1,   srcAM1);
+
+        if ( nextTransferRecord->icnt1 == 0)
+        {
+          loopCnt1Reset = 1;
+          nextTransferRecord->icnt2--;
+          nextTransferRecord->icnt1 = origTransferRecord->icnt1;
+
+          nextTransferRecord->addr   = hostEmulation_addressUpdate(nextTransferRecord1->addr ,  nextTransferRecord->dim2,   srcAM2);
+
+          nextTransferRecord1->addr   = nextTransferRecord->addr;
+        }
+
+        if ( nextTransferRecord->icnt2 == 0)
+        {
+          loopCnt2Reset= 1;
+          nextTransferRecord->icnt3--;
+          nextTransferRecord->icnt2 = origTransferRecord->icnt2;
+
+          nextTransferRecord->addr   = hostEmulation_addressUpdate(nextTransferRecord2->addr,  nextTransferRecord->dim3,   srcAM3);
+
+          nextTransferRecord1->addr   = nextTransferRecord->addr;
+          nextTransferRecord2->addr   = nextTransferRecord->addr;
+        }
+
+        if ( nextTransferRecord->icnt3 == 0)
+        {
+          CSL_REG64_FINS(&druRegs->CHRT[chId].CHRT_CTL, DRU_CHRT_CTL_ENABLE, 0);
+          break;
+        }
+
+
+        if ( triggerType == CSL_UDMAP_TR_FLAGS_TRIGGER_TYPE_ICNT1_DEC )
+        {
+          break;
+        }
+        else if ( triggerType == CSL_UDMAP_TR_FLAGS_TRIGGER_TYPE_ICNT2_DEC )
+        {
+          if ( loopCnt1Reset == 1)
+          {
+            nextTransferRecord1->addr   = nextTransferRecord->addr;
+            break;
+          }
+        }
+        else if ( triggerType == CSL_UDMAP_TR_FLAGS_TRIGGER_TYPE_ICNT3_DEC )
+        {
+          if ( loopCnt2Reset == 1)
+          {
+            nextTransferRecord2->addr   = nextTransferRecord->addr;
+            break;
+          }
+        }
+        else
+        {
+          /*Indicates 4D sync,  Just continue */
+        }
+        srcLoopExitCondition--;
+        if ( srcLoopExitCondition == 0)
+        {
+          nextTransferRecord->icnt3 = 0;
+          CSL_REG64_FINS(&druRegs->CHRT[chId].CHRT_CTL, DRU_CHRT_CTL_ENABLE, 0);
+          break;
+        }
+      }
+
+      loopCnt1Reset = 0;
+      loopCnt2Reset = 0;
+
+     srcPtr = interimBuffer;
+      /* Now copy the intermediate data to the destination buffer */
+     while (1)
+      {
+        dstPtr = (uint8_t *)nextTransferRecord->daddr;
+
+        for (icnt0 = 0; icnt0 < nextTransferRecord->dicnt0; icnt0++)
+        {
+          *dstPtr = *srcPtr;
+           *srcPtr++;
+            dstPtr = (uint8_t *)hostEmulation_addressUpdate((uint64_t)dstPtr, 1, dstAM0);
+        }
+
+        nextTransferRecord->dicnt1--;
+
+        nextTransferRecord->daddr = hostEmulation_addressUpdate(nextTransferRecord->daddr, nextTransferRecord->ddim1, dstAM1);
+
+        if ( nextTransferRecord->dicnt1 == 0)
+        {
+          loopCnt1Reset = 1;
+          nextTransferRecord->dicnt2--;
+          nextTransferRecord->dicnt1 = origTransferRecord->dicnt1;
+
+          nextTransferRecord->daddr = hostEmulation_addressUpdate(nextTransferRecord1->daddr, nextTransferRecord->ddim2, dstAM2);
+          nextTransferRecord1->daddr = nextTransferRecord->daddr;
+        }
+
+        if ( nextTransferRecord->dicnt2 == 0)
+        {
+          loopCnt2Reset= 1;
+          nextTransferRecord->dicnt3--;
+          nextTransferRecord->dicnt2 = origTransferRecord->dicnt2;
+
+          nextTransferRecord->daddr = hostEmulation_addressUpdate(nextTransferRecord2->daddr, nextTransferRecord->ddim3, dstAM3);
+
+          nextTransferRecord1->daddr = nextTransferRecord->daddr;
+          nextTransferRecord2->daddr = nextTransferRecord->daddr;
+        }
+
+        if ( nextTransferRecord->dicnt3 == 0)
+        {
+          CSL_REG64_FINS(&druRegs->CHRT[chId].CHRT_CTL, DRU_CHRT_CTL_ENABLE, 0);
+          break;
+        }
+
+        if ( triggerType == CSL_UDMAP_TR_FLAGS_TRIGGER_TYPE_ICNT1_DEC )
+        {
+          break;
+        }
+        else if ( triggerType == CSL_UDMAP_TR_FLAGS_TRIGGER_TYPE_ICNT2_DEC )
+        {
+          if ( loopCnt1Reset == 1)
+          {
+            break;
+          }
+        }
+        else if ( triggerType == CSL_UDMAP_TR_FLAGS_TRIGGER_TYPE_ICNT3_DEC )
+        {
+          if ( loopCnt2Reset == 1)
+          {
+            break;
+          }
+        }
+
+        dstLoopExitCondition--;
+        if ( dstLoopExitCondition == 0)
+        {
+          nextTransferRecord->dicnt3 = 0;
+          CSL_REG64_FINS(&druRegs->CHRT[chId].CHRT_CTL, DRU_CHRT_CTL_ENABLE, 0);
+          break;
+        }
+      }
+
+      if (( nextTransferRecord->icnt3 == 0 ) || ( nextTransferRecord->dicnt3 == 0 ))
+      {
+        /* this indicates that TR is received from PSIL */
+        if ( (druRegs->CHNRT[chId].CFG & CSL_DRU_CHNRT_CFG_CHAN_TYPE_OWNER_MASK) != 0 )
+        {
+           CSL_UdmapCppi5TRPD * trDescriptor;
+           uint64_t * ringPtr;
+           uint64_t currTr;
+           uint64_t numTr;
+           CSL_UdmapTR           *pTr;
+           /* Get Ring Memory Pointer */
+          ringPtr = (uint64_t *) ((uint64_t)((uint64_t)ringAccCfgRegs->RING[udmapRegs->txChanCnt + chId].BA_HI << 32) |
+                                            ringAccCfgRegs->RING[udmapRegs->txChanCnt + chId].BA_LO);
+
+           trDescriptor = (CSL_UdmapCppi5TRPD *) (*ringPtr);
+
+           numTr = CSL_udmapCppi5GetPktLen(trDescriptor);
+           /* Use this field to track the TR, For the target build this would be handled by hardware */
+           /* In real hardware this will not be like this it is done just for host emulation*/
+           currTr =  druRegs->CHATOMIC[chId].DEBUG[1].NEXT_TR_WORD0_1;
+
+            if ( currTr < numTr)
+            {
+               currTr++;
+               pTr = (CSL_UdmapTR *)( (uint8_t *)trDescriptor + sizeof(CSL_UdmapTR) * currTr);
+
+               /* Update both original and next transfer record by reading the TR from the TR descriptor */
+              hostEmulation_druChSubmitAtomicTr(druRegs, chId, (void *) pTr);
+
+               druRegs->CHATOMIC[chId].DEBUG[1].NEXT_TR_WORD0_1 = currTr;
+
+            }
+        }
+      }
+      if ( interimBuffer != NULL)
+      {
+        free(interimBuffer);
+      }
+    }
+  }
+}
+#endif
+
+
+static int32_t DmaUtilsAutoInc3d_getTotalBlockCount(uint8_t * trMem, uint32_t numTr)
+{
+    uint32_t i;
+    CSL_UdmapTR * pTr;
+    uint32_t isRingBasedFlowReq = 0;
+    uint32_t numTotBlks = 0;
+    uint32_t triggerType;
+    uint32_t srcCounts;
+    uint32_t dstCounts;
+
+    pTr = ( CSL_UdmapTR * )trMem;
+
+    if ( numTr > DMAUTILS_MAX_NUM_TR_DIRECT_TR_MODE)
+    {
+      isRingBasedFlowReq = 1U;
+    }
+
+    if (  isRingBasedFlowReq == 1U )
+    {
+      /* Setup TR descriptor */
+      pTr = (CSL_UdmapTR *)(trMem + sizeof(CSL_UdmapTR));
+    }
+
+    for ( i = 0; i < numTr; i++)
+    {
+        triggerType = CSL_FEXT(pTr[i].flags, UDMAP_TR_FLAGS_TRIGGER0_TYPE );
+        if ( triggerType == CSL_UDMAP_TR_FLAGS_TRIGGER_TYPE_ICNT1_DEC )
+        {
+            srcCounts = pTr[i].icnt1 * pTr[i].icnt2 * pTr[i].icnt3;
+            dstCounts = pTr[i].dicnt1 * pTr[i].dicnt2 * pTr[i].dicnt3;
+        }
+        else if ( triggerType == CSL_UDMAP_TR_FLAGS_TRIGGER_TYPE_ICNT2_DEC )
+        {
+            srcCounts = pTr[i].icnt2 * pTr[i].icnt3;
+            dstCounts = pTr[i].dicnt2 * pTr[i].dicnt3;
+        }
+        else if ( triggerType == CSL_UDMAP_TR_FLAGS_TRIGGER_TYPE_ICNT3_DEC )
+        {
+            srcCounts = pTr[i].icnt3;
+            dstCounts = pTr[i].dicnt3;
+        }
+        else
+        {
+            srcCounts = 1U;
+            dstCounts = 1U;
+        }
+
+        /* Always pick the minmum of the src and dst count as once any one is exhausted TR is compete */
+        numTotBlks += ( srcCounts > dstCounts) ? dstCounts : srcCounts;
+    }
+
+    return numTotBlks;
+
+}
+
+
+
+static void DmaUtilsAutoInc3d_setupTr(CSL_UdmapTR * tr,
+                                                                        DmaUtilsAutoInc3d_TransferProp * transferProp);
+
+static void DmaUtilsAutoInc3d_setupTr(CSL_UdmapTR * tr,
+                                                                        DmaUtilsAutoInc3d_TransferProp * transferProp)
+{
+
+    uint32_t triggerBoundary;
+    uint32_t waitBoundary;
+    uint32_t fmtflags = 0;
+
+    switch (transferProp->syncType)
+    {
+        case DMAUTILSAUTOINC3D_SYNC_1D :
+        {
+          triggerBoundary = CSL_UDMAP_TR_FLAGS_TRIGGER_TYPE_ICNT1_DEC;
+          waitBoundary     = CSL_UDMAP_TR_FLAGS_EVENT_SIZE_ICNT1_DEC;
+          break;
+        }
+        case DMAUTILSAUTOINC3D_SYNC_2D :
+        {
+          triggerBoundary = CSL_UDMAP_TR_FLAGS_TRIGGER_TYPE_ICNT2_DEC;
+          waitBoundary     = CSL_UDMAP_TR_FLAGS_EVENT_SIZE_ICNT2_DEC;
+          break;
+        }
+        case DMAUTILSAUTOINC3D_SYNC_3D:
+        {
+          triggerBoundary = CSL_UDMAP_TR_FLAGS_TRIGGER_TYPE_ICNT3_DEC;
+          waitBoundary     = CSL_UDMAP_TR_FLAGS_EVENT_SIZE_ICNT3_DEC;
+          break;
+        }
+        case DMAUTILSAUTOINC3D_SYNC_4D:
+        {
+          triggerBoundary = CSL_UDMAP_TR_FLAGS_TRIGGER_TYPE_ALL;
+          waitBoundary     = CSL_UDMAP_TR_FLAGS_EVENT_SIZE_COMPLETION;
+          break;
+        }
+        default :
+        {
+          triggerBoundary = CSL_UDMAP_TR_FLAGS_TRIGGER_TYPE_ICNT2_DEC;
+          waitBoundary     = CSL_UDMAP_TR_FLAGS_EVENT_SIZE_ICNT2_DEC;
+          break;
+        }
+    }
+
+    /* Configure circularity parameters if required */
+    if ( ( transferProp->circProp.circSize1 != 0 ) ||
+            ( transferProp->circProp.circSize2 != 0 ) )
+    {
+        int32_t CBK0;
+        int32_t CBK1;
+        uint32_t circSize1 = transferProp->circProp.circSize1;
+        uint32_t circSize2 = transferProp->circProp.circSize2;
+        uint32_t circDir;
+
+        if ( transferProp->circProp.circDir == DMAUTILSAUTOINC3D_CIRCDIR_SRC )
+        {
+          circDir = CSL_UDMAP_TR_FMTFLAGS_DIR_SRC_USES_AMODE;
+        }
+        else
+        {
+          circDir = CSL_UDMAP_TR_FMTFLAGS_DIR_DST_USES_AMODE;
+        }
+
+        CBK0 = log2((double) circSize1) - 9;
+        CBK1 = log2((double)circSize2)  - 1U -CBK0;
+
+        if ( CBK1 < 0 )
+        {
+           CBK1 = 0;
+        }
+
+        fmtflags = CSL_FMK(UDMAP_TR_FMTFLAGS_AMODE, CSL_UDMAP_TR_FMTFLAGS_AMODE_CIRCULAR) |
+                               CSL_FMK(UDMAP_TR_FMTFLAGS_DIR, circDir) |
+                               CSL_FMK(UDMAP_TR_FMTFLAGS_ELYPE, CSL_UDMAP_TR_FMTFLAGS_ELYPE_1) |
+                               CSL_FMK(UDMAP_TR_FMTFLAGS_DFMT, CSL_UDMAP_TR_FMTFLAGS_DFMT_NO_CHANGE ) |
+                               CSL_FMK(UDMAP_TR_FMTFLAGS_SECTR, CSL_UDMAP_TR_FMTFLAGS_SECTR_NONE ) |
+                               CSL_FMK(UDMAP_TR_FMTFLAGS_AMODE_SPECIFIC_CBK0, CBK0 ) |
+                               CSL_FMK(UDMAP_TR_FMTFLAGS_AMODE_SPECIFIC_CBK1, CBK1 ) |
+                               CSL_FMK(UDMAP_TR_FMTFLAGS_AMODE_SPECIFIC_AM0, transferProp->circProp.addrModeIcnt0) |
+                               CSL_FMK(UDMAP_TR_FMTFLAGS_AMODE_SPECIFIC_AM1, transferProp->circProp.addrModeIcnt1) |
+                               CSL_FMK(UDMAP_TR_FMTFLAGS_AMODE_SPECIFIC_AM2, transferProp->circProp.addrModeIcnt2) |
+                               CSL_FMK(UDMAP_TR_FMTFLAGS_AMODE_SPECIFIC_AM3, transferProp->circProp.addrModeIcnt3);
+
+    }
+     /* Setup TR */
+    tr->flags     = CSL_FMK(UDMAP_TR_FLAGS_TYPE, CSL_UDMAP_TR_FLAGS_TYPE_4D_BLOCK_MOVE_REPACKING)             |
+               CSL_FMK(UDMAP_TR_FLAGS_STATIC, FALSE)                                           |
+               CSL_FMK(UDMAP_TR_FLAGS_EOL, FALSE)                                              |   /* NA */
+               CSL_FMK(UDMAP_TR_FLAGS_EVENT_SIZE, waitBoundary)    |
+               CSL_FMK(UDMAP_TR_FLAGS_TRIGGER0, CSL_UDMAP_TR_FLAGS_TRIGGER_GLOBAL0)          |/*Set the trigger to local trigger*/
+               CSL_FMK(UDMAP_TR_FLAGS_TRIGGER0_TYPE, triggerBoundary)      |/* This is to transfer a 2D block for each trigger*/
+               CSL_FMK(UDMAP_TR_FLAGS_TRIGGER1, CSL_UDMAP_TR_FLAGS_TRIGGER_NONE)               |
+               CSL_FMK(UDMAP_TR_FLAGS_TRIGGER1_TYPE, CSL_UDMAP_TR_FLAGS_TRIGGER_TYPE_ALL)      |
+               CSL_FMK(UDMAP_TR_FLAGS_CMD_ID, 0)                                           |   /* This will come back in TR response */
+               CSL_FMK(UDMAP_TR_FLAGS_SA_INDIRECT, 0U)                                         |
+               CSL_FMK(UDMAP_TR_FLAGS_DA_INDIRECT, 0U)                                         |
+               CSL_FMK(UDMAP_TR_FLAGS_EOP, 1U);
+
+    tr->addr        = (uintptr_t)transferProp->ioPointers.srcPtr;
+    tr->icnt0        = transferProp->transferDim.sicnt0;
+    tr->icnt1        = transferProp->transferDim.sicnt1;
+    tr->icnt2        = transferProp->transferDim.sicnt2;
+    tr->icnt3        = transferProp->transferDim.sicnt3;
+    tr->dim1        = transferProp->transferDim.sdim1;
+    tr->dim2        = transferProp->transferDim.sdim2;
+    tr->dim3        = transferProp->transferDim.sdim3;
+    tr->fmtflags    = fmtflags;
+    tr->daddr       = (uintptr_t) transferProp->ioPointers.dstPtr;
+    tr->dicnt0       = transferProp->transferDim.dicnt0;
+    tr->dicnt1       = transferProp->transferDim.dicnt1;
+    tr->dicnt2       = transferProp->transferDim.dicnt2;
+    tr->dicnt3       = transferProp->transferDim.dicnt3;
+    tr->ddim1      =  transferProp->transferDim.ddim1;
+    tr->ddim2      =  transferProp->transferDim.ddim2;
+    tr->ddim3      =  transferProp->transferDim.ddim3;
+}
+
+static void DmaUtilsAutoInc3d_printf(void * autoIncrementContext, int traceLevel, const char *format, ...);
+static void DmaUtilsAutoInc3d_printf(void * autoIncrementContext, int traceLevel, const char *format, ...)
+{
+  DmaUtilsAutoInc3d_Context * dmautilsContext = (DmaUtilsAutoInc3d_Context *)autoIncrementContext;
+  va_list args;
+
+  if ( dmautilsContext->initParams.DmaUtilsVprintf != NULL )
+  {
+      if ( traceLevel < dmautilsContext->initParams.traceLogLevel)
+      {
+          va_start(args, format);
+          dmautilsContext->initParams.DmaUtilsVprintf(format, args);
+          va_end(args);
+      }
+  }
+}
+
+static void  DmaUtilsAutoInc3d_initializeContext(void * autoIncrementContext);
+static void  DmaUtilsAutoInc3d_initializeContext(void * autoIncrementContext)
+{
+    DmaUtilsAutoInc3d_Context * autoIncHandle = (DmaUtilsAutoInc3d_Context *)autoIncrementContext;
+
+    memset(autoIncHandle, 0, sizeof(DmaUtilsAutoInc3d_Context));
+
+//:TODO: This needs to be done at appropriate place
+#ifdef HOST_EMULATION
+
+#endif
+    return ;
+}
+
+
+int32_t DmaUtilsAutoInc3d_getContextSize(int32_t numChannels)
+{
+    int32_t contextSize = 0;
+
+    contextSize += DMAUTILS_ALIGN_CEIL(sizeof(DmaUtilsAutoInc3d_ChannelContext), 128) * numChannels;
+
+    contextSize += DMAUTILS_ALIGN_CEIL(sizeof(DmaUtilsAutoInc3d_Context), 128);
+
+    return contextSize;
+}
+
+static int32_t DmaUtilsAutoInc3d_setupContext(void * autoIncrementContext, DmaUtilsAutoInc3d_InitParam * initParams);
+static int32_t DmaUtilsAutoInc3d_setupContext(void * autoIncrementContext, DmaUtilsAutoInc3d_InitParam * initParams)
+{
+    int32_t     retVal = UDMA_SOK;
+    int32_t memLocation = 0;
+    uint8_t * memPointer;
+    int32_t i;
+    DmaUtilsAutoInc3d_Context * dmaUtilsContext;
+
+    memPointer  = (uint8_t *)autoIncrementContext;
+    dmaUtilsContext = (DmaUtilsAutoInc3d_Context *)memPointer;
+    memLocation += DMAUTILS_ALIGN_CEIL(sizeof(DmaUtilsAutoInc3d_Context), 128);
+
+    dmaUtilsContext->initParams = *initParams;
+
+    for ( i = 0; i < initParams->numChannels; i++)
+    {
+      dmaUtilsContext->channelContext[i] = (DmaUtilsAutoInc3d_ChannelContext *) (memPointer + memLocation);
+      memLocation += DMAUTILS_ALIGN_CEIL(sizeof (DmaUtilsAutoInc3d_ChannelContext), 128);
+    }
+
+    if ( memLocation > initParams->contextSize)
+    {
+        DmaUtilsAutoInc3d_printf(autoIncrementContext, 0, " DmaUtilsAutoInc3d_setupContext : Failed \n");
+        retVal = UDMA_EINVALID_PARAMS;
+    }
+
+    return retVal;
+}
+
+int32_t DmaUtilsAutoInc3d_init(void * autoIncrementContext , DmaUtilsAutoInc3d_InitParam * initParams, DmaUtilsAutoInc3d_ChannelInitParam chInitParams[])
+{
+  uint32_t size;
+  int32_t     retVal = UDMA_SOK;
+  int32_t i;
+  uint32_t                chType;
+  uint32_t                eventId;
+  Udma_ChPrms       chPrms;
+  Udma_ChUtcPrms  utcPrms;
+  DmaUtilsAutoInc3d_Context              * dmautilsContext;
+  DmaUtilsAutoInc3d_ChannelContext * channelContext;
+  Udma_ChHandle channelHandle;
+
+  if ( initParams == NULL)
+  {
+    retVal = UDMA_EBADARGS;
+    goto Exit;
+  }
+
+  if ( autoIncrementContext == NULL)
+  {
+    retVal = UDMA_EBADARGS;
+    goto Exit;
+  }
+
+  size = DmaUtilsAutoInc3d_getContextSize(initParams->numChannels);
+
+  if ( size != initParams->contextSize )
+  {
+    retVal = UDMA_EINVALID_PARAMS;
+    goto Exit;
+  }
+  /* Reset internal variables of autoincrement context */
+  DmaUtilsAutoInc3d_initializeContext(autoIncrementContext);
+
+  dmautilsContext = (DmaUtilsAutoInc3d_Context *)autoIncrementContext;
+
+  retVal = DmaUtilsAutoInc3d_setupContext(autoIncrementContext, initParams);
+  if   (UDMA_SOK != retVal)
+  {
+    goto Exit;
+  }
+
+  /* Initialize the channel params to default */
+   chType = UDMA_CH_TYPE_UTC;
+   UdmaChPrms_init(&chPrms, chType);
+   chPrms.utcId = UDMA_UTC_ID_MSMC_DRU0;
+
+  UdmaChUtcPrms_init(&utcPrms);
+
+  for ( i = 0; i < initParams->numChannels; i++)
+  {
+      channelContext = dmautilsContext->channelContext[i];
+
+      if ( chInitParams[i].druOwner == DMAUTILSAUTOINC3D_DRUOWNER_DIRECT_TR )
+      {
+          chPrms.fqRingPrms.ringMem      = NULL;
+          chPrms.cqRingPrms.ringMem     = NULL;
+          chPrms.tdCqRingPrms.ringMem = NULL;
+          chPrms.fqRingPrms.elemCnt     = 0U;
+          chPrms.cqRingPrms.elemCnt     = 0U;
+          chPrms.tdCqRingPrms.elemCnt  = 0U;
+
+          utcPrms.druOwner = CSL_DRU_OWNER_DIRECT_TR;
+      }
+      else
+      {
+          chPrms.fqRingPrms.ringMem     = &channelContext->ringMem;
+          chPrms.cqRingPrms.ringMem    = &channelContext->responseRingMem;
+          chPrms.tdCqRingPrms.ringMem = NULL;
+          chPrms.fqRingPrms.ringMemSize = sizeof(uint64_t);
+          chPrms.cqRingPrms.ringMemSize = sizeof(uint64_t);
+          chPrms.tdCqRingPrms.ringMemSize = 0;
+          chPrms.fqRingPrms.elemCnt      = 1U;/* We have only one element per ring */
+          chPrms.cqRingPrms.elemCnt     = 1U;/* We have only one element per ring */
+          chPrms.tdCqRingPrms.elemCnt  = 0U;/* We have only one element per ring */
+
+          utcPrms.druOwner = CSL_DRU_OWNER_UDMAC_TR;
+      }
+
+      channelHandle = &(channelContext->chHandle);
+
+      retVal = Udma_chOpen(initParams->udmaDrvHandle, channelHandle, chType, &chPrms);
+      if(UDMA_SOK != retVal)
+      {
+          DmaUtilsAutoInc3d_printf(autoIncrementContext, 0, "Udma_chOpen : Failed \n");
+         goto Exit;
+      }
+
+      /* Config UTC channel */
+      utcPrms.druQueueId  =chInitParams[i].dmaQueNo;
+
+      retVal = Udma_chConfigUtc(channelHandle, &utcPrms);
+      if(UDMA_SOK != retVal)
+      {
+          DmaUtilsAutoInc3d_printf(autoIncrementContext, 0, "Udma_chConfigUtc : Failed \n");
+          goto Exit;
+      }
+
+      /* Enable The channel */
+      retVal = Udma_chEnable(channelHandle);
+      if(UDMA_SOK != retVal)
+      {
+          DmaUtilsAutoInc3d_printf(autoIncrementContext, 0, "Udma_chEnable : Failed \n");
+          goto Exit;
+      }
+
+      eventId = Udma_chGetNum(channelHandle);
+
+      channelContext->swTriggerPointer = Udma_druGetTriggerRegAddr(channelHandle);
+      //:TODO: Currently it is assumed that DRU local events are routed to 32 event of c7x. This needs to be done cleanly
+      channelContext->waitWord =  ((uint64_t)1U << (32 + eventId) );
+  }
+
+Exit:
+    return retVal;
+}
+
+int32_t DmaUtilsAutoInc3d_getTrMemReq(int32_t numTRs)
+{
+    int32_t isRingBasedFlowReq = 0;
+    int32_t trMemReq = 0;
+
+    if ( numTRs > DMAUTILS_MAX_NUM_TR_DIRECT_TR_MODE)
+    {
+      isRingBasedFlowReq = 1;
+    }
+
+    if ( isRingBasedFlowReq )
+    {
+         //:TODO: Check how to make sure align required
+         /* This indicates ring accelerator mode and hence will need memory for TR descriptor */
+        trMemReq = sizeof(CSL_UdmapCppi5TRPD) + /* Number of Bytes for TR descriptor */
+                               sizeof(CSL_UdmapTR) + /* Padding required to bring start of TR request to natural alignment for memory fetch efficiency */
+                               numTRs * sizeof(CSL_UdmapTR) + /* Memory for Transfer Records */
+                               numTRs * sizeof(uint32_t);/* Memory for Transfer Response Records */
+    }
+    else
+    {
+      trMemReq = numTRs * sizeof(CSL_UdmapTR);
+    }
+
+    return trMemReq;
+}
+
+
+int32_t DmaUtilsAutoInc3d_prepareTr(DmaUtilsAutoInc3d_TrPrepareParam * trPrepParam ,  DmaUtilsAutoInc3d_TransferProp transferProp[])
+{
+    int32_t size;
+    int32_t     retVal = UDMA_SOK;
+    int32_t isRingBasedFlowReq = 0;
+    CSL_UdmapTR * pTrArray;
+    int32_t i;
+
+    if ( trPrepParam == NULL )
+    {
+      retVal = UDMA_EBADARGS;
+      goto Exit;
+    }
+
+    size = DmaUtilsAutoInc3d_getTrMemReq(trPrepParam->numTRs);
+
+    if ( trPrepParam->trMemSize < size )
+    {
+      retVal = UDMA_EINVALID_PARAMS;
+      goto Exit;
+    }
+
+    if ( trPrepParam->trMem == NULL )
+    {
+      retVal = UDMA_EBADARGS;
+      goto Exit;
+    }
+
+    if ( trPrepParam->numTRs > DMAUTILS_MAX_NUM_TR_DIRECT_TR_MODE)
+    {
+        isRingBasedFlowReq = 1;
+    }
+
+    pTrArray = (CSL_UdmapTR *)trPrepParam->trMem;
+
+    if ( isRingBasedFlowReq == 1 )
+    {
+      /* This needs to be updated with correct value during configure */
+      uint32_t cqRingNum = 0;
+      /* Setup TR descriptor */
+
+      CSL_UdmapCppi5TRPD * pTrpd = (CSL_UdmapCppi5TRPD *)trPrepParam->trMem;
+      CSL_UdmapTR           *pTr = (CSL_UdmapTR *)(trPrepParam->trMem + sizeof(CSL_UdmapTR));
+
+      UdmaUtils_makeTrpd(pTrpd, UDMA_TR_TYPE_9, trPrepParam->numTRs, cqRingNum);
+      pTrArray = pTr;
+
+    }
+
+    for ( i = 0; i < trPrepParam->numTRs ; i++)
+    {
+          DmaUtilsAutoInc3d_setupTr(&pTrArray[i], &transferProp[i]);
+    }
+
+
+Exit:
+
+    return retVal;
+
+}
+
+
+int32_t DmaUtilsAutoInc3d_configure(void * autoIncrementContext, int32_t channelId, uint8_t * trMem, int32_t numTr)
+{
+    int32_t     retVal = UDMA_SOK;
+    DmaUtilsAutoInc3d_Context              * dmautilsContext;
+    DmaUtilsAutoInc3d_ChannelContext * channelContext;
+    uint32_t isRingBasedFlowReq =0;
+    Udma_ChHandle channelHandle;
+
+    uint32_t i;
+
+#ifdef HOST_EMULATION
+    uint32_t druChannelNum;
+#endif
+    if ( autoIncrementContext == NULL)
+    {
+      retVal = UDMA_EBADARGS;
+      DmaUtilsAutoInc3d_printf(autoIncrementContext, 0, "DmaUtilsAutoInc3d_configure : Failed :autoIncrementContext == NULL \n");
+      goto Exit;
+    }
+
+    if ( trMem == NULL )
+    {
+      retVal = UDMA_EBADARGS;
+      DmaUtilsAutoInc3d_printf(autoIncrementContext, 0, "DmaUtilsAutoInc3d_configure : Failed : trMem == NULL \n");
+      goto Exit;
+    }
+
+    dmautilsContext = (DmaUtilsAutoInc3d_Context *)autoIncrementContext;
+
+    channelContext = dmautilsContext->channelContext[channelId];
+    channelHandle = &channelContext->chHandle;
+
+    if ( numTr > DMAUTILS_MAX_NUM_TR_DIRECT_TR_MODE)
+    {
+        isRingBasedFlowReq = 1U;
+    }
+
+    if ( isRingBasedFlowReq  == 0U)
+    {
+
+        CSL_UdmapTR * tr;
+
+        tr = ( CSL_UdmapTR *)trMem;
+
+        /* Submit the TR using atomic write */
+        //:TODO: currently host emulation doesn't handle multiple TR in direct TR mode
+        for ( i = 0; i < numTr; i++)
+        {
+#ifndef HOST_EMULATION
+              Udma_chDruSubmitTr(channelHandle, tr + i);
+#else
+              druChannelNum = Udma_chGetNum(channelHandle);
+              hostEmulation_druChSubmitAtomicTr(dmautilsContext->initParams.udmaDrvHandle->utcInfo[UDMA_UTC_ID_MSMC_DRU0].druRegs,
+                                                                                druChannelNum , (void *)tr);
+#endif
+        }
+    }
+    else
+    {
+      uint32_t cqRingNum = Udma_chGetCqRingNum(channelHandle);
+
+      CSL_UdmapCppi5TRPD * pTrpd = (CSL_UdmapCppi5TRPD *)trMem;
+
+      /* Update the cq ring number as it was not set correctly during descriptor preperation */
+      CSL_udmapCppi5SetReturnPolicy(
+              pTrpd,
+              CSL_UDMAP_CPPI5_PD_DESCINFO_DTYPE_VAL_TR,
+              CSL_UDMAP_CPPI5_PD_PKTINFO2_RETPOLICY_VAL_ENTIRE_PKT,
+              CSL_UDMAP_CPPI5_PD_PKTINFO2_EARLYRET_VAL_NO,
+              CSL_UDMAP_CPPI5_PD_PKTINFO2_RETPUSHPOLICY_VAL_TO_TAIL,
+              cqRingNum);
+
+      Udma_ringQueueRaw(Udma_chGetFqRingHandle(channelHandle),
+              (uint64_t)trMem);
+
+#ifdef HOST_EMULATION
+      CSL_UdmapTR           *pTr = (CSL_UdmapTR *)(trMem + sizeof(CSL_UdmapTR));
+
+      druChannelNum = (channelHandle->extChNum - channelHandle->utcInfo->startCh);
+      hostEmulation_druChSubmitAtomicTr(dmautilsContext->initParams.udmaDrvHandle->utcInfo[UDMA_UTC_ID_MSMC_DRU0].druRegs,
+                                                                        druChannelNum,
+                                                                        (void *)pTr);
+
+      /* Use this field to track the TR, For the target build this would be handled by hardware */
+      /* In real hardware this will not be like this it is done just for host emulation*/
+      dmautilsContext->initParams.udmaDrvHandle->utcInfo[UDMA_UTC_ID_MSMC_DRU0].druRegs->CHATOMIC[druChannelNum].DEBUG[1].NEXT_TR_WORD0_1 = 1;
+
+#endif
+    }
+
+    dmautilsContext->blkIdx[channelId] = DmaUtilsAutoInc3d_getTotalBlockCount(trMem, numTr);
+Exit :
+
+    return retVal;
+
+}
+
+
+int32_t DmaUtilsAutoInc3d_trigger(void * autoIncrementContext, int32_t channelId)
+{
+    DmaUtilsAutoInc3d_Context              * dmautilsContext;
+
+    dmautilsContext = (DmaUtilsAutoInc3d_Context *)autoIncrementContext;
+
+    CSL_druChSetGlobalTrigger0Raw(dmautilsContext->channelContext[channelId]->swTriggerPointer);//:TODO: This should be replaced by something else as we are not suppose to directly use these registers
+#ifdef HOST_EMULATION
+    hostEmulation_updateTriggerCount(dmautilsContext->initParams.udmaDrvHandle,
+                                                     dmautilsContext->channelContext[channelId]->swTriggerPointer);
+#endif
+
+    dmautilsContext->blkIdx[channelId]--;
+
+    return dmautilsContext->blkIdx[channelId];
+}
+
+
+
+void  DmaUtilsAutoInc3d_wait(void * autoIncrementContext, int32_t channelId)
+{
+    DmaUtilsAutoInc3d_Context              * dmautilsContext;
+
+    dmautilsContext = (DmaUtilsAutoInc3d_Context *)autoIncrementContext;
+
+#ifndef HOST_EMULATION
+    volatile uint64_t eflRegisterVal;
+    uint64_t waitWord;
+
+    waitWord = dmautilsContext->channelContext[channelId]->waitWord;
+    eflRegisterVal = __get_indexed(__EFR,0);
+    while((eflRegisterVal & waitWord ) != waitWord )
+    {
+      eflRegisterVal = __get_indexed(__EFR,0);
+    }
+    __set_indexed(__EFCLR,0, waitWord);
+#else
+    /* Do the actual Transfer for host emulation*/
+    hostEmulation_triggerDMA(dmautilsContext->initParams.udmaDrvHandle);
+#endif
+
+    return;
+}
+
+
+int32_t DmaUtilsAutoInc3d_deconfigure(void * autoIncrementContext, int32_t channelId, uint8_t * trMem, int32_t numTr)
+{
+    int32_t     retVal = UDMA_SOK;
+    DmaUtilsAutoInc3d_Context              * dmautilsContext;
+    DmaUtilsAutoInc3d_ChannelContext * channelContext;
+    uint32_t isRingBasedFlowReq =0;
+    Udma_ChHandle channelHandle;
+#ifdef HOST_EMULATION
+    uint32_t druChannelNum;
+#endif
+    if ( autoIncrementContext == NULL)
+    {
+      retVal = UDMA_EBADARGS;
+      DmaUtilsAutoInc3d_printf(autoIncrementContext, 0, "DmaUtilsAutoInc3d_configure : Failed :autoIncrementContext == NULL \n");
+      goto Exit;
+    }
+
+    if ( trMem == NULL )
+    {
+      retVal = UDMA_EBADARGS;
+      DmaUtilsAutoInc3d_printf(autoIncrementContext, 0, "DmaUtilsAutoInc3d_configure : Failed : trMem == NULL \n");
+      goto Exit;
+    }
+
+    dmautilsContext = ( DmaUtilsAutoInc3d_Context *)autoIncrementContext;
+
+    channelContext = dmautilsContext->channelContext[channelId];
+    channelHandle = &channelContext->chHandle;
+
+
+    /* disable  The channel */
+    if ( numTr > DMAUTILS_MAX_NUM_TR_DIRECT_TR_MODE)
+    {
+        isRingBasedFlowReq = 1U;
+    }
+
+    if ( isRingBasedFlowReq  == 1 )
+    {
+       uint64_t    pDesc = 0;
+      retVal = Udma_ringDequeueRaw(Udma_chGetCqRingHandle(channelHandle), &pDesc);
+      if(UDMA_SOK != retVal)
+      {
+          DmaUtilsAutoInc3d_printf(autoIncrementContext, 0, "DmaUtilsAutoInc3d_deconfigure : Failed : Udma_ringDequeueRaw\n");
+          retVal = UDMA_EFAIL;
+          goto Exit;
+      }
+    }
+
+Exit:
+    return retVal;
+
+}
+
+
+int32_t DmaUtilsAutoInc3d_deinit(void * autoIncrementContext)
+{
+    int32_t     retVal = UDMA_SOK;
+    DmaUtilsAutoInc3d_Context              * dmautilsContext;
+    DmaUtilsAutoInc3d_ChannelContext * channelContext;
+    Udma_ChHandle channelHandle;
+    int32_t i;
+    if ( autoIncrementContext == NULL)
+    {
+        retVal = UDMA_EBADARGS;
+        DmaUtilsAutoInc3d_printf(autoIncrementContext, 0, "DmaUtilsAutoInc3d_configure : Failed :autoIncrementContext == NULL \n");
+        goto Exit;
+    }
+
+    dmautilsContext = ( DmaUtilsAutoInc3d_Context *)autoIncrementContext;
+    for ( i = 0; i < dmautilsContext->initParams.numChannels; i++)
+     {
+         channelContext = dmautilsContext->channelContext[i];
+         channelHandle = &(channelContext->chHandle);
+
+#if !HOST_EMULATION
+         /* Avoid calling chDisable API for host emulation as it depends on some of the hardware sequence
+         which are not emulated in host emulation */
+         retVal = Udma_chDisable(channelHandle, UDMA_DEFAULT_CH_DISABLE_TIMEOUT);
+#endif
+         if(UDMA_SOK != retVal)
+         {
+             DmaUtilsAutoInc3d_printf(autoIncrementContext, 0, "DmaUtilsAutoInc3d_deconfigure : Failed : Udma_chDisable\n");
+             retVal = UDMA_EFAIL;
+             goto Exit;
+         }
+
+         retVal = Udma_chClose(channelHandle);
+         if(UDMA_SOK != retVal)
+         {
+             DmaUtilsAutoInc3d_printf(autoIncrementContext, 0, "DmaUtilsAutoInc3d_deinit : Udma_chClose : Failed \n");
+            goto Exit;
+         }
+    }
+Exit:
+
+    return retVal;
+
+}
+
diff --git a/packages/ti/drv/udma/dmautils/src/dmautils_autoincrement_3d_priv.h b/packages/ti/drv/udma/dmautils/src/dmautils_autoincrement_3d_priv.h
new file mode 100644 (file)
index 0000000..8936838
--- /dev/null
@@ -0,0 +1,84 @@
+/*
+ *  Copyright (c) Texas Instruments Incorporated 2018
+ *
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions
+ *  are met:
+ *
+ *    Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *
+ *    Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the
+ *    distribution.
+ *
+ *    Neither the name of Texas Instruments Incorporated nor the names of
+ *    its contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ *  \file dmautils_autoincrement_3d_priv.h
+ *
+ *  \brief This header is an internal header for decleration autoincrement 3D internal
+*             context
+ */
+
+#ifndef DMAUTILS_AUTOINCREMENT_3D_PRIV_H_
+#define DMAUTILS_AUTOINCREMENT_3D_PRIV_H_
+
+#include "stdint.h"
+
+#include "ti/drv/udma/dmautils/include/dmautils_autoincrement_3d.h"
+#include "ti/drv/udma/udma.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+typedef struct
+{
+  uint64_t                                 ringMem;
+  uint64_t                                 reserved[15];
+  uint64_t                                 responseRingMem;
+  uint64_t                                 tdRingMem;
+  volatile uint64_t                    *swTriggerPointer;
+  uint64_t                                 waitWord;
+  struct Udma_ChObj               chHandle;
+  struct Udma_EventObj           eventHandle;
+} DmaUtilsAutoInc3d_ChannelContext;
+
+
+typedef struct
+{
+  uint16_t blkIdx[UDMA_RM_MAX_BLK_COPY_CH];
+  DmaUtilsAutoInc3d_ChannelContext *channelContext[UDMA_RM_MAX_BLK_COPY_CH];
+  DmaUtilsAutoInc3d_InitParam initParams;
+} DmaUtilsAutoInc3d_Context;
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /*DMAUTILS_AUTOINCREMENT_3D_PRIV_H_*/
+/*!
+*! Revision History
+*! ================
+*! Jan-2018   Anshu: Initial Draft
+*/
+
diff --git a/packages/ti/drv/udma/dmautils/test/dmautils_autoinc_1d2d3d_test/c7x_vcop_lnk.cmd b/packages/ti/drv/udma/dmautils/test/dmautils_autoinc_1d2d3d_test/c7x_vcop_lnk.cmd
new file mode 100644 (file)
index 0000000..e810e58
--- /dev/null
@@ -0,0 +1,59 @@
+/****************************************************************************/
+/*  lnk.cmd   v#.##                                                         */
+/*  Copyright (c) 2014-%%%%  Texas Instruments Incorporated                 */
+/*                                                                          */
+/*  Usage: cl7x  <src files...> -z -o <out file> -m <map file> lnk.cmd      */
+/*                                                                          */
+/*    Description: THIS FILE IS A SAMPLE linker command file that can be    */
+/*                 used for linking programs built with the C compiler and  */
+/*                 running the resulting .out file on a C7100 simulator.    */
+/*                 Use it as a guideline.  You will want to change the      */
+/*                 memory layout to match your specific C7xxx target        */
+/*                 system.  You may want to change the allocation scheme    */
+/*                 according to the size of your program.                   */
+/*                                                                          */
+/*    Notes: (1)   You must specify a directory in which your library is    */
+/*                 located.  either add a -i"<directory>" line to this      */
+/*                 file or use the system environment variable C_DIR to     */
+/*                 specify a search path for the libraries.                 */
+/*                                                                          */
+/*           (2)   You may need to specify your library name with           */
+/*                 -llibrary.lib if the correct library is not found        */
+/*                 automatically.                                           */
+/*                                                                          */
+/****************************************************************************/
+-c
+-heap  0x2000
+-stack 0x2000
+--args 0x1000
+--diag_suppress=10068 // "no matching section"
+//--cinit_compression=off
+
+MEMORY
+{
+  L2SRAM   (RWX): org = 0x64800000, len = 0x080000
+  MSMCSRAM (RWX): org = 0x70000000, len = 0x800000
+  L1D           : org = 0x64E00000, len = 0x4000
+}
+
+
+SECTIONS
+{
+    .text       >       MSMCSRAM
+
+    .bss        >       MSMCSRAM  /* Zero-initialized data */
+    .data       >       MSMCSRAM  /* Initialized data */
+
+    .cinit      >       MSMCSRAM  /* could be part of const */
+    .init_array >       MSMCSRAM  /* C++ initializations */
+    .stack      >       MSMCSRAM
+    .args       >       MSMCSRAM
+    .cio        >       MSMCSRAM
+    .const      >       MSMCSRAM
+    .switch     >       MSMCSRAM /* For exception handling. */
+                             /* Not a default ELF section -- remove?  */
+                             /* could be part of const */
+    .sysmem     >       MSMCSRAM /* heap */
+       .L2SramSect >       L2SRAM /* TODO */
+       .MSMCSramSect >     MSMCSRAM
+}
diff --git a/packages/ti/drv/udma/dmautils/test/dmautils_autoinc_1d2d3d_test/dmautils_autoinc_1d2d3d_example.c b/packages/ti/drv/udma/dmautils/test/dmautils_autoinc_1d2d3d_test/dmautils_autoinc_1d2d3d_example.c
new file mode 100644 (file)
index 0000000..b649490
--- /dev/null
@@ -0,0 +1,298 @@
+/*
+ *  Copyright (c) Texas Instruments Incorporated 2018
+ *
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions
+ *  are met:
+ *
+ *    Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *
+ *    Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the
+ *    distribution.
+ *
+ *    Neither the name of Texas Instruments Incorporated nor the names of
+ *    its contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+/*============================================================================*/
+/*============================================================================*/
+
+/**
+----------------------------------------------------------------------------
+@file    dma_example.c
+@brief   Demostrates a simple example of auto increment DMA to allow DSP to
+operate a function on internal memory and transfer back the result.
+@version 0.0 (Jan 2017) : First version
+----------------------------------------------------------------------------
+*/
+
+#include <stdio.h>
+#include <stdint.h>
+
+#include "dmautils_autoinc_1d2d3d_example.h"
+
+#include "ti/drv/udma/dmautils/dmautils.h"
+#include "ti/drv/udma/udma.h"
+
+
+int32_t blockCopyKernel(
+  uint8_t *inputData,
+  uint8_t  *outputData,
+  uint16_t width,
+  uint16_t height,
+  uint16_t inPitch,
+  uint16_t outPitch)
+{
+  int32_t i, j;
+
+  for(j = 0; j < height; j++)
+  {
+    for(i = 0; i < width; i++)
+    {
+      outputData[i + (j * outPitch)] =
+           inputData[i + (j * inPitch)] ;
+    }
+  }
+
+  return 0;
+}
+
+static void testDmaAutoIncPrintf(const char *str)
+{
+#ifdef ENABLE_PRINT
+  print(str);
+#endif
+}
+
+#define TEST_DMAUTILS_ALIGN_CEIL(VAL, ALIGN) ((((VAL) + (ALIGN) - 1)/(ALIGN)) * (ALIGN) )
+
+
+typedef enum{
+  DMAUTILSTESTAUTOINC_CHANNEL_IN,
+  DMAUTILSTESTAUTOINC_CHANNEL_OUT,
+  DMAUTILSTESTAUTOINC_CHANNEL_MAX
+}dmautilsTestAutoInc_Channel;
+
+#define TEST_ALIGN_SIZE (128U)
+
+
+static void testDmaAutoIncSetupXferProp
+(
+  int16_t   width,
+  int16_t   height,
+  int16_t   blockWidth,
+  int16_t   blockHeight,
+  int16_t   inPitch,
+  int16_t   outPitch,
+  DmaUtilsAutoInc3d_TransferDim *transferDimIn
+)
+{
+  transferDimIn->sicnt0 = blockWidth;
+  transferDimIn->sicnt1 = blockHeight;
+  transferDimIn->sicnt2 = width/blockWidth;
+  transferDimIn->sicnt3 = height/blockHeight;
+  transferDimIn->sdim1 = inPitch;
+  transferDimIn->sdim2 = blockWidth;
+  transferDimIn->sdim3 = blockHeight * inPitch;
+
+  transferDimIn->dicnt0 = blockWidth;
+  transferDimIn->dicnt1 = blockHeight;
+  transferDimIn->dicnt2 = width/blockWidth;
+  transferDimIn->dicnt3 = height/blockHeight;
+  transferDimIn->ddim1 = outPitch;
+  transferDimIn->ddim2 = blockWidth;
+  transferDimIn->ddim3 =  outPitch * blockHeight;
+
+}
+
+/* This function is main function exposed to user*/
+int32_t blockCopy(
+  uint8_t*   pInput,
+  uint8_t*   pOutput,
+  uint8_t*   pInputBlock,
+  uint8_t*   pOutputBlock,
+  uint16_t   width,
+  uint16_t   height,
+  uint16_t   blockWidth,
+  uint16_t   blockHeight,
+  uint16_t   inPitch,
+  uint16_t   outPitch,
+  uint32_t   transferSize,
+  uint8_t*   pIntMmeBase,
+  uint32_t   intMemSize,
+  uint8_t    useDMA
+  )
+{
+  int32_t retVal = UDMA_SOK ;
+
+  if(useDMA == 0)
+  {
+    //call the kernel directly on data in DDR
+    blockCopyKernel(pInput,
+      pOutput,
+      width,
+      height,
+      inPitch,
+      outPitch);
+  }
+  else
+  {
+    uint32_t intMemUsedSize = 0;
+    uint8_t *dmautilsContext;
+    uint8_t *inTrMem;
+    uint32_t blockIdx = 0;
+    uint32_t inTrSize;
+    uint32_t dmaChannels;
+
+    DmaUtilsAutoInc3d_InitParam initParams;
+    DmaUtilsAutoInc3d_ChannelInitParam chInitParams[DMAUTILSTESTAUTOINC_CHANNEL_MAX];
+    DmaUtilsAutoInc3d_TrPrepareParam trPrepParamIn;
+    DmaUtilsAutoInc3d_TransferProp *transferPropIn;
+
+
+    Udma_InitPrms   initPrms;
+    struct Udma_DrvObj      udmaDrvObj;
+    uint32_t        instId;
+
+    Udma_DrvHandle  drvHandle = &udmaDrvObj;
+
+    instId = UDMA_INST_ID_MAIN_0;
+    UdmaInitPrms_init(instId, &initPrms);
+    initPrms.printFxn = &testDmaAutoIncPrintf;
+    retVal = Udma_init(drvHandle, &initPrms);
+    if(UDMA_SOK != retVal)
+    {
+        testDmaAutoIncPrintf("[Error] UDMA init failed!!\n");
+    }
+
+
+    dmaChannels = 1U; /* One for input and other for output */
+
+    //Allocation/Assignment of buffers in internal memory
+    dmautilsContext     =  pIntMmeBase + intMemUsedSize ;
+    intMemUsedSize += TEST_DMAUTILS_ALIGN_CEIL(DmaUtilsAutoInc3d_getContextSize(dmaChannels), TEST_ALIGN_SIZE);
+
+    transferPropIn = (DmaUtilsAutoInc3d_TransferProp * ) (pIntMmeBase + intMemUsedSize );
+    intMemUsedSize += TEST_DMAUTILS_ALIGN_CEIL((sizeof(DmaUtilsAutoInc3d_TransferProp)), TEST_ALIGN_SIZE);
+
+    initParams.contextSize = DmaUtilsAutoInc3d_getContextSize(dmaChannels);
+    initParams.numChannels = dmaChannels;
+    initParams.traceLogLevel    = 1;
+    initParams.udmaDrvHandle = drvHandle;
+    initParams.DmaUtilsVprintf = vprintf;
+
+    chInitParams[DMAUTILSTESTAUTOINC_CHANNEL_IN].dmaQueNo  = 0;
+    chInitParams[DMAUTILSTESTAUTOINC_CHANNEL_IN].druOwner    = DMAUTILSAUTOINC3D_DRUOWNER_DIRECT_TR;
+
+    retVal = DmaUtilsAutoInc3d_init(dmautilsContext, &initParams, chInitParams);
+    if ( retVal != UDMA_SOK )
+    {
+      goto Exit;
+    }
+    inTrSize = DmaUtilsAutoInc3d_getTrMemReq(1);
+    inTrMem = pIntMmeBase + intMemUsedSize ;
+    intMemUsedSize += TEST_DMAUTILS_ALIGN_CEIL(inTrSize, TEST_ALIGN_SIZE);
+
+    if(intMemUsedSize > intMemSize)
+    {
+      printf("insufficient memory, required is %d vs provided %d\n",intMemUsedSize, intMemSize);
+      return -1 ;
+    }
+
+    testDmaAutoIncSetupXferProp(width,
+                                                       height,
+                                                       blockWidth,
+                                                       blockHeight,
+                                                       inPitch,
+                                                       outPitch,
+                                                       &transferPropIn->transferDim);
+
+    trPrepParamIn.channelId = DMAUTILSTESTAUTOINC_CHANNEL_IN;
+    trPrepParamIn.numTRs  = 1;
+    trPrepParamIn.trMem     = inTrMem;
+    trPrepParamIn.trMemSize = inTrSize;
+
+    transferPropIn->circProp.circDir = DMAUTILSAUTOINC3D_CIRCDIR_SRC;
+    transferPropIn->circProp.circSize1 = 0;
+    transferPropIn->circProp.circSize2 = 0;
+    transferPropIn->circProp.addrModeIcnt0 = DMAUTILSAUTOINC3D_ADDR_LINEAR;
+    transferPropIn->circProp.addrModeIcnt0 = DMAUTILSAUTOINC3D_ADDR_LINEAR;
+    transferPropIn->circProp.addrModeIcnt0 = DMAUTILSAUTOINC3D_ADDR_LINEAR;
+    transferPropIn->circProp.addrModeIcnt0 = DMAUTILSAUTOINC3D_ADDR_LINEAR;
+
+    transferPropIn->syncType = transferSize;
+    transferPropIn->ioPointers.srcPtr = pInput;
+    transferPropIn->ioPointers.dstPtr = pOutput;
+
+    retVal = DmaUtilsAutoInc3d_prepareTr(&trPrepParamIn, &transferPropIn[0]);
+
+    if ( retVal != UDMA_SOK )
+    {
+      goto Exit;
+    }
+
+
+    retVal = DmaUtilsAutoInc3d_configure(dmautilsContext, DMAUTILSTESTAUTOINC_CHANNEL_IN, inTrMem, 1);
+
+    if ( retVal != UDMA_SOK )
+    {
+      goto Exit;
+    }
+
+    while ( 1 )
+    {
+      //DMA trigger for pipe-up, out transfer is dummy and handled inside DMA utility
+      blockIdx = DmaUtilsAutoInc3d_trigger(dmautilsContext, DMAUTILSTESTAUTOINC_CHANNEL_IN);
+      //Wait for previous transfer of in
+      DmaUtilsAutoInc3d_wait(dmautilsContext, DMAUTILSTESTAUTOINC_CHANNEL_IN);
+
+      if ( blockIdx == 0 )
+      {
+        break;
+      }
+    }
+
+
+    retVal = DmaUtilsAutoInc3d_deconfigure(dmautilsContext, DMAUTILSTESTAUTOINC_CHANNEL_IN, inTrMem, 1);
+
+     if ( retVal != UDMA_SOK )
+     {
+       goto Exit;
+     }
+
+
+    retVal = DmaUtilsAutoInc3d_deinit(dmautilsContext);
+
+     if ( retVal != UDMA_SOK )
+     {
+       goto Exit;
+     }
+
+    retVal = Udma_deinit(drvHandle);
+    if ( retVal != UDMA_SOK )
+     {
+       goto Exit;
+     }
+  }
+
+
+Exit:
+  return retVal ;
+}
diff --git a/packages/ti/drv/udma/dmautils/test/dmautils_autoinc_1d2d3d_test/dmautils_autoinc_1d2d3d_example.h b/packages/ti/drv/udma/dmautils/test/dmautils_autoinc_1d2d3d_test/dmautils_autoinc_1d2d3d_example.h
new file mode 100644 (file)
index 0000000..f2567b2
--- /dev/null
@@ -0,0 +1,96 @@
+/*
+ *  Copyright (c) Texas Instruments Incorporated 2018
+ *
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions
+ *  are met:
+ *
+ *    Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *
+ *    Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the
+ *    distribution.
+ *
+ *    Neither the name of Texas Instruments Incorporated nor the names of
+ *    its contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*============================================================================*/
+/*============================================================================*/
+
+/**
+----------------------------------------------------------------------------
+@file    edma_utils_autoincrement_example.h
+@brief   Demostrates a simple example of auto increment DMA to allow DSP to
+operate a function on internal memory and transfer back the result.
+@version 0.0 (Jan 2017) : First version
+----------------------------------------------------------------------------
+*/
+
+#ifndef EDMA_UTILS_AUTOINCREMENT_EXAMPLE_H_
+#define EDMA_UTILS_AUTOINCREMENT_EXAMPLE_H_
+
+#include "ti/drv/udma/dmautils/dmautils.h"
+
+typedef enum{
+  TEST_DMAUTILS_TRANSFER_SIZE_1D = DMAUTILSAUTOINC3D_SYNC_1D,
+  TEST_DMAUTILS_TRANSFER_SIZE_2D = DMAUTILSAUTOINC3D_SYNC_2D,
+  TEST_DMAUTILS_TRANSFER_SIZE_3D = DMAUTILSAUTOINC3D_SYNC_3D
+}TestDmaUtilsTransferSize;
+
+
+#if 1
+/*
+ This function accepts an input image in external memory and write back to
+ external memory after performing a horizontal flip of the image.
+ The function can be called to work on direct external memory with cache
+ by setting useDMA = 0
+ The function can also be called to work using DMA, in that case user should
+ provide internal memory buffer pointed by pIntMmeBase and available size
+ by setting intMemSize. In case the internal memory is not sufficient, the
+ function returns -1 and prints the required memory size
+
+ whiel using DMA; this function tarnsfers an entire row of data in internal
+ memory, then performs the flip operation and writes the result in internal
+ memory. The result is then transfered back to external memory using DMA.
+ In order to have DMA and CPU operate in parallel, 2 instances of input and
+ output are created in internal memory
+
+ The prupose of the function is to act as an example for DMA usage so the
+ default core function of fliping the image is in natural C
+
+*/
+int32_t blockCopy(
+  uint8_t*   pInput,
+  uint8_t*   pOutput,
+  uint8_t*   pInputBlock,
+  uint8_t*   pOutputBlock,
+  uint16_t   width,
+  uint16_t   height,
+  uint16_t   blockWidth,
+  uint16_t   blockHeight,
+  uint16_t   inPitch,
+  uint16_t   outPitch,
+  uint32_t     transferSize,
+  uint8_t*   pIntMmeBase,
+  uint32_t   intMemSize,
+  uint8_t    useDMA
+  );
+#endif
+
+#endif /*EDMA_UTILS_AUTOINCREMENT_EXAMPLE_H_*/
diff --git a/packages/ti/drv/udma/dmautils/test/dmautils_autoinc_1d2d3d_test/dmautils_autoinc_1d2d3d_test.c b/packages/ti/drv/udma/dmautils/test/dmautils_autoinc_1d2d3d_test/dmautils_autoinc_1d2d3d_test.c
new file mode 100644 (file)
index 0000000..ff6e213
--- /dev/null
@@ -0,0 +1,318 @@
+/*
+ *  Copyright (c) Texas Instruments Incorporated 2018
+ *
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions
+ *  are met:
+ *
+ *    Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *
+ *    Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the
+ *    distribution.
+ *
+ *    Neither the name of Texas Instruments Incorporated nor the names of
+ *    its contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*============================================================================*/
+/*============================================================================*/
+
+/**
+ *  \file dmautils_autoinc_1d2d3d_test.c
+ *
+ *  \brief Simple application demonstrating 1D, 2D, 3D auto increment feature of dmautils
+ *
+ *  Requirement: DOX_REQ_TAG(PDK-2642:PDK-2643:PDK-2644:PDK-2646)
+ */
+
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <stdint.h>
+#include <string.h>
+#if defined(HOST_EMULATION)
+#include <malloc.h>
+#endif
+
+#include "dmautils_autoinc_1d2d3d_example.h"
+#include "ti/drv/sciclient/sciclient.h"
+
+#define TEST_malloc(heap, size)   malloc(size)
+#define TEST_free(ptr)            free(ptr)
+
+#define L2SRAM_SIZE (64*1024)
+
+#ifdef _MSC_VER
+#ifndef __attribute__
+#define __attribute__()
+#endif
+#endif
+uint8_t L2SRAM[L2SRAM_SIZE] __attribute__((aligned(128)));
+
+
+typedef struct
+{
+  uint32_t testcaseId;
+  uint32_t requirementId;
+  uint32_t imageWidth;
+  uint32_t imageHeight;
+  uint32_t blockWidth;
+  uint32_t blockHeight;
+  uint32_t transferSize;
+}dmautilsAutoIncTest_config;
+
+
+dmautilsAutoIncTest_config gTestConfig[] =
+{
+    {
+        0,
+        1,
+        40,/*Image Width */
+        16,/*Image Height */
+        8,/*Image blockWidth */
+        8,/*Image blockHeight */
+        TEST_DMAUTILS_TRANSFER_SIZE_1D
+    },
+    {
+        1,
+        1,
+        40,/*Image Width */
+        16,/*Image Height */
+        8,/*Image blockWidth */
+        8,/*Image blockHeight */
+        TEST_DMAUTILS_TRANSFER_SIZE_2D
+    },
+    {
+        2,
+        1,
+        40,/*Image Width */
+        16,/*Image Height */
+        8,/*Image blockWidth */
+        8,/*Image blockHeight */
+        TEST_DMAUTILS_TRANSFER_SIZE_3D
+    },
+};
+
+int32_t test_sciclientDmscGetVersion(char *version_str, uint32_t version_str_size)
+{
+    int32_t retVal = 0;
+
+    const Sciclient_ReqPrm_t      reqPrm =
+    {
+        TISCI_MSG_VERSION,
+        TISCI_MSG_FLAG_AOP,
+        NULL,
+        0,
+        SCICLIENT_SERVICE_WAIT_FOREVER
+    };
+    struct tisci_msg_version_resp response;
+    Sciclient_RespPrm_t           respPrm =
+    {
+        0,
+        (uint8_t *) &response,
+        sizeof (response)
+    };
+
+    retVal = Sciclient_service(&reqPrm, &respPrm);
+    if (0 == retVal)
+    {
+        if (respPrm.flags == TISCI_MSG_FLAG_ACK)
+        {
+            if(version_str == NULL)
+            {
+                printf("SCICLIENT: DMSC FW version [%s]\n", (char *) response.str);
+                printf("SCICLIENT: DMSC FW revision 0x%x  \n", response.version);
+                printf("SCICLIENT: DMSC FW ABI revision %d.%d\n",
+                    response.abi_major, response.abi_minor);
+            }
+            else
+            {
+                snprintf(version_str, version_str_size, "version %s, revision 0x%x, ABI %d.%d",
+                    (char *) response.str,
+                    response.version,
+                    response.abi_major, response.abi_minor
+                    );
+            }
+        }
+        else
+        {
+            retVal = -1;
+        }
+    }
+    if(retVal!=0)
+    {
+        printf("SCICLIENT: ERROR: DMSC Firmware Get Version failed !!!\n");
+    }
+
+    return (retVal);
+}
+
+
+int32_t main()
+{
+  uint16_t   width;
+  uint16_t   height;
+  uint16_t   inPitch;
+  uint16_t   outPitch;
+  uint16_t   blockWidth;
+  uint16_t   blockHeight;
+
+  int32_t i, j;
+  uint8_t *input     = NULL;
+  uint8_t  *output    = NULL;
+  uint8_t  *refOut    = NULL;
+
+  uint8_t * pInputBlock;
+  uint8_t * pOutputBlock;
+
+  uint8_t*    pIntMmeBase  = L2SRAM;
+  uint32_t   intMemSize   = L2SRAM_SIZE;
+  uint8_t    useDMA      ;
+  uint8_t status = 1;
+  uint32_t testcaseIdx;
+  uint32_t transferSize;
+
+#ifdef HOST_EMULATION
+#if defined(_MSC_VER)
+    pIntMmeBase = (uint8_t*)_aligned_malloc(L2SRAM_SIZE, L2SRAM_SIZE);
+#else
+    pIntMmeBase = (uint8_t*)memalign(L2SRAM_SIZE, L2SRAM_SIZE);
+#endif
+#else
+    int32_t retVal = 0;
+    Sciclient_ConfigPrms_t  sciClientCfg;
+    Sciclient_configPrmsInit(&sciClientCfg);
+    sciClientCfg.isSecureMode = 1;
+    retVal = Sciclient_init(&sciClientCfg);
+    if(retVal!=0)
+    {
+      printf("Sciclient Init Failed \n");
+      goto Exit;
+    }
+
+    test_sciclientDmscGetVersion(NULL, 0 ); 
+#endif
+
+
+  for (testcaseIdx = 0; testcaseIdx < sizeof(gTestConfig)/ sizeof(dmautilsAutoIncTest_config); testcaseIdx++)
+  {
+      width    = gTestConfig[testcaseIdx].imageWidth;
+      height   = gTestConfig[testcaseIdx].imageHeight;
+printf("wi %d \n", width);
+      printf("height %d \n", height);
+
+      inPitch  = gTestConfig[testcaseIdx].imageWidth;
+      outPitch = gTestConfig[testcaseIdx].imageWidth;
+      blockWidth = gTestConfig[testcaseIdx].blockWidth;
+      blockHeight  = gTestConfig[testcaseIdx].blockHeight;
+      transferSize = gTestConfig[testcaseIdx].transferSize;
+
+      /* Buffer allocations for input, output and reference output  */
+
+      input = (uint8_t *)malloc(width * height);
+      output = (uint8_t *)malloc(width * height);
+      refOut = (uint8_t *)malloc(width * height);
+
+      pInputBlock = (uint8_t *)malloc(blockWidth * blockHeight * 2);
+      pOutputBlock = (uint8_t *)malloc(blockWidth * blockHeight * 2);
+
+      memset(output, 0, width * height);
+      memset(refOut, 0, width * height);
+
+      /* Random pattern generator for input  */
+      for ( j = 0 ; j < height; j++)
+      {
+        for (i = 0; i < width; i++)
+        {
+          input[i + j * inPitch] = i + j* 56;
+        }
+      }
+
+      //DMA based function call
+      useDMA = 1;
+
+#if (!HOST_EMULATION) && (CORE_DSP)
+      tscStart = _TSC_read();
+#endif
+
+      blockCopy(
+        input,
+        output,
+        pInputBlock,
+        pOutputBlock,
+        width,
+        height,
+        blockWidth,
+        blockHeight,
+        inPitch,
+        outPitch,
+        transferSize,
+        pIntMmeBase,
+        intMemSize,
+        useDMA );
+
+#if (!HOST_EMULATION) && (CORE_DSP)
+      tscEnd = _TSC_read();
+      printf("Cycles - Using DMA = %llu\n",(tscEnd-tscStart));
+#endif
+
+      /*Compare output with reference output */
+      for(j = 0; j < height; j++)
+      {
+        for(i = 0; i < width; i++)
+        {
+          if(output[j * outPitch + i] != input[j * outPitch + i])
+          {
+            status = 0;
+            printf("[%d][%d] - output = %d\trefOutput = %d\n",j,i,output[j*outPitch + i], input[j*outPitch + i]);
+            break;
+          }
+          if ( status == 0 )
+          {
+             break;
+          }
+        }
+      }
+      if(status == 1)
+      {
+        printf("DMAUtils TestCase %d,        PASSED \n", gTestConfig[testcaseIdx].testcaseId);
+      }
+      else
+      {
+        printf("\nDMAUtils TestCase %d,        FAILED!!!!!! \n", gTestConfig[testcaseIdx].testcaseId);
+      }
+
+      free(input);
+      free(output);
+      free(refOut);
+      free(pInputBlock);
+      free(pOutputBlock);
+  }
+
+#ifdef HOST_EMULATION
+#if defined(_MSC_VER)
+      _aligned_free(pIntMmeBase);
+#else
+      free(pIntMmeBase);
+#endif
+#endif
+Exit:
+  return 0;
+}
+
diff --git a/packages/ti/drv/udma/dmautils/test/dmautils_autoinc_1d2d3d_test/makefile b/packages/ti/drv/udma/dmautils/test/dmautils_autoinc_1d2d3d_test/makefile
new file mode 100644 (file)
index 0000000..ab6c9e1
--- /dev/null
@@ -0,0 +1,43 @@
+#
+# This file is the makefile for building DMA utils test app.
+#
+include $(PDK_INSTALL_PATH)/ti/build/Rules.make
+
+APP_NAME = dmautils_baremetal_autoinc_1d2d3d_testapp
+
+SRCDIR = .
+INCDIR = .
+
+# List all the external components/interfaces, whose interface header files
+#  need to be included for this component
+INCLUDE_EXTERNAL_INTERFACES = pdk
+
+# List all the components required by the application
+COMP_LIST_COMMON = csl udma dmautils sciclient osal_nonos
+
+# Common source files and CFLAGS across all platforms and cores
+PACKAGE_SRCS_COMMON = .
+SRCS_COMMON = dmautils_autoinc_1d2d3d_example.c dmautils_autoinc_1d2d3d_test.c
+
+CFLAGS_LOCAL_COMMON = $(PDK_CFLAGS)
+
+# Core/SoC/platform specific source files and CFLAGS
+# Example:
+#   SRCS_<core/SoC/platform-name> =
+#   CFLAGS_LOCAL_<core/SoC/platform-name> =
+
+# Include common make files
+
+EXTERNAL_LNKCMD_FILE_LOCAL := c7x_vcop_lnk.cmd
+
+ifeq ($(MAKERULEDIR), )
+#Makerule path not defined, define this and assume relative path from ROOTDIR
+  MAKERULEDIR := $(ROOTDIR)/ti/build/makerules
+  export MAKERULEDIR
+endif
+include $(MAKERULEDIR)/common.mk
+
+# OBJs and libraries are built by using rule defined in rules_<target>.mk
+#     and need not be explicitly specified here
+
+# Nothing beyond this point
diff --git a/packages/ti/drv/udma/dmautils/test/dmautils_autoinc_circular_test/c7x_vcop_lnk.cmd b/packages/ti/drv/udma/dmautils/test/dmautils_autoinc_circular_test/c7x_vcop_lnk.cmd
new file mode 100644 (file)
index 0000000..94dfd0f
--- /dev/null
@@ -0,0 +1,59 @@
+/****************************************************************************/
+/*  lnk.cmd   v#.##                                                         */
+/*  Copyright (c) 2014-%%%%  Texas Instruments Incorporated                 */
+/*                                                                          */
+/*  Usage: cl7x  <src files...> -z -o <out file> -m <map file> lnk.cmd      */
+/*                                                                          */
+/*    Description: THIS FILE IS A SAMPLE linker command file that can be    */
+/*                 used for linking programs built with the C compiler and  */
+/*                 running the resulting .out file on a C7100 simulator.    */
+/*                 Use it as a guideline.  You will want to change the      */
+/*                 memory layout to match your specific C7xxx target        */
+/*                 system.  You may want to change the allocation scheme    */
+/*                 according to the size of your program.                   */
+/*                                                                          */
+/*    Notes: (1)   You must specify a directory in which your library is    */
+/*                 located.  either add a -i"<directory>" line to this      */
+/*                 file or use the system environment variable C_DIR to     */
+/*                 specify a search path for the libraries.                 */
+/*                                                                          */
+/*           (2)   You may need to specify your library name with           */
+/*                 -llibrary.lib if the correct library is not found        */
+/*                 automatically.                                           */
+/*                                                                          */
+/****************************************************************************/
+-c
+-heap  0x20000
+-stack 0x2000
+--args 0x1000
+--diag_suppress=10068 // "no matching section"
+//--cinit_compression=off
+
+MEMORY
+{
+  L2SRAM   (RWX): org = 0x64800000, len = 0x080000
+  MSMCSRAM (RWX): org = 0x70000000, len = 0x800000
+  L1D           : org = 0x64E00000, len = 0x4000
+}
+
+
+SECTIONS
+{
+    .text       >       MSMCSRAM
+
+    .bss        >       MSMCSRAM  /* Zero-initialized data */
+    .data       >       MSMCSRAM  /* Initialized data */
+
+    .cinit      >       MSMCSRAM  /* could be part of const */
+    .init_array >       MSMCSRAM  /* C++ initializations */
+    .stack      >       MSMCSRAM
+    .args       >       MSMCSRAM
+    .cio        >       MSMCSRAM
+    .const      >       MSMCSRAM
+    .switch     >       MSMCSRAM /* For exception handling. */
+                             /* Not a default ELF section -- remove?  */
+                             /* could be part of const */
+    .sysmem     >       MSMCSRAM /* heap */
+       .L2SramSect >       L2SRAM /* TODO */
+       .MSMCSramSect >     MSMCSRAM
+}
diff --git a/packages/ti/drv/udma/dmautils/test/dmautils_autoinc_circular_test/dmautils_autoinc_circular_example.c b/packages/ti/drv/udma/dmautils/test/dmautils_autoinc_circular_test/dmautils_autoinc_circular_example.c
new file mode 100644 (file)
index 0000000..ed104e1
--- /dev/null
@@ -0,0 +1,521 @@
+/*
+ *  Copyright (c) Texas Instruments Incorporated 2018
+ *
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions
+ *  are met:
+ *
+ *    Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *
+ *    Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the
+ *    distribution.
+ *
+ *    Neither the name of Texas Instruments Incorporated nor the names of
+ *    its contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*============================================================================*/
+/*============================================================================*/
+
+/**
+----------------------------------------------------------------------------
+@file    dma_example.c
+@brief   Demostrates a simple example of auto increment DMA to allow DSP to
+operate a function on internal memory and transfer back the result.
+@version 0.0 (Jan 2017) : First version
+----------------------------------------------------------------------------
+*/
+
+#include <stdio.h>
+#include <stdint.h>
+
+#include "dmautils_autoinc_circular_example.h"
+
+#include "ti/drv/udma/dmautils/dmautils.h"
+#include "ti/drv/udma/udma.h"
+
+
+int32_t flipHorizontalKernel(
+  uint8_t *inputData,
+  uint8_t  *outputData,
+  uint16_t width,
+  uint16_t height,
+  uint16_t inPitch,
+  uint16_t outPitch)
+{
+  int32_t i, j;
+  for(j = 0; j < height; j++)
+  {
+    for(i = 0; i < width; i++)
+    {
+      outputData[i] =  inputData[width - i - 1] ;
+    }
+    inputData  += inPitch ;
+    outputData += outPitch ;
+  }
+  return 0;
+}
+
+
+int32_t blockCopyKernel(
+  uint8_t *inputData,
+  uint8_t  *outputData,
+  uint16_t width,
+  uint16_t height,
+  uint16_t inPitch,
+  uint16_t outPitch)
+{
+  int32_t i, j;
+
+  for(j = 0; j < height; j++)
+  {
+    for(i = 0; i < width; i++)
+    {
+      outputData[i + (j * outPitch)] =
+           inputData[i + (j * inPitch)] ;
+    }
+  }
+
+  return 0;
+}
+
+static void testDmaAutoIncPrintf(const char *str)
+{
+#ifdef ENABLE_PRINT
+  print(str);
+#endif
+}
+
+#define TEST_DMAUTILS_ALIGN_CEIL(VAL, ALIGN) ((((VAL) + (ALIGN) - 1)/(ALIGN)) * (ALIGN) )
+
+static int32_t testDmaAutoIncNumTrRequired(  int16_t   width,
+  int16_t   height,
+  int16_t   blockWidth,
+  int16_t   blockHeight,
+  uint32_t  *numHorzTrsRequired,
+  uint32_t  *numVertTrRowsRequired
+)
+{
+    uint32_t numHorzTr;
+    uint32_t numVertTr;
+
+    numVertTr = TEST_DMAUTILS_ALIGN_CEIL(height, blockHeight) / blockHeight;
+    numHorzTr = 1;
+
+    if ( width % blockWidth != 0 )
+    {
+      numHorzTr = 2;
+    }
+
+    if (numHorzTr == 1)
+    {
+      if ( height % blockHeight == 0 )
+      {
+        numVertTr = 1;
+      }
+      else
+      {
+        /* One TR to handle upper part and one TR to handle last block row */
+        numVertTr = 2;
+      }
+    }
+
+    if ( numHorzTrsRequired != NULL )
+    {
+      *numHorzTrsRequired = numHorzTr;
+    }
+
+    if ( numVertTrRowsRequired != NULL )
+    {
+      *numVertTrRowsRequired = numVertTr;
+    }
+
+    return ( (numHorzTr) * (numVertTr));
+}
+
+static int32_t testDmaAutoIncSetupTr(  int16_t   width,
+  int16_t   height,
+  int16_t   blockWidth,
+  int16_t   blockHeight,
+  int16_t   inPitch,
+  int16_t   outPitch,
+  uint8_t * pInput,
+  uint8_t * pInputBlock,
+  uint8_t * pOutput,
+  uint8_t * pOutputBlock,
+  uint32_t circularPitch,
+  DmaUtilsAutoInc3d_TransferProp transferPropIn[],
+  DmaUtilsAutoInc3d_TransferProp transferPropOut[]
+)
+{
+    uint32_t numHorzTrsRequired, numVertTrRowsRequired;
+
+    testDmaAutoIncNumTrRequired(width, height, blockWidth, blockHeight, &numHorzTrsRequired, &numVertTrRowsRequired);
+
+    transferPropIn[0].syncType = DMAUTILSAUTOINC3D_SYNC_2D;
+
+    transferPropIn[0].circProp.circDir = DMAUTILSAUTOINC3D_CIRCDIR_DST;
+    transferPropIn[0].circProp.circSize1 = circularPitch;
+    transferPropIn[0].circProp.circSize2 = 0;
+    transferPropIn[0].circProp.addrModeIcnt0 = DMAUTILSAUTOINC3D_ADDR_CIRC1;
+    transferPropIn[0].circProp.addrModeIcnt1 = DMAUTILSAUTOINC3D_ADDR_LINEAR;
+    transferPropIn[0].circProp.addrModeIcnt2 = DMAUTILSAUTOINC3D_ADDR_CIRC1;
+    transferPropIn[0].circProp.addrModeIcnt3 = DMAUTILSAUTOINC3D_ADDR_LINEAR;
+
+
+    transferPropIn[0].ioPointers.srcPtr = pInput;
+    transferPropIn[0].ioPointers.dstPtr = pInputBlock;
+
+    transferPropIn[0].transferDim.sicnt0 = blockWidth;
+    transferPropIn[0].transferDim.sicnt1 = blockHeight;
+    transferPropIn[0].transferDim.sicnt2 = (width/blockWidth) ;
+    transferPropIn[0].transferDim.sicnt3 = height / blockHeight;
+
+    transferPropIn[0].transferDim.sdim1 = inPitch;
+    transferPropIn[0].transferDim.sdim2 = blockWidth;
+    transferPropIn[0].transferDim.sdim3 = blockHeight * inPitch;
+
+    transferPropIn[0].transferDim.dicnt0 = blockWidth;
+    transferPropIn[0].transferDim.dicnt1 = blockHeight;
+    transferPropIn[0].transferDim.dicnt2 = (width/blockWidth) * (height / blockHeight);
+    transferPropIn[0].transferDim.dicnt3 = 1;
+    transferPropIn[0].transferDim.ddim1 = circularPitch;
+    transferPropIn[0].transferDim.ddim2 = blockWidth;
+    transferPropIn[0].transferDim.ddim3 = 0;
+
+    transferPropOut[0] = transferPropIn[0];
+
+    transferPropOut[0].circProp.circDir = DMAUTILSAUTOINC3D_CIRCDIR_SRC;
+
+    transferPropOut[0].ioPointers.srcPtr = (uint8_t *)(pOutputBlock);
+    transferPropOut[0].ioPointers.dstPtr = (uint8_t *)pOutput;
+
+    transferPropOut[0].transferDim.sicnt0 = transferPropIn[0].transferDim.dicnt0;
+    transferPropOut[0].transferDim.sicnt1 = transferPropIn[0].transferDim.dicnt1;
+    transferPropOut[0].transferDim.sicnt2 = transferPropIn[0].transferDim.dicnt2;
+    transferPropOut[0].transferDim.sicnt3 = transferPropIn[0].transferDim.dicnt3 ;
+    transferPropOut[0].transferDim.sdim1 = circularPitch;
+    transferPropOut[0].transferDim.sdim2 = blockWidth;
+    transferPropOut[0].transferDim.sdim3 = 0;
+
+    transferPropOut[0].transferDim.dicnt0 = transferPropIn[0].transferDim.sicnt0;
+    transferPropOut[0].transferDim.dicnt1 = transferPropIn[0].transferDim.sicnt1;
+    transferPropOut[0].transferDim.dicnt2 = transferPropIn[0].transferDim.sicnt2;
+    transferPropOut[0].transferDim.dicnt3 = transferPropIn[0].transferDim.sicnt3 ;
+    transferPropOut[0].transferDim.ddim1 = outPitch;
+    transferPropOut[0].transferDim.ddim2 = blockWidth;
+    transferPropOut[0].transferDim.ddim3 = blockHeight * outPitch;
+
+    return numHorzTrsRequired * numVertTrRowsRequired;
+
+}
+
+typedef enum{
+  DMAUTILSTESTAUTOINC_CHANNEL_IN,
+  DMAUTILSTESTAUTOINC_CHANNEL_OUT,
+  DMAUTILSTESTAUTOINC_CHANNEL_MAX
+}dmautilsTestAutoInc_Channel;
+
+
+#define DMAUTILSTESTAUTOINC_MAX_NUM_TR  (32)
+#define TEST_ALIGN_SIZE (128U)
+
+
+/* This function is main function exposed to user*/
+int32_t blockCopy(
+  uint8_t*   pInput,
+  uint8_t*   pOutput,
+  uint8_t*   pInputBlock,
+  uint8_t*   pOutputBlock,
+  uint16_t   width,
+  uint16_t   height,
+  uint16_t   blockWidth,
+  uint16_t   blockHeight,
+  uint16_t   inPitch,
+  uint16_t   outPitch,
+  uint8_t*   pIntMmeBase,
+  uint32_t   intMemSize,
+  uint8_t    useDMA
+  )
+{
+  int32_t retVal = UDMA_SOK ;
+
+  if(useDMA == 0)
+  {
+    //call the kernel directly on data in DDR
+    blockCopyKernel(pInput,
+      pOutput,
+      width,
+      height,
+      inPitch,
+      outPitch);
+  }
+  else
+  {
+    uint32_t intMemUsedSize = 0;
+    uint8_t *dmautilsContext;
+    uint8_t *inTrMem;
+    uint8_t *outTrMem;
+    uint32_t pingPongFlag = 0;
+    uint32_t blockIdx = 0;
+    uint32_t firstTrigger = 0;
+    uint32_t inTrSize;
+    uint32_t outTrSize;
+    uint32_t numTrReq;
+    uint32_t dmaChannels;
+
+    DmaUtilsAutoInc3d_InitParam initParams;
+    DmaUtilsAutoInc3d_ChannelInitParam chInitParams[DMAUTILSTESTAUTOINC_CHANNEL_MAX];
+    DmaUtilsAutoInc3d_TrPrepareParam trPrepParamIn;
+    DmaUtilsAutoInc3d_TrPrepareParam trPrepParamOut;
+    DmaUtilsAutoInc3d_TransferProp *transferPropIn;
+    DmaUtilsAutoInc3d_TransferProp *transferPropOut;
+    uint32_t circularPitch;
+    uint32_t blockOffset = 0;
+    uint32_t linearOffset = 0;
+    Udma_InitPrms   initPrms;
+    struct Udma_DrvObj      udmaDrvObj;
+    uint32_t        instId;
+
+    Udma_DrvHandle  drvHandle = &udmaDrvObj;
+
+    /* Circularity testcase is only for exact multiples */
+    if ( ( (width % blockWidth) != 0  ) || ( (height % blockHeight) != 0  ) )
+    {
+      return -1;
+    }
+    circularPitch = blockWidth *  2;
+    circularPitch = (circularPitch < 512)? 512 : circularPitch;
+    while ((circularPitch & (circularPitch - 1)) != 0)
+    {
+      circularPitch += 1;
+    }
+
+    instId = UDMA_INST_ID_MAIN_0;
+    UdmaInitPrms_init(instId, &initPrms);
+    initPrms.printFxn = &testDmaAutoIncPrintf;
+    retVal = Udma_init(drvHandle, &initPrms);
+    if(UDMA_SOK != retVal)
+    {
+        testDmaAutoIncPrintf("[Error] UDMA init failed!!\n");
+    }
+
+
+    dmaChannels = DMAUTILSTESTAUTOINC_CHANNEL_MAX; /* One for input and other for output */
+
+    //Allocation/Assignment of buffers in internal memory
+    dmautilsContext     =  pIntMmeBase + intMemUsedSize ;
+    intMemUsedSize += TEST_DMAUTILS_ALIGN_CEIL(DmaUtilsAutoInc3d_getContextSize(dmaChannels), TEST_ALIGN_SIZE);
+
+    transferPropIn = (DmaUtilsAutoInc3d_TransferProp * ) (pIntMmeBase + intMemUsedSize );
+    intMemUsedSize += TEST_DMAUTILS_ALIGN_CEIL((DMAUTILSTESTAUTOINC_MAX_NUM_TR * sizeof(DmaUtilsAutoInc3d_TransferProp)), TEST_ALIGN_SIZE);
+
+    transferPropOut = (DmaUtilsAutoInc3d_TransferProp * ) (pIntMmeBase + intMemUsedSize );
+    intMemUsedSize += TEST_DMAUTILS_ALIGN_CEIL((DMAUTILSTESTAUTOINC_MAX_NUM_TR * sizeof(DmaUtilsAutoInc3d_TransferProp)), TEST_ALIGN_SIZE);
+
+    initParams.contextSize = DmaUtilsAutoInc3d_getContextSize(dmaChannels);
+    initParams.numChannels = dmaChannels;
+    initParams.traceLogLevel    = 1;
+    initParams.udmaDrvHandle = drvHandle;
+    initParams.DmaUtilsVprintf = vprintf;
+
+    numTrReq = testDmaAutoIncNumTrRequired(width, height, blockWidth, blockHeight, NULL, NULL);
+
+    chInitParams[DMAUTILSTESTAUTOINC_CHANNEL_IN].dmaQueNo  = 0;
+    chInitParams[DMAUTILSTESTAUTOINC_CHANNEL_OUT].dmaQueNo  = 0;
+
+    chInitParams[DMAUTILSTESTAUTOINC_CHANNEL_IN].druOwner    = DMAUTILSAUTOINC3D_DRUOWNER_DIRECT_TR;
+    chInitParams[DMAUTILSTESTAUTOINC_CHANNEL_OUT].druOwner    = DMAUTILSAUTOINC3D_DRUOWNER_DIRECT_TR;
+
+
+    retVal = DmaUtilsAutoInc3d_init(dmautilsContext, &initParams, chInitParams);
+    if ( retVal != UDMA_SOK )
+    {
+      goto Exit;
+    }
+
+    numTrReq =     testDmaAutoIncSetupTr(width,
+                                                height,
+                                                blockWidth,
+                                                blockHeight,
+                                                inPitch,
+                                                outPitch,
+                                                pInput,
+                                                pInputBlock,
+                                                pOutput,
+                                                pOutputBlock,
+                                                circularPitch,
+                                                &transferPropIn[0],
+                                                &transferPropOut[0]);
+
+    inTrSize = DmaUtilsAutoInc3d_getTrMemReq(numTrReq);
+    outTrSize = DmaUtilsAutoInc3d_getTrMemReq(numTrReq);
+
+    inTrMem = pIntMmeBase + intMemUsedSize ;
+
+    intMemUsedSize += TEST_DMAUTILS_ALIGN_CEIL(inTrSize, TEST_ALIGN_SIZE);
+
+    outTrMem = pIntMmeBase + intMemUsedSize ;
+    intMemUsedSize += TEST_DMAUTILS_ALIGN_CEIL(outTrSize, TEST_ALIGN_SIZE);
+
+    trPrepParamIn.channelId = DMAUTILSTESTAUTOINC_CHANNEL_IN;
+    trPrepParamIn.numTRs  = numTrReq;
+    trPrepParamIn.trMem     = inTrMem;
+    trPrepParamIn.trMemSize = inTrSize;
+
+    retVal = DmaUtilsAutoInc3d_prepareTr(&trPrepParamIn, &transferPropIn[0]);
+
+    if ( retVal != UDMA_SOK )
+    {
+      goto Exit;
+    }
+
+
+    trPrepParamOut.channelId = DMAUTILSTESTAUTOINC_CHANNEL_OUT;
+    trPrepParamOut.numTRs  = numTrReq;
+    trPrepParamOut.trMem     = outTrMem;
+    trPrepParamOut.trMemSize = outTrSize;
+
+    retVal = DmaUtilsAutoInc3d_prepareTr(&trPrepParamOut, &transferPropOut[0]);
+
+    if ( retVal != UDMA_SOK )
+    {
+      goto Exit;
+    }
+
+    if(intMemUsedSize > intMemSize)
+    {
+      printf("insufficient memory, required is %d vs provided %d\n",intMemUsedSize, intMemSize);
+      return -1 ;
+    }
+
+    retVal = DmaUtilsAutoInc3d_configure(dmautilsContext, DMAUTILSTESTAUTOINC_CHANNEL_IN, inTrMem, numTrReq);
+
+    if ( retVal != UDMA_SOK )
+    {
+      goto Exit;
+    }
+
+    retVal = DmaUtilsAutoInc3d_configure(dmautilsContext, DMAUTILSTESTAUTOINC_CHANNEL_OUT, outTrMem, numTrReq);
+
+    if ( retVal != UDMA_SOK )
+    {
+      goto Exit;
+    }
+
+
+    //DMA trigger for pipe-up, out transfer is dummy and handled inside DMA utility
+    DmaUtilsAutoInc3d_trigger(dmautilsContext, DMAUTILSTESTAUTOINC_CHANNEL_IN);
+    //Wait for previous transfer of in
+    DmaUtilsAutoInc3d_wait(dmautilsContext, DMAUTILSTESTAUTOINC_CHANNEL_IN);
+
+    pingPongFlag^=1;
+    blockIdx = 0;
+    linearOffset  = 0;
+
+    while (1)
+    {
+
+      pingPongFlag^=1;
+
+      if (firstTrigger != 0 )
+      {
+         blockIdx = DmaUtilsAutoInc3d_trigger(dmautilsContext, DMAUTILSTESTAUTOINC_CHANNEL_OUT) ;
+      }
+
+      //DMA trigger for next in buffer
+      if ( blockIdx != 1)
+      {
+        DmaUtilsAutoInc3d_trigger(dmautilsContext, DMAUTILSTESTAUTOINC_CHANNEL_IN);
+      }
+
+      blockCopyKernel(
+        pInputBlock   + blockOffset,
+        pOutputBlock + blockOffset,
+        blockWidth,
+        blockHeight,
+        circularPitch,
+        circularPitch);
+
+      linearOffset += (blockWidth );
+      blockOffset = (linearOffset & (circularPitch - 1));
+
+
+      if ( blockIdx != 1 )
+      {
+        DmaUtilsAutoInc3d_wait(dmautilsContext, DMAUTILSTESTAUTOINC_CHANNEL_IN);
+      }
+      //Wait for previous transfer out
+       if (firstTrigger != 0 )
+      {
+        DmaUtilsAutoInc3d_wait(dmautilsContext, DMAUTILSTESTAUTOINC_CHANNEL_OUT)  ;
+      }
+      else
+      {
+        firstTrigger = 1;
+      }
+
+
+      if ( blockIdx == 1 )
+        break;
+
+    }
+
+    DmaUtilsAutoInc3d_trigger(dmautilsContext, DMAUTILSTESTAUTOINC_CHANNEL_OUT) ;
+
+    //Need to wait for last out transfer
+    DmaUtilsAutoInc3d_wait(dmautilsContext, DMAUTILSTESTAUTOINC_CHANNEL_OUT)  ;
+
+
+    retVal = DmaUtilsAutoInc3d_deconfigure(dmautilsContext, DMAUTILSTESTAUTOINC_CHANNEL_IN, inTrMem, 1);
+
+     if ( retVal != UDMA_SOK )
+     {
+       goto Exit;
+     }
+
+     retVal = DmaUtilsAutoInc3d_deconfigure(dmautilsContext, DMAUTILSTESTAUTOINC_CHANNEL_OUT, outTrMem, 1);
+
+     if ( retVal != UDMA_SOK )
+     {
+       goto Exit;
+     }
+
+
+
+    retVal = DmaUtilsAutoInc3d_deinit(dmautilsContext);
+
+     if ( retVal != UDMA_SOK )
+     {
+       goto Exit;
+     }
+
+
+    retVal = Udma_deinit(drvHandle);
+    if ( retVal != UDMA_SOK )
+     {
+       goto Exit;
+     }
+  }
+
+
+Exit:
+  return retVal ;
+}
+
diff --git a/packages/ti/drv/udma/dmautils/test/dmautils_autoinc_circular_test/dmautils_autoinc_circular_example.h b/packages/ti/drv/udma/dmautils/test/dmautils_autoinc_circular_test/dmautils_autoinc_circular_example.h
new file mode 100644 (file)
index 0000000..8f018ef
--- /dev/null
@@ -0,0 +1,86 @@
+/*
+ *  Copyright (c) Texas Instruments Incorporated 2018
+ *
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions
+ *  are met:
+ *
+ *    Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *
+ *    Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the
+ *    distribution.
+ *
+ *    Neither the name of Texas Instruments Incorporated nor the names of
+ *    its contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*============================================================================*/
+/*============================================================================*/
+
+/**
+----------------------------------------------------------------------------
+@file    edma_utils_autoincrement_example.h
+@brief   Demostrates a simple example of auto increment DMA to allow DSP to
+operate a function on internal memory and transfer back the result.
+@version 0.0 (Jan 2017) : First version
+----------------------------------------------------------------------------
+*/
+
+#ifndef EDMA_UTILS_AUTOINCREMENT_EXAMPLE_H_
+#define EDMA_UTILS_AUTOINCREMENT_EXAMPLE_H_
+
+/*
+ This function accepts an input image in external memory and write back to
+ external memory after performing a horizontal flip of the image.
+ The function can be called to work on direct external memory with cache
+ by setting useDMA = 0
+ The function can also be called to work using DMA, in that case user should
+ provide internal memory buffer pointed by pIntMmeBase and available size
+ by setting intMemSize. In case the internal memory is not sufficient, the
+ function returns -1 and prints the required memory size
+
+ whiel using DMA; this function tarnsfers an entire row of data in internal
+ memory, then performs the flip operation and writes the result in internal
+ memory. The result is then transfered back to external memory using DMA.
+ In order to have DMA and CPU operate in parallel, 2 instances of input and
+ output are created in internal memory
+
+ The prupose of the function is to act as an example for DMA usage so the
+ default core function of fliping the image is in natural C
+
+*/
+
+int32_t blockCopy(
+  uint8_t*   pInput,
+  uint8_t*   pOutput,
+  uint8_t*   pInputBlock,
+  uint8_t*   pOutputBlock,
+  uint16_t   width,
+  uint16_t   height,
+  uint16_t   blockWidth,
+  uint16_t   blockHeight,
+  uint16_t   inPitch,
+  uint16_t   outPitch,
+  uint8_t*   pIntMmeBase,
+  uint32_t   intMemSize,
+  uint8_t    useDMA
+  );
+
+
+#endif /*EDMA_UTILS_AUTOINCREMENT_EXAMPLE_H_*/
diff --git a/packages/ti/drv/udma/dmautils/test/dmautils_autoinc_circular_test/dmautils_autoinc_circular_test.c b/packages/ti/drv/udma/dmautils/test/dmautils_autoinc_circular_test/dmautils_autoinc_circular_test.c
new file mode 100644 (file)
index 0000000..e0d783a
--- /dev/null
@@ -0,0 +1,347 @@
+/*
+ *  Copyright (c) Texas Instruments Incorporated 2018
+ *
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions
+ *  are met:
+ *
+ *    Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *
+ *    Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the
+ *    distribution.
+ *
+ *    Neither the name of Texas Instruments Incorporated nor the names of
+ *    its contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*============================================================================*/
+/*============================================================================*/
+
+
+/**
+ *  \file dmautils_autoinc_circular_test.c
+ *
+ *  \brief Simple application demonstrating 2D auto increment feature with circularity enabled of dmautils
+ *
+ *  Requirement: DOX_REQ_TAG(PDK-2643:PDK-2645:PDK-2646)
+ */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <stdint.h>
+#include <string.h>
+#if defined(HOST_EMULATION)
+#include <malloc.h>
+#endif
+
+#include "dmautils_autoinc_circular_example.h"
+#include "ti/drv/sciclient/sciclient.h"
+
+#define TEST_malloc(heap, size)   malloc(size)
+#define TEST_free(ptr)            free(ptr)
+
+#define L2SRAM_SIZE (64*1024)
+
+#ifdef _MSC_VER
+#ifndef __attribute__
+#define __attribute__()
+#endif
+#endif
+uint8_t L2SRAM[L2SRAM_SIZE] __attribute__((aligned(128)));
+
+
+typedef struct
+{
+  uint32_t testcaseId;
+  uint32_t requirementId;
+  uint32_t imageWidth;
+  uint32_t imageHeight;
+  uint32_t blockWidth;
+  uint32_t blockHeight;
+}dmautilsAutoIncTest_config;
+
+
+dmautilsAutoIncTest_config gTestConfig[] =
+{
+    {
+        0,
+        1,
+        256,/*Image Width */
+        32,/*Image Height */
+        128,/*Image blockWidth */
+        8/*Image blockHeight */
+    },
+
+};
+
+int32_t test_sciclientDmscGetVersion(char *version_str, uint32_t version_str_size)
+{
+    int32_t retVal = 0;
+
+    const Sciclient_ReqPrm_t      reqPrm =
+    {
+        TISCI_MSG_VERSION,
+        TISCI_MSG_FLAG_AOP,
+        NULL,
+        0,
+        SCICLIENT_SERVICE_WAIT_FOREVER
+    };
+    struct tisci_msg_version_resp response;
+    Sciclient_RespPrm_t           respPrm =
+    {
+        0,
+        (uint8_t *) &response,
+        sizeof (response)
+    };
+
+    retVal = Sciclient_service(&reqPrm, &respPrm);
+    if (0 == retVal)
+    {
+        if (respPrm.flags == TISCI_MSG_FLAG_ACK)
+        {
+            if(version_str == NULL)
+            {
+                printf("SCICLIENT: DMSC FW version [%s]\n", (char *) response.str);
+                printf("SCICLIENT: DMSC FW revision 0x%x  \n", response.version);
+                printf("SCICLIENT: DMSC FW ABI revision %d.%d\n",
+                    response.abi_major, response.abi_minor);
+            }
+            else
+            {
+                snprintf(version_str, version_str_size, "version %s, revision 0x%x, ABI %d.%d",
+                    (char *) response.str,
+                    response.version,
+                    response.abi_major, response.abi_minor
+                    );
+            }
+        }
+        else
+        {
+            retVal = -1;
+        }
+    }
+    if(retVal!=0)
+    {
+        printf("SCICLIENT: ERROR: DMSC Firmware Get Version failed !!!\n");
+    }
+
+    return (retVal);
+}
+
+
+int32_t main()
+{
+  uint16_t   width;
+  uint16_t   height;
+  uint16_t   inPitch;
+  uint16_t   outPitch;
+  uint16_t   blockWidth;
+  uint16_t   blockHeight;
+
+  int32_t i, j;
+  uint8_t *input     = NULL;
+  uint8_t  *output    = NULL;
+  uint8_t  *refOut    = NULL;
+
+  uint8_t * pInputBlock;
+  uint8_t * pOutputBlock;
+
+  uint8_t*    pIntMmeBase  = L2SRAM;
+  uint32_t   intMemSize   = L2SRAM_SIZE;
+  uint8_t    useDMA      ;
+  uint8_t status = 1;
+  uint32_t testcaseIdx;
+  uint32_t internalBlockSize;
+  uint32_t circBufWidth;
+
+#ifdef HOST_EMULATION
+#if defined(_MSC_VER)
+    pIntMmeBase = (uint8_t*)_aligned_malloc(L2SRAM_SIZE, L2SRAM_SIZE);
+#else
+    pIntMmeBase = (uint8_t*)memalign(L2SRAM_SIZE, L2SRAM_SIZE);
+#endif
+#else
+    int32_t retVal = 0;
+    Sciclient_ConfigPrms_t  sciClientCfg;
+    Sciclient_configPrmsInit(&sciClientCfg);
+    sciClientCfg.isSecureMode = 1;
+    retVal = Sciclient_init(&sciClientCfg);
+    if(retVal!=0)
+    {
+      printf("Sciclient Init Failed \n");
+      goto Exit;
+    }
+
+    test_sciclientDmscGetVersion(NULL, 0 ); 
+#endif
+
+  for (testcaseIdx = 0; testcaseIdx < sizeof(gTestConfig)/ sizeof(dmautilsAutoIncTest_config); testcaseIdx++)
+  {
+      width    = gTestConfig[testcaseIdx].imageWidth;
+      height   = gTestConfig[testcaseIdx].imageHeight;
+
+      inPitch  = gTestConfig[testcaseIdx].imageWidth;
+      outPitch = gTestConfig[testcaseIdx].imageWidth;
+      blockWidth = gTestConfig[testcaseIdx].blockWidth;
+      blockHeight  = gTestConfig[testcaseIdx].blockHeight;
+
+      /* Buffer allocations for input, output and reference output  */
+
+      input = (uint8_t *)malloc(width * height);
+      output = (uint8_t *)malloc(width * height);
+      refOut = (uint8_t *)malloc(width * height);
+
+      circBufWidth = blockWidth *  2;
+
+      circBufWidth = (circBufWidth < 512)? 512 : circBufWidth;
+      while ((circBufWidth & (circBufWidth - 1)) != 0)
+      {
+        circBufWidth += 1;
+      }
+      internalBlockSize= circBufWidth * blockHeight;
+
+#ifdef HOST_EMULATION
+#if defined(_MSC_VER)
+      pInputBlock = (uint8_t *)_aligned_malloc(internalBlockSize, circBufWidth);
+      pOutputBlock = (uint8_t *)_aligned_malloc(internalBlockSize, circBufWidth);
+#else
+      pInputBlock = (uint8_t*)memalign(circBufWidth, internalBlockSize);
+      pOutputBlock = (uint8_t*)memalign(circBufWidth, internalBlockSize);
+#endif
+#else
+      pInputBlock = (uint8_t*)memalign(circBufWidth, internalBlockSize);
+      pOutputBlock = (uint8_t*)memalign(circBufWidth, internalBlockSize);
+#endif
+
+      memset(output, 0, width * height);
+      memset(refOut, 0, width * height);
+
+      /* Random pattern generator for input  */
+      for ( j = 0 ; j < height; j++)
+      {
+        for (i = 0; i < width; i++)
+        {
+          input[i + j * inPitch] = i + j* 56;
+        }
+      }
+
+      //DMA based function call
+      useDMA = 1;
+
+#if (!HOST_EMULATION) && (CORE_DSP)
+      tscStart = _TSC_read();
+#endif
+
+      blockCopy(
+        input,
+        output,
+        pInputBlock,
+        pOutputBlock,
+        width,
+        height,
+        blockWidth,
+        blockHeight,
+        inPitch,
+        outPitch,
+        pIntMmeBase,
+        intMemSize,
+        useDMA );
+
+#if (!HOST_EMULATION) && (CORE_DSP)
+      tscEnd = _TSC_read();
+      printf("Cycles - Using DMA = %llu\n",(tscEnd-tscStart));
+#endif
+
+      useDMA = 0;
+#if (!HOST_EMULATION) && (CORE_DSP)
+      tscStart = _TSC_read();
+#endif
+      blockCopy(
+        input,
+        refOut,
+        pInputBlock,
+        pOutputBlock,
+        width,
+        height,
+        blockWidth,
+        blockHeight,
+        inPitch,
+        outPitch,
+        pIntMmeBase,
+        intMemSize,
+        useDMA );
+#if (!HOST_EMULATION) && (CORE_DSP)
+      tscEnd = _TSC_read();
+      printf("Cycles - Without using DMA = %llu\n",(tscEnd-tscStart));
+#endif
+
+      /*Compare output with reference output */
+      for(j = 0; j < height; j++)
+      {
+        for(i = 0; i < width; i++)
+        {
+          if(output[j * outPitch + i] != refOut[j * outPitch + i])
+          {
+            status = 0;
+            printf("[%d][%d] - output = %d\trefOutput = %d\n",j,i,output[j*outPitch + i], refOut[j*outPitch + i]);
+            break;
+          }
+          if ( status == 0 )
+          {
+             break;
+          }
+        }
+      }
+      if(status == 1)
+      {
+        printf("DMAUtils TestCase %d,        PASSED \n", gTestConfig[testcaseIdx].testcaseId);
+      }
+      else
+      {
+        printf("\nDMAUtils TestCase %d,        FAILED!!!!!! \n", gTestConfig[testcaseIdx].testcaseId);
+      }
+
+      free(input);
+      free(output);
+      free(refOut);
+#ifdef HOST_EMULATION
+#if defined(_MSC_VER)
+      _aligned_free(pInputBlock);
+      _aligned_free(pOutputBlock);
+#else
+      free(pInputBlock);
+      free(pOutputBlock);
+#endif
+#endif
+  }
+
+#ifdef HOST_EMULATION
+#if defined(_MSC_VER)
+      _aligned_free(pIntMmeBase);
+#else
+      free(pIntMmeBase);
+#endif
+#endif
+Exit:
+  return 0;
+}
+
diff --git a/packages/ti/drv/udma/dmautils/test/dmautils_autoinc_circular_test/makefile b/packages/ti/drv/udma/dmautils/test/dmautils_autoinc_circular_test/makefile
new file mode 100644 (file)
index 0000000..09fc199
--- /dev/null
@@ -0,0 +1,43 @@
+#
+# This file is the makefile for building DMA utils test app.
+#
+include $(PDK_INSTALL_PATH)/ti/build/Rules.make
+
+APP_NAME = dmautils_baremetal_autoinc_circular_testapp
+
+SRCDIR = .
+INCDIR = .
+
+# List all the external components/interfaces, whose interface header files
+#  need to be included for this component
+INCLUDE_EXTERNAL_INTERFACES = pdk
+
+# List all the components required by the application
+COMP_LIST_COMMON = csl udma dmautils sciclient osal_nonos
+
+# Common source files and CFLAGS across all platforms and cores
+PACKAGE_SRCS_COMMON = .
+SRCS_COMMON = dmautils_autoinc_circular_example.c dmautils_autoinc_circular_test.c
+
+CFLAGS_LOCAL_COMMON = $(PDK_CFLAGS)
+
+# Core/SoC/platform specific source files and CFLAGS
+# Example:
+#   SRCS_<core/SoC/platform-name> =
+#   CFLAGS_LOCAL_<core/SoC/platform-name> =
+
+# Include common make files
+
+EXTERNAL_LNKCMD_FILE_LOCAL := c7x_vcop_lnk.cmd
+
+ifeq ($(MAKERULEDIR), )
+#Makerule path not defined, define this and assume relative path from ROOTDIR
+  MAKERULEDIR := $(ROOTDIR)/ti/build/makerules
+  export MAKERULEDIR
+endif
+include $(MAKERULEDIR)/common.mk
+
+# OBJs and libraries are built by using rule defined in rules_<target>.mk
+#     and need not be explicitly specified here
+
+# Nothing beyond this point
diff --git a/packages/ti/drv/udma/dmautils/test/dmautils_autoincrement_test/c7x_vcop_lnk.cmd b/packages/ti/drv/udma/dmautils/test/dmautils_autoincrement_test/c7x_vcop_lnk.cmd
new file mode 100644 (file)
index 0000000..e810e58
--- /dev/null
@@ -0,0 +1,59 @@
+/****************************************************************************/
+/*  lnk.cmd   v#.##                                                         */
+/*  Copyright (c) 2014-%%%%  Texas Instruments Incorporated                 */
+/*                                                                          */
+/*  Usage: cl7x  <src files...> -z -o <out file> -m <map file> lnk.cmd      */
+/*                                                                          */
+/*    Description: THIS FILE IS A SAMPLE linker command file that can be    */
+/*                 used for linking programs built with the C compiler and  */
+/*                 running the resulting .out file on a C7100 simulator.    */
+/*                 Use it as a guideline.  You will want to change the      */
+/*                 memory layout to match your specific C7xxx target        */
+/*                 system.  You may want to change the allocation scheme    */
+/*                 according to the size of your program.                   */
+/*                                                                          */
+/*    Notes: (1)   You must specify a directory in which your library is    */
+/*                 located.  either add a -i"<directory>" line to this      */
+/*                 file or use the system environment variable C_DIR to     */
+/*                 specify a search path for the libraries.                 */
+/*                                                                          */
+/*           (2)   You may need to specify your library name with           */
+/*                 -llibrary.lib if the correct library is not found        */
+/*                 automatically.                                           */
+/*                                                                          */
+/****************************************************************************/
+-c
+-heap  0x2000
+-stack 0x2000
+--args 0x1000
+--diag_suppress=10068 // "no matching section"
+//--cinit_compression=off
+
+MEMORY
+{
+  L2SRAM   (RWX): org = 0x64800000, len = 0x080000
+  MSMCSRAM (RWX): org = 0x70000000, len = 0x800000
+  L1D           : org = 0x64E00000, len = 0x4000
+}
+
+
+SECTIONS
+{
+    .text       >       MSMCSRAM
+
+    .bss        >       MSMCSRAM  /* Zero-initialized data */
+    .data       >       MSMCSRAM  /* Initialized data */
+
+    .cinit      >       MSMCSRAM  /* could be part of const */
+    .init_array >       MSMCSRAM  /* C++ initializations */
+    .stack      >       MSMCSRAM
+    .args       >       MSMCSRAM
+    .cio        >       MSMCSRAM
+    .const      >       MSMCSRAM
+    .switch     >       MSMCSRAM /* For exception handling. */
+                             /* Not a default ELF section -- remove?  */
+                             /* could be part of const */
+    .sysmem     >       MSMCSRAM /* heap */
+       .L2SramSect >       L2SRAM /* TODO */
+       .MSMCSramSect >     MSMCSRAM
+}
diff --git a/packages/ti/drv/udma/dmautils/test/dmautils_autoincrement_test/dmautils_autoincrement_example.c b/packages/ti/drv/udma/dmautils/test/dmautils_autoincrement_test/dmautils_autoincrement_example.c
new file mode 100644 (file)
index 0000000..1c480a9
--- /dev/null
@@ -0,0 +1,683 @@
+/*
+ *  Copyright (c) Texas Instruments Incorporated 2018
+ *
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions
+ *  are met:
+ *
+ *    Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *
+ *    Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the
+ *    distribution.
+ *
+ *    Neither the name of Texas Instruments Incorporated nor the names of
+ *    its contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*============================================================================*/
+/*============================================================================*/
+
+/**
+----------------------------------------------------------------------------
+@file    dma_example.c
+@brief   Demostrates a simple example of auto increment DMA to allow DSP to
+operate a function on internal memory and transfer back the result.
+@version 0.0 (Jan 2017) : First version
+----------------------------------------------------------------------------
+*/
+
+#include <stdio.h>
+#include <stdint.h>
+
+#include "dmautils_autoincrement_example.h"
+
+#include "ti/drv/udma/dmautils/dmautils.h"
+#include "ti/drv/udma/udma.h"
+
+
+int32_t flipHorizontalKernel(
+  uint8_t *inputData,
+  uint8_t  *outputData,
+  uint16_t width,
+  uint16_t height,
+  uint16_t inPitch,
+  uint16_t outPitch)
+{
+  int32_t i, j;
+  for(j = 0; j < height; j++)
+  {
+    for(i = 0; i < width; i++)
+    {
+      outputData[i] =  inputData[width - i - 1] ;
+    }
+    inputData  += inPitch ;
+    outputData += outPitch ;
+  }
+  return 0;
+}
+
+
+int32_t blockCopyKernel(
+  uint8_t *inputData,
+  uint8_t  *outputData,
+  uint16_t width,
+  uint16_t height,
+  uint16_t inPitch,
+  uint16_t outPitch)
+{
+  int32_t i, j;
+
+  for(j = 0; j < height; j++)
+  {
+    for(i = 0; i < width; i++)
+    {
+      outputData[i + (j * outPitch)] =
+           inputData[i + (j * inPitch)] ;
+    }
+  }
+
+  return 0;
+}
+
+static void testDmaAutoIncPrintf(const char *str)
+{
+#ifdef ENABLE_PRINT
+  print(str);
+#endif
+}
+
+#define TEST_DMAUTILS_ALIGN_CEIL(VAL, ALIGN) ((((VAL) + (ALIGN) - 1)/(ALIGN)) * (ALIGN) )
+
+static int32_t testDmaAutoIncNumTrRequired(  int16_t   width,
+  int16_t   height,
+  int16_t   blockWidth,
+  int16_t   blockHeight,
+  uint32_t  *numHorzTrsRequired,
+  uint32_t  *numVertTrRowsRequired
+)
+{
+    uint32_t numHorzTr;
+    uint32_t numVertTr;
+
+    numVertTr = TEST_DMAUTILS_ALIGN_CEIL(height, blockHeight) / blockHeight;
+    numHorzTr = 1;
+
+    if ( width % blockWidth != 0 )
+    {
+      numHorzTr = 2;
+    }
+
+    if (numHorzTr == 1)
+    {
+      if ( height % blockHeight == 0 )
+      {
+        numVertTr = 1;
+      }
+      else
+      {
+        /* One TR to handle upper part and one TR to handle last block row */
+        numVertTr = 2;
+      }
+    }
+
+    if ( numHorzTrsRequired != NULL )
+    {
+      *numHorzTrsRequired = numHorzTr;
+    }
+
+    if ( numVertTrRowsRequired != NULL )
+    {
+      *numVertTrRowsRequired = numVertTr;
+    }
+
+    return ( (numHorzTr) * (numVertTr));
+}
+
+static int32_t testDmaAutoIncSetupTr(  int16_t   width,
+  int16_t   height,
+  int16_t   blockWidth,
+  int16_t   blockHeight,
+  int16_t   inPitch,
+  int16_t   outPitch,
+  uint8_t * pInput,
+  uint8_t * pInputBlock,
+  uint8_t * pOutput,
+  uint8_t * pOutputBlock,
+  DmaUtilsAutoInc3d_TransferProp transferPropIn[],
+  DmaUtilsAutoInc3d_TransferProp transferPropOut[]
+)
+{
+    DmaUtilsAutoInc3d_TransferProp * transferPropPrev;
+    uint32_t i, j;
+    uint32_t numHorzTrsRequired, numVertTrRowsRequired;
+    uint32_t pingPongOffsetIn = 0;
+    uint32_t pingPongOffsetOut = 0;
+    int32_t numTotalTrReq = -1;
+
+    pingPongOffsetIn = blockWidth * blockHeight;
+    pingPongOffsetOut = blockWidth * blockHeight;
+
+    testDmaAutoIncNumTrRequired(width, height, blockWidth, blockHeight, &numHorzTrsRequired, &numVertTrRowsRequired);
+
+    transferPropIn[0].syncType = DMAUTILSAUTOINC3D_SYNC_2D;
+
+    transferPropIn[0].circProp.circDir = DMAUTILSAUTOINC3D_CIRCDIR_SRC;
+    transferPropIn[0].circProp.circSize1 = 0;
+    transferPropIn[0].circProp.circSize2 = 0;
+    transferPropIn[0].circProp.addrModeIcnt0 = DMAUTILSAUTOINC3D_ADDR_LINEAR;
+    transferPropIn[0].circProp.addrModeIcnt0 = DMAUTILSAUTOINC3D_ADDR_LINEAR;
+    transferPropIn[0].circProp.addrModeIcnt0 = DMAUTILSAUTOINC3D_ADDR_LINEAR;
+    transferPropIn[0].circProp.addrModeIcnt0 = DMAUTILSAUTOINC3D_ADDR_LINEAR;
+
+    transferPropIn[0].ioPointers.srcPtr = pInput;
+    transferPropIn[0].ioPointers.dstPtr = pInputBlock;
+
+    transferPropIn[0].transferDim.sicnt0 = blockWidth;
+    transferPropIn[0].transferDim.sicnt1 = blockHeight;
+    transferPropIn[0].transferDim.sicnt2 = (width/blockWidth) ;
+    transferPropIn[0].transferDim.sicnt3 = 1;
+
+    if ( (numHorzTrsRequired == 1 ) )
+    {
+      transferPropIn[0].transferDim.sicnt3 = height / blockHeight;
+    }
+
+    transferPropIn[0].transferDim.sdim1 = inPitch;
+    transferPropIn[0].transferDim.sdim2 = blockWidth;
+    transferPropIn[0].transferDim.sdim3 = blockHeight * inPitch;
+
+    transferPropIn[0].transferDim.dicnt0 = blockWidth;
+    transferPropIn[0].transferDim.dicnt1 = blockHeight;
+    transferPropIn[0].transferDim.dicnt2 = 2;
+    transferPropIn[0].transferDim.dicnt3 = TEST_DMAUTILS_ALIGN_CEIL(transferPropIn[0].transferDim.sicnt2  * transferPropIn[0].transferDim.sicnt3, 2) / 2;
+    transferPropIn[0].transferDim.ddim1 = blockWidth;
+    transferPropIn[0].transferDim.ddim2 = pingPongOffsetIn;
+    transferPropIn[0].transferDim.ddim3 = 0;
+
+    transferPropOut[0] = transferPropIn[0];
+
+    transferPropOut[0].ioPointers.srcPtr = (uint8_t *)(pOutputBlock);
+    transferPropOut[0].ioPointers.dstPtr = (uint8_t *)pOutput;
+
+    transferPropOut[0].transferDim.sicnt0 = transferPropIn[0].transferDim.dicnt0;
+    transferPropOut[0].transferDim.sicnt1 = transferPropIn[0].transferDim.dicnt1;
+    transferPropOut[0].transferDim.sicnt2 = transferPropIn[0].transferDim.dicnt2;
+    transferPropOut[0].transferDim.sicnt3 = transferPropIn[0].transferDim.dicnt3 ;
+    transferPropOut[0].transferDim.sdim1 = blockWidth;
+    transferPropOut[0].transferDim.sdim2 = pingPongOffsetOut;
+    transferPropOut[0].transferDim.sdim3 = 0;
+
+    transferPropOut[0].transferDim.dicnt0 = transferPropIn[0].transferDim.sicnt0;
+    transferPropOut[0].transferDim.dicnt1 = transferPropIn[0].transferDim.sicnt1;
+    transferPropOut[0].transferDim.dicnt2 = transferPropIn[0].transferDim.sicnt2;
+    transferPropOut[0].transferDim.dicnt3 = transferPropIn[0].transferDim.sicnt3 ;
+    transferPropOut[0].transferDim.ddim1 = outPitch;
+    transferPropOut[0].transferDim.ddim2 = blockWidth;
+    transferPropOut[0].transferDim.ddim3 = blockHeight * outPitch;
+
+    if ( numHorzTrsRequired  > 1 )
+    {
+
+      transferPropIn[1] = transferPropIn[0];
+
+      transferPropIn[1].ioPointers.srcPtr = pInput +  ( transferPropIn[0].transferDim.sicnt2  * transferPropIn[0].transferDim.sdim2 );
+      transferPropIn[1].ioPointers.dstPtr = pInputBlock +  pingPongOffsetIn* ((transferPropOut[0].transferDim.dicnt2 % 2 == 0 ) ? 0 : 1);
+
+      transferPropIn[1] .transferDim.sicnt0 = (width %  blockWidth);
+      transferPropIn[1] .transferDim.sicnt1 = blockHeight;
+      transferPropIn[1] .transferDim.sicnt2 = 1;
+      transferPropIn[1] .transferDim.sicnt3 = 1;
+
+      transferPropIn[1] .transferDim.dicnt0 = (width %  blockWidth);
+      transferPropIn[1] .transferDim.dicnt1 = blockHeight;
+      transferPropIn[1] .transferDim.dicnt2 = 1;
+      transferPropIn[1] .transferDim.dicnt3 = 1;
+
+      transferPropOut[1] = transferPropOut[0];
+
+      transferPropOut[1].ioPointers.srcPtr = pOutputBlock  +  pingPongOffsetOut* ((transferPropOut[0].transferDim.dicnt2 % 2 == 0 ) ? 0 : 1);
+      transferPropOut[1].ioPointers.dstPtr = pOutput+  transferPropOut[0].transferDim.dicnt2  * transferPropOut[0].transferDim.ddim2;
+
+      transferPropOut[1] .transferDim.sicnt0 = transferPropIn[1].transferDim.dicnt0;
+      transferPropOut[1] .transferDim.sicnt1 = transferPropIn[1].transferDim.dicnt1;
+      transferPropOut[1] .transferDim.sicnt2 = 1;
+      transferPropOut[1] .transferDim.sicnt3 = 1;
+
+      transferPropOut[1] .transferDim.dicnt0 = transferPropIn[1].transferDim.sicnt0;
+      transferPropOut[1] .transferDim.dicnt1 = transferPropIn[1].transferDim.sicnt1;
+      transferPropOut[1] .transferDim.dicnt2 = 1;
+      transferPropOut[1] .transferDim.dicnt3 = 1;
+    }
+    else if ( numVertTrRowsRequired == 2 )
+    {
+      int32_t nextPingPongOffset = 0;
+      int32_t nextPingPongJump = 0;
+      if ( (transferPropIn[0].transferDim.sicnt2 * transferPropIn[0].transferDim.sicnt3 )% 2 != 0 )
+      {
+        /* Numbe of transfers in a block is even so next block row should start with Pong buffer and jump back to ping buffer,
+        Hence the negative offset */
+        nextPingPongOffset = pingPongOffsetIn;
+        nextPingPongJump  = -pingPongOffsetIn;
+      }
+      else
+      {
+        nextPingPongOffset = 0;
+        nextPingPongJump  = pingPongOffsetIn;
+      }
+
+      /* numHorzTrsRequired will automatically be 1 */
+      transferPropIn[1] = transferPropIn[0];
+
+      transferPropIn[1].ioPointers.srcPtr = pInput +  ( transferPropIn[0].transferDim.sicnt3  * transferPropIn[0].transferDim.sdim3 );
+      transferPropIn[1].ioPointers.dstPtr = pInputBlock +  nextPingPongOffset;
+
+      transferPropIn[1] .transferDim.sicnt1 = (height % blockHeight);
+      transferPropIn[1] .transferDim.sicnt3 = 1;
+
+      transferPropIn[1] .transferDim.dicnt1 = (height % blockHeight);
+      transferPropIn[1] .transferDim.ddim2 = nextPingPongJump;
+
+      if ( (transferPropIn[0].transferDim.dicnt2 * transferPropIn[0].transferDim.dicnt3 )% 2 == 0 )
+      {
+        /* Numbe of transfers in a block is even so next block row should start with Pong buffer and jump back to ping buffer,
+        Hence the negative offset */
+        nextPingPongOffset = pingPongOffsetIn;
+        nextPingPongJump  = -pingPongOffsetIn;
+      }
+      else
+      {
+        nextPingPongOffset = 0;
+        nextPingPongJump  = pingPongOffsetIn;
+      }
+
+      transferPropOut[1] = transferPropOut[0];
+      transferPropOut[1].ioPointers.srcPtr = pOutputBlock +  nextPingPongOffset;
+
+      transferPropOut[1].ioPointers.dstPtr = pOutput +  ( transferPropOut[0].transferDim.dicnt3  * transferPropOut[0].transferDim.ddim3 );
+      transferPropOut[1] .transferDim.sicnt1 = (height % blockHeight);
+      transferPropOut[1] .transferDim.dicnt3 = 1;
+
+      transferPropOut[1] .transferDim.dicnt1 = (height % blockHeight);
+      transferPropOut[1] .transferDim.sdim2 = nextPingPongJump;
+    }
+    else
+    {
+
+    }
+
+    numTotalTrReq = numHorzTrsRequired * numVertTrRowsRequired;
+
+    if ( numTotalTrReq > 2 )
+    {
+      for ( i = 1 ; i < numVertTrRowsRequired; i ++)
+      {
+          for ( j = 0 ; j < numHorzTrsRequired; j ++)
+          {
+              transferPropPrev = &transferPropIn[ numHorzTrsRequired *  (i - 1) + j ];
+
+              transferPropIn[ numHorzTrsRequired * i + j ] = *transferPropPrev;
+              transferPropIn[ numHorzTrsRequired * i + j ].ioPointers.srcPtr = transferPropPrev->ioPointers.srcPtr + ( transferPropPrev->transferDim.sicnt1 * transferPropPrev->transferDim.sdim1 );
+
+              if ( ( transferPropIn[ numHorzTrsRequired *  (i - 1)].transferDim.sicnt2 % 2 ) == 0 )
+              {
+                   /* This case the number of blocks in a block row is odd so every next block row ping pong buffers will alternate */
+                  if ( (i % 2) != 0 )
+                  {
+                    transferPropIn[ numHorzTrsRequired * i + j ].ioPointers.dstPtr  = pInputBlock + pingPongOffsetIn;
+                    transferPropIn[ numHorzTrsRequired * i + j ].transferDim.ddim2 = (-pingPongOffsetIn);
+                    transferPropIn[ numHorzTrsRequired * i + j ].transferDim.ddim3 = 0;
+                  }
+                  else
+                  {
+                    transferPropIn[ numHorzTrsRequired * i + j ].ioPointers.dstPtr  = pInputBlock;
+                    transferPropIn[ numHorzTrsRequired * i + j ].transferDim.ddim2 = pingPongOffsetOut;
+                    transferPropIn[ numHorzTrsRequired * i + j ].transferDim.ddim3 = 0;
+                  }
+              }
+
+              if ( i == (numVertTrRowsRequired - 1))
+              {
+                  if ((height % blockHeight) != 0 )
+                  {
+                    /* for last block row update the height dimension */
+                    transferPropIn[ numHorzTrsRequired * i  + j].transferDim.sicnt1 = (height % blockHeight);
+                    transferPropIn[ numHorzTrsRequired * i  + j].transferDim.dicnt1 = (height % blockHeight);
+                  }
+              }
+
+              transferPropPrev = &transferPropOut[ numHorzTrsRequired *  (i - 1) + j ];
+              transferPropOut[ numHorzTrsRequired * i + j ] = *transferPropPrev;
+              transferPropOut[ numHorzTrsRequired * i + j ].ioPointers.srcPtr = transferPropPrev->ioPointers.srcPtr;
+              transferPropOut[ numHorzTrsRequired * i + j ].ioPointers.dstPtr  = transferPropPrev->ioPointers.dstPtr + ( transferPropPrev->transferDim.dicnt1 * transferPropPrev->transferDim.ddim1 );
+
+              if ( ( transferPropOut[ numHorzTrsRequired *  (i - 1)].transferDim.dicnt2 % 2 ) == 0 )
+              {
+               /* This case the number of blocks in a block row is odd so every next block row ping pong buffers will alternate */
+                  if ( (i % 2) != 0 )
+                  {
+                    transferPropOut[ numHorzTrsRequired * i + j ].ioPointers.srcPtr  = pOutputBlock + pingPongOffsetOut;
+                    transferPropOut[ numHorzTrsRequired * i + j].transferDim.sdim2 = -pingPongOffsetOut;
+                    transferPropOut[ numHorzTrsRequired * i + j].transferDim.sdim3 = 0;
+                  }
+                  else
+                  {
+                    transferPropOut[ numHorzTrsRequired * i + j].ioPointers.srcPtr  = pOutputBlock ;
+                    transferPropOut[ numHorzTrsRequired * i + j].transferDim.sdim2 = pingPongOffsetOut;
+                    transferPropOut[ numHorzTrsRequired * i + j].transferDim.sdim3 = 0;
+                  }
+              }
+
+              if ( i == (numVertTrRowsRequired - 1))
+              {
+                if ((height % blockHeight) != 0 )
+                {
+                  transferPropOut[ numHorzTrsRequired * i  + j].transferDim.sicnt1 = (height % blockHeight);
+                  transferPropOut[ numHorzTrsRequired * i  + j].transferDim.dicnt1 = (height % blockHeight);
+                }
+              }
+          }
+      }
+    }
+
+    return numTotalTrReq;
+
+}
+
+typedef enum{
+  DMAUTILSTESTAUTOINC_CHANNEL_IN,
+  DMAUTILSTESTAUTOINC_CHANNEL_OUT,
+  DMAUTILSTESTAUTOINC_CHANNEL_MAX
+}dmautilsTestAutoInc_Channel;
+
+
+#define DMAUTILSTESTAUTOINC_MAX_NUM_TR  (32)
+#define TEST_ALIGN_SIZE (128U)
+
+
+/* This function is main function exposed to user*/
+int32_t blockCopy(
+  uint8_t*   pInput,
+  uint8_t*   pOutput,
+  uint8_t*   pInputBlock,
+  uint8_t*   pOutputBlock,
+  uint16_t   width,
+  uint16_t   height,
+  uint16_t   blockWidth,
+  uint16_t   blockHeight,
+  uint16_t   inPitch,
+  uint16_t   outPitch,
+  uint8_t*   pIntMmeBase,
+  uint32_t   intMemSize,
+  uint8_t    useDMA
+  )
+{
+  int32_t retVal = UDMA_SOK ;
+
+  if(useDMA == 0)
+  {
+    //call the kernel directly on data in DDR
+    blockCopyKernel(pInput,
+      pOutput,
+      width,
+      height,
+      inPitch,
+      outPitch);
+  }
+  else
+  {
+    uint32_t intMemUsedSize = 0;
+    uint8_t *dmautilsContext;
+    uint8_t *inTrMem;
+    uint8_t *outTrMem;
+    uint32_t pingPongFlag = 0;
+    uint32_t blockIdx = 0;
+    uint32_t firstTrigger = 0;
+    uint32_t inTrSize;
+    uint32_t outTrSize;
+    uint32_t numTrReq;
+    uint32_t dmaChannels;
+
+    DmaUtilsAutoInc3d_InitParam initParams;
+    DmaUtilsAutoInc3d_ChannelInitParam chInitParams[DMAUTILSTESTAUTOINC_CHANNEL_MAX];
+    DmaUtilsAutoInc3d_TrPrepareParam trPrepParamIn;
+    DmaUtilsAutoInc3d_TrPrepareParam trPrepParamOut;
+    DmaUtilsAutoInc3d_TransferProp *transferPropIn;
+    DmaUtilsAutoInc3d_TransferProp *transferPropOut;
+
+
+    Udma_InitPrms   initPrms;
+    struct Udma_DrvObj      udmaDrvObj;
+    uint32_t        instId;
+
+    Udma_DrvHandle  drvHandle = &udmaDrvObj;
+
+    instId = UDMA_INST_ID_MAIN_0;
+    UdmaInitPrms_init(instId, &initPrms);
+    initPrms.printFxn = &testDmaAutoIncPrintf;
+    retVal = Udma_init(drvHandle, &initPrms);
+    if(UDMA_SOK != retVal)
+    {
+        testDmaAutoIncPrintf("[Error] UDMA init failed!!\n");
+    }
+
+
+    dmaChannels = DMAUTILSTESTAUTOINC_CHANNEL_MAX; /* One for input and other for output */
+
+    //Allocation/Assignment of buffers in internal memory
+    dmautilsContext     =  pIntMmeBase + intMemUsedSize ;
+    intMemUsedSize += TEST_DMAUTILS_ALIGN_CEIL(DmaUtilsAutoInc3d_getContextSize(dmaChannels), TEST_ALIGN_SIZE);
+
+    transferPropIn = (DmaUtilsAutoInc3d_TransferProp * ) (pIntMmeBase + intMemUsedSize );
+    intMemUsedSize += TEST_DMAUTILS_ALIGN_CEIL((DMAUTILSTESTAUTOINC_MAX_NUM_TR * sizeof(DmaUtilsAutoInc3d_TransferProp)), TEST_ALIGN_SIZE);
+
+    transferPropOut = (DmaUtilsAutoInc3d_TransferProp * ) (pIntMmeBase + intMemUsedSize );
+    intMemUsedSize += TEST_DMAUTILS_ALIGN_CEIL((DMAUTILSTESTAUTOINC_MAX_NUM_TR * sizeof(DmaUtilsAutoInc3d_TransferProp)), TEST_ALIGN_SIZE);
+
+    initParams.contextSize = DmaUtilsAutoInc3d_getContextSize(dmaChannels);
+    initParams.numChannels = dmaChannels;
+    initParams.traceLogLevel    = 1;
+    initParams.udmaDrvHandle = drvHandle;
+    initParams.DmaUtilsVprintf = vprintf;
+
+    numTrReq = testDmaAutoIncNumTrRequired(width, height, blockWidth, blockHeight, NULL, NULL);
+
+    chInitParams[DMAUTILSTESTAUTOINC_CHANNEL_IN].dmaQueNo  = 0;
+    chInitParams[DMAUTILSTESTAUTOINC_CHANNEL_OUT].dmaQueNo  = 0;
+
+    if ( numTrReq > 1)
+    {
+        chInitParams[DMAUTILSTESTAUTOINC_CHANNEL_IN].druOwner    = DMAUTILSAUTOINC3D_DRUOWNER_UDMA;
+        chInitParams[DMAUTILSTESTAUTOINC_CHANNEL_OUT].druOwner    = DMAUTILSAUTOINC3D_DRUOWNER_UDMA;
+    }
+    else
+    {
+        chInitParams[DMAUTILSTESTAUTOINC_CHANNEL_IN].druOwner    = DMAUTILSAUTOINC3D_DRUOWNER_DIRECT_TR;
+        chInitParams[DMAUTILSTESTAUTOINC_CHANNEL_OUT].druOwner    = DMAUTILSAUTOINC3D_DRUOWNER_DIRECT_TR;
+    }
+
+
+    retVal = DmaUtilsAutoInc3d_init(dmautilsContext, &initParams, chInitParams);
+    if ( retVal != UDMA_SOK )
+    {
+      goto Exit;
+    }
+
+    numTrReq =     testDmaAutoIncSetupTr(width,
+                                                height,
+                                                blockWidth,
+                                                blockHeight,
+                                                inPitch,
+                                                outPitch,
+                                                pInput,
+                                                pInputBlock,
+                                                pOutput,
+                                                pOutputBlock,
+                                                &transferPropIn[0],
+                                                &transferPropOut[0]);
+
+    inTrSize = DmaUtilsAutoInc3d_getTrMemReq(numTrReq);
+    outTrSize = DmaUtilsAutoInc3d_getTrMemReq(numTrReq);
+
+    inTrMem = pIntMmeBase + intMemUsedSize ;
+
+    intMemUsedSize += TEST_DMAUTILS_ALIGN_CEIL(inTrSize, TEST_ALIGN_SIZE);
+
+    outTrMem = pIntMmeBase + intMemUsedSize ;
+    intMemUsedSize += TEST_DMAUTILS_ALIGN_CEIL(outTrSize, TEST_ALIGN_SIZE);
+
+    trPrepParamIn.channelId = DMAUTILSTESTAUTOINC_CHANNEL_IN;
+    trPrepParamIn.numTRs  = numTrReq;
+    trPrepParamIn.trMem     = inTrMem;
+    trPrepParamIn.trMemSize = inTrSize;
+
+    retVal = DmaUtilsAutoInc3d_prepareTr(&trPrepParamIn, &transferPropIn[0]);
+
+    if ( retVal != UDMA_SOK )
+    {
+      goto Exit;
+    }
+
+
+    trPrepParamOut.channelId = DMAUTILSTESTAUTOINC_CHANNEL_OUT;
+    trPrepParamOut.numTRs  = numTrReq;
+    trPrepParamOut.trMem     = outTrMem;
+    trPrepParamOut.trMemSize = outTrSize;
+
+    retVal = DmaUtilsAutoInc3d_prepareTr(&trPrepParamOut, &transferPropOut[0]);
+
+    if ( retVal != UDMA_SOK )
+    {
+      goto Exit;
+    }
+
+    if(intMemUsedSize > intMemSize)
+    {
+      printf("insufficient memory, required is %d vs provided %d\n",intMemUsedSize, intMemSize);
+      return -1 ;
+    }
+
+    retVal = DmaUtilsAutoInc3d_configure(dmautilsContext, DMAUTILSTESTAUTOINC_CHANNEL_IN, inTrMem, numTrReq);
+
+    if ( retVal != UDMA_SOK )
+    {
+      goto Exit;
+    }
+
+    retVal = DmaUtilsAutoInc3d_configure(dmautilsContext, DMAUTILSTESTAUTOINC_CHANNEL_OUT, outTrMem, numTrReq);
+
+    if ( retVal != UDMA_SOK )
+    {
+      goto Exit;
+    }
+
+
+    //DMA trigger for pipe-up, out transfer is dummy and handled inside DMA utility
+    DmaUtilsAutoInc3d_trigger(dmautilsContext, DMAUTILSTESTAUTOINC_CHANNEL_IN);
+    //Wait for previous transfer of in
+    DmaUtilsAutoInc3d_wait(dmautilsContext, DMAUTILSTESTAUTOINC_CHANNEL_IN);
+
+    pingPongFlag^=1;
+    blockIdx = 0;
+
+    while (1)
+    {
+
+      pingPongFlag^=1;
+
+      if (firstTrigger != 0 )
+      {
+        blockIdx = DmaUtilsAutoInc3d_trigger(dmautilsContext, DMAUTILSTESTAUTOINC_CHANNEL_OUT) ;
+      }
+
+      //DMA trigger for next in buffer
+      if ( blockIdx != 1)
+      {
+        DmaUtilsAutoInc3d_trigger(dmautilsContext, DMAUTILSTESTAUTOINC_CHANNEL_IN);
+      }
+
+      blockCopyKernel(
+        pInputBlock   + pingPongFlag * blockWidth * blockHeight,
+        pOutputBlock + pingPongFlag * blockWidth * blockHeight,
+        blockWidth,
+        blockHeight,
+        blockWidth,
+        blockWidth);
+
+
+      if ( blockIdx != 1 )
+      {
+        DmaUtilsAutoInc3d_wait(dmautilsContext, DMAUTILSTESTAUTOINC_CHANNEL_IN);
+      }
+      //Wait for previous transfer out
+       if (firstTrigger != 0 )
+      {
+        DmaUtilsAutoInc3d_wait(dmautilsContext, DMAUTILSTESTAUTOINC_CHANNEL_OUT)  ;
+      }
+      else
+      {
+        firstTrigger = 1;
+      }
+
+
+      if ( blockIdx == 1 )
+        break;
+
+    }
+
+    DmaUtilsAutoInc3d_trigger(dmautilsContext, DMAUTILSTESTAUTOINC_CHANNEL_OUT) ;
+
+    //Need to wait for last out transfer
+    DmaUtilsAutoInc3d_wait(dmautilsContext, DMAUTILSTESTAUTOINC_CHANNEL_OUT)  ;
+
+
+    retVal = DmaUtilsAutoInc3d_deconfigure(dmautilsContext, DMAUTILSTESTAUTOINC_CHANNEL_IN, inTrMem, 1);
+
+     if ( retVal != UDMA_SOK )
+     {
+       goto Exit;
+     }
+
+     retVal = DmaUtilsAutoInc3d_deconfigure(dmautilsContext, DMAUTILSTESTAUTOINC_CHANNEL_OUT, outTrMem, 1);
+
+     if ( retVal != UDMA_SOK )
+     {
+       goto Exit;
+     }
+
+
+
+    retVal = DmaUtilsAutoInc3d_deinit(dmautilsContext);
+
+     if ( retVal != UDMA_SOK )
+     {
+       goto Exit;
+     }
+
+
+    retVal = Udma_deinit(drvHandle);
+    if ( retVal != UDMA_SOK )
+     {
+       goto Exit;
+     }
+  }
+
+
+Exit:
+  return retVal ;
+}
diff --git a/packages/ti/drv/udma/dmautils/test/dmautils_autoincrement_test/dmautils_autoincrement_example.h b/packages/ti/drv/udma/dmautils/test/dmautils_autoincrement_test/dmautils_autoincrement_example.h
new file mode 100644 (file)
index 0000000..8f018ef
--- /dev/null
@@ -0,0 +1,86 @@
+/*
+ *  Copyright (c) Texas Instruments Incorporated 2018
+ *
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions
+ *  are met:
+ *
+ *    Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *
+ *    Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the
+ *    distribution.
+ *
+ *    Neither the name of Texas Instruments Incorporated nor the names of
+ *    its contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*============================================================================*/
+/*============================================================================*/
+
+/**
+----------------------------------------------------------------------------
+@file    edma_utils_autoincrement_example.h
+@brief   Demostrates a simple example of auto increment DMA to allow DSP to
+operate a function on internal memory and transfer back the result.
+@version 0.0 (Jan 2017) : First version
+----------------------------------------------------------------------------
+*/
+
+#ifndef EDMA_UTILS_AUTOINCREMENT_EXAMPLE_H_
+#define EDMA_UTILS_AUTOINCREMENT_EXAMPLE_H_
+
+/*
+ This function accepts an input image in external memory and write back to
+ external memory after performing a horizontal flip of the image.
+ The function can be called to work on direct external memory with cache
+ by setting useDMA = 0
+ The function can also be called to work using DMA, in that case user should
+ provide internal memory buffer pointed by pIntMmeBase and available size
+ by setting intMemSize. In case the internal memory is not sufficient, the
+ function returns -1 and prints the required memory size
+
+ whiel using DMA; this function tarnsfers an entire row of data in internal
+ memory, then performs the flip operation and writes the result in internal
+ memory. The result is then transfered back to external memory using DMA.
+ In order to have DMA and CPU operate in parallel, 2 instances of input and
+ output are created in internal memory
+
+ The prupose of the function is to act as an example for DMA usage so the
+ default core function of fliping the image is in natural C
+
+*/
+
+int32_t blockCopy(
+  uint8_t*   pInput,
+  uint8_t*   pOutput,
+  uint8_t*   pInputBlock,
+  uint8_t*   pOutputBlock,
+  uint16_t   width,
+  uint16_t   height,
+  uint16_t   blockWidth,
+  uint16_t   blockHeight,
+  uint16_t   inPitch,
+  uint16_t   outPitch,
+  uint8_t*   pIntMmeBase,
+  uint32_t   intMemSize,
+  uint8_t    useDMA
+  );
+
+
+#endif /*EDMA_UTILS_AUTOINCREMENT_EXAMPLE_H_*/
diff --git a/packages/ti/drv/udma/dmautils/test/dmautils_autoincrement_test/dmautils_autoincrement_test.c b/packages/ti/drv/udma/dmautils/test/dmautils_autoincrement_test/dmautils_autoincrement_test.c
new file mode 100644 (file)
index 0000000..55bd46e
--- /dev/null
@@ -0,0 +1,345 @@
+/*
+ *  Copyright (c) Texas Instruments Incorporated 2018
+ *
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions
+ *  are met:
+ *
+ *    Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *
+ *    Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the
+ *    distribution.
+ *
+ *    Neither the name of Texas Instruments Incorporated nor the names of
+ *    its contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*============================================================================*/
+/*============================================================================*/
+
+/**
+ *  \file dmautils_autoincrement_test.c
+ *
+ *  \brief Simple application demonstrating 2D auto increment feature of dmautils along with handling 
+ *        of last block.
+ *
+ *  Requirement: DOX_REQ_TAG(PDK-2643:PDK-2649:PDK-2646)
+ */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <stdint.h>
+#include <string.h>
+#if defined(HOST_EMULATION)
+#include <malloc.h>
+#endif
+
+#include "dmautils_autoincrement_example.h"
+#include "ti/drv/sciclient/sciclient.h"
+
+#define TEST_malloc(heap, size)   malloc(size)
+#define TEST_free(ptr)            free(ptr)
+
+#define L2SRAM_SIZE (64*1024)
+
+#ifdef _MSC_VER
+#ifndef __attribute__
+#define __attribute__()
+#endif
+#endif
+uint8_t L2SRAM[L2SRAM_SIZE] __attribute__((aligned(128)));
+
+
+typedef struct
+{
+  uint32_t testcaseId;
+  uint32_t requirementId;
+  uint32_t imageWidth;
+  uint32_t imageHeight;
+  uint32_t blockWidth;
+  uint32_t blockHeight;
+}dmautilsAutoIncTest_config;
+
+
+dmautilsAutoIncTest_config gTestConfig[] =
+{
+    {
+        0,
+        1,
+        40,/*Image Width */
+        16,/*Image Height */
+        8,/*Image blockWidth */
+        8/*Image blockHeight */
+    },
+
+    {
+          1,
+          1,
+          44,/*Image Width */
+          16,/*Image Height */
+          8,/*Image blockWidth */
+          8/*Image blockHeight */
+     },
+     {
+          2,
+          1,
+          44,/*Image Width */
+          35,/*Image Height */
+          8,/*Image blockWidth */
+          8/*Image blockHeight */
+     },
+
+     {
+          3,
+          1,
+          127,/*Image Width */
+          16,/*Image Height */
+          16,/*Image blockWidth */
+          8/*Image blockHeight */
+     }
+
+};
+
+
+int32_t test_sciclientDmscGetVersion(char *version_str, uint32_t version_str_size)
+{
+    int32_t retVal = 0;
+
+    const Sciclient_ReqPrm_t      reqPrm =
+    {
+        TISCI_MSG_VERSION,
+        TISCI_MSG_FLAG_AOP,
+        NULL,
+        0,
+        SCICLIENT_SERVICE_WAIT_FOREVER
+    };
+    struct tisci_msg_version_resp response;
+    Sciclient_RespPrm_t           respPrm =
+    {
+        0,
+        (uint8_t *) &response,
+        sizeof (response)
+    };
+
+    retVal = Sciclient_service(&reqPrm, &respPrm);
+    if (0 == retVal)
+    {
+        if (respPrm.flags == TISCI_MSG_FLAG_ACK)
+        {
+            if(version_str == NULL)
+            {
+                printf("SCICLIENT: DMSC FW version [%s]\n", (char *) response.str);
+                printf("SCICLIENT: DMSC FW revision 0x%x  \n", response.version);
+                printf("SCICLIENT: DMSC FW ABI revision %d.%d\n",
+                    response.abi_major, response.abi_minor);
+            }
+            else
+            {
+                snprintf(version_str, version_str_size, "version %s, revision 0x%x, ABI %d.%d",
+                    (char *) response.str,
+                    response.version,
+                    response.abi_major, response.abi_minor
+                    );
+            }
+        }
+        else
+        {
+            retVal = -1;
+        }
+    }
+    if(retVal!=0)
+    {
+        printf("SCICLIENT: ERROR: DMSC Firmware Get Version failed !!!\n");
+    }
+
+    return (retVal);
+}
+
+int32_t main()
+{
+  uint16_t   width;
+  uint16_t   height;
+  uint16_t   inPitch;
+  uint16_t   outPitch;
+  uint16_t   blockWidth;
+  uint16_t   blockHeight;
+
+  int32_t i, j;
+  uint8_t *input     = NULL;
+  uint8_t  *output    = NULL;
+  uint8_t  *refOut    = NULL;
+
+  uint8_t * pInputBlock;
+  uint8_t * pOutputBlock;
+
+  uint8_t*    pIntMmeBase  = L2SRAM;
+  uint32_t   intMemSize   = L2SRAM_SIZE;
+  uint8_t    useDMA      ;
+  uint8_t status = 1;
+  uint32_t testcaseIdx;
+
+#ifdef HOST_EMULATION
+#if defined(_MSC_VER)
+    pIntMmeBase = (uint8_t*)_aligned_malloc(L2SRAM_SIZE, L2SRAM_SIZE);
+#else
+    pIntMmeBase = (uint8_t*)memalign(L2SRAM_SIZE, L2SRAM_SIZE);
+#endif
+#else
+    int32_t retVal = 0;
+    Sciclient_ConfigPrms_t  sciClientCfg;
+    Sciclient_configPrmsInit(&sciClientCfg);
+    sciClientCfg.isSecureMode = 1;
+    retVal = Sciclient_init(&sciClientCfg);
+    if(retVal!=0)
+    {
+      printf("Sciclient Init Failed \n");
+      goto Exit;
+    }
+
+    test_sciclientDmscGetVersion(NULL, 0 ); 
+#endif
+
+  for (testcaseIdx = 0; testcaseIdx < sizeof(gTestConfig)/ sizeof(dmautilsAutoIncTest_config); testcaseIdx++)
+  {
+      width    = gTestConfig[testcaseIdx].imageWidth;
+      height   = gTestConfig[testcaseIdx].imageHeight;
+printf("wi %d \n", width);
+      printf("height %d \n", height);
+
+      inPitch  = gTestConfig[testcaseIdx].imageWidth;
+      outPitch = gTestConfig[testcaseIdx].imageWidth;
+      blockWidth = gTestConfig[testcaseIdx].blockWidth;
+      blockHeight  = gTestConfig[testcaseIdx].blockHeight;
+
+      /* Buffer allocations for input, output and reference output  */
+
+      input = (uint8_t *)malloc(width * height);
+      output = (uint8_t *)malloc(width * height);
+      refOut = (uint8_t *)malloc(width * height);
+
+      pInputBlock = (uint8_t *)malloc(blockWidth * blockHeight * 2);
+      pOutputBlock = (uint8_t *)malloc(blockWidth * blockHeight * 2);
+
+      memset(output, 0, width * height);
+      memset(refOut, 0, width * height);
+
+      /* Random pattern generator for input  */
+      for ( j = 0 ; j < height; j++)
+      {
+        for (i = 0; i < width; i++)
+        {
+          input[i + j * inPitch] = i + j* 56;
+        }
+      }
+
+      //DMA based function call
+      useDMA = 1;
+
+#if (!HOST_EMULATION) && (CORE_DSP)
+      tscStart = _TSC_read();
+#endif
+
+      blockCopy(
+        input,
+        output,
+        pInputBlock,
+        pOutputBlock,
+        width,
+        height,
+        blockWidth,
+        blockHeight,
+        inPitch,
+        outPitch,
+        pIntMmeBase,
+        intMemSize,
+        useDMA );
+
+#if (!HOST_EMULATION) && (CORE_DSP)
+      tscEnd = _TSC_read();
+      printf("Cycles - Using DMA = %llu\n",(tscEnd-tscStart));
+#endif
+
+      useDMA = 0;
+#if (!HOST_EMULATION) && (CORE_DSP)
+      tscStart = _TSC_read();
+#endif
+      blockCopy(
+        input,
+        refOut,
+        pInputBlock,
+        pOutputBlock,
+        width,
+        height,
+        blockWidth,
+        blockHeight,
+        inPitch,
+        outPitch,
+        pIntMmeBase,
+        intMemSize,
+        useDMA );
+#if (!HOST_EMULATION) && (CORE_DSP)
+      tscEnd = _TSC_read();
+      printf("Cycles - Without using DMA = %llu\n",(tscEnd-tscStart));
+#endif
+
+      /*Compare output with reference output */
+      for(j = 0; j < height; j++)
+      {
+        for(i = 0; i < width; i++)
+        {
+          if(output[j * outPitch + i] != refOut[j * outPitch + i])
+          {
+            status = 0;
+            printf("[%d][%d] - output = %d\trefOutput = %d\n",j,i,output[j*outPitch + i], refOut[j*outPitch + i]);
+            break;
+          }
+          if ( status == 0 )
+          {
+             break;
+          }
+        }
+      }
+      if(status == 1)
+      {
+        printf("DMAUtils TestCase %d,        PASSED \n", gTestConfig[testcaseIdx].testcaseId);
+      }
+      else
+      {
+        printf("\nDMAUtils TestCase %d,        FAILED!!!!!! \n", gTestConfig[testcaseIdx].testcaseId);
+      }
+
+      free(input);
+      free(output);
+      free(refOut);
+      free(pInputBlock);
+      free(pOutputBlock);
+  }
+
+#ifdef HOST_EMULATION
+#if defined(_MSC_VER)
+      _aligned_free(pIntMmeBase);
+#else
+      free(pIntMmeBase);
+#endif
+#endif
+Exit:
+  return 0;
+}
+
diff --git a/packages/ti/drv/udma/dmautils/test/dmautils_autoincrement_test/makefile b/packages/ti/drv/udma/dmautils/test/dmautils_autoincrement_test/makefile
new file mode 100644 (file)
index 0000000..fd263b5
--- /dev/null
@@ -0,0 +1,43 @@
+#
+# This file is the makefile for building DMA utils test app.
+#
+include $(PDK_INSTALL_PATH)/ti/build/Rules.make
+
+APP_NAME = dmautils_baremetal_autoincrement_testapp
+
+SRCDIR = .
+INCDIR = .
+
+# List all the external components/interfaces, whose interface header files
+#  need to be included for this component
+INCLUDE_EXTERNAL_INTERFACES = pdk
+
+# List all the components required by the application
+COMP_LIST_COMMON = csl udma dmautils sciclient osal_nonos
+
+# Common source files and CFLAGS across all platforms and cores
+PACKAGE_SRCS_COMMON = .
+SRCS_COMMON = dmautils_autoincrement_example.c dmautils_autoincrement_test.c
+
+CFLAGS_LOCAL_COMMON = $(PDK_CFLAGS)
+
+# Core/SoC/platform specific source files and CFLAGS
+# Example:
+#   SRCS_<core/SoC/platform-name> =
+#   CFLAGS_LOCAL_<core/SoC/platform-name> =
+
+# Include common make files
+
+EXTERNAL_LNKCMD_FILE_LOCAL := c7x_vcop_lnk.cmd
+
+ifeq ($(MAKERULEDIR), )
+#Makerule path not defined, define this and assume relative path from ROOTDIR
+  MAKERULEDIR := $(ROOTDIR)/ti/build/makerules
+  export MAKERULEDIR
+endif
+include $(MAKERULEDIR)/common.mk
+
+# OBJs and libraries are built by using rule defined in rules_<target>.mk
+#     and need not be explicitly specified here
+
+# Nothing beyond this point
diff --git a/packages/ti/drv/udma/docs/Doxyfile b/packages/ti/drv/udma/docs/Doxyfile
new file mode 100755 (executable)
index 0000000..554e981
--- /dev/null
@@ -0,0 +1,235 @@
+# Doxyfile 1.5.1-p1
+
+#---------------------------------------------------------------------------
+# Project related configuration options
+#---------------------------------------------------------------------------
+PROJECT_NAME           = "UDMA Driver"
+PROJECT_NUMBER         = 3.03.00
+OUTPUT_DIRECTORY       = ./docs/doxygen
+CREATE_SUBDIRS         = NO
+OUTPUT_LANGUAGE        = English
+BRIEF_MEMBER_DESC      = YES
+REPEAT_BRIEF           = YES
+ABBREVIATE_BRIEF       = "The $name class" \
+                         "The $name widget" \
+                         "The $name file" \
+                         is \
+                         provides \
+                         specifies \
+                         contains \
+                         represents \
+                         a \
+                         an \
+                         the
+ALWAYS_DETAILED_SEC    = NO
+INLINE_INHERITED_MEMB  = NO
+FULL_PATH_NAMES        = NO
+STRIP_FROM_PATH        =
+STRIP_FROM_INC_PATH    =
+SHORT_NAMES            = NO
+JAVADOC_AUTOBRIEF      = NO
+MULTILINE_CPP_IS_BRIEF = NO
+INHERIT_DOCS           = YES
+SEPARATE_MEMBER_PAGES  = NO
+TAB_SIZE               = 8
+ALIASES                =
+OPTIMIZE_OUTPUT_FOR_C  = YES
+OPTIMIZE_OUTPUT_JAVA   = NO
+BUILTIN_STL_SUPPORT    = NO
+DISTRIBUTE_GROUP_DOC   = YES
+SUBGROUPING            = YES
+#---------------------------------------------------------------------------
+# Build related configuration options
+#---------------------------------------------------------------------------
+EXTRACT_ALL            = NO
+EXTRACT_PRIVATE        = NO
+EXTRACT_STATIC         = YES
+EXTRACT_LOCAL_CLASSES  = YES
+EXTRACT_LOCAL_METHODS  = NO
+HIDE_UNDOC_MEMBERS     = NO
+HIDE_UNDOC_CLASSES     = YES
+HIDE_FRIEND_COMPOUNDS  = NO
+HIDE_IN_BODY_DOCS      = NO
+INTERNAL_DOCS          = NO
+CASE_SENSE_NAMES       = NO
+HIDE_SCOPE_NAMES       = NO
+SHOW_INCLUDE_FILES     = YES
+INLINE_INFO            = YES
+SORT_MEMBER_DOCS       = YES
+SORT_BRIEF_DOCS        = NO
+SORT_BY_SCOPE_NAME     = NO
+GENERATE_TODOLIST      = YES
+GENERATE_TESTLIST      = YES
+GENERATE_BUGLIST       = YES
+GENERATE_DEPRECATEDLIST= YES
+ENABLED_SECTIONS       =
+MAX_INITIALIZER_LINES  = 30
+SHOW_USED_FILES        = YES
+FILE_VERSION_FILTER    =
+#---------------------------------------------------------------------------
+# configuration options related to warning and progress messages
+#---------------------------------------------------------------------------
+QUIET                  = NO
+WARNINGS               = YES
+WARN_IF_UNDOCUMENTED   = YES
+WARN_IF_DOC_ERROR      = YES
+WARN_NO_PARAMDOC       = NO
+WARN_FORMAT            = "$file:$line: $text"
+WARN_LOGFILE           =
+#---------------------------------------------------------------------------
+# configuration options related to the input files
+#---------------------------------------------------------------------------
+INPUT                  = ./udma.h \
+                         ./include \
+                         ./soc/V0/udma_soc.h \
+                         ../../csl/csl_types.h \
+                         ../../csl/src/ip/dru/V0/csl_dru.h \
+                         ../../csl/src/ip/udmap/V0/csl_udmap_tr.h \
+                         ../../csl/src/ip/ringacc/V0/csl_ringacc.h
+
+FILE_PATTERNS          = *.h
+
+RECURSIVE              = NO
+EXCLUDE                = NO
+EXCLUDE_SYMLINKS       = NO
+EXCLUDE_PATTERNS       =
+EXAMPLE_PATH           = ./docs/doxygen
+EXAMPLE_PATTERNS       = *
+EXAMPLE_RECURSIVE      = NO
+IMAGE_PATH             =
+INPUT_FILTER           =
+FILTER_PATTERNS        =
+FILTER_SOURCE_FILES    = NO
+#---------------------------------------------------------------------------
+# configuration options related to source browsing
+#---------------------------------------------------------------------------
+SOURCE_BROWSER         = NO
+INLINE_SOURCES         = NO
+STRIP_CODE_COMMENTS    = YES
+REFERENCED_BY_RELATION = NO
+REFERENCES_RELATION    = NO
+REFERENCES_LINK_SOURCE = YES
+USE_HTAGS              = NO
+VERBATIM_HEADERS       = NO
+#---------------------------------------------------------------------------
+# configuration options related to the alphabetical class index
+#---------------------------------------------------------------------------
+ALPHABETICAL_INDEX     = NO
+COLS_IN_ALPHA_INDEX    = 5
+IGNORE_PREFIX          =
+#---------------------------------------------------------------------------
+# configuration options related to the HTML output
+#---------------------------------------------------------------------------
+GENERATE_HTML          = YES
+HTML_OUTPUT            = html
+HTML_FILE_EXTENSION    = .html
+HTML_HEADER            = ./docs/doxygen/tiheader.htm
+HTML_FOOTER            = ./docs/doxygen/tifooter.htm
+HTML_STYLESHEET        =
+GENERATE_HTMLHELP      = NO
+CHM_FILE               = ..\..\udma.chm
+HHC_LOCATION           = hhc.exe
+GENERATE_CHI           = NO
+BINARY_TOC             = NO
+TOC_EXPAND             = NO
+DISABLE_INDEX          = NO
+ENUM_VALUES_PER_LINE   = 4
+GENERATE_TREEVIEW      = NO
+TREEVIEW_WIDTH         = 250
+#---------------------------------------------------------------------------
+# configuration options related to the LaTeX output
+#---------------------------------------------------------------------------
+GENERATE_LATEX         = NO
+LATEX_OUTPUT           = latex
+LATEX_CMD_NAME         = latex
+MAKEINDEX_CMD_NAME     = makeindex
+COMPACT_LATEX          = NO
+PAPER_TYPE             = a4wide
+EXTRA_PACKAGES         =
+LATEX_HEADER           =
+PDF_HYPERLINKS         = YES
+USE_PDFLATEX           = YES
+LATEX_BATCHMODE        = NO
+LATEX_HIDE_INDICES     = NO
+#---------------------------------------------------------------------------
+# configuration options related to the RTF output
+#---------------------------------------------------------------------------
+GENERATE_RTF           = NO
+RTF_OUTPUT             = rtf
+COMPACT_RTF            = NO
+RTF_HYPERLINKS         = NO
+RTF_STYLESHEET_FILE    =
+RTF_EXTENSIONS_FILE    =
+#---------------------------------------------------------------------------
+# configuration options related to the man page output
+#---------------------------------------------------------------------------
+GENERATE_MAN           = NO
+MAN_OUTPUT             = man
+MAN_EXTENSION          = .3
+MAN_LINKS              = NO
+#---------------------------------------------------------------------------
+# configuration options related to the XML output
+#---------------------------------------------------------------------------
+GENERATE_XML           = NO
+XML_OUTPUT             = xml
+XML_PROGRAMLISTING     = YES
+#---------------------------------------------------------------------------
+# configuration options for the AutoGen Definitions output
+#---------------------------------------------------------------------------
+GENERATE_AUTOGEN_DEF   = NO
+#---------------------------------------------------------------------------
+# configuration options related to the Perl module output
+#---------------------------------------------------------------------------
+GENERATE_PERLMOD       = NO
+PERLMOD_LATEX          = NO
+PERLMOD_PRETTY         = YES
+PERLMOD_MAKEVAR_PREFIX =
+#---------------------------------------------------------------------------
+# Configuration options related to the preprocessor
+#---------------------------------------------------------------------------
+ENABLE_PREPROCESSING   = YES
+MACRO_EXPANSION        = NO
+EXPAND_ONLY_PREDEF     = NO
+SEARCH_INCLUDES        = YES
+INCLUDE_PATH           =
+INCLUDE_FILE_PATTERNS  =
+PREDEFINED             =
+EXPAND_AS_DEFINED      =
+SKIP_FUNCTION_MACROS   = YES
+#---------------------------------------------------------------------------
+# Configuration::additions related to external references
+#---------------------------------------------------------------------------
+TAGFILES               =
+GENERATE_TAGFILE       =
+ALLEXTERNALS           = NO
+EXTERNAL_GROUPS        = YES
+PERL_PATH              = /usr/bin/perl
+#---------------------------------------------------------------------------
+# Configuration options related to the dot tool
+#---------------------------------------------------------------------------
+CLASS_DIAGRAMS         = NO
+HIDE_UNDOC_RELATIONS   = YES
+HAVE_DOT               = NO
+CLASS_GRAPH            = YES
+COLLABORATION_GRAPH    = YES
+GROUP_GRAPHS           = YES
+UML_LOOK               = NO
+TEMPLATE_RELATIONS     = NO
+INCLUDE_GRAPH          = YES
+INCLUDED_BY_GRAPH      = YES
+CALL_GRAPH             = NO
+CALLER_GRAPH           = NO
+GRAPHICAL_HIERARCHY    = YES
+DIRECTORY_GRAPH        = YES
+DOT_IMAGE_FORMAT       = png
+DOT_PATH               =
+DOTFILE_DIRS           =
+MAX_DOT_GRAPH_DEPTH    = 1000
+DOT_TRANSPARENT        = YES
+DOT_MULTI_TARGETS      = NO
+GENERATE_LEGEND        = YES
+DOT_CLEANUP            = YES
+#---------------------------------------------------------------------------
+# Configuration::additions related to the search engine
+#---------------------------------------------------------------------------
+SEARCHENGINE           = NO
diff --git a/packages/ti/drv/udma/docs/Migrating_Applications_from_EDMA_to_UDMA_using_TI-RTOS.pdf b/packages/ti/drv/udma/docs/Migrating_Applications_from_EDMA_to_UDMA_using_TI-RTOS.pdf
new file mode 100644 (file)
index 0000000..f6d91e0
Binary files /dev/null and b/packages/ti/drv/udma/docs/Migrating_Applications_from_EDMA_to_UDMA_using_TI-RTOS.pdf differ
diff --git a/packages/ti/drv/udma/docs/UDMA_Overview.pdf b/packages/ti/drv/udma/docs/UDMA_Overview.pdf
new file mode 100644 (file)
index 0000000..67833f4
Binary files /dev/null and b/packages/ti/drv/udma/docs/UDMA_Overview.pdf differ
diff --git a/packages/ti/drv/udma/docs/UDMA_Overview.pptx b/packages/ti/drv/udma/docs/UDMA_Overview.pptx
new file mode 100644 (file)
index 0000000..f85848a
Binary files /dev/null and b/packages/ti/drv/udma/docs/UDMA_Overview.pptx differ
diff --git a/packages/ti/drv/udma/docs/doxygen/ti_disclaim.htm b/packages/ti/drv/udma/docs/doxygen/ti_disclaim.htm
new file mode 100644 (file)
index 0000000..085a637
--- /dev/null
@@ -0,0 +1,1093 @@
+<html xmlns:v="urn:schemas-microsoft-com:vml"
+xmlns:o="urn:schemas-microsoft-com:office:office"
+xmlns:w="urn:schemas-microsoft-com:office:word"
+xmlns="http://www.w3.org/TR/REC-html40">
+
+<head>
+<meta http-equiv=Content-Type content="text/html; charset=windows-1252">
+<meta name=ProgId content=Word.Document>
+<meta name=Generator content="Microsoft Word 9">
+<meta name=Originator content="Microsoft Word 9">
+<link rel=File-List href="./ti_disclaimer_files/filelist.xml">
+<title>TI Disclaimer</title>
+<!--[if gte mso 9]><xml>
+ <o:DocumentProperties>
+  <o:Author>a0875225</o:Author>
+  <o:LastAuthor>NC</o:LastAuthor>
+  <o:Revision>6</o:Revision>
+  <o:TotalTime>3</o:TotalTime>
+  <o:LastPrinted>2003-03-14T13:23:00Z</o:LastPrinted>
+  <o:Created>2003-03-27T17:45:00Z</o:Created>
+  <o:LastSaved>2003-03-27T17:50:00Z</o:LastSaved>
+  <o:Pages>1</o:Pages>
+  <o:Words>397</o:Words>
+  <o:Characters>2263</o:Characters>
+  <o:Company>Texas Instruments Inc</o:Company>
+  <o:Lines>18</o:Lines>
+  <o:Paragraphs>4</o:Paragraphs>
+  <o:CharactersWithSpaces>2779</o:CharactersWithSpaces>
+  <o:Version>9.2720</o:Version>
+ </o:DocumentProperties>
+</xml><![endif]-->
+<style>
+<!--
+ /* Font Definitions */
+@font-face
+       {font-family:Helvetica;
+       panose-1:2 11 6 4 2 2 2 2 2 4;
+       mso-font-charset:0;
+       mso-generic-font-family:swiss;
+       mso-font-pitch:variable;
+       mso-font-signature:536902279 -2147483648 8 0 511 0;}
+@font-face
+       {font-family:Courier;
+       panose-1:0 0 0 0 0 0 0 0 0 0;
+       mso-font-charset:0;
+       mso-generic-font-family:modern;
+       mso-font-format:other;
+       mso-font-pitch:fixed;
+       mso-font-signature:3 0 0 0 1 0;}
+@font-face
+       {font-family:Wingdings;
+       panose-1:5 0 0 0 0 0 0 0 0 0;
+       mso-font-charset:2;
+       mso-generic-font-family:auto;
+       mso-font-pitch:variable;
+       mso-font-signature:0 268435456 0 0 -2147483648 0;}
+@font-face
+       {font-family:Tahoma;
+       panose-1:2 11 6 4 3 5 4 4 2 4;
+       mso-font-charset:0;
+       mso-generic-font-family:swiss;
+       mso-font-pitch:variable;
+       mso-font-signature:553679495 -2147483648 8 0 66047 0;}
+@font-face
+       {font-family:"\FF2D\FF33 \FF30\30B4\30B7\30C3\30AF";
+       mso-font-alt:"Times New Roman";
+       mso-font-charset:128;
+       mso-generic-font-family:modern;
+       mso-font-pitch:variable;
+       mso-font-signature:-1610612033 1757936891 16 0 131231 0;}
+@font-face
+       {font-family:"Monotype Sorts";
+       panose-1:1 1 6 1 1 1 1 1 1 1;
+       mso-font-charset:2;
+       mso-generic-font-family:auto;
+       mso-font-pitch:variable;
+       mso-font-signature:0 268435456 0 0 -2147483648 0;}
+@font-face
+       {font-family:"\@\FF2D\FF33 \FF30\30B4\30B7\30C3\30AF";
+       mso-font-charset:128;
+       mso-generic-font-family:modern;
+       mso-font-pitch:variable;
+       mso-font-signature:-1610612033 1757936891 16 0 131231 0;}
+ /* Style Definitions */
+p.MsoNormal, li.MsoNormal, div.MsoNormal
+       {mso-style-parent:"";
+       margin:0in;
+       margin-bottom:.0001pt;
+       mso-pagination:widow-orphan;
+       font-size:12.0pt;
+       font-family:"Times New Roman";
+       mso-fareast-font-family:"Times New Roman";}
+h1
+       {mso-style-next:Normal;
+       margin-top:0in;
+       margin-right:0in;
+       margin-bottom:0in;
+       margin-left:.25in;
+       margin-bottom:.0001pt;
+       text-indent:-.25in;
+       mso-pagination:widow-orphan;
+       page-break-after:avoid;
+       mso-outline-level:1;
+       mso-list:l6 level1 lfo2;
+       tab-stops:list .25in;
+       font-size:14.0pt;
+       mso-bidi-font-size:12.0pt;
+       font-family:"Times New Roman";
+       mso-font-kerning:0pt;}
+h2
+       {mso-style-update:auto;
+       mso-style-next:Normal;
+       margin-top:0in;
+       margin-right:0in;
+       margin-bottom:0in;
+       margin-left:.4in;
+       margin-bottom:.0001pt;
+       text-indent:-.4in;
+       mso-pagination:widow-orphan;
+       page-break-after:avoid;
+       mso-outline-level:2;
+       mso-list:l1 level2 lfo4;
+       tab-stops:list .4in;
+       font-size:14.0pt;
+       mso-bidi-font-size:12.0pt;
+       font-family:"Times New Roman";
+       mso-bidi-font-weight:normal;}
+h3
+       {mso-style-update:auto;
+       mso-style-next:Normal;
+       margin-top:.25in;
+       margin-right:0in;
+       margin-bottom:0in;
+       margin-left:.5in;
+       margin-bottom:.0001pt;
+       text-indent:-.5in;
+       mso-pagination:widow-orphan;
+       page-break-after:avoid;
+       mso-outline-level:3;
+       mso-list:l1 level3 lfo4;
+       tab-stops:list .5in;
+       font-size:11.0pt;
+       mso-bidi-font-size:12.0pt;
+       font-family:"Times New Roman";
+       mso-bidi-font-style:italic;}
+h4
+       {mso-style-next:Normal;
+       margin-top:12.0pt;
+       margin-right:0in;
+       margin-bottom:3.0pt;
+       margin-left:.6in;
+       text-indent:-.6in;
+       mso-pagination:widow-orphan;
+       page-break-after:avoid;
+       mso-outline-level:4;
+       mso-list:l1 level4 lfo4;
+       tab-stops:list .6in;
+       font-size:10.0pt;
+       mso-bidi-font-size:14.0pt;
+       font-family:"Times New Roman";}
+h5
+       {mso-style-next:Normal;
+       margin-top:0in;
+       margin-right:0in;
+       margin-bottom:0in;
+       margin-left:.7in;
+       margin-bottom:.0001pt;
+       text-indent:-.7in;
+       mso-pagination:widow-orphan;
+       page-break-after:avoid;
+       mso-outline-level:5;
+       mso-list:l1 level5 lfo4;
+       tab-stops:list .7in;
+       font-size:10.0pt;
+       mso-bidi-font-size:12.0pt;
+       font-family:"Times New Roman";}
+h6
+       {mso-style-next:Normal;
+       margin:0in;
+       margin-bottom:.0001pt;
+       mso-pagination:widow-orphan;
+       page-break-after:avoid;
+       mso-outline-level:6;
+       font-size:12.0pt;
+       font-family:"Times New Roman";}
+p.MsoHeading7, li.MsoHeading7, div.MsoHeading7
+       {mso-style-next:Normal;
+       margin-top:12.0pt;
+       margin-right:0in;
+       margin-bottom:3.0pt;
+       margin-left:.9in;
+       text-indent:-.9in;
+       mso-pagination:widow-orphan;
+       mso-outline-level:7;
+       tab-stops:list .9in;
+       font-size:10.0pt;
+       mso-bidi-font-size:12.0pt;
+       font-family:"Times New Roman";
+       mso-fareast-font-family:"Times New Roman";}
+p.MsoHeading8, li.MsoHeading8, div.MsoHeading8
+       {mso-style-next:Normal;
+       margin-top:12.0pt;
+       margin-right:0in;
+       margin-bottom:3.0pt;
+       margin-left:1.0in;
+       text-indent:-1.0in;
+       mso-pagination:widow-orphan;
+       mso-outline-level:8;
+       tab-stops:list 1.0in;
+       font-size:10.0pt;
+       mso-bidi-font-size:12.0pt;
+       font-family:"Times New Roman";
+       mso-fareast-font-family:"Times New Roman";
+       font-style:italic;}
+p.MsoHeading9, li.MsoHeading9, div.MsoHeading9
+       {mso-style-next:Normal;
+       margin-top:12.0pt;
+       margin-right:0in;
+       margin-bottom:3.0pt;
+       margin-left:1.1in;
+       text-indent:-1.1in;
+       mso-pagination:widow-orphan;
+       mso-outline-level:9;
+       tab-stops:list 1.1in;
+       font-size:11.0pt;
+       font-family:Arial;
+       mso-fareast-font-family:"Times New Roman";
+       mso-bidi-font-family:"Times New Roman";}
+p.MsoToc1, li.MsoToc1, div.MsoToc1
+       {mso-style-update:auto;
+       mso-style-next:Normal;
+       margin:0in;
+       margin-bottom:.0001pt;
+       mso-pagination:widow-orphan;
+       font-size:12.0pt;
+       font-family:"Courier New";
+       mso-fareast-font-family:"Times New Roman";
+       mso-bidi-font-family:"Times New Roman";
+       font-weight:bold;
+       mso-bidi-font-weight:normal;}
+p.MsoToc2, li.MsoToc2, div.MsoToc2
+       {mso-style-update:auto;
+       mso-style-parent:"TOC 1";
+       mso-style-next:Normal;
+       margin-top:0in;
+       margin-right:0in;
+       margin-bottom:0in;
+       margin-left:.2in;
+       margin-bottom:.0001pt;
+       mso-pagination:widow-orphan;
+       tab-stops:24.0pt right dotted 431.5pt;
+       font-size:11.0pt;
+       mso-bidi-font-size:12.0pt;
+       font-family:"Courier New";
+       mso-fareast-font-family:"Times New Roman";
+       mso-bidi-font-family:"Times New Roman";}
+p.MsoToc3, li.MsoToc3, div.MsoToc3
+       {mso-style-update:auto;
+       mso-style-next:Normal;
+       margin-top:0in;
+       margin-right:0in;
+       margin-bottom:0in;
+       margin-left:24.0pt;
+       margin-bottom:.0001pt;
+       mso-pagination:widow-orphan;
+       font-size:10.0pt;
+       mso-bidi-font-size:12.0pt;
+       font-family:"Times New Roman";
+       mso-fareast-font-family:"Times New Roman";}
+p.MsoCommentText, li.MsoCommentText, div.MsoCommentText
+       {margin:0in;
+       margin-bottom:.0001pt;
+       mso-pagination:widow-orphan;
+       font-size:10.0pt;
+       font-family:"Times New Roman";
+       mso-fareast-font-family:"Times New Roman";}
+p.MsoHeader, li.MsoHeader, div.MsoHeader
+       {margin:0in;
+       margin-bottom:.0001pt;
+       mso-pagination:widow-orphan;
+       tab-stops:center 3.0in right 6.0in;
+       font-size:10.0pt;
+       mso-bidi-font-size:12.0pt;
+       font-family:"Times New Roman";
+       mso-fareast-font-family:"Times New Roman";}
+p.MsoFooter, li.MsoFooter, div.MsoFooter
+       {margin:0in;
+       margin-bottom:.0001pt;
+       mso-pagination:widow-orphan;
+       tab-stops:center 3.0in right 6.0in;
+       font-size:10.0pt;
+       mso-bidi-font-size:12.0pt;
+       font-family:"Times New Roman";
+       mso-fareast-font-family:"Times New Roman";}
+p.MsoCaption, li.MsoCaption, div.MsoCaption
+       {mso-style-next:Normal;
+       margin-top:6.0pt;
+       margin-right:0in;
+       margin-bottom:6.0pt;
+       margin-left:0in;
+       mso-pagination:widow-orphan;
+       font-size:11.0pt;
+       mso-bidi-font-size:10.0pt;
+       font-family:Helvetica;
+       mso-fareast-font-family:"Times New Roman";
+       mso-bidi-font-family:"Times New Roman";
+       font-style:italic;
+       mso-bidi-font-style:normal;}
+p.MsoTof, li.MsoTof, div.MsoTof
+       {mso-style-update:auto;
+       mso-style-next:Normal;
+       margin-top:0in;
+       margin-right:0in;
+       margin-bottom:0in;
+       margin-left:24.0pt;
+       margin-bottom:.0001pt;
+       text-indent:-24.0pt;
+       mso-pagination:widow-orphan;
+       font-size:10.0pt;
+       mso-bidi-font-size:12.0pt;
+       font-family:"Times New Roman";
+       mso-fareast-font-family:"Times New Roman";}
+span.MsoCommentReference
+       {mso-ansi-font-size:8.0pt;
+       mso-bidi-font-size:8.0pt;}
+p.MsoListBullet, li.MsoListBullet, div.MsoListBullet
+       {mso-style-update:auto;
+       margin-top:0in;
+       margin-right:0in;
+       margin-bottom:0in;
+       margin-left:.25in;
+       margin-bottom:.0001pt;
+       text-indent:-.25in;
+       mso-pagination:widow-orphan;
+       mso-list:l0 level1 lfo7;
+       tab-stops:list .25in left 1.25in;
+       mso-layout-grid-align:none;
+       punctuation-wrap:simple;
+       text-autospace:none;
+       font-size:11.0pt;
+       mso-bidi-font-size:10.0pt;
+       font-family:"Times New Roman";
+       mso-fareast-font-family:"\FF2D\FF33 \FF30\30B4\30B7\30C3\30AF";
+       mso-fareast-language:JA;}
+p.MsoListBullet2, li.MsoListBullet2, div.MsoListBullet2
+       {margin-top:0in;
+       margin-right:0in;
+       margin-bottom:0in;
+       margin-left:74.9pt;
+       margin-bottom:.0001pt;
+       text-indent:-17.3pt;
+       mso-pagination:widow-orphan;
+       mso-list:l5 level1 lfo10;
+       tab-stops:list 1.05in left 1.25in;
+       mso-layout-grid-align:none;
+       punctuation-wrap:simple;
+       text-autospace:none;
+       font-size:10.0pt;
+       font-family:"Times New Roman";
+       mso-fareast-font-family:"\FF2D\FF33 \FF30\30B4\30B7\30C3\30AF";
+       mso-fareast-language:JA;}
+p.MsoBodyTextIndent, li.MsoBodyTextIndent, div.MsoBodyTextIndent
+       {margin-top:0in;
+       margin-right:0in;
+       margin-bottom:0in;
+       margin-left:.5in;
+       margin-bottom:.0001pt;
+       mso-pagination:widow-orphan;
+       font-size:10.0pt;
+       mso-bidi-font-size:12.0pt;
+       font-family:"Times New Roman";
+       mso-fareast-font-family:"Times New Roman";}
+p.MsoBodyText2, li.MsoBodyText2, div.MsoBodyText2
+       {margin:0in;
+       margin-bottom:.0001pt;
+       mso-pagination:widow-orphan;
+       font-size:10.0pt;
+       mso-bidi-font-size:12.0pt;
+       font-family:"Times New Roman";
+       mso-fareast-font-family:"Times New Roman";}
+a:link, span.MsoHyperlink
+       {color:blue;
+       text-decoration:underline;
+       text-underline:single;}
+a:visited, span.MsoHyperlinkFollowed
+       {color:purple;
+       text-decoration:underline;
+       text-underline:single;}
+p.Figure1, li.Figure1, div.Figure1
+       {mso-style-name:"Figure\:1";
+       mso-style-update:auto;
+       margin:0in;
+       margin-bottom:.0001pt;
+       text-align:center;
+       text-indent:0in;
+       mso-pagination:widow-orphan;
+       mso-list:l3 level1 lfo12;
+       tab-stops:list .5in;
+       font-size:10.0pt;
+       mso-bidi-font-size:12.0pt;
+       font-family:Helvetica;
+       mso-fareast-font-family:"Times New Roman";
+       mso-bidi-font-family:"Times New Roman";}
+p.Table1, li.Table1, div.Table1
+       {mso-style-name:"Table 1 \:";
+       mso-style-update:auto;
+       mso-style-parent:"Figure\:1";
+       margin-top:0in;
+       margin-right:0in;
+       margin-bottom:0in;
+       margin-left:.25in;
+       margin-bottom:.0001pt;
+       text-align:center;
+       text-indent:-.25in;
+       mso-pagination:widow-orphan;
+       mso-list:l2 level1 lfo14;
+       tab-stops:list 1.0in;
+       font-size:10.0pt;
+       mso-bidi-font-size:12.0pt;
+       font-family:Helvetica;
+       mso-fareast-font-family:"Times New Roman";
+       mso-bidi-font-family:"Times New Roman";}
+p.kccomment, li.kccomment, div.kccomment
+       {mso-style-name:"kc comment";
+       margin:0in;
+       margin-bottom:.0001pt;
+       mso-pagination:widow-orphan;
+       font-size:10.0pt;
+       mso-bidi-font-size:12.0pt;
+       font-family:"Times New Roman";
+       mso-fareast-font-family:"Times New Roman";
+       color:blue;
+       vertical-align:super;}
+p.NOTE, li.NOTE, div.NOTE
+       {mso-style-name:NOTE;
+       mso-style-update:auto;
+       margin-top:0in;
+       margin-right:0in;
+       margin-bottom:0in;
+       margin-left:.7in;
+       margin-bottom:.0001pt;
+       text-indent:-.7in;
+       mso-pagination:widow-orphan;
+       mso-list:l10 level1 lfo16;
+       tab-stops:list .75in;
+       border:none;
+       mso-border-top-alt:solid windowtext .5pt;
+       mso-border-bottom-alt:solid windowtext .5pt;
+       padding:0in;
+       mso-padding-alt:1.0pt 0in 1.0pt 0in;
+       font-size:10.0pt;
+       mso-bidi-font-size:12.0pt;
+       font-family:"Times New Roman";
+       mso-fareast-font-family:"Times New Roman";}
+p.Numberedlist, li.Numberedlist, div.Numberedlist
+       {mso-style-name:"Numbered list";
+       mso-style-update:auto;
+       margin-top:0in;
+       margin-right:0in;
+       margin-bottom:0in;
+       margin-left:.5in;
+       margin-bottom:.0001pt;
+       text-indent:-.25in;
+       mso-pagination:widow-orphan;
+       mso-list:l9 level1 lfo18;
+       tab-stops:list .5in;
+       font-size:10.0pt;
+       mso-bidi-font-size:12.0pt;
+       font-family:"Times New Roman";
+       mso-fareast-font-family:"Times New Roman";}
+p.TableTitle, li.TableTitle, div.TableTitle
+       {mso-style-name:"Table Title";
+       margin-top:12.0pt;
+       margin-right:0in;
+       margin-bottom:12.0pt;
+       margin-left:0in;
+       mso-pagination:widow-orphan;
+       font-size:11.0pt;
+       mso-bidi-font-size:10.0pt;
+       font-family:Helvetica;
+       mso-fareast-font-family:"Times New Roman";
+       mso-bidi-font-family:"Times New Roman";
+       font-style:italic;
+       mso-bidi-font-style:normal;}
+p.tavlecell, li.tavlecell, div.tavlecell
+       {mso-style-name:"tavle cell";
+       mso-style-parent:"Table Title";
+       margin-top:12.0pt;
+       margin-right:0in;
+       margin-bottom:12.0pt;
+       margin-left:0in;
+       mso-pagination:widow-orphan;
+       font-size:11.0pt;
+       mso-bidi-font-size:10.0pt;
+       font-family:Helvetica;
+       mso-fareast-font-family:"Times New Roman";
+       mso-bidi-font-family:"Times New Roman";}
+p.Listb1, li.Listb1, div.Listb1
+       {mso-style-name:"List\:b1";
+       margin-top:0in;
+       margin-right:0in;
+       margin-bottom:0in;
+       margin-left:1.5in;
+       margin-bottom:.0001pt;
+       text-indent:-.25in;
+       mso-pagination:widow-orphan;
+       mso-list:l4 level3 lfo20;
+       tab-stops:list 1.5in;
+       font-size:10.0pt;
+       mso-bidi-font-size:12.0pt;
+       font-family:"Times New Roman";
+       mso-fareast-font-family:"Times New Roman";}
+p.Code, li.Code, div.Code
+       {mso-style-name:Code;
+       margin-top:6.0pt;
+       margin-right:0in;
+       margin-bottom:0in;
+       margin-left:0in;
+       margin-bottom:.0001pt;
+       mso-pagination:widow-orphan;
+       font-size:9.0pt;
+       mso-bidi-font-size:10.0pt;
+       font-family:Courier;
+       mso-fareast-font-family:"Times New Roman";
+       mso-bidi-font-family:"Times New Roman";}
+p.Paragraph, li.Paragraph, div.Paragraph
+       {mso-style-name:Paragraph;
+       margin-top:9.0pt;
+       margin-right:0in;
+       margin-bottom:0in;
+       margin-left:1.5in;
+       margin-bottom:.0001pt;
+       text-align:justify;
+       mso-pagination:widow-orphan;
+       font-size:10.0pt;
+       font-family:Arial;
+       mso-fareast-font-family:"Times New Roman";
+       mso-bidi-font-family:"Times New Roman";}
+p.Bullet1, li.Bullet1, div.Bullet1
+       {mso-style-name:"Bullet 1";
+       margin-top:9.0pt;
+       margin-right:0in;
+       margin-bottom:0in;
+       margin-left:1.75in;
+       margin-bottom:.0001pt;
+       text-indent:-.25in;
+       mso-pagination:widow-orphan;
+       page-break-after:avoid;
+       mso-list:l7 level1 lfo22;
+       tab-stops:list .25in;
+       font-size:10.0pt;
+       font-family:Helvetica;
+       mso-fareast-font-family:"Times New Roman";
+       mso-bidi-font-family:"Times New Roman";}
+p.TableCell, li.TableCell, div.TableCell
+       {mso-style-name:"Table Cell";
+       margin:0in;
+       margin-bottom:.0001pt;
+       mso-pagination:widow-orphan;
+       font-size:9.0pt;
+       mso-bidi-font-size:10.0pt;
+       font-family:Helvetica;
+       mso-fareast-font-family:"Times New Roman";
+       mso-bidi-font-family:"Times New Roman";}
+p.tableheading, li.tableheading, div.tableheading
+       {mso-style-name:"table heading";
+       mso-style-parent:Paragraph;
+       margin-top:9.0pt;
+       margin-right:0in;
+       margin-bottom:0in;
+       margin-left:1.5in;
+       margin-bottom:.0001pt;
+       text-align:justify;
+       mso-pagination:widow-orphan;
+       layout-grid-mode:char;
+       font-size:10.0pt;
+       font-family:Arial;
+       mso-fareast-font-family:"Times New Roman";
+       mso-bidi-font-family:"Times New Roman";}
+p.Bullet2, li.Bullet2, div.Bullet2
+       {mso-style-name:"Bullet 2";
+       margin-top:6.0pt;
+       margin-right:0in;
+       margin-bottom:0in;
+       margin-left:2.0in;
+       margin-bottom:.0001pt;
+       text-indent:-.25in;
+       mso-pagination:widow-orphan;
+       mso-list:l8 level1 lfo24;
+       tab-stops:list .5in;
+       font-size:10.0pt;
+       font-family:Helvetica;
+       mso-fareast-font-family:"Times New Roman";
+       mso-bidi-font-family:"Times New Roman";}
+span.sourcecode
+       {mso-style-name:"source code";
+       mso-ansi-font-size:10.0pt;
+       mso-ascii-font-family:"Courier New";
+       mso-hansi-font-family:"Courier New";}
+span.Style1
+       {mso-style-name:Style1;
+       mso-ansi-font-size:10.0pt;
+       mso-ascii-font-family:"Courier New";
+       mso-hansi-font-family:"Courier New";}
+span.Markforscrutiny
+       {mso-style-name:"Mark for scrutiny";
+       color:blue;
+       text-underline:black;
+       text-decoration:underline;
+       text-underline:words;}
+@page Section1
+       {size:8.5in 11.0in;
+       margin:1.0in 1.25in 1.0in 1.25in;
+       mso-header-margin:.5in;
+       mso-footer-margin:.5in;
+       mso-header:url("./ti_disclaimer_files/header.htm") h1;
+       mso-paper-source:0;}
+div.Section1
+       {page:Section1;}
+ /* List Definitions */
+@list l0
+       {mso-list-id:-119;
+       mso-list-type:simple;
+       mso-list-template-ids:-973583428;}
+@list l0:level1
+       {mso-level-number-format:bullet;
+       mso-level-style-link:"List Bullet";
+       mso-level-text:\F0B7;
+       mso-level-tab-stop:.25in;
+       mso-level-number-position:left;
+       margin-left:.25in;
+       text-indent:-.25in;
+       font-family:Symbol;}
+@list l1
+       {mso-list-id:114177860;
+       mso-list-template-ids:-240241298;}
+@list l1:level1
+       {mso-level-style-link:"Heading 1";
+       mso-level-text:%1;
+       mso-level-tab-stop:.3in;
+       mso-level-number-position:left;
+       margin-left:.3in;
+       text-indent:-.3in;
+       mso-ansi-font-size:16.0pt;
+       font-family:"Times New Roman";
+       mso-ansi-font-weight:bold;
+       mso-ansi-font-style:normal;}
+@list l1:level2
+       {mso-level-style-link:"Heading 2";
+       mso-level-text:"%1\.%2";
+       mso-level-tab-stop:.4in;
+       mso-level-number-position:left;
+       margin-left:.4in;
+       text-indent:-.4in;
+       mso-ansi-font-size:14.0pt;
+       font-family:"Times New Roman";
+       mso-ansi-font-weight:bold;
+       mso-ansi-font-style:normal;}
+@list l1:level3
+       {mso-level-style-link:"Heading 3";
+       mso-level-text:"%1\.%2\.%3";
+       mso-level-tab-stop:.5in;
+       mso-level-number-position:left;
+       margin-left:.5in;
+       text-indent:-.5in;
+       mso-ansi-font-size:12.0pt;
+       font-family:"Times New Roman";
+       mso-ansi-font-weight:bold;
+       mso-ansi-font-style:normal;}
+@list l1:level4
+       {mso-level-style-link:"Heading 4";
+       mso-level-text:"%1\.%2\.%3\.%4";
+       mso-level-tab-stop:.6in;
+       mso-level-number-position:left;
+       margin-left:.6in;
+       text-indent:-.6in;}
+@list l1:level5
+       {mso-level-style-link:"Heading 5";
+       mso-level-text:"%1\.%2\.%3\.%4\.%5";
+       mso-level-tab-stop:.7in;
+       mso-level-number-position:left;
+       margin-left:.7in;
+       text-indent:-.7in;}
+@list l1:level6
+       {mso-level-style-link:"Heading 6";
+       mso-level-text:"%1\.%2\.%3\.%4\.%5\.%6";
+       mso-level-tab-stop:.8in;
+       mso-level-number-position:left;
+       margin-left:.8in;
+       text-indent:-.8in;}
+@list l1:level7
+       {mso-level-style-link:"Heading 7";
+       mso-level-text:"%1\.%2\.%3\.%4\.%5\.%6\.%7";
+       mso-level-tab-stop:.9in;
+       mso-level-number-position:left;
+       margin-left:.9in;
+       text-indent:-.9in;}
+@list l1:level8
+       {mso-level-style-link:"Heading 8";
+       mso-level-text:"%1\.%2\.%3\.%4\.%5\.%6\.%7\.%8";
+       mso-level-tab-stop:1.0in;
+       mso-level-number-position:left;
+       margin-left:1.0in;
+       text-indent:-1.0in;}
+@list l1:level9
+       {mso-level-style-link:"Heading 9";
+       mso-level-text:"%1\.%2\.%3\.%4\.%5\.%6\.%7\.%8\.%9";
+       mso-level-tab-stop:1.1in;
+       mso-level-number-position:left;
+       margin-left:1.1in;
+       text-indent:-1.1in;}
+@list l2
+       {mso-list-id:866141587;
+       mso-list-type:hybrid;
+       mso-list-template-ids:-1891331636 573486916 67698713 67698715 67698703 67698713 67698715 67698703 67698713 67698715;}
+@list l2:level1
+       {mso-level-style-link:"Table 1 \:";
+       mso-level-text:"Table %1\.  ";
+       mso-level-tab-stop:1.0in;
+       mso-level-number-position:left;
+       margin-left:.25in;
+       text-indent:-.25in;}
+@list l3
+       {mso-list-id:917978346;
+       mso-list-type:hybrid;
+       mso-list-template-ids:270981470 441357252 67698713 67698715 67698703 67698713 67698715 67698703 67698713 67698715;}
+@list l3:level1
+       {mso-level-style-link:"Figure\:1";
+       mso-level-text:"Figure %1\.";
+       mso-level-tab-stop:.45in;
+       mso-level-number-position:right;
+       margin-left:0in;
+       text-indent:.2in;
+       font-family:Tahoma;
+       mso-bidi-font-family:"Times New Roman";}
+@list l3:level2
+       {mso-level-start-at:0;
+       mso-level-number-format:bullet;
+       mso-level-text:-;
+       mso-level-tab-stop:1.0in;
+       mso-level-number-position:left;
+       text-indent:-.25in;
+       font-family:"Times New Roman";
+       mso-fareast-font-family:"Times New Roman";}
+@list l4
+       {mso-list-id:1041705939;
+       mso-list-type:hybrid;
+       mso-list-template-ids:-250713390 -225915076 67698691 1343286562 67698689 67698691 67698693 67698689 67698691 67698693;}
+@list l4:level1
+       {mso-level-number-format:bullet;
+       mso-level-text:\F0B7;
+       mso-level-tab-stop:.5in;
+       mso-level-number-position:left;
+       text-indent:-.25in;
+       font-family:Symbol;
+       color:windowtext;}
+@list l4:level2
+       {mso-level-number-format:bullet;
+       mso-level-text:o;
+       mso-level-tab-stop:1.0in;
+       mso-level-number-position:left;
+       text-indent:-.25in;
+       font-family:"Courier New";
+       mso-bidi-font-family:"Times New Roman";}
+@list l4:level3
+       {mso-level-number-format:bullet;
+       mso-level-style-link:"List\:b1";
+       mso-level-text:\F06F;
+       mso-level-tab-stop:1.5in;
+       mso-level-number-position:left;
+       text-indent:-.25in;
+       mso-ansi-font-size:8.0pt;
+       font-family:"Monotype Sorts";}
+@list l5
+       {mso-list-id:1093236455;
+       mso-list-type:simple;
+       mso-list-template-ids:131606724;}
+@list l5:level1
+       {mso-level-number-format:bullet;
+       mso-level-style-link:"List Bullet 2";
+       mso-level-text:\F0B7;
+       mso-level-tab-stop:1.05in;
+       mso-level-number-position:left;
+       margin-left:74.9pt;
+       text-indent:-17.3pt;
+       font-family:Symbol;
+       color:windowtext;}
+@list l6
+       {mso-list-id:1426875844;
+       mso-list-type:hybrid;
+       mso-list-template-ids:-852165276 1996774054 67698713 67698715 67698703 67698713 67698715 67698703 67698713 67698715;}
+@list l6:level1
+       {mso-level-style-link:"Heading 1";
+       mso-level-text:%1;
+       mso-level-tab-stop:.25in;
+       mso-level-number-position:left;
+       margin-left:.25in;
+       text-indent:-.25in;
+       mso-ansi-font-size:14.0pt;
+       font-family:"Times New Roman";
+       mso-ansi-font-weight:normal;
+       mso-ansi-font-style:normal;}
+@list l7
+       {mso-list-id:1777600239;
+       mso-list-type:simple;
+       mso-list-template-ids:-1885074454;}
+@list l7:level1
+       {mso-level-number-format:bullet;
+       mso-level-style-link:"Bullet 1";
+       mso-level-text:\F06F;
+       mso-level-tab-stop:.25in;
+       mso-level-number-position:left;
+       margin-left:.25in;
+       text-indent:-.25in;
+       mso-ansi-font-size:8.0pt;
+       font-family:"Monotype Sorts";}
+@list l8
+       {mso-list-id:1800804630;
+       mso-list-type:simple;
+       mso-list-template-ids:-1217263056;}
+@list l8:level1
+       {mso-level-number-format:bullet;
+       mso-level-style-link:"Bullet 2";
+       mso-level-text:\F06E;
+       mso-level-tab-stop:.5in;
+       mso-level-number-position:left;
+       text-indent:-.25in;
+       font-family:Wingdings;}
+@list l9
+       {mso-list-id:1927886878;
+       mso-list-type:hybrid;
+       mso-list-template-ids:791423806 -1960554494 67698713 67698715 67698703 67698713 67698715 67698703 67698713 67698715;}
+@list l9:level1
+       {mso-level-style-link:"Numbered list";
+       mso-level-tab-stop:.5in;
+       mso-level-number-position:left;
+       text-indent:-.25in;}
+@list l10
+       {mso-list-id:2138402816;
+       mso-list-type:hybrid;
+       mso-list-template-ids:-1806919098 1218187656 67698713 67698715 67698703 67698713 67698715 67698703 67698713 67698715;}
+@list l10:level1
+       {mso-level-number-format:none;
+       mso-level-style-link:NOTE;
+       mso-level-text:"Note \: ";
+       mso-level-tab-stop:.75in;
+       mso-level-number-position:left;
+       margin-left:.7in;
+       text-indent:-.7in;
+       font-family:Tahoma;
+       mso-bidi-font-family:"Times New Roman";
+       mso-ansi-font-weight:bold;
+       mso-ansi-font-style:normal;}
+@list l10:level2
+       {mso-level-number-format:alpha-lower;
+       mso-level-tab-stop:1.0in;
+       mso-level-number-position:left;
+       text-indent:-.25in;}
+ol
+       {margin-bottom:0in;}
+ul
+       {margin-bottom:0in;}
+-->
+</style>
+<!--[if gte mso 9]><xml>
+ <o:shapedefaults v:ext="edit" spidmax="5122"/>
+</xml><![endif]--><!--[if gte mso 9]><xml>
+ <o:shapelayout v:ext="edit">
+  <o:idmap v:ext="edit" data="1"/>
+ </o:shapelayout></xml><![endif]-->
+</head>
+
+<body lang=EN-US link=blue vlink=purple style='tab-interval:.5in'>
+
+<div class=Section1>
+
+<p class=MsoNormal align=center style='text-align:center;mso-layout-grid-align:
+none;text-autospace:none'><a name="_Ref34544099"><b><span style='font-size:
+11.0pt;font-family:Arial;mso-bidi-font-family:"Times New Roman"'><![if !supportEmptyParas]>&nbsp;<![endif]><o:p></o:p></span></b></a></p>
+
+<p class=MsoNormal style='mso-layout-grid-align:none;text-autospace:none'><span
+style='mso-bookmark:_Ref34544099'><b><span style='font-size:11.0pt;font-family:
+Arial;mso-bidi-font-family:"Times New Roman"'>IMPORTANT NOTICE<o:p></o:p></span></b></span></p>
+
+<p class=MsoNormal align=center style='text-align:center;mso-layout-grid-align:
+none;text-autospace:none'><span style='mso-bookmark:_Ref34544099'><b><span
+style='font-size:11.0pt;font-family:Arial;mso-bidi-font-family:"Times New Roman"'><![if !supportEmptyParas]>&nbsp;<![endif]><o:p></o:p></span></b></span></p>
+
+<p class=MsoNormal style='mso-layout-grid-align:none;text-autospace:none'><span
+style='mso-bookmark:_Ref34544099'><span style='font-size:8.0pt;font-family:
+Arial;mso-bidi-font-family:"Times New Roman"'>Texas Instruments and its
+subsidiaries (TI) reserve the right to make changes to their products or to
+discontinue any<o:p></o:p></span></span></p>
+
+<p class=MsoNormal style='mso-layout-grid-align:none;text-autospace:none'><span
+style='mso-bookmark:_Ref34544099'><span style='font-size:8.0pt;font-family:
+Arial;mso-bidi-font-family:"Times New Roman"'>product or service without
+notice, and advise customers to obtain the latest version of relevant
+information to verify, before<o:p></o:p></span></span></p>
+
+<p class=MsoNormal style='mso-layout-grid-align:none;text-autospace:none'><span
+style='mso-bookmark:_Ref34544099'><span style='font-size:8.0pt;font-family:
+Arial;mso-bidi-font-family:"Times New Roman"'>placing orders, that information
+being relied on is current and complete. All products are sold subject to the
+terms and<o:p></o:p></span></span></p>
+
+<p class=MsoNormal style='mso-layout-grid-align:none;text-autospace:none'><span
+style='mso-bookmark:_Ref34544099'><span style='font-size:8.0pt;font-family:
+Arial;mso-bidi-font-family:"Times New Roman"'>conditions of sale supplied at
+the time of order acknowledgment, including those pertaining to warranty,
+patent<o:p></o:p></span></span></p>
+
+<p class=MsoNormal style='mso-layout-grid-align:none;text-autospace:none'><span
+style='mso-bookmark:_Ref34544099'><span style='font-size:8.0pt;font-family:
+Arial;mso-bidi-font-family:"Times New Roman"'>infringement, and limitation of
+liability.<o:p></o:p></span></span></p>
+
+<p class=MsoNormal style='mso-layout-grid-align:none;text-autospace:none'><span
+style='mso-bookmark:_Ref34544099'><span style='font-size:8.0pt;font-family:
+Arial;mso-bidi-font-family:"Times New Roman"'><![if !supportEmptyParas]>&nbsp;<![endif]><o:p></o:p></span></span></p>
+
+<p class=MsoNormal style='mso-layout-grid-align:none;text-autospace:none'><span
+style='mso-bookmark:_Ref34544099'><span style='font-size:8.0pt;font-family:
+Arial;mso-bidi-font-family:"Times New Roman"'>TI warrants performance of its
+products to the specifications applicable at the time of sale in accordance
+with TI\92s<o:p></o:p></span></span></p>
+
+<p class=MsoNormal style='mso-layout-grid-align:none;text-autospace:none'><span
+style='mso-bookmark:_Ref34544099'><span style='font-size:8.0pt;font-family:
+Arial;mso-bidi-font-family:"Times New Roman"'>standard warranty. Testing and
+other quality control techniques are utilized to the extent TI deems necessary
+to support<o:p></o:p></span></span></p>
+
+<p class=MsoNormal style='mso-layout-grid-align:none;text-autospace:none'><span
+style='mso-bookmark:_Ref34544099'><span style='font-size:8.0pt;font-family:
+Arial;mso-bidi-font-family:"Times New Roman"'>this warranty. Specific testing
+of all parameters of each device is not necessarily performed, except those
+mandated by<o:p></o:p></span></span></p>
+
+<p class=MsoNormal style='mso-layout-grid-align:none;text-autospace:none'><span
+style='mso-bookmark:_Ref34544099'><span style='font-size:8.0pt;font-family:
+Arial;mso-bidi-font-family:"Times New Roman"'>government requirements.<o:p></o:p></span></span></p>
+
+<p class=MsoNormal style='mso-layout-grid-align:none;text-autospace:none'><span
+style='mso-bookmark:_Ref34544099'><span style='font-size:8.0pt;font-family:
+Arial;mso-bidi-font-family:"Times New Roman"'><![if !supportEmptyParas]>&nbsp;<![endif]><o:p></o:p></span></span></p>
+
+<p class=MsoNormal style='mso-layout-grid-align:none;text-autospace:none'><span
+style='mso-bookmark:_Ref34544099'><span style='font-size:8.0pt;font-family:
+Arial;mso-bidi-font-family:"Times New Roman"'>Customers are responsible for
+their applications using TI components.<o:p></o:p></span></span></p>
+
+<p class=MsoNormal style='mso-layout-grid-align:none;text-autospace:none'><span
+style='mso-bookmark:_Ref34544099'><span style='font-size:8.0pt;font-family:
+Arial;mso-bidi-font-family:"Times New Roman"'><![if !supportEmptyParas]>&nbsp;<![endif]><o:p></o:p></span></span></p>
+
+<p class=MsoNormal style='mso-layout-grid-align:none;text-autospace:none'><span
+style='mso-bookmark:_Ref34544099'><span style='font-size:8.0pt;font-family:
+Arial;mso-bidi-font-family:"Times New Roman"'>In order to minimize risks
+associated with the customer\92s applications, adequate design and operating
+safeguards must be<o:p></o:p></span></span></p>
+
+<p class=MsoNormal style='mso-layout-grid-align:none;text-autospace:none'><span
+style='mso-bookmark:_Ref34544099'><span style='font-size:8.0pt;font-family:
+Arial;mso-bidi-font-family:"Times New Roman"'>provided by the customer to
+minimize inherent or procedural hazards.<o:p></o:p></span></span></p>
+
+<p class=MsoNormal style='mso-layout-grid-align:none;text-autospace:none'><span
+style='mso-bookmark:_Ref34544099'><span style='font-size:8.0pt;font-family:
+Arial;mso-bidi-font-family:"Times New Roman"'><![if !supportEmptyParas]>&nbsp;<![endif]><o:p></o:p></span></span></p>
+
+<p class=MsoNormal style='mso-layout-grid-align:none;text-autospace:none'><span
+style='mso-bookmark:_Ref34544099'><span style='font-size:8.0pt;font-family:
+Arial;mso-bidi-font-family:"Times New Roman"'>TI assumes no liability for
+applications assistance or customer product design. TI does not warrant or
+represent that any<o:p></o:p></span></span></p>
+
+<p class=MsoNormal style='mso-layout-grid-align:none;text-autospace:none'><span
+style='mso-bookmark:_Ref34544099'><span style='font-size:8.0pt;font-family:
+Arial;mso-bidi-font-family:"Times New Roman"'>license, either express or
+implied, is granted under any patent right, copyright, mask work right, or
+other intellectual<o:p></o:p></span></span></p>
+
+<p class=MsoNormal style='mso-layout-grid-align:none;text-autospace:none'><span
+style='mso-bookmark:_Ref34544099'><span style='font-size:8.0pt;font-family:
+Arial;mso-bidi-font-family:"Times New Roman"'>property right of TI covering or
+relating to any combination, machine, or process in which such products or
+services might<o:p></o:p></span></span></p>
+
+<p class=MsoNormal style='mso-layout-grid-align:none;text-autospace:none'><span
+style='mso-bookmark:_Ref34544099'><span style='font-size:8.0pt;font-family:
+Arial;mso-bidi-font-family:"Times New Roman"'>be or are used. TI\92s publication
+of information regarding any third party\92s products or services does not
+constitute TI\92s<o:p></o:p></span></span></p>
+
+<p class=MsoNormal style='mso-layout-grid-align:none;text-autospace:none'><span
+style='mso-bookmark:_Ref34544099'><span style='font-size:8.0pt;font-family:
+Arial;mso-bidi-font-family:"Times New Roman"'>approval, license, warranty or
+endorsement thereof.<o:p></o:p></span></span></p>
+
+<p class=MsoNormal style='mso-layout-grid-align:none;text-autospace:none'><span
+style='mso-bookmark:_Ref34544099'><span style='font-size:8.0pt;font-family:
+Arial;mso-bidi-font-family:"Times New Roman"'><![if !supportEmptyParas]>&nbsp;<![endif]><o:p></o:p></span></span></p>
+
+<p class=MsoNormal style='mso-layout-grid-align:none;text-autospace:none'><span
+style='mso-bookmark:_Ref34544099'><span style='font-size:8.0pt;font-family:
+Arial;mso-bidi-font-family:"Times New Roman"'>Reproduction of information in TI
+data books or data sheets is permissible only if reproduction is without
+alteration and is<o:p></o:p></span></span></p>
+
+<p class=MsoNormal style='mso-layout-grid-align:none;text-autospace:none'><span
+style='mso-bookmark:_Ref34544099'><span style='font-size:8.0pt;font-family:
+Arial;mso-bidi-font-family:"Times New Roman"'>accompanied by all associated
+warranties, conditions, limitations and notices. Representation or reproduction
+o f this<o:p></o:p></span></span></p>
+
+<p class=MsoNormal style='mso-layout-grid-align:none;text-autospace:none'><span
+style='mso-bookmark:_Ref34544099'><span style='font-size:8.0pt;font-family:
+Arial;mso-bidi-font-family:"Times New Roman"'>information with alteration voids
+all warranties provided for an associated TI product or service, is an unfair
+and deceptive<o:p></o:p></span></span></p>
+
+<p class=MsoNormal style='mso-layout-grid-align:none;text-autospace:none'><span
+style='mso-bookmark:_Ref34544099'><span style='font-size:8.0pt;font-family:
+Arial;mso-bidi-font-family:"Times New Roman"'>business practice, and TI is not
+responsible nor liable for any such use.<o:p></o:p></span></span></p>
+
+<p class=MsoNormal style='mso-layout-grid-align:none;text-autospace:none'><span
+style='mso-bookmark:_Ref34544099'><span style='font-size:8.0pt;font-family:
+Arial;mso-bidi-font-family:"Times New Roman"'><![if !supportEmptyParas]>&nbsp;<![endif]><o:p></o:p></span></span></p>
+
+<p class=MsoNormal style='mso-layout-grid-align:none;text-autospace:none'><span
+style='mso-bookmark:_Ref34544099'><span style='font-size:8.0pt;font-family:
+Arial;mso-bidi-font-family:"Times New Roman"'>Resale of TI\92s products or
+services with <i><u>statements different from or beyond the parameters</u> </i>stated
+by TI for that product<o:p></o:p></span></span></p>
+
+<p class=MsoNormal style='mso-layout-grid-align:none;text-autospace:none'><span
+style='mso-bookmark:_Ref34544099'><span style='font-size:8.0pt;font-family:
+Arial;mso-bidi-font-family:"Times New Roman"'>or service voids all express and
+any implied warranties for the associated TI product or service, is an unfair
+and deceptive<o:p></o:p></span></span></p>
+
+<p class=MsoNormal style='mso-layout-grid-align:none;text-autospace:none'><span
+style='mso-bookmark:_Ref34544099'><span style='font-size:8.0pt;font-family:
+Arial;mso-bidi-font-family:"Times New Roman"'>business practice, and TI is not
+responsible nor liable for any such use.<o:p></o:p></span></span></p>
+
+<p class=MsoNormal style='mso-layout-grid-align:none;text-autospace:none'><span
+style='mso-bookmark:_Ref34544099'><span style='font-size:8.0pt;font-family:
+Arial;mso-bidi-font-family:"Times New Roman"'><![if !supportEmptyParas]>&nbsp;<![endif]><o:p></o:p></span></span></p>
+
+<p class=MsoNormal style='mso-layout-grid-align:none;text-autospace:none'><span
+style='mso-bookmark:_Ref34544099'><span style='font-size:8.0pt;font-family:
+Arial;mso-bidi-font-family:"Times New Roman"'>Also see: Standard Terms and
+Conditions of Sale for Semiconductor Products </span></span><a
+href="http://www.ti.com/sc/docs/stdterms.htm"><span style='mso-bookmark:_Ref34544099'>http://www.ti.com/sc/docs/stdterms.htm</span><span
+style='mso-bookmark:_Ref34544099'></span></a><span style='mso-bookmark:_Ref34544099'><span
+style='font-size:8.0pt;font-family:Arial;mso-bidi-font-family:"Times New Roman"'><o:p></o:p></span></span></p>
+
+<p class=MsoNormal style='mso-layout-grid-align:none;text-autospace:none'><span
+style='mso-bookmark:_Ref34544099'><span style='font-size:8.0pt;font-family:
+Arial;mso-bidi-font-family:"Times New Roman"'><![if !supportEmptyParas]>&nbsp;<![endif]><o:p></o:p></span></span></p>
+
+<p class=MsoNormal style='mso-layout-grid-align:none;text-autospace:none'><span
+style='mso-bookmark:_Ref34544099'><span style='font-size:8.0pt;font-family:
+Arial;mso-bidi-font-family:"Times New Roman"'>Mailing Address:<o:p></o:p></span></span></p>
+
+<p class=MsoNormal style='mso-layout-grid-align:none;text-autospace:none'><span
+style='mso-bookmark:_Ref34544099'><span style='font-size:8.0pt;font-family:
+Arial;mso-bidi-font-family:"Times New Roman"'>Texas Instruments<o:p></o:p></span></span></p>
+
+<p class=MsoNormal style='mso-layout-grid-align:none;text-autospace:none'><span
+style='mso-bookmark:_Ref34544099'><span style='font-size:8.0pt;font-family:
+Arial;mso-bidi-font-family:"Times New Roman"'>Post Office Box 655303<o:p></o:p></span></span></p>
+
+<p class=MsoNormal style='mso-layout-grid-align:none;text-autospace:none'><span
+style='mso-bookmark:_Ref34544099'><span style='font-size:8.0pt;font-family:
+Arial;mso-bidi-font-family:"Times New Roman"'>Dallas, Texas 75265</span></span><span
+style='mso-bookmark:_Ref34544099'><span style='mso-bidi-font-size:10.0pt;
+font-family:Arial;mso-bidi-font-family:"Times New Roman"'><o:p></o:p></span></span></p>
+
+<span style='mso-bookmark:_Ref34544099'></span>
+
+<p class=MsoHeader style='tab-stops:.5in center 3.0in right 6.0in'><![if !supportEmptyParas]>&nbsp;<![endif]><o:p></o:p></p>
+
+<p class=MsoNormal><![if !supportEmptyParas]>&nbsp;<![endif]><o:p></o:p></p>
+
+</div>
+
+</body>
+
+</html>
diff --git a/packages/ti/drv/udma/docs/doxygen/tifooter.htm b/packages/ti/drv/udma/docs/doxygen/tifooter.htm
new file mode 100644 (file)
index 0000000..4bdf9c9
--- /dev/null
@@ -0,0 +1,4 @@
+<hr size="1"><small>
+Copyright  $year, Texas Instruments Incorporated</small>
+</body>
+</html>
diff --git a/packages/ti/drv/udma/docs/doxygen/tiheader.htm b/packages/ti/drv/udma/docs/doxygen/tiheader.htm
new file mode 100644 (file)
index 0000000..57de9bb
--- /dev/null
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+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN">
+<html><head><meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
+<title>$title</title>
+<link href="$relpath$doxygen.css" rel="stylesheet" type="text/css">
+<link href="$relpath$tabs.css" rel="stylesheet" type="text/css">
+</head><body>
+<table width=100%>
+<tr>
+  <td bgcolor="black" width="1"><a href="http://www.ti.com"><img border=0 src="../tilogo.gif"></a></td>
+  <td bgcolor="red"><img src="../titagline.gif"></td>
+</tr>
+</table>
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diff --git a/packages/ti/drv/udma/examples/udma_adc_test/main_tirtos.c b/packages/ti/drv/udma/examples/udma_adc_test/main_tirtos.c
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+/*
+ *  Copyright (c) Texas Instruments Incorporated 2018
+ *
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions
+ *  are met:
+ *
+ *    Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *
+ *    Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the
+ *    distribution.
+ *
+ *    Neither the name of Texas Instruments Incorporated nor the names of
+ *    its contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ *  \file main_tirtos.c
+ *
+ *  \brief Main file for TI-RTOS build
+ */
+
+/* ========================================================================== */
+/*                             Include Files                                  */
+/* ========================================================================== */
+
+/* XDCtools Header files */
+#include <xdc/std.h>
+#include <xdc/runtime/Error.h>
+#include <xdc/runtime/System.h>
+/* BIOS Header files */
+#include <ti/sysbios/BIOS.h>
+#include <ti/sysbios/knl/Task.h>
+#include <ti/board/board.h>
+
+#include <ti/drv/udma/examples/udma_apputils/udma_apputils.h>
+
+/* ========================================================================== */
+/*                           Macros & Typedefs                                */
+/* ========================================================================== */
+
+/* Test application stack size */
+#define APP_TSK_STACK_MAIN              (16U * 1024U)
+
+
+/* ========================================================================== */
+/*                         Structure Declarations                             */
+/* ========================================================================== */
+
+/* None */
+
+/* ========================================================================== */
+/*                          Function Declarations                             */
+/* ========================================================================== */
+
+static Void taskFxn(UArg a0, UArg a1);
+extern int32_t Udma_adcTest(void);
+
+/* ========================================================================== */
+/*                            Global Variables                                */
+/* ========================================================================== */
+
+/* Test application stack */
+static uint8_t  gAppTskStackMain[APP_TSK_STACK_MAIN] __attribute__((aligned(32)));;
+
+/* ========================================================================== */
+/*                          Function Definitions                              */
+/* ========================================================================== */
+
+int main(void)
+{
+    Task_Handle task;
+    Error_Block eb;
+    Task_Params taskParams;
+
+    Error_init(&eb);
+
+    Udma_appC7xPreInit();
+
+    /* Initialize the task params */
+    Task_Params_init(&taskParams);
+    /* Set the task priority higher than the default priority (1) */
+    taskParams.priority     = 2;
+    taskParams.stack        = gAppTskStackMain;
+    taskParams.stackSize    = sizeof (gAppTskStackMain);
+
+    task = Task_create(taskFxn, &taskParams, &eb);
+    if(NULL == task)
+    {
+        BIOS_exit(0);
+    }
+    BIOS_start();    /* does not return */
+
+    return(0);
+}
+
+static Void taskFxn(UArg a0, UArg a1)
+{
+    Board_initCfg boardCfg;
+
+    boardCfg = BOARD_INIT_PINMUX_CONFIG |
+               BOARD_INIT_UART_STDIO;
+    Board_init(boardCfg);
+
+    Udma_adcTest();
+
+    return;
+}
+
+#if defined(BUILD_MPU) || defined (__C7100__)
+extern void Osal_initMmuDefault(void);
+void InitMmu(void)
+{
+    Osal_initMmuDefault();
+}
+#endif
diff --git a/packages/ti/drv/udma/examples/udma_adc_test/makefile b/packages/ti/drv/udma/examples/udma_adc_test/makefile
new file mode 100644 (file)
index 0000000..5db4aa1
--- /dev/null
@@ -0,0 +1,45 @@
+#
+# This file is the makefile for building UDMA ADC test app.
+#
+ifeq ($(RULES_MAKE), )
+include $(PDK_INSTALL_PATH)/ti/build/Rules.make
+else
+include $(RULES_MAKE)
+endif
+
+APP_NAME = udma_adc_testapp
+
+SRCDIR = .
+INCDIR =
+
+# List all the external components/interfaces, whose interface header files
+#  need to be included for this component
+INCLUDE_EXTERNAL_INTERFACES = pdk
+
+# List all the components required by the application
+COMP_LIST_COMMON = csl udma board uart i2c sciclient udma_apputils osal_tirtos
+INCLUDE_EXTERNAL_INTERFACES += xdc bios
+XDC_CFG_FILE_$(CORE) = $(PDK_INSTALL_PATH)/ti/build/$(SOC)/sysbios_$(ISA).cfg
+
+# Common source files and CFLAGS across all platforms and cores
+PACKAGE_SRCS_COMMON = .
+SRCS_COMMON = main_tirtos.c udma_adc_test.c
+CFLAGS_LOCAL_COMMON = $(PDK_CFLAGS)
+
+# Core/SoC/platform specific source files and CFLAGS
+# Example:
+#   SRCS_<core/SoC/platform-name> =
+#   CFLAGS_LOCAL_<core/SoC/platform-name> =
+
+# Include common make files
+ifeq ($(MAKERULEDIR), )
+#Makerule path not defined, define this and assume relative path from ROOTDIR
+  MAKERULEDIR := $(ROOTDIR)/ti/build/makerules
+  export MAKERULEDIR
+endif
+include $(MAKERULEDIR)/common.mk
+
+# OBJs and libraries are built by using rule defined in rules_<target>.mk
+#     and need not be explicitly specified here
+
+# Nothing beyond this point
diff --git a/packages/ti/drv/udma/examples/udma_adc_test/udma_adc_test.c b/packages/ti/drv/udma/examples/udma_adc_test/udma_adc_test.c
new file mode 100644 (file)
index 0000000..57e2348
--- /dev/null
@@ -0,0 +1,725 @@
+/*
+ *  Copyright (c) Texas Instruments Incorporated 2018
+ *
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions
+ *  are met:
+ *
+ *    Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *
+ *    Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the
+ *    distribution.
+ *
+ *    Neither the name of Texas Instruments Incorporated nor the names of
+ *    its contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ *  \file udma_adc_test.c
+ *
+ *  \brief UDMA ADC Example. This performs PDMA RX data capture from ADC.
+ *  ADC is configured in single shot mode and captures APP_ADC_NUM_CH channel
+ *  of ADC data. The FIFO is configured to generate a DMA trigger after all
+ *  channel data is captured.
+ */
+
+/* ========================================================================== */
+/*                             Include Files                                  */
+/* ========================================================================== */
+
+#include <stdio.h>
+#include <ti/drv/udma/udma.h>
+#include <ti/csl/soc.h>
+#include <ti/csl/csl_adc.h>
+#include <ti/drv/uart/UART.h>
+#include <ti/drv/uart/UART_stdio.h>
+#include <ti/drv/udma/examples/udma_apputils/udma_apputils.h>
+
+/* ========================================================================== */
+/*                           Macros & Typedefs                                */
+/* ========================================================================== */
+
+/*
+ * Application test parameters
+ */
+#define APP_ADC_MODULE                  (CSL_MCU_ADC0_BASE)
+#define APP_ADC_FIFO                    (ADC_FIFO_NUM_0)
+#define APP_ADC_RX_PDMA_CH              (UDMA_PDMA_CH_MCU_ADC0_CH0_RX)
+#define APP_ADC_NUM_CH                  (8U)
+
+/*
+ * Number of bytes transmitted by PDMA per RX event sent by ADC.
+ * In ADC, this should be equal to the DMA trigger.
+ * Testing single shot mode - so should be same as number of channels being
+ * captured
+ */
+#define RX_BYTES_PER_EVENT              (APP_ADC_NUM_CH)
+
+/** \brief Number of times to perform the ADC operation */
+#define UDMA_TEST_APP_LOOP_CNT          (10U)
+
+/*
+ * Ring parameters
+ */
+/** \brief Number of ring entries - we can prime this much ADC operations */
+#define UDMA_TEST_APP_RING_ENTRIES      (1U)
+/** \brief Size (in bytes) of each ring entry (Size of pointer - 64-bit) */
+#define UDMA_TEST_APP_RING_ENTRY_SIZE   (sizeof(uint64_t))
+/** \brief Total ring memory */
+#define UDMA_TEST_APP_RING_MEM_SIZE     (UDMA_TEST_APP_RING_ENTRIES * \
+                                         UDMA_TEST_APP_RING_ENTRY_SIZE)
+/** \brief This ensures every channel memory is aligned */
+#define UDMA_TEST_APP_RING_MEM_SIZE_ALIGN ((UDMA_TEST_APP_RING_MEM_SIZE + UDMA_CACHELINE_ALIGNMENT) & ~(UDMA_CACHELINE_ALIGNMENT - 1U))
+/** \brief UDMA host mode buffer descriptor memory size. */
+#define UDMA_TEST_APP_DESC_SIZE         (sizeof(CSL_UdmapCppi5HMPD))
+/** \brief This ensures every channel memory is aligned */
+#define UDMA_TEST_APP_DESC_SIZE_ALIGN   ((UDMA_TEST_APP_DESC_SIZE + UDMA_CACHELINE_ALIGNMENT) & ~(UDMA_CACHELINE_ALIGNMENT - 1U))
+
+/* ========================================================================== */
+/*                         Structure Declarations                             */
+/* ========================================================================== */
+
+/* None */
+
+/* ========================================================================== */
+/*                          Function Declarations                             */
+/* ========================================================================== */
+
+static int32_t App_adcTest(Udma_ChHandle rxChHandle);
+static int32_t App_udmaAdcRx(Udma_ChHandle rxChHandle, uint32_t *destBuf);
+
+static void App_udmaEventDmaCb(Udma_EventHandle eventHandle,
+                               uint32_t eventType,
+                               void *appData);
+static void App_udmaEventTdCb(Udma_EventHandle eventHandle,
+                              uint32_t eventType,
+                              void *appData);
+
+static int32_t App_init(Udma_DrvHandle drvHandle);
+static int32_t App_deinit(Udma_DrvHandle drvHandle);
+static int32_t App_create(Udma_DrvHandle drvHandle, Udma_ChHandle rxChHandle);
+static int32_t App_delete(Udma_DrvHandle drvHandle, Udma_ChHandle rxChHandle);
+
+static void App_udmaRxHpdInit(Udma_ChHandle rxChHandle,
+                              uint8_t *pHpdMem,
+                              const uint32_t *destBuf,
+                              uint32_t length);
+
+static void App_adcInit(void);
+static void App_adcConfig(void);
+static void App_adcStart(void);
+static void App_adcStop(void);
+static void App_adcDeInit(void);
+
+static void App_print(const char *str);
+static void App_printNum(const char *str, uint32_t num);
+
+/* ========================================================================== */
+/*                            Global Variables                                */
+/* ========================================================================== */
+
+/*
+ * UDMA driver objects
+ */
+struct Udma_DrvObj      gUdmaDrvObj;
+struct Udma_ChObj       gUdmaRxChObj;
+struct Udma_EventObj    gUdmaCqEventObj;
+struct Udma_EventObj    gUdmaTdCqEventObj;
+
+/*
+ * UDMA Memories
+ */
+static uint8_t gRxFqRingMem[UDMA_TEST_APP_RING_MEM_SIZE_ALIGN] __attribute__((aligned(UDMA_CACHELINE_ALIGNMENT)));
+static uint8_t gRxCqRingMem[UDMA_TEST_APP_RING_MEM_SIZE_ALIGN] __attribute__((aligned(UDMA_CACHELINE_ALIGNMENT)));
+static uint8_t gRxTdCqRingMem[UDMA_TEST_APP_RING_MEM_SIZE_ALIGN] __attribute__((aligned(UDMA_CACHELINE_ALIGNMENT)));
+static uint8_t gUdmaRxHpdMem[UDMA_TEST_APP_DESC_SIZE_ALIGN] __attribute__((aligned(UDMA_CACHELINE_ALIGNMENT)));
+
+/*
+ * Application Buffers
+ */
+uint32_t gAdcDestBuf[APP_ADC_NUM_CH] __attribute__((aligned(UDMA_CACHELINE_ALIGNMENT)));
+
+/* Semaphore to indicate transfer completion */
+static SemaphoreP_Handle gUdmaAppDoneSem = NULL;
+
+/* Global test pass/fail flag */
+static volatile int32_t gUdmaAppResult = UDMA_SOK;
+
+/* ========================================================================== */
+/*                          Function Definitions                              */
+/* ========================================================================== */
+
+/*
+ * Application main
+ */
+int32_t Udma_adcTest(void)
+{
+    int32_t         retVal;
+    Udma_DrvHandle  drvHandle = &gUdmaDrvObj;
+    Udma_ChHandle   rxChHandle = &gUdmaRxChObj;
+
+    App_print("UDMA ADC application started...\n");
+
+    retVal = App_init(drvHandle);
+    if(UDMA_SOK != retVal)
+    {
+        App_print("[Error] UDMA App init failed!!\n");
+    }
+
+    if(UDMA_SOK == retVal)
+    {
+        retVal = App_create(drvHandle, rxChHandle);
+        if(UDMA_SOK != retVal)
+        {
+            App_print("[Error] UDMA App create failed!!\n");
+        }
+    }
+
+    if(UDMA_SOK == retVal)
+    {
+        retVal = App_adcTest(rxChHandle);
+        if(UDMA_SOK != retVal)
+        {
+            App_print("[Error] UDMA App ADC test failed!!\n");
+        }
+    }
+
+    retVal += App_delete(drvHandle, rxChHandle);
+    if(UDMA_SOK != retVal)
+    {
+        App_print("[Error] UDMA App delete failed!!\n");
+    }
+
+    retVal += App_deinit(drvHandle);
+    if(UDMA_SOK != retVal)
+    {
+        App_print("[Error] UDMA App deinit failed!!\n");
+    }
+
+    if((UDMA_SOK == retVal) && (UDMA_SOK == gUdmaAppResult))
+    {
+        App_print("UDMA ADC Test Passed!!\n");
+        App_print("All tests have passed!!\n");
+    }
+    else
+    {
+        App_print("UDMA ADC Test Failed!!\n");
+        App_print("Some tests have failed!!\n");
+    }
+
+    return (0);
+}
+
+static int32_t App_adcTest(Udma_ChHandle rxChHandle)
+{
+    int32_t     retVal = UDMA_SOK;
+    uint32_t    loopCnt = 0U;
+    uint32_t   *destBuf = &gAdcDestBuf[0U];
+
+    while(loopCnt < UDMA_TEST_APP_LOOP_CNT)
+    {
+        /* Perform UDMA ADC RX */
+        retVal = App_udmaAdcRx(rxChHandle, destBuf);
+        if(UDMA_SOK != retVal)
+        {
+            break;
+        }
+
+        loopCnt++;
+        App_printNum("Loop Count: %d completed!!\n\n", loopCnt);
+    }
+
+    return (retVal);
+}
+
+static int32_t App_udmaAdcRx(Udma_ChHandle rxChHandle, uint32_t *destBuf)
+{
+    int32_t         retVal = UDMA_SOK;
+    uint32_t        loopCnt, fifoData, adcData, stepId, chCnt;
+    Udma_ChPdmaPrms pdmaPrms;
+    uint64_t        pDesc = 0;
+    uint8_t        *pHpdMem = &gUdmaRxHpdMem[0U];
+
+    App_adcConfig();
+
+    /* Config PDMA channel */
+    UdmaChPdmaPrms_init(&pdmaPrms);
+    pdmaPrms.elemSize   = UDMA_PDMA_ES_32BITS;
+    pdmaPrms.elemCnt    = RX_BYTES_PER_EVENT;
+    pdmaPrms.fifoCnt    = (APP_ADC_NUM_CH / RX_BYTES_PER_EVENT);
+    retVal = Udma_chConfigPdma(rxChHandle, &pdmaPrms);
+    if(UDMA_SOK != retVal)
+    {
+        App_print("[Error] UDMA RX PDMA config failed!!\n");
+    }
+
+    if(UDMA_SOK == retVal)
+    {
+        retVal = Udma_chEnable(rxChHandle);
+        if(UDMA_SOK != retVal)
+        {
+            App_print("[Error] UDMA RX channel enable failed!!\n");
+        }
+    }
+
+    if(UDMA_SOK == retVal)
+    {
+        /* Update host packet descriptor */
+        App_udmaRxHpdInit(rxChHandle, pHpdMem, destBuf, APP_ADC_NUM_CH * 4U);
+
+        /* Submit HPD to channel */
+        retVal = Udma_ringQueueRaw(
+                     Udma_chGetFqRingHandle(rxChHandle), (uint64_t) pHpdMem);
+        if(UDMA_SOK != retVal)
+        {
+            App_print("[Error] Channel queue failed!!\n");
+        }
+    }
+
+    if(UDMA_SOK == retVal)
+    {
+        App_adcStart();
+
+        /* Wait for return descriptor in completion ring - this marks the
+         * transfer completion */
+        SemaphoreP_pend(gUdmaAppDoneSem, SemaphoreP_WAIT_FOREVER);
+
+        /* Response received in completion queue */
+        retVal = Udma_ringDequeueRaw(
+                     Udma_chGetCqRingHandle(rxChHandle), &pDesc);
+        if(UDMA_SOK != retVal)
+        {
+            App_print("[Error] No descriptor after callback!!\n");
+            retVal = UDMA_EFAIL;
+        }
+    }
+
+    if(UDMA_SOK == retVal)
+    {
+        /*
+         * Sanity check
+         */
+        /* Check returned descriptor pointer */
+        if(pDesc != ((uint64_t) pHpdMem))
+        {
+            App_print("[Error] Host packet descriptor pointer returned doesn't "
+                   "match the submitted address!!\n");
+            retVal = UDMA_EFAIL;
+        }
+    }
+
+    if(UDMA_SOK == retVal)
+    {
+        /* Invalidate cache */
+        Udma_appUtilsCacheInv(pHpdMem, UDMA_TEST_APP_DESC_SIZE);
+        Udma_appUtilsCacheInv(&gAdcDestBuf[0U], sizeof(gAdcDestBuf));
+        for (loopCnt = 0U; loopCnt < APP_ADC_NUM_CH; loopCnt++)
+        {
+            chCnt = loopCnt % APP_ADC_NUM_CH;
+            fifoData = destBuf[loopCnt];
+            stepId   = ((fifoData & ADC_FIFODATA_ADCCHNLID_MASK) >>
+                        ADC_FIFODATA_ADCCHNLID_SHIFT);
+            adcData = ((fifoData & ADC_FIFODATA_ADCDATA_MASK) >>
+                        ADC_FIFODATA_ADCDATA_SHIFT);
+            if(stepId != chCnt)     /* Both channel and step are 1:1 mapped */
+            {
+                retVal = UDMA_EFAIL;
+                App_printNum("Step ID Error: %d\n", stepId);
+            }
+            App_printNum("CH %d ", chCnt);
+            App_printNum("DATA: 0x%0.4x\n", adcData);
+        }
+    }
+
+    App_adcStop();
+
+    retVal += Udma_chDisable(rxChHandle, UDMA_DEFAULT_CH_DISABLE_TIMEOUT);
+    if(UDMA_SOK != retVal)
+    {
+        App_print("[Error] UDMA channel disable failed!!\n");
+    }
+
+    return (retVal);
+}
+
+static void App_udmaEventDmaCb(Udma_EventHandle eventHandle,
+                               uint32_t eventType,
+                               void *appData)
+{
+    if(UDMA_EVENT_TYPE_DMA_COMPLETION == eventType)
+    {
+        SemaphoreP_post(gUdmaAppDoneSem);
+    }
+
+    return;
+}
+
+static void App_udmaEventTdCb(Udma_EventHandle eventHandle,
+                              uint32_t eventType,
+                              void *appData)
+{
+    int32_t             retVal;
+    CSL_UdmapTdResponse tdResp;
+
+    if(UDMA_EVENT_TYPE_TEARDOWN_PACKET == eventType)
+    {
+        /* Response received in Teardown completion queue */
+        retVal = Udma_chDequeueTdResponse(&gUdmaRxChObj, &tdResp);
+        if(UDMA_SOK != retVal)
+        {
+            /* [Error] No TD response after callback!! */
+            gUdmaAppResult = UDMA_EFAIL;
+        }
+    }
+    else
+    {
+        gUdmaAppResult = UDMA_EFAIL;
+    }
+
+    return;
+}
+
+static int32_t App_init(Udma_DrvHandle drvHandle)
+{
+    int32_t         retVal;
+    Udma_InitPrms   initPrms;
+    uint32_t        instId;
+
+    /* UDMA driver init */
+    instId = UDMA_INST_ID_MCU_0;        /* Use the same domain NAVSS instance - ADC is in MCU domain */
+    UdmaInitPrms_init(instId, &initPrms);
+    initPrms.printFxn = &App_print;
+    retVal = Udma_init(drvHandle, &initPrms);
+    if(UDMA_SOK != retVal)
+    {
+        App_print("[Error] UDMA init failed!!\n");
+    }
+
+    App_adcInit();
+
+    return (retVal);
+}
+
+static int32_t App_deinit(Udma_DrvHandle drvHandle)
+{
+    int32_t     retVal;
+
+    App_adcDeInit();
+
+    retVal = Udma_deinit(drvHandle);
+    if(UDMA_SOK != retVal)
+    {
+        App_print("[Error] UDMA deinit failed!!\n");
+    }
+
+    return (retVal);
+}
+
+static int32_t App_create(Udma_DrvHandle drvHandle, Udma_ChHandle rxChHandle)
+{
+    int32_t             retVal = UDMA_SOK;
+    uint32_t            chType;
+    Udma_ChPrms         chPrms;
+    Udma_ChRxPrms       rxPrms;
+    Udma_EventHandle    eventHandle;
+    Udma_EventPrms      eventPrms;
+    SemaphoreP_Params   semPrms;
+
+    SemaphoreP_Params_init(&semPrms);
+    gUdmaAppDoneSem = SemaphoreP_create(0, &semPrms);
+    if(NULL == gUdmaAppDoneSem)
+    {
+        App_print("[Error] Sem create failed!!\n");
+        retVal = UDMA_EFAIL;
+    }
+
+    if(UDMA_SOK == retVal)
+    {
+        /* Init channel parameters */
+        chType = UDMA_CH_TYPE_PDMA_RX;
+        UdmaChPrms_init(&chPrms, chType);
+        chPrms.peerChNum            = APP_ADC_RX_PDMA_CH;
+        chPrms.fqRingPrms.ringMem   = &gRxFqRingMem[0U];
+        chPrms.cqRingPrms.ringMem   = &gRxCqRingMem[0U];
+        chPrms.tdCqRingPrms.ringMem = &gRxTdCqRingMem[0U];
+        chPrms.fqRingPrms.ringMemSize   = UDMA_TEST_APP_RING_MEM_SIZE;
+        chPrms.cqRingPrms.ringMemSize   = UDMA_TEST_APP_RING_MEM_SIZE;
+        chPrms.tdCqRingPrms.ringMemSize = UDMA_TEST_APP_RING_MEM_SIZE;
+        chPrms.fqRingPrms.elemCnt   = UDMA_TEST_APP_RING_ENTRIES;
+        chPrms.cqRingPrms.elemCnt   = UDMA_TEST_APP_RING_ENTRIES;
+        chPrms.tdCqRingPrms.elemCnt = UDMA_TEST_APP_RING_ENTRIES;
+
+        /* Open channel for block copy */
+        retVal = Udma_chOpen(drvHandle, rxChHandle, chType, &chPrms);
+        if(UDMA_SOK != retVal)
+        {
+            App_print("[Error] UDMA channel open failed!!\n");
+        }
+    }
+
+    if(UDMA_SOK == retVal)
+    {
+        /* Config RX channel */
+        UdmaChRxPrms_init(&rxPrms, UDMA_CH_TYPE_PDMA_RX);
+        retVal = Udma_chConfigRx(rxChHandle, &rxPrms);
+        if(UDMA_SOK != retVal)
+        {
+            App_print("[Error] UDMA RX channel config failed!!\n");
+        }
+    }
+
+    if(UDMA_SOK == retVal)
+    {
+        /* Register ring completion callback */
+        eventHandle = &gUdmaCqEventObj;
+        UdmaEventPrms_init(&eventPrms);
+        eventPrms.eventType         = UDMA_EVENT_TYPE_DMA_COMPLETION;
+        eventPrms.eventMode         = UDMA_EVENT_MODE_SHARED;
+        eventPrms.chHandle          = rxChHandle;
+        eventPrms.masterEventHandle = Udma_eventGetGlobalHandle(drvHandle);
+        eventPrms.eventCb           = &App_udmaEventDmaCb;
+        retVal = Udma_eventRegister(drvHandle, eventHandle, &eventPrms);
+        if(UDMA_SOK != retVal)
+        {
+            App_print("[Error] UDMA CQ event register failed!!\n");
+        }
+    }
+
+    if(UDMA_SOK == retVal)
+    {
+        /* Register teardown ring completion callback */
+        eventHandle = &gUdmaTdCqEventObj;
+        UdmaEventPrms_init(&eventPrms);
+        eventPrms.eventType         = UDMA_EVENT_TYPE_TEARDOWN_PACKET;
+        eventPrms.eventMode         = UDMA_EVENT_MODE_SHARED;
+        eventPrms.chHandle          = rxChHandle;
+        eventPrms.masterEventHandle = Udma_eventGetGlobalHandle(drvHandle);
+        eventPrms.eventCb           = &App_udmaEventTdCb;
+        retVal = Udma_eventRegister(drvHandle, eventHandle, &eventPrms);
+        if(UDMA_SOK != retVal)
+        {
+            App_print("[Error] UDMA Teardown CQ event register failed!!\n");
+        }
+    }
+
+    return (retVal);
+}
+
+static int32_t App_delete(Udma_DrvHandle drvHandle, Udma_ChHandle rxChHandle)
+{
+    int32_t             retVal = UDMA_SOK;
+    Udma_EventHandle    eventHandle;
+
+    /* Unregister all events */
+    eventHandle = &gUdmaTdCqEventObj;
+    retVal += Udma_eventUnRegister(eventHandle);
+    eventHandle = &gUdmaCqEventObj;
+    retVal += Udma_eventUnRegister(eventHandle);
+    if(UDMA_SOK != retVal)
+    {
+        App_print("[Error] UDMA event unregister failed!!\n");
+    }
+
+    retVal += Udma_chClose(rxChHandle);
+    if(UDMA_SOK != retVal)
+    {
+        App_print("[Error] UDMA channel close failed!!\n");
+    }
+
+    if(gUdmaAppDoneSem != NULL)
+    {
+        SemaphoreP_delete(gUdmaAppDoneSem);
+        gUdmaAppDoneSem = NULL;
+    }
+
+    return (retVal);
+}
+
+static void App_udmaRxHpdInit(Udma_ChHandle rxChHandle,
+                              uint8_t *pHpdMem,
+                              const uint32_t *destBuf,
+                              uint32_t length)
+{
+    CSL_UdmapCppi5HMPD *pHpd = (CSL_UdmapCppi5HMPD *) pHpdMem;
+    uint32_t descType = (uint32_t)CSL_UDMAP_CPPI5_PD_DESCINFO_DTYPE_VAL_HOST;
+    uint32_t cqRingNum = Udma_chGetCqRingNum(rxChHandle);
+
+    /* Setup descriptor */
+    CSL_udmapCppi5SetDescType(pHpd, descType);
+    CSL_udmapCppi5SetEpiDataPresent(pHpd, FALSE);
+    CSL_udmapCppi5SetPsDataLoc(pHpd, 0U);
+    CSL_udmapCppi5SetPsDataLen(pHpd, 0U);
+    CSL_udmapCppi5SetPktLen(pHpd, descType, length);
+    CSL_udmapCppi5SetPsFlags(pHpd, 0U);
+    CSL_udmapCppi5SetIds(pHpd, descType, 0x321, UDMA_DEFAULT_FLOW_ID);
+    CSL_udmapCppi5SetSrcTag(pHpd, 0x0000);     /* Not used */
+    CSL_udmapCppi5SetDstTag(pHpd, 0x0000);     /* Not used */
+    CSL_udmapCppi5SetReturnPolicy(
+        pHpd,
+        descType,
+        CSL_UDMAP_CPPI5_PD_PKTINFO2_RETPOLICY_VAL_ENTIRE_PKT,
+        CSL_UDMAP_CPPI5_PD_PKTINFO2_EARLYRET_VAL_NO,
+        CSL_UDMAP_CPPI5_PD_PKTINFO2_RETPUSHPOLICY_VAL_TO_TAIL,
+        cqRingNum);
+    CSL_udmapCppi5LinkDesc(pHpd, 0U);
+    CSL_udmapCppi5SetBufferAddr(pHpd, (uint64_t) destBuf);
+    CSL_udmapCppi5SetBufferLen(pHpd, length);
+    CSL_udmapCppi5SetOrgBufferAddr(pHpd, (uint64_t) destBuf);
+    CSL_udmapCppi5SetOrgBufferLen(pHpd, length);
+
+    /* Writeback cache */
+    Udma_appUtilsCacheWb(pHpdMem, UDMA_TEST_APP_DESC_SIZE);
+
+    return;
+}
+
+static void App_adcInit(void)
+{
+    /* Clear All interrupt status */
+    ADCClearIntrStatus(APP_ADC_MODULE, ADC_INTR_STATUS_ALL);
+
+    /* Power up AFE */
+    ADCPowerUp(APP_ADC_MODULE, TRUE);
+    /* Wait for 4us at least */
+    Osal_delay(1);
+
+    /* Do the internal calibration */
+    ADCInit(APP_ADC_MODULE, FALSE, 0U, 0U);
+
+    return;
+}
+
+static void App_adcConfig(void)
+{
+    uint32_t        chCnt;
+    adcStepConfig_t adcConfig;
+
+    /* Initialize ADC configuration params */
+    adcConfig.mode             = ADC_OPERATION_MODE_SINGLE_SHOT;
+    adcConfig.openDelay        = 0x1U;
+    adcConfig.sampleDelay      = 0U;
+    adcConfig.rangeCheckEnable = 0U;
+    adcConfig.averaging        = ADC_AVERAGING_16_SAMPLES;
+    adcConfig.fifoNum          = APP_ADC_FIFO;
+    for(chCnt = 0U; chCnt < APP_ADC_NUM_CH; chCnt++)
+    {
+        /* Step configuration */
+        adcConfig.channel = ADC_CHANNEL_1 + chCnt;
+        ADCSetStepParams(APP_ADC_MODULE, ADC_STEP_1 + chCnt, &adcConfig);
+        /* step enable */
+        ADCStepEnable(APP_ADC_MODULE, ADC_STEP_1 + chCnt, TRUE);
+    }
+
+    ADCStepIdTagEnable(APP_ADC_MODULE, TRUE);
+    ADCSetDMAFIFOThresholdLevel(APP_ADC_MODULE, APP_ADC_FIFO, APP_ADC_NUM_CH);
+
+    return;
+}
+
+static void App_adcStart(void)
+{
+    adcSequencerStatus_t status;
+
+    /* Enable DMA */
+    ADCFIFODMAAccessEnable(APP_ADC_MODULE, APP_ADC_FIFO, TRUE);
+
+    /* Check if FSM is idle */
+    ADCGetSequencerStatus(APP_ADC_MODULE, &status);
+    while((ADC_ADCSTAT_FSM_BUSY_IDLE != status.fsmBusy) &&
+           ADC_ADCSTAT_STEP_ID_IDLE != status.stepId)
+    {
+        ADCGetSequencerStatus(APP_ADC_MODULE, &status);
+    }
+
+    /* Start ADC conversion */
+    ADCStart(APP_ADC_MODULE, TRUE);
+
+    return;
+}
+
+static void App_adcStop(void)
+{
+    uint32_t                chCnt;
+    adcSequencerStatus_t    status;
+
+    /* Disable DMA */
+    ADCFIFODMAAccessEnable(APP_ADC_MODULE, APP_ADC_FIFO, FALSE);
+
+    /* Disable all/enabled steps */
+    for(chCnt = 0U; chCnt < APP_ADC_NUM_CH; chCnt++)
+    {
+        ADCStepEnable(APP_ADC_MODULE, ADC_STEP_1 + chCnt, FALSE);
+    }
+
+    /* Wait for FSM to go IDLE */
+    ADCGetSequencerStatus(APP_ADC_MODULE, &status);
+    while((ADC_ADCSTAT_FSM_BUSY_IDLE != status.fsmBusy) &&
+           ADC_ADCSTAT_STEP_ID_IDLE != status.stepId)
+    {
+        ADCGetSequencerStatus(APP_ADC_MODULE, &status);
+    }
+
+    /* Stop ADC */
+    ADCStart(APP_ADC_MODULE, FALSE);
+
+    /* Wait for FSM to go IDLE */
+    ADCGetSequencerStatus(APP_ADC_MODULE, &status);
+    while((ADC_ADCSTAT_FSM_BUSY_IDLE != status.fsmBusy) &&
+           ADC_ADCSTAT_STEP_ID_IDLE != status.stepId)
+    {
+        ADCGetSequencerStatus(APP_ADC_MODULE, &status);
+    }
+
+    return;
+}
+
+static void App_adcDeInit(void)
+{
+    /* Power down ADC */
+    ADCPowerUp(APP_ADC_MODULE, FALSE);
+
+    return;
+}
+
+static void App_print(const char *str)
+{
+    UART_printf("%s", str);
+
+    if(TRUE == Udma_appIsPrintSupported())
+    {
+        printf("%s", str);
+    }
+
+    return;
+}
+
+static void App_printNum(const char *str, uint32_t num)
+{
+    static char printBuf[200U];
+
+    snprintf(printBuf, 200U, str, num);
+    UART_printf("%s", printBuf);
+
+    if(TRUE == Udma_appIsPrintSupported())
+    {
+        printf("%s", printBuf);
+    }
+
+    return;
+}
diff --git a/packages/ti/drv/udma/examples/udma_apputils/makefile b/packages/ti/drv/udma/examples/udma_apputils/makefile
new file mode 100644 (file)
index 0000000..2f4d82f
--- /dev/null
@@ -0,0 +1,41 @@
+#
+# This file is the makefile for building UDMA example utility library.
+#
+ifeq ($(RULES_MAKE), )
+include $(PDK_INSTALL_PATH)/ti/build/Rules.make
+else
+include $(RULES_MAKE)
+endif
+
+MODULE_NAME = udma_apputils
+
+SRCDIR = .
+INCDIR =
+
+# List all the external components/interfaces, whose interface header files
+# need to be included for this component
+INCLUDE_EXTERNAL_INTERFACES = pdk
+
+# Common source files and CFLAGS across all platforms and cores
+SRCS_COMMON += udma_apputils.c
+
+PACKAGE_SRCS_COMMON = .
+CFLAGS_LOCAL_COMMON = $(PDK_CFLAGS) $(UDMA_CFLAGS)
+
+# Core/SoC/platform specific source files and CFLAGS
+# Example:
+#   SRCS_<core/SoC/platform-name> =
+#   CFLAGS_LOCAL_<core/SoC/platform-name> =
+
+# Include common make files
+ifeq ($(MAKERULEDIR), )
+#Makerule path not defined, define this and assume relative path from ROOTDIR
+  MAKERULEDIR := $(ROOTDIR)/ti/build/makerules
+  export MAKERULEDIR
+endif
+include $(MAKERULEDIR)/common.mk
+
+# OBJs and libraries are built by using rule defined in rules_<target>.mk
+#     and need not be explicitly specified here
+
+# Nothing beyond this point
diff --git a/packages/ti/drv/udma/examples/udma_apputils/udma_apputils.c b/packages/ti/drv/udma/examples/udma_apputils/udma_apputils.c
new file mode 100755 (executable)
index 0000000..819df26
--- /dev/null
@@ -0,0 +1,281 @@
+/*
+ *  Copyright (c) Texas Instruments Incorporated 2018
+ *
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions
+ *  are met:
+ *
+ *    Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *
+ *    Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the
+ *    distribution.
+ *
+ *    Neither the name of Texas Instruments Incorporated nor the names of
+ *    its contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ *  \file udma_apputils.c
+ *
+ *  \brief Common UDMA application utility used in all UDMA example.
+ *
+ */
+
+/* ========================================================================== */
+/*                             Include Files                                  */
+/* ========================================================================== */
+
+#include <ti/drv/udma/udma.h>
+#include <ti/drv/sciclient/sciclient.h>
+#include <ti/drv/udma/examples/udma_apputils/udma_apputils.h>
+#if defined (__C7100__)
+#include <ti/csl/csl_clec.h>
+#include <ti/csl/arch/csl_arch.h>
+#endif
+
+/* ========================================================================== */
+/*                           Macros & Typedefs                                */
+/* ========================================================================== */
+
+/* None */
+
+/* ========================================================================== */
+/*                         Structure Declarations                             */
+/* ========================================================================== */
+
+/* None */
+
+/* ========================================================================== */
+/*                          Function Declarations                             */
+/* ========================================================================== */
+
+/* None */
+
+/* ========================================================================== */
+/*                            Global Variables                                */
+/* ========================================================================== */
+
+/* None */
+
+/* ========================================================================== */
+/*                          Function Definitions                              */
+/* ========================================================================== */
+
+void Udma_appUtilsCacheWb(const void *addr, int32_t size)
+{
+    uint32_t    isCacheCoherent = Udma_isCacheCoherent();
+
+    if(isCacheCoherent != TRUE)
+    {
+        CacheP_wb(addr, size);
+    }
+
+    return;
+}
+
+void Udma_appUtilsCacheInv(const void * addr, int32_t size)
+{
+    uint32_t    isCacheCoherent = Udma_isCacheCoherent();
+
+    if(isCacheCoherent != TRUE)
+    {
+        CacheP_Inv(addr, size);
+    }
+
+    return;
+}
+
+void Udma_appUtilsCacheWbInv(const void * addr, int32_t size)
+{
+    uint32_t    isCacheCoherent = Udma_isCacheCoherent();
+
+    if(isCacheCoherent != TRUE)
+    {
+        CacheP_wbInv(addr, size);
+    }
+
+    return;
+}
+
+uint64_t Udma_appVirtToPhyFxn(const void *virtAddr, uint32_t chNum, void *appData)
+{
+    uint64_t    phyAddr;
+
+    phyAddr = (uint64_t) virtAddr;
+#if defined (BUILD_C66X_1) || defined (BUILD_C66X_2)
+    /* Convert local L2RAM address to global space */
+    if((phyAddr >= CSL_C66_COREPAC_L2_BASE) &&
+       (phyAddr < (CSL_C66_COREPAC_L2_BASE + CSL_C66_COREPAC_L2_SIZE)))
+    {
+#if defined (BUILD_C66X_1)
+        phyAddr -= CSL_C66_COREPAC_L2_BASE;
+        phyAddr += CSL_C66SS0_C66_SDMA_L2SRAM_0_BASE;
+#endif
+#if defined (BUILD_C66X_2)
+        phyAddr -= CSL_C66_COREPAC_L2_BASE;
+        phyAddr += CSL_C66SS1_C66_SDMA_L2SRAM_0_BASE;
+#endif
+    }
+#endif
+
+    return (phyAddr);
+}
+
+void *Udma_appPhyToVirtFxn(uint64_t phyAddr, uint32_t chNum, void *appData)
+{
+    void       *virtAddr;
+
+#if defined (__aarch64__) || defined (__C7100__)
+    virtAddr = (void *) phyAddr;
+#else
+    uint32_t temp;
+
+    /* Convert global L2RAM address to local space */
+#if defined (BUILD_C66X_1)
+    if((phyAddr >= CSL_C66SS0_C66_SDMA_L2SRAM_0_BASE) &&
+       (phyAddr < (CSL_C66SS0_C66_SDMA_L2SRAM_0_BASE + CSL_C66_COREPAC_L2_SIZE)))
+    {
+        phyAddr -= CSL_C66SS0_C66_SDMA_L2SRAM_0_BASE;
+        phyAddr += CSL_C66_COREPAC_L2_BASE;
+    }
+#endif
+#if defined (BUILD_C66X_2)
+    if((phyAddr >= CSL_C66SS1_C66_SDMA_L2SRAM_0_BASE) &&
+       (phyAddr < (CSL_C66SS1_C66_SDMA_L2SRAM_0_BASE + CSL_C66_COREPAC_L2_SIZE)))
+    {
+        phyAddr -= CSL_C66SS1_C66_SDMA_L2SRAM_0_BASE;
+        phyAddr += CSL_C66_COREPAC_L2_BASE;
+    }
+#endif
+
+    /* R5/C66x is 32-bit; need to truncate to avoid void * typecast error */
+    temp = (uint32_t) phyAddr;
+    virtAddr = (void *) temp;
+#endif
+
+    return (virtAddr);
+}
+
+uint32_t Udma_appIsPrintSupported(void)
+{
+    uint32_t retVal = TRUE;
+
+    /* Semi hosting not supported for MPU on Simulator */
+#if (defined (BUILD_MPU) && defined (SIMULATOR))
+    retVal = FALSE;
+#endif
+
+    /* Printf doesn't work for MPU when run from SBL with no CCS connection
+     * There is no flag to detect SBL or CCS mode. Hence disable the print
+     * for MPU unconditionally */
+#if defined (BUILD_MPU)
+    retVal = FALSE;
+#endif
+
+    return (retVal);
+}
+
+void Udma_appC66xIntrConfig(void)
+{
+#if defined (_TMS320C6X)
+    struct tisci_msg_rm_irq_set_req     rmIrqReq;
+    struct tisci_msg_rm_irq_set_resp    rmIrqResp;
+
+    /* On C66x builds we define OS timer tick in the configuration file to
+     * trigger event #21 for C66x_1 and #20 for C66x_2. Map
+     * DMTimer 0 interrupt to these events through DMSC RM API.
+     */
+    rmIrqReq.valid_params           = TISCI_MSG_VALUE_RM_DST_ID_VALID |
+                                      TISCI_MSG_VALUE_RM_DST_HOST_IRQ_VALID;
+    rmIrqReq.src_id                 = TISCI_DEV_TIMER0;
+    rmIrqReq.src_index              = 0U;
+#if defined (BUILD_C66X_1)
+    rmIrqReq.dst_id                 = TISCI_DEV_C66SS0_CORE0;
+    rmIrqReq.dst_host_irq           = 21U;
+#endif
+#if defined (BUILD_C66X_2)
+    rmIrqReq.dst_id                 = TISCI_DEV_C66SS1_CORE0;
+    rmIrqReq.dst_host_irq           = 20U;
+#endif
+    /* Unused params */
+    rmIrqReq.global_event           = 0U;
+    rmIrqReq.ia_id                  = 0U;
+    rmIrqReq.vint                   = 0U;
+    rmIrqReq.vint_status_bit_index  = 0U;
+    rmIrqReq.secondary_host         = TISCI_MSG_VALUE_RM_UNUSED_SECONDARY_HOST;
+
+    Sciclient_rmIrqSet(&rmIrqReq, &rmIrqResp, UDMA_SCICLIENT_TIMEOUT);
+#endif
+
+    return;
+}
+
+void Udma_appC7xPreInit(void)
+{
+#if defined (__C7100__)
+    CSL_ClecEventConfig cfgClec;
+    CSL_CLEC_EVTRegs   *clecBaseAddr = (CSL_CLEC_EVTRegs*) CSL_COMPUTE_CLUSTER0_CLEC_REGS_BASE;
+    uint32_t            i, maxInputs = 2048U;
+
+    /* make secure claim bit to FALSE so that after we switch to non-secure mode
+     * we can program the CLEC MMRs
+     */
+    cfgClec.secureClaimEnable = FALSE;
+    cfgClec.evtSendEnable     = FALSE;
+    cfgClec.rtMap             = CSL_CLEC_RTMAP_DISABLE;
+    cfgClec.extEvtNum         = 0U;
+    cfgClec.c7xEvtNum         = 0U;
+    for(i = 0U; i < maxInputs; i++)
+    {
+        CSL_clecConfigEvent(clecBaseAddr, i, &cfgClec);
+    }
+
+    i = CSLR_COMPUTE_CLUSTER0_GIC500SS_SPI_TIMER0_INTR_PEND_0 + 992;  /* Used for Timer Interrupt */
+    /* Configure CLEC for DMTimer0, SYS/BIOS uses interrupt 14 for DMTimer0 by default */
+    cfgClec.secureClaimEnable = FALSE;
+    cfgClec.evtSendEnable     = TRUE;
+    cfgClec.rtMap             = CSL_CLEC_RTMAP_CPU_ALL;
+    cfgClec.extEvtNum         = 0;
+    cfgClec.c7xEvtNum         = 14;
+    CSL_clecConfigEvent(clecBaseAddr, i, &cfgClec);
+
+    /* Switch now */
+    CSL_c7xSecSupv2NonSecSupv();
+#endif
+
+    return;
+}
+
+uint32_t Udma_appIsUdmapStatsSupported(void)
+{
+    uint32_t retVal = TRUE;
+
+#if defined (SOC_AM65XX)
+    uint32_t jtagIdVal, variatn;
+
+    jtagIdVal = CSL_REG32_RD(CSL_WKUP_CTRL_MMR0_CFG0_BASE + CSL_WKUP_CTRL_MMR_CFG0_JTAGID);
+    variatn   = CSL_FEXT(jtagIdVal, WKUP_CTRL_MMR_CFG0_JTAGID_VARIATN);
+    if (variatn == 0U)
+    {
+        retVal = FALSE;
+    }
+#endif
+
+    return (retVal);
+}
diff --git a/packages/ti/drv/udma/examples/udma_apputils/udma_apputils.h b/packages/ti/drv/udma/examples/udma_apputils/udma_apputils.h
new file mode 100644 (file)
index 0000000..a864fc1
--- /dev/null
@@ -0,0 +1,176 @@
+/*
+ *  Copyright (c) Texas Instruments Incorporated 2018
+ *
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions
+ *  are met:
+ *
+ *    Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *
+ *    Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the
+ *    distribution.
+ *
+ *    Neither the name of Texas Instruments Incorporated nor the names of
+ *    its contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ *  \file udma_apputils.h
+ *
+ *  \brief Common UDMA application utility used in all UDMA example.
+ *
+ *  NOTE: This library is meant only for UDMA examples. Customers are not
+ *  encouraged to use this layer as these are very specific to the examples
+ *  written and the API behaviour and signature can change at any time to
+ *  suit the examples.
+ *
+ */
+
+#ifndef UDMA_APPUTILS_H_
+#define UDMA_APPUTILS_H_
+
+/* ========================================================================== */
+/*                             Include Files                                  */
+/* ========================================================================== */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* ========================================================================== */
+/*                           Macros & Typedefs                                */
+/* ========================================================================== */
+
+/* None */
+
+/* ========================================================================== */
+/*                         Structure Declarations                             */
+/* ========================================================================== */
+
+/* None */
+
+/* ========================================================================== */
+/*                          Function Declarations                             */
+/* ========================================================================== */
+
+/**
+ *  \brief Perform cache WB operation based on whether cache is
+ *  coherent or not
+ *
+ *  This internally uses the OSAL API.
+ *
+ *  \param  addr  Start address of the cache line/s
+ *  \param  size  Size (in bytes) of the memory to be written back
+ *
+ */
+void Udma_appUtilsCacheWb(const void *addr, int32_t size);
+
+/**
+ *  \brief Perform cache invalidate operation based on whether cache is
+ *  coherent or not
+ *
+ *  This internally uses the OSAL API.
+ *
+ *  \param  addr  Start address of the cache line/s
+ *  \param  size  Size (in bytes) of the memory to invalidate
+ *
+ */
+void Udma_appUtilsCacheInv(const void * addr, int32_t size);
+
+/**
+ *  \brief Perform cache writeback and invalidate operation based on
+ *  whether cache is coherent or not
+ *
+ *  This internally uses the OSAL API.
+ *
+ *  \param  addr  Start address of the cache line/s
+ *  \param  size  Size (in bytes) of the memory to writeback and invalidate
+ *
+ */
+void Udma_appUtilsCacheWbInv(const void * addr, int32_t size);
+
+/**
+ *  \brief Virtual to physical translation function.
+ *
+ *  \param virtAddr [IN] Virtual address
+ *  \param chNum    [IN] Channel number passed during channel open.
+ *                       Note: When called for functions which is not channel
+ *                       dependent (like ring alloc), this parameter will
+ *                       be set to #UDMA_DMA_CH_INVALID.
+ *  \param appData  [IN] Callback pointer passed during channel open.
+ *                       Note: When called for functions which is not channel
+ *                       dependent (like ring alloc), this parameter will
+ *                       be set to NULL.
+ *
+ *  \return Corresponding physical address
+ */
+uint64_t Udma_appVirtToPhyFxn(const void *virtAddr, uint32_t chNum, void *appData);
+
+/**
+ *  \brief Physical to virtual translation function.
+ *
+ *  \param phyAddr  [IN] Physical address
+ *  \param chNum    [IN] Channel number passed during channel open.
+ *                       Note: When called for functions which is not channel
+ *                       dependent (like ring alloc), this parameter will
+ *                       be set to #UDMA_DMA_CH_INVALID.
+ *  \param appData  [IN] Callback pointer passed during channel open.
+ *                       Note: When called for functions which is not channel
+ *                       dependent (like ring alloc), this parameter will
+ *                       be set to NULL.
+ *
+ *  \return Corresponding virtual address
+ */
+void *Udma_appPhyToVirtFxn(uint64_t phyAddr, uint32_t chNum, void *appData);
+
+/**
+ *  \brief Returns if print can be supported for a platform/build
+ *
+ *  \return TRUE if print can be supported for a platform. Else FALSE
+ */
+uint32_t Udma_appIsPrintSupported(void);
+
+/**
+ *  \brief Setup C66x timer interrupt as required by SYSBIOS
+ */
+void Udma_appC66xIntrConfig(void);
+
+/**
+ *  \brief C7x pre-init function.
+ *  Should be called in TI-RTOS main before calling any CLEC or SCICLIENT calls
+ *
+ *  This switches C7x to non-secure mode, this is needed so that coherency
+ *  between A72 (which runs in non-secure mode) and C7x can be effective.
+ *  Since SCICLIENT uses non-secure thread, all application should be switched
+ *  to non-secure mode as well.
+ */
+void Udma_appC7xPreInit(void);
+
+/**
+ *  \brief Returns if UDMA IP statistics is supported in the SoC
+ *
+ *  \return TRUE if statistics is supported. Else FALSE
+ */
+uint32_t Udma_appIsUdmapStatsSupported(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif  /* #define UDMA_APPUTILS_H_ */
diff --git a/packages/ti/drv/udma/examples/udma_chaining_test/main_tirtos.c b/packages/ti/drv/udma/examples/udma_chaining_test/main_tirtos.c
new file mode 100644 (file)
index 0000000..3411a08
--- /dev/null
@@ -0,0 +1,132 @@
+/*
+ *  Copyright (c) Texas Instruments Incorporated 2018
+ *
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions
+ *  are met:
+ *
+ *    Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *
+ *    Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the
+ *    distribution.
+ *
+ *    Neither the name of Texas Instruments Incorporated nor the names of
+ *    its contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ *  \file main_tirtos.c
+ *
+ *  \brief Main file for TI-RTOS build
+ */
+
+/* ========================================================================== */
+/*                             Include Files                                  */
+/* ========================================================================== */
+
+/* XDCtools Header files */
+#include <xdc/std.h>
+#include <xdc/runtime/Error.h>
+#include <xdc/runtime/System.h>
+/* BIOS Header files */
+#include <ti/sysbios/BIOS.h>
+#include <ti/sysbios/knl/Task.h>
+#include <ti/board/board.h>
+
+#include <ti/drv/udma/examples/udma_apputils/udma_apputils.h>
+
+/* ========================================================================== */
+/*                           Macros & Typedefs                                */
+/* ========================================================================== */
+
+/* Test application stack size */
+#define APP_TSK_STACK_MAIN              (16U * 1024U)
+
+
+/* ========================================================================== */
+/*                         Structure Declarations                             */
+/* ========================================================================== */
+
+/* None */
+
+/* ========================================================================== */
+/*                          Function Declarations                             */
+/* ========================================================================== */
+
+static Void taskFxn(UArg a0, UArg a1);
+extern int32_t Udma_chainingTest(void);
+
+/* ========================================================================== */
+/*                            Global Variables                                */
+/* ========================================================================== */
+
+/* Test application stack */
+static uint8_t  gAppTskStackMain[APP_TSK_STACK_MAIN] __attribute__((aligned(32)));;
+
+/* ========================================================================== */
+/*                          Function Definitions                              */
+/* ========================================================================== */
+
+int main(void)
+{
+    Task_Handle task;
+    Error_Block eb;
+    Task_Params taskParams;
+
+    Error_init(&eb);
+
+    Udma_appC7xPreInit();
+
+    /* Initialize the task params */
+    Task_Params_init(&taskParams);
+    /* Set the task priority higher than the default priority (1) */
+    taskParams.priority     = 2;
+    taskParams.stack        = gAppTskStackMain;
+    taskParams.stackSize    = sizeof (gAppTskStackMain);
+
+    task = Task_create(taskFxn, &taskParams, &eb);
+    if(NULL == task)
+    {
+        BIOS_exit(0);
+    }
+    BIOS_start();    /* does not return */
+
+    return(0);
+}
+
+static Void taskFxn(UArg a0, UArg a1)
+{
+    Board_initCfg boardCfg;
+
+    boardCfg = BOARD_INIT_PINMUX_CONFIG |
+               BOARD_INIT_UART_STDIO;
+    Board_init(boardCfg);
+
+    Udma_chainingTest();
+
+    return;
+}
+
+#if defined(BUILD_MPU) || defined (__C7100__)
+extern void Osal_initMmuDefault(void);
+void InitMmu(void)
+{
+    Osal_initMmuDefault();
+}
+#endif
diff --git a/packages/ti/drv/udma/examples/udma_chaining_test/makefile b/packages/ti/drv/udma/examples/udma_chaining_test/makefile
new file mode 100644 (file)
index 0000000..f1ff923
--- /dev/null
@@ -0,0 +1,45 @@
+#
+# This file is the makefile for building UDMA chaining test app for TI RTOS
+#
+ifeq ($(RULES_MAKE), )
+include $(PDK_INSTALL_PATH)/ti/build/Rules.make
+else
+include $(RULES_MAKE)
+endif
+
+APP_NAME = udma_chaining_testapp
+
+SRCDIR = .
+INCDIR =
+
+# List all the external components/interfaces, whose interface header files
+#  need to be included for this component
+INCLUDE_EXTERNAL_INTERFACES = pdk
+
+# List all the components required by the application
+COMP_LIST_COMMON = csl udma board uart i2c sciclient udma_apputils osal_tirtos
+INCLUDE_EXTERNAL_INTERFACES += xdc bios
+XDC_CFG_FILE_$(CORE) = $(PDK_INSTALL_PATH)/ti/build/$(SOC)/sysbios_$(ISA).cfg
+
+# Common source files and CFLAGS across all platforms and cores
+PACKAGE_SRCS_COMMON = .
+SRCS_COMMON = main_tirtos.c udma_chaining_test.c
+CFLAGS_LOCAL_COMMON = $(PDK_CFLAGS)
+
+# Core/SoC/platform specific source files and CFLAGS
+# Example:
+#   SRCS_<core/SoC/platform-name> =
+#   CFLAGS_LOCAL_<core/SoC/platform-name> =
+
+# Include common make files
+ifeq ($(MAKERULEDIR), )
+#Makerule path not defined, define this and assume relative path from ROOTDIR
+  MAKERULEDIR := $(ROOTDIR)/ti/build/makerules
+  export MAKERULEDIR
+endif
+include $(MAKERULEDIR)/common.mk
+
+# OBJs and libraries are built by using rule defined in rules_<target>.mk
+#     and need not be explicitly specified here
+
+# Nothing beyond this point
diff --git a/packages/ti/drv/udma/examples/udma_chaining_test/udma_chaining_test.c b/packages/ti/drv/udma/examples/udma_chaining_test/udma_chaining_test.c
new file mode 100644 (file)
index 0000000..2912859
--- /dev/null
@@ -0,0 +1,857 @@
+/*
+ *  Copyright (c) Texas Instruments Incorporated 2018
+ *
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions
+ *  are met:
+ *
+ *    Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *
+ *    Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the
+ *    distribution.
+ *
+ *    Neither the name of Texas Instruments Incorporated nor the names of
+ *    its contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ *  \file udma_chaining_test.c
+ *
+ *  \brief UDMA chaining sample application performing a chain of block copy
+ *  using channel global trigger: CH0 -> CH1 -> ... -> CHx.
+ *  The first channel doesn't user a global trigger and each channel triggers
+ *  the next channel's global trigger through the channel's TR event register.
+ *
+ *  A channel's source buffer is previous channel destination buffer. This
+ *  ensures that chaining trigger worked in a synchronized manner when the
+ *  memory compare matches.
+ *
+ *  Requirement: TODO
+ */
+
+/* ========================================================================== */
+/*                             Include Files                                  */
+/* ========================================================================== */
+
+#include <stdio.h>
+#include <ti/drv/udma/udma.h>
+#include <ti/drv/uart/UART.h>
+#include <ti/drv/uart/UART_stdio.h>
+#include <ti/drv/udma/examples/udma_apputils/udma_apputils.h>
+
+/* ========================================================================== */
+/*                           Macros & Typedefs                                */
+/* ========================================================================== */
+
+/*
+ * Application test parameters
+ */
+/** \brief Number of bytes to copy and buffer allocation */
+#define UDMA_TEST_APP_NUM_BYTES         (1000U)
+/** \brief This ensures every channel memory is aligned */
+#define UDMA_TEST_APP_BUF_SIZE_ALIGN    ((UDMA_TEST_APP_NUM_BYTES + UDMA_CACHELINE_ALIGNMENT) & ~(UDMA_CACHELINE_ALIGNMENT - 1U))
+/** \brief Number of times to perform the memcpy operation */
+#define UDMA_TEST_APP_LOOP_CNT          (100U)
+/** \brief Number of channels */
+#define UDMA_TEST_APP_NUM_CH            (2U)
+
+/*
+ * Ring parameters
+ */
+/** \brief Number of ring entries - we can prime this much memcpy operations */
+#define UDMA_TEST_APP_RING_ENTRIES      (1U)
+/** \brief Size (in bytes) of each ring entry (Size of pointer - 64-bit) */
+#define UDMA_TEST_APP_RING_ENTRY_SIZE   (sizeof(uint64_t))
+/** \brief Total ring memory */
+#define UDMA_TEST_APP_RING_MEM_SIZE     (UDMA_TEST_APP_RING_ENTRIES * \
+                                         UDMA_TEST_APP_RING_ENTRY_SIZE)
+/** \brief This ensures every channel memory is aligned */
+#define UDMA_TEST_APP_RING_MEM_SIZE_ALIGN ((UDMA_TEST_APP_RING_MEM_SIZE + UDMA_CACHELINE_ALIGNMENT) & ~(UDMA_CACHELINE_ALIGNMENT - 1U))
+/**
+ *  \brief UDMA TR packet descriptor memory.
+ *  This contains the CSL_UdmapCppi5TRPD + Padding to sizeof(CSL_UdmapTR15) +
+ *  one Type_15 TR (CSL_UdmapTR15) + one TR response of 4 bytes.
+ *  Since CSL_UdmapCppi5TRPD is less than CSL_UdmapTR15, size is just two times
+ *  CSL_UdmapTR15 for alignment.
+ */
+#define UDMA_TEST_APP_TRPD_SIZE         ((sizeof(CSL_UdmapTR15) * 2U) + 4U)
+/** \brief This ensures every channel memory is aligned */
+#define UDMA_TEST_APP_TRPD_SIZE_ALIGN   ((UDMA_TEST_APP_TRPD_SIZE + UDMA_CACHELINE_ALIGNMENT) & ~(UDMA_CACHELINE_ALIGNMENT - 1U))
+
+/* ========================================================================== */
+/*                         Structure Declarations                             */
+/* ========================================================================== */
+
+typedef struct
+{
+    int32_t                 chIdx;
+
+    struct Udma_ChObj       chObj;
+    struct Udma_EventObj    cqEventObj;
+    struct Udma_EventObj    tdCqEventObj;
+
+    Udma_ChHandle           chHandle;
+    Udma_EventHandle        cqEventHandle;
+    Udma_EventHandle        tdCqEventHandle;
+
+    Udma_DrvHandle          drvHandle;
+    SemaphoreP_Handle       transferDoneSem;
+    /**< Semaphore to indicate transfer completion */
+
+    uint8_t                 *txRingMem;
+    uint8_t                 *txCompRingMem;
+    uint8_t                 *txTdCompRingMem;
+    uint8_t                 *trpdMem;
+
+    uint8_t                 *srcBuf;
+    uint8_t                 *destBuf;
+} App_UdmaChObj;
+
+typedef struct
+{
+    struct Udma_DrvObj      drvObj;
+    App_UdmaChObj           appChObj[UDMA_TEST_APP_NUM_CH];
+} App_UdmaObj;
+
+/* ========================================================================== */
+/*                          Function Declarations                             */
+/* ========================================================================== */
+
+static int32_t App_chainingTest(App_UdmaObj *appObj);
+static int32_t App_udmaChaining(App_UdmaObj *appObj);
+
+static void App_udmaEventDmaCb(Udma_EventHandle eventHandle,
+                               uint32_t eventType,
+                               void *appData);
+static void App_udmaEventTdCb(Udma_EventHandle eventHandle,
+                              uint32_t eventType,
+                              void *appData);
+
+static int32_t App_init(App_UdmaObj *appObj);
+static int32_t App_deinit(App_UdmaObj *appObj);
+
+static int32_t App_create(App_UdmaObj *appObj);
+static int32_t App_delete(App_UdmaObj *appObj);
+
+static void App_udmaTrpdInit(App_UdmaChObj *appChObj);
+
+static void App_print(const char *str);
+
+/* ========================================================================== */
+/*                            Global Variables                                */
+/* ========================================================================== */
+
+/*
+ * UDMA driver and channel objects
+ */
+App_UdmaObj gUdmaAppObj;
+
+/*
+ * UDMA Memories
+ */
+static uint8_t gTxRingMem[UDMA_TEST_APP_NUM_CH][UDMA_TEST_APP_RING_MEM_SIZE_ALIGN] __attribute__((aligned(UDMA_CACHELINE_ALIGNMENT)));
+static uint8_t gTxCompRingMem[UDMA_TEST_APP_NUM_CH][UDMA_TEST_APP_RING_MEM_SIZE_ALIGN] __attribute__((aligned(UDMA_CACHELINE_ALIGNMENT)));
+static uint8_t gTxTdCompRingMem[UDMA_TEST_APP_NUM_CH][UDMA_TEST_APP_RING_MEM_SIZE_ALIGN] __attribute__((aligned(UDMA_CACHELINE_ALIGNMENT)));
+static uint8_t gUdmaTrpdMem[UDMA_TEST_APP_NUM_CH][UDMA_TEST_APP_TRPD_SIZE_ALIGN] __attribute__((aligned(UDMA_CACHELINE_ALIGNMENT)));
+
+/*
+ * Application Buffers
+ */
+static uint8_t gUdmaTestSrcBuf[UDMA_TEST_APP_BUF_SIZE_ALIGN] __attribute__((aligned(UDMA_CACHELINE_ALIGNMENT)));
+static uint8_t gUdmaTestDestBuf[UDMA_TEST_APP_NUM_CH][UDMA_TEST_APP_BUF_SIZE_ALIGN] __attribute__((aligned(UDMA_CACHELINE_ALIGNMENT)));
+
+/* Global test pass/fail flag */
+static volatile int32_t gUdmaAppResult = UDMA_SOK;
+
+/* ========================================================================== */
+/*                          Function Definitions                              */
+/* ========================================================================== */
+
+/*
+ * UDMA chaining test
+ */
+int32_t Udma_chainingTest(void)
+{
+    int32_t         retVal;
+    App_UdmaObj    *appObj = &gUdmaAppObj;
+
+    retVal = App_init(appObj);
+    if(UDMA_SOK != retVal)
+    {
+        App_print("[Error] UDMA App init failed!!\n");
+    }
+
+    App_print("UDMA chaining application started...\n");
+
+    if(UDMA_SOK == retVal)
+    {
+        retVal = App_create(appObj);
+        if(UDMA_SOK != retVal)
+        {
+            App_print("[Error] UDMA App create failed!!\n");
+        }
+    }
+
+    if(UDMA_SOK == retVal)
+    {
+        retVal = App_chainingTest(appObj);
+        if(UDMA_SOK != retVal)
+        {
+            App_print("[Error] UDMA App chaining test failed!!\n");
+        }
+    }
+
+    retVal += App_delete(appObj);
+    if(UDMA_SOK != retVal)
+    {
+        App_print("[Error] UDMA App delete failed!!\n");
+    }
+
+    retVal += App_deinit(appObj);
+    if(UDMA_SOK != retVal)
+    {
+        App_print("[Error] UDMA App deinit failed!!\n");
+    }
+
+    if((UDMA_SOK == retVal) && (UDMA_SOK == gUdmaAppResult))
+    {
+        App_print("UDMA chaining Passed!!\n");
+        App_print("All tests have passed!!\n");
+    }
+    else
+    {
+        App_print("UDMA chaining Failed!!\n");
+        App_print("Some tests have failed!!\n");
+    }
+
+    return (0);
+}
+
+static int32_t App_chainingTest(App_UdmaObj *appObj)
+{
+    int32_t         retVal = UDMA_SOK;
+    uint32_t        loopCnt = 0U;
+    int32_t         chIdx;
+    App_UdmaChObj  *appChObj;
+    uint32_t        i;
+    uint8_t        *destBuf;
+
+    while(loopCnt < UDMA_TEST_APP_LOOP_CNT)
+    {
+        /* Reset dest buffers */
+        for(chIdx = 0U; chIdx < UDMA_TEST_APP_NUM_CH; chIdx++)
+        {
+            appChObj = &appObj->appChObj[chIdx];
+            destBuf  = appChObj->destBuf;
+            for(i = 0U; i < UDMA_TEST_APP_NUM_BYTES; i++)
+            {
+                destBuf[i] = 0U;
+            }
+            /* Writeback destination buffer */
+            Udma_appUtilsCacheWb(appChObj->destBuf, UDMA_TEST_APP_NUM_BYTES);
+        }
+
+        /* Perform UDMA memcpy */
+        retVal = App_udmaChaining(appObj);
+        if(UDMA_SOK != retVal)
+        {
+            break;
+        }
+
+        loopCnt++;
+    }
+
+    return (retVal);
+}
+
+static int32_t App_udmaChaining(App_UdmaObj *appObj)
+{
+    int32_t         retVal = UDMA_SOK;
+    uint32_t       *pTrResp, trRespStatus;
+    uint8_t        *trpdMem;
+    uint64_t        pDesc = 0;
+    int32_t         chIdx;
+    uint32_t        i;
+    App_UdmaChObj  *appChObj;
+    Udma_ChHandle   chHandle;
+
+    /* Update TR packet descriptor */
+    for(chIdx = 0U; chIdx < UDMA_TEST_APP_NUM_CH; chIdx++)
+    {
+        appChObj = &appObj->appChObj[chIdx];
+        App_udmaTrpdInit(appChObj);
+    }
+
+    /* Submit TRPD to channel */
+    for(chIdx = 0U; chIdx < UDMA_TEST_APP_NUM_CH; chIdx++)
+    {
+        appChObj = &appObj->appChObj[chIdx];
+        chHandle = appChObj->chHandle;
+        retVal = Udma_ringQueueRaw(
+                     Udma_chGetFqRingHandle(chHandle),
+                     (uint64_t) appChObj->trpdMem);
+        if(UDMA_SOK != retVal)
+        {
+            App_print("[Error] Channel queue failed!!\n");
+            break;
+        }
+    }
+
+    if(UDMA_SOK == retVal)
+    {
+        chIdx = UDMA_TEST_APP_NUM_CH - 1U;
+        appChObj = &appObj->appChObj[chIdx];
+        chHandle = appChObj->chHandle;
+        /* Wait for return descriptor in completion ring for the last channel
+         * This marks the entire transfer completion */
+        SemaphoreP_pend(appChObj->transferDoneSem, SemaphoreP_WAIT_FOREVER);
+    }
+
+    if(UDMA_SOK == retVal)
+    {
+        for(chIdx = 0U; chIdx < UDMA_TEST_APP_NUM_CH; chIdx++)
+        {
+            appChObj = &appObj->appChObj[chIdx];
+            chHandle = appChObj->chHandle;
+            trpdMem  = appChObj->trpdMem;
+
+            /* Response received in completion queue */
+            retVal =
+                Udma_ringDequeueRaw(Udma_chGetCqRingHandle(chHandle), &pDesc);
+            if(UDMA_SOK != retVal)
+            {
+                App_print("[Error] No descriptor after callback!!\n");
+                retVal = UDMA_EFAIL;
+            }
+
+            if(UDMA_SOK == retVal)
+            {
+                /*
+                 * Sanity check
+                 */
+                /* Check returned descriptor pointer */
+                if(pDesc != ((uint64_t) trpdMem))
+                {
+                    App_print("[Error] TR descriptor pointer returned doesn't "
+                           "match the submitted address!!\n");
+                    retVal = UDMA_EFAIL;
+                }
+            }
+
+            if(UDMA_SOK == retVal)
+            {
+                /* Invalidate cache */
+                Udma_appUtilsCacheInv(trpdMem, UDMA_TEST_APP_TRPD_SIZE_ALIGN);
+
+                /* check TR response status */
+                pTrResp = (uint32_t *) (trpdMem + (sizeof(CSL_UdmapTR15) * 2U));
+                trRespStatus = CSL_FEXT(*pTrResp, UDMAP_TR_RESPONSE_STATUS_TYPE);
+                if(trRespStatus != CSL_UDMAP_TR_RESPONSE_STATUS_COMPLETE)
+                {
+                    App_print("[Error] TR Response not completed!!\n");
+                    retVal = UDMA_EFAIL;
+                }
+            }
+
+            if(UDMA_SOK == retVal)
+            {
+                /* Compare data */
+                /* Invalidate destination buffer */
+                Udma_appUtilsCacheInv(appChObj->destBuf, UDMA_TEST_APP_NUM_BYTES);
+                for(i = 0U; i < UDMA_TEST_APP_NUM_BYTES; i++)
+                {
+                    if(appChObj->srcBuf[i] != appChObj->destBuf[i])
+                    {
+                        App_print("[Error] Data mismatch!!\n");
+                        retVal = UDMA_EFAIL;
+                        break;
+                    }
+                }
+            }
+
+            if(UDMA_SOK != retVal)
+            {
+                break;
+            }
+        }
+    }
+
+    return (retVal);
+}
+
+static void App_udmaEventDmaCb(Udma_EventHandle eventHandle,
+                               uint32_t eventType,
+                               void *appData)
+{
+    App_UdmaChObj *appChObj = (App_UdmaChObj *) appData;
+
+    if(appChObj != NULL)
+    {
+        if(UDMA_EVENT_TYPE_DMA_COMPLETION == eventType)
+        {
+            SemaphoreP_post(appChObj->transferDoneSem);
+        }
+        else
+        {
+            gUdmaAppResult = UDMA_EFAIL;
+        }
+    }
+    else
+    {
+        gUdmaAppResult = UDMA_EFAIL;
+    }
+
+    return;
+}
+
+static void App_udmaEventTdCb(Udma_EventHandle eventHandle,
+                              uint32_t eventType,
+                              void *appData)
+{
+    int32_t             retVal;
+    CSL_UdmapTdResponse tdResp;
+    App_UdmaChObj      *appChObj = (App_UdmaChObj *) appData;
+
+    if(appChObj != NULL)
+    {
+        if(UDMA_EVENT_TYPE_TEARDOWN_PACKET == eventType)
+        {
+            /* Response received in Teardown completion queue */
+            retVal = Udma_chDequeueTdResponse(appChObj->chHandle, &tdResp);
+            if(UDMA_SOK != retVal)
+            {
+                /* [Error] No TD response after callback!! */
+                gUdmaAppResult = UDMA_EFAIL;
+            }
+        }
+        else
+        {
+            gUdmaAppResult = UDMA_EFAIL;
+        }
+    }
+    else
+    {
+        gUdmaAppResult = UDMA_EFAIL;
+    }
+
+    return;
+}
+
+static int32_t App_init(App_UdmaObj *appObj)
+{
+    int32_t         retVal;
+    Udma_InitPrms   initPrms;
+    uint32_t        instId;
+    int32_t         chIdx;
+    App_UdmaChObj  *appChObj;
+    Udma_DrvHandle  drvHandle = &appObj->drvObj;
+    uint32_t        i;
+    uint8_t        *srcBuf;
+
+    /* Use MCU NAVSS for MCU domain cores. Rest all cores uses Main NAVSS */
+#if defined (BUILD_MCU1_0) || defined (BUILD_MCU1_1)
+    instId = UDMA_INST_ID_MCU_0;
+#else
+    instId = UDMA_INST_ID_MAIN_0;
+#endif
+    /* UDMA driver init */
+    UdmaInitPrms_init(instId, &initPrms);
+    initPrms.printFxn = &App_print;
+    retVal = Udma_init(drvHandle, &initPrms);
+    if(UDMA_SOK != retVal)
+    {
+        App_print("[Error] UDMA init failed!!\n");
+    }
+
+    /* Init channel parameters */
+    for(chIdx = 0U; chIdx < UDMA_TEST_APP_NUM_CH; chIdx++)
+    {
+        appChObj                    = &appObj->appChObj[chIdx];
+        appChObj->chIdx             = chIdx;
+
+        appChObj->chHandle          = &appChObj->chObj;
+        appChObj->cqEventHandle     = NULL;
+        appChObj->tdCqEventHandle   = NULL;
+        appChObj->drvHandle         = drvHandle;
+        appChObj->transferDoneSem   = NULL;
+        appChObj->txRingMem         = &gTxRingMem[chIdx][0U];
+        appChObj->txCompRingMem     = &gTxCompRingMem[chIdx][0U];
+        appChObj->txTdCompRingMem   = &gTxTdCompRingMem[chIdx][0U];
+        appChObj->trpdMem           = &gUdmaTrpdMem[chIdx][0U];
+        if(0U == chIdx)
+        {
+            appChObj->srcBuf        = &gUdmaTestSrcBuf[0U];
+        }
+        else
+        {
+            /* src buffer of subsequent ch is previous ch dest buffer */
+            appChObj->srcBuf        = &gUdmaTestDestBuf[chIdx - 1U][0U];
+        }
+        appChObj->destBuf           = &gUdmaTestDestBuf[chIdx][0U];
+
+        /* Init buffers */
+        srcBuf = appChObj->srcBuf;
+        for(i = 0U; i < UDMA_TEST_APP_NUM_BYTES; i++)
+        {
+            srcBuf[i] = i;
+        }
+        /* Writeback source destination buffer */
+        Udma_appUtilsCacheWb(appChObj->srcBuf, UDMA_TEST_APP_NUM_BYTES);
+    }
+
+    return (retVal);
+}
+
+static int32_t App_deinit(App_UdmaObj *appObj)
+{
+    int32_t         retVal;
+    Udma_DrvHandle  drvHandle = &appObj->drvObj;
+
+    retVal = Udma_deinit(drvHandle);
+    if(UDMA_SOK != retVal)
+    {
+        App_print("[Error] UDMA deinit failed!!\n");
+    }
+
+    return (retVal);
+}
+
+static int32_t App_create(App_UdmaObj *appObj)
+{
+    int32_t             retVal = UDMA_SOK;
+    uint32_t            chType;
+    Udma_ChPrms         chPrms;
+    Udma_ChTxPrms       txPrms;
+    Udma_ChRxPrms       rxPrms;
+    Udma_EventHandle    eventHandle;
+    Udma_EventPrms      eventPrms;
+    SemaphoreP_Params   semPrms;
+    int32_t             chIdx;
+    App_UdmaChObj      *appChObj;
+    Udma_ChHandle       chHandle;
+    Udma_DrvHandle      drvHandle = &appObj->drvObj;
+
+    for(chIdx = 0U; chIdx < UDMA_TEST_APP_NUM_CH; chIdx++)
+    {
+        appChObj = &appObj->appChObj[chIdx];
+        chHandle = appChObj->chHandle;
+
+        SemaphoreP_Params_init(&semPrms);
+        appChObj->transferDoneSem = SemaphoreP_create(0, &semPrms);
+        if(NULL == appChObj->transferDoneSem)
+        {
+            App_print("[Error] Sem create failed!!\n");
+            retVal = UDMA_EFAIL;
+        }
+
+        if(UDMA_SOK == retVal)
+        {
+            /* Init channel parameters */
+            chType = UDMA_CH_TYPE_TR_BLK_COPY;
+            UdmaChPrms_init(&chPrms, chType);
+            chPrms.fqRingPrms.ringMem   = appChObj->txRingMem;
+            chPrms.cqRingPrms.ringMem   = appChObj->txCompRingMem;
+            chPrms.tdCqRingPrms.ringMem = appChObj->txTdCompRingMem;
+            chPrms.fqRingPrms.ringMemSize   = UDMA_TEST_APP_RING_MEM_SIZE;
+            chPrms.cqRingPrms.ringMemSize   = UDMA_TEST_APP_RING_MEM_SIZE;
+            chPrms.tdCqRingPrms.ringMemSize = UDMA_TEST_APP_RING_MEM_SIZE;
+            chPrms.fqRingPrms.elemCnt   = UDMA_TEST_APP_RING_ENTRIES;
+            chPrms.cqRingPrms.elemCnt   = UDMA_TEST_APP_RING_ENTRIES;
+            chPrms.tdCqRingPrms.elemCnt = UDMA_TEST_APP_RING_ENTRIES;
+
+            /* Open channel for block copy */
+            retVal = Udma_chOpen(drvHandle, chHandle, chType, &chPrms);
+            if(UDMA_SOK != retVal)
+            {
+                App_print("[Error] UDMA channel open failed!!\n");
+            }
+        }
+
+        if(UDMA_SOK == retVal)
+        {
+            /* Config TX channel */
+            UdmaChTxPrms_init(&txPrms, chType);
+            retVal = Udma_chConfigTx(chHandle, &txPrms);
+            if(UDMA_SOK != retVal)
+            {
+                App_print("[Error] UDMA TX channel config failed!!\n");
+            }
+        }
+
+        if(UDMA_SOK == retVal)
+        {
+            /* Config RX channel - which is implicitly paired to TX channel in
+             * block copy mode */
+            UdmaChRxPrms_init(&rxPrms, chType);
+            retVal = Udma_chConfigRx(chHandle, &rxPrms);
+            if(UDMA_SOK != retVal)
+            {
+                App_print("[Error] UDMA RX channel config failed!!\n");
+            }
+        }
+
+        if(UDMA_SOK == retVal)
+        {
+            if((UDMA_TEST_APP_NUM_CH - 1U) == chIdx)
+            {
+                /* Register ring completion callback - for the last channel only */
+                eventHandle = &appChObj->cqEventObj;
+                UdmaEventPrms_init(&eventPrms);
+                eventPrms.eventType         = UDMA_EVENT_TYPE_DMA_COMPLETION;
+                eventPrms.eventMode         = UDMA_EVENT_MODE_SHARED;
+                eventPrms.chHandle          = chHandle;
+                eventPrms.masterEventHandle = Udma_eventGetGlobalHandle(drvHandle);
+                eventPrms.eventCb           = &App_udmaEventDmaCb;
+                eventPrms.appData           = appChObj;
+                retVal = Udma_eventRegister(drvHandle, eventHandle, &eventPrms);
+                if(UDMA_SOK != retVal)
+                {
+                    App_print("[Error] UDMA CQ event register failed!!\n");
+                }
+                else
+                {
+                    appChObj->cqEventHandle = eventHandle;
+                }
+            }
+        }
+
+        if(UDMA_SOK == retVal)
+        {
+            /* Register teardown ring completion callback */
+            eventHandle = &appChObj->tdCqEventObj;
+            UdmaEventPrms_init(&eventPrms);
+            eventPrms.eventType         = UDMA_EVENT_TYPE_TEARDOWN_PACKET;
+            eventPrms.eventMode         = UDMA_EVENT_MODE_SHARED;
+            eventPrms.chHandle          = chHandle;
+            eventPrms.masterEventHandle = Udma_eventGetGlobalHandle(drvHandle);
+            eventPrms.eventCb           = &App_udmaEventTdCb;
+            eventPrms.appData           = appChObj;
+            retVal = Udma_eventRegister(drvHandle, eventHandle, &eventPrms);
+            if(UDMA_SOK != retVal)
+            {
+                App_print("[Error] UDMA Teardown CQ event register failed!!\n");
+            }
+            else
+            {
+                appChObj->tdCqEventHandle = eventHandle;
+            }
+        }
+
+        if(UDMA_SOK == retVal)
+        {
+            /* Channel enable */
+            retVal = Udma_chEnable(chHandle);
+            if(UDMA_SOK != retVal)
+            {
+                App_print("[Error] UDMA channel enable failed!!\n");
+            }
+        }
+
+        if(UDMA_SOK != retVal)
+        {
+            break;
+        }
+    }
+
+    /* After all channels are created, chain the channels.
+     * Doing before will have un-init channel handles */
+    if(UDMA_SOK == retVal)
+    {
+        for(chIdx = 0U; chIdx < UDMA_TEST_APP_NUM_CH; chIdx++)
+        {
+            appChObj = &appObj->appChObj[chIdx];
+            chHandle = appChObj->chHandle;
+
+            if(chIdx < (UDMA_TEST_APP_NUM_CH - 1))
+            {
+                Udma_ChHandle chainedChHandle;
+
+                chainedChHandle = appObj->appChObj[chIdx + 1].chHandle;
+                retVal = Udma_chSetChaining(
+                             chHandle,
+                             chainedChHandle,
+                             CSL_UDMAP_TR_FLAGS_TRIGGER_GLOBAL0);
+                if(UDMA_SOK != retVal)
+                {
+                    App_print("[Error] UDMA channel chaining failed!!\n");
+                }
+            }
+            if(UDMA_SOK != retVal)
+            {
+                break;
+            }
+        }
+    }
+
+    return (retVal);
+}
+
+static int32_t App_delete(App_UdmaObj *appObj)
+{
+    int32_t         retVal, tempRetVal;
+    uint64_t        pDesc;
+    int32_t         chIdx;
+    App_UdmaChObj  *appChObj;
+    Udma_ChHandle   chHandle;
+
+    for(chIdx = 0U; chIdx < UDMA_TEST_APP_NUM_CH; chIdx++)
+    {
+        appChObj = &appObj->appChObj[chIdx];
+        chHandle = appChObj->chHandle;
+
+        retVal = Udma_chDisable(chHandle, UDMA_DEFAULT_CH_DISABLE_TIMEOUT);
+        if(UDMA_SOK != retVal)
+        {
+            App_print("[Error] UDMA channel disable failed!!\n");
+        }
+
+        /* Flush any pending request from the free queue */
+        while(1)
+        {
+            tempRetVal = Udma_ringFlushRaw(
+                             Udma_chGetFqRingHandle(chHandle), &pDesc);
+            if(UDMA_ETIMEOUT == tempRetVal)
+            {
+                break;
+            }
+        }
+
+        if(chIdx < (UDMA_TEST_APP_NUM_CH - 1))
+        {
+            Udma_ChHandle chainedChHandle;
+
+            chainedChHandle = appObj->appChObj[chIdx + 1].chHandle;
+            /* Break channel chaining */
+            retVal += Udma_chBreakChaining(chHandle, chainedChHandle);
+            if(UDMA_SOK != retVal)
+            {
+                App_print("[Error] UDMA channel break chaining failed!!\n");
+            }
+        }
+    }
+
+    for(chIdx = UDMA_TEST_APP_NUM_CH - 1U; chIdx >=0 ; chIdx--)
+    {
+        appChObj = &appObj->appChObj[chIdx];
+        chHandle = appChObj->chHandle;
+
+        /* Unregister all events */
+        if(NULL != appChObj->cqEventHandle)
+        {
+            retVal += Udma_eventUnRegister(appChObj->cqEventHandle);