PDK-10903: SBL: J7xx: OSPI DMA transfer to MCU TCM to use SoC addr

For J721E/J7200, SBL parsing of app image sections destined for
local MCU R5 ATCM/BTCM memories must use SoC addresses when using
UDMA to do the transfers to those TCMs instead of using the local
MCU R5 TCM addresses.

Signed-off-by: Jonathan Bergsagel <jbergsagel@ti.com>

diff --git a/packages/ti/boot/sbl/soc/k3/sbl_soc_cfg.h b/packages/ti/boot/sbl/soc/k3/sbl_soc_cfg.h
index 0cbc79ed1484a884d8d5192b4307dcfe9429add7..07e14c3e8b5ad4298be0c7b7e5b871abf428732e 100755 (executable)
--- a/packages/ti/boot/sbl/soc/k3/sbl_soc_cfg.h
+++ b/packages/ti/boot/sbl/soc/k3/sbl_soc_cfg.h
@@ -283,12 +283,14 @@ extern uint16_t sblMapOtpVidToMilliVolts[256];
 #define SBL_MCU_BTCM_BASE      (CSL_MCU_ARMSS_BTCM_BASE)
 #define SBL_MCU_BTCM_SIZE      (CSL_MCU_ARMSS_BTCM_SIZE)
 
+#define SBL_MCU1_CPU0_ATCM_BASE_ADDR_SOC    (CSL_MCU_R5FSS0_CORE0_ATCM_BASE)
 #define SBL_MCU1_CPU1_ATCM_BASE_ADDR_SOC    (CSL_MCU_R5FSS0_CORE1_ATCM_BASE)
 #define SBL_MCU2_CPU0_ATCM_BASE_ADDR_SOC    (CSL_R5FSS0_CORE0_ATCM_BASE)
 #define SBL_MCU2_CPU1_ATCM_BASE_ADDR_SOC    (CSL_R5FSS0_CORE1_ATCM_BASE)
 #define SBL_MCU3_CPU0_ATCM_BASE_ADDR_SOC    (CSL_R5FSS1_CORE0_ATCM_BASE)
 #define SBL_MCU3_CPU1_ATCM_BASE_ADDR_SOC    (CSL_R5FSS1_CORE1_ATCM_BASE)
 
+#define SBL_MCU1_CPU0_BTCM_BASE_ADDR_SOC    (CSL_MCU_R5FSS0_CORE0_BTCM_BASE)
 #define SBL_MCU1_CPU1_BTCM_BASE_ADDR_SOC    (CSL_MCU_R5FSS0_CORE1_BTCM_BASE)
 #define SBL_MCU2_CPU0_BTCM_BASE_ADDR_SOC    (CSL_R5FSS0_CORE0_BTCM_BASE)
 #define SBL_MCU2_CPU1_BTCM_BASE_ADDR_SOC    (CSL_R5FSS0_CORE1_BTCM_BASE)
@@ -464,12 +466,14 @@ extern uint16_t sblMapOtpVidToMilliVolts[256];
 #define SBL_MCU_BTCM_BASE      (CSL_MCU_R5FSS0_BTCM_BASE)
 #define SBL_MCU_BTCM_SIZE      (CSL_MCU_R5FSS0_BTCM_SIZE)
 
+#define SBL_MCU1_CPU0_ATCM_BASE_ADDR_SOC    (CSL_MCU_R5FSS0_CORE0_ATCM_BASE)
 #define SBL_MCU1_CPU1_ATCM_BASE_ADDR_SOC    (CSL_MCU_R5FSS0_CORE1_ATCM_BASE)
 #define SBL_MCU2_CPU0_ATCM_BASE_ADDR_SOC    (CSL_R5FSS0_CORE0_ATCM_BASE)
 #define SBL_MCU2_CPU1_ATCM_BASE_ADDR_SOC    (CSL_R5FSS0_CORE1_ATCM_BASE)
 #define SBL_MCU3_CPU0_ATCM_BASE_ADDR_SOC    (0xBAD00000)
 #define SBL_MCU3_CPU1_ATCM_BASE_ADDR_SOC    (0xBAD00000)
 
+#define SBL_MCU1_CPU0_BTCM_BASE_ADDR_SOC    (CSL_MCU_R5FSS0_CORE0_BTCM_BASE)
 #define SBL_MCU1_CPU1_BTCM_BASE_ADDR_SOC    (CSL_MCU_R5FSS0_CORE1_BTCM_BASE)
 #define SBL_MCU2_CPU0_BTCM_BASE_ADDR_SOC    (CSL_R5FSS0_CORE0_BTCM_BASE)
 #define SBL_MCU2_CPU1_BTCM_BASE_ADDR_SOC    (CSL_R5FSS0_CORE1_BTCM_BASE)

diff --git a/packages/ti/boot/sbl/src/rprc/sbl_rprc.c b/packages/ti/boot/sbl/src/rprc/sbl_rprc.c
index 7635e278aa0ad5eac004a1d5ac138daa93474216..d305e87cdf0126494e615eaeee037aff3dfef1aa 100755 (executable)
--- a/packages/ti/boot/sbl/src/rprc/sbl_rprc.c
+++ b/packages/ti/boot/sbl/src/rprc/sbl_rprc.c
@@ -71,7 +71,7 @@ extern void SBL_DCacheClean(void *addr, uint32_t size);
 #endif
 #endif
 
-#if (SBL_USE_DMA && defined(BOOT_OSPI) && defined(SOC_J721S2))
+#if (SBL_USE_DMA && defined(BOOT_OSPI) && (defined(SOC_J721E) || defined(SOC_J7200) || defined(SOC_J721S2)))
 extern int32_t SBL_OSPI_ReadSectors(void *dstAddr, void *srcOffsetAddr, uint32_t length);
 #endif
 
@@ -790,7 +790,7 @@ static int32_t SBL_RprcImageParse(void *srcAddr,
 
     const uint32_t SocAtcmAddr[] =
     {
-#if defined(SOC_AM64X) || (SBL_USE_DMA && defined(SOC_J721S2))
+#if defined(SOC_AM64X) || (SBL_USE_DMA && (defined(SOC_J721E) || defined(SOC_J7200) || defined(SOC_J721S2)))
     /* Use SoC level address of MCU1_0 ATCM for non-CPU writes to this TCM. */
     SBL_MCU1_CPU0_ATCM_BASE_ADDR_SOC,
 #else
@@ -805,7 +805,7 @@ static int32_t SBL_RprcImageParse(void *srcAddr,
 
     const uint32_t SocBtcmAddr[] =
     {
-#if defined(SOC_AM64X) || (SBL_USE_DMA && defined(SOC_J721S2))
+#if defined(SOC_AM64X) || (SBL_USE_DMA && (defined(SOC_J721E) || defined(SOC_J7200) || defined(SOC_J721S2)))
     /* Use SoC level address of MCU1_0 BTCM for non-CPU writes to this TCM. */
     SBL_MCU1_CPU0_BTCM_BASE_ADDR_SOC,
 #else
@@ -877,7 +877,7 @@ static int32_t SBL_RprcImageParse(void *srcAddr,
 
             switch (CoreId)
             {
-#if (SBL_USE_DMA && defined(BOOT_OSPI) && defined(SOC_J721S2))
+#if (SBL_USE_DMA && defined(BOOT_OSPI) && (defined(SOC_J721E) || defined(SOC_J7200) || defined(SOC_J721S2)))
                 /* Need address translation to SoC level addresses of MCU1_0 TCMs, when trying to copy to local addresses */
                 case MCU1_CPU0_ID:
                     /* Only do TCM addr remapping for MCU1_0 if using UDMA for transfers from OSPI to local TCMs */