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raw | patch | inline | side by side (parent: b135607)
raw | patch | inline | side by side (parent: b135607)
author | M V Pratap Reddy <x0257344@ti.com> | |
Sun, 27 Sep 2020 13:41:09 +0000 (19:11 +0530) | ||
committer | M V Pratap Reddy <x0257344@ti.com> | |
Sun, 27 Sep 2020 13:41:09 +0000 (19:11 +0530) |
- Updated the link detection sequence to fix the link failure
- QSGMII pinmux is used to enable the RGMII ports used in the test
- QSGMII pinmux is used to enable the RGMII ports used in the test
packages/ti/board/diag/cpsw/src/cpsw_eth_test.c | patch | blob | history |
diff --git a/packages/ti/board/diag/cpsw/src/cpsw_eth_test.c b/packages/ti/board/diag/cpsw/src/cpsw_eth_test.c
index 34db00b593816209d867bd2213360f7059bc542e..7575b847f784b1481ad97028836eeadcf3ddc0d7 100644 (file)
txSem = true;\r
}\r
\r
-static void BoardDiag_cpswTimerISR(uintptr_t arg)\r
-{\r
- Cpsw_periodicTick(gCpswLpbkObj.hCpsw);\r
-}\r
-\r
-static TimerP_Handle BoardDiag_cpswCreateClock(void)\r
-{\r
- TimerP_Handle timerHandle;\r
- TimerP_Params timerParams;\r
- uint32_t period = 1000 * 100; /* usecs */\r
-\r
- TimerP_Params_init(&timerParams);\r
-\r
- timerParams.startMode = TimerP_StartMode_USER;\r
- timerParams.periodType = TimerP_PeriodType_MICROSECS;\r
- timerParams.period = period;\r
-\r
- timerHandle = TimerP_create(TimerP_ANY,\r
- (TimerP_Fxn) & BoardDiag_cpswTimerISR,\r
- &timerParams);\r
-\r
- return timerHandle;\r
-}\r
-\r
-void BoardDiag_cpswStartClock(CpswApp_ClkHandle handle)\r
-{\r
- TimerP_Handle timerHandle = (TimerP_Handle)handle;\r
-\r
- /* start the timer */\r
- TimerP_start(timerHandle);\r
-}\r
-\r
-void BoardDiag_cpswStopClock(TimerP_Handle handle)\r
-{\r
- TimerP_Handle timerHandle = (TimerP_Handle)handle;\r
-\r
- TimerP_stop(timerHandle);\r
-}\r
-\r
/**\r
* \brief This function is used to queue the received packets to rx ready queue\r
*\r
int32_t BoardDiag_cpswOpenDma(void)\r
{\r
int32_t status = CPSW_SOK;\r
- uint8_t macAddrBuf[CPSW_GESI_ETH_PORT_MAX][BOARD_MAC_ADDR_BYTES];\r
- uint32_t macEntries;\r
\r
/* Open the CPSW TX channel */\r
CpswDma_initTxChParams(&cpswTxChCfg);\r
&gCpswLpbkObj.hRxFlow,\r
&cpswRxFlowCfg);\r
\r
- /* For 1st Port */\r
- Board_readMacAddr(0, &macAddrBuf[0][0], sizeof(macAddrBuf), &macEntries);\r
- memcpy(&gCpswLpbkObj.hostMacAddr0[0U], &macAddrBuf[0][0], CPSW_MAC_ADDR_LEN);\r
- /* For 2nd Port */\r
- memcpy(&gCpswLpbkObj.hostMacAddr1[0U], &macAddrBuf[1][0], CPSW_MAC_ADDR_LEN);\r
-\r
if (NULL == gCpswLpbkObj.hRxFlow)\r
{\r
CpswAppUtils_freeRxFlow(gCpswLpbkObj.hCpsw,\r
int32_t status;\r
bool alive;\r
uint8_t index;\r
- TimerP_Handle clkhandle = BoardDiag_cpswCreateClock();\r
\r
Cpsw_IoctlPrms prms;\r
CpswAle_SetPortStateInArgs setPortStateInArgs;\r
\r
- CpswAppBoardUtils_init();\r
+ CpswAppBoardUtils_initEthFw();\r
CpswAppUtils_enableClocks(gCpswLpbkObj.cpswType);\r
\r
gCpswLpbkObj.coreId = CpswAppSoc_getCoreId();\r
}\r
}\r
\r
- BoardDiag_cpswStartClock(clkhandle);\r
-\r
UART_printf("Waiting for link to up for portNum-%d and portNum-%d...\n\r",\r
gCpswLpbkObj.portNum0,\r
gCpswLpbkObj.portNum1);\r
gCpswLpbkObj.portNum0))\r
{\r
BoardDiag_cpswWait(1000);\r
+ /* Cpsw_periodicTick should be called from non-ISR context.\r
+ * Calling Cpsw_periodicTick at regular intervals for port link detect before\r
+ * starting packet RX/TX */\r
+ Cpsw_periodicTick(gCpswLpbkObj.hCpsw);\r
}\r
\r
while (!CpswAppUtils_isPortLinkUp(gCpswLpbkObj.hCpsw,\r
gCpswLpbkObj.portNum1))\r
{\r
BoardDiag_cpswWait(1000);\r
+ /* Cpsw_periodicTick should be called from non-ISR context.\r
+ * Calling Cpsw_periodicTick at regular intervals for port link detect before\r
+ * starting packet RX/TX */\r
+ Cpsw_periodicTick(gCpswLpbkObj.hCpsw);\r
}\r
\r
UART_printf("Link up for portNum-%d and portNum-%d\n\r",\r
CpswAppUtils_disableClocks(gCpswLpbkObj.cpswType);\r
CpswAppBoardUtils_deInit();\r
\r
- BoardDiag_cpswStopClock(clkhandle);\r
-\r
return 0;\r
}\r
\r
int8_t BoardDiag_CpswEthRunTest(void)\r
{\r
int8_t ret;\r
- uint8_t userInput;\r
+ uint32_t userInput;\r
\r
UART_printf ("************************************************\n");\r
UART_printf ("* CPSW Ethernet Test *\n");\r
UART_printf("1 - PRG0 ports verification\n\r");\r
UART_printf("2 - PRG1 ports verification\n\r");\r
\r
- UART_scanFmt("%d", &userInput);\r
+ UART_scanFmt("%d", (uint8_t*)&userInput);\r
\r
while((userInput != PRG0_PORT_VERIFICATION) &&\r
(userInput != PRG1_PORT_VERIFICATION))\r
\r
/* Run the loopback test */\r
ret = BoardDiag_cpswLoopbackTest();\r
- if(ret == -1)\r
- {\r
- UART_printf("CPSW Loopback Test failed\n\r");\r
- return -1;\r
- }\r
\r
return ret;\r
}\r
ret = BoardDiag_CpswEthRunTest();\r
if(ret == 0)\r
{\r
- UART_printf("CPSW loopback test completed successfully\n");\r
+ UART_printf("CPSW Loopback Test Passed\n\r");\r
+ UART_printf("All tests have passed\n\r");\r
+ }\r
+ else\r
+ {\r
+ UART_printf("CPSW Loopback Test failed\n\r");\r
}\r
\r
return ret;\r