Merge pull request #46 in PROCESSOR-SDK/pdk from review_PRSDK-7418 to master
authorMahesh Radhakrishnan <a0875154@ti.com>
Wed, 27 Nov 2019 16:55:06 +0000 (10:55 -0600)
committerMahesh Radhakrishnan <a0875154@ti.com>
Wed, 27 Nov 2019 16:55:06 +0000 (10:55 -0600)
* commit '35b7d5298d60c57faee2f249aa25701da8501943':
  J7200 Port for UDMA
  PRSDK-7418: Adding support for j7200 SOC and j7200_evm

.gitignore [new file with mode: 0644]
packages/ti/board/diag/pcie/build/am65xx_evm/armv8/makefile
packages/ti/board/src/j721e_evm/board_clock.c
packages/ti/board/utils/uniflash/target/build/uart_make.mk
packages/ti/boot/sbl/src/ospi/sbl_ospi.c
packages/ti/drv/cal/cal_component.mk
packages/ti/drv/emac/firmware/icss_dualmac/src/hd_helper.h
packages/ti/drv/emac/firmware/icss_dualmac/src/pru.cmd
packages/ti/drv/emac/firmware/icss_dualmac/src/rtu_v2.asm
packages/ti/drv/emac/firmware/icss_dualmac/src/rxl2_txl2.asm
packages/ti/drv/mcasp/example/j721e/src/mcasp_cfg.c

diff --git a/.gitignore b/.gitignore
new file mode 100644 (file)
index 0000000..17a7c66
--- /dev/null
@@ -0,0 +1,9 @@
+docs/
+internal_docs/
+packages/ti/binary/
+packages/ti/csl/
+packages/ti/drv/cpsw/
+packages/ti/drv/csirx/
+packages/ti/drv/emac/firmware/icss_dualmac/src/version_file.h
+packages/ti/drv/pm/
+packages/ti/drv/vhwa/
index 5652fdd01bc6b983eec03d6ba5b078001d353fca..de3319527422f7206fce9febb7314d6038969184 100644 (file)
@@ -104,7 +104,7 @@ ENTRY_SRC = diag_entry.S
 DIAG_SRC = diag_common_cfg.c
 
 # FLAGS for the SourceFiles
-CFLAGS += -DDIAG_$(TESTMODE)-Wall -DDIAG_$(MODE)
+CFLAGS += -DDIAG_$(TESTMODE) -Wall -DDIAG_$(MODE)
 SRC_CFLAGS = -I. $(CFLAGS) -g -gdwarf-3 -gstrict-dwarf -Wall 
 
 # Make Rule for the SRC Files
index 0f73964a804faddac4157b78dbb26deeb389740a..92eb21bb8d1a344eefa8e0ddb9bcb12ec7758870 100755 (executable)
@@ -62,7 +62,7 @@ uint32_t gBoardClkModuleMcuID[] = {
     TISCI_DEV_MCU_I2C1,
     TISCI_DEV_WKUP_I2C0,
     TISCI_DEV_WKUP_UART0,
-    TISCI_DEV_SA2_UL0,
+    TISCI_DEV_MCU_SA2_UL0,
 };
 
 uint32_t gBoardClkModuleMainID[] = {
index e6078997e69121a7330da5eef67fef4f84ece271..8fe70a1e8642f35d1dc4ac738e7e93f3362d0266 100755 (executable)
@@ -81,7 +81,7 @@ PACKAGE_SRCS_COMMON = ../../board ../../build ../../include ../../src ../../soc/
 PACKAGE_SRCS_COMMON += ../../../host\r
 PACKAGE_SRCS_COMMON += ../../../../board_utils_component.mk\r
 ifeq ($(BOARD), $(filter $(BOARD), j721e_evm))\r
-PACKAGE_SRCS_COMMON = ../../soc/k3\r
+PACKAGE_SRCS_COMMON += ../../soc/k3\r
 endif\r
 \r
 \r
index 3d43f3d6f29d3dc9740776e4b565ee9c1313d5b3..7d99b73f5c27c226bcce622fd1989c976442b2ac 100644 (file)
@@ -222,9 +222,11 @@ int32_t SBL_ReadSysfwImage(void **pBuffer, uint32_t num_bytes)
 
     ospi_cfg.funcClk = OSPI_MODULE_CLK_133M;
 
-    /* false = SDR mode, sysfw read by rom using DMA */
-    /* true  = DDR mode, sysfw read by SBL using CPU */
-    ospi_cfg.dtrEnable = true;
+    /* false: unstable, cpu read @ 120Mbytes per sec          */
+    /*        can work with direct ROM load once it is stable */
+    /* true:  stable, CPU read @60Mbytes per sec, will not    */
+    /*        work with ROM, as ROM needs byte accesses       */
+    ospi_cfg.dtrEnable = false;
 
     /* Set the default SPI init configurations */
     OSPI_socSetInitCfg(BOARD_OSPI_NOR_INSTANCE, &ospi_cfg);
@@ -236,23 +238,14 @@ int32_t SBL_ReadSysfwImage(void **pBuffer, uint32_t num_bytes)
     {
         SBL_ADD_PROFILE_POINT;
 
-        if (ospi_cfg.dtrEnable == true)
-        {   
-            /* Enable PHY pipeline mode  */
-            CSL_ospiPipelinePhyEnable((const CSL_ospi_flash_cfgRegs *)(OSPI_CTLR_BASE_ADDR), TRUE);
+        /* Enable PHY pipeline mode  even though DMA is not used */
+        CSL_ospiPipelinePhyEnable((const CSL_ospi_flash_cfgRegs *)(OSPI_CTLR_BASE_ADDR), TRUE);
 
-            /* Optimized CPU copy loop SDR */
-            SBL_SysFwLoad((void *)(*pBuffer), (void *)(OSPI_FLASH_BASE_ADDR + OSPI_OFFSET_SYSFW), num_bytes);
-        }
-        else
-        {
-            /* Point ROM to system firmware in OSPI flash, if SDR*/
-            *pBuffer = (void *)(OSPI_FLASH_BASE_ADDR + OSPI_OFFSET_SYSFW);
-        }
+        /* Optimized CPU copy loop - can be removed once ROM load is working */
+        SBL_SysFwLoad((void *)(*pBuffer), (void *)(OSPI_FLASH_BASE_ADDR + OSPI_OFFSET_SYSFW), num_bytes);
 
         /* Update handle for later use*/
         boardHandle = (void *)h;
-
     }
     else
     {
index 6ee3b6f15ab39ac5a16a8237b17684280ac04935..1313877e5cbab9d35d3cf04533c64bbdc27b48ca 100755 (executable)
@@ -45,6 +45,13 @@ drvcal_am65xx_CORELIST  = mpu1_0
 ############################
 cal_LIB_LIST = cal
 
+############################
+# cal app package
+# List of components included under cal app lib
+# The components included here are built and will be part of cal app lib
+############################
+cal_APP_LIB_LIST =
+
 ############################
 # cal examples
 # List of examples under cal (+= is used at each example definition)
@@ -97,11 +104,11 @@ export cal_app_utils_BOARD_DEPENDENCY
 export cal_app_utils_CORE_DEPENDENCY
 cal_app_utils_PKG_LIST = cal_app_utils
 cal_app_utils_INCLUDE = $(cal_app_utils_PATH)
-cal_app_utils_SOCLIST = $(drvcal_SOCLIST)
-export cal_app_utils_SOCLIST
+cal_app_utils_BOARDLIST = $(drvcal_BOARDLIST)
+export cal_app_utils_BOARDLIST
 cal_app_utils_$(SOC)_CORELIST = $(drvcal_$(SOC)_CORELIST)
 export cal_app_utils_$(SOC)_CORELIST
-cal_LIB_LIST += cal_app_utils
+cal_APP_LIB_LIST += cal_app_utils
 
 cal_app_utils_baremetal_COMP_LIST = cal_app_utils_baremetal
 cal_app_utils_baremetal_RELPATH = ti/drv/cal/examples/utils
@@ -121,11 +128,11 @@ export cal_app_utils_baremetal_BOARD_DEPENDENCY
 export cal_app_utils_baremetal_CORE_DEPENDENCY
 cal_app_utils_baremetal_PKG_LIST = cal_app_utils_baremetal
 cal_app_utils_baremetal_INCLUDE = $(cal_app_utils_baremetal_PATH)
-cal_app_utils_baremetal_SOCLIST = $(drvcal_SOCLIST)
-export cal_app_utils_baremetal_SOCLIST
 cal_app_utils_baremetal_$(SOC)_CORELIST = $(drvcal_$(SOC)_CORELIST)
+cal_app_utils_baremetal_BOARDLIST = $(drvcal_BOARDLIST)
+export cal_app_utils_baremetal_BOARDLIST
 export cal_app_utils_baremetal_$(SOC)_CORELIST
-cal_LIB_LIST += cal_app_utils_baremetal
+cal_APP_LIB_LIST += cal_app_utils_baremetal
 
 #
 # CAL Examples
@@ -204,8 +211,10 @@ export cal_baremetal_loopback_testapp_$(SOC)_CORELIST
 cal_EXAMPLE_LIST += cal_baremetal_loopback_testapp
 
 export cal_LIB_LIST
+export cal_APP_LIB_LIST
 export cal_EXAMPLE_LIST
 export drvcal_LIB_LIST = $(cal_LIB_LIST)
+export drvcal_APP_LIB_LIST = $(cal_APP_LIB_LIST)
 export drvcal_EXAMPLE_LIST = $(cal_EXAMPLE_LIST)
 
 CAL_CFLAGS =
index 10dc555a30ec2875d101bcbff65bdc011a4bb909..9c80245b226cdeaa740f5eb8f2e73f73a6a60c3a 100644 (file)
@@ -66,11 +66,13 @@ READ_RGMII_CFG      .macro rtmp, speed_flags
 if_ipg_not_expired     .macro then_go
        ; TODO check IPG
        ; if not expired jmp then_go
+       qbbc    $1, GRegs.speed_f, f_wait_ipg
        ldi32   r2, FW_CONFIG
        lbbo    &r3, r2, TX_IPG, 4 ;
-       lbco    &r4, c11, 0x0c, 4  ; read cycle counte
+       lbco    &r4, c11, 0x0c, 4  ; read cycle count
        qbgt    then_go, r4, r3    ; not expired yet
        clr     GRegs.speed_f, GRegs.speed_f, f_wait_ipg
+$1:    
        .endm
 
 ; touch r2, r3, r4
@@ -117,8 +119,8 @@ $1: ; for 10 mbps multiply on 51.2 usec (r4 << 10) + (r4 << 8)
        ; so if r3 is 0 then set it to 9.6 usec
        qbne    $2, r3, 0
        ldi     r3, IPG_10MBPS
-       ldi     r5, IPG_10MBPS_ADJ ;
-$2:    add     r3, r3, r5
+$2:    ldi     r5, IPG_10MBPS_ADJ ;
+       add     r3, r3, r5
        sbbo    &r3, r2, TX_IPG, 4 ; store it to TX_IPG
        set     GRegs.speed_f, GRegs.speed_f, f_wait_ipg
        .endm
index bd5e3a4bd6b0e22e54badd88d1099d632d84bb61..b3b968686bf1045de5b0bc0c136c668f1e07b39d 100644 (file)
@@ -40,6 +40,7 @@ SECTIONS
     .cinit         >  PRUDMEM, PAGE 1\r
     .args          >  PRUDMEM, PAGE 1\r
     .resource_table >  PRUDMEM, PAGE 1\r
+    .version_string >  PRUDMEM, PAGE 1\r
 }\r
 \r
 \r
index 9cde7d8d75c68b974469455719edd46d9bde5929..8ad95931f7758b87cf22ea7ddf2b527bce0222a5 100644 (file)
@@ -298,6 +298,8 @@ mgr_pkt:
        PSI_READ        GRrtu.ActThrdNum, 20
        ldi32   r0, MD_CONTROL0
        qbeq    mgr_pkt, r1, r0
+       ldi32   r0, MD_PROINFO
+       qbeq    mgr_pkt, r1, r0
        qbne    mgr_pkt01, r1.b2, 0x14;
        ; we have 16 bytes of packet now
        ; process mgr data
index 9d05fbf8892c7618d3cb96fb2af47ab2f8309446..6abf0708cfb03911f7a03d40d1a968ab26e002c0 100644 (file)
@@ -226,6 +226,27 @@ $2:        set     r31, r31, 29            ;tx.eof
        ldi     GRegs.tx.b.state, TX_S_W_EOF
        .endm
 
+restart_transmission .macro
+; OK we need to restart transmition of the same packet
+; use the same dma, which was used for the packet
+; !!!! we come here with TM disabled
+       qbbc    retr_1, GRegs.tx.b.flags, f_next_dma
+       read_bd_from_smem  r2, BD_OFS_0
+       XFR2VBUS_ISSUE_READ_AUTO_64_CMD XFR2VBUS_XID_READ0, r2, ADDR_HI
+       TM_ENABLE
+       XFR2VBUS_WAIT4READY     XFR2VBUS_XID_READ0
+       qba     retr_2
+retr_1:
+       read_bd_from_smem  r2, BD_OFS_1
+       XFR2VBUS_ISSUE_READ_AUTO_64_CMD XFR2VBUS_XID_READ1, r2, ADDR_HI
+       TM_ENABLE
+       XFR2VBUS_WAIT4READY     XFR2VBUS_XID_READ1
+
+retr_2:        TM_DISABLE
+       TX_TASK_INIT2_shell     r3
+       TM_ENABLE
+       .endm
+
 ; Code starts {{{1
  .retain     ; Required forbuilding    .out with assembly file
  .retainrefs ; Required forbuilding    .out with assembly file
@@ -321,7 +342,6 @@ bg_loop:
        xout    XFR2VBUS_XID_READ0, &r18, 4
        xout    XFR2VBUS_XID_READ1, &r18, 4
 
-       PSI_ABORT
 ;      if we are here, we can place debug error code somewere in the SMEM
        TM_DISABLE
        ldi32   r1, PRU_STOPPED
@@ -357,7 +377,6 @@ th_schedule0:
 ;----------------------
 scheduler:
        READ_RGMII_CFG  r2, GRegs.speed_f               ; update speed/duplex fields
-       sbco    &r25, c28, 0x20, 4
        qbbs    sch_10, GRegs.speed_f, f_half_d ; don't check col if full duplex
 ; if TX is idle and colission is set, probably it is from the
 ; previouse packet. Just wait
@@ -401,23 +420,7 @@ bg_half_duplex:
        qbne    sched_done, GRegs.rx.b.state, RX_STATE_IDLE ; we have active RX,don't start TX
        qbeq    bg_schedule1, GRegs.ret_cnt, 0  ; just new packet
        if_ipg_not_expired sched_done
-; OK we need to restart transmition of the same packet
-; use the same dma, which was used for the packet
-       qbbc    retr_1, GRegs.tx.b.flags, f_next_dma
-       read_bd_from_smem  r2, BD_OFS_0
-       XFR2VBUS_ISSUE_READ_AUTO_64_CMD XFR2VBUS_XID_READ0, r2, ADDR_HI
-       TM_ENABLE
-       XFR2VBUS_WAIT4READY     XFR2VBUS_XID_READ0
-       qba     retr_2
-retr_1:
-       read_bd_from_smem  r2, BD_OFS_1
-       XFR2VBUS_ISSUE_READ_AUTO_64_CMD XFR2VBUS_XID_READ1, r2, ADDR_HI
-       TM_ENABLE
-       XFR2VBUS_WAIT4READY     XFR2VBUS_XID_READ1
-
-retr_2:        TM_DISABLE
-       TX_TASK_INIT2_shell     r3
-       TM_ENABLE
+       restart_transmission
        jmp     bg_loop
 
 bg_new_pkt:
@@ -465,7 +468,6 @@ bg_done:
 TX_EOF:
        qbne    tx_underflow, GRegs.tx.b.state, TX_S_W_EOF
        flip_tx_r0_r23
-       m_inc_stat      r0.b0, 82
        qbbs    tx_proc_col, GRegs.speed_f, f_stopped_due_col
 ; TX TS processing
        qbbc    no_tx_ts, TxRegs.ds_flags, 5 ; we don't need tx_ts
@@ -477,10 +479,10 @@ no_tx_ts:
 ;      if half duplex IPC to RTU
        qbbs    tx_eof_0, GRegs.speed_f, f_half_d
        qbbs    tx_eof_ipc1, GRegs.tx.b.flags, f_next_dma       
-       SPIN_TOG_LOCK_LOC PRU_RTU_EOD_P_FLAG
+       SPIN_TOG_LOCK_LOC PRU_RTU_EOD_E_FLAG
        qba     tx_eof_0
 tx_eof_ipc1:
-       SPIN_TOG_LOCK_LOC PRU_RTU_EOD_E_FLAG
+       SPIN_TOG_LOCK_LOC PRU_RTU_EOD_P_FLAG
 ; we don't check if the next packet scheduled for 10Mbps 
 tx_eof_0:
        qbbs    tx_eof_1, GRegs.speed_f, f_1gbps
@@ -531,10 +533,10 @@ tx_proc_col:
 txp_max_retry:
        m_inc_stat      r1.b0, TX_COL_DROPPED
        qbbs    txp_max_01, GRegs.tx.b.flags, f_next_dma        
-       SPIN_TOG_LOCK_LOC PRU_RTU_EOD_P_FLAG
+       SPIN_TOG_LOCK_LOC PRU_RTU_EOD_E_FLAG
        qba     txp_max_02
 txp_max_01:
-       SPIN_TOG_LOCK_LOC PRU_RTU_EOD_E_FLAG
+       SPIN_TOG_LOCK_LOC PRU_RTU_EOD_P_FLAG
 txp_max_02:
        start_ipg_timer
        ldi     GRegs.ret_cnt, 0
index ab82bdce90b95b2f1c5bf226836aa7b3b4f212b5..0f115a6c24333a9244adb822f8c4fae1936576f8 100644 (file)
@@ -220,7 +220,7 @@ Mcasp_ChanParams mcasp_chanparam[2] = {
 #elif defined(AUDIO_DC_DIGITAL_TEST)
         {Mcasp_SerializerNum_0}, /* serialiser index           */
 #else
-        {Mcasp_SerializerNum_0, Mcasp_SerializerNum_1, Mcasp_SerializerNum_2}, /* serialiser index */
+        {Mcasp_SerializerNum_4, Mcasp_SerializerNum_5, Mcasp_SerializerNum_6}, /* serialiser index */
 #endif
         &mcasp0RcvSetup,
         TRUE,
@@ -251,7 +251,7 @@ Mcasp_ChanParams mcasp_chanparam[2] = {
 #elif defined(AUDIO_DC_DIGITAL_TEST)
         {Mcasp_SerializerNum_0}, /* serialiser index           */
 #else
-        {Mcasp_SerializerNum_3, Mcasp_SerializerNum_4, Mcasp_SerializerNum_5}, /* serialiser index */
+        {Mcasp_SerializerNum_0, Mcasp_SerializerNum_1, Mcasp_SerializerNum_2}, /* serialiser index */
 #endif
         &mcasp0XmtSetup,
         TRUE,