icss-emac: add to PDK
authorJacob Stiffler <j-stiffler@ti.com>
Fri, 1 Nov 2019 18:54:57 +0000 (14:54 -0400)
committerJacob Stiffler <j-stiffler@ti.com>
Fri, 1 Nov 2019 18:54:57 +0000 (14:54 -0400)
Development of icss-emac has been relocated here from:
* Repo: https://git.ti.com/keystone-rtos/icss-emac
* Branch: master
* Commit ID: 5978212c59468eab68e232a538ee005162b6902f

Signed-off-by: Jacob Stiffler <j-stiffler@ti.com>
206 files changed:
packages/ti/drv/icss_emac/.gitignore [new file with mode: 0755]
packages/ti/drv/icss_emac/COPYING.txt [new file with mode: 0644]
packages/ti/drv/icss_emac/Settings.xdc.xdt [new file with mode: 0644]
packages/ti/drv/icss_emac/build/armv7/libicss_emac_aearmv7.mk [new file with mode: 0644]
packages/ti/drv/icss_emac/build/buildlib.xs [new file with mode: 0644]
packages/ti/drv/icss_emac/build/makefile.mk [new file with mode: 0644]
packages/ti/drv/icss_emac/build/makefile_icss_dualemac.mk [new file with mode: 0644]
packages/ti/drv/icss_emac/build/makefile_icss_switch.mk [new file with mode: 0644]
packages/ti/drv/icss_emac/build/makefile_indp.mk [new file with mode: 0644]
packages/ti/drv/icss_emac/build/makefile_profile.mk [new file with mode: 0644]
packages/ti/drv/icss_emac/build/makefile_profile_indp.mk [new file with mode: 0644]
packages/ti/drv/icss_emac/config.bld [new file with mode: 0644]
packages/ti/drv/icss_emac/config_mk.bld [new file with mode: 0644]
packages/ti/drv/icss_emac/docs/Doxyfile [new file with mode: 0644]
packages/ti/drv/icss_emac/docs/Module.xs [new file with mode: 0755]
packages/ti/drv/icss_emac/docs/PDK_ICSS_EMAC_LLD_01.00.00_manifest.html [new file with mode: 0755]
packages/ti/drv/icss_emac/docs/ReleaseNotes_ICSS_EMAC_LLD.doc [new file with mode: 0644]
packages/ti/drv/icss_emac/docs/ReleaseNotes_ICSS_EMAC_LLD.pdf [new file with mode: 0644]
packages/ti/drv/icss_emac/docs/doxyfile.xdt [new file with mode: 0755]
packages/ti/drv/icss_emac/docs/tifooter.htm [new file with mode: 0755]
packages/ti/drv/icss_emac/docs/tiheader.htm [new file with mode: 0755]
packages/ti/drv/icss_emac/docs/tilogo.gif [new file with mode: 0755]
packages/ti/drv/icss_emac/docs/titagline.gif [new file with mode: 0755]
packages/ti/drv/icss_emac/firmware/Module.xs [new file with mode: 0644]
packages/ti/drv/icss_emac/firmware/cmd/PRU0_REV1_to_ARM.cmd [new file with mode: 0755]
packages/ti/drv/icss_emac/firmware/cmd/PRU0_REV1_to_C66.cmd [new file with mode: 0755]
packages/ti/drv/icss_emac/firmware/cmd/PRU0_REV2_to_ARM.cmd [new file with mode: 0755]
packages/ti/drv/icss_emac/firmware/cmd/PRU0_REV2_to_C66.cmd [new file with mode: 0755]
packages/ti/drv/icss_emac/firmware/cmd/PRU1_REV1_to_ARM.cmd [new file with mode: 0755]
packages/ti/drv/icss_emac/firmware/cmd/PRU1_REV1_to_C66.cmd [new file with mode: 0755]
packages/ti/drv/icss_emac/firmware/cmd/PRU1_REV2_to_ARM.cmd [new file with mode: 0755]
packages/ti/drv/icss_emac/firmware/cmd/PRU1_REV2_to_C66.cmd [new file with mode: 0755]
packages/ti/drv/icss_emac/firmware/cmd/lnk_a8_a9_a15_REV1.cmd [new file with mode: 0755]
packages/ti/drv/icss_emac/firmware/cmd/lnk_a8_a9_a15_REV1_linux.cmd [new file with mode: 0644]
packages/ti/drv/icss_emac/firmware/cmd/lnk_a8_a9_a15_REV2.cmd [new file with mode: 0755]
packages/ti/drv/icss_emac/firmware/cmd/lnk_a8_a9_a15_REV2_linux.cmd [new file with mode: 0644]
packages/ti/drv/icss_emac/firmware/cmd/lnk_c66_m4_REV1.cmd [new file with mode: 0755]
packages/ti/drv/icss_emac/firmware/cmd/lnk_c66_m4_REV2.cmd [new file with mode: 0755]
packages/ti/drv/icss_emac/firmware/icss_dualemac/Makefile [new file with mode: 0644]
packages/ti/drv/icss_emac/firmware/icss_dualemac/config/icss_emacFwConfig.c [new file with mode: 0644]
packages/ti/drv/icss_emac/firmware/icss_dualemac/config/icss_emacFwConfig.h [new file with mode: 0644]
packages/ti/drv/icss_emac/firmware/icss_dualemac/config/icss_emacFwVersion.h [new file with mode: 0644]
packages/ti/drv/icss_emac/firmware/icss_dualemac/docs/ICSS_DUAL_EMAC_Firmware_Design_Guide.doc [new file with mode: 0644]
packages/ti/drv/icss_emac/firmware/icss_dualemac/docs/ICSS_DUAL_EMAC_Firmware_Design_Guide.pdf [new file with mode: 0644]
packages/ti/drv/icss_emac/firmware/icss_dualemac/make_all.mk [new file with mode: 0644]
packages/ti/drv/icss_emac/firmware/icss_dualemac/src/README.txt [new file with mode: 0644]
packages/ti/drv/icss_emac/firmware/icss_dualemac/src/emac_MII_Rcv.asm [new file with mode: 0644]
packages/ti/drv/icss_emac/firmware/icss_dualemac/src/emac_MII_Rcv.h [new file with mode: 0644]
packages/ti/drv/icss_emac/firmware/icss_dualemac/src/emac_MII_Xmt.asm [new file with mode: 0644]
packages/ti/drv/icss_emac/firmware/icss_dualemac/src/emac_MII_Xmt.h [new file with mode: 0644]
packages/ti/drv/icss_emac/firmware/icss_dualemac/src/emac_ptp.asm [new file with mode: 0644]
packages/ti/drv/icss_emac/firmware/icss_dualemac/src/emac_statistics.asm [new file with mode: 0644]
packages/ti/drv/icss_emac/firmware/icss_dualemac/src/emac_tts.asm [new file with mode: 0644]
packages/ti/drv/icss_emac/firmware/icss_dualemac/src/emac_tts.h [new file with mode: 0644]
packages/ti/drv/icss_emac/firmware/icss_dualemac/src/firmware_version.h [new file with mode: 0644]
packages/ti/drv/icss_emac/firmware/icss_dualemac/src/icss_defines.h [new file with mode: 0644]
packages/ti/drv/icss_emac/firmware/icss_dualemac/src/icss_ecap_regs.h [new file with mode: 0644]
packages/ti/drv/icss_emac/firmware/icss_dualemac/src/icss_emacSwitch.h [new file with mode: 0644]
packages/ti/drv/icss_emac/firmware/icss_dualemac/src/icss_iep_regs.h [new file with mode: 0644]
packages/ti/drv/icss_emac/firmware/icss_dualemac/src/icss_intc_regs.h [new file with mode: 0644]
packages/ti/drv/icss_emac/firmware/icss_dualemac/src/icss_macros.h [new file with mode: 0644]
packages/ti/drv/icss_emac/firmware/icss_dualemac/src/icss_miirt_regs.h [new file with mode: 0644]
packages/ti/drv/icss_emac/firmware/icss_dualemac/src/icss_ptp.h [new file with mode: 0644]
packages/ti/drv/icss_emac/firmware/icss_dualemac/src/icss_ptp_macro.h [new file with mode: 0644]
packages/ti/drv/icss_emac/firmware/icss_dualemac/src/icss_rx_int_pacing_mmap.h [new file with mode: 0644]
packages/ti/drv/icss_emac/firmware/icss_dualemac/src/icss_timeSync_memory_map.h [new file with mode: 0644]
packages/ti/drv/icss_emac/firmware/icss_dualemac/src/icss_vlan_mcast_filter_mmap.h [new file with mode: 0644]
packages/ti/drv/icss_emac/firmware/icss_dualemac/src/micro_scheduler.asm [new file with mode: 0644]
packages/ti/drv/icss_emac/firmware/icss_dualemac/src/micro_scheduler.h [new file with mode: 0644]
packages/ti/drv/icss_emac/firmware/icss_dualemac/src/pru.cmd [new file with mode: 0644]
packages/ti/drv/icss_emac/firmware/icss_dualemac/src/pru_types.h [new file with mode: 0644]
packages/ti/drv/icss_emac/firmware/icss_dualemac/src/resource_table.c [new file with mode: 0644]
packages/ti/drv/icss_emac/firmware/icss_dualemac/src/rsc_types.h [new file with mode: 0644]
packages/ti/drv/icss_emac/firmware/icss_switch/config/icss_emacFwVersion.h [new file with mode: 0644]
packages/ti/drv/icss_emac/firmware/icss_switch/docs/ICSS_SWITCH_Firmware_Design_Guide.doc [new file with mode: 0644]
packages/ti/drv/icss_emac/firmware/icss_switch/docs/ICSS_SWITCH_Firmware_Design_Guide.pdf [new file with mode: 0644]
packages/ti/drv/icss_emac/firmware/icss_switch/src/icss_switch.h [new file with mode: 0644]
packages/ti/drv/icss_emac/firmware/icss_switch/src/icss_switch_macros.h [new file with mode: 0644]
packages/ti/drv/icss_emac/firmware/icss_switch/src/switch_collision_task.asm [new file with mode: 0644]
packages/ti/drv/icss_emac/icss_emacCommon.h [new file with mode: 0644]
packages/ti/drv/icss_emac/icss_emacDrv.h [new file with mode: 0644]
packages/ti/drv/icss_emac/icss_emacDrv_Def.h [new file with mode: 0644]
packages/ti/drv/icss_emac/icss_emacFwInit.h [new file with mode: 0644]
packages/ti/drv/icss_emac/icss_emacLearning.h [new file with mode: 0755]
packages/ti/drv/icss_emac/icss_emacStatistics.h [new file with mode: 0644]
packages/ti/drv/icss_emac/icss_emacStormControl.h [new file with mode: 0755]
packages/ti/drv/icss_emac/icss_emac_component.mk [new file with mode: 0644]
packages/ti/drv/icss_emac/icss_emac_ver.h [new file with mode: 0644]
packages/ti/drv/icss_emac/icss_emac_ver.h.xdt [new file with mode: 0644]
packages/ti/drv/icss_emac/makefile [new file with mode: 0644]
packages/ti/drv/icss_emac/makefile_armv7 [new file with mode: 0644]
packages/ti/drv/icss_emac/package.bld [new file with mode: 0644]
packages/ti/drv/icss_emac/package.xdc [new file with mode: 0644]
packages/ti/drv/icss_emac/package.xs [new file with mode: 0644]
packages/ti/drv/icss_emac/soc/Module.xs [new file with mode: 0644]
packages/ti/drv/icss_emac/soc/am335x/icss_emacSoc.c [new file with mode: 0644]
packages/ti/drv/icss_emac/soc/am437x/icss_emacSoc.c [new file with mode: 0644]
packages/ti/drv/icss_emac/soc/am571x/icss_emacSoc.c [new file with mode: 0644]
packages/ti/drv/icss_emac/soc/am572x/icss_emacSoc.c [new file with mode: 0644]
packages/ti/drv/icss_emac/soc/am574x/icss_emacSoc.c [new file with mode: 0644]
packages/ti/drv/icss_emac/soc/icss_emacSoc.h [new file with mode: 0644]
packages/ti/drv/icss_emac/soc/k2g/icss_emacSoc.c [new file with mode: 0644]
packages/ti/drv/icss_emac/src/Module.xs [new file with mode: 0644]
packages/ti/drv/icss_emac/src/icss_emacDrv.c [new file with mode: 0644]
packages/ti/drv/icss_emac/src/icss_emacFwInit.c [new file with mode: 0644]
packages/ti/drv/icss_emac/src/icss_emacLearning.c [new file with mode: 0644]
packages/ti/drv/icss_emac/src/icss_emacLoc.c [new file with mode: 0644]
packages/ti/drv/icss_emac/src/icss_emacLoc.h [new file with mode: 0644]
packages/ti/drv/icss_emac/src/icss_emacStatistics.c [new file with mode: 0644]
packages/ti/drv/icss_emac/src/icss_emacStormControl.c [new file with mode: 0644]
packages/ti/drv/icss_emac/src/icss_emac_osal.h [new file with mode: 0644]
packages/ti/drv/icss_emac/src/phy.h [new file with mode: 0644]
packages/ti/drv/icss_emac/src/src_files_common.mk [new file with mode: 0644]
packages/ti/drv/icss_emac/test/Module.xs [new file with mode: 0755]
packages/ti/drv/icss_emac/test/am335x/armv7/bios/ICSS_EMAC_BasicExample_iceAMIC110_wSoCFile_armTestproject.txt [new file with mode: 0644]
packages/ti/drv/icss_emac/test/am335x/armv7/bios/ICSS_EMAC_BasicExample_iceAMIC110_wSoCLib_armTestproject.txt [new file with mode: 0644]
packages/ti/drv/icss_emac/test/am335x/armv7/bios/ICSS_EMAC_BasicExample_icev2AM335x_wSoCFile_armTestproject.txt [new file with mode: 0644]
packages/ti/drv/icss_emac/test/am335x/armv7/bios/ICSS_EMAC_BasicExample_icev2AM335x_wSoCLib_armTestproject.txt [new file with mode: 0644]
packages/ti/drv/icss_emac/test/am335x/armv7/bios/ICSS_EMAC_SwitchExample_iceAMIC110_wSoCFile_armTestproject.txt [new file with mode: 0644]
packages/ti/drv/icss_emac/test/am335x/armv7/bios/ICSS_EMAC_SwitchExample_iceAMIC110_wSoCLib_armTestproject.txt [new file with mode: 0644]
packages/ti/drv/icss_emac/test/am335x/armv7/bios/ICSS_EMAC_SwitchExample_icev2AM335x_wSoCFile_armTestproject.txt [new file with mode: 0644]
packages/ti/drv/icss_emac/test/am335x/armv7/bios/ICSS_EMAC_SwitchExample_icev2AM335x_wSoCLib_armTestproject.txt [new file with mode: 0644]
packages/ti/drv/icss_emac/test/am335x/armv7/bios/am335x_app_iceamic110_wSoCFile.cfg [new file with mode: 0644]
packages/ti/drv/icss_emac/test/am335x/armv7/bios/am335x_app_iceamic110_wSoCLib.cfg [new file with mode: 0644]
packages/ti/drv/icss_emac/test/am335x/armv7/bios/am335x_app_icev2_wSoCFile.cfg [new file with mode: 0644]
packages/ti/drv/icss_emac/test/am335x/armv7/bios/am335x_app_icev2_wSoCLib.cfg [new file with mode: 0644]
packages/ti/drv/icss_emac/test/am335x/armv7/linux/makefile [new file with mode: 0644]
packages/ti/drv/icss_emac/test/am437x/armv7/bios/ICSS_EMAC_BasicExample_idkAM437x_wSoCFile_armtestproject.txt [new file with mode: 0644]
packages/ti/drv/icss_emac/test/am437x/armv7/bios/ICSS_EMAC_BasicExample_idkAM437x_wSoCLib_armtestproject.txt [new file with mode: 0644]
packages/ti/drv/icss_emac/test/am437x/armv7/bios/ICSS_EMAC_SwitchExample_idkAM437x_wSoCFile_armtestproject.txt [new file with mode: 0644]
packages/ti/drv/icss_emac/test/am437x/armv7/bios/ICSS_EMAC_SwitchExample_idkAM437x_wSoCLib_armtestproject.txt [new file with mode: 0644]
packages/ti/drv/icss_emac/test/am437x/armv7/bios/am437x_app_idk_wSoCFile.cfg [new file with mode: 0644]
packages/ti/drv/icss_emac/test/am437x/armv7/bios/am437x_app_idk_wSoCLib.cfg [new file with mode: 0644]
packages/ti/drv/icss_emac/test/am437x/armv7/linux/makefile [new file with mode: 0644]
packages/ti/drv/icss_emac/test/am571x/armv7/bios/ICSS_EMAC_BasicExample_idkAM571x_wSoCFile_armTestproject.txt [new file with mode: 0644]
packages/ti/drv/icss_emac/test/am571x/armv7/bios/ICSS_EMAC_BasicExample_idkAM571x_wSoCLib_armTestproject.txt [new file with mode: 0644]
packages/ti/drv/icss_emac/test/am571x/armv7/bios/ICSS_EMAC_SwitchExample_idkAM571x_wSoCFile_armTestproject.txt [new file with mode: 0644]
packages/ti/drv/icss_emac/test/am571x/armv7/bios/ICSS_EMAC_SwitchExample_idkAM571x_wSoCLib_armTestproject.txt [new file with mode: 0644]
packages/ti/drv/icss_emac/test/am571x/armv7/bios/icss_emac_arm_wSoCFile.cfg [new file with mode: 0755]
packages/ti/drv/icss_emac/test/am571x/armv7/bios/icss_emac_arm_wSoCLib.cfg [new file with mode: 0755]
packages/ti/drv/icss_emac/test/am571x/armv7/linux/makefile [new file with mode: 0644]
packages/ti/drv/icss_emac/test/am571x/c66/bios/ICSS_EMAC_BasicExample_idkAM571x_wSoCLib_C66Testproject.txt [new file with mode: 0644]
packages/ti/drv/icss_emac/test/am571x/c66/bios/ICSS_EMAC_SwitchExample_idkAM571x_wSoCLib_C66Testproject.txt [new file with mode: 0644]
packages/ti/drv/icss_emac/test/am571x/c66/bios/icss_emac_c66_wSoCLib.cfg [new file with mode: 0755]
packages/ti/drv/icss_emac/test/am571x/m4/bios/ICSS_EMAC_BasicExample_idkAM571x_wSoCFile_m4Testproject.txt [new file with mode: 0644]
packages/ti/drv/icss_emac/test/am571x/m4/bios/ICSS_EMAC_BasicExample_idkAM571x_wSoCLib_m4Testproject.txt [new file with mode: 0644]
packages/ti/drv/icss_emac/test/am571x/m4/bios/ICSS_EMAC_SwitchExample_idkAM571x_wSoCFile_m4Testproject.txt [new file with mode: 0644]
packages/ti/drv/icss_emac/test/am571x/m4/bios/ICSS_EMAC_SwitchExample_idkAM571x_wSoCLib_m4Testproject.txt [new file with mode: 0644]
packages/ti/drv/icss_emac/test/am571x/m4/bios/icss_emac_m4_wSoCFile.cfg [new file with mode: 0755]
packages/ti/drv/icss_emac/test/am571x/m4/bios/icss_emac_m4_wSoCLib.cfg [new file with mode: 0755]
packages/ti/drv/icss_emac/test/am572x/armv7/bios/ICSS_EMAC_BasicExamplePoll_idkAM572x_wSoCLib_armTestproject.txt [new file with mode: 0644]
packages/ti/drv/icss_emac/test/am572x/armv7/bios/ICSS_EMAC_BasicExample_idkAM572x_wSoCFile_armTestproject.txt [new file with mode: 0644]
packages/ti/drv/icss_emac/test/am572x/armv7/bios/ICSS_EMAC_BasicExample_idkAM572x_wSoCLib_armTestproject.txt [new file with mode: 0644]
packages/ti/drv/icss_emac/test/am572x/armv7/bios/ICSS_EMAC_SwitchExample_idkAM572x_wSoCFile_armTestproject.txt [new file with mode: 0644]
packages/ti/drv/icss_emac/test/am572x/armv7/bios/ICSS_EMAC_SwitchExample_idkAM572x_wSoCLib_armTestproject.txt [new file with mode: 0644]
packages/ti/drv/icss_emac/test/am572x/armv7/bios/icss_emac_arm_wSoCFile.cfg [new file with mode: 0755]
packages/ti/drv/icss_emac/test/am572x/armv7/bios/icss_emac_arm_wSoCLib.cfg [new file with mode: 0755]
packages/ti/drv/icss_emac/test/am572x/armv7/linux/makefile [new file with mode: 0644]
packages/ti/drv/icss_emac/test/am572x/c66/bios/ICSS_EMAC_BasicExample_idkAM572x_wSoCLib_C66Testproject.txt [new file with mode: 0644]
packages/ti/drv/icss_emac/test/am572x/c66/bios/ICSS_EMAC_SwitchExample_idkAM572x_wSoCLib_C66Testproject.txt [new file with mode: 0644]
packages/ti/drv/icss_emac/test/am572x/c66/bios/icss_emac_c66_wSoCLib.cfg [new file with mode: 0755]
packages/ti/drv/icss_emac/test/am572x/m4/bios/ICSS_EMAC_BasicExample_idkAM572x_wSoCFile_m4Testproject.txt [new file with mode: 0644]
packages/ti/drv/icss_emac/test/am572x/m4/bios/ICSS_EMAC_BasicExample_idkAM572x_wSoCLib_m4Testproject.txt [new file with mode: 0644]
packages/ti/drv/icss_emac/test/am572x/m4/bios/ICSS_EMAC_SwitchExample_idkAM572x_wSoCFile_m4Testproject.txt [new file with mode: 0644]
packages/ti/drv/icss_emac/test/am572x/m4/bios/ICSS_EMAC_SwitchExample_idkAM572x_wSoCLib_m4Testproject.txt [new file with mode: 0644]
packages/ti/drv/icss_emac/test/am572x/m4/bios/icss_emac_m4_wSoCFile.cfg [new file with mode: 0644]
packages/ti/drv/icss_emac/test/am572x/m4/bios/icss_emac_m4_wSoCLib.cfg [new file with mode: 0644]
packages/ti/drv/icss_emac/test/am574x/armv7/bios/ICSS_EMAC_BasicExamplePoll_idkAM574x_wSoCLib_armTestproject.txt [new file with mode: 0644]
packages/ti/drv/icss_emac/test/am574x/armv7/bios/ICSS_EMAC_BasicExample_idkAM574x_wSoCFile_armTestproject.txt [new file with mode: 0644]
packages/ti/drv/icss_emac/test/am574x/armv7/bios/ICSS_EMAC_BasicExample_idkAM574x_wSoCLib_armTestproject.txt [new file with mode: 0644]
packages/ti/drv/icss_emac/test/am574x/armv7/bios/ICSS_EMAC_SwitchExample_idkAM574x_wSoCFile_armTestproject.txt [new file with mode: 0644]
packages/ti/drv/icss_emac/test/am574x/armv7/bios/ICSS_EMAC_SwitchExample_idkAM574x_wSoCLib_armTestproject.txt [new file with mode: 0644]
packages/ti/drv/icss_emac/test/am574x/armv7/bios/icss_emac_arm_wSoCFile.cfg [new file with mode: 0644]
packages/ti/drv/icss_emac/test/am574x/armv7/bios/icss_emac_arm_wSoCLib.cfg [new file with mode: 0644]
packages/ti/drv/icss_emac/test/am574x/armv7/linux/makefile [new file with mode: 0644]
packages/ti/drv/icss_emac/test/am574x/c66/bios/ICSS_EMAC_BasicExample_idkAM574x_wSoCLib_C66Testproject.txt [new file with mode: 0644]
packages/ti/drv/icss_emac/test/am574x/c66/bios/ICSS_EMAC_SwitchExample_idkAM574x_wSoCLib_C66Testproject.txt [new file with mode: 0644]
packages/ti/drv/icss_emac/test/am574x/c66/bios/icss_emac_c66_wSoCLib.cfg [new file with mode: 0644]
packages/ti/drv/icss_emac/test/am574x/m4/bios/ICSS_EMAC_BasicExample_idkAM574x_wSoCFile_m4Testproject.txt [new file with mode: 0644]
packages/ti/drv/icss_emac/test/am574x/m4/bios/ICSS_EMAC_BasicExample_idkAM574x_wSoCLib_m4Testproject.txt [new file with mode: 0644]
packages/ti/drv/icss_emac/test/am574x/m4/bios/ICSS_EMAC_SwitchExample_idkAM574x_wSoCFile_m4Testproject.txt [new file with mode: 0644]
packages/ti/drv/icss_emac/test/am574x/m4/bios/ICSS_EMAC_SwitchExample_idkAM574x_wSoCLib_m4Testproject.txt [new file with mode: 0644]
packages/ti/drv/icss_emac/test/am574x/m4/bios/icss_emac_m4_wSoCFile.cfg [new file with mode: 0644]
packages/ti/drv/icss_emac/test/am574x/m4/bios/icss_emac_m4_wSoCLib.cfg [new file with mode: 0644]
packages/ti/drv/icss_emac/test/k2g/armv7/bios/ICSS_EMAC_BasicExample_iceK2G_wSoCLib_armTestproject.txt [new file with mode: 0644]
packages/ti/drv/icss_emac/test/k2g/armv7/bios/ICSS_EMAC_SwitchExample_iceK2G_wSoCLib_armTestproject.txt [new file with mode: 0644]
packages/ti/drv/icss_emac/test/k2g/armv7/bios/icss_emac_arm_wSoCLib.cfg [new file with mode: 0644]
packages/ti/drv/icss_emac/test/k2g/armv7/linux/makefile [new file with mode: 0644]
packages/ti/drv/icss_emac/test/k2g/c66/bios/ICSS_EMAC_BasicExample_iceK2G_wSoCLib_C66Testproject.txt [new file with mode: 0644]
packages/ti/drv/icss_emac/test/k2g/c66/bios/ICSS_EMAC_SwitchExample_iceK2G_wSoCLib_C66Testproject.txt [new file with mode: 0644]
packages/ti/drv/icss_emac/test/k2g/c66/bios/icss_emac_c66_wSoCLib.cfg [new file with mode: 0644]
packages/ti/drv/icss_emac/test/src/armv7/linux/__mmap_helper.h [new file with mode: 0644]
packages/ti/drv/icss_emac/test/src/armv7/linux/mmap_helper.c [new file with mode: 0644]
packages/ti/drv/icss_emac/test/src/armv7/linux/mmap_helper.h [new file with mode: 0644]
packages/ti/drv/icss_emac/test/src/fw_mem_section.h [new file with mode: 0644]
packages/ti/drv/icss_emac/test/src/main.c [new file with mode: 0644]
packages/ti/drv/icss_emac/test/src/main_a8.c [new file with mode: 0644]
packages/ti/drv/icss_emac/test/src/main_a9.c [new file with mode: 0644]
packages/ti/drv/icss_emac/test/src/main_dsp.c [new file with mode: 0644]
packages/ti/drv/icss_emac/test/src/main_k2g.c [new file with mode: 0644]
packages/ti/drv/icss_emac/test/src/main_m4.c [new file with mode: 0644]
packages/ti/drv/icss_emac/test/src/main_poll_test.c [new file with mode: 0644]
packages/ti/drv/icss_emac/test/src/test_common_utils.c [new file with mode: 0644]
packages/ti/drv/icss_emac/test/src/test_common_utils.h [new file with mode: 0644]
packages/ti/drv/icss_emac/test/src/tiemac_pruss_intc_mapping.h [new file with mode: 0644]
packages/ti/drv/icss_emac/test/src/tiswitch_pruss_intc_mapping.h [new file with mode: 0644]

diff --git a/packages/ti/drv/icss_emac/.gitignore b/packages/ti/drv/icss_emac/.gitignore
new file mode 100755 (executable)
index 0000000..c3e8bd5
--- /dev/null
@@ -0,0 +1,28 @@
+*.swp
+*~
+.dlls
+.executables
+.interfaces
+.libraries
+.xdcenv.mak
+Settings.h
+Settings.xdc
+build/c66/
+build/k2[heklg]/
+build/am57*/
+build/am335x/
+build/am437x/
+build/m4/
+build/armv7/
+docs/Doxyfile
+docs/doxygen/
+test/*/*/bios/src
+icss_emac_ver.h
+lib/
+makefile
+package.mak
+package/
+packages/
+*.o
+*.dep
+firmware/icss*/bin
diff --git a/packages/ti/drv/icss_emac/COPYING.txt b/packages/ti/drv/icss_emac/COPYING.txt
new file mode 100644 (file)
index 0000000..b0b77c1
--- /dev/null
@@ -0,0 +1,86 @@
+/* Copyright (C) {2016-PRESENT} Texas Instruments Incorporated - http://www.ti.com/
+ *
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions
+ *  are met:
+ *
+ *    Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *
+ *    Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the
+ *    distribution.
+ *
+ *    Neither the name of Texas Instruments Incorporated nor the names of
+ *    its contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+;
+;  TEXAS INSTRUMENTS TEXT FILE LICENSE
+; 
+;   Copyright (c) 2017-PRESENT Texas Instruments Incorporated
+; 
+;  All rights reserved not granted herein.
+;  
+;  Limited License.  
+; 
+;  Texas Instruments Incorporated grants a world-wide, royalty-free, non-exclusive 
+;  license under copyrights and patents it now or hereafter owns or controls to 
+;  make, have made, use, import, offer to sell and sell ("Utilize") this software 
+;  subject to the terms herein.  With respect to the foregoing patent license, 
+;  such license is granted  solely to the extent that any such patent is necessary 
+;  to Utilize the software alone.  The patent license shall not apply to any 
+;  combinations which include this software, other than combinations with devices 
+;  manufactured by or for TI (TI Devices).  No hardware patent is licensed hereunder.
+; 
+;  Redistributions must preserve existing copyright notices and reproduce this license 
+;  (including the above copyright notice and the disclaimer and (if applicable) source 
+;  code license limitations below) in the documentation and/or other materials provided 
+;  with the distribution.
+;  
+;  Redistribution and use in binary form, without modification, are permitted provided 
+;  that the following conditions are met:
+;      No reverse engineering, decompilation, or disassembly of this software is 
+;   permitted with respect to any software provided in binary form.
+;      Any redistribution and use are licensed by TI for use only with TI Devices.
+;      Nothing shall obligate TI to provide you with source code for the software 
+;   licensed and provided to you in object code.
+;  
+;  If software source code is provided to you, modification and redistribution of the 
+;  source code are permitted provided that the following conditions are met:
+;      Any redistribution and use of the source code, including any resulting derivative 
+;   works, are licensed by TI for use only with TI Devices.
+;      Any redistribution and use of any object code compiled from the source code
+;   and any resulting derivative works, are licensed by TI for use only with TI Devices.
+; 
+;  Neither the name of Texas Instruments Incorporated nor the names of its suppliers 
+;  may be used to endorse or promote products derived from this software without 
+;  specific prior written permission.
+; 
+;  DISCLAIMER.
+; 
+;  THIS SOFTWARE IS PROVIDED BY TI AND TIS LICENSORS "AS IS" AND ANY EXPRESS OR IMPLIED 
+;  WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY 
+;  AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL TI AND TIS 
+;  LICENSORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 
+;  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
+;  GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 
+;  CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+;  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 
+;  EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+; 
diff --git a/packages/ti/drv/icss_emac/Settings.xdc.xdt b/packages/ti/drv/icss_emac/Settings.xdc.xdt
new file mode 100644 (file)
index 0000000..3111eb9
--- /dev/null
@@ -0,0 +1,55 @@
+\r
+%%{\r
+/*!\r
+ *  This template implements the Settings.xdc\r
+ */  \r
+  /* Versioning */\r
+  var ver = this;\r
+  for each(i=0;i<ver.length;i++)\r
+  {\r
+      if(String(ver[i]).length < 2)\r
+      {\r
+        ver[i]="0"+ver[i];\r
+      }\r
+  }\r
+  \r
+  var packageVersion = "\""+ver[0]+"."+ver[1]+"."+ver[2]+"."+ver[3]+"\"";\r
+\r
+%%}\r
+\r
+module Settings\r
+{\r
+    config string icss_emacVersionString = `packageVersion`;\r
+    /*! This variable is to control the SoC type selection.\r
+     * By default this variable is set to NULL.\r
+     * \r
+     * To use LLD for the selected device, add the following lines to config\r
+     * file and set the deviceType correctly:\r
+        *\r
+     *      var icssEmacSettings = xdc.useModule ('ti.drv.icssemac.Settings');\r
+     *      icssEmacSettings.socType = "am572x";\r
+     * \r
+     */\r
+    metaonly config string socType = "";\r
+\r
+    /*! This flag is used to indicate whether or not the benchmarking code\r
+     * (defined in the profilingHooks class) will be used in the project.\r
+     * Note that a separate library has been compiled and will be used\r
+     * ($NAME).profiling.a($SUFFIX). This is set in the *.cfg file.\r
+     */\r
+    config Bool enableProfiling = false;\r
+       \r
+    /*! This variable is to control the device library type selection.\r
+     * By default this variable is set to release.\r
+     * \r
+     * To use CSL to use the debug/release library, add the following lines to config\r
+     * file and set the library profile accordingly:\r
+     * \r
+     *      var Uart Settings = xdc.useModule ('ti.Uart.Settings');\r
+     *      UartSettings.libProfile = "debug";\r
+     * \r
+     */\r
+    metaonly config string libProfile = "release";     \r
+\r
+}\r
+\r
diff --git a/packages/ti/drv/icss_emac/build/armv7/libicss_emac_aearmv7.mk b/packages/ti/drv/icss_emac/build/armv7/libicss_emac_aearmv7.mk
new file mode 100644 (file)
index 0000000..6fc092a
--- /dev/null
@@ -0,0 +1,95 @@
+#*******************************************************************************
+#* FILE PURPOSE: Lower level makefile for Creating Component Libraries for ARMv7
+#*******************************************************************************
+#* FILE NAME: ./lib/libpruss_aearmv7.mk
+#*
+#* DESCRIPTION: Defines Source Files, Compilers flags and build rules
+#*
+#*******************************************************************************
+#
+
+#
+# Macro definitions referenced below
+#
+empty =
+space =$(empty) $(empty)
+
+# Output for prebuilt generated libraries
+ARMV7LIBDIR ?= ./lib
+ARMV7OBJDIR ?= ./obj
+ARMV7OBJDIR := $(ARMV7OBJDIR)/icss_emac/lib
+ARMV7OBJDIR_SO := $(ARMV7OBJDIR)/icss_emac/lib_so
+ARMV7BINDIR ?= ./bin
+DEBUG_FLAG  ?= -O2
+
+ifdef CROSS_TOOL_INSTALL_PATH
+# Support backwards compatibility with KeyStone1 approach
+ CC = $(CROSS_TOOL_INSTALL_PATH)/$(CROSS_TOOL_PRFX)gcc
+ AC = $(CROSS_TOOL_INSTALL_PATH)/$(CROSS_TOOL_PRFX)as
+ AR = $(CROSS_TOOL_INSTALL_PATH)/$(CROSS_TOOL_PRFX)ar
+ LD = $(CROSS_TOOL_INSTALL_PATH)/$(CROSS_TOOL_PRFX)gcc
+endif
+
+INCS = -I. -I$(strip $(subst ;, -I,$(subst $(space),\$(space),$(INCDIR))))
+
+INTERNALDEFS = -D__ARMv7 -D_LITTLE_ENDIAN=1 -D_VIRTUAL_ADDR_SUPPORT -DMAKEFILE_BUILD $(LDFLAGS) -D__LINUX_USER_SPACE -D${TARGET}
+CFLAGS += $(INTERNALDEFS) $(DEBUG_FLAG)
+
+OBJEXT = o
+INTERNALLINKDEFS =
+SRCDIR = ./src
+
+VPATH=$(SRCDIR)
+
+#List the COMMONSRC Files
+COMMONSRCC = \
+    icss_emacDrv.c \
+    icss_emacFwInit.c \
+    icss_emacLearning.c \
+    icss_emacStatistics.c \
+    icss_emacStormControl.c \
+    icss_emacLoc.c \
+
+# FLAGS for the COMMONSRC Files
+COMMONSRCCFLAGS = $(DEBUG_FLAG) -I$(SRCDIR) -I. -I$(SRCDIR)../../../../
+CFLAGS += $(COMMONSRCCFLAGS)
+
+# Make Rule for the COMMONSRC Files
+COMMONSRCCOBJS = $(patsubst %.c, $(ARMV7OBJDIR)/%.$(OBJEXT), $(COMMONSRCC))
+COMMONSRCCOBJS_SO = $(patsubst %.c, $(ARMV7OBJDIR_SO)/%.$(OBJEXT), $(COMMONSRCC))
+
+$(COMMONSRCCOBJS): $(ARMV7OBJDIR)/%.$(OBJEXT): %.c $(ARMV7OBJDIR)/.created
+       -@echo compiling $< ...
+       @$(CC) -c $(CFLAGS) $(INCS)  $< -o $@
+
+$(COMMONSRCCOBJS_SO): $(ARMV7OBJDIR_SO)/%.$(OBJEXT): %.c $(ARMV7OBJDIR_SO)/.created
+       -@echo compiling $< ...
+       @$(CC) -c $(CFLAGS) -fPIC $(INCS)  $< -o $@
+
+$(ARMV7LIBDIR)/libicss_emac.a: $(COMMONSRCCOBJS) $(ARMV7LIBDIR)/.created
+       @echo archiving $? into $@ ...
+       @$(AR) -r $@ $?
+
+libicss_emac.so: $(COMMONSRCCOBJS_SO)
+       @echo archiving $? into $(ARMV7LIBDIR)/$@.1 ...
+       @$(CC) $(DEBUG_FLAG) -ggdb2 -Wl,-soname=$@.1 -shared -fPIC ${LDFLAGS} -o $@.1.0.0 $^
+       @ln -s $@.1.0.0 $@.1
+       @ln -s $@.1     $@
+       @mv -f $@.1.0.0 $(ARMV7LIBDIR)/$@.1.0.0
+       @mv -f $@.1 $(ARMV7LIBDIR)/$@.1
+       @mv -f $@   $(ARMV7LIBDIR)/$@
+
+$(ARMV7OBJDIR)/.created:
+       @mkdir -p $(ARMV7OBJDIR)
+       @touch $(ARMV7OBJDIR)/.created
+
+$(ARMV7OBJDIR_SO)/.created:
+       @mkdir -p $(ARMV7OBJDIR_SO)
+       @touch $(ARMV7OBJDIR_SO)/.created
+
+$(ARMV7LIBDIR)/.created:
+       @mkdir -p $(ARMV7LIBDIR)
+       @touch $(ARMV7LIBDIR)/.created
+
+clean:
+       @$(RMDIR) $(ARMV7OBJDIR)
diff --git a/packages/ti/drv/icss_emac/build/buildlib.xs b/packages/ti/drv/icss_emac/build/buildlib.xs
new file mode 100644 (file)
index 0000000..a40dd69
--- /dev/null
@@ -0,0 +1,625 @@
+/******************************************************************************
+ * FILE PURPOSE: Build Library Utilities
+ ******************************************************************************
+ * FILE NAME: buildlib.xs
+ *
+ * DESCRIPTION: 
+ *  This file contains common routines that are used by the various LLD
+ *  components.
+ *
+ * Copyright (C) 2014-2016, Texas Instruments, Inc.
+ *****************************************************************************/
+
+/**************************************************************************
+ * FUNCTION NAME : listAllFiles
+ **************************************************************************
+ * DESCRIPTION   :
+ *  Utility function which lists all files with a specific extension 
+ *  present in a directory and any directory inside it.
+ **************************************************************************/
+function listAllFiles(ext, dir, recurse)
+{     
+    var srcFile = [];
+    var d;
+
+    /* If recurse parameter is not specified we default to recursive search. */
+    if (recurse == null)
+        recurse = true;
+
+    if (dir == undefined) 
+          d = ".";
+    else 
+      d = dir;
+
+    /* Get access to the current directory. */
+    var file = new java.io.File(d);
+
+    /* Check if the file exists and it is a directory. */
+    if (file.exists() && file.isDirectory()) 
+    {
+        /* Get a list of all files in the specific directory. */
+        var fileList = file.listFiles();
+        for (var i = 0; i < fileList.length; i++) 
+        {
+            /* Dont add the generated directory 'package' and any of its files 
+             * to the list here. */
+            if (fileList[i].getName().matches("package") == false)
+            {
+                /* Check if the detected file is a directory */
+                if (fileList[i].isDirectory())
+                {
+                    /* We will recurse into the subdirectory only if required to do so. */
+                    if (recurse == true)
+                    {
+                        /* Generate the directory Name in which we will recurse. */ 
+                        var directoryName = d + "/" + fileList[i].getName();
+
+                        /* Get a list of all files in this directory */
+                        var fileListing = listAllFiles (ext, directoryName, recurse);
+                        if (fileListing != null)
+                        {
+                            /* Return a list of all file names in the directory. */
+                            for (var j = 0 ; j < fileListing.length; j++) 
+                                srcFile[srcFile.length++] = fileListing[j];
+                        }
+                    }
+                }
+                else
+                {
+                    /* This was a file. Check if the file name matches the extension */
+                    if (fileList[i].getName().endsWith(ext) == true)
+                        srcFile[srcFile.length++] = d + "/" + fileList[i].getName();
+                }
+            }
+        }
+
+        return srcFile;
+    }
+    return null;
+}
+
+
+function createMake(makefile)
+{
+    /* Create the main make file */
+    var fileModule = xdc.module('xdc.services.io.File');
+    if(makefile==undefined)
+    {
+      try{
+          makefile = fileModule.open("makefile", "w");
+         } catch (ex)
+         {
+           print("makefile cannot be written to. Please check Writing Permissions.");
+           java.lang.System.exit(1);
+         }   
+    
+      Pkg.makePrologue += "\ninclude makefile\n"; 
+         
+      Pkg.makeEpilogue += "\nclean::\n\t-$(RM)  makefile\n";
+      makefile.writeLine("#*******************************************************************************");
+      makefile.writeLine("#* FILE PURPOSE: Top level makefile for Creating Component Libraries");
+      makefile.writeLine("#*******************************************************************************");
+      makefile.writeLine("#* FILE NAME: makefile");
+      makefile.writeLine("#*");
+      makefile.writeLine("#* DESCRIPTION: Defines Compiler tools paths, libraries , Build Options ");
+      makefile.writeLine("#*");
+      makefile.writeLine("#*");
+      makefile.writeLine("#*******************************************************************************");
+      makefile.writeLine("#*");
+      makefile.writeLine("# (Mandatory) Specify where various tools are installed.");
+
+      var file = xdc.module('xdc.services.io.File');
+    
+      
+      makefile.writeLine("\n# Output for prebuilt generated libraries");
+      makefile.writeLine("export LIBDIR ?= ./lib");
+      /* use sectti.exe from path */
+      makefile.writeLine("export SECTTI ?= sectti");
+
+      /* Create INCDIR from XDCPATH */
+    
+      /* copy the environment array from the current environment */
+      var env   = java.lang.System.getenv();
+      var getxdcpath=String(java.lang.System.getenv("XDCPATH"));
+      getxdcpath= getxdcpath.replace(/\\/g,"/");
+      var keys  = env.keySet().toArray();
+      var key;
+      var stat={};
+      var env_j=[];
+      var listxdcpath = new Array();
+      for (var i = 0; i < keys.length; i++) {
+           key = String(keys[i]);
+           if((key.match("INSTALL_PATH")) || (key.match("INSTALLDIR")))
+           {
+             var keyPath=String(env.get(key));
+             keyPath=keyPath.replace(/\\/g,"/");
+             var file = xdc.module('xdc.services.io.File');
+             keyPath=file.getDOSPath(keyPath);
+             if(getxdcpath.toString().match(keyPath))
+             {
+                 listxdcpath.push({keyname: key,keypath: keyPath});
+                 while(getxdcpath.toString().match(keyPath))
+                 {
+                   getxdcpath=getxdcpath.toString().replace(keyPath,"$("+key+")");
+                 }
+             }
+           }
+    
+     }
+       var pkgroot="..";
+       for (var i = Pkg.name.split('.').length; i > 1; i--) {
+              pkgroot+="/..";
+          }
+        
+      makefile.writeLine("\n# ROOT Directory");        
+      makefile.writeLine("export ROOTDIR := "+pkgroot);
+    
+      makefile.writeLine("\n# INCLUDE Directory");
+      makefile.writeLine("export INCDIR := "+getxdcpath+";$(ROOTDIR)");       
+    
+      makefile.writeLine("\n# Common Macros used in make");  
+      makefile.writeLine("\nifndef RM");     
+      makefile.writeLine("export RM = rm -f");
+      makefile.writeLine("endif");        
+    
+      makefile.writeLine("\nifndef CP");     
+      makefile.writeLine("export CP = cp -p");    
+      makefile.writeLine("endif");    
+        
+      makefile.writeLine("\nexport MKDIR = mkdir -p");
+    
+      makefile.writeLine("\nifndef RMDIR");         
+      makefile.writeLine("export RMDIR = rm -rf");
+      makefile.writeLine("endif");        
+    
+      makefile.writeLine("\nifndef SED"); 
+      makefile.writeLine("export SED = sed");    
+      makefile.writeLine("endif");    
+    
+      makefile.writeLine("\nifndef MAKE"); 
+      makefile.writeLine("export MAKE = make");    
+      makefile.writeLine("endif");        
+
+      makefile.writeLine("\n# PHONY Targets");                
+      makefile.writeLine(".PHONY: all clean cleanall ");    
+      
+      makefile.writeLine("\n# FORCE Targets");                
+      makefile.writeLine("FORCE: ");          
+      
+      makefile.writeLine("\n# all rule");                
+      makefile.writeLine("all: .executables");           
+      makefile.writeLine(".executables: .libraries");
+      makefile.writeLine(".libraries:");
+      
+      makefile.writeLine("\n# Clean Rule");          
+      makefile.writeLine("clean:: clean_package");                  
+      makefile.writeLine("# Clean Top Level Object Directory ");          
+      makefile.writeLine("clean_package :\n\t$(RMDIR) $(LIBDIR)/*/");      
+      makefile.writeLine("\t$(RMDIR) package/cfg");            
+   }
+   else
+   {
+     try{
+          makefile = fileModule.open("makefile", "a");
+         } catch (ex)
+         {
+           print("makefile cannot be written to. Please check Writing Permissions.");
+           java.lang.System.exit(1);
+         }  
+    
+    }
+
+ return makefile;
+}
+
+function createLibMake(device, objExtDir, makelibname,targetname, objectPath, useProfiling)
+{
+   var tooldir;
+   var cmdprefix;
+   var targetDir;
+   var stringname=String(targetname).replace("(xdc.bld.ITarget.Module)","");
+   var benchSuffix = "";
+
+   if (useProfiling == true) {
+     benchSuffix = "_bench";
+   }
+
+   switch(stringname)
+   {
+    case String(C66LE):
+      tooldir="C6X_GEN_INSTALL_PATH";
+      cmdprefix="";
+      targetDir="c66/release";
+      targetname=C66LE;
+      break;
+    case String(C66BE):
+      tooldir="C6X_GEN_INSTALL_PATH";
+      cmdprefix="";
+      targetDir="c66/release";
+      targetname=C66BE;
+      break;
+    case String(A15LE):
+      tooldir="TOOLCHAIN_PATH_A15"; 
+      cmdprefix="CROSS_TOOL_PRFX";
+      targetDir="a15/release";
+      targetname=A15LE;
+      break;
+    case String(A9LE):
+      tooldir="TOOLCHAIN_PATH_A9";
+      cmdprefix="CROSS_TOOL_PRFX";
+      targetDir="a9/release";
+      targetname=A9LE;
+      break;
+    case String(A8LE):
+      tooldir="TOOLCHAIN_PATH_A8";
+      cmdprefix="CROSS_TOOL_PRFX";
+      targetDir="a8/release";
+      targetname=A8LE;
+      break;
+    case String(M4LE):
+      tooldir="TOOLCHAIN_PATH_M4";
+      cmdprefix="";
+      targetDir="m4/release";
+      targetname=M4LE;
+      break;
+   }
+   
+    var fileModule = xdc.module('xdc.services.io.File');
+    try{
+     var dstFile = new java.io.File(makelibname);
+     dstFile.getParentFile().mkdirs();    
+     libmakefile = fileModule.open(makelibname, "w");
+     /* Add to Archive list */
+    } catch (ex)
+    {
+     print(makelibname+" cannot be written to. Please check Writing Permissions.");
+     java.lang.System.exit(1);
+    }   
+    libmakefile.writeLine("#*******************************************************************************");
+    libmakefile.writeLine("#* FILE PURPOSE: Lower level makefile for Creating Component Libraries");
+    libmakefile.writeLine("#*******************************************************************************");
+    libmakefile.writeLine("#* FILE NAME: "+makelibname);
+    libmakefile.writeLine("#*");
+    libmakefile.writeLine("#* DESCRIPTION: Defines Source Files, Compilers flags and build rules");
+    libmakefile.writeLine("#*");
+    libmakefile.writeLine("#*");
+    libmakefile.writeLine("#*******************************************************************************");
+    libmakefile.writeLine("#");
+    libmakefile.writeLine("");
+    libmakefile.writeLine("#");
+    libmakefile.writeLine("# Macro definitions referenced below");
+    libmakefile.writeLine("#");
+    libmakefile.writeLine("empty =");
+    libmakefile.writeLine("space =$(empty) $(empty)");
+    
+    if ((targetname.name == "A15F") || (targetname.name == "A9F") || (targetname.name == "A8F"))
+    {
+    
+        if(stringname.match("gnu.targets"))
+        {
+            libmakefile.writeLine("CC = $("+tooldir+")/bin/$("+cmdprefix+")gcc");
+            libmakefile.writeLine("AC = $("+tooldir+")/bin/$("+cmdprefix+")as");    
+            libmakefile.writeLine("ARIN = $("+tooldir+")/bin/$("+cmdprefix+")ar");    
+            libmakefile.writeLine("LD = $("+tooldir+")/bin/$("+cmdprefix+")gcc");   
+        }
+        else
+        {
+            print("Error: Non-GNU targets are not currently supported ");
+            java.lang.System.exit(1);
+
+        }
+       
+        libmakefile.writeLine("INCS = -I. -I$(strip $(subst ;, -I,$(subst $(space),\\$(space),$(INCDIR)))) -I$("+tooldir+")/include");
+        libmakefile.writeLine("OBJEXT = o"+targetname.suffix); 
+        libmakefile.writeLine("AOBJEXT = s"+targetname.suffix);     
+        if (useProfiling == true){
+            libmakefile.writeLine("CFLAGS_INTERNAL = " +targetname.ccOpts.prefix+" "+targetname.cc.opts+" -finstrument-functions -gdwarf-3 -g -D_ENABLE_BM");
+        }else{
+            libmakefile.writeLine("CFLAGS_INTERNAL = " +targetname.ccOpts.prefix+" "+targetname.cc.opts);
+        }
+        libmakefile.writeLine("ASFLAGS_INTERNAL = " +targetname.asmOpts.prefix+" "+targetname.asm.opts);
+        libmakefile.writeLine("ARFLAGS_INTERNAL = " +targetname.ar.opts);
+        libmakefile.writeLine("LNKFLAGS_INTERNAL = " +targetname.lnk.opts);
+        libmakefile.writeLine("INTERNALDEFS = -MD -MF $@.dep");
+        libmakefile.writeLine("INTERNALLINKDEFS = -o $@ -m $@.map");  /* TBD */
+        libmakefile.writeLine("OBJDIR =  ./obj/obj_" +targetname.suffix +"/" + device.toString() + "/" + targetDir +"/obj" + "/" + objExtDir + benchSuffix); 
+    
+    }
+    else
+    {
+  
+        if(stringname.match("ti.targets"))
+        {
+
+            var rtslibtemp = targetname.lnkOpts.suffix.toString().split("/");
+            var rtslib;
+            for(n=0;n<rtslibtemp.length;n++)
+            {
+                if(rtslibtemp[n].match(".lib"))
+                { 
+                    rtslib=rtslibtemp[n];
+                }
+            }
+
+            libmakefile.writeLine("CC = $("+tooldir+")/bin/"+targetname.cc.cmd);
+            libmakefile.writeLine("AC = $("+tooldir+")/bin/"+targetname.asm.cmd);    
+            libmakefile.writeLine("ARIN = $("+tooldir+")/bin/"+targetname.ar.cmd);    
+            libmakefile.writeLine("LD = $("+tooldir+")/bin/"+targetname.lnk.cmd);   
+            libmakefile.writeLine("RTSLIB = -l $("+tooldir+")/lib/"+rtslib);        
+        }
+        else
+        {
+            print("Error: Non-TI targets are not currently supported ");
+            java.lang.System.exit(1);
+
+        }
+       
+        libmakefile.writeLine("INCS = -I. -I$(strip $(subst ;, -I,$(subst $(space),\\$(space),$(INCDIR)))) -I$("+tooldir+")/include");
+        libmakefile.writeLine("OBJEXT = o"+targetname.suffix); 
+        libmakefile.writeLine("AOBJEXT = s"+targetname.suffix);     
+        if (useProfiling == true){
+            libmakefile.writeLine("CFLAGS_INTERNAL = " +targetname.ccOpts.prefix+" "+targetname.cc.opts+" --entry_parm=address --exit_hook=ti_utils_exit --exit_parm=address --entry_hook=ti_utils_entry -g -D_ENABLE_BM");
+        }else{
+            libmakefile.writeLine("CFLAGS_INTERNAL = " +targetname.ccOpts.prefix+" "+targetname.cc.opts);
+        }
+        libmakefile.writeLine("ASFLAGS_INTERNAL = " +targetname.asmOpts.prefix+" "+targetname.asm.opts);
+        libmakefile.writeLine("ARFLAGS_INTERNAL = " +targetname.ar.opts);
+        libmakefile.writeLine("LNKFLAGS_INTERNAL = " +targetname.lnk.opts);
+        /* libmakefile.writeLine("INTERNALDEFS = -D"+stringname.replace(/\./g,"_")+" -Dxdc_target_types__=ti/targets/std.h -DMAKEFILE_BUILD -eo.$(OBJEXT) -ea.$(AOBJEXT) -fr=$(@D) -fs=$(@D) -ppa -ppd=$@.dep");*/
+        libmakefile.writeLine("INTERNALDEFS = -D"+stringname.replace(/\./g,"_")+"  -DMAKEFILE_BUILD -eo.$(OBJEXT) -ea.$(AOBJEXT) -fr=$(@D) -fs=$(@D) -ppa -ppd=$@.dep");
+        libmakefile.writeLine("INTERNALLINKDEFS = -o $@ -m $@.map");
+        libmakefile.writeLine("OBJDIR =  ./obj/obj_" +targetname.suffix +"/" + device.toString() + "/" + targetDir +"/obj" + "/" + objExtDir + benchSuffix); 
+    }
+   
+ return libmakefile;
+
+}
+
+function makeAddObjects(srcString, makefilename, srcfiles, flags,fileExt, targetName, objDir)
+{
+  var  sourcestring = (srcString + fileExt).toString().toUpperCase();
+  var  compileflagstring = sourcestring + "FLAGS";
+  var  objectliststring = sourcestring + "OBJS";
+  /* List all the source files */
+  makefilename.writeLine("\n#List the "+srcString+" Files");  
+  makefilename.writeLine(sourcestring + "= \\");
+  for(var i=0;i<srcfiles.length-1;i++)
+  {
+    makefilename.writeLine("    "+srcfiles[i]+"\\");
+  }
+    makefilename.writeLine("    "+srcfiles[i]+"\n");
+    
+ /* Flags for the source files */
+ makefilename.writeLine("# FLAGS for the "+srcString+" Files"); 
+ var compileflags="";
+ if(fileExt == "asm" && flags.aopts != undefined)
+ {
+   compileflags+=" "+flags.aopts;
+ }
+ else if((fileExt == "c" || fileExt == "sa")&& flags.copts != undefined)
+ {
+   compileflags+=" "+flags.copts;
+ } 
+
+ if(flags.incs != undefined)
+ {
+   compileflags+=" "+flags.incs;
+ }
+
+
+ makefilename.writeLine(compileflagstring+" = "+compileflags +" \n");     
+ makefilename.writeLine("# Make Rule for the "+srcString+" Files");  
+ makefilename.writeLine(objectliststring +" = $(patsubst %."+fileExt+", "+objDir+"/%.$(OBJEXT), $(" + sourcestring + "))"); 
+ makefilename.writeLine("\n$("+objectliststring+"): "+objDir+"/%.$(OBJEXT): %."+fileExt);   
+ if(fileExt == "c")
+ { 
+   makefilename.writeLine("\t-@echo cl"+targetName.suffix +" $< ...");     
+ }
+ else
+ {
+   makefilename.writeLine("\t-@echo asm"+targetName.suffix +" $< ...");      
+ }
+ makefilename.writeLine("\tif [ ! -d $(@D) ]; then $(MKDIR) $(@D) ; fi;");           
+ if(fileExt == "c")
+ {
+   if ((targetName.name == "A15F") || (targetName.name == "A9F") || (targetName.name == "A8F"))
+   {
+    makefilename.writeLine("\t$(RM) $@.dep");
+    makefilename.writeLine("\t$(CC) $(CFLAGS_INTERNAL) $("+compileflagstring+") $(INTERNALDEFS) $(INCS) $< -o $@");
+   /* 
+    TBD
+   */
+   }
+   else
+   {
+    makefilename.writeLine("\t$(RM) $@.dep");
+    makefilename.writeLine("\t$(CC) $(CFLAGS_INTERNAL) $("+compileflagstring+") $(INTERNALDEFS) $(INCS) -fc $< ");
+    makefilename.writeLine("\t-@$(CP) $@.dep $@.pp; \\");
+    makefilename.writeLine("         $(SED) -e 's/#.*//' -e 's/^[^:]*: *//' -e 's/ *\\\\$$//' \\");
+    makefilename.writeLine("             -e '/^$$/ d' -e 's/$$/ :/' < $@.pp >> $@.dep; \\");
+    makefilename.writeLine("         $(RM) $@.pp ");
+   }
+ }
+ else if(fileExt == "asm")
+ {
+   makefilename.writeLine("\t$(AC) $(ASFLAGS_INTERNAL) $("+compileflagstring+") $(INTERNALDEFS) $(INCS) -fa $< ");
+ }
+ else if(fileExt == "sa")
+ {
+   makefilename.writeLine("\t$(AC) $(ASFLAGS_INTERNAL) $("+compileflagstring+") $(INTERNALDEFS) $(INCS) $< ");
+ }
+ makefilename.writeLine("\n#Create Empty rule for dependency");
+ makefilename.writeLine("$("+objectliststring+"):"+makefilename.$private.fd);
+ makefilename.writeLine(makefilename.$private.fd+":");
+ makefilename.writeLine("\n#Include Depedency for "+srcString+" Files");
+ makefilename.writeLine("ifneq (clean,$(MAKECMDGOALS))");
+ makefilename.writeLine(" -include $("+objectliststring+":%.$(OBJEXT)=%.$(OBJEXT).dep)");
+ makefilename.writeLine("endif");
+}
+
+/**************************************************************************
+ * FUNCTION NAME : buildLibrary
+ **************************************************************************
+ * DESCRIPTION   :
+ *  Utility function which will build a specific library
+ **************************************************************************/
+var makefilelocal;
+function buildLibrary (socName, isDmaSoc, isSoc, libOptions, libName, target, libFiles, useProfiling) 
+{
+    var targetDir;
+    var objExtDir;
+    
+    if (useProfiling == true)
+    {
+        libName += ".profiling"
+    }
+
+    if (target.name == "A15F")
+    {
+        targetDir = "a15/release";
+    }
+    else if (target.name == "A9F")
+    {
+        targetDir = "a9/release";
+    }
+    else if (target.name == "A8F")
+    {
+        targetDir = "a8/release";
+    }
+    else if (target.name == "M4")
+    {
+        targetDir = "m4/release";
+    }
+    else
+    {
+        targetDir = "c66/release";
+    }
+    
+    /* Derive the operating system and soc names */
+    if (isSoc == "true") {
+        var libNameExp = libName;
+        targetDir = socName+"/"+targetDir;
+        objExtDir = "soc";
+    }
+    else  {
+        var libNameExp = libName;
+        objExtDir = "all";
+    }
+
+    var lldFullLibraryPath = "./lib/" + targetDir +"/" + libNameExp;
+    var lldFullBuildPath = "./build/" + targetDir +"/" + libNameExp;
+    var lldFullLibraryPathMake = "$(LIBDIR)/" + targetDir +"/" + libNameExp;
+
+    /* Create Main make file in the root of package folder */
+    makefilelocal = createMake(makefilelocal);
+
+    /* Write the rule to make library in main makefile */
+    lib = lldFullBuildPath+".a"+target.suffix;
+    libMake = lldFullLibraryPathMake+".a"+target.suffix;
+    var objectPath= "./package/"+lldFullBuildPath;
+  
+    makefilelocal.writeLine("\n\n# Make rule to create "+libMake+" library");
+    makefilelocal.writeLine(".libraries: "+ libMake);
+    makefilelocal.writeLine(libMake+": FORCE\n\t$(MAKE) -f "+lib+".mk $@");                                 
+
+    /* Create Library make file in the lib folder */
+    var makefilelib= createLibMake(socName, objExtDir, lib+".mk",target,objectPath,useProfiling);  
+
+    /* Rule to clean library in main makefile */
+    makefilelocal.writeLine("# Rule to clean "+libMake+" library");                                              
+    makefilelocal.writeLine("clean ::\n\t$(RM) "+ libMake);                                          
+    librule="\n\n"+libMake+" :";
+
+    /* Add files to be compiled */
+    /* Separate out the C and assembly files */
+    var cfiles= new Array();
+    var afiles= new Array();
+    var safiles= new Array();
+    for each(var srcFile in libFiles)
+    {
+        var srcFile=String(srcFile);
+        var dot = srcFile.lastIndexOf(".");
+        var extension = srcFile.substr(dot,srcFile.length);      
+        if(extension == ".c")
+        {
+            cfiles.push(srcFile);
+        }
+        else if(extension == ".sa")
+        {
+            safiles.push(srcFile);
+        }
+        else if(extension == ".asm")
+        {
+            afiles.push(srcFile);
+        }
+        else
+        {
+            print("ERROR: Unsupported file extension");
+            java.lang.System.exit(1);
+        }
+    }
+    if(cfiles.length > 0)
+    {                                                
+      makeAddObjects("COMMONSRC",makefilelib,cfiles,libOptions,"c",target, "$(OBJDIR)");
+      librule += " $(COMMONSRCCOBJS)";                   
+    }
+    if(afiles.length > 0)
+    {                                                
+      makeAddObjects("COMMONSRC",makefilelib,afiles,libOptions,"asm",target, "$(OBJDIR)");
+      librule += " $(COMMONSRCASMOBJS)";                   
+    }
+    if(safiles.length > 0)
+    {                                                
+      makeAddObjects("COMMONSRC",makefilelib,safiles,libOptions,"sa",target, "$(OBJDIR)");
+      librule += " $(COMMONSRCSAOBJS)";                   
+    }
+
+    makefilelib.writeLine(librule);
+    makefilelib.writeLine("\t@echo archiving $? into $@ ...");
+    makefilelib.writeLine("\tif [ ! -d $(LIBDIR)/"+targetDir+" ]; then $(MKDIR) $(LIBDIR)/"+targetDir+" ; fi;"); 
+       makefilelib.writeLine("\t$(ARIN) $(ARFLAGS_INTERNAL) $@ $?");
+       makefilelib.close();   
+
+    /* Create the Epilogue; which executes after all the builds are completed. 
+     * This is used to generate the benchmark information for the built library. 
+     * Also add the benchmarking information file to the package. */
+    /* Put the temp file in object directory since javascript doesn't have a built in tmpname, 
+     * and don't want --jobs=# with # > 1 to result in collisions */
+    var libFullName = lldFullLibraryPath + ".a" + target.suffix;
+    var tempFile = libFullName + ".xml";
+    Pkg.makeEpilogue += ".libraries: " + libFullName +  "_size.txt\n";
+    Pkg.makeEpilogue += libFullName +  "_size.txt: " + libFullName + "\n";
+    if ( java.lang.String(target.name).contains('66') )
+    {    
+        Pkg.makeEpilogue += "\n\t $(C6X_GEN_INSTALL_PATH)/bin/ofd6x -x " + libFullName + " > " + tempFile;
+        Pkg.makeEpilogue += "\n\t $(SECTTI) " + tempFile + " > " + libFullName +  "_size.txt";
+        Pkg.makeEpilogue += "\n\t $(RM) " + tempFile + "\n\n";
+    }   
+    else if (target.name == "M4")
+    {
+        Pkg.makeEpilogue += "\n\t $(TOOLCHAIN_PATH_M4)/bin/armofd -x " + libFullName + " > " + tempFile;
+        Pkg.makeEpilogue += "\n\t $(SECTTI) " + tempFile + " > " + libFullName +  "_size.txt";
+        Pkg.makeEpilogue += "\n\t $(RM) " + tempFile + "\n\n";
+    }
+    else
+    {
+        Pkg.makeEpilogue += "\n\t $(TOOLCHAIN_PATH_A15)/bin/$(CROSS_TOOL_PRFX)size " + libFullName + " > " + libFullName + "_size.txt";
+    }                
+    Pkg.otherFiles[Pkg.otherFiles.length++] = lldFullLibraryPath + ".a" + target.suffix + "_size.txt";
+    Pkg.otherFiles[Pkg.otherFiles.length++] = lldFullBuildPath + ".a" + target.suffix + ".mk";
+    Pkg.otherFiles[Pkg.otherFiles.length++] = lldFullLibraryPath + ".a" + target.suffix;
+
+    /* We need to clean after ourselves; extend the 'clean' target to take care of this. */
+    Pkg.makeEpilogue += "\nclean::\n";
+    Pkg.makeEpilogue += "\t$(RM) " + lldFullBuildPath + ".a" + target.suffix + "_size.txt\n"; 
+    Pkg.makeEpilogue += "\t$(RMDIR) " + "$(LIBDIR)/" + targetDir + "/ \n\n";
+
+    return lib;
+}
+
+
+
diff --git a/packages/ti/drv/icss_emac/build/makefile.mk b/packages/ti/drv/icss_emac/build/makefile.mk
new file mode 100644 (file)
index 0000000..3f4eafb
--- /dev/null
@@ -0,0 +1,64 @@
+#
+# Copyright (c) 2016, Texas Instruments Incorporated
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# *  Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+#
+# *  Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in the
+#    documentation and/or other materials provided with the distribution.
+#
+# *  Neither the name of Texas Instruments Incorporated nor the names of
+#    its contributors may be used to endorse or promote products derived
+#    from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+# CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+# PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+# OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+# WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+# OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+# EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+
+include $(PDK_INSTALL_PATH)/ti/build/Rules.make
+include $(PDK_ICSS_EMAC_COMP_PATH)/src/src_files_common.mk
+
+MODULE_NAME = icss_emac
+
+ifeq ($(SOC),$(filter $(SOC), am571x am572x am574x am437x am335x k2g))
+SRCDIR += soc/$(SOC)
+INCDIR += soc
+# Common source files across all platforms and cores
+  SRCS_COMMON += icss_emacSoc.c
+endif
+
+# List all the external components/interfaces, whose interface header files
+#  need to be included for this component
+INCLUDE_EXTERNAL_INTERFACES = pdk
+                      
+ifeq ($(SOC),$(filter $(SOC), am571x am572x am574x am437x am335x k2g))
+PACKAGE_SRCS_COMMON += soc/$(SOC)
+endif
+
+CFLAGS_LOCAL_COMMON = $(PDK_CFLAGS)
+
+# Include common make files
+ifeq ($(MAKERULEDIR), )
+#Makerule path not defined, define this and assume relative path from ROOTDIR
+  MAKERULEDIR := $(ROOTDIR)/ti/build/makerules
+  export MAKERULEDIR
+endif
+include $(MAKERULEDIR)/common.mk
+
+# Nothing beyond this point
+
diff --git a/packages/ti/drv/icss_emac/build/makefile_icss_dualemac.mk b/packages/ti/drv/icss_emac/build/makefile_icss_dualemac.mk
new file mode 100644 (file)
index 0000000..c59fb8c
--- /dev/null
@@ -0,0 +1,63 @@
+# Copyright (c) 2017, Texas Instruments Incorporated
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# *  Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+#
+# *  Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in the
+#    documentation and/or other materials provided with the distribution.
+#
+# *  Neither the name of Texas Instruments Incorporated nor the names of
+#    its contributors may be used to endorse or promote products derived
+#    from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+# CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+# PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+# OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+# WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+# OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+# EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+
+include $(PDK_INSTALL_PATH)/ti/build/Rules.make
+
+MODULE_NAME = icss_dualemac
+
+SRCDIR += src/
+INCDIR += src/
+# Common source files across all platforms and cores
+SRCS_COMMON += resource_table.c
+SRCS_ASM_COMMON += micro_scheduler.asm emac_MII_Rcv.asm emac_MII_Xmt.asm emac_statistics.asm emac_tts.asm emac_ptp.asm
+
+LNKFLAGS_LOCAL_COMMON = --entry_point=micro_scheduler
+
+LNKCMD_FILE = $($(MODULE_NAME)_PATH)/src/pru.cmd
+
+PACKAGE_SRCS_COMMON += src/ build/makefile_icss_dualemac.mk
+
+# List all the external components/interfaces, whose interface header files
+#  need to be included for this component
+INCLUDE_EXTERNAL_INTERFACES =
+                      
+CFLAGS_LOCAL_COMMON = $(PDK_CFLAGS) -DICSS_DUAL_EMAC_BUILD -DPRU -DTTS -DHALF_DUPLEX_ENABLED -DPTP
+
+# Include common make files
+ifeq ($(MAKERULEDIR), )
+#Makerule path not defined, define this and assume relative path from ROOTDIR
+  MAKERULEDIR := $(ROOTDIR)/ti/build/makerules
+  export MAKERULEDIR
+endif
+include $(MAKERULEDIR)/common.mk
+
+# Nothing beyond this point
+
diff --git a/packages/ti/drv/icss_emac/build/makefile_icss_switch.mk b/packages/ti/drv/icss_emac/build/makefile_icss_switch.mk
new file mode 100644 (file)
index 0000000..6356a12
--- /dev/null
@@ -0,0 +1,62 @@
+# Copyright (c) 2017, Texas Instruments Incorporated
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# *  Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+#
+# *  Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in the
+#    documentation and/or other materials provided with the distribution.
+#
+# *  Neither the name of Texas Instruments Incorporated nor the names of
+#    its contributors may be used to endorse or promote products derived
+#    from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+# CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+# PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+# OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+# WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+# OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+# EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+
+include $(PDK_INSTALL_PATH)/ti/build/Rules.make
+
+MODULE_NAME = icss_switch
+
+SRCDIR += src/ $(icss_dualemac_PATH)/src
+INCDIR += src/ $(icss_dualemac_PATH)/src
+# Common source files across all platforms and cores
+SRCS_ASM_COMMON += micro_scheduler.asm emac_MII_Rcv.asm emac_MII_Xmt.asm emac_statistics.asm switch_collision_task.asm
+
+LNKFLAGS_LOCAL_COMMON = --entry_point=micro_scheduler
+
+LNKCMD_FILE = $(icss_dualemac_PATH)/src/pru.cmd
+
+PACKAGE_SRCS_COMMON += src/ ../firmware/icss_dualemac/src build/makefile_icss_switch.mk
+
+# List all the external components/interfaces, whose interface header files
+#  need to be included for this component
+INCLUDE_EXTERNAL_INTERFACES =
+                      
+CFLAGS_LOCAL_COMMON = $(PDK_CFLAGS) -DICSS_SWITCH_BUILD -DPRU -DTWO_PORT_CFG
+
+# Include common make files
+ifeq ($(MAKERULEDIR), )
+#Makerule path not defined, define this and assume relative path from ROOTDIR
+  MAKERULEDIR := $(ROOTDIR)/ti/build/makerules
+  export MAKERULEDIR
+endif
+include $(MAKERULEDIR)/common.mk
+
+# Nothing beyond this point
+
diff --git a/packages/ti/drv/icss_emac/build/makefile_indp.mk b/packages/ti/drv/icss_emac/build/makefile_indp.mk
new file mode 100644 (file)
index 0000000..77b764f
--- /dev/null
@@ -0,0 +1,53 @@
+#
+# Copyright (c) 2016, Texas Instruments Incorporated
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# *  Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+#
+# *  Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in the
+#    documentation and/or other materials provided with the distribution.
+#
+# *  Neither the name of Texas Instruments Incorporated nor the names of
+#    its contributors may be used to endorse or promote products derived
+#    from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+# CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+# PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+# OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+# WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+# OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+# EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+
+include $(PDK_INSTALL_PATH)/ti/build/Rules.make
+include $(PDK_ICSS_EMAC_COMP_PATH)/src/src_files_common.mk
+
+MODULE_NAME = icss_emac_indp
+
+# List all the external components/interfaces, whose interface header files
+#  need to be included for this component
+INCLUDE_EXTERNAL_INTERFACES = pdk edma
+
+CFLAGS_LOCAL_COMMON = $(PDK_CFLAGS)
+
+# Include common make files
+ifeq ($(MAKERULEDIR), )
+#Makerule path not defined, define this and assume relative path from ROOTDIR
+  MAKERULEDIR := $(ROOTDIR)/ti/build/makerules
+  export MAKERULEDIR
+endif
+include $(MAKERULEDIR)/common.mk
+
+# Nothing beyond this point
+
diff --git a/packages/ti/drv/icss_emac/build/makefile_profile.mk b/packages/ti/drv/icss_emac/build/makefile_profile.mk
new file mode 100644 (file)
index 0000000..5512d54
--- /dev/null
@@ -0,0 +1,70 @@
+#
+# Copyright (c) 2016, Texas Instruments Incorporated
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# *  Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+#
+# *  Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in the
+#    documentation and/or other materials provided with the distribution.
+#
+# *  Neither the name of Texas Instruments Incorporated nor the names of
+#    its contributors may be used to endorse or promote products derived
+#    from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+# CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+# PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+# OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+# WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+# OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+# EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+
+include $(PDK_INSTALL_PATH)/ti/build/Rules.make
+include $(PDK_ICSS_EMAC_COMP_PATH)/src/src_files_common.mk
+
+MODULE_NAME = icss_emac_profile
+
+ifeq ($(SOC),$(filter $(SOC), am571x am572x am574x am437x am335x k2g))
+SRCDIR += soc/$(SOC)
+INCDIR += soc
+# Common source files across all platforms and cores
+  SRCS_COMMON += icss_emacSoc.c
+endif
+
+# List all the external components/interfaces, whose interface header files
+#  need to be included for this component
+INCLUDE_EXTERNAL_INTERFACES = pdk
+                      
+ifeq ($(SOC),$(filter $(SOC), am571x am572x am574x am437x am335x k2g))
+PACKAGE_SRCS_COMMON += soc/$(SOC)
+endif
+
+ifeq ($(BUILDTYPE),$(filter $(BUILDTYPE), profile profiledma))
+  ifeq ($(CORE),$(filter $(CORE), a15_0 a9host a8host))
+    CFLAGS_LOCAL_COMMON = $(PDK_CFLAGS) -finstrument-functions -gdwarf-3 -g -D_ENABLE_BM
+  else
+    CFLAGS_LOCAL_COMMON = $(PDK_CFLAGS) --entry_parm=address --exit_hook=ti_utils_exit --exit_parm=address --entry_hook=ti_utils_entry -g -D_ENABLE_BM
+  endif
+endif
+
+# Include common make files
+ifeq ($(MAKERULEDIR), )
+#Makerule path not defined, define this and assume relative path from ROOTDIR
+  MAKERULEDIR := $(ROOTDIR)/ti/build/makerules
+  export MAKERULEDIR
+endif
+include $(MAKERULEDIR)/common.mk
+
+# Nothing beyond this point
+
diff --git a/packages/ti/drv/icss_emac/build/makefile_profile_indp.mk b/packages/ti/drv/icss_emac/build/makefile_profile_indp.mk
new file mode 100644 (file)
index 0000000..147747b
--- /dev/null
@@ -0,0 +1,59 @@
+#
+# Copyright (c) 2016, Texas Instruments Incorporated
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# *  Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+#
+# *  Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in the
+#    documentation and/or other materials provided with the distribution.
+#
+# *  Neither the name of Texas Instruments Incorporated nor the names of
+#    its contributors may be used to endorse or promote products derived
+#    from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+# CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+# PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+# OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+# WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+# OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+# EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+
+include $(PDK_INSTALL_PATH)/ti/build/Rules.make
+include $(PDK_ICSS_EMAC_COMP_PATH)/src/src_files_common.mk
+
+MODULE_NAME = icss_emac_profile_indp
+
+# List all the external components/interfaces, whose interface header files
+#  need to be included for this component
+INCLUDE_EXTERNAL_INTERFACES = pdk edma
+
+ifeq ($(BUILDTYPE),$(filter $(BUILDTYPE), profile profiledma))
+  ifeq ($(CORE),$(filter $(CORE), a15_0 a9host a8host))
+    CFLAGS_LOCAL_COMMON = $(PDK_CFLAGS) -finstrument-functions -gdwarf-3 -g -D_ENABLE_BM
+  else
+    CFLAGS_LOCAL_COMMON = $(PDK_CFLAGS) --entry_parm=address --exit_hook=ti_utils_exit --exit_parm=address --entry_hook=ti_utils_entry -g -D_ENABLE_BM
+  endif
+endif
+
+# Include common make files
+ifeq ($(MAKERULEDIR), )
+#Makerule path not defined, define this and assume relative path from ROOTDIR
+  MAKERULEDIR := $(ROOTDIR)/ti/build/makerules
+  export MAKERULEDIR
+endif
+include $(MAKERULEDIR)/common.mk
+
+# Nothing beyond this point
+
diff --git a/packages/ti/drv/icss_emac/config.bld b/packages/ti/drv/icss_emac/config.bld
new file mode 100644 (file)
index 0000000..ebcbe4d
--- /dev/null
@@ -0,0 +1,245 @@
+/******************************************************************************
+ * FILE PURPOSE: Build configuration Script for the icss_emac Driver
+ ******************************************************************************
+ * FILE NAME: config.bld
+ *
+ * DESCRIPTION: 
+ *  This file contains the build configuration script for the icss_emac driver
+ *  and is responsible for configuration of the paths for the various 
+ *  tools required to build the driver.
+ *
+ * Copyright (C) 2014-2016, Texas Instruments, Inc.
+ *****************************************************************************/
+
+/* Get the Tools Base directory from the Environment Variable. */
+var c66ToolsBaseDir = java.lang.System.getenv("C6X_GEN_INSTALL_PATH");
+var m4ToolsBaseDir  = java.lang.System.getenv("TOOLCHAIN_PATH_M4");
+var a15ToolsBaseDir = java.lang.System.getenv("TOOLCHAIN_PATH_A15");
+var a9ToolsBaseDir  = java.lang.System.getenv("TOOLCHAIN_PATH_A9");
+var a8ToolsBaseDir  = java.lang.System.getenv("TOOLCHAIN_PATH_A8");
+
+/* Get the extended debug flags for C66x, 
+ * did not change the name for backwards compatibilty */
+var extDbgFlags = java.lang.System.getenv("EXTDBGFLAGS");
+
+/* Get the extended debug flags for A15 */
+var extDbgFlags_a15 = java.lang.System.getenv("EXTDBGFLAGS_A15");
+
+/* Get the extended debug flags for A8 */
+var extDbgFlags_a8 = java.lang.System.getenv("EXTDBGFLAGS_A8");
+
+/* Get the extended debug flags for A9 */
+var extDbgFlags_a9 = java.lang.System.getenv("EXTDBGFLAGS_A9");
+
+/* Get the extended debug flags for M4 */
+var extDbgFlags_m4 = java.lang.System.getenv("EXTDBGFLAGS_M4");
+
+/* Get the base directory for the icss_emac Socket Driver Package */
+var driverPath = new java.io.File(".//").getPath();
+
+/* Read the part number from the environment variable. */
+var LLDPartNumber = java.lang.System.getenv("PARTNO");
+
+/* Include Path */
+var lldIncludePath = " -I" + driverPath + "/src" + " -I" + driverPath;
+
+/* Configure the icss_emac Socket Release Version Information */
+/* 3 steps: remove SPACE and TAB, convert to string and split to make array */
+var driverReleaseVersion = (""+Pkg.version.replace(/\s/g, "")).split(',');
+
+/* Print the Compiler Options */
+var pOpts = 1;
+
+/* C66 ELF compiler configuration for Little Endian Mode. */
+var C66LE           = xdc.useModule('ti.targets.elf.C66');
+C66LE.rootDir       = c66ToolsBaseDir;
+C66LE.ccOpts.prefix = "-mo -o3 -q -k -eo.o -DMEM_BARRIER_DISABLE";
+if(extDbgFlags)     
+    C66LE.ccOpts.prefix = C66LE.ccOpts.prefix + " " + extDbgFlags; 
+
+/* C66 ELF compiler configuration for Big Endian Mode. */
+var C66BE           = xdc.useModule('ti.targets.elf.C66_big_endian');
+C66BE.rootDir       = c66ToolsBaseDir;
+C66BE.ccOpts.prefix = "-mo -o3 -q -k -eo.o -DBIGENDIAN -DMEM_BARRIER_DISABLE";
+if(extDbgFlags)     
+    C66BE.ccOpts.prefix = C66BE.ccOpts.prefix + " " + extDbgFlags;
+
+/* ARMv7 A15 compiler configuration */
+var A15LE            = xdc.useModule('gnu.targets.arm.A15F');
+A15LE.rootDir        = a15ToolsBaseDir;
+A15LE.ccOpts.prefix  = "-mno-unaligned-access -c -mtune=cortex-a15 -marm -DDRA7xx -g -gstrict-dwarf -Wall -D__ARMv7 -D_LITTLE_ENDIAN=1";
+if(extDbgFlags_a15)     
+    A15LE.ccOpts.prefix = A15LE.ccOpts.prefix + " " + extDbgFlags_a15; 
+
+/* M4 ELF compiler configuration for Little Endian Mode. */
+var M4LE            = xdc.useModule('ti.targets.arm.elf.M4');
+M4LE.rootDir        = m4ToolsBaseDir;
+M4LE.ccOpts.prefix  = "-o4 -qq -pdsw255 -DMAKEFILE_BUILD";
+if(extDbgFlags_m4)
+    M4LE.ccOpts.prefix = M4LE.ccOpts.prefix + " " + extDbgFlags_m4; 
+
+/* ARMv7 A9 compiler configuration */
+var A9LE            = xdc.useModule('gnu.targets.arm.A9F');
+A9LE.rootDir        = a9ToolsBaseDir;
+A9LE.ccOpts.prefix  = "-mno-unaligned-access -c -mtune=cortex-a9 -marm -g -gstrict-dwarf -Wall -D__ARMv7 -D_LITTLE_ENDIAN=1";
+if(extDbgFlags_a9)     
+    A9LE.ccOpts.prefix = A9LE.ccOpts.prefix + " " + extDbgFlags_a9; 
+
+/* ARMv7 A8 compiler configuration */
+var A8LE            = xdc.useModule('gnu.targets.arm.A8F');
+A8LE.rootDir        = a8ToolsBaseDir;
+A8LE.ccOpts.prefix  = "-mno-unaligned-access -c -mtune=cortex-a8 -marm -g -gstrict-dwarf -Wall -D__ARMv7 -D_LITTLE_ENDIAN=1";
+if(extDbgFlags_a8)     
+    A8LE.ccOpts.prefix = A8LE.ccOpts.prefix + " " + extDbgFlags_a8; 
+/* soc name (am?) is inserted between first an second element of this
+   list to construct device file name for each device */
+var deviceConstruct = [ "soc/", "/icss_emacSoc.c" ];
+
+
+/* Create the SoC List  */
+var socs = { 
+    /* device independent libraries */
+    all :
+    {
+        /* Build this library */
+        build: "true",
+        /* SoC lib enabled */
+        socDevLib: "false",
+        /* Library options */
+        copts: "",
+        /* target lists, kept blank now, would be updated based on argument lists */
+        targets: []
+    },
+    am335x :
+    {
+        /* this variable would be reinitialized to true, if XDCARGS contains am335x */
+        build: "false",
+        /* SoC lib enabled */
+        socDevLib: "true",
+        /* Library options */
+        copts: " -DSOC_AM335x",
+        /* target list */
+        targets: [ A8LE ]
+    },
+    am437x :
+    {
+        /* this variable would be reinitialized to true, if XDCARGS contains am437x */
+        build: "false",       
+        /* SoC lib enabled */
+        socDevLib: "true",
+        /* Library options */
+        copts: " -DSOC_AM437x",
+        /* target list */
+        targets: [ A9LE ]
+   },
+   am572x :
+    {
+        /* this variable would be reinitialized to true, if XDCARGS contains am572x */
+        build: "false", 
+       /* SoC lib enabled */
+       socDevLib: "true",
+       /* Library options */
+       copts: " -DSOC_AM572x",
+       /* target list */
+       targets: [ C66LE, M4LE, A15LE]
+    },
+   am574x :
+    {
+       /* this variable would be reinitialized to true, if XDCARGS contains am574x */
+       build: "false",
+       /* SoC lib enabled */
+       socDevLib: "true",
+       /* Library options */
+       copts: " -DSOC_AM574x",
+       /* target list */
+       targets: [ C66LE, M4LE, A15LE]
+    },
+   am571x :
+    {
+        /* this variable would be reinitialized to true, if XDCARGS contains am571x */
+        build: "false",     
+       /* SoC lib enabled */
+       socDevLib: "true",
+       /* Library options */
+       copts: " -DSOC_AM571x",
+       /* target list */
+       targets: [ C66LE, M4LE, A15LE]
+    },
+    k2g :
+    {
+        /* this variable would be reinitialized to true, if XDCARGS contains am571x */
+        build: "false",     
+       /* SoC lib enabled */
+       socDevLib: "true",
+       /* Library options */
+       copts: " -DSOC_K2G",
+       /* target list */
+       targets: [ C66LE, A15LE]
+    }    
+};
+
+/**************************************************************************
+ * FUNCTION NAME : merge
+ **************************************************************************
+ * DESCRIPTION   :
+ *  The function is used to merge two arrarys
+ **************************************************************************/
+function merge() {
+    var args = arguments;
+    var hash = {};
+    var arr = [];
+    for (var i = 0; i < args.length; i++) {
+       for (var j = 0; j < args[i].length; j++) {
+         if (hash[args[i][j]] !== true) {
+           arr[arr.length] = args[i][j];
+           hash[args[i][j]] = true;
+         }
+       }
+     }
+    return arr;
+}
+
+/* Grab input from XDCARGS */
+var buildArguments  = [];
+
+/* Construct the build arguments */
+for (var tmp=0; arguments[tmp] != undefined; tmp++)
+{
+
+    /* If no arguments are provided, override for building all */
+    if ( ( arguments.length == 1) && (arguments[tmp].equals("./config.bld")) )
+        buildArguments[buildArguments.length++] = "all";
+    else
+        buildArguments[buildArguments.length++] = arguments[tmp];
+}
+
+/* Build targets on this build */
+var build_targets = [];
+var soc_names = Object.keys(socs);
+
+for (var i=0; i < buildArguments.length; i++ ) {
+    /* Build it for all targets */
+    if (buildArguments[i] == "all") {
+        for (var j = 0; j < soc_names.length; j++)  {
+            build_targets = merge (build_targets.slice(0), socs[soc_names[j]].targets.slice(0));
+            /* Set build to "true" for that SoC */
+            socs[soc_names[j]].build = "true";
+        }
+    }
+    else {
+        /* Skip the first argument, which is ./config.bld to get to next SoCs */
+        if (i == 0) continue;          
+        /* Set that build to true if it is found in supported build socs */
+        for (j = 0; j < soc_names.length; j++) {
+            if (buildArguments[i] == soc_names[j]) {
+                socs[buildArguments[i]].build = "true";
+                build_targets = merge (build_targets.slice(0), socs[buildArguments[i]].targets.slice(0));
+                break;
+            }
+        }
+    }   
+}
+
+/* Update the Build target generated list */
+socs["all"].targets = build_targets; 
+Build.targets   = build_targets;
diff --git a/packages/ti/drv/icss_emac/config_mk.bld b/packages/ti/drv/icss_emac/config_mk.bld
new file mode 100644 (file)
index 0000000..bc35cf9
--- /dev/null
@@ -0,0 +1,45 @@
+/******************************************************************************
+ * FILE PURPOSE: Build configuration Script for the icss_emac Driver
+ ******************************************************************************
+ * FILE NAME: config.bld
+ *
+ * DESCRIPTION: 
+ *  This file contains the build configuration script for the icss_emac driver
+ *  and is responsible for configuration of the paths for the various 
+ *  tools required to build the driver.
+ *
+ * Copyright (C) 2014-2016, Texas Instruments, Inc.
+ *****************************************************************************/
+
+/* Get the Tools Base directory from the Environment Variable. */
+var c66ToolsBaseDir = java.lang.System.getenv("C6X_GEN_INSTALL_PATH");
+var m4ToolsBaseDir  = java.lang.System.getenv("TOOLCHAIN_PATH_M4");
+var a15ToolsBaseDir = java.lang.System.getenv("TOOLCHAIN_PATH_A15");
+var a9ToolsBaseDir  = java.lang.System.getenv("TOOLCHAIN_PATH_A9");
+var a8ToolsBaseDir  = java.lang.System.getenv("TOOLCHAIN_PATH_A8");
+
+/* Get the base directory for the icss_emac Socket Driver Package */
+var driverPath = new java.io.File(".//").getPath();
+
+/* Read the part number from the environment variable. */
+var LLDPartNumber = java.lang.System.getenv("PARTNO");
+
+/* Include Path */
+var lldIncludePath = " -I" + driverPath + "/src" + " -I" + driverPath;
+
+/* Configure the icss_emac Socket Release Version Information */
+/* 3 steps: remove SPACE and TAB, convert to string and split to make array */
+var driverReleaseVersion = (""+Pkg.version.replace(/\s/g, "")).split(',');
+
+/* Do not Print the Compiler Options */
+var pOpts = 0;
+
+/* List of all devices that needs to be build via XDC
+ * As the build happens through makefile, there is nothing to build via XDC
+ * using the below for packaging infrastructure
+ */
+var socs = [];
+var devices = [];
+var build_devices = [];
+Build.targets = []
+
diff --git a/packages/ti/drv/icss_emac/docs/Doxyfile b/packages/ti/drv/icss_emac/docs/Doxyfile
new file mode 100644 (file)
index 0000000..8a18718
--- /dev/null
@@ -0,0 +1,293 @@
+
+# Doxyfile 1.5.6
+
+#---------------------------------------------------------------------------
+# Project related configuration options
+#---------------------------------------------------------------------------
+DOXYFILE_ENCODING      = UTF-8
+PROJECT_NAME           = "ICSS_EMAC Low Level Driver"
+PROJECT_NUMBER         = 1.0.0.15
+OUTPUT_DIRECTORY       = ./docs/doxygen
+CREATE_SUBDIRS         = NO
+OUTPUT_LANGUAGE        = English
+BRIEF_MEMBER_DESC      = YES
+REPEAT_BRIEF           = YES
+ABBREVIATE_BRIEF       = "The $name class" \
+                         "The $name widget" \
+                         "The $name file" \
+                         is \
+                         provides \
+                         specifies \
+                         contains \
+                         represents \
+                         a \
+                         an \
+                         the
+ALWAYS_DETAILED_SEC    = NO
+INLINE_INHERITED_MEMB  = NO
+FULL_PATH_NAMES        = NO
+STRIP_FROM_PATH        = 
+STRIP_FROM_INC_PATH    = 
+SHORT_NAMES            = NO
+JAVADOC_AUTOBRIEF      = NO
+QT_AUTOBRIEF           = NO
+MULTILINE_CPP_IS_BRIEF = NO
+DETAILS_AT_TOP         = NO
+INHERIT_DOCS           = YES
+SEPARATE_MEMBER_PAGES  = NO
+TAB_SIZE               = 8
+ALIASES                = 
+OPTIMIZE_OUTPUT_FOR_C  = YES
+OPTIMIZE_OUTPUT_JAVA   = NO
+OPTIMIZE_FOR_FORTRAN   = NO
+OPTIMIZE_OUTPUT_VHDL   = NO
+BUILTIN_STL_SUPPORT    = NO
+CPP_CLI_SUPPORT        = NO
+SIP_SUPPORT            = NO
+IDL_PROPERTY_SUPPORT   = YES
+DISTRIBUTE_GROUP_DOC   = NO
+SUBGROUPING            = YES
+TYPEDEF_HIDES_STRUCT   = NO
+#---------------------------------------------------------------------------
+# Build related configuration options
+#---------------------------------------------------------------------------
+EXTRACT_ALL            = NO
+EXTRACT_PRIVATE        = NO
+EXTRACT_STATIC         = YES
+EXTRACT_LOCAL_CLASSES  = YES
+EXTRACT_LOCAL_METHODS  = NO
+EXTRACT_ANON_NSPACES   = NO
+HIDE_UNDOC_MEMBERS     = YES
+HIDE_UNDOC_CLASSES     = YES
+HIDE_FRIEND_COMPOUNDS  = NO
+HIDE_IN_BODY_DOCS      = NO
+INTERNAL_DOCS          = NO
+CASE_SENSE_NAMES       = NO
+HIDE_SCOPE_NAMES       = NO
+SHOW_INCLUDE_FILES     = YES
+INLINE_INFO            = YES
+SORT_MEMBER_DOCS       = YES
+SORT_BRIEF_DOCS        = NO
+SORT_GROUP_NAMES       = NO
+SORT_BY_SCOPE_NAME     = NO
+GENERATE_TODOLIST      = YES
+GENERATE_TESTLIST      = YES
+GENERATE_BUGLIST       = YES
+GENERATE_DEPRECATEDLIST= YES
+ENABLED_SECTIONS       = 
+MAX_INITIALIZER_LINES  = 30
+SHOW_USED_FILES        = YES
+SHOW_DIRECTORIES       = NO
+SHOW_FILES             = YES
+SHOW_NAMESPACES        = YES
+FILE_VERSION_FILTER    = 
+#---------------------------------------------------------------------------
+# configuration options related to warning and progress messages
+#---------------------------------------------------------------------------
+QUIET                  = NO
+WARNINGS               = YES
+WARN_IF_UNDOCUMENTED   = YES
+WARN_IF_DOC_ERROR      = YES
+WARN_NO_PARAMDOC       = NO
+WARN_FORMAT            = "$file:$line: $text"
+WARN_LOGFILE           = 
+#---------------------------------------------------------------------------
+# configuration options related to the input files
+#---------------------------------------------------------------------------
+INPUT                  = 
+INPUT_ENCODING         = UTF-8
+FILE_PATTERNS          = *.c \
+                         *.cc \
+                         *.cxx \
+                         *.cpp \
+                         *.c++ \
+                         *.d \
+                         *.java \
+                         *.ii \
+                         *.ixx \
+                         *.ipp \
+                         *.i++ \
+                         *.inl \
+                         *.h \
+                         *.hh \
+                         *.hxx \
+                         *.hpp \
+                         *.h++ \
+                         *.idl \
+                         *.odl \
+                         *.cs \
+                         *.php \
+                         *.php3 \
+                         *.inc \
+                         *.m \
+                         *.mm \
+                         *.dox \
+                         *.py \
+                         *.f90 \
+                         *.f \
+                         *.vhd \
+                         *.vhdl
+RECURSIVE              = YES
+EXCLUDE                = YES \
+                         ./example \
+                         ./test \
+                         ./package \
+                         ./packages
+EXCLUDE_SYMLINKS       = NO
+EXCLUDE_PATTERNS       = cslr_*.h
+EXCLUDE_SYMBOLS        = 
+EXAMPLE_PATH           = 
+EXAMPLE_PATTERNS       = *
+EXAMPLE_RECURSIVE      = NO
+IMAGE_PATH             = 
+INPUT_FILTER           = 
+FILTER_PATTERNS        = 
+FILTER_SOURCE_FILES    = NO
+#---------------------------------------------------------------------------
+# configuration options related to source browsing
+#---------------------------------------------------------------------------
+SOURCE_BROWSER         = NO
+INLINE_SOURCES         = NO
+STRIP_CODE_COMMENTS    = YES
+REFERENCED_BY_RELATION = NO
+REFERENCES_RELATION    = NO
+REFERENCES_LINK_SOURCE = YES
+USE_HTAGS              = NO
+VERBATIM_HEADERS       = NO
+#---------------------------------------------------------------------------
+# configuration options related to the alphabetical class index
+#---------------------------------------------------------------------------
+ALPHABETICAL_INDEX     = NO
+COLS_IN_ALPHA_INDEX    = 5
+IGNORE_PREFIX          = 
+#---------------------------------------------------------------------------
+# configuration options related to the HTML output
+#---------------------------------------------------------------------------
+GENERATE_HTML          = YES
+HTML_OUTPUT            = html
+HTML_FILE_EXTENSION    = .html
+HTML_HEADER            = ./docs/tiheader.htm
+HTML_FOOTER            = ./docs/tifooter.htm
+HTML_STYLESHEET        = 
+HTML_ALIGN_MEMBERS     = YES
+GENERATE_HTMLHELP      = YES
+GENERATE_DOCSET        = NO
+DOCSET_FEEDNAME        = "Doxygen generated docs"
+DOCSET_BUNDLE_ID       = org.doxygen.Project
+HTML_DYNAMIC_SECTIONS  = NO
+CHM_FILE               = ..\..\icss_emaclldDocs.chm
+HHC_LOCATION           = hhc.exe
+GENERATE_CHI           = NO
+CHM_INDEX_ENCODING     = 
+BINARY_TOC             = NO
+TOC_EXPAND             = NO
+DISABLE_INDEX          = NO
+ENUM_VALUES_PER_LINE   = 4
+GENERATE_TREEVIEW      = NONE
+TREEVIEW_WIDTH         = 250
+FORMULA_FONTSIZE       = 10
+#---------------------------------------------------------------------------
+# configuration options related to the LaTeX output
+#---------------------------------------------------------------------------
+GENERATE_LATEX         = NO
+LATEX_OUTPUT           = latex
+LATEX_CMD_NAME         = latex
+MAKEINDEX_CMD_NAME     = makeindex
+COMPACT_LATEX          = NO
+PAPER_TYPE             = a4wide
+EXTRA_PACKAGES         = 
+LATEX_HEADER           = 
+PDF_HYPERLINKS         = YES
+USE_PDFLATEX           = YES
+LATEX_BATCHMODE        = NO
+LATEX_HIDE_INDICES     = NO
+#---------------------------------------------------------------------------
+# configuration options related to the RTF output
+#---------------------------------------------------------------------------
+GENERATE_RTF           = NO
+RTF_OUTPUT             = rtf
+COMPACT_RTF            = NO
+RTF_HYPERLINKS         = NO
+RTF_STYLESHEET_FILE    = 
+RTF_EXTENSIONS_FILE    = 
+#---------------------------------------------------------------------------
+# configuration options related to the man page output
+#---------------------------------------------------------------------------
+GENERATE_MAN           = NO
+MAN_OUTPUT             = man
+MAN_EXTENSION          = .3
+MAN_LINKS              = NO
+#---------------------------------------------------------------------------
+# configuration options related to the XML output
+#---------------------------------------------------------------------------
+GENERATE_XML           = NO
+XML_OUTPUT             = xml
+XML_SCHEMA             = 
+XML_DTD                = 
+XML_PROGRAMLISTING     = YES
+#---------------------------------------------------------------------------
+# configuration options for the AutoGen Definitions output
+#---------------------------------------------------------------------------
+GENERATE_AUTOGEN_DEF   = NO
+#---------------------------------------------------------------------------
+# configuration options related to the Perl module output
+#---------------------------------------------------------------------------
+GENERATE_PERLMOD       = NO
+PERLMOD_LATEX          = NO
+PERLMOD_PRETTY         = YES
+PERLMOD_MAKEVAR_PREFIX = 
+#---------------------------------------------------------------------------
+# Configuration options related to the preprocessor   
+#---------------------------------------------------------------------------
+ENABLE_PREPROCESSING   = YES
+MACRO_EXPANSION        = NO
+EXPAND_ONLY_PREDEF     = NO
+SEARCH_INCLUDES        = YES
+INCLUDE_PATH           = 
+INCLUDE_FILE_PATTERNS  = 
+PREDEFINED             = 
+EXPAND_AS_DEFINED      = 
+SKIP_FUNCTION_MACROS   = YES
+#---------------------------------------------------------------------------
+# Configuration::additions related to external references   
+#---------------------------------------------------------------------------
+TAGFILES               = 
+GENERATE_TAGFILE       = 
+ALLEXTERNALS           = NO
+EXTERNAL_GROUPS        = YES
+PERL_PATH              = /usr/bin/perl
+#---------------------------------------------------------------------------
+# Configuration options related to the dot tool   
+#---------------------------------------------------------------------------
+CLASS_DIAGRAMS         = NO
+MSCGEN_PATH            = 
+HIDE_UNDOC_RELATIONS   = YES
+HAVE_DOT               = NO
+DOT_FONTNAME           = FreeSans
+DOT_FONTPATH           = 
+CLASS_GRAPH            = YES
+COLLABORATION_GRAPH    = YES
+GROUP_GRAPHS           = YES
+UML_LOOK               = NO
+TEMPLATE_RELATIONS     = NO
+INCLUDE_GRAPH          = YES
+INCLUDED_BY_GRAPH      = YES
+CALL_GRAPH             = NO
+CALLER_GRAPH           = NO
+GRAPHICAL_HIERARCHY    = YES
+DIRECTORY_GRAPH        = YES
+DOT_IMAGE_FORMAT       = png
+DOT_PATH               = 
+DOTFILE_DIRS           = 
+DOT_GRAPH_MAX_NODES    = 50
+MAX_DOT_GRAPH_DEPTH    = 1000
+DOT_TRANSPARENT        = YES
+DOT_MULTI_TARGETS      = NO
+GENERATE_LEGEND        = YES
+DOT_CLEANUP            = YES
+#---------------------------------------------------------------------------
+# Configuration::additions related to the search engine   
+#---------------------------------------------------------------------------
+SEARCHENGINE           = NO
+
+
diff --git a/packages/ti/drv/icss_emac/docs/Module.xs b/packages/ti/drv/icss_emac/docs/Module.xs
new file mode 100755 (executable)
index 0000000..5f8e41b
--- /dev/null
@@ -0,0 +1,61 @@
+/******************************************************************************
+ * FILE PURPOSE: ICSS_EMAC Driver DOCS Module specification file.
+ ******************************************************************************
+ * FILE NAME: module.xs
+ *
+ * DESCRIPTION: 
+ *  This file contains the module specification for the ICSS_EMAC Driver Documentation .
+ *
+ * Copyright (C) 2008-2016, Texas Instruments, Inc.
+ *****************************************************************************/
+
+/* Load the library utility. */
+var libUtility = xdc.loadCapsule ("../build/buildlib.xs");
+
+/**************************************************************************
+ * FUNCTION NAME : modBuild
+ **************************************************************************
+ * DESCRIPTION   :
+ *  The function is used to build the LLD documentation and add it to the
+ *  package.
+ **************************************************************************/
+function modBuild() 
+{
+    /* Create the actual PROLOGUE Section for the Documentation.*/
+    Pkg.makePrologue += "release: icss_emac_document_generation\n";
+    Pkg.makePrologue += "icss_emac_document_generation:\n";
+    Pkg.makePrologue += "\t @echo ----------------------------\n";
+    Pkg.makePrologue += "\t @echo Generating ICSS_EMAC Driver Documentation\n";
+    Pkg.makePrologue += "\t doxygen docs/Doxyfile\n";
+    Pkg.makePrologue += "\t @echo ICSS_EMACS Driver Documentation Generated \n";
+    Pkg.makePrologue += "\t @echo ----------------------------\n";
+
+    /* Add the documentation file to the package. */
+    Pkg.otherFiles[Pkg.otherFiles.length++] = "docs/tifooter.htm";
+    Pkg.otherFiles[Pkg.otherFiles.length++] = "docs/tiheader.htm";
+    Pkg.otherFiles[Pkg.otherFiles.length++] = "docs/tilogo.gif";
+    Pkg.otherFiles[Pkg.otherFiles.length++] = "docs/titagline.gif";
+
+
+    /* Add the ICSS_EMAC Software Manifest to the package */
+    Pkg.otherFiles[Pkg.otherFiles.length++] = "docs/PDK_ICSS_EMAC_LLD_01.00.00_manifest.html";
+
+    /* Add the HTML documentation to the package */
+    Pkg.otherFiles[Pkg.otherFiles.length++] = "docs/doxygen";
+
+    /* Add the release notes to the package */
+    Pkg.otherFiles[Pkg.otherFiles.length++] = "docs/ReleaseNotes_ICSS_EMAC_LLD.pdf";
+
+    /* Generate the ECLIPSE Plugin Generation: Only for SETUP Releases. */
+    if (driverInstallType == "SETUP")
+    {
+        Pkg.makePrologue += "all: eclipse_plugin_generation\n";
+        Pkg.makePrologue += "eclipse_plugin_generation:\n";
+        Pkg.makePrologue += "\t @echo ----------------------------\n";
+        Pkg.makePrologue += "\t @echo ICSS_EMAC Eclipse Plugin Generation\n";
+        Pkg.makePrologue += "\t xs xdc.tools.eclipsePluginGen -o . -x ./eclipseDocs/sample.xml -c ./eclipseDocs/toc_cdoc_sample.xml\n";
+        Pkg.makePrologue += "\t @echo ICSS_EMAC Eclipse Plugin Generated \n";
+        Pkg.makePrologue += "\t @echo ----------------------------\n";
+    }
+}
+
diff --git a/packages/ti/drv/icss_emac/docs/PDK_ICSS_EMAC_LLD_01.00.00_manifest.html b/packages/ti/drv/icss_emac/docs/PDK_ICSS_EMAC_LLD_01.00.00_manifest.html
new file mode 100755 (executable)
index 0000000..d7b9b6c
--- /dev/null
@@ -0,0 +1,357 @@
+<!--\r\r
+Texas Instruments Manifest Format 2.0\r\r
+-->\r\r
+\r\r
+<!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN">\r\r
+<html>\r\r
+\r\r
+<head>\r\r
+<meta http-equiv="Content-Type" content="text/html; charset=ISO-8859-1" />\r\r
+<!-- @Start Style -->\r\r
+<!-- Default style in case someone doesnt have Internet Access -->\r\r
+<style type="text/css" id="internalStyle">\r\r
+       body, div, p {\r\r
+               font-family: Lucida Grande, Verdana, Geneva, Arial, sans-serif;\r\r
+               font-size: 13px;\r\r
+               line-height: 1.3;\r\r
+       }\r\r
+       body {\r\r
+               margin: 20px;   \r\r
+       }\r\r
+       h1 {\r\r
+               font-size: 150%;\r\r
+       }\r\r
+       h2 {\r\r
+               font-size: 120%;\r\r
+       }\r\r
+       h3 {\r\r
+               font-size: 100%;\r\r
+       }\r\r
+       img {\r\r
+               border: 0px;\r\r
+               vertical-align: middle;\r\r
+       }\r\r
+       table, th, td, tr {\r\r
+               border: 1px solid black;        \r\r
+               font-family: Lucida Grande, Verdana, Geneva, Arial, sans-serif;\r\r
+               font-size: 13px;\r\r
+               line-height: 1.3;\r\r
+               empty-cells: show;  \r\r
+               padding: 5px;\r\r
+       }\r\r
+       table {\r\r
+               border-collapse: collapse; \r\r
+               width: 100%;\r\r
+       }\r\r
+       tr {\r\r
+               page-break-inside: avoid;\r\r
+       }\r\r
+       #TIlogoLeft {\r\r
+               background-color: black; \r\r
+               padding: 0;\r\r
+               width: 20%;\r\r
+       }\r\r
+       #TIlogoRight {\r\r
+               background-color: red; \r\r
+               padding: 0;\r\r
+       }\r\r
+       #ProductName {\r\r
+               text-align: center;\r\r
+       }\r\r
+       #ReleaseDate {\r\r
+               text-align: center;\r\r
+       }\r\r
+       .LogoSection {\r\r
+               margin: 0;\r\r
+               padding: 0;\r\r
+       }\r\r
+       .HeaderSection {\r\r
+               margin: 25px 0 25px 0;\r\r
+               padding: 0;\r\r
+       }\r\r
+       .LegendSection {\r\r
+               margin: 25px 0 25px 0;\r\r
+       }\r\r
+       .ExportSection {\r\r
+               margin: 25px 0 25px 0;\r\r
+       }\r\r
+       .DisclaimerSection {\r\r
+               margin: 25px 0 25px 0;  \r\r
+       }\r\r
+       .CreditSection {\r\r
+               margin: 25px 0 25px 0;  \r\r
+       }\r\r
+       .LicenseSection {\r\r
+               margin: 25px 0 25px 0;  \r\r
+       }\r\r
+       .ManifestTable {\r\r
+               margin: 25px 0 25px 0;  \r\r
+       }\r\r
+</style> \r\r
+<!-- Override style from TI if they have Internet Access -->\r\r
+<link type="text/css" rel="stylesheet" href="timanifeststyle.css">\r\r
+<!-- @End Style -->\r\r
+<title>Texas Instruments Manifest</title>\r\r
+</head>\r\r
+\r\r
+<body><!-- Logo display, will need to fix up the URLs, this is just for testing.. Image alternate display not wporking well yet -->\r\r
+<div class="LogoSection">\r\r
+<table>\r\r
+  <tbody>\r\r
+    <tr>\r\r
+      <td id="TIlogoLeft">\r\r
+        <a href="http://www.ti.com/">\r\r
+          <!-- img src="tilogo.gif" alt="Texas Instruments Incorporated" -->\r\r
+                 <img alt="" src="data:image/gif;base64,R0lGODlh3gA2AKIAAAAAAP///7u7u29vbz8/PwYGBujo6BgYGCH5BAAAAAAALAAAAADeADYAAAP/CLrc/jDKSau9OOvNu/9gKI5kaZ5oqq5s675wLM90bd94ru987//AoHBILBqPyKRyyWw6n9CodHorDALYLIHKJVqz2q44eAUHtoDB4DBu48rgLQErcNtnX7NhMDcICIB3gix5ZmtqAAZZew8EAo+QkQIDNVZqiIM1cHGKZ4YPAmaiAWw0c1gFmZqjB3SbZ6kNe6WhsAeOlDV0qjSFAXUAp7lwuREFtVsFgMvLB7fNAM+BCs+lDLd8BNYOuxfV22PL0RiWlwO1u3kDqejAEsjR6GB86FsHoYwA6gxWnVgGEegUuIelWJk6jswAGlXQ36J1xBSoQwfulIEDr/6l+VeK/+AehrAGOHRnAWRBbbWegckXAV6wk4AeRQtDQBEaBYsYlMl2hUCsBt0iKgilT9EfAlfO7SmzdKkrkQUT/fqZSECqLCSlntH375IAA1tqGUilLIBSNVnU+NmJNBRVChlF1QwAdlRWBy5P3QymwCLBYhs73cTHYBq3X33nDQ2wcWuBgef0FRD4GK3jU3VCZZUJAIw1OGg0P+4bFiubOWoOsEP1+KvZn3wurDbZ6lfcuw3yYkFjRSeYzRe7ARAbW0K3PmGIMi0OFDG1Mmha+RnufAHn3xL9ha6uTZ/rXagZ1GKAtTsHeWb+FEQvHILuX4+mLzj2j2r4TrFesTwMbE5Cuv8JzbTSGuRV1xgfUJFC3WbA0JWFalcItpgf8YU2yT/qATaedent5cBb8zk0DzIitgfKbonRFV9Wp2xl3UXq5Ccibp05598BnRigiAIJmrZAexkJQIuBwzX4CB3SQbeYQkPVAUco63DI2HzsAdYAiAvEZdYlaVQ5wXs3+bQAjovEUoBRR9LVAFLaPXCcY/KMqVRasQB5kiJgLcYgTkJiuCWKC2ZpIY/z/LRhYefkBAGW1HTyRy2UjObLHxSAOZ948EUVGCSC3SLZbB7iZKOLc2GRRgMH/VhdHnJwFCgD8iEGx0VKvpqbO+hoaCppEg3UiTES1CTkhNaQ+Qs4LQGql07/lET4mIQ6SvTSVGZ9Bmhz/bkYzK+PFKtpje6wumRm1wrLZzSdQASoZvyswdmSuk7p616HfkjBTxZBQucFgqXCFKdn1NpiUlQJhs8kteBWG0AbATbXS2tBlaeoVkmJRova4KkGPmhMFdiSYmq8cbTRYhrlkiHaNufJ9mIgVqEXnAOJM5JE4sgjudQ8bF82x+cKBP4Iiedecyjgx2/WtMNjjhcL9h+S4xq9RYJgsbeeUbmdrPTSQbPccsyijEXOfI8xyuinVJH1wdkS/MQ2Bc5Iq08DyHYwGglvPyCilbz0fa8GLV7r9+Btb7CJ14Qnzg8HpdKoOOF5Py752JNXvrblNphzEHnmnF/a+ecTbA465qKPXnnppkuOeuqKr8465K+z7nrsfc9Ouyq23z5I7rrfwXvvbhSQAAA7" />\r\r
+        </a>\r\r
+      </td>\r\r
+      <td id="TILogoRight">\r\r
+        <!-- img src="titagline.gif" alt="Technology for Innovators(tm)"-->\r\r
+               <img alt="" src="data:image/gif;base64,R0lGODlhOgEaALMAAP8AAP////92dv+3t/+Njf/W1v/t7f8hIf/19f+jo//Hx/8/P/9cXP/j4//6+v/+/iH5BAAAAAAALAAAAAA6ARoAAAT/EMhJq7046827/2AojmRpnmiqrmzrvnAsz3Rt33iu73zv/8CgcEgsGo/IpHLJbDqft0NDMCBQodis1jcADBKE7nYcCpjPgU5AQBKkVYOHAeRudqtXsh60/vRHdSoBBCGBNAkLe4o4f2psgG8pjR6GM5OLmDB/DA0GBoQADAgICRIBBQUOYgwGCg2kEgudBgUHAIGcBg0MsZ0NCnMGYgsBtqEGAbCynrW3AQONgcIFBgiErK6wAAfUtLbCscWiowoAyLDczLZu0AIJCAYOoJn0G38ObAwPEvLEts/O1vUhsA8AAjGonEmA9W6hGAVpEjiQoKBAhT8HJSRkVyEQQAAJ//a5YeMPQIFyACqCnJjSIgFCB4oB+HOSokWOAB6wIWCxnk8MfYh5QsYg5sVHfQLVMSqhztJIxWIaC6QzJy8KfZgqrNT0zR+nUNl8fSMvZ6IDwJCJRfoI7IR4Cub9nDsha6RwR02xUZpGq1utUWUq9FKgYV6/abgOHjt45tquEgY0SDDHoJg+fxhXolKNrmfH/EoR5EdAKmjQfB1qvPmGIQIJ3g4gC2egVF7LqxtP8Ng2cViTKFUCIGbNFKEEmB/VbDlYdqLRn+du8oTg6jjbmfe+CbTM2+BcuySgbQVtQoOCt7s3U8wbsqGs3ZppZLnylwFe8Uql825ogANPckUnYDoOCogxQGXADajggjcw4AA8DSSyTQASMmjhhTQscBWGHHbo4YcghijiiCSWaOKJKKao4oostugiFBEAADs=" />\r\r
+      </td>\r\r
+    </tr>\r\r
+  </tbody>\r\r
+</table>\r\r
+</div><div class="HeaderSection">\r\r
+<h1 id="ProductName">\r\r
+<!-- @Start Product -->\r\r
+PDK ICSS_EMAC LLD Manifest\r\r
+<!-- @End Product -->\r\r
+</h1>\r\r
+\r\r
+<h2 id="ReleaseDate">\r\r
+<!-- @Start Date -->\r\r
+03-21-2016\r\r
+<!-- @End Date -->\r\r
+</h2>\r\r
+\r\r
+\r\r
+<h2 id="SRASID">\r\r
+<!-- @Start Date -->\r\r
+Manifest ID - SRAS00002654\r\r
+<!-- @End Date -->\r\r
+</h2>\r\r
+</div><div class="LegendSection">\r\r
+<h2>Legend</h2>\r\r
+<p>(explanation of the fields in the Manifest Table below)</p>\r\r
+<table>\r\r
+<tbody>\r\r
+<tr>\r\r
+<td>\r\r
+<b>Software Name </b>\r\r
+</td>\r\r
+<td>\r\r
+The name of the application or file\r\r
+</td>\r\r
+</tr>\r\r
+<tr>\r\r
+<td>\r\r
+<b>Version</b>\r\r
+</td>\r\r
+<td>\r\r
+Version of the application or file\r\r
+</td>\r\r
+</tr>\r\r
+<tr>\r\r
+<td>\r\r
+<b>License Type</b>\r\r
+</td>\r\r
+<td>\r\r
+Type of license(s) under which TI will be providing\r\r
+software to the licensee (e.g. BSD-3-Clause, GPL-2.0, TI TSPA License, TI\r\r
+Commercial License). The license could be under Commercial terms or Open Source. See Open Source Reference License Disclaimer in\r\r
+the Disclaimers Section. Whenever possible, TI will use an <a href="http://spdx.org/licenses/"> SPDX Short Identifier </a> for an Open Source\r\r
+License. TI Commercial license terms are not usually included in the manifest and are conveyed through a variety \r\r
+of means such as a clickwrap license upon install, \r\r
+a signed license agreement and so forth.\r\r
+</td>\r\r
+</tr>\r\r
+<tr>\r\r
+<td>\r\r
+<b>Location</b>\r\r
+</td>\r\r
+<td>\r\r
+The directory name and path on the media or a specific file where the Software is located. Typically fully qualified path names \r\r
+are not used and instead the relevant top level directory of the application is given. \r\r
+A notation often used in the manifests is [as installed]/directory/*. Note that the asterisk implies that all\r\r
+files under that directory are licensed as the License Type field denotes. Any exceptions to this will \r\r
+generally be denoted as [as installed]/directory/* except as noted below which means as shown in subsequent rows of \r\r
+the manifest.\r\r
+</td>\r\r
+</tr>\r\r
+<tr>\r\r
+<td>\r\r
+<b>Delivered As</b>\r\r
+</td>\r\r
+<td>\r\r
+This field will either be &#8220;Source&#8221;, &#8220;Binary&#8221; or &#8220;Source\r\r
+and Binary&#8221; and is the primary form the content of the Software is delivered\r\r
+in. If the Software is delivered in an archive format, this field\r\r
+applies to the contents of the archive. If the word Limited is used\r\r
+with Source, as in &#8220;Limited Source&#8221; or &#8220;Limited Source and Binary&#8221; then\r\r
+only portions of the Source for the application are provided.\r\r
+</td>\r\r
+</tr>\r\r
+<tr>\r\r
+<td>\r\r
+<b>Modified by TI</b>\r\r
+</td>\r\r
+<td>\r\r
+This field will either be &#8220;Yes&#8221; or &#8220;No&#8221;. A &#8220;Yes&#8221; means\r\r
+TI has made changes to the Software. A &#8220;No&#8221; means TI has not made any\r\r
+changes. Note: This field is not applicable for Software &#8220;Obtained\r\r
+from&#8221; TI.\r\r
+</td>\r\r
+</tr>\r\r
+<tr>\r\r
+<td>\r\r
+<b>Obtained from</b>\r\r
+</td>\r\r
+<td>\r\r
+This field specifies from where or from whom TI obtained\r\r
+the Software. It may be a URL to an Open Source site, a 3<sup>rd</sup>\r\r
+party licensor, or TI. See Links Disclaimer in the Disclaimers\r\r
+Section.\r\r
+</td>\r\r
+</tr>\r\r
+</tbody>\r\r
+</table>\r\r
+</div><div class="DisclaimerSection">\r\r
+<h2>Disclaimers</h2>\r\r
+<h3>Export Control Classification Number (ECCN)</h3>\r\r
+<p>Any use of ECCNs listed in the Manifest is at the user&#8217;s risk\r\r
+and without recourse to TI. Your\r\r
+company, as the exporter of record, is responsible for determining the\r\r
+correct classification of any item at\r\r
+the time of export. Any export classification by TI of Software is for\r\r
+TI&#8217;s internal use only and shall not be construed as a representation\r\r
+or warranty\r\r
+regarding the proper export classification for such Software or whether\r\r
+an export\r\r
+license or other documentation is required for exporting such Software</p>\r\r
+<h3>Links in the Manifest</h3>\r\r
+<p>Any\r\r
+links appearing on this Manifest\r\r
+(for example in the &#8220;Obtained from&#8221; field) were verified at the time\r\r
+the Manifest was created. TI makes no guarantee that any listed links\r\r
+will\r\r
+remain active in the future.</p>\r\r
+<h3>Open Source License References</h3>\r\r
+<p>Your company is responsible for confirming the\r\r
+applicable license terms for any open source Software\r\r
+listed in this Manifest that was not &#8220;Obtained from&#8221; TI. Any open\r\r
+source license\r\r
+specified in this Manifest for Software that was\r\r
+not &#8220;Obtained from&#8221; TI is for TI&#8217;s internal use only and shall not be\r\r
+construed as a representation or warranty regarding the proper open\r\r
+source license terms\r\r
+for such Software.</p>\r\r
+</div><div class="ExportSection">\r\r
+<h2>Export Information</h2>\r\r
+<p>ECCN for Software included in this release:</p>\r\r
+Publicly Available  - Open Source or TI TSPA License\r\r
+</div><div class="ManifestTable">\r\r
+<!-- h2>Manifest Table</h2 -->\r\r
\r
+ <table> \r
+ <tbody> \r
\r
+ <h2> \r
+  PDK ICSS_EMAC LLD Manifest Table \r
+ </h2> \r
\r
+  \r
+ <p> \r
\r
+ See the Legend above for a description of these columns. \r
\r
+ </p> \r
+  \r
+ <table id="targetpackages" name="targetpackages"> \r
+ <thead>  \r
+       <tr> \r
+               <td><b>Software Name</b></td> \r
+               <td><b>Version</b></td> \r
+               <td><b>License Type</b></td> \r
+               <td><b>Delivered As</b></td> \r
+               <td><b>Modified by TI</b></td> \r
+               <td></td> \r
+               <td></td> \r
+       </tr> \r
+ </thead>  \r
\r
\r
+ <tbody> \r
+       <tr> \r
+               <td id="name" name="name" rowspan="2"> \r
+ ICSS_EMAC_LLD \r
+ </td> \r
+               <td id="version" name="version" rowspan="2"> \r
+ 01.00.00 \r
+ </td> \r
+               <td id="license" name="license" rowspan="2"> \r
+ BSD-3-Clause \r
+ </td> \r
+               <td id="delivered" name="delivered" rowspan="2"> \r
+ Source and Binary \r
+ </td> \r
+               <td id="modified" name="modified" rowspan="2"> \r
+ N/A \r
+ </td> \r
+               <td><b>Location</b></td> \r
+               <td id="location" name="location"> \r
+ packages/ti/drv/icss_emac \r
+ </td> \r
+       </tr> \r
+       <tr> \r
+               <td><b>Obtained from</b></td> \r
+               <td id="obtained" name="obtained"> \r
+ Texas Instruments Incorporated \r
+ </td> \r
+       </tr> \r
\r
+ <tbody> \r
+       <tr> \r
+               <td id="name" name="name" rowspan="2"> \r
+ ICSS_EMAC_FIRMWARE \r
+ </td> \r
+               <td id="version" name="version" rowspan="2"> \r
+ 01.00.00 \r
+ </td> \r
+               <td id="license" name="license" rowspan="2"> \r
+ TI Text File \r
+ </td> \r
+               <td id="delivered" name="delivered" rowspan="2"> \r
+ Binary \r
+ </td> \r
+               <td id="modified" name="modified" rowspan="2"> \r
+ N/A \r
+ </td> \r
+               <td><b>Location</b></td> \r
+               <td id="location" name="location"> \r
+ packages/ti/drv/icss_emac/firmware \r
+ </td> \r
+       </tr> \r
+       <tr> \r
+               <td><b>Obtained from</b></td> \r
+               <td id="obtained" name="obtained"> \r
+ Texas Instruments Incorporated \r
+ </td> \r
+       </tr> \r
\r
+ </tbody> \r
+ </table> \r
+  \r
+ </p> \r
+ </p> \r
+ <p> \r
+\r\r
+</div><div class="CreditSection">\r\r
+<h2>Credits</h2>\r\r
+<BR> <BR><BR><BR><BR>\r\r
+</div><div class="LicenseSection">\r\r
+<h2>Licenses</h2>\r\r
+<BR><h3><b> PDK ICSS_EMAC LLD Licenses </b></h3><BR> <BR>BSD-3-Clause License<BR>--------------------------<BR>Copyright (C) {2016} Texas Instruments Incorporated - http://www.ti.com/ <BR>  <BR>  <BR>   Redistribution and use in source and binary forms, with or without <BR>   modification, are permitted provided that the following conditions <BR>   are met:<BR><BR>     Redistributions of source code must retain the above copyright <BR>     notice, this list of conditions and the following disclaimer.<BR><BR>    Redistributions in binary form must reproduce the above copyright<BR>    notice, this list of conditions and the following disclaimer in the <BR>     documentation and/or other materials provided with the   <BR>     distribution.<BR><BR>     Neither the name of Texas Instruments Incorporated nor the names of<BR>    its contributors may be used to endorse or promote products derived<BR>    from this software without specific prior written permission.<BR><BR>   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS <BR>   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT <BR>   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR<BR>  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT <BR>   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, <BR>   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT <BR>   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,<BR>  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY<BR>  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT <BR>   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE <BR>   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.<BR><BR><BR>TI Text File License<BR>------------------------<BR>Copyright (c) 2015 \96 2016, Texas Instruments Incorporated<BR>All rights reserved not granted herein.<BR>Limited License.  <BR><BR>Texas Instruments Incorporated grants a world-wide, royalty-free, <BR> non-exclusive license under copyrights and patents it now or hereafter <BR> owns or controls to make, have made, use, import, offer to sell and sell ("Utilize")<BR>this software subject to the terms herein.  With respect to the foregoing patent <BR>license, such license is granted  solely to the extent that any such patent is necessary <BR> to Utilize the software alone.  The patent license shall not apply to any combinations which <BR> include this software, other than combinations with devices manufactured by or for TI (\93TI Devices\94).  <BR> No hardware patent is licensed hereunder.<BR><BR>Redistributions must preserve existing copyright notices and reproduce this license (including the <BR> above copyright notice and the disclaimer and (if applicable) source code license limitations below) <BR> in the documentation and/or other materials provided with the distribution<BR><BR>Redistribution and use in binary form, without modification, are permitted provided that the following<BR>conditions are met:<BR><BR>               * No reverse engineering, decompilation, or disassembly of this software is permitted with respect to any <BR>     software provided in binary form.<BR>               * any redistribution and use are licensed by TI for use only with TI Devices.<BR>               * Nothing shall obligate TI to provide you with source code for the software licensed and provided to you in object code.<BR><BR>If software source code is provided to you, modification and redistribution of the source code are permitted <BR> provided that the following conditions are met:<BR><BR>   * any redistribution and use of the source code, including any resulting derivative works, are licensed by <BR>     TI for use only with TI Devices.<BR>   * any redistribution and use of any object code compiled from the source code and any resulting derivative <BR>     works, are licensed by TI for use only with TI Devices.<BR><BR>Neither the name of Texas Instruments Incorporated nor the names of its suppliers may be used to endorse or <BR> promote products derived from this software without specific prior written permission.<BR><BR>DISCLAIMER.<BR><BR>THIS SOFTWARE IS PROVIDED BY TI AND TI\92S LICENSORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, <BR> BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. <BR> IN NO EVENT SHALL TI AND TI\92S LICENSORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR <BR> CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, <BR> OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, <BR> OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE <BR> POSSIBILITY OF SUCH DAMAGE.<BR>--><BR><BR><BR><BR><BR><BR>\r\r
+</div>\r\r
+\r\r
+</body></html>
\ No newline at end of file
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new file mode 100755 (executable)
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--- /dev/null
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+%%{
+/*!
+ *  This template implements the Doxyfile
+ */  
+  /* Versioning */
+  var ver = this;
+  var packageVersion = ver[0]+"."+ver[1]+"."+ver[2]+"."+ver[3];
+
+%%}
+
+# Doxyfile 1.5.6
+
+#---------------------------------------------------------------------------
+# Project related configuration options
+#---------------------------------------------------------------------------
+DOXYFILE_ENCODING      = UTF-8
+PROJECT_NAME           = "ICSS_EMAC Low Level Driver"
+PROJECT_NUMBER         = `packageVersion`
+OUTPUT_DIRECTORY       = ./docs/doxygen
+CREATE_SUBDIRS         = NO
+OUTPUT_LANGUAGE        = English
+BRIEF_MEMBER_DESC      = YES
+REPEAT_BRIEF           = YES
+ABBREVIATE_BRIEF       = "The $name class" \
+                         "The $name widget" \
+                         "The $name file" \
+                         is \
+                         provides \
+                         specifies \
+                         contains \
+                         represents \
+                         a \
+                         an \
+                         the
+ALWAYS_DETAILED_SEC    = NO
+INLINE_INHERITED_MEMB  = NO
+FULL_PATH_NAMES        = NO
+STRIP_FROM_PATH        = 
+STRIP_FROM_INC_PATH    = 
+SHORT_NAMES            = NO
+JAVADOC_AUTOBRIEF      = NO
+QT_AUTOBRIEF           = NO
+MULTILINE_CPP_IS_BRIEF = NO
+DETAILS_AT_TOP         = NO
+INHERIT_DOCS           = YES
+SEPARATE_MEMBER_PAGES  = NO
+TAB_SIZE               = 8
+ALIASES                = 
+OPTIMIZE_OUTPUT_FOR_C  = YES
+OPTIMIZE_OUTPUT_JAVA   = NO
+OPTIMIZE_FOR_FORTRAN   = NO
+OPTIMIZE_OUTPUT_VHDL   = NO
+BUILTIN_STL_SUPPORT    = NO
+CPP_CLI_SUPPORT        = NO
+SIP_SUPPORT            = NO
+IDL_PROPERTY_SUPPORT   = YES
+DISTRIBUTE_GROUP_DOC   = NO
+SUBGROUPING            = YES
+TYPEDEF_HIDES_STRUCT   = NO
+#---------------------------------------------------------------------------
+# Build related configuration options
+#---------------------------------------------------------------------------
+EXTRACT_ALL            = NO
+EXTRACT_PRIVATE        = NO
+EXTRACT_STATIC         = YES
+EXTRACT_LOCAL_CLASSES  = YES
+EXTRACT_LOCAL_METHODS  = NO
+EXTRACT_ANON_NSPACES   = NO
+HIDE_UNDOC_MEMBERS     = YES
+HIDE_UNDOC_CLASSES     = YES
+HIDE_FRIEND_COMPOUNDS  = NO
+HIDE_IN_BODY_DOCS      = NO
+INTERNAL_DOCS          = NO
+CASE_SENSE_NAMES       = NO
+HIDE_SCOPE_NAMES       = NO
+SHOW_INCLUDE_FILES     = YES
+INLINE_INFO            = YES
+SORT_MEMBER_DOCS       = YES
+SORT_BRIEF_DOCS        = NO
+SORT_GROUP_NAMES       = NO
+SORT_BY_SCOPE_NAME     = NO
+GENERATE_TODOLIST      = YES
+GENERATE_TESTLIST      = YES
+GENERATE_BUGLIST       = YES
+GENERATE_DEPRECATEDLIST= YES
+ENABLED_SECTIONS       = 
+MAX_INITIALIZER_LINES  = 30
+SHOW_USED_FILES        = YES
+SHOW_DIRECTORIES       = NO
+SHOW_FILES             = YES
+SHOW_NAMESPACES        = YES
+FILE_VERSION_FILTER    = 
+#---------------------------------------------------------------------------
+# configuration options related to warning and progress messages
+#---------------------------------------------------------------------------
+QUIET                  = NO
+WARNINGS               = YES
+WARN_IF_UNDOCUMENTED   = YES
+WARN_IF_DOC_ERROR      = YES
+WARN_NO_PARAMDOC       = NO
+WARN_FORMAT            = "$file:$line: $text"
+WARN_LOGFILE           = 
+#---------------------------------------------------------------------------
+# configuration options related to the input files
+#---------------------------------------------------------------------------
+INPUT                  = 
+INPUT_ENCODING         = UTF-8
+FILE_PATTERNS          = *.c \
+                         *.cc \
+                         *.cxx \
+                         *.cpp \
+                         *.c++ \
+                         *.d \
+                         *.java \
+                         *.ii \
+                         *.ixx \
+                         *.ipp \
+                         *.i++ \
+                         *.inl \
+                         *.h \
+                         *.hh \
+                         *.hxx \
+                         *.hpp \
+                         *.h++ \
+                         *.idl \
+                         *.odl \
+                         *.cs \
+                         *.php \
+                         *.php3 \
+                         *.inc \
+                         *.m \
+                         *.mm \
+                         *.dox \
+                         *.py \
+                         *.f90 \
+                         *.f \
+                         *.vhd \
+                         *.vhdl
+RECURSIVE              = YES
+EXCLUDE                = YES \
+                         ./example \
+                         ./test \
+                         ./package \
+                         ./packages
+EXCLUDE_SYMLINKS       = NO
+EXCLUDE_PATTERNS       = cslr_*.h
+EXCLUDE_SYMBOLS        = 
+EXAMPLE_PATH           = 
+EXAMPLE_PATTERNS       = *
+EXAMPLE_RECURSIVE      = NO
+IMAGE_PATH             = 
+INPUT_FILTER           = 
+FILTER_PATTERNS        = 
+FILTER_SOURCE_FILES    = NO
+#---------------------------------------------------------------------------
+# configuration options related to source browsing
+#---------------------------------------------------------------------------
+SOURCE_BROWSER         = NO
+INLINE_SOURCES         = NO
+STRIP_CODE_COMMENTS    = YES
+REFERENCED_BY_RELATION = NO
+REFERENCES_RELATION    = NO
+REFERENCES_LINK_SOURCE = YES
+USE_HTAGS              = NO
+VERBATIM_HEADERS       = NO
+#---------------------------------------------------------------------------
+# configuration options related to the alphabetical class index
+#---------------------------------------------------------------------------
+ALPHABETICAL_INDEX     = NO
+COLS_IN_ALPHA_INDEX    = 5
+IGNORE_PREFIX          = 
+#---------------------------------------------------------------------------
+# configuration options related to the HTML output
+#---------------------------------------------------------------------------
+GENERATE_HTML          = YES
+HTML_OUTPUT            = html
+HTML_FILE_EXTENSION    = .html
+HTML_HEADER            = ./docs/tiheader.htm
+HTML_FOOTER            = ./docs/tifooter.htm
+HTML_STYLESHEET        = 
+HTML_ALIGN_MEMBERS     = YES
+GENERATE_HTMLHELP      = YES
+GENERATE_DOCSET        = NO
+DOCSET_FEEDNAME        = "Doxygen generated docs"
+DOCSET_BUNDLE_ID       = org.doxygen.Project
+HTML_DYNAMIC_SECTIONS  = NO
+CHM_FILE               = ..\..\icss_emaclldDocs.chm
+HHC_LOCATION           = hhc.exe
+GENERATE_CHI           = NO
+CHM_INDEX_ENCODING     = 
+BINARY_TOC             = NO
+TOC_EXPAND             = NO
+DISABLE_INDEX          = NO
+ENUM_VALUES_PER_LINE   = 4
+GENERATE_TREEVIEW      = NONE
+TREEVIEW_WIDTH         = 250
+FORMULA_FONTSIZE       = 10
+#---------------------------------------------------------------------------
+# configuration options related to the LaTeX output
+#---------------------------------------------------------------------------
+GENERATE_LATEX         = NO
+LATEX_OUTPUT           = latex
+LATEX_CMD_NAME         = latex
+MAKEINDEX_CMD_NAME     = makeindex
+COMPACT_LATEX          = NO
+PAPER_TYPE             = a4wide
+EXTRA_PACKAGES         = 
+LATEX_HEADER           = 
+PDF_HYPERLINKS         = YES
+USE_PDFLATEX           = YES
+LATEX_BATCHMODE        = NO
+LATEX_HIDE_INDICES     = NO
+#---------------------------------------------------------------------------
+# configuration options related to the RTF output
+#---------------------------------------------------------------------------
+GENERATE_RTF           = NO
+RTF_OUTPUT             = rtf
+COMPACT_RTF            = NO
+RTF_HYPERLINKS         = NO
+RTF_STYLESHEET_FILE    = 
+RTF_EXTENSIONS_FILE    = 
+#---------------------------------------------------------------------------
+# configuration options related to the man page output
+#---------------------------------------------------------------------------
+GENERATE_MAN           = NO
+MAN_OUTPUT             = man
+MAN_EXTENSION          = .3
+MAN_LINKS              = NO
+#---------------------------------------------------------------------------
+# configuration options related to the XML output
+#---------------------------------------------------------------------------
+GENERATE_XML           = NO
+XML_OUTPUT             = xml
+XML_SCHEMA             = 
+XML_DTD                = 
+XML_PROGRAMLISTING     = YES
+#---------------------------------------------------------------------------
+# configuration options for the AutoGen Definitions output
+#---------------------------------------------------------------------------
+GENERATE_AUTOGEN_DEF   = NO
+#---------------------------------------------------------------------------
+# configuration options related to the Perl module output
+#---------------------------------------------------------------------------
+GENERATE_PERLMOD       = NO
+PERLMOD_LATEX          = NO
+PERLMOD_PRETTY         = YES
+PERLMOD_MAKEVAR_PREFIX = 
+#---------------------------------------------------------------------------
+# Configuration options related to the preprocessor   
+#---------------------------------------------------------------------------
+ENABLE_PREPROCESSING   = YES
+MACRO_EXPANSION        = NO
+EXPAND_ONLY_PREDEF     = NO
+SEARCH_INCLUDES        = YES
+INCLUDE_PATH           = 
+INCLUDE_FILE_PATTERNS  = 
+PREDEFINED             = 
+EXPAND_AS_DEFINED      = 
+SKIP_FUNCTION_MACROS   = YES
+#---------------------------------------------------------------------------
+# Configuration::additions related to external references   
+#---------------------------------------------------------------------------
+TAGFILES               = 
+GENERATE_TAGFILE       = 
+ALLEXTERNALS           = NO
+EXTERNAL_GROUPS        = YES
+PERL_PATH              = /usr/bin/perl
+#---------------------------------------------------------------------------
+# Configuration options related to the dot tool   
+#---------------------------------------------------------------------------
+CLASS_DIAGRAMS         = NO
+MSCGEN_PATH            = 
+HIDE_UNDOC_RELATIONS   = YES
+HAVE_DOT               = NO
+DOT_FONTNAME           = FreeSans
+DOT_FONTPATH           = 
+CLASS_GRAPH            = YES
+COLLABORATION_GRAPH    = YES
+GROUP_GRAPHS           = YES
+UML_LOOK               = NO
+TEMPLATE_RELATIONS     = NO
+INCLUDE_GRAPH          = YES
+INCLUDED_BY_GRAPH      = YES
+CALL_GRAPH             = NO
+CALLER_GRAPH           = NO
+GRAPHICAL_HIERARCHY    = YES
+DIRECTORY_GRAPH        = YES
+DOT_IMAGE_FORMAT       = png
+DOT_PATH               = 
+DOTFILE_DIRS           = 
+DOT_GRAPH_MAX_NODES    = 50
+MAX_DOT_GRAPH_DEPTH    = 1000
+DOT_TRANSPARENT        = YES
+DOT_MULTI_TARGETS      = NO
+GENERATE_LEGEND        = YES
+DOT_CLEANUP            = YES
+#---------------------------------------------------------------------------
+# Configuration::additions related to the search engine   
+#---------------------------------------------------------------------------
+SEARCHENGINE           = NO
+
+
diff --git a/packages/ti/drv/icss_emac/docs/tifooter.htm b/packages/ti/drv/icss_emac/docs/tifooter.htm
new file mode 100755 (executable)
index 0000000..4bdf9c9
--- /dev/null
@@ -0,0 +1,4 @@
+<hr size="1"><small>
+Copyright  $year, Texas Instruments Incorporated</small>
+</body>
+</html>
diff --git a/packages/ti/drv/icss_emac/docs/tiheader.htm b/packages/ti/drv/icss_emac/docs/tiheader.htm
new file mode 100755 (executable)
index 0000000..3c61efe
--- /dev/null
@@ -0,0 +1,12 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN">
+<html><head><meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
+<title>$title</title>
+<link href="$relpath$doxygen.css" rel="stylesheet" type="text/css">
+<link href="$relpath$tabs.css" rel="stylesheet" type="text/css">
+</head><body>
+<table width=100%>
+<tr>
+  <td bgcolor="black" width="1"><a href="http://www.ti.com"><img border=0 src="../../tilogo.gif"></a></td>
+  <td bgcolor="red"><img src="../../titagline.gif"></td>
+</tr>
+</table>
diff --git a/packages/ti/drv/icss_emac/docs/tilogo.gif b/packages/ti/drv/icss_emac/docs/tilogo.gif
new file mode 100755 (executable)
index 0000000..f2fab2d
Binary files /dev/null and b/packages/ti/drv/icss_emac/docs/tilogo.gif differ
diff --git a/packages/ti/drv/icss_emac/docs/titagline.gif b/packages/ti/drv/icss_emac/docs/titagline.gif
new file mode 100755 (executable)
index 0000000..743a024
Binary files /dev/null and b/packages/ti/drv/icss_emac/docs/titagline.gif differ
diff --git a/packages/ti/drv/icss_emac/firmware/Module.xs b/packages/ti/drv/icss_emac/firmware/Module.xs
new file mode 100644 (file)
index 0000000..55b3968
--- /dev/null
@@ -0,0 +1,61 @@
+/******************************************************************************\r
+ * FILE PURPOSE: ICSS_EMAC LLD unit firmware files.\r
+ ******************************************************************************\r
+ * FILE NAME: module.xs\r
+ *\r
+ * DESCRIPTION: \r
+ *  This file contains the module specification for ICSS_EMAC LLD firmware files.\r
+ *\r
+ * Copyright (C) 2015-2017, Texas Instruments, Inc.\r
+ *****************************************************************************/\r
+\r
+/* Load the library utility. */\r
+var libUtility = xdc.loadCapsule ("../build/buildlib.xs");\r
+\r
+/**************************************************************************\r
+ * FUNCTION NAME : modBuild\r
+ **************************************************************************\r
+ * DESCRIPTION   :\r
+ *  The function is used to add all the source files in the fw \r
+ *  directory into the package.\r
+ **************************************************************************/\r
+function modBuild() \r
+{\r
+    /* Add all the .h files to the release package. */\r
+    var fwFiles = libUtility.listAllFiles (".h");\r
+    for (var k = 0 ; k < fwFiles.length; k++)\r
+        Pkg.otherFiles[Pkg.otherFiles.length++] = fwFiles[k];\r
+    fwFiles = libUtility.listAllFiles (".c"); \r
+    for (var k = 0 ; k < fwFiles.length; k++)\r
+        Pkg.otherFiles[Pkg.otherFiles.length++] = fwFiles[k];\r
+    /* Add all the .mk files to the release package. */\r
+    var mkFiles = libUtility.listAllFiles (".mk", "firmware", true);\r
+    for (var k = 0 ; k < mkFiles.length; k++)\r
+        Pkg.otherFiles[Pkg.otherFiles.length++] = mkFiles[k];\r
+\r
+    /* Add all the .cmd files to the release package. */\r
+    var fwFiles = libUtility.listAllFiles (".cmd", "firmware", true);\r
+    for (var k = 0 ; k < fwFiles.length; k++)\r
+        Pkg.otherFiles[Pkg.otherFiles.length++] = fwFiles[k];\r
+    \r
+    /* Add all the .asm files to the release package. */\r
+    var fwFiles = libUtility.listAllFiles (".asm", "firmware", true);\r
+    for (var k = 0 ; k < fwFiles.length; k++)\r
+        Pkg.otherFiles[Pkg.otherFiles.length++] = fwFiles[k];\r
+    \r
+    /* Add all the .inc files to the release package. */\r
+    var fwFiles = libUtility.listAllFiles (".inc", "firmware", true);\r
+    for (var k = 0 ; k < fwFiles.length; k++)\r
+        Pkg.otherFiles[Pkg.otherFiles.length++] = fwFiles[k];\r
+\r
+    /* Add all the .bin files to the release package. */\r
+    var fwFiles = libUtility.listAllFiles (".bin", "firmware", true);\r
+    for (var k = 0 ; k < fwFiles.length; k++)\r
+        Pkg.otherFiles[Pkg.otherFiles.length++] = fwFiles[k];\r
+\r
+    /* Add all the .pdf files to the release package. */\r
+    var fwFiles = libUtility.listAllFiles (".pdf", "firmware", true);\r
+    for (var k = 0 ; k < fwFiles.length; k++)\r
+        Pkg.otherFiles[Pkg.otherFiles.length++] = fwFiles[k];\r
+    \r
+}\r
diff --git a/packages/ti/drv/icss_emac/firmware/cmd/PRU0_REV1_to_ARM.cmd b/packages/ti/drv/icss_emac/firmware/cmd/PRU0_REV1_to_ARM.cmd
new file mode 100755 (executable)
index 0000000..abd0980
--- /dev/null
@@ -0,0 +1,19 @@
+--host_image
+--image
+--host_image:target=ARM
+--host_image:endianness=little
+
+--host_image:hidden_symbols
+--host_image:show=shared_buf
+
+--exclude=.resource_table
+
+ROMS
+{
+   PAGE 0:
+      PRU0_REV1_IMEM: o=0x00000000 l=0x00001000
+
+   PAGE 1:
+      PRU0_REV1_DMEM: o=0x00000000 l=0x00001000
+      PRU0_REV1_EXT:  o=0x80000000 l=0x00001000
+}
diff --git a/packages/ti/drv/icss_emac/firmware/cmd/PRU0_REV1_to_C66.cmd b/packages/ti/drv/icss_emac/firmware/cmd/PRU0_REV1_to_C66.cmd
new file mode 100755 (executable)
index 0000000..6e6db1e
--- /dev/null
@@ -0,0 +1,19 @@
+--host_image
+--image
+--host_image:target=C6000
+--host_image:endianness=little
+
+--host_image:hidden_symbols
+--host_image:show=shared_buf
+
+--exclude=.resource_table
+
+ROMS
+{
+   PAGE 0:
+      PRU0_REV1_IMEM: o=0x00000000 l=0x00001000
+
+   PAGE 1:
+      PRU0_REV1_DMEM: o=0x00000000 l=0x00001000
+      PRU0_REV1_EXT:  o=0x80000000 l=0x00001000
+}
diff --git a/packages/ti/drv/icss_emac/firmware/cmd/PRU0_REV2_to_ARM.cmd b/packages/ti/drv/icss_emac/firmware/cmd/PRU0_REV2_to_ARM.cmd
new file mode 100755 (executable)
index 0000000..fe600c6
--- /dev/null
@@ -0,0 +1,19 @@
+--host_image
+--image
+--host_image:target=ARM
+--host_image:endianness=little
+
+--host_image:hidden_symbols
+--host_image:show=shared_buf
+
+--exclude=.resource_table
+
+ROMS
+{
+   PAGE 0:
+      PRU0_REV2_IMEM: o=0x00000000 l=0x00001000
+
+   PAGE 1:
+      PRU0_REV2_DMEM: o=0x00000000 l=0x00001000
+      PRU0_REV2_EXT:  o=0x80000000 l=0x00001000
+}
diff --git a/packages/ti/drv/icss_emac/firmware/cmd/PRU0_REV2_to_C66.cmd b/packages/ti/drv/icss_emac/firmware/cmd/PRU0_REV2_to_C66.cmd
new file mode 100755 (executable)
index 0000000..b656c67
--- /dev/null
@@ -0,0 +1,19 @@
+--host_image
+--image
+--host_image:target=C6000
+--host_image:endianness=little
+
+--host_image:hidden_symbols
+--host_image:show=shared_buf
+
+--exclude=.resource_table
+
+ROMS
+{
+   PAGE 0:
+      PRU0_REV2_IMEM: o=0x00000000 l=0x00001000
+
+   PAGE 1:
+      PRU0_REV2_DMEM: o=0x00000000 l=0x00001000
+      PRU0_REV2_EXT:  o=0x80000000 l=0x00001000
+}
diff --git a/packages/ti/drv/icss_emac/firmware/cmd/PRU1_REV1_to_ARM.cmd b/packages/ti/drv/icss_emac/firmware/cmd/PRU1_REV1_to_ARM.cmd
new file mode 100755 (executable)
index 0000000..d08f9cc
--- /dev/null
@@ -0,0 +1,19 @@
+--host_image
+--image
+--host_image:target=ARM
+--host_image:endianness=little
+
+--host_image:hidden_symbols
+--host_image:show=shared_buf
+
+--exclude=.resource_table
+
+ROMS
+{
+   PAGE 0:
+      PRU1_REV1_IMEM: o=0x00000000 l=0x00001000
+
+   PAGE 1:
+      PRU1_REV1_DMEM: o=0x00000000 l=0x00001000
+      PRU1_REV1_EXT:  o=0x80000000 l=0x00001000
+}
diff --git a/packages/ti/drv/icss_emac/firmware/cmd/PRU1_REV1_to_C66.cmd b/packages/ti/drv/icss_emac/firmware/cmd/PRU1_REV1_to_C66.cmd
new file mode 100755 (executable)
index 0000000..d7a134b
--- /dev/null
@@ -0,0 +1,19 @@
+--host_image
+--image
+--host_image:target=C6000
+--host_image:endianness=little
+
+--host_image:hidden_symbols
+--host_image:show=shared_buf
+
+--exclude=.resource_table
+
+ROMS
+{
+   PAGE 0:
+      PRU1_REV1_IMEM: o=0x00000000 l=0x00001000
+
+   PAGE 1:
+      PRU1_REV1_DMEM: o=0x00000000 l=0x00001000
+      PRU1_REV1_EXT:  o=0x80000000 l=0x00001000
+}
diff --git a/packages/ti/drv/icss_emac/firmware/cmd/PRU1_REV2_to_ARM.cmd b/packages/ti/drv/icss_emac/firmware/cmd/PRU1_REV2_to_ARM.cmd
new file mode 100755 (executable)
index 0000000..1e118e7
--- /dev/null
@@ -0,0 +1,19 @@
+--host_image
+--image
+--host_image:target=ARM
+--host_image:endianness=little
+
+--host_image:hidden_symbols
+--host_image:show=shared_buf
+
+--exclude=.resource_table
+
+ROMS
+{
+   PAGE 0:
+      PRU1_REV2_IMEM: o=0x00000000 l=0x00001000
+
+   PAGE 1:
+      PRU1_REV2_DMEM: o=0x00000000 l=0x00001000
+      PRU1_REV2_EXT:  o=0x80000000 l=0x00001000
+}
diff --git a/packages/ti/drv/icss_emac/firmware/cmd/PRU1_REV2_to_C66.cmd b/packages/ti/drv/icss_emac/firmware/cmd/PRU1_REV2_to_C66.cmd
new file mode 100755 (executable)
index 0000000..8da30d5
--- /dev/null
@@ -0,0 +1,19 @@
+--host_image
+--image
+--host_image:target=C6000
+--host_image:endianness=little
+
+--host_image:hidden_symbols
+--host_image:show=shared_buf
+
+--exclude=.resource_table
+
+ROMS
+{
+   PAGE 0:
+      PRU1_REV2_IMEM: o=0x00000000 l=0x00001000
+
+   PAGE 1:
+      PRU1_REV2_DMEM: o=0x00000000 l=0x00001000
+      PRU1_REV2_EXT:  o=0x80000000 l=0x00001000
+}
diff --git a/packages/ti/drv/icss_emac/firmware/cmd/lnk_a8_a9_a15_REV1.cmd b/packages/ti/drv/icss_emac/firmware/cmd/lnk_a8_a9_a15_REV1.cmd
new file mode 100755 (executable)
index 0000000..422b78b
--- /dev/null
@@ -0,0 +1,33 @@
+
+/* SPECIFY THE SYSTEM MEMORY MAP */
+SECTIONS
+{
+    PRU0_REV1_IMEM : {
+        pru_imem0_rev1_start = .;
+        KEEP(*(PRU0_REV1_IMEM))
+        pru_imem0_rev1_end = .;
+    } > APP_CACHED_DATA_BLK1_MEM
+    PRU0_REV1_DMEM : {
+        pru_dmem0_rev1_start = .;
+        KEEP (*(PRU0_REV1_DMEM))
+        pru_dmem0_rev1_end = .;
+    } > APP_CACHED_DATA_BLK1_MEM
+    PRU0_REV1_EXT : {
+        KEEP (*(PRU0_REV1_EXT))
+    } > APP_CACHED_DATA_BLK1_MEM
+    PRU1_REV1_IMEM : {
+        pru_imem1_rev1_start = .;
+        KEEP (*(PRU1_REV1_IMEM))
+        pru_imem1_rev1_end = .;
+    } > APP_CACHED_DATA_BLK1_MEM
+    PRU1_REV1_DMEM : {
+        pru_dmem1_rev1_start = .;
+        KEEP (*(PRU1_REV1_DMEM))
+        pru_dmem1_rev1_end = .;
+    } > APP_CACHED_DATA_BLK1_MEM
+    PRU1_REV1_EXT : {
+        KEEP (*(PRU1_REV1_EXT))
+    } > APP_CACHED_DATA_BLK1_MEM
+}
+
+
diff --git a/packages/ti/drv/icss_emac/firmware/cmd/lnk_a8_a9_a15_REV1_linux.cmd b/packages/ti/drv/icss_emac/firmware/cmd/lnk_a8_a9_a15_REV1_linux.cmd
new file mode 100644 (file)
index 0000000..1d441ff
--- /dev/null
@@ -0,0 +1,33 @@
+
+/* SPECIFY THE SYSTEM MEMORY MAP */
+SECTIONS
+{
+    PRU0_REV1_IMEM : {
+        pru_imem0_rev1_start = .;
+        KEEP(*(PRU0_REV1_IMEM))
+        pru_imem0_rev1_end = .;
+    }
+    PRU0_REV1_DMEM : {
+        pru_dmem0_rev1_start = .;
+        KEEP (*(PRU0_REV1_DMEM))
+        pru_dmem0_rev1_end = .;
+    }
+    PRU0_REV1_EXT : {
+        KEEP (*(PRU0_REV1_EXT))
+    }
+    PRU1_REV1_IMEM : {
+        pru_imem1_rev1_start = .;
+        KEEP (*(PRU1_REV1_IMEM))
+        pru_imem1_rev1_end = .;
+    }
+    PRU1_REV1_DMEM : {
+        pru_dmem1_rev1_start = .;
+        KEEP (*(PRU1_REV1_DMEM))
+        pru_dmem1_rev1_end = .;
+    }
+    PRU1_REV1_EXT : {
+        KEEP (*(PRU1_REV1_EXT))
+    }
+}
+
+
diff --git a/packages/ti/drv/icss_emac/firmware/cmd/lnk_a8_a9_a15_REV2.cmd b/packages/ti/drv/icss_emac/firmware/cmd/lnk_a8_a9_a15_REV2.cmd
new file mode 100755 (executable)
index 0000000..e1107a9
--- /dev/null
@@ -0,0 +1,33 @@
+
+/* SPECIFY THE SYSTEM MEMORY MAP */
+SECTIONS
+{
+    PRU0_REV2_IMEM : {
+        pru_imem0_rev2_start = .;
+        KEEP(*(PRU0_REV2_IMEM))
+        pru_imem0_rev2_end = .;
+    } > APP_CACHED_DATA_BLK1_MEM
+    PRU0_REV2_DMEM : {
+        pru_dmem0_rev2_start = .;
+        KEEP (*(PRU0_REV2_DMEM))
+        pru_dmem0_rev2_end = .;
+    } > APP_CACHED_DATA_BLK1_MEM
+    PRU0_REV2_EXT : {
+        KEEP (*(PRU0_REV2_EXT))
+    } > APP_CACHED_DATA_BLK1_MEM
+    PRU1_REV2_IMEM : {
+        pru_imem1_rev2_start = .;
+        KEEP (*(PRU1_REV2_IMEM))
+        pru_imem1_rev2_end = .;
+    } > APP_CACHED_DATA_BLK1_MEM
+    PRU1_REV2_DMEM : {
+        pru_dmem1_rev2_start = .;
+        KEEP (*(PRU1_REV2_DMEM))
+        pru_dmem1_rev2_end = .;
+    } > APP_CACHED_DATA_BLK1_MEM
+    PRU1_REV2_EXT : {
+        KEEP (*(PRU1_REV2_EXT))
+    } > APP_CACHED_DATA_BLK1_MEM
+}
+
+
diff --git a/packages/ti/drv/icss_emac/firmware/cmd/lnk_a8_a9_a15_REV2_linux.cmd b/packages/ti/drv/icss_emac/firmware/cmd/lnk_a8_a9_a15_REV2_linux.cmd
new file mode 100644 (file)
index 0000000..b133dc1
--- /dev/null
@@ -0,0 +1,33 @@
+
+/* SPECIFY THE SYSTEM MEMORY MAP */
+SECTIONS
+{
+    PRU0_REV2_IMEM : {
+        pru_imem0_rev2_start = .;
+        KEEP(*(PRU0_REV2_IMEM))
+        pru_imem0_rev2_end = .;
+    }
+    PRU0_REV2_DMEM : {
+        pru_dmem0_rev2_start = .;
+        KEEP (*(PRU0_REV2_DMEM))
+        pru_dmem0_rev2_end = .;
+    }
+    PRU0_REV2_EXT : {
+        KEEP (*(PRU0_REV2_EXT))
+    }
+    PRU1_REV2_IMEM : {
+        pru_imem1_rev2_start = .;
+        KEEP (*(PRU1_REV2_IMEM))
+        pru_imem1_rev2_end = .;
+    }
+    PRU1_REV2_DMEM : {
+        pru_dmem1_rev2_start = .;
+        KEEP (*(PRU1_REV2_DMEM))
+        pru_dmem1_rev2_end = .;
+    }
+    PRU1_REV2_EXT : {
+        KEEP (*(PRU1_REV2_EXT))
+    }
+}
+
+
diff --git a/packages/ti/drv/icss_emac/firmware/cmd/lnk_c66_m4_REV1.cmd b/packages/ti/drv/icss_emac/firmware/cmd/lnk_c66_m4_REV1.cmd
new file mode 100755 (executable)
index 0000000..8be91e1
--- /dev/null
@@ -0,0 +1,39 @@
+
+--retain="*(PRU0*)"
+--retain="*(PRU1*)"
+
+
+/* SPECIFY THE SYSTEM MEMORY MAP */
+SECTIONS
+{
+    PRU0_REV1_IMEM : {
+        pru_imem0_rev1_start = .;
+        *(PRU0_REV1_IMEM)
+        pru_imem0_rev1_end = .;
+    } > APP_CACHED_DATA_BLK1_MEM
+    PRU0_REV1_DMEM : {
+        pru_dmem0_rev1_start = .;
+        *(PRU0_REV1_DMEM)
+        pru_dmem0_rev1_end = .;
+    } > APP_CACHED_DATA_BLK1_MEM
+    PRU0_REV1_EXT : {
+        *(PRU0_REV1_EXT)
+    } > APP_CACHED_DATA_BLK1_MEM
+    PRU1_REV1_IMEM : {
+        pru_imem1_rev1_start = .;
+        *(PRU1_REV1_IMEM)
+        pru_imem1_rev1_end = .;
+    } > APP_CACHED_DATA_BLK1_MEM
+    PRU1_REV1_DMEM : {
+        pru_dmem1_rev1_start = .;
+        *(PRU1_REV1_DMEM)
+        pru_dmem1_rev1_end = .;
+    } > APP_CACHED_DATA_BLK1_MEM
+    PRU1_REV1_EXT : {
+        *(PRU1_REV1_EXT)
+    } > APP_CACHED_DATA_BLK1_MEM
+}
+
+
+
+
diff --git a/packages/ti/drv/icss_emac/firmware/cmd/lnk_c66_m4_REV2.cmd b/packages/ti/drv/icss_emac/firmware/cmd/lnk_c66_m4_REV2.cmd
new file mode 100755 (executable)
index 0000000..37d1c57
--- /dev/null
@@ -0,0 +1,39 @@
+
+--retain="*(PRU0*)"
+--retain="*(PRU1*)"
+
+
+/* SPECIFY THE SYSTEM MEMORY MAP */
+SECTIONS
+{
+    PRU0_REV2_IMEM : {
+        pru_imem0_rev2_start = .;
+        *(PRU0_REV2_IMEM)
+        pru_imem0_rev2_end = .;
+    } > APP_CACHED_DATA_BLK1_MEM
+    PRU0_REV2_DMEM : {
+        pru_dmem0_rev2_start = .;
+        *(PRU0_REV2_DMEM)
+        pru_dmem0_rev2_end = .;
+    } > APP_CACHED_DATA_BLK1_MEM
+    PRU0_REV2_EXT : {
+        *(PRU0_REV2_EXT)
+    } > APP_CACHED_DATA_BLK1_MEM
+    PRU1_REV2_IMEM : {
+        pru_imem1_rev2_start = .;
+        *(PRU1_REV2_IMEM)
+        pru_imem1_rev2_end = .;
+    } > APP_CACHED_DATA_BLK1_MEM
+    PRU1_REV2_DMEM : {
+        pru_dmem1_rev2_start = .;
+        *(PRU1_REV2_DMEM)
+        pru_dmem1_rev2_end = .;
+    } > APP_CACHED_DATA_BLK1_MEM
+    PRU1_REV2_EXT : {
+        *(PRU1_REV2_EXT)
+    } > APP_CACHED_DATA_BLK1_MEM
+}
+
+
+
+
diff --git a/packages/ti/drv/icss_emac/firmware/icss_dualemac/Makefile b/packages/ti/drv/icss_emac/firmware/icss_dualemac/Makefile
new file mode 100644 (file)
index 0000000..d4f02c2
--- /dev/null
@@ -0,0 +1,115 @@
+# standalone makefile for pru-icss-fw-emac
+CODEGEN_INCLUDE = $(CL_PRU_INSTALL_PATH)/include
+CODEGEN_BIN_INCLUDE = $(CL_PRU_INSTALL_PATH)/lib
+CCS_PRU_INCLUDE = $(SDK_INSTALL_PATH)/ccsv6/ccs_base/pru/include
+CC = $(CL_PRU_INSTALL_PATH)/bin/clpru
+AR = $(CL_PRU_INSTALL_PATH)/bin/arpru
+LNK = $(CL_PRU_INSTALL_PATH)/bin/clpru
+SIZE = $(CL_PRU_INSTALL_PATH)/bin/ofdpru
+STRIP = $(CL_PRU_INSTALL_PATH)/bin/strippru -p
+HEX = $(CL_PRU_INSTALL_PATH)/bin/hexpru
+
+HEX_LNKCMD_DIR = ../cmd
+
+SRCDIR += ./src
+INCDIR += ./src
+# Common source files across all platforms and cores
+SRCS += resource_table.c
+SRCS_ASM += micro_scheduler.asm emac_MII_Rcv.asm emac_MII_Xmt.asm emac_statistics.asm emac_tts.asm emac_ptp.asm
+
+LNKFLAGS_LOCAL_COMMON = --entry_point=micro_scheduler
+
+LNKCMD_FILE = $(SRCDIR)/pru.cmd
+
+# Internal CFLAGS - normally doesn't change
+CFLAGS_INTERNAL = -v3 -g --endian=$(ENDIAN)
+CFLAGS_INTERNAL += --diag_wrap=off --diag_warning=225 --display_error_number --hardware_mac=on --preproc_with_compile -eo.$(OBJEXT) 
+
+ENDIAN = little
+LNKFLAGS_INTERNAL_BUILD_PROFILE = -v3 -g --endian=$(ENDIAN) --diag_wrap=off --diag_warning=225 --display_error_number --hardware_mac=on -z --stack_size=0 --heap_size=0 --reread_libs --warn_sections
+
+VPATH = $(SRCDIR)
+OBJS = $(patsubst %.c, %.o, $(SRCS))
+OBJS_ASM = $(patsubst %.asm, %.o, $(SRCS_ASM))
+
+FW_NAME = icss_dualemac
+FW_ELF_EXT = .elf
+FW_BIN_EXT = .bin
+
+PRU_VERSION_LIST = REV1 REV2
+PRU_CORE_LIST = PRU0 PRU1
+PRU_HOST_LIST = ARM C66
+
+BASE_ELF_DIR = ./elf
+BASE_BIN_DIR = ./bin/$(PRU_HOST)
+ELF_DIR = $(BASE_ELF_DIR)/$(PRU_VERSION)
+BIN_DIR = $(BASE_BIN_DIR)/$(PRU_VERSION)
+HEX_LNKCMD_FILE = $(HEX_LNKCMD_DIR)/$(PRU_CORE)_$(PRU_VERSION)_to_$(PRU_HOST).cmd
+PRU_FIRMWARE_ELF = $(ELF_DIR)/$(FW_NAME)_$(PRU_CORE)$(FW_ELF_EXT)
+PRU_FIRMWARE_BIN = $(BIN_DIR)/$(FW_NAME)_$(PRU_CORE)$(FW_BIN_EXT)
+
+OBJEXT = opru
+OBJDIR = ./obj/$(PRU_VERSION)/$(PRU_CORE)
+OBJ_PATHS = $(patsubst %.c, $(OBJDIR)/%.$(OBJEXT), $(SRCS))
+OBJ_PATHS_ASM = $(patsubst %.asm, $(OBJDIR)/%.$(OBJEXT), $(SRCS_ASM))
+
+CFLAGS_DIROPTS = -fr=$(OBJDIR) -fs=$(OBJDIR)
+CFLAGS_PRU = -v3 -DICSS_$(PRU_VERSION) -D$(PRU_CORE) -DPRU -DTTS -DHALF_DUPLEX_ENABLED -DICSS_DUAL_EMAC_BUILD -DPTP
+
+CFLAGS = $(CFLAGS_PRU) $(CFLAGS_INTERNAL)
+INCLUDE_DIRS = $(INCDIR) $(CODEGEN_INCLUDE)
+INCLUDES = $(addprefix -I,$(INCLUDE_DIRS))
+LNKFLAGS =  $(LNKFLAGS_INTERNAL_BUILD_PROFILE) $(LNKFLAGS_LOCAL_COMMON)
+
+PRU_ALL_TARGET = _pru_versions
+PRU_FIRMWARE = $(PRU_FIRMWARE_ELF)
+ifneq ($(PRU_HOST_LIST),)
+    PRU_ALL_TARGET = _pru_hosts
+    PRU_FIRMWARE += $(PRU_FIRMWARE_BIN)
+endif
+
+
+# This sort of recursion does not work with parallel make
+.NOTPARALLEL:
+
+.PHONY: all _pru_revs _pru_cores $(PRU_VERSION_LIST) $(PRU_CORE_LIST) $(PRU_HOST_LIST)
+all: $(PRU_ALL_TARGET)
+
+_pru_hosts: $(PRU_HOST_LIST)
+_pru_versions: $(PRU_VERSION_LIST)
+_pru_cores: $(PRU_CORE_LIST)
+_pru_firmware: $(PRU_FIRMWARE)
+
+$(PRU_HOST_LIST) :
+       @$(MAKE) _pru_versions PRU_HOST=$@
+
+$(PRU_VERSION_LIST) :
+       @$(MAKE) _pru_cores PRU_VERSION=$@
+
+$(PRU_CORE_LIST) :
+       @$(MAKE) _pru_firmware PRU_CORE=$@
+
+
+$(OBJDIR) $(dir $(PRU_FIRMWARE_ELF) $(PRU_FIRMWARE_BIN)) :
+       mkdir -p $@
+
+$(OBJ_PATHS) : $(OBJDIR)/%.$(OBJEXT): %.c | $(OBJDIR) $(DEPDIR)
+       @echo "Compiling $< ... (PWD = $(PWD)"
+       @$(CC) $(CFLAGS) $(INCLUDES) $(CFLAGS_DIROPTS) $<
+
+$(OBJ_PATHS_ASM) : $(OBJDIR)/%.$(OBJEXT): %.asm | $(OBJDIR) $(DEPDIR)
+       @echo "Assembling $< ..."
+       @$(CC) $(CFLAGS) $(INCLUDES) $(CFLAGS_DIROPTS) $<
+
+$(PRU_FIRMWARE_ELF) : $(OBJ_PATHS_ASM) $(OBJ_PATHS) $(LNKCMD_FILE) | $(dir $(PRU_FIRMWARE_ELF))
+       @echo "Linking $^ into $@ ..."
+       @$(LNK) $(LNKFLAGS) $^ -o $@ -m $@.map --xml_link_info="$@_linkInfo.xml" $(LNK_INCLUDES)
+       @$(STRIP) $@
+
+$(PRU_FIRMWARE_BIN) : $(PRU_FIRMWARE_ELF) $(HEX_LNKCMD_FILE) | $(dir $(PRU_FIRMWARE_BIN))
+       $(HEX) $^ -o $@
+
+clean:
+       @find . -name "*\.$(OBJEXT)" -exec rm -v {} \;
+       @find . -type d -empty -delete
+       @rm -rf $(BIN_DIR) $(ELF_DIR)
diff --git a/packages/ti/drv/icss_emac/firmware/icss_dualemac/config/icss_emacFwConfig.c b/packages/ti/drv/icss_emac/firmware/icss_dualemac/config/icss_emacFwConfig.c
new file mode 100644 (file)
index 0000000..2109b71
--- /dev/null
@@ -0,0 +1,211 @@
+/*
+*  TEXAS INSTRUMENTS TEXT FILE LICENSE
+* 
+*   Copyright (c) 2017-2018 Texas Instruments Incorporated
+* 
+*  All rights reserved not granted herein.
+*  
+*  Limited License.  
+* 
+*  Texas Instruments Incorporated grants a world-wide, royalty-free, non-exclusive 
+*  license under copyrights and patents it now or hereafter owns or controls to 
+*  make, have made, use, import, offer to sell and sell ("Utilize") this software 
+*  subject to the terms herein.  With respect to the foregoing patent license, 
+*  such license is granted  solely to the extent that any such patent is necessary 
+*  to Utilize the software alone.  The patent license shall not apply to any 
+*  combinations which include this software, other than combinations with devices 
+*  manufactured by or for TI (“TI Devices”).  No hardware patent is licensed hereunder.
+* 
+*  Redistributions must preserve existing copyright notices and reproduce this license 
+*  (including the above copyright notice and the disclaimer and (if applicable) source 
+*  code license limitations below) in the documentation and/or other materials provided 
+*  with the distribution.
+*  
+*  Redistribution and use in binary form, without modification, are permitted provided 
+*  that the following conditions are met:
+*      No reverse engineering, decompilation, or disassembly of this software is 
+*   permitted with respect to any software provided in binary form.
+*      Any redistribution and use are licensed by TI for use only with TI Devices.
+*      Nothing shall obligate TI to provide you with source code for the software 
+*   licensed and provided to you in object code.
+*  
+*  If software source code is provided to you, modification and redistribution of the 
+*  source code are permitted provided that the following conditions are met:
+*      Any redistribution and use of the source code, including any resulting derivative 
+*   works, are licensed by TI for use only with TI Devices.
+*      Any redistribution and use of any object code compiled from the source code
+*   and any resulting derivative works, are licensed by TI for use only with TI Devices.
+* 
+*  Neither the name of Texas Instruments Incorporated nor the names of its suppliers 
+*  may be used to endorse or promote products derived from this software without 
+*  specific prior written permission.
+* 
+*  DISCLAIMER.
+* 
+*  THIS SOFTWARE IS PROVIDED BY TI AND TI’S LICENSORS "AS IS" AND ANY EXPRESS OR IMPLIED 
+*  WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY 
+*  AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL TI AND TI’S 
+*  LICENSORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 
+*  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
+*  GOODS OR SERVICES* LOSS OF USE, DATA, OR PROFITS* OR BUSINESS INTERRUPTION) HOWEVER 
+*  CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+*  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 
+*  EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/ 
+
+/**
+ * @file icss_emacFwConfig.c
+ * @brief ICSS-EMAC firmware configuration file which contain initializtion values for
+ *          static configuration parameters (read only) and dynamic configuration
+ *          parameters (read/write)
+ *
+ */
+
+
+/* ========================================================================== */
+/*                             Include Files                                  */
+/* ========================================================================== */
+
+#include <stdint.h>
+
+
+#include <ti/drv/icss_emac/firmware/icss_dualemac/config/icss_emacFwConfig.h>
+
+
+ICSS_EmacFwStaticMmap icss_emacFwStaticCfg[2] = {
+{
+    ICSS_EMAC_FW_RELEASE_1_OFFSET,
+    ICSS_EMAC_FW_RELEASE_2_OFFSET,
+    ICSS_EMAC_FW_FEATURE_OFFSET,
+    ICSS_EMAC_FW_RESERVED_FEATURE_OFFSET,
+    ICSS_EMAC_FW_STATISTICS_OFFSET,
+    ICSS_EMAC_FW_STAT_SIZE,
+    ICSS_EMAC_FW_STORM_PREVENTION_OFFSET,
+    ICSS_EMAC_FW_PHY_SPEED_OFFSET,
+    ICSS_EMAC_FW_PORT_STATUS_OFFSET,
+    ICSS_EMAC_FW_PORT_CONTROL_ADDR ,
+    ICSS_EMAC_FW_PORT_MAC_ADDR,
+    ICSS_EMAC_FW_RX_INT_STATUS_OFFSET,
+    ICSS_EMAC_FW_P0_QUEUE_DESC_OFFSET ,
+    ICSS_EMAC_FW_P0_COL_QUEUE_DESC_OFFSET,
+    ICSS_EMAC_FW_TTS_BASE_OFFSET,
+    ICSS_EMAC_FW_INTERFACE_MAC_ADDR_OFFSET,
+    ICSS_EMAC_FW_COLLISION_STATUS_ADDR,
+    ICSS_EMAC_FW_PROMISCUOUS_MODE_OFFSET
+},
+{
+    ICSS_EMAC_FW_RELEASE_1_OFFSET ,
+    ICSS_EMAC_FW_RELEASE_2_OFFSET,
+    ICSS_EMAC_FW_FEATURE_OFFSET,
+    ICSS_EMAC_FW_RESERVED_FEATURE_OFFSET,
+    ICSS_EMAC_FW_STATISTICS_OFFSET,
+    ICSS_EMAC_FW_STAT_SIZE,
+    ICSS_EMAC_FW_STORM_PREVENTION_OFFSET,
+    ICSS_EMAC_FW_PHY_SPEED_OFFSET,
+    ICSS_EMAC_FW_PORT_STATUS_OFFSET,
+    ICSS_EMAC_FW_PORT_CONTROL_ADDR ,
+    ICSS_EMAC_FW_PORT_MAC_ADDR,
+    ICSS_EMAC_FW_RX_INT_STATUS_OFFSET,
+    ICSS_EMAC_FW_P0_QUEUE_DESC_OFFSET ,
+    ICSS_EMAC_FW_P0_COL_QUEUE_DESC_OFFSET,
+    ICSS_EMAC_FW_TTS_BASE_OFFSET,
+    ICSS_EMAC_FW_INTERFACE_MAC_ADDR_OFFSET,
+    ICSS_EMAC_FW_COLLISION_STATUS_ADDR,
+    ICSS_EMAC_FW_PROMISCUOUS_MODE_OFFSET
+}
+};
+
+ICSS_EmacFwDynamicMmap icss_emacFwDynamicCfg = {
+    {ICSS_EMAC_FW_QUEUE_1_SIZE, ICSS_EMAC_FW_QUEUE_2_SIZE, ICSS_EMAC_FW_QUEUE_3_SIZE, ICSS_EMAC_FW_QUEUE_4_SIZE,
+     ICSS_EMAC_FW_QUEUE_5_SIZE, ICSS_EMAC_FW_QUEUE_6_SIZE, ICSS_EMAC_FW_QUEUE_7_SIZE, ICSS_EMAC_FW_QUEUE_8_SIZE,
+     ICSS_EMAC_FW_QUEUE_9_SIZE, ICSS_EMAC_FW_QUEUE_10_SIZE, ICSS_EMAC_FW_QUEUE_11_SIZE, ICSS_EMAC_FW_QUEUE_12_SIZE,
+     ICSS_EMAC_FW_QUEUE_13_SIZE, ICSS_EMAC_FW_QUEUE_14_SIZE, ICSS_EMAC_FW_QUEUE_15_SIZE, ICSS_EMAC_FW_QUEUE_16_SIZE},
+    {ICSS_EMAC_FW_HOST_QUEUE_1_SIZE, ICSS_EMAC_FW_HOST_QUEUE_2_SIZE, ICSS_EMAC_FW_HOST_QUEUE_3_SIZE, ICSS_EMAC_FW_HOST_QUEUE_4_SIZE,
+     ICSS_EMAC_FW_HOST_QUEUE_5_SIZE, ICSS_EMAC_FW_HOST_QUEUE_6_SIZE, ICSS_EMAC_FW_HOST_QUEUE_7_SIZE, ICSS_EMAC_FW_HOST_QUEUE_8_SIZE,
+     ICSS_EMAC_FW_HOST_QUEUE_9_SIZE, ICSS_EMAC_FW_HOST_QUEUE_10_SIZE, ICSS_EMAC_FW_HOST_QUEUE_11_SIZE, ICSS_EMAC_FW_HOST_QUEUE_12_SIZE,
+     ICSS_EMAC_FW_HOST_QUEUE_13_SIZE, ICSS_EMAC_FW_HOST_QUEUE_14_SIZE, ICSS_EMAC_FW_HOST_QUEUE_15_SIZE, ICSS_EMAC_FW_HOST_QUEUE_16_SIZE},
+    ICSS_EMAC_FW_COLLISION_QUEUE_SIZE,
+    ICSS_EMAC_FW_P0_BUFFER_DESC_OFFSET,
+    ICSS_EMAC_FW_P0_COL_BD_OFFSET ,
+    ICSS_EMAC_FW_HOST_P0_Q1_BUFFER_OFFSET,
+    ICSS_EMAC_FW_TX_QUEUES_BUFFER_OFFSET,
+    ICSS_EMAC_FW_P0_COL_BUFFER_OFFSET,
+    ICSS_EMAC_FW_HOST_Q1_RX_CONTEXT_OFFSET,
+    ICSS_EMAC_FW_SWITCH_P1_Q1_TX_CONTEXT_OFFSET,
+    ICSS_EMAC_FW_PORT_QUEUE_DESC_OFFSET,
+    ICSS_EMAC_FW_EMAC_Q1_TX_CONTEXT_OFFSET,
+    ICSS_EMAC_NUMBER_OF_QUEUES
+};
+
+/**
+ * \brief  This API gets the ICSS-EMAC  firmware Memory Map intial configuration
+ *
+ *  @param[in]  instance      PRU-ICSS instance
+ *  @param[in]  ppStaticMMap  Address of pointer to be set to static MMap configuration structure.
+ *  @param[in]  ppDynamicMMap Address of pointer to be set to dynamic MMap configuration structure.
+ *
+ * \return 0 success: -1: error
+ *
+ */
+int32_t icss_emacGetFwMMapInitConfig(uint32_t instance, ICSS_EmacFwStaticMmap **ppStaticMMap, ICSS_EmacFwDynamicMmap **ppDynamicMMap)
+{
+    int32_t ret = 0;
+    if ((ppStaticMMap == NULL) || (ppDynamicMMap == NULL))
+    {
+        ret = -1;
+    }
+    else if (instance < 2U)
+   {
+        *ppStaticMMap = &(icss_emacFwStaticCfg[instance]);
+        *ppDynamicMMap = &(icss_emacFwDynamicCfg);
+    }
+    else
+    {
+        ret = -1;
+    }
+    return ret;
+}
+
+
+
+
+/**
+ * \brief  This API sets the ICSS-EMAC firmware Memory Map intial configuration, this API MUST be
+ *         called prior to calling ICSS_EmacInit()
+ *
+ *  @param[in]  icssEmacHandle handle to ICSS_EMAC Instance
+ *  @param[in]  instance     PRU-ICSS instance
+ *  @param[in]  staticCfg       Pointer to ICSS-EMAC firmware Memory Map initial static config.
+ *  @param[in]  dynamicCfg       Pointer to ICSS-EMAC firmware Memory Map initial dynamic config.
+ *
+ * \return 0 success: -1: error
+ *
+ */
+int32_t icss_emacSetFwMMapInitConfig(ICSS_EmacHandle icssEmacHandle, uint32_t instance, ICSS_EmacFwStaticMmap *staticCfg, ICSS_EmacFwDynamicMmap *dynamicCfg)
+{
+    int32_t ret = 0;
+    ICSS_EmacFwStaticMmap *pStaticMMap;
+    ICSS_EmacFwDynamicMmap *pDynamicMMap;
+    if ((dynamicCfg == NULL) || (staticCfg == NULL))
+    {
+        ret = -1;
+    }
+    else
+    {
+        icss_emacFwDynamicCfg = *dynamicCfg;
+        icss_emacFwStaticCfg[instance] = *staticCfg;
+
+        /* Update LLD with configuration set */
+        pStaticMMap = (&((ICSS_EmacObject*)icssEmacHandle->object)->fwStaticMMap);
+        memcpy(pStaticMMap, &(icss_emacFwStaticCfg[instance]), sizeof(ICSS_EmacFwStaticMmap));
+        pDynamicMMap = (&((ICSS_EmacObject*)icssEmacHandle->object)->fwDynamicMMap);
+        memcpy(pDynamicMMap, &icss_emacFwDynamicCfg, sizeof(ICSS_EmacFwDynamicMmap));
+
+        /* Indicates to the LLD that firmware memory map configuration is complete */
+        ((ICSS_EmacObject*)icssEmacHandle->object)->fwMmapInitDone = ICSS_EMAC_FW_MMAP_INIT_DONE;
+    }
+    return ret;
+}
+
+
+
diff --git a/packages/ti/drv/icss_emac/firmware/icss_dualemac/config/icss_emacFwConfig.h b/packages/ti/drv/icss_emac/firmware/icss_dualemac/config/icss_emacFwConfig.h
new file mode 100644 (file)
index 0000000..610088c
--- /dev/null
@@ -0,0 +1,278 @@
+/*
+*  TEXAS INSTRUMENTS TEXT FILE LICENSE
+* 
+*   Copyright (c) 2017-2018 Texas Instruments Incorporated
+* 
+*  All rights reserved not granted herein.
+*  
+*  Limited License.  
+* 
+*  Texas Instruments Incorporated grants a world-wide, royalty-free, non-exclusive 
+*  license under copyrights and patents it now or hereafter owns or controls to 
+*  make, have made, use, import, offer to sell and sell ("Utilize") this software 
+*  subject to the terms herein.  With respect to the foregoing patent license, 
+*  such license is granted  solely to the extent that any such patent is necessary 
+*  to Utilize the software alone.  The patent license shall not apply to any 
+*  combinations which include this software, other than combinations with devices 
+*  manufactured by or for TI (“TI Devices”).  No hardware patent is licensed hereunder.
+* 
+*  Redistributions must preserve existing copyright notices and reproduce this license 
+*  (including the above copyright notice and the disclaimer and (if applicable) source 
+*  code license limitations below) in the documentation and/or other materials provided 
+*  with the distribution.
+*  
+*  Redistribution and use in binary form, without modification, are permitted provided 
+*  that the following conditions are met:
+*      No reverse engineering, decompilation, or disassembly of this software is 
+*   permitted with respect to any software provided in binary form.
+*      Any redistribution and use are licensed by TI for use only with TI Devices.
+*      Nothing shall obligate TI to provide you with source code for the software 
+*   licensed and provided to you in object code.
+*  
+*  If software source code is provided to you, modification and redistribution of the 
+*  source code are permitted provided that the following conditions are met:
+*      Any redistribution and use of the source code, including any resulting derivative 
+*   works, are licensed by TI for use only with TI Devices.
+*      Any redistribution and use of any object code compiled from the source code
+*   and any resulting derivative works, are licensed by TI for use only with TI Devices.
+* 
+*  Neither the name of Texas Instruments Incorporated nor the names of its suppliers 
+*  may be used to endorse or promote products derived from this software without 
+*  specific prior written permission.
+* 
+*  DISCLAIMER.
+* 
+*  THIS SOFTWARE IS PROVIDED BY TI AND TI’S LICENSORS "AS IS" AND ANY EXPRESS OR IMPLIED 
+*  WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY 
+*  AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL TI AND TI’S 
+*  LICENSORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 
+*  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
+*  GOODS OR SERVICES* LOSS OF USE, DATA, OR PROFITS* OR BUSINESS INTERRUPTION) HOWEVER 
+*  CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+*  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 
+*  EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/ 
+
+/*
+* file:   icss_emacFwConfig.h
+*
+* brief:  Definitions and mapping of Ethernet switch over PRU
+*         Includes: 
+*         1. Static FW Configuration paramters definition, static configuration is per PRU-ICSS instance
+*         2. Dynamic FW Configuration paramers
+*         3. Statistics
+*         4. Events for switch interaction
+*         5. Memory Map and Control Register definition
+*
+*/
+
+#ifndef ICSS_EMAC_FW_SWITCH__H
+#define ICSS_EMAC_FW_SWITCH__H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <ti/drv/icss_emac/icss_emacDrv.h>
+
+#define ICSS_EMAC_FW_BD_SIZE                         (4U)            /* one buffer descriptor is 4 bytes */
+#define ICSS_EMAC_FW_BLOCK_SIZE                      (32U)           /* bytes derived from ICSS architecture */
+
+
+/*Memory Usage of DRAM0/DRAM1 and Shared RAM */
+#define EMAC_SPECIFIC_DRAM_START_OFFSET         ((uint32_t)0x1E98U)
+#define SWITCH_SPECIFIC_SRAM_START_OFFSET       ((uint32_t)0x400U)
+#define SWITCH_SPECIFIC_DRAM1_START_OFFSET      ((uint32_t)0x1D00U)
+
+
+/* Queues on PHY PORT 1/2, setting max to 16, number of queues requird will depend on protocol/firmware,
+    for dual emac, 4 queues per port will be used */
+#define ICSS_EMAC_MAX_NUMBER_OF_QUEUES     ((uint32_t)16u)
+/* Default number of queues per Port */
+#define ICSS_EMAC_NUMBER_OF_QUEUES     ((uint32_t)4u)
+/* 48 blocks per max packet  */
+/* 2 full sized ETH packets: 96 blocks, 3 packets = 144, 4 packets = 192  */
+
+/* Physical Port queue size. Same for both ports  */
+#define ICSS_EMAC_FW_QUEUE_1_SIZE        (97U)           /* Network Management high  */
+#define ICSS_EMAC_FW_QUEUE_2_SIZE        (97U)       /* Network Management low  */
+#define ICSS_EMAC_FW_QUEUE_3_SIZE        (97U)       /* Protocol specific  */
+#define ICSS_EMAC_FW_QUEUE_4_SIZE        (97U)       /* NRT (IP,ARP, ICMP, ?)    */
+#define ICSS_EMAC_FW_QUEUE_5_SIZE        (0U)
+#define ICSS_EMAC_FW_QUEUE_6_SIZE        (0U)
+#define ICSS_EMAC_FW_QUEUE_7_SIZE        (0U)
+#define ICSS_EMAC_FW_QUEUE_8_SIZE        (0U)
+#define ICSS_EMAC_FW_QUEUE_9_SIZE        (0U)
+#define ICSS_EMAC_FW_QUEUE_10_SIZE        (0U)
+#define ICSS_EMAC_FW_QUEUE_11_SIZE        (0U)
+#define ICSS_EMAC_FW_QUEUE_12_SIZE        (0U)
+#define ICSS_EMAC_FW_QUEUE_13_SIZE        (0U)
+#define ICSS_EMAC_FW_QUEUE_14_SIZE        (0U)
+#define ICSS_EMAC_FW_QUEUE_15_SIZE        (0U)
+#define ICSS_EMAC_FW_QUEUE_16_SIZE        (0U)
+
+/* HOST PORT QUEUES can buffer up to 4 full sized frames per queue  */
+#define ICSS_EMAC_FW_HOST_QUEUE_1_SIZE       (194U)      /* Protocol and/or VLAN priority 7 and 6  */
+#define ICSS_EMAC_FW_HOST_QUEUE_2_SIZE       (194U)      /* Protocol mid  */
+#define ICSS_EMAC_FW_HOST_QUEUE_3_SIZE       (194U)      /* Protocol low  */
+#define ICSS_EMAC_FW_HOST_QUEUE_4_SIZE       (194U)      /* NRT (IP, ARP, ICMP ?)  */
+#define ICSS_EMAC_FW_HOST_QUEUE_5_SIZE       (0U)
+#define ICSS_EMAC_FW_HOST_QUEUE_6_SIZE       (0U)
+#define ICSS_EMAC_FW_HOST_QUEUE_7_SIZE       (0U)
+#define ICSS_EMAC_FW_HOST_QUEUE_8_SIZE       (0U)
+#define ICSS_EMAC_FW_HOST_QUEUE_9_SIZE       (0U)
+#define ICSS_EMAC_FW_HOST_QUEUE_10_SIZE       (0U)
+#define ICSS_EMAC_FW_HOST_QUEUE_11_SIZE       (0U)
+#define ICSS_EMAC_FW_HOST_QUEUE_12_SIZE       (0U)
+#define ICSS_EMAC_FW_HOST_QUEUE_13_SIZE       (0U)
+#define ICSS_EMAC_FW_HOST_QUEUE_14_SIZE       (0U)
+#define ICSS_EMAC_FW_HOST_QUEUE_15_SIZE       (0U)
+#define ICSS_EMAC_FW_HOST_QUEUE_16_SIZE       (0U)
+
+
+#define ICSS_EMAC_FW_COLLISION_QUEUE_SIZE    (48U)
+
+#define ICSS_EMAC_FW_P0_BUFFER_DESC_OFFSET   (SWITCH_SPECIFIC_SRAM_START_OFFSET)
+
+/* EMAC Firmware Version and Feature Information - Beginning of PRU0 and PRU1 DRAM */
+
+/* ICSS_EMAC_FW_FEATURE_OFFSET bitmap
+Bit 0 1: TTS support
+Bit 1 0 : MAC mode 1 : Switch Mode
+Bit 2 1: VLAN
+Bit 3 : 1 : Storm prevention
+Bit 4-Bit 7 : 0: No redundancy 1 : MRP 2 : DLR 3 : HSR 4 : PRP 5 : MRPD
+Bit 8-Bit 10 : PTP (0: None 1: IEEE1588 2: PTCP 3: gPTP)
+Bit 11 : Reserved
+Bit 12-Bit 14 : Number of queues -1
+Bit 15: Reserved
+Bit 16: 1: PROFINET( CPM/PPM)
+Bit 17: 1: DCP filer (PROFINET)
+Bit 18: 1: ARP filter (PROFINET)
+Bit 19: 1: PROMISCUOUS MODE ENABLE
+*/
+#define ICSS_EMAC_FW_FEATURE_OFFSET           (ICSS_EMAC_FW_RELEASE_2_OFFSET + 4U)
+
+/* Reserved for enhanced feature set, future use */
+#define ICSS_EMAC_FW_RESERVED_FEATURE_OFFSET (ICSS_EMAC_FW_FEATURE_OFFSET + 4U)
+
+
+/***************************************************************************
+*              General Purpose Statistics, these are present on both PRU0 and PRU1 DRAM
+****************************************************************************/
+/* Base statistics offset  */
+#define ICSS_EMAC_FW_STATISTICS_OFFSET           (0x1F00U)
+/*  Needs to be updated anytime a new statistic is added or existing statistics is no longer supported (removed).*/
+#define ICSS_EMAC_FW_STAT_SIZE               (0x90U)
+
+/* Offsets from ICSS_EMAC_FW_STATISTICS_OFFSET */
+#define ICSS_EMAC_FW_STORM_PREVENTION_OFFSET         (ICSS_EMAC_FW_STATISTICS_OFFSET + ICSS_EMAC_FW_STAT_SIZE)         /*4 bytes */
+#define ICSS_EMAC_FW_PHY_SPEED_OFFSET                (ICSS_EMAC_FW_STATISTICS_OFFSET + ICSS_EMAC_FW_STAT_SIZE + 4U)    /*4 bytes*/
+#define ICSS_EMAC_FW_PORT_STATUS_OFFSET              (ICSS_EMAC_FW_STATISTICS_OFFSET + ICSS_EMAC_FW_STAT_SIZE + 8U)    /*1 byte */
+#define ICSS_EMAC_FW_COLLISION_COUNTER               (ICSS_EMAC_FW_STATISTICS_OFFSET + ICSS_EMAC_FW_STAT_SIZE + 9U)    /*1 byte */
+#define ICSS_EMAC_FW_RX_PKT_SIZE_OFFSET              (ICSS_EMAC_FW_STATISTICS_OFFSET + ICSS_EMAC_FW_STAT_SIZE + 10U)   /*4 bytes */
+#define ICSS_EMAC_FW_PORT_CONTROL_ADDR               (ICSS_EMAC_FW_STATISTICS_OFFSET + ICSS_EMAC_FW_STAT_SIZE + 14U)   /*4 bytes   */
+#define ICSS_EMAC_FW_PORT_MAC_ADDR                   (ICSS_EMAC_FW_STATISTICS_OFFSET + ICSS_EMAC_FW_STAT_SIZE + 18U)   /*6 bytes   */
+#define ICSS_EMAC_FW_RX_INT_STATUS_OFFSET            (ICSS_EMAC_FW_STATISTICS_OFFSET + ICSS_EMAC_FW_STAT_SIZE + 24U)   /*1 byte */
+
+
+/* DRAM1 Offsets for Switch*/
+#define ICSS_EMAC_FW_P0_COL_QUEUE_DESC_OFFSET    (0x1E64U)      /* collision descriptor of port 0  */
+#define ICSS_EMAC_FW_P0_QUEUE_DESC_OFFSET    (0x1E7CU)           /* 4 queue descriptors for port 0 (host receive)  */
+
+#define ICSS_EMAC_FW_INTERFACE_MAC_ADDR_OFFSET              (0x1E58U)      /* Interface MAC Address  */
+#define ICSS_EMAC_FW_COLLISION_STATUS_ADDR       (0x1E60U)      /* Collision Status Register, P0: bit 0 is pending flag, bit 1..2 inidicates which queue,  */
+                                                       /* P1: bit 8 is pending flag, 9..10 is queue number  */
+                                                       /* p2: bit 16 is pending flag, 17..18 is queue number, remaining bits are 0.  */
+
+/*  DRAM Offsets for EMAC. Present on Both DRAM0 and DRAM1 */
+/* EMAC Time Triggered Send Base Offset Base, the following offsets are calcuated during init time by the driver, no changes expected in FW:
+    used by the driver, do not expect these offsets to change, same for all variants of Firmware 
+ *       ICSS_EMAC_TTS_CYCLE_START_OFFSET           (ICSS_EMAC_FW_TTS_BASE_OFFSET)
+ *       ICSS_EMAC_TTS_CYCLE_PERIOD_OFFSET          (ICSS_EMAC_TTS_CYCLE_START_OFFSET + 8U)
+ *       ICSS_EMAC_TTS_CFG_TIME_OFFSET              (ICSS_EMAC_TTS_CYCLE_PERIOD_OFFSET + 4U)
+ *       ICSS_EMAC_TTS_STATUS_OFFSET                (ICSS_EMAC_TTS_CFG_TIME_OFFSET + 4U)
+ *       ICSS_EMAC_TTS_MISSED_CYCLE_CNT_OFFSET      (ICSS_EMAC_TTS_STATUS_OFFSET + 4U)
+ *       ICSS_EMAC_TTS_PREV_TX_SOF                  (ICSS_EMAC_TTS_MISSED_CYCLE_CNT_OFFSET + 4U)  
+ *       ICSS_EMAC_TTS_CYC_TX_SOF                   (ICSS_EMAC_TTS_PREV_TX_SOF + 8U)
+*/
+#define ICSS_EMAC_FW_TTS_BASE_OFFSET                  (EMAC_SPECIFIC_DRAM_START_OFFSET)
+
+
+
+/* Used to calculate end of buffer bd offset, not part of Mmap configuration, local usage only */
+#define ICSS_EMAC_FW_HOST_BD_SIZE            ((ICSS_EMAC_FW_HOST_QUEUE_1_SIZE + ICSS_EMAC_FW_HOST_QUEUE_2_SIZE + ICSS_EMAC_FW_HOST_QUEUE_3_SIZE + ICSS_EMAC_FW_HOST_QUEUE_4_SIZE) * ICSS_EMAC_FW_BD_SIZE)
+#define ICSS_EMAC_FW_PORT_BD_SIZE            ((ICSS_EMAC_FW_QUEUE_1_SIZE + ICSS_EMAC_FW_QUEUE_2_SIZE + ICSS_EMAC_FW_QUEUE_3_SIZE + ICSS_EMAC_FW_QUEUE_4_SIZE) * 2U * ICSS_EMAC_FW_BD_SIZE)
+
+
+#define ICSS_EMAC_FW_EOF_BUFFER_BD           (ICSS_EMAC_FW_P0_BUFFER_DESC_OFFSET + ICSS_EMAC_FW_HOST_BD_SIZE + ICSS_EMAC_FW_PORT_BD_SIZE)
+#define ICSS_EMAC_FW_P0_COL_BD_OFFSET        (ICSS_EMAC_FW_EOF_BUFFER_BD)
+
+/*  Shared RAM offsets for EMAC, Q2/Q3/Q4 derived from Q1 */
+/* Host Port Rx Context OFFSET*/
+
+/* EMAC Firmware Version Information */
+#define ICSS_EMAC_FW_RELEASE_1_OFFSET                       (0U)
+#define ICSS_EMAC_FW_RELEASE_2_OFFSET                       (ICSS_EMAC_FW_RELEASE_1_OFFSET + 4U)
+
+#define ICSS_EMAC_FW_PROMISCUOUS_MODE_OFFSET                (ICSS_EMAC_FW_EOF_BUFFER_BD + 4U)
+#define ICSS_EMAC_FW_HOST_Q1_RX_CONTEXT_OFFSET              (ICSS_EMAC_FW_PROMISCUOUS_MODE_OFFSET + 4U)
+
+/*DRAM1 Offsets for EMAC */
+/*table offset for Port queue descriptors: 1 ports * 4 Queues * 2 byte offset = 8 bytes */
+#define ICSS_EMAC_FW_PORT_QUEUE_DESC_OFFSET              (EMAC_SPECIFIC_DRAM_START_OFFSET + 32U + 8U)                /* 4 queue descriptors for port tx. 32 bytes  */
+#define ICSS_EMAC_FW_EMAC_Q1_TX_CONTEXT_OFFSET           (ICSS_EMAC_FW_PORT_QUEUE_DESC_OFFSET + 32U)
+
+/*DRAM1 Offsets for Switch */
+/* TX/RX context offsets */
+/* Port 1  */
+#define ICSS_EMAC_FW_SWITCH_P1_Q1_TX_CONTEXT_OFFSET            (SWITCH_SPECIFIC_DRAM1_START_OFFSET)
+
+/* Memory Usage of L3 OCMC RAM */
+/* L3 64KB Memory - mainly buffer Pool
+ * put collision buffer at end of L3 memory. Simplifies PRU coding to be on same memory as queue buffer  
+    Note: Buffer queues for port 1 and port 2 are derived from base offset of Port 0*/
+#define ICSS_EMAC_FW_HOST_P0_Q1_BUFFER_OFFSET         (0x0000U)
+
+
+#define ICSS_EMAC_FW_P0_COL_BUFFER_OFFSET        (0xEE00U) /* 1536 byte collision buffer for port 0 send queue  */
+
+
+
+#define ICSS_EMAC_FW_TX_QUEUES_BUFFER_OFFSET   (0U)
+
+/**
+ * \brief  This API gets the ICSS-EMAC  firmware Memory Map intial configuration
+ *
+ *  @param[in]  instance      PRU-ICSS instance
+ *  @param[in]  ppStaticMMap  Address of pointer to be set to static MMap configuration structure.
+ *  @param[in]  ppDynamicMMap Address of pointer to be set to dynamic MMap configuration structure.
+ *
+ * \return 0 success: -1: error
+ *
+ */
+int32_t icss_emacGetFwMMapInitConfig(uint32_t instance, ICSS_EmacFwStaticMmap **ppStaticMMap, ICSS_EmacFwDynamicMmap **ppDynamicMMap);
+
+
+/**
+ * \brief  This API sets the ICSS-EMAC firmware Memory Map intial configuration, this API MUST be
+ *         called prior to calling ICSS_EmacInit()
+ *
+ *  @param[in]  icssEmacHandle handle to ICSS_EMAC Instance
+ *  @param[in]  instance     PRU-ICSS instance
+ *  @param[in]  staticCfg       Pointer to ICSS-EMAC firmware Memory Map initial static config.
+ *  @param[in]  dynamicCfg       Pointer to ICSS-EMAC firmware Memory Map initial dynamic config.
+ *
+ * \return 0 success: -1: error
+ *
+ */
+int32_t icss_emacSetFwMMapInitConfig(ICSS_EmacHandle icssEmacHandle, uint32_t instance, ICSS_EmacFwStaticMmap *staticCfg, ICSS_EmacFwDynamicMmap *dynamicCfg);
+
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif  /* ICSS_EMAC_FW_SWITCH__H */
+
diff --git a/packages/ti/drv/icss_emac/firmware/icss_dualemac/config/icss_emacFwVersion.h b/packages/ti/drv/icss_emac/firmware/icss_dualemac/config/icss_emacFwVersion.h
new file mode 100644 (file)
index 0000000..5ad6824
--- /dev/null
@@ -0,0 +1,99 @@
+/*
+*  TEXAS INSTRUMENTS TEXT FILE LICENSE
+* 
+*   Copyright (c) 2017-2018 Texas Instruments Incorporated
+* 
+*  All rights reserved not granted herein.
+*  
+*  Limited License.  
+* 
+*  Texas Instruments Incorporated grants a world-wide, royalty-free, non-exclusive 
+*  license under copyrights and patents it now or hereafter owns or controls to 
+*  make, have made, use, import, offer to sell and sell ("Utilize") this software 
+*  subject to the terms herein.  With respect to the foregoing patent license, 
+*  such license is granted  solely to the extent that any such patent is necessary 
+*  to Utilize the software alone.  The patent license shall not apply to any 
+*  combinations which include this software, other than combinations with devices 
+*  manufactured by or for TI (“TI Devices”).  No hardware patent is licensed hereunder.
+* 
+*  Redistributions must preserve existing copyright notices and reproduce this license 
+*  (including the above copyright notice and the disclaimer and (if applicable) source 
+*  code license limitations below) in the documentation and/or other materials provided 
+*  with the distribution.
+*  
+*  Redistribution and use in binary form, without modification, are permitted provided 
+*  that the following conditions are met:
+*      No reverse engineering, decompilation, or disassembly of this software is 
+*   permitted with respect to any software provided in binary form.
+*      Any redistribution and use are licensed by TI for use only with TI Devices.
+*      Nothing shall obligate TI to provide you with source code for the software 
+*   licensed and provided to you in object code.
+*  
+*  If software source code is provided to you, modification and redistribution of the 
+*  source code are permitted provided that the following conditions are met:
+*      Any redistribution and use of the source code, including any resulting derivative 
+*   works, are licensed by TI for use only with TI Devices.
+*      Any redistribution and use of any object code compiled from the source code
+*   and any resulting derivative works, are licensed by TI for use only with TI Devices.
+* 
+*  Neither the name of Texas Instruments Incorporated nor the names of its suppliers 
+*  may be used to endorse or promote products derived from this software without 
+*  specific prior written permission.
+* 
+*  DISCLAIMER.
+* 
+*  THIS SOFTWARE IS PROVIDED BY TI AND TI’S LICENSORS "AS IS" AND ANY EXPRESS OR IMPLIED 
+*  WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY 
+*  AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL TI AND TI’S 
+*  LICENSORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 
+*  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
+*  GOODS OR SERVICES* LOSS OF USE, DATA, OR PROFITS* OR BUSINESS INTERRUPTION) HOWEVER 
+*  CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+*  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 
+*  EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/ 
+
+/*
+* file:   icss_emacFwVersion.h
+*
+* brief:  Firmware versioning information 
+*/
+
+#ifndef ICSS_EMAC_FW_VERSION__H
+#define ICSS_EMAC_FW_VERSION__H
+
+#include <ti/drv/icss_emac/icss_emacDrv.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* FIRMWARE versioning information, must remain in sync with versioning of firmware release as specified in ti/drv/icss_emac/firmware/icss_dualemac/src/firmware_version.h */
+#define FIRMWARE_DEVICE_ICSS_REV1    ((uint32_t)0U)
+#define FIRMWARE_DEVICE_ICSS_REV2    ((uint32_t)1U)
+
+#define FIRMWARE_PROTOCOL_TYPE_ETHERNET_MAC    ((uint32_t)0x11)
+#define FIRMWARE_VERSION_INTERNAL     ((uint32_t)0U)
+#define FIRMWARE_VERSION_RELEASE      ((uint32_t)1U)
+
+#define FIRMWARE_VERSION_MAJOR        ((uint32_t)5U)
+#define FIRMWARE_VERSION_MINOR        ((uint32_t)2U)
+#define FIRMWARE_VERSION_BUILD        ((uint32_t)7U)
+
+
+#if defined(icev2AM335x) || defined(idkAM437x) || defined(iceAMIC110)
+#define ICSS_FIRMWARE_RELEASE_1     ((FIRMWARE_DEVICE_ICSS_REV1 << 8) | (FIRMWARE_PROTOCOL_TYPE_ETHERNET_MAC << 0))
+#else
+#define ICSS_FIRMWARE_RELEASE_1     ((FIRMWARE_DEVICE_ICSS_REV2 << 8) | (FIRMWARE_PROTOCOL_TYPE_ETHERNET_MAC << 0))
+
+#endif
+
+#define ICSS_FIRMWARE_RELEASE_2     ((FIRMWARE_VERSION_RELEASE << 31) | (FIRMWARE_VERSION_MAJOR << 24) | (FIRMWARE_VERSION_MINOR << 16) | (FIRMWARE_VERSION_BUILD << 0))
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif  /* ICSS_EMAC_FW_VERSION__H */
+
diff --git a/packages/ti/drv/icss_emac/firmware/icss_dualemac/docs/ICSS_DUAL_EMAC_Firmware_Design_Guide.doc b/packages/ti/drv/icss_emac/firmware/icss_dualemac/docs/ICSS_DUAL_EMAC_Firmware_Design_Guide.doc
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diff --git a/packages/ti/drv/icss_emac/firmware/icss_dualemac/docs/ICSS_DUAL_EMAC_Firmware_Design_Guide.pdf b/packages/ti/drv/icss_emac/firmware/icss_dualemac/docs/ICSS_DUAL_EMAC_Firmware_Design_Guide.pdf
new file mode 100644 (file)
index 0000000..a5392c8
Binary files /dev/null and b/packages/ti/drv/icss_emac/firmware/icss_dualemac/docs/ICSS_DUAL_EMAC_Firmware_Design_Guide.pdf differ
diff --git a/packages/ti/drv/icss_emac/firmware/icss_dualemac/make_all.mk b/packages/ti/drv/icss_emac/firmware/icss_dualemac/make_all.mk
new file mode 100644 (file)
index 0000000..c395183
--- /dev/null
@@ -0,0 +1,26 @@
+SOC_LIST = am335x am437x am571x am572x
+
+HOSTCORES_am335x = a8host
+HOSTCORES_am437x = a9host
+HOSTCORES_am571x = a15_0 ipu1_0 c66x
+HOSTCORES_am572x = a15_0 ipu1_0 c66x
+
+PRU_HOST_a8host = ARM
+PRU_HOST_a9host = ARM
+PRU_HOST_a15_0  = ARM
+PRU_HOST_ipu1_0 = ARM
+PRU_HOST_c66x   = C66
+
+PRU_VERSION_LIST_am335x = REV1
+PRU_VERSION_LIST_am437x = REV1
+PRU_VERSION_LIST_am571x = REV2
+PRU_VERSION_LIST_am572x = REV1 REV2
+
+all: $(SOC_LIST)
+_hosts: $(HOSTCORES_$(SOC))
+
+$(SOC_LIST):
+       $(MAKE) -f make_all.mk _hosts SOC=$@
+
+$(HOSTCORES_$(SOC)):
+       $(MAKE) _pru_versions BASE_BIN_DIR=./bin/$(SOC)/$@ PRU_VERSION_LIST="$(PRU_VERSION_LIST_$(SOC))" PRU_HOST=$(PRU_HOST_$@)
diff --git a/packages/ti/drv/icss_emac/firmware/icss_dualemac/src/README.txt b/packages/ti/drv/icss_emac/firmware/icss_dualemac/src/README.txt
new file mode 100644 (file)
index 0000000..74c8eb5
--- /dev/null
@@ -0,0 +1,63 @@
+The ICSS DUAL EMAC firmware consists of the following files:
+
+micro_scheduler.asm: contains the initialization routine and the main control loop. Performs following tasks:
+       PRU register initialization
+       Controls that state machine sequence in the main control loop. The following are the 3 states.
+            -> Recieve state (Rcv).
+                -> perform the Ethernet packets recieve functions.
+            -> Transmit state (Xmt).
+                -> perform the Ethernet packets transmit functions.
+            -> Statistics state (STAT).
+                -> perform the statistics calculation for packets drop or recieved.
+
+emac_MII_Rcv.asm: contains the packet recieve routines
+       Depending on the current recieve state, call one of the 3 recieve functions.
+            -> FN_RCV_FB.
+                -> Recieves the first 32 bytes at the SOF of the incoming packet.
+            -> FN_RCV_NB.
+                -> Recieves the next 32 bytes blocks inbetween SOF and EOF of the incoming packet.
+            -> FN_RCV_FB.
+                -> Recieves the last 32 bytes at the EOF of the incoming packet.
+
+emac_MII_Xmt.asm: contains the packet transmit routines
+       Depending on the current transmit state, call one of the 3 recieve functions.
+            -> FN_XMT_scheduler.
+                -> Check all the transmit queue for packets if any available starts transmitting the packets.
+            -> FN_XMT_queue.
+                -> Transmits the first 32 bytes TX L1 fifo .
+            -> XMT_queue.
+                -> Transmits the next 32 bytes TX L1 fifo.
+            -> FN_XMT_LB.
+                -> Transmits the last 32 bytes TX L1 fifo.
+
+emac_statistics.asm: increments the stats count for incoming and outgoing packets
+       Checks if an stats event is pending.
+            -> TX_INCREMENT_STAT_COUNTER
+                -> increments the stats count for TX events.
+            -> RX_INCREMENT_STAT_COUNTER
+                -> increments the stats count for RX events.
+       
+emac_tts.asm: Perform the TTS (TIME TRIGGERED SENT) function routine
+       Depending on the current TTS states does this following functions.
+            -> FN_TTS_IEP_CFG_PRE_ICSS_REV1/2.
+                -> configures the IEP timer registers.
+            -> FN_TTS_IEP_CFG_CLEAR.
+                -> clear IEP timer configuration.
+            -> FN_TTS_PKT_SIZE_CHECK_ICSS_REV1/2.
+                -> Check if the packet to be sent is within the permissible range.
+            ->FN_TTS_IEP_CMPCFG_ARBITRATION.
+                -> Semphore mechanics for acquiring sharable/common resources.
+            ->FN_TTS_EXIT_IEP_CMPCFG_ARBITRATION.
+                -> Semphore mechanics for releasing sharable/common resources.
+
+
+Prior to reviewing the ICSS DUAL EMAC firmware sources, its essenstial to have a good understanding of the PRU-ICSS subsystem and the PRU Assembly instruction set.
+
+In order to gain an understanding of the PRU-ICSSS subsystem please refer to the Technical reference manual for the respective SOC. 
+
+Link to PRU Assembly document: http://processors.wiki.ti.com/index.php/PRU_Assembly_Instructions
+
+Additional information abouthe PRU-ICSS subsystem can be found at: http://processors.wiki.ti.com/index.php/PRU-ICSS
+
+
+
diff --git a/packages/ti/drv/icss_emac/firmware/icss_dualemac/src/emac_MII_Rcv.asm b/packages/ti/drv/icss_emac/firmware/icss_dualemac/src/emac_MII_Rcv.asm
new file mode 100644 (file)
index 0000000..3ad4966
--- /dev/null
@@ -0,0 +1,1754 @@
+;
+;  TEXAS INSTRUMENTS TEXT FILE LICENSE
+; 
+;   Copyright (c) 2017-2019 Texas Instruments Incorporated
+; 
+;  All rights reserved not granted herein.
+;  
+;  Limited License.  
+; 
+;  Texas Instruments Incorporated grants a world-wide, royalty-free, non-exclusive 
+;  license under copyrights and patents it now or hereafter owns or controls to 
+;  make, have made, use, import, offer to sell and sell ("Utilize") this software 
+;  subject to the terms herein.  With respect to the foregoing patent license, 
+;  such license is granted  solely to the extent that any such patent is necessary 
+;  to Utilize the software alone.  The patent license shall not apply to any 
+;  combinations which include this software, other than combinations with devices 
+;  manufactured by or for TI (“TI Devices”).  No hardware patent is licensed hereunder.
+; 
+;  Redistributions must preserve existing copyright notices and reproduce this license 
+;  (including the above copyright notice and the disclaimer and (if applicable) source 
+;  code license limitations below) in the documentation and/or other materials provided 
+;  with the distribution.
+;  
+;  Redistribution and use in binary form, without modification, are permitted provided 
+;  that the following conditions are met:
+;      No reverse engineering, decompilation, or disassembly of this software is 
+;   permitted with respect to any software provided in binary form.
+;      Any redistribution and use are licensed by TI for use only with TI Devices.
+;      Nothing shall obligate TI to provide you with source code for the software 
+;   licensed and provided to you in object code.
+;  
+;  If software source code is provided to you, modification and redistribution of the 
+;  source code are permitted provided that the following conditions are met:
+;      Any redistribution and use of the source code, including any resulting derivative 
+;   works, are licensed by TI for use only with TI Devices.
+;      Any redistribution and use of any object code compiled from the source code
+;   and any resulting derivative works, are licensed by TI for use only with TI Devices.
+; 
+;  Neither the name of Texas Instruments Incorporated nor the names of its suppliers 
+;  may be used to endorse or promote products derived from this software without 
+;  specific prior written permission.
+; 
+;  DISCLAIMER.
+; 
+;  THIS SOFTWARE IS PROVIDED BY TI AND TI’S LICENSORS "AS IS" AND ANY EXPRESS OR IMPLIED 
+;  WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY 
+;  AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL TI AND TI’S 
+;  LICENSORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 
+;  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
+;  GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 
+;  CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+;  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 
+;  EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+; 
+; file:   emac_MII_Rcv.asm
+;
+; brief:  Receive Task
+;
+;
+;  (C) Copyright 2017, Texas Instruments, Inc
+;
+;
+    
+    .if !$defined("__mii_rcv_p")       
+__mii_rcv_p    .set    1       
+    
+;;///////////////////////////////////////////////////////
+; Includes Section
+;;///////////////////////////////////////////////////////
+    .include "emac_MII_Rcv.h"
+    .include "icss_macros.h"
+;      .include "icss_regs.h"
+    .if $defined("ICSS_SWITCH_BUILD")
+    .include "icss_switch_macros.h"
+    .endif
+    .include "micro_scheduler.h"
+    .include "emac_MII_Xmt.h"
+    .include "icss_miirt_regs.h"
+
+    .if $defined(PTP)
+    .include "icss_ptp.h"
+    .include "icss_ptp_macro.h"
+    .cdecls C,NOLIST
+%{
+#include "icss_timeSync_memory_map.h"
+%}
+    .endif ;PTP
+
+        .global  FN_RCV_FB
+        .global  FN_RCV_NB
+        .global  FN_RCV_LB
+        .global  XMT_QUEUE
+        .global  TASK_EXECUTION_FINISHED
+        .global  FN_TIMESTAMP_GPTP_PACKET
+
+    
+;****************************************************************************
+;
+;     NAME             : FN_RCV_FB
+;     DESCRIPTION      : receives the first block of data from new frame (out of RX L2)
+;     RETURNS          : 
+;     ARGS             : 
+;     USES             : 
+;     INVOKES          : 
+;
+;****************************************************************************
+FN_RCV_FB:
+    ; Data is already present in the registers. So, no need to read it again.
+    
+    ZERO       &MII_RCV, $sizeof(MII_RCV)      ; init MII_RCV parameter
+    ; OPT: Possible to make them both context next to each other
+    .if    $defined("TWO_PORT_CFG")    
+    ZERO    &MII_RCV_PORT, $sizeof(MII_RCV_PORT)    ; init MII_RCV parameter  (R14....R17)
+    .endif
+    ; Check if RX port is enabled (information provided by host)
+    LDI        R10.w0 , PORT_CONTROL_ADDR
+    LBCO       &R10, PRU_DMEM_ADDR, R10.w0, 10 ; 4 + 6 bytes of Interface MAC Addr
+    
+    ; OPT: Port can be disabled directly in the MII Hardware
+    ; Is port enabled?
+    QBBC       EXIT_FB, R10, 0
+    
+    
+CONTINUE_PROCESSING:
+    ; set Rcv_active flag to indicate an ongoing reception
+    SET        R23 , R23 , Rcv_active 
+    
+;*********************************Check for Errors*****************************************
+;******************************************************************************************    
+    .if $defined("ICSS_DUAL_EMAC_BUILD")
+;check for SFD Errors    
+    .if $defined("HALF_DUPLEX_ENABLED")        
+; below code not needed for Full Duple
+    .if $defined("PRU0")       
+    LBCO       &RCV_TEMP_REG_3.b0, MII_RT_CFG_CONST, ICSS_MIIRT_RXERR0, 1      ;read the PRUSS_MII_RT_RX_ERR0 register 
+    QBBC       CHECK_FOR_SHORT_SFD, RCV_TEMP_REG_3, 1      ; check for any error if not then jump else continue
+    ;clear error and writeback
+    SET        RCV_TEMP_REG_3 , RCV_TEMP_REG_3 , 1
+    SBCO       &RCV_TEMP_REG_3.b0, MII_RT_CFG_CONST, ICSS_MIIRT_RXERR0, 1
+    QBA     COUNT_SFD_ERROR
+CHECK_FOR_SHORT_SFD:            
+    QBBC       CONTINUE_PROCESSING_PKT, RCV_TEMP_REG_3, 0      ; check for any error if not then jump else continue
+    ;clear error and writeback
+    SET        RCV_TEMP_REG_3 , RCV_TEMP_REG_3 , 0 
+    SBCO       &RCV_TEMP_REG_3.b0, MII_RT_CFG_CONST, ICSS_MIIRT_RXERR0, 1      
+    QBA     COUNT_SFD_ERROR
+    .else
+    LBCO       &RCV_TEMP_REG_3.b0, MII_RT_CFG_CONST, ICSS_MIIRT_RXERR1, 1      ;read the PRUSS_MII_RT_RX_ERR0 register 
+    QBBC       CHECK_FOR_SHORT_SFD, RCV_TEMP_REG_3, 1      ; check for any error if not then jump else continue
+    ;clear error and writeback
+    SET        RCV_TEMP_REG_3 , RCV_TEMP_REG_3 , 1 
+    SBCO       &RCV_TEMP_REG_3.b0, MII_RT_CFG_CONST, ICSS_MIIRT_RXERR1, 1      
+    QBA     COUNT_SFD_ERROR
+CHECK_FOR_SHORT_SFD:            
+    QBBC       CONTINUE_PROCESSING_PKT, RCV_TEMP_REG_3, 0      ; check for any error if not then jump else continue
+    ;clear error and writeback
+    SET        RCV_TEMP_REG_3 , RCV_TEMP_REG_3 , 0 
+    SBCO       &RCV_TEMP_REG_3.b0, MII_RT_CFG_CONST, ICSS_MIIRT_RXERR1, 1      
+    QBA     COUNT_SFD_ERROR
+    .endif
+    
+    ;check R31 bit 19 for error
+    QBBC       CONTINUE_PROCESSING_PKT, R31, 19
+    ;clear the error
+    M_CMD16 D_RX_ERROR_CLEAR
+    
+    ;set error flag
+    LDI        RCV_TEMP_REG_3 , RX_ERROR_OFFSET
+    QBA     COUNT_RX_STATS
+    ; Check if SA matches with Slave's Interface MAC addr
+    .endif  ;HALF_DUPLEX_ENABLED
+    .endif  ;ICSS_DUAL_EMAC_BUILD
+CONTINUE_PROCESSING_PKT:
+    
+    QBNE       FB_SA_NO_MATCH_INTERFACE_MAC, Ethernet.SrcAddr_01, R11.w0       ;Check if Source Address matches with own address
+    QBNE       FB_SA_NO_MATCH_INTERFACE_MAC, Ethernet.SrcAddr_23, R11.w2       ;Source Address is stored into 3 words (16 bits)
+    QBNE       FB_SA_NO_MATCH_INTERFACE_MAC, Ethernet.SrcAddr_45, R12.w0       
+    LDI        RCV_TEMP_REG_3 , RX_DROPPED_FRAMES_OFFSET       ; else drop frame and increase the stats
+    QBA     COUNT_RX_STATS
+    ;QBA     EXIT_FB
+    .if $defined("HALF_DUPLEX_ENABLED")        
+COUNT_SFD_ERROR:
+    LDI        RCV_TEMP_REG_3 , SFD_ERROR_OFFSET
+    .endif     ;HALF_DUPLEX_ENABLED
+    
+COUNT_RX_STATS:
+;count statistics based on offset set in RCV_TEMP_REG_3
+    LBCO       &RCV_TEMP_REG_2, PRU_DMEM_ADDR, RCV_TEMP_REG_3, 4       
+    ADD        RCV_TEMP_REG_2, RCV_TEMP_REG_2, 1       
+    SBCO       &RCV_TEMP_REG_2, PRU_DMEM_ADDR, RCV_TEMP_REG_3, 4       
+EXIT_FB:
+    SET        MII_RCV.rx_flags , MII_RCV.rx_flags , rx_frame_error_shift
+    QBA        FB_DONE
+    
+FB_SA_NO_MATCH_INTERFACE_MAC:
+    .if $defined(PTP)
+    M_GPTP_CHECK_AND_SET_FLAGS 
+    .endif ;PTP
+    ; optimize the program memory by loading the promiscuous mode offset
+    ; before jumping to multicast or broadcast packet check
+    ; this would save loading the same when needed to check to bypass 
+    ; the storm prevention later when promiscuous mode is enabled
+    .if $defined("ICSS_DUAL_EMAC_BUILD")
+        LDI    RCV_TEMP_REG_3.w0 , ICSS_EMAC_FIRMWARE_PROMISCUOUS_MODE_OFFSET
+        LBCO   &RCV_TEMP_REG_2, ICSS_SHARED_CONST, RCV_TEMP_REG_3.w0, 4
+    .endif
+    ; check for multi-cast
+    QBBS       FB_MULTI_OR_BROADCAST, EthByte.DstByte_0, 0         ; check if packet is Multi/Broad cast type
+    
+;*********************************
+; uni-cast handling
+;*********************************
+FB_UNICAST:
+    
+FB_UNICAST_SA_NO_MATCH:
+    .if $defined("ICSS_DUAL_EMAC_BUILD")
+        QBBS   FB_PROMISCUOUS_MODE_ENABLE, RCV_TEMP_REG_2, ICSS_EMAC_PROMISCOUS_BIT
+    .endif
+    ; check if DA matches with our Interface MAC address
+    QBNE       FB_UNICAST_DA_NO_MATCH, Ethernet.DstAddr_0123, R11      ;Check if Destination Address matches with own address
+    QBNE       FB_UNICAST_DA_NO_MATCH, Ethernet.DstAddr_45, R12.w0     
+
+FB_PROMISCUOUS_MODE_ENABLE:
+    ; the frame DST address matches with our own address
+    SET        MII_RCV.rx_flags , MII_RCV.rx_flags , host_rcv_flag_shift ; set flag that host queue will receive data
+    .if    $defined("TWO_PORT_CFG")
+    QBA                FB_LT_VT
+    .else
+    QBA                FB_LT_VT_2
+    .endif
+    
+FB_UNICAST_DA_NO_MATCH:
+         ; else drop frame and increase the stats
+    .if    $defined("TWO_PORT_CFG")
+    QBA        FB_UNICAST_CHECK_CT
+    .else
+    LDI        RCV_TEMP_REG_3 , RX_DROPPED_FRAMES_OFFSET
+    QBA     COUNT_RX_STATS
+    .endif
+;*********************************
+; multicast/broadcast handling
+;*********************************
+FB_MULTI_OR_BROADCAST:         ; detected a multi-cast or broadcast frame
+    ; since the RCV_TEMP_REG_2 has the feature bit information set
+    ; for checking the promiscuous mode bit is enabled or not
+    ; skip the storm prevention for Multicast and Broadcast packets
+    ; here similar to unicast packets when promiscuous mode is enabled
+    .if $defined("ICSS_DUAL_EMAC_BUILD")
+        QBBS   FB_CONTINUE, RCV_TEMP_REG_2, ICSS_EMAC_PROMISCOUS_BIT
+    .endif
+;Do storm prevention here
+    LDI        RCV_TEMP_REG_3 , STORM_PREVENTION_OFFSET
+    LBCO       &RCV_TEMP_REG_2, PRU_DMEM_ADDR, RCV_TEMP_REG_3, 4       ; load the current storm prevent count 
+    QBBC       FB_CONTINUE, RCV_TEMP_REG_2, 0
+    LSR        RCV_TEMP_REG_2, RCV_TEMP_REG_2, 8       
+    QBGT       FB_DISCARD, RCV_TEMP_REG_2.w0, 1        ; check if the counter is less than zero and discard packet
+    SUB        RCV_TEMP_REG_2, RCV_TEMP_REG_2, 1       
+    LSL        RCV_TEMP_REG_2, RCV_TEMP_REG_2, 8       
+    SET        RCV_TEMP_REG_2 , RCV_TEMP_REG_2 , 0 
+    SBCO       &RCV_TEMP_REG_2, PRU_DMEM_ADDR, RCV_TEMP_REG_3, 4       
+    JMP     FB_CONTINUE
+    
+FB_DISCARD:
+;discard packet transmission if the credits for broadcast expire and update the statistic for the same
+    
+    LDI        RCV_TEMP_REG_3 , STORM_PREVENTION_COUNTER
+    QBA        COUNT_RX_STATS
+    
+FB_CONTINUE:
+    FILL       &RCV_TEMP_REG_1, 4   ; Fill with 0xffffffff
+    QBNE       FB_MULTICAST, Ethernet.DstAddr_0123, RCV_TEMP_REG_1     ; compare if Dest_addr_0123 match with boardcast
+    QBNE       FB_MULTICAST, Ethernet.DstAddr_45, RCV_TEMP_REG_1.w0    
+    
+FB_BROADCAST:
+    SET        R22 , R22 , RX_BC_FRAME      ; set broad-cast bit to indicate the broadcast frame 
+    SET        MII_RCV.rx_flags , MII_RCV.rx_flags , host_rcv_flag_shift
+    QBA        FB_BROADCAST_CHECK_CT
+    
+FB_MULTICAST:
+    SET        MII_RCV.rx_flags , MII_RCV.rx_flags , host_rcv_flag_shift
+    SET        R22 , R22 , RX_MC_FRAME      ; set multi-cast bit to indicate the multicast frame 
+
+    .if $defined("ICSS_DUAL_EMAC_BUILD")
+        ; check if multicast filtering is enabled or not i.e. check MULTICAST_CONTROL_BIT in PRU1 data memory
+        LDI     RCV_TEMP_REG_3.w0, ICSS_EMAC_FW_MULTICAST_FILTER_CTRL_OFFSET
+        LBCO    &RCV_TEMP_REG_3.b0, PRU_DMEM_ADDR, RCV_TEMP_REG_3.w0, 1
+        QBEQ    FB_MULTICAST_CONTINUE, RCV_TEMP_REG_3.b0, ICSS_EMAC_FW_MULTICAST_FILTER_CTRL_DISABLED    ; one byte field : 0 -> multicast filtering disabled | 1 -> multicast filtering enabled
+
+        ; search in multicast table to determine if host receive is to be enabled or not for the incoming multicast frame
+        M_MULTICAST_TABLE_SEARCH_OP
+        ; QBA     FB_MULTICAST_CONTINUE
+    .endif
+    
+FB_MULTICAST_CONTINUE:
+FB_UNICAST_CHECK_CT:
+FB_BROADCAST_CHECK_CT:
+    .if $defined("ICSS_DUAL_EMAC_BUILD")
+        ; check if VLAN filtering is enabled or not i.e. check VLAN_FLTR_CTRL_SHIFT in VLAN_FLTR_CTRL_BYTE stored in data memory
+        LDI     RCV_TEMP_REG_3.w0, ICSS_EMAC_FW_VLAN_FILTER_CTRL_BITMAP_OFFSET
+        LBCO    &RCV_TEMP_REG_3.b0, PRU_DMEM_ADDR, RCV_TEMP_REG_3.w0, 1
+    ;-----------------------------------------------------------
+    ;   VLAN_FLTR_CTRL_BYTE  |          |          |           | R13 | RCV_TEMP_REG_3
+    ;-----------------------------------------------------------
+        QBBC    FB_SKIP_VLAN_FLTR, RCV_TEMP_REG_3.b0, ICSS_EMAC_FW_VLAN_FILTER_CTRL_ENABLE_BIT   ; one bit field | 0 : VLAN filter disabled | 1 : VLAN filter enabled
+
+        ; search in VLAN table to determine if host receive is to be enabled or not for the incoming frame
+        M_VLAN_FLTR_SRCH_OP
+
+FB_SKIP_VLAN_FLTR:
+    .endif
+
+    .if    $defined("TWO_PORT_CFG")
+    QBBS    FB_NO_CT, R23, 0 ;Xmt_active            ; check if we can set cut-through
+    QBBC    FB_NO_CT, R22, 31 ;PACKET_TX_ALLOWED
+    QBA        FB_CT_HANDLING
+    
+FB_NO_CT:
+    SET        MII_RCV.rx_flags, MII_RCV.rx_flags, fwd_flag_shift    ;MII_RCV.rx_flags.fwd_flag
+    JMP        FB_LT_VT
+FB_CT_HANDLING:
+  SET        MII_RCV.tx_flags, MII_RCV.tx_flags, cut_through_flag_shift    ;MII_RCV.tx_flags.cut_through_flag
+FB_LT_VT:
+    
+;check link on other port
+    QBBS       FB_EGRESS_LINK_UP, R22, 10       ;replaced: QBBS    FB_EGRESS_LINK_UP, OPPOSITE_PORT_LINK_UP 
+        
+; OPT: See whether they can be moved next to each other
+    CLR        MII_RCV.rx_flags, MII_RCV.rx_flags, fwd_flag_shift
+    CLR        MII_RCV.tx_flags, MII_RCV.tx_flags, cut_through_flag_shift
+    
+    ;If host receive flag is not set then increment statistics for dropped frames
+    QBBS        FB_EGRESS_LINK_UP, MII_RCV.rx_flags, host_rcv_flag_shift
+    LDI         RCV_TEMP_REG_3, RX_DROPPED_FRAMES_OFFSET
+    CLR         R22, R22, RX_BC_FRAME
+    CLR         R22, R22, RX_MC_FRAME
+    LBCO    &RCV_TEMP_REG_2, PRU_DMEM_ADDR, RCV_TEMP_REG_3, 4
+    ADD     RCV_TEMP_REG_2, RCV_TEMP_REG_2, 1
+    SBCO    &RCV_TEMP_REG_2, PRU_DMEM_ADDR, RCV_TEMP_REG_3, 4
+    
+    
+FB_EGRESS_LINK_UP:
+  
+    QBBC    FB_LT_VT_2, MII_RCV.tx_flags, cut_through_flag_shift
+    
+    LDI        CUT_THROUGH_BYTE_CNT, 0x0000
+
+    ; Insert first 12 bytes in the TX FIFO of opposit
+    .if $defined("ICSS_REV1")
+    LDI        TX_DATA_WORD_MASK , 0xffff
+    AND TX_DATA_BYTE , BUFFER.b0 , BUFFER.b0
+    M_PUSH_BYTE
+    AND TX_DATA_BYTE , BUFFER.b1 , BUFFER.b1
+    M_PUSH_BYTE
+
+    ;MOV               loop_cnt, 2
+    LDI        TX_DATA_POINTER, buffer_ptr + 2 
+    loop       FB_RCV_EndLoop_1, 2
+    MVIW       TX_DATA_WORD, *TX_DATA_POINTER  
+    M_PUSH_WORD_CMD
+    ADD        TX_DATA_POINTER, TX_DATA_POINTER, 2     
+FB_RCV_EndLoop_1:
+    .endif
+    .if $defined("ICSS_REV2")
+    LDI        TX_DATA_POINTER, buffer_ptr
+    loop    FB_RCV_EndLoop_1, 3
+    MVID    TX_DATA_DOUBLE_WORD, *TX_DATA_POINTER
+    ADD        TX_DATA_POINTER, TX_DATA_POINTER, 4
+FB_RCV_EndLoop_1:
+    .endif
+    .endif ;TWO_PORT_CFG
+FB_LT_VT_2: ; Quality of service --> select RX queue priority based on Ethernet frame tags
+    
+    XIN        RX_L2_BANK0_ID, &R18, RANGE_R18_b0      ; XIN RX L2 bank 0 R18 value
+    XIN        RX_L2_BANK0_ID, &R2, RANGE_R2_R13       ; XIN RX L2 bank 0 R2 - R13 value    
+
+    .if $defined(PTP)
+    M_GPTP_ASSIGN_QOS 
+    .endif ;PTP
+    
+    .if    $defined("TWO_PORT_CFG")    
+; The naming of the QoS queue goes from 1..4, but we need to count from 0..3
+    LDI        MII_RCV.qos_queue, 4-1    ; default (lowest priority) queue is 4
+
+FB_QOS_APPLY_RULES:
+    LDI        RCV_TEMP_REG_1.w0, 0x0081        ; 0x8100 --> indicates QOS tagged frame
+    QBNE    FB_QOS_DONE, Ethernet.TPID, RCV_TEMP_REG_1.w0
+    LSR        RCV_TEMP_REG_1.b0, R5.b2, 5        ; extract PCP info. FIXME: clpru : Ethernet.TCI.b0 -> R5.b2
+    QBGT    FB_QOS_CHECK_FOR_PRIO2, RCV_TEMP_REG_1.b0, 6    ; PCP == 7/6
+    LDI        MII_RCV.qos_queue, 1-1    ; highest priority is 1, select queue 1
+  
+  QBA        FB_QOS_DONE
+FB_QOS_CHECK_FOR_PRIO2:
+    QBGT    FB_QOS_CHECK_FOR_PRIO3, RCV_TEMP_REG_1.b0, 4    ; PCP == 5/4
+    LDI        MII_RCV.qos_queue, 2-1    ; priority is 2, select queue 2
+    QBA        FB_QOS_DONE
+FB_QOS_CHECK_FOR_PRIO3:
+    QBGT    FB_QOS_DONE, RCV_TEMP_REG_1.b0, 2    ; PCP == 3/2
+    LDI        MII_RCV.qos_queue, 3-1    ; priority is 3, select queue 3
+  QBA        FB_QOS_DONE
+; if PCP == 1/0, this priority 4, default queue already selected
+FB_QOS_LOADED:
+FB_QOS_DONE:
+FB_DONE:
+    .else
+    .if $defined("PRU0")       
+; The naming of the QoS queue goes from 1..4, but we need to count from 0..3
+    LDI        MII_RCV.qos_queue, 2-1  ; default (lowest priority) queue is 2 for PRU0 
+    .else
+    LDI        MII_RCV.qos_queue, 4-1  ; default (lowest priority) queue is 4  for PRU1
+    .endif
+    
+FB_QOS_APPLY_RULES:
+    LDI        RCV_TEMP_REG_1.w0, 0x0081       ; 0x8100 --> indicates QOS tagged frame
+    QBNE       FB_QOS_DONE, Ethernet.TPID, RCV_TEMP_REG_1.w0
+        LSR    RCV_TEMP_REG_1.b0, Ethernet.TCI.x_b.b0, 5       ; extract PCP info
+
+    .if $defined("PRU0")       
+    QBGT       FB_QOS_DONE, RCV_TEMP_REG_1.b0, 4       ; PCP == 7/6
+    LDI        MII_RCV.qos_queue, 1-1  ; highest priority is 1, select queue 1
+    .else
+    QBGT       FB_QOS_DONE, RCV_TEMP_REG_1.b0, 4       ; PCP == 7/6
+    LDI        MII_RCV.qos_queue, 3-1  ; highest priority is 3, select queue 3
+    .endif
+    QBA                FB_QOS_DONE
+    
+; if PCP == 1/0, this priority 4, default queue already selected
+FB_QOS_LOADED:
+FB_QOS_DONE:
+FB_DONE:
+    .endif ;TWO_PORT_CFG
+    
+    .if    $defined("TWO_PORT_CFG")
+    ;Check if cut-through bit is set ..if yes then push 10 more bytes in Tx_fifo and remain in Rx_Task itself
+    ; OPT : Below bytes can be pushed early in the Profinet
+    QBBC    FB_DONE_NORMAL, MII_RCV.tx_flags, cut_through_flag_shift    ; is cut-through flag set?
+  ; We enter the task with 14 bytes but here we always have 16 bytes even for non HSR frames
+    .if $defined("ICSS_REV1")
+    loop       FB_RCV_EndLoop_2, 5
+    MVIW       TX_DATA_WORD, *TX_DATA_POINTER  
+    M_PUSH_WORD_CMD
+    ADD        TX_DATA_POINTER, TX_DATA_POINTER, 2     
+FB_RCV_EndLoop_2:
+    .endif
+    .if $defined("ICSS_REV2")
+    MVID    TX_DATA_DOUBLE_WORD, *TX_DATA_POINTER
+    ADD        TX_DATA_POINTER, TX_DATA_POINTER, 4
+    .endif
+    
+    LDI        PREVIOUS_R18_RCV_BYTECOUNT, 16
+    ADD        CUT_THROUGH_BYTE_CNT, CUT_THROUGH_BYTE_CNT, 16
+
+FB_DONE_NORMAL:    
+    .endif
+; Fill the rcv context with host/port queue base pointer, rd_ptr and wrk_pointer
+    QBNE       FB_CHECK_QUEUE_2, MII_RCV.qos_queue,  0
+    .if    $defined("TWO_PORT_CFG")
+    LDI        RX_CONTEXT_OFFSET, P0_Q1_RX_CONTEXT_OFFSET
+
+        .if    $defined("PRU0")    
+        LDI        RX_PORT_CONTEXT_OFFSET, P2_Q1_RX_CONTEXT_OFFSET
+        .else
+        LDI        RX_PORT_CONTEXT_OFFSET, P1_Q1_RX_CONTEXT_OFFSET
+        .endif    
+    .else
+    LDI        RX_CONTEXT_OFFSET , HOST_Q1_RX_CONTEXT_OFFSET       ; Select queue based on QOS
+    .endif
+    QBA        Initialize_rcv_context
+    
+    ;end_buffer_desc_offset
+FB_CHECK_QUEUE_2:
+    QBNE       FB_CHECK_QUEUE_3, MII_RCV.qos_queue,  1
+    .if    $defined("TWO_PORT_CFG")
+    LDI        RX_CONTEXT_OFFSET, P0_Q2_RX_CONTEXT_OFFSET
+        .if    $defined("PRU0")    
+        LDI        RX_PORT_CONTEXT_OFFSET, P2_Q2_RX_CONTEXT_OFFSET
+        .else
+        LDI        RX_PORT_CONTEXT_OFFSET, P1_Q2_RX_CONTEXT_OFFSET
+        .endif
+
+    .else
+    LDI        RX_CONTEXT_OFFSET , HOST_Q2_RX_CONTEXT_OFFSET       ; Select queue based on QOS
+    .endif
+    QBA        Initialize_rcv_context
+    
+FB_CHECK_QUEUE_3:
+    QBNE       FB_CHECK_QUEUE_4, MII_RCV.qos_queue,  2
+    .if    $defined("TWO_PORT_CFG")
+
+    LDI        RX_CONTEXT_OFFSET, P0_Q3_RX_CONTEXT_OFFSET
+
+        .if    $defined("PRU0")    
+        LDI        RX_PORT_CONTEXT_OFFSET, P2_Q3_RX_CONTEXT_OFFSET
+        .else
+        LDI        RX_PORT_CONTEXT_OFFSET, P1_Q3_RX_CONTEXT_OFFSET
+        .endif    
+
+    .else
+    LDI        RX_CONTEXT_OFFSET , HOST_Q3_RX_CONTEXT_OFFSET       ; Select queue based on QOS
+    .endif
+    QBA        Initialize_rcv_context
+    
+FB_CHECK_QUEUE_4:
+    .if    $defined("TWO_PORT_CFG")
+
+    LDI        RX_CONTEXT_OFFSET, P0_Q4_RX_CONTEXT_OFFSET
+        .if    $defined("PRU0")    
+        LDI        RX_PORT_CONTEXT_OFFSET, P2_Q4_RX_CONTEXT_OFFSET
+        .else
+        LDI        RX_PORT_CONTEXT_OFFSET, P1_Q4_RX_CONTEXT_OFFSET
+        .endif    
+    .else
+    LDI        RX_CONTEXT_OFFSET , HOST_Q4_RX_CONTEXT_OFFSET       ; Select queue based on QOS
+    .endif
+    
+Initialize_rcv_context:
+    QBBC       FB_FILL_RCV_CONTEXT_PORT_QUEUE, MII_RCV.rx_flags, host_rcv_flag_shift
+    ; Read the RX Context of Host Port of 8 bytes
+    .if    $defined("TWO_PORT_CFG")
+    LBCO     &MII_RCV.base_buffer_index, PRU1_DMEM_CONST, RX_CONTEXT_OFFSET, 8
+    .else
+    LBCO       &MII_RCV.base_buffer_index, ICSS_SHARED_CONST, RX_CONTEXT_OFFSET, 8     
+    .endif
+    
+FB_FILL_RCV_CONTEXT_PORT_QUEUE:
+    .if    $defined("TWO_PORT_CFG")
+
+    QBBC    FB_PKT_NOT_FORWARDED, MII_RCV.rx_flags, fwd_flag_shift
+    ; Read the RX Context of Port of 8 bytes
+    LBCO     &MII_RCV_PORT.base_buffer_index, PRU1_DMEM_CONST, RX_PORT_CONTEXT_OFFSET, 8
+FB_PKT_NOT_FORWARDED:
+    .endif ;TWO_PORT_CFG
+    ; OPT: If R0.b0 is not changed then remove below instruction. it is to make sure at R0.b0 is 0
+    LDI        R0.b0, SHIFT_NONE       
+    .if $defined("PRU0")       
+    XOUT       BANK1, &MII_RCV, $sizeof(MII_RCV)       ; store task parameters in parameter bank
+    .else
+    XOUT       BANK2, &MII_RCV, $sizeof(MII_RCV)       ; store task parameters in parameter bank
+    .endif
+    .if    $defined("TWO_PORT_CFG")
+    .if    $defined("PRU0")    
+    LDI        R0.b0, SHIFT_R14_TO_R0
+    XOUT    BANK0, &MII_RCV_PORT, $sizeof(MII_RCV_PORT)        ; store task parameters in parameter bank
+    .else
+    LDI        R0.b0, SHIFT_R14_TO_R4
+    XOUT    BANK0, &MII_RCV_PORT, $sizeof(MII_RCV_PORT)        ; store task parameters in parameter bank
+    .endif
+
+
+    QBBS    FN_RCV_NB, MII_RCV.tx_flags, cut_through_flag_shift
+    .endif ;TWO_PORT_CFG
+    
+    .if $defined("ICSS_DUAL_EMAC_BUILD")
+    ;The following check is required in case of firmware lag
+    ;when the firmware runs late compared to RX L2 FIFO.
+    ;This was being experienced in Profinet Switch and the same is possible here.
+    ;Haven't been able to reproduce this in EMAC.
+    XIN        RX_L2_BANK0_ID, &R18, RANGE_R18_b0      
+    QBGT       FB_RCV_EXIT, R18.b0, 32 
+    LDI        CURRENT_TASK_POINTER, TX_TASK_POINTER   
+    JMP        FN_RCV_NB
+    .endif
+    
+FB_RCV_EXIT:
+    JMP        CALL_REG        
+    
+    
+;****************************************************************************
+;
+;     NAME             : FN_RCV_NB
+;     DESCRIPTION      : receives the next 32Byte block of RX L2
+;     RETURNS          : 
+;     ARGS             : 
+;     USES             : 
+;     INVOKES          : 
+;
+;****************************************************************************
+FN_RCV_NB:
+    
+    ; for XIN, make sure that shift is set to 0
+    LDI        R0.b0, SHIFT_NONE       
+    ; restore task parameters in parameter bank
+    .if $defined("PRU0")       
+    XIN        BANK1, &MII_RCV, $sizeof(MII_RCV)       
+    .else
+    XIN        BANK2, &MII_RCV, $sizeof(MII_RCV)       
+    .endif
+    .if    $defined("TWO_PORT_CFG")
+    ;parameters for Port Receive
+    ; OPT: Move it after the XIN of data
+    .if    $defined("PRU0")
+    LDI        R0.b0, SHIFT_R14_TO_R0
+    XIN        BANK0, &MII_RCV_PORT, $sizeof(MII_RCV_PORT)
+    .else
+    LDI        R0.b0, SHIFT_R14_TO_R4
+    XIN        BANK0, &MII_RCV_PORT, $sizeof(MII_RCV_PORT)
+    .endif    
+    .endif
+    ; this task is getting called by MS, first check is to see if we are currently receiving
+    QBBC       NB_DONE_NO_PARAM_STORE, R23, Rcv_active
+    QBBS       NB_DONE_NO_PARAM_STORE, MII_RCV.rx_flags, rx_frame_error_shift
+    
+FN_RCV_NB_CT_NO_RxEOF:          ; If Rx EOF has not come yet then directly return here ..saves 6 cycles and that helps in finding faster
+                                ;     that L2 fifo has received 32 or 64 bytes ..which helps in calling NB_PROCESS_32BYTES early
+    ; depending on the bank index, we load bank 0 or bank 1
+    QBBS       NB_XIN_UPPER_BANK, MII_RCV.rx_flags, rx_bank_index_shift
+    
+NB_XIN_LOWER_BANK:
+    ; OPT: Just one XIN is needed
+    XIN        RX_L2_BANK0_ID, &R18, RANGE_R18_b0      
+    XIN        RX_L2_BANK0_ID, &R2, RANGE_R2_R13       ; XIN RX L2 bank 0
+    QBA        NB_CHECK_AMOUNT_OF_BYTES
+NB_XIN_UPPER_BANK:
+    ; OPT: Just one XIN is needed
+    XIN        RX_L2_BANK1_ID, &R18, RANGE_R18_b0      
+    XIN        RX_L2_BANK1_ID, &R2, RANGE_R2_R13       ; XIN RX L2 bank 1
+    
+NB_CHECK_AMOUNT_OF_BYTES:
+    .if $defined("ICSS_SWITCH_BUILD")
+    QBBC    check_for_32bytes, MII_RCV.tx_flags, cut_through_flag_shift    ;MII_RCV.tx_flags.cut_through_flag
+    SUB        RCV_TEMP_REG_1, R18_RCV_BYTECOUNT, PREVIOUS_R18_RCV_BYTECOUNT
+    .if $defined("ICSS_REV1")
+    QBGT       NB_DONE, RCV_TEMP_REG_1, 2      
+    
+NB_PUSH_NEXT_WORD_TO_FIFO:
+    QBEQ       check_for_32bytes, R1.b3, 0x28  
+    ADD        PREVIOUS_R18_RCV_BYTECOUNT, PREVIOUS_R18_RCV_BYTECOUNT, 2       
+    MVIW       TX_DATA_WORD, *R1.b3    
+    M_PUSH_WORD_CMD
+    ADD        CUT_THROUGH_BYTE_CNT, CUT_THROUGH_BYTE_CNT, 2   
+    ADD        R1.b3, R1.b3, 2 
+    SUB        RCV_TEMP_REG_1, RCV_TEMP_REG_1, 2       
+    QBLE       NB_PUSH_NEXT_WORD_TO_FIFO, RCV_TEMP_REG_1, 2    
+    .endif
+    .if $defined("ICSS_REV2")
+    QBGT    NB_DONE, RCV_TEMP_REG_1, 4
+    
+NB_PUSH_NEXT_DOUBLE_WORD_TO_FIFO:
+    QBEQ    check_for_32bytes, R1.b3, 0x28
+    ADD        PREVIOUS_R18_RCV_BYTECOUNT, PREVIOUS_R18_RCV_BYTECOUNT, 4
+    MVID    TX_DATA_DOUBLE_WORD, *R1.b3
+    ADD        CUT_THROUGH_BYTE_CNT, CUT_THROUGH_BYTE_CNT, 4
+    ADD        R1.b3, R1.b3, 4
+    SUB        RCV_TEMP_REG_1, RCV_TEMP_REG_1, 4
+    QBLE    NB_PUSH_NEXT_DOUBLE_WORD_TO_FIFO,     RCV_TEMP_REG_1, 4
+    .endif
+check_for_32bytes:    
+    .endif
+    QBBS       NB_CHECK_AMOUNT_OF_BYTES_BIGGER_32_BANK1, MII_RCV.rx_flags, rx_bank_index_shift   ; check which bank to read
+    
+    ; for bank 0, R18.b0 >=32 bytes
+    QBGT       NB_DONE, R18_RCV_BYTECOUNT, 32  
+    ;LDI       R1.b3, buffer_ptr
+    QBA        NB_PROCESS_32BYTES
+    
+NB_CHECK_AMOUNT_OF_BYTES_BIGGER_32_BANK1:
+    
+    ; for bank 1, R18.b0 <32 bytes
+    QBLE       NB_DONE, R18_RCV_BYTECOUNT, 32
+    
+    .if $defined("ICSS_SWITCH_BUILD")
+    QBBC    NB_PROCESS_32BYTES_CT, MII_RCV.tx_flags, cut_through_flag_shift    ;MII_RCV.tx_flags.cut_through_flag
+    QBEQ    NB_PROCESS_32BYTES_CT, R1.b3, 0x28
+    .if $defined("ICSS_REV1")
+    MVIW       TX_DATA_WORD, *R1.b3    
+    M_PUSH_WORD_CMD
+    ADD        CUT_THROUGH_BYTE_CNT, CUT_THROUGH_BYTE_CNT, 2   
+    .endif
+    .if $defined("ICSS_REV2")
+    MVID    TX_DATA_DOUBLE_WORD, *R1.b3
+    ADD        CUT_THROUGH_BYTE_CNT, CUT_THROUGH_BYTE_CNT, 4
+    .endif
+NB_PROCESS_32BYTES_CT:
+    .endif
+    LDI        PREVIOUS_R18_RCV_BYTECOUNT, 0x00        
+    
+;***********************************
+; 32 bytes handling, no cut through
+;***********************************
+NB_PROCESS_32BYTES:    ; 32 Bytes of new data are in the buffer
+    
+    LDI        R1.b3, buffer_ptr       ; load the buffer pointer       
+    
+NB_PROCESS_CHECK_BYTE_CNTR:
+    ; if this is the first 32 bytes of data, need to init the buffer queues
+    QBNE       NB_PROCESS_32BYTES_CHECK_FLAGS, MII_RCV.byte_cntr, 0
+    
+    .if $defined("ICSS_SWITCH_BUILD")
+    .if    $defined("TWO_PORT_CFG")
+    QBNE    NB_PROCESS_32BYTES_CHECK_FLAGS, MII_RCV_PORT.byte_cntr, 0
+    .endif ;TWO_PORT_CFG    
+  QBBC    NB_PROCESS_32BYTES_INIT_PORT_QUEUE, MII_RCV.rx_flags, host_rcv_flag_shift    ;MII_RCV.rx_flags.host_rcv_flag
+  
+NB_PROCESS_32BYTES_INIT_HOST_QUEUE:
+    .if    $defined("TWO_PORT_CFG")
+    LDI        RCV_TEMP_REG_3.w0, P0_QUEUE_DESC_OFFSET
+    LDI        RCV_TEMP_REG_3.w2, P0_COL_QUEUE_DESC_OFFSET
+    ; Calling for host queue
+    LDI        RCV_TEMP_REG_1.b1, 0
+    ; get queue
+    JAL        CALL_REG, FN_QUEUE_ARBITRATION  
+    ;RCV_TEMP_REG_1.b0 --> OUTPUT: returns information if the queue has been 
+    ;aquired successful ((0-failed to aquire; 1-queue; 2-collision)
+    QBNE    NB_PROCESS_32BYTES_INIT_HOST_QUEUE_OK, RCV_TEMP_REG_1.b0, 0 
+    ; OPT: Can't fail
+NB_PROCESS_32BYTES_INIT_HOST_QUEUE_FAILED:
+    ; clear host receive flag
+    CLR        MII_RCV.rx_flags, MII_RCV.rx_flags, host_rcv_flag_shift
+  
+    ; ToDo: Do we need to add code for statistics? We should never fail to aquire the queue or the coll-queue
+    QBA        NB_PROCESS_32BYTES_INIT_PORT_QUEUE
+NB_PROCESS_32BYTES_INIT_HOST_QUEUE_OK:
+    ;CLR        MII_RCV.rx_flags.host_collision_queue_selected         ; ToDo: this could be removed when parameter are init with 0 at b/o frame
+    ; 2-collision selected?
+    QBNE    NB_PROCESS_32BYTES_INIT_HOST_QUEUE_NO_COLL_SELECTED, RCV_TEMP_REG_1.b0, COLLISION_AQUIRED
+     
+    ; Initialize the RCV CONTEXT with the data of Host Collision Queue
+    SET        MII_RCV.rx_flags, MII_RCV.rx_flags, host_collision_queue_selected_shift
+    LDI        RCV_TEMP_REG_1.w0, COL_RX_CONTEXT_P0_OFFSET_ADDR
+    LBCO    &MII_RCV.buffer_index, PRU1_DMEM_CONST, RCV_TEMP_REG_1.w0, 10
+    .endif ;TWO_PORT_CFG
+NB_PROCESS_32BYTES_INIT_HOST_QUEUE_NO_COLL_SELECTED:
+    .endif
+    ;Initialize the wrkng_wr_ptr and rd_ptr here as the other PRU might have changed them between Now and RCV_FB
+    LBCO       &RCV_QUEUE_DESC_REG, QUEUE_DESP_BASE, MII_RCV.rcv_queue_pointer, 4      
+    AND MII_RCV.rd_ptr , RCV_QUEUE_DESC_REG.rd_ptr , RCV_QUEUE_DESC_REG.rd_ptr
+    AND MII_RCV.wrkng_wr_ptr , RCV_QUEUE_DESC_REG.wr_ptr , RCV_QUEUE_DESC_REG.wr_ptr
+
+    ; Rx interrupt pacing
+    ; If the rd_ptr & wr_ptr are equal => queue is empty => SET HOST_QUEUE_EMPTY_STATUS 
+    QBNE    HOST_QUEUE_NOT_EMPTY, RCV_QUEUE_DESC_REG.rd_ptr, RCV_QUEUE_DESC_REG.wr_ptr
+    SET     R22, R22, HOST_QUEUE_EMPTY_STATUS
+
+HOST_QUEUE_NOT_EMPTY:
+    .if    $defined("TWO_PORT_CFG")
+    QBBS    NB_RCV_CONTEXT_INITIALIZED_WITH_COLLISION, MII_RCV.rx_flags, host_collision_queue_selected_shift
+    .endif ;TWO_PORT_CFG
+    ; Compute the adress in L3 RAM where the packet is received
+    SUB        RCV_BUFFER_DESC_OFFSET, MII_RCV.wrkng_wr_ptr, MII_RCV.base_buffer_desc_offset   
+    LSL        RCV_BUFFER_DESC_OFFSET, RCV_BUFFER_DESC_OFFSET, 3       
+    ADD        MII_RCV.buffer_index, MII_RCV.base_buffer_index, RCV_BUFFER_DESC_OFFSET 
+    
+    .if $defined("ICSS_SWITCH_BUILD")
+NB_RCV_CONTEXT_INITIALIZED_WITH_COLLISION:    
+
+NB_PROCESS_32BYTES_INIT_PORT_QUEUE:
+    ; check if selected    
+    .if    $defined("TWO_PORT_CFG")
+
+  QBBC    NB_PROCESS_32BYTES_CHECK_FLAGS, MII_RCV.rx_flags, fwd_flag_shift
+  
+    .if    $defined("PRU0")    
+    LDI        RCV_TEMP_REG_3.w0, P2_QUEUE_DESC_OFFSET
+    LDI        RCV_TEMP_REG_3.w2, P2_COL_QUEUE_DESC_OFFSET
+    .else
+    LDI        RCV_TEMP_REG_3.w0, P1_QUEUE_DESC_OFFSET
+    LDI        RCV_TEMP_REG_3.w2, P1_COL_QUEUE_DESC_OFFSET
+    .endif    
+    ; get queue
+    ;CALL    FN_QUEUE_ARBITRATION_PORT_RCV
+    ; Calling for port queue
+    LDI        RCV_TEMP_REG_1.b1, 1
+    JAL        CALL_REG, FN_QUEUE_ARBITRATION  
+    ;RCV_TEMP_REG_1.b0 --> OUTPUT: returns information if the queue has 
+    ;been acquired successful ((0-failed to acquire; 1-queue; 2-collision)
+    QBNE    NB_PROCESS_32BYTES_INIT_PORT_QUEUE_OK, RCV_TEMP_REG_1.b0, 0 
+    ; OPT: Can't fail
+NB_PROCESS_32BYTES_INIT_PORT_QUEUE_FAILED:
+  
+  
+  ; clear port receive flag
+    CLR        MII_RCV.rx_flags, MII_RCV.rx_flags, fwd_flag_shift
+    ; ToDo: Do we need to add code for statistics? We should never fail to aquire the queue or the coll-queue
+    QBA        NB_PROCESS_32BYTES_CHECK_FLAGS
+NB_PROCESS_32BYTES_INIT_PORT_QUEUE_OK:
+    ;CLR        MII_RCV.rx_flags.port_collision_queue_selected         ; ToDo: this could be removed when parameter are init with 0 at b/o frame
+    ; 2-collision selected?
+    QBNE    NB_PROCESS_32BYTES_INIT_PORT_QUEUE_NO_COLL_SELECTED, RCV_TEMP_REG_1.b0, 2
+    
+    ; Initialize the RCV CONTEXT with the data of Port Collision Queue
+    SET        MII_RCV.rx_flags, MII_RCV.rx_flags, port_collision_queue_selected_shift
+    .if    $defined("PRU0")
+    LDI        RCV_TEMP_REG_1.w0, COL_RX_CONTEXT_P2_OFFSET_ADDR
+    .else
+    LDI        RCV_TEMP_REG_1.w0, COL_RX_CONTEXT_P1_OFFSET_ADDR
+    .endif    
+    LBCO    &MII_RCV_PORT.buffer_index, PRU1_DMEM_CONST, RCV_TEMP_REG_1.w0, 10
+    
+NB_PROCESS_32BYTES_INIT_PORT_QUEUE_NO_COLL_SELECTED:
+    ;Initialize the wrkng_wr_ptr and rd_ptr here as the other PRU might have changed them between Now and RCV_FB
+    LBCO    &RCV_QUEUE_DESC_REG, QUEUE_DESP_BASE, MII_RCV_PORT.rcv_queue_pointer, 4
+    AND MII_RCV_PORT.rd_ptr , RCV_QUEUE_DESC_REG.rd_ptr , RCV_QUEUE_DESC_REG.rd_ptr    ;Warning: converted from MOV
+    AND MII_RCV_PORT.wrkng_wr_ptr , RCV_QUEUE_DESC_REG.wr_ptr , RCV_QUEUE_DESC_REG.wr_ptr      ;Warning: converted from MOV
+    QBBS    NB_RCV_PORT_CONTEXT_INITIALIZED_WITH_COLLISION, MII_RCV.rx_flags, port_collision_queue_selected_shift
+    ; Compute the adress in L3 RAM where the packet is received
+    SUB        RCV_BUFFER_DESC_OFFSET, MII_RCV_PORT.wrkng_wr_ptr, MII_RCV_PORT.base_buffer_desc_offset
+    LSL        RCV_BUFFER_DESC_OFFSET, RCV_BUFFER_DESC_OFFSET, 3
+    ADD        MII_RCV_PORT.buffer_index, MII_RCV_PORT.base_buffer_index, RCV_BUFFER_DESC_OFFSET
+    
+NB_RCV_PORT_CONTEXT_INITIALIZED_WITH_COLLISION:
+    .endif ;TWO_PORT_CFG
+    .endif ;ICSS_SWITCH_BUILD
+    
+NB_PROCESS_32BYTES_CHECK_FLAGS:
+    
+    .if $defined("ICSS_SWITCH_BUILD")
+    QBBC    NB_PROCESS_32BYTES_CHECK_FWD_FLAG, MII_RCV.rx_flags, host_rcv_flag_shift     ; MII_RCV.rx_flags.host_rcv_flag
+    .endif
+    
+    .if $defined(PTP)
+    ADD     RCV_TEMP_REG_3.w2, MII_RCV.byte_cntr, 32
+    QBLT    PTP_RCVD_MORE_THAN32_BYTES, RCV_TEMP_REG_3.w2, 32
+    JAL     RCV_TEMP_REG_3.w2, FN_TIMESTAMP_GPTP_PACKET
+    .if $defined("ICSS_DUAL_EMAC_BUILD")
+    ; For DualEMAC, check here to skip host rcv to properly drop sync frames not from master
+    QBBC    NB_PROCESS_32BYTES_CHECK_FLAGS_QUEUE_NOT_FULL, MII_RCV.rx_flags, host_rcv_flag_shift     ; MII_RCV.rx_flags.host_rcv_flag
+    .endif
+PTP_RCVD_MORE_THAN32_BYTES:
+
+    .endif    ;PTP 
+    SBCO       &Ethernet, L3_OCMC_RAM_CONST, MII_RCV.buffer_index, 32  
+    ADD        MII_RCV.byte_cntr , MII_RCV.byte_cntr ,  32     ; increment byte count by 32
+    
+    ; Compare current wrk pointer to top_most queue desc pointer ..check for wrap around
+    QBNE       RCV_NB_NO_QUEUE_WRAP, MII_RCV.wrkng_wr_ptr, MII_RCV.top_most_buffer_desc_offset
+    AND MII_RCV.wrkng_wr_ptr , MII_RCV.base_buffer_desc_offset , MII_RCV.base_buffer_desc_offset
+    AND MII_RCV.buffer_index , MII_RCV.base_buffer_index , MII_RCV.base_buffer_index
+    QBA        RCV_NB_QUEUE_WRAPPED
+RCV_NB_NO_QUEUE_WRAP:
+    ADD        MII_RCV.buffer_index, MII_RCV.buffer_index,  32
+    ADD        MII_RCV.wrkng_wr_ptr,  MII_RCV.wrkng_wr_ptr,  4
+    
+RCV_NB_QUEUE_WRAPPED:
+    
+    ; Prepare for next call of RCV_NB ..whether next 32 bytes can be received or not
+    QBNE       NB_PROCESS_32BYTES_CHECK_FLAGS_QUEUE_NOT_FULL, MII_RCV.wrkng_wr_ptr, MII_RCV.rd_ptr
+    
+    CLR        MII_RCV.rx_flags , MII_RCV.rx_flags , host_rcv_flag_shift
+    SET        MII_RCV.rx_flags_extended , MII_RCV.rx_flags_extended , host_queue_overflow_shift
+    .if $defined("ICSS_DUAL_EMAC_BUILD")
+    ;For EMAC mode, set rx_frame_error bit. This saves cycles in FN_RCV_LB.
+    SET        MII_RCV.rx_flags , MII_RCV.rx_flags , 4 
+    .endif
+    
+NB_PROCESS_32BYTES_CHECK_FLAGS_QUEUE_NOT_FULL:
+    .if $defined("ICSS_SWITCH_BUILD")
+NB_PROCESS_32BYTES_CHECK_FWD_FLAG:
+    .if    $defined("TWO_PORT_CFG")
+
+    QBBC    NB_PROCESS_32BYTES_CHECK_FLAG_DONE, MII_RCV.rx_flags, 1    ;MII_RCV.rx_flags.fwd_flag
+    SBCO    &Ethernet, L3_OCMC_RAM_CONST, MII_RCV_PORT.buffer_index, 32
+    ADD        MII_RCV_PORT.byte_cntr, MII_RCV_PORT.byte_cntr, 32
+
+    ; Compare current wrk pointer to top_most queue desc pointer ..check for wrap around
+    QBNE    RCV_NB_PORT_NO_QUEUE_WRAP, MII_RCV_PORT.wrkng_wr_ptr, MII_RCV_PORT.top_most_buffer_desc_offset
+    AND MII_RCV_PORT.wrkng_wr_ptr , MII_RCV_PORT.base_buffer_desc_offset , MII_RCV_PORT.base_buffer_desc_offset        ;Warning: converted from MOV
+    AND MII_RCV_PORT.buffer_index , MII_RCV_PORT.base_buffer_index , MII_RCV_PORT.base_buffer_index    ;Warning: converted from MOV
+    QBA        RCV_NB_PORT_QUEUE_WRAPPED
+RCV_NB_PORT_NO_QUEUE_WRAP:
+    ADD        MII_RCV_PORT.buffer_index,     MII_RCV_PORT.buffer_index, 32
+    ADD        MII_RCV_PORT.wrkng_wr_ptr,  MII_RCV_PORT.wrkng_wr_ptr, 4
+RCV_NB_PORT_QUEUE_WRAPPED:
+
+    ; Prepare for next call of RCV_NB ..whether next 32 bytes can be received or not
+    QBNE    NB_PROCESS_32BYTES_CHECK_FWD_FLAG_NOT_FULL, MII_RCV_PORT.wrkng_wr_ptr, MII_RCV_PORT.rd_ptr
+    CLR        MII_RCV.rx_flags, MII_RCV.rx_flags, fwd_flag_shift
+    SET        MII_RCV.rx_flags_extended, MII_RCV.rx_flags_extended, port_queue_overflow_shift
+    
+NB_PROCESS_32BYTES_CHECK_FWD_FLAG_NOT_FULL:
+
+NB_PROCESS_32BYTES_CHECK_FLAG_DONE:
+    .endif ;TWO_PORT_CFG
+    
+NB_PROCESS_DONE:
+    .endif
+    XOR                MII_RCV.rx_flags, MII_RCV.rx_flags, (1<<rx_bank_index_shift)    ; toggle rx_bank_index flag
+    
+NB_DONE:
+    
+    ; restore call register pointer
+    AND CALL_REG , L1_CALL_REG , L1_CALL_REG
+    
+    ; store task parameters from parameter bank
+NB_STORE_CONTEXT:
+    LDI        R0.b0, SHIFT_NONE       
+    .if $defined("PRU0")       
+    XOUT       BANK1, &MII_RCV, $sizeof(MII_RCV)       
+    .else
+    XOUT       BANK2, &MII_RCV, $sizeof(MII_RCV)       
+    .endif
+    
+    .if $defined("ICSS_SWITCH_BUILD")
+    .if        $defined("TWO_PORT_CFG")
+    .if $defined("PRU0")
+    LDI        R0.b0, SHIFT_R14_TO_R0
+    XOUT    BANK0, &MII_RCV_PORT, $sizeof(MII_RCV_PORT)
+    .else
+    LDI        R0.b0, SHIFT_R14_TO_R4
+    XOUT    BANK0, &MII_RCV_PORT, $sizeof(MII_RCV_PORT)
+    .endif
+    QBBS    NB_PROCESS_CUT_THROUGH, MII_RCV.tx_flags, cut_through_flag_shift    ;MII_RCV.tx_flags.cut_through_flag
+    .endif ;TWO_PORT_CFG
+    .endif
+    
+    .if $defined("ICSS_REV1")  
+    M_RCV_RX_EOF_CHECK_ICSS_REV1        ; check for EOF for REV1
+    .endif
+    .if $defined("ICSS_REV2")  
+    M_RCV_RX_EOF_CHECK_ICSS_REV2        ; check for EOF for REV2
+    .endif
+
+NB_DONE_NO_PARAM_STORE:
+    JMP                TASK_EXECUTION_FINISHED
+    
+process_rx_eof_rx_nb:
+    JMP                FN_RCV_LB
+    
+    .if $defined("ICSS_SWITCH_BUILD")
+    .if    $defined("TWO_PORT_CFG")
+NB_PROCESS_CUT_THROUGH:    
+    ; check for RX EOF condition
+    .if $defined("ICSS_REV1")
+    .if $defined("PRU0")       
+    QBBC       FN_RCV_NB_CT_NO_RxEOF, R31, 30   ;replaced: QBBC        FN_RCV_NB_CT_NO_RxEOF, R31.t30 
+    .else
+    QBBC       FN_RCV_NB_CT_NO_RxEOF, R31, 31   ;replaced: QBBC        FN_RCV_NB_CT_NO_RxEOF, R31.t31 
+    .endif
+    .endif
+    .if $defined("ICSS_REV2")
+    QBBC    FN_RCV_NB_CT_NO_RxEOF, R31, 20        ; Port0 Rx EOF
+    .endif
+
+FN_RCV_NB_CT_RxEOF:
+    QBBS    CT_NB_XIN_UPPER_BANK, MII_RCV.rx_flags, rx_bank_index_shift    ;MII_RCV.rx_flags.rx_bank_index
+
+CT_NB_XIN_LOWER_BANK:
+    
+    XIN        RX_L2_BANK0_ID, &R18, RANGE_R18_b0
+    XIN        RX_L2_BANK0_ID, &R2, RANGE_R2_R13                ; XIN RX L2 bank 0
+    
+    QBA        CT_NB_CHECK_AMOUNT_OF_BYTES
+CT_NB_XIN_UPPER_BANK:    
+    
+    XIN        RX_L2_BANK1_ID, &R18, RANGE_R18_b0
+    XIN        RX_L2_BANK1_ID, &R2, RANGE_R2_R13                ; XIN RX L2 bank 1
+    
+CT_NB_CHECK_AMOUNT_OF_BYTES:    
+    ; Put the remaining bytes in Tx_FIFO at this point of time itself
+    AND        RCV_TEMP_REG_1.b0, CUT_THROUGH_BYTE_CNT, 0x003f
+    ; Below code added to fix a bug when for a 65 byte packet R18 has 1 but cut_through_byte_cnt is 62.
+    ; Check whether cut_through_byte_cnt is more than R18 count
+    QBGE    CT_R18_IS_GREATER_OR_EQUAL, RCV_TEMP_REG_1.b0, R18_RCV_BYTECOUNT
+    LDI        RCV_TEMP_REG_2.b0, 64   ; Subtract from 64 bytes
+    SUB        RCV_TEMP_REG_1.b0, RCV_TEMP_REG_2.b0, RCV_TEMP_REG_1.b0
+    ; L2 FIFO wrapped around but few bytes of upper bank didn't get pushed in fifo. It is possible that RX EOF is detected before pushing
+    ; the last two bytes and R18 gets wrapped around by the time we reach here
+    ADD        RCV_TEMP_REG_1.b0, RCV_TEMP_REG_1.b0, R18_RCV_BYTECOUNT
+    QBA        CT_R18_IS_LESS
+CT_R18_IS_GREATER_OR_EQUAL:    
+    
+    SUB        RCV_TEMP_REG_1.b0, R18_RCV_BYTECOUNT, RCV_TEMP_REG_1.b0
+
+CT_R18_IS_LESS:
+    .if $defined("ICSS_REV1")
+    ;QBEQ      CT_PUSH_LB_LASTBYTE_nb, RCV_TEMP_REG_1.b0,  1
+    LSR        loop_cnt, RCV_TEMP_REG_1.b0, 1  
+    ; OPT: Use function for the loop below
+    ;QBEQ      ct_assert_eof_nb, loop_cnt, 0x0000
+    LOOP       CT_NB_ENDLOOP, loop_cnt 
+    MVIW       TX_DATA_WORD, *TX_DATA_POINTER  
+    M_PUSH_WORD_CMD
+    ADD        TX_DATA_POINTER, TX_DATA_POINTER, 2     
+CT_NB_ENDLOOP:
+    QBBC       ct_assert_eof_nb, RCV_TEMP_REG_1.b0, 0  
+CT_PUSH_LB_LASTBYTE_nb:
+    MVIB       TX_DATA_BYTE, *R1.b3    
+    M_PUSH_BYTE
+ct_assert_eof_nb:
+    ;M_PUSH_TX_EOF
+    .endif
+    .if $defined("ICSS_REV2")
+    LSR        loop_cnt, RCV_TEMP_REG_1.b0, 2
+
+    loop    CT_NB_ENDLOOP, loop_cnt
+    MVID    TX_DATA_DOUBLE_WORD, *TX_DATA_POINTER
+    ADD        TX_DATA_POINTER, TX_DATA_POINTER, 4
+CT_NB_ENDLOOP:
+
+    AND        RCV_TEMP_REG_2.b0, RCV_TEMP_REG_1.b0, 0x03
+    QBEQ    ct_assert_eof_nb, RCV_TEMP_REG_2.b0, 0
+    QBEQ    CT_PUSH_LB_LASTBYTE_nb, RCV_TEMP_REG_2.b0, 1
+    MVIW    TX_DATA_WORD, *TX_DATA_POINTER
+    ADD        TX_DATA_POINTER, TX_DATA_POINTER, 2
+    QBEQ    ct_assert_eof_nb, RCV_TEMP_REG_2.b0, 2
+CT_PUSH_LB_LASTBYTE_nb:
+    MVIB    TX_DATA_BYTE, *R1.b3
+
+ct_assert_eof_nb:    
+    ; Insert the TX_EOF for outgoing frame
+    LDI        R31.w2, 0x2000
+    .endif
+    ADD        CUT_THROUGH_BYTE_CNT, CUT_THROUGH_BYTE_CNT, RCV_TEMP_REG_1.b0
+ct_deassert_ct:    
+SKIP_CRC_PUSH:    
+
+    LDI        R0.b0, SHIFT_NONE
+    .if    $defined("PRU0")
+    XOUT    BANK1, &MII_RCV, $sizeof(MII_RCV)
+    .else
+    XOUT    BANK2, &MII_RCV, $sizeof(MII_RCV)
+    .endif
+    CLR     R22, R22, PACKET_TX_ALLOWED
+;Check for CRC
+    LDI        RCV_TEMP_REG_2.w0, 0x0204       
+    LBCO       &RCV_TEMP_REG_1, ICSS_INTC_CONST, RCV_TEMP_REG_2.w0, 4  
+    .if $defined("PRU0")       
+    QBBC       NO_CRC_ERROR_CT, RCV_TEMP_REG_1, 4       ;replaced: QBBC    NO_CRC_ERROR_CT, RCV_TEMP_REG_1.t4 
+    .else
+    QBBC       NO_CRC_ERROR_CT, RCV_TEMP_REG_1, 16      ;replaced: QBBC    NO_CRC_ERROR_CT, RCV_TEMP_REG_1.t16 
+    .endif
+    LDI        RCV_TEMP_REG_3 , RX_CRC_COUNT_OFFSET
+    
+    ;Add to statistics counter
+    LBCO       &RCV_TEMP_REG_1, PRU_DMEM_ADDR, RCV_TEMP_REG_3, 4       
+    ADD        RCV_TEMP_REG_1, RCV_TEMP_REG_1, 1       
+    SBCO       &RCV_TEMP_REG_1, PRU_DMEM_ADDR, RCV_TEMP_REG_3, 4       
+NO_CRC_ERROR_CT:
+    .endif ;TWO_PORT_CFG
+    .endif ;ICSS_SWITCH_BUILD
+    
+;****************************************************************************
+;
+;     NAME                     : FN_RCV_LB
+;     DESCRIPTION      : receives the last block(s) of RX L2
+;     RETURNS          : 
+;     ARGS                     : 
+;     USES             : 
+;     INVOKES          : 
+;
+;****************************************************************************
+FN_RCV_LB:
+    
+    ; Check if RCV_Active is set. If not drop the frame. It handles the case of undersize errors
+    QBBS       RCV_LB_PROCESS_NORMAL, R23, Rcv_active
+    
+LB_CHECK_ERRORS:
+    ;Short frame received then increment the error offset statistics
+    LDI        RCV_TEMP_REG_3 , RX_ERROR_OFFSET
+    LBCO       &RCV_TEMP_REG_2, PRU_DMEM_ADDR, RCV_TEMP_REG_3, 4       
+    ADD        RCV_TEMP_REG_2, RCV_TEMP_REG_2, 1       
+    SBCO       &RCV_TEMP_REG_2, PRU_DMEM_ADDR, RCV_TEMP_REG_3, 4       
+    .if $defined("ICSS_DUAL_EMAC_BUILD")
+    .if $defined("HALF_DUPLEX_ENABLED")        
+    ;check R31 error
+    QBBC       NO_R31_ERROR, R31, 19       ; if cleared so no error and continue normal operation
+    ;else clear the error
+    M_CMD16 D_RX_ERROR_CLEAR        ; else clear error flag
+    
+NO_R31_ERROR:
+    ;check for SFD Errors
+    .if $defined("PRU0")       
+    LBCO       &RCV_TEMP_REG_3.b0, MII_RT_CFG_CONST, ICSS_MIIRT_RXERR0, 1     ;read the PRUSS_MII_RT_RX_ERR0 register          
+    QBBC       CHECK_FOR_SHORT_SFD1, RCV_TEMP_REG_3, 1         ; check if not error then jump else count stats
+    ;clear error and writeback
+    SET        RCV_TEMP_REG_3 , RCV_TEMP_REG_3 , 1 
+    SBCO       &RCV_TEMP_REG_3.b0, MII_RT_CFG_CONST, ICSS_MIIRT_RXERR0, 1      
+    QBA     COUNT_SFD_ERROR1
+CHECK_FOR_SHORT_SFD1:            
+    QBBC       NO_PREAMBLE_ERROR, RCV_TEMP_REG_3, 0       ; check if not error then jump else count stats 
+    ;clear error and writeback
+    SET        RCV_TEMP_REG_3 , RCV_TEMP_REG_3 , 0 
+    SBCO       &RCV_TEMP_REG_3.b0, MII_RT_CFG_CONST, ICSS_MIIRT_RXERR0, 1      
+    .else
+    LBCO       &RCV_TEMP_REG_3.b0, MII_RT_CFG_CONST, ICSS_MIIRT_RXERR1, 1     ;read the PRUSS_MII_RT_RX_ERR0 register
+    QBBC       CHECK_FOR_SHORT_SFD1, RCV_TEMP_REG_3, 1         ; check if not error then jump else count stats
+    ;clear error and writeback
+    SET        RCV_TEMP_REG_3 , RCV_TEMP_REG_3 , 1 
+    SBCO       &RCV_TEMP_REG_3.b0, MII_RT_CFG_CONST, ICSS_MIIRT_RXERR1, 1      
+    QBA     COUNT_SFD_ERROR1
+CHECK_FOR_SHORT_SFD1:            
+    QBBC       NO_PREAMBLE_ERROR, RCV_TEMP_REG_3, 0        ; check if not error then jump else count stats
+    ;clear error and writeback
+    SET        RCV_TEMP_REG_3 , RCV_TEMP_REG_3 , 0 
+    SBCO       &RCV_TEMP_REG_3.b0, MII_RT_CFG_CONST, ICSS_MIIRT_RXERR1, 1      
+    .endif
+    
+COUNT_SFD_ERROR1:
+        ;increment and store the count
+    LDI        RCV_TEMP_REG_3 , SFD_ERROR_OFFSET
+    LBCO       &RCV_TEMP_REG_2, PRU_DMEM_ADDR, RCV_TEMP_REG_3, 4       
+    ADD        RCV_TEMP_REG_2, RCV_TEMP_REG_2, 1       
+    SBCO       &RCV_TEMP_REG_2, PRU_DMEM_ADDR, RCV_TEMP_REG_3, 4       
+    .endif ;HALF_DUPLEX_ENABLED
+    .endif ;ICSS_DUAL_EMAC_BUILD
+NO_PREAMBLE_ERROR:
+    
+    ; RCV_CONTEXT is not initialized for this error frame.
+    ; reset RX FIFO, this places the R18 counter back to position 0
+    CLR        R23 , R23 , Rcv_active
+    M_SET_CMD  D_RESET_RXFIFO
+    QBA                LB_NO_RX_STAT
+RCV_LB_PROCESS_NORMAL:
+    
+    ; for XIN, make sure that shift is set to 0
+    LDI        R0.b0, SHIFT_NONE       
+    ; restore task parameters from parameter bank
+    .if $defined("PRU0")       
+    XIN        BANK1, &MII_RCV, $sizeof(MII_RCV)       
+    .else
+    XIN        BANK2, &MII_RCV, $sizeof(MII_RCV)       
+    .endif
+    
+    .if    $defined("TWO_PORT_CFG")
+     ; OPT: MOve the port context read after the XIN of data
+    ; for port receive 
+    .if    $defined("PRU0")
+    LDI        R0.b0, SHIFT_R14_TO_R0
+    XIN        BANK0, &MII_RCV_PORT, $sizeof(MII_RCV_PORT)
+    .else
+    LDI        R0.b0, SHIFT_R14_TO_R4
+    XIN        BANK0, &MII_RCV_PORT, $sizeof(MII_RCV_PORT)
+    .endif    
+    .endif ;TWO_PORT_CFG
+    QBBS       LB_RESET_RX_FIFO, MII_RCV.rx_flags, rx_frame_error_shift
+    ; depending on the bank index, we load bank 0 or bank 1
+    QBBS       LB_XIN_UPPER_BANK, MII_RCV.rx_flags, rx_bank_index_shift
+    
+LB_XIN_LOWER_BANK:
+    XIN        RX_L2_BANK0_ID, &R18, RANGE_R18_b0      
+    XIN        RX_L2_BANK0_ID, &R2, RANGE_R2_R13       ; XIN RX L2 bank 0
+    
+    ; have we received more than 32 bytes?
+    QBGE       LB_XIN_STORE_LESS_THAN_32_FROM_LOWER_BANK, R18_RCV_BYTECOUNT, 32        
+    QBA                LB_STORE_FIRST_32_BYTES
+    
+LB_XIN_UPPER_BANK:
+    XIN        RX_L2_BANK1_ID, &R18, RANGE_R18_b0      
+    XIN        RX_L2_BANK1_ID, &R2, RANGE_R2_R13       ; XIN RX L2 bank 1
+    
+    ; have we received more than 32 bytes?
+    QBLE       LB_XIN_STORE_LESS_THAN_32_FROM_UPPER_BANK, R18_RCV_BYTECOUNT, 32        
+    
+LB_STORE_FIRST_32_BYTES:
+    .if $defined("ICSS_SWITCH_BUILD")
+    QBBC    LB_PROCESS_32BYTES_CHECK_FWD_FLAG, MII_RCV.rx_flags, host_rcv_flag_shift    ;MII_RCV.rx_flags.host_rcv_flag
+    .endif
+    .if $defined(PTP)
+    ADD     RCV_TEMP_REG_3.w2, MII_RCV.byte_cntr, 32
+    QBLT    MORE_THAN_32_BYTES_RCVD, RCV_TEMP_REG_3.w2, 32
+    JAL     RCV_TEMP_REG_3.w2, FN_TIMESTAMP_GPTP_PACKET
+
+MORE_THAN_32_BYTES_RCVD:
+
+    .endif ;PTP
+    SBCO       &Ethernet, L3_OCMC_RAM_CONST, MII_RCV.buffer_index, 32  
+    ADD                MII_RCV.byte_cntr, MII_RCV.byte_cntr,  32
+    
+    ; Update the buffer descriptor for the received packet
+    ; Compare current wrk pointer to top_most queue desc pointer ..check for wrap around
+    QBNE       RCV_LB_NO_QUEUE_WRAP_LOWER, MII_RCV.wrkng_wr_ptr, MII_RCV.top_most_buffer_desc_offset
+    AND MII_RCV.wrkng_wr_ptr , MII_RCV.base_buffer_desc_offset , MII_RCV.base_buffer_desc_offset
+    AND MII_RCV.buffer_index , MII_RCV.base_buffer_index , MII_RCV.base_buffer_index
+    QBA                RCV_LB_QUEUE_WRAPPED_LOWER
+RCV_LB_NO_QUEUE_WRAP_LOWER:
+    ADD                MII_RCV.buffer_index, MII_RCV.buffer_index,  32
+    ADD                MII_RCV.wrkng_wr_ptr,  MII_RCV.wrkng_wr_ptr,  4
+    
+RCV_LB_QUEUE_WRAPPED_LOWER:
+    ; Check if the queue got completely filled with the last few bytes and the remaining bytes cannot be added.
+    ;This scenario of queue overflow has been verified by dry run.
+    QBNE       LB_PROCESS_32BYTES_CHECK_FLAGS_QUEUE_NOT_FULL_1, MII_RCV.wrkng_wr_ptr, MII_RCV.rd_ptr
+    CLR        MII_RCV.rx_flags , MII_RCV.rx_flags , host_rcv_flag_shift
+    SET        MII_RCV.rx_flags_extended , MII_RCV.rx_flags_extended , host_queue_overflow_shift 
+    .if $defined("ICSS_DUAL_EMAC_BUILD")
+    ;For EMAC mode, set rx_frame_error bit.
+    SET        MII_RCV.rx_flags , MII_RCV.rx_flags , 4 
+    .endif
+LB_PROCESS_32BYTES_CHECK_FLAGS_QUEUE_NOT_FULL_1:
+    .if $defined("ICSS_SWITCH_BUILD")
+LB_PROCESS_32BYTES_CHECK_FWD_FLAG:
+    .if    $defined("TWO_PORT_CFG")
+    QBBC    LB_PROCESS_32BYTES_CHECK_FLAG_DONE, MII_RCV.rx_flags, fwd_flag_shift    ;MII_RCV.rx_flags.fwd_flag
+    
+    SBCO    &Ethernet, L3_OCMC_RAM_CONST, MII_RCV_PORT.buffer_index, 32
+    ADD        MII_RCV_PORT.byte_cntr, MII_RCV_PORT.byte_cntr, 32
+
+    ; Update the buffer descriptor for the received packet
+    ; Compare current wrk pointer to top_most queue desc pointer ..check for wrap around
+    QBNE    RCV_LB_NO_PORT_QUEUE_WRAP_LOWER, MII_RCV_PORT.wrkng_wr_ptr, MII_RCV_PORT.top_most_buffer_desc_offset
+    AND MII_RCV_PORT.wrkng_wr_ptr , MII_RCV_PORT.base_buffer_desc_offset , MII_RCV_PORT.base_buffer_desc_offset        ;Warning: converted from MOV
+    AND MII_RCV_PORT.buffer_index , MII_RCV_PORT.base_buffer_index , MII_RCV_PORT.base_buffer_index    ;Warning: converted from MOV
+    QBA        RCV_LB_PORT_QUEUE_WRAPPED_LOWER    
+RCV_LB_NO_PORT_QUEUE_WRAP_LOWER:
+    ADD        MII_RCV_PORT.buffer_index, MII_RCV_PORT.buffer_index, 32
+    ADD        MII_RCV_PORT.wrkng_wr_ptr,  MII_RCV_PORT.wrkng_wr_ptr, 4
+
+RCV_LB_PORT_QUEUE_WRAPPED_LOWER:    
+    ; Prepare for next call of RCV_LB ..whether next 32 bytes can be received or not
+    QBNE    LB_PROCESS_32BYTES_CHECK_FLAGS_PORT_QUEUE_NOT_FULL_1, MII_RCV_PORT.wrkng_wr_ptr, MII_RCV_PORT.rd_ptr
+    CLR        MII_RCV.rx_flags, MII_RCV.rx_flags, fwd_flag_shift    ;MII_RCV.rx_flags.fwd_flag
+    SET        MII_RCV.rx_flags_extended, MII_RCV.rx_flags_extended, port_queue_overflow_shift    ;MII_RCV.rx_flags_extended.port_queue_overflow
+    
+LB_PROCESS_32BYTES_CHECK_FLAGS_PORT_QUEUE_NOT_FULL_1:
+
+LB_PROCESS_32BYTES_CHECK_FLAG_DONE:    
+    .endif ;TWO_PORT_CFG
+    .endif ;ICSS_SWITCH_BUILD
+    QBBC       LB_STORE_UPPER_DATA, MII_RCV.rx_flags, rx_bank_index_shift
+    
+    ; get and store lower data
+    XIN        RX_L2_BANK0_ID, &R2, RANGE_R2_R9        ; recieve the remaining data
+    QBA        LB_XIN_STORE_LESS_THAN_32_FROM_LOWER_BANK
+LB_STORE_UPPER_DATA:
+    ; get and store upper data
+    XIN        RX_L2_BANK1_ID, &R2, RANGE_R2_R13       ; recieve the remaining data    
+    
+LB_XIN_STORE_LESS_THAN_32_FROM_UPPER_BANK:
+    SUB        R0.b1, R18, 32          ; count remaining data  
+    QBA        LB_STORE_FROM_UPPER_BUFFER
+LB_XIN_STORE_LESS_THAN_32_FROM_LOWER_BANK:
+    AND R0.b1 , R18 , R18
+LB_STORE_FROM_UPPER_BUFFER:
+    ; Check if 0 bytes are there to store
+    QBEQ       LB_PROCESS_CHECK_FWD_FLAG, R0.b1, 0     
+    
+    ; Receive for Host Queue
+    .if $defined("ICSS_SWITCH_BUILD")
+    QBBC    LB_PROCESS_CHECK_FWD_FLAG, MII_RCV.rx_flags, host_rcv_flag_shift    ;MII_RCV.rx_flags.host_rcv_flag
+    .endif
+    SBCO       &Ethernet, L3_OCMC_RAM_CONST, MII_RCV.buffer_index, b1  
+    
+    ADD        MII_RCV.byte_cntr, MII_RCV.byte_cntr, R0.b1     ; increment the count by R1 bytes       
+    QBGE       LB_PROCESS_CHECK_FWD_FLAG, R0.b1, 4     
+    QBNE       RCV_LB_NO_QUEUE_WRAP_2, MII_RCV.wrkng_wr_ptr, MII_RCV.top_most_buffer_desc_offset
+    AND MII_RCV.wrkng_wr_ptr , MII_RCV.base_buffer_desc_offset , MII_RCV.base_buffer_desc_offset
+    QBA                RCV_LB_QUEUE_WRAPPED_2
+RCV_LB_NO_QUEUE_WRAP_2:
+    ADD                MII_RCV.wrkng_wr_ptr,  MII_RCV.wrkng_wr_ptr,  4
+RCV_LB_QUEUE_WRAPPED_2:
+    .if $defined("ICSS_DUAL_EMAC_BUILD")
+    ; Check if the queue got completely filled with the last few bytes.
+    ;If yes, the wr_ptr and rd_prt might become equal and there could be
+    ;possible data overwrite when the next packet arrives.
+    ;This has been verfied by dry run.
+    QBNE       LB_PROCESS_CHECK_FLAGS_QUEUE_NOT_FULL, MII_RCV.wrkng_wr_ptr, MII_RCV.rd_ptr
+    CLR        MII_RCV.rx_flags , MII_RCV.rx_flags , 0 
+    SET        MII_RCV.rx_flags_extended , MII_RCV.rx_flags_extended , 6 
+    ;For EMAC mode, set rx_frame_error bit
+    SET        MII_RCV.rx_flags , MII_RCV.rx_flags , 4 
+    
+LB_PROCESS_CHECK_FLAGS_QUEUE_NOT_FULL:
+    .endif ;ICSS_DUAL_EMAC_BUILD
+LB_PROCESS_CHECK_FWD_FLAG:
+    .if $defined("ICSS_SWITCH_BUILD")  
+    ; Receive for Port Queue
+    .if    $defined("TWO_PORT_CFG")
+    QBBC    LB_CLEAR_RX_FIFO, MII_RCV.rx_flags, fwd_flag_shift    ;MII_RCV.rx_flags.fwd_flag
+    SBCO    &Ethernet, L3_OCMC_RAM_CONST, MII_RCV_PORT.buffer_index, b1
+    ADD        MII_RCV_PORT.byte_cntr, MII_RCV_PORT.byte_cntr, R0.b1
+    QBGE    LB_CLEAR_RX_FIFO, R0.b1, 4
+    QBNE    RCV_LB_NO_PORT_QUEUE_WRAP_2, MII_RCV_PORT.wrkng_wr_ptr, MII_RCV_PORT.top_most_buffer_desc_offset
+    AND MII_RCV_PORT.wrkng_wr_ptr , MII_RCV_PORT.base_buffer_desc_offset , MII_RCV_PORT.base_buffer_desc_offset        ;Warning: converted from MOV
+    QBA        RCV_LB_PORT_QUEUE_WRAPPED_2    
+RCV_LB_NO_PORT_QUEUE_WRAP_2:
+    ADD        MII_RCV_PORT.wrkng_wr_ptr,  MII_RCV_PORT.wrkng_wr_ptr, 4
+RCV_LB_PORT_QUEUE_WRAPPED_2:
+    .endif ;TWO_PORT_CFG
+    
+LB_CLEAR_RX_FIFO:
+
+    QBBS    LB_CHECK_RX_ERRORS, MII_RCV.rx_flags, host_rcv_flag_shift    ;MII_RCV.rx_flags.host_rcv_flag
+    QBBC    LB_RESET_RX_FIFO, MII_RCV.rx_flags, fwd_flag_shift    ;MII_RCV.rx_flags.fwd_flag
+    
+LB_CHECK_RX_ERRORS: 
+    .endif  ;ICSS_SWITCH_BUILD
+    ; Check for CRC Error in the received frame
+    LDI        RCV_TEMP_REG_1.w0, 0x0204       
+    LBCO       &RCV_TEMP_REG_2, ICSS_INTC_CONST, RCV_TEMP_REG_1.w0, 4      ;load value of INTC_SRSR1   
+    
+;check odd nibble error        
+CHECK_MISALIGNMENT_ERROR:
+    .if $defined("PRU0")       
+    QBBC       CHECK_CRC_ERROR, RCV_TEMP_REG_2, 5      ; if interrupt line is clear check for CRC error else continue
+    .else
+    QBBC       CHECK_CRC_ERROR, RCV_TEMP_REG_2, 17     ; if interrupt line is clear check for CRC error else continue
+    .endif
+    LDI        RCV_TEMP_REG_3 , RX_MISALIGNMENT_COUNT_OFFSET
+    
+;Add to statistics counter
+    LBCO       &RCV_TEMP_REG_1, PRU_DMEM_ADDR, RCV_TEMP_REG_3, 4       
+    ADD        RCV_TEMP_REG_1, RCV_TEMP_REG_1, 1       
+    SBCO       &RCV_TEMP_REG_1, PRU_DMEM_ADDR, RCV_TEMP_REG_3, 4
+    .if $defined("ICSS_DUAL_EMAC_BUILD")
+    SET        MII_RCV.rx_flags , MII_RCV.rx_flags , 4 
+    .endif
+    
+CHECK_CRC_ERROR:
+    .if $defined("PRU0")       
+    QBBC       LB_CHECK_MIN_FRM_ERR, RCV_TEMP_REG_2, 4
+    .else
+    QBBC       LB_CHECK_MIN_FRM_ERR, RCV_TEMP_REG_2, 16
+    .endif
+    LDI        RCV_TEMP_REG_3 , RX_CRC_COUNT_OFFSET
+    
+;Add to statistics counter
+    LBCO       &RCV_TEMP_REG_1, PRU_DMEM_ADDR, RCV_TEMP_REG_3, 4       
+    ADD        RCV_TEMP_REG_1, RCV_TEMP_REG_1, 1       
+    SBCO       &RCV_TEMP_REG_1, PRU_DMEM_ADDR, RCV_TEMP_REG_3, 4       
+    SET        MII_RCV.rx_flags , MII_RCV.rx_flags , rx_frame_error_shift
+    
+    ;Check whether received frame length is less then defined min value
+LB_CHECK_MIN_FRM_ERR:
+    .if $defined("PRU0")       
+    LBCO       &RCV_TEMP_REG_2.b0, MII_RT_CFG_CONST, ICSS_MIIRT_RXERR0, 1      
+    .else
+    LBCO       &RCV_TEMP_REG_2.b0, MII_RT_CFG_CONST, ICSS_MIIRT_RXERR1, 1      
+    .endif
+    QBBC       LB_CHECK_MAX_FRM_ERR, RCV_TEMP_REG_2, 2         ; check if undersize error exist
+    LDI        RCV_TEMP_REG_3 , RX_UNDERSIZED_FRAME_OFFSET
+    QBA        LB_CLR_RX_ERROR_REG
+    
+    ;Check whether received frame length is more then defined max value
+LB_CHECK_MAX_FRM_ERR:
+    QBBC       LB_RESET_RX_FIFO, RCV_TEMP_REG_2, 3         ; check for oversize error
+    LDI        RCV_TEMP_REG_3 , RX_OVERSIZED_FRAME_OFFSET
+    
+LB_CLR_RX_ERROR_REG:
+    
+;Add to statistics counter
+    LBCO       &RCV_TEMP_REG_1, PRU_DMEM_ADDR, RCV_TEMP_REG_3, 4       
+    ADD        RCV_TEMP_REG_1, RCV_TEMP_REG_1, 1       
+    SBCO       &RCV_TEMP_REG_1, PRU_DMEM_ADDR, RCV_TEMP_REG_3, 4       
+    
+    ; Clear the RX MIN or RX MAX ERROR
+    LDI        RCV_TEMP_REG_2.b1, 0x0c 
+    .if $defined("PRU0")       
+    SBCO       &RCV_TEMP_REG_2.b1, MII_RT_CFG_CONST, ICSS_MIIRT_RXERR0, 1      
+    .else
+    SBCO       &RCV_TEMP_REG_2.b1, MII_RT_CFG_CONST, ICSS_MIIRT_RXERR1, 1      
+    .endif
+    SET        MII_RCV.rx_flags , MII_RCV.rx_flags , rx_frame_error_shift 
+    
+LB_RESET_RX_FIFO:
+    ; reset RX fifo, this places the R18 counter back to position 0
+    M_SET_CMD  D_RESET_RXFIFO
+    
+    
+    QBBC       LB_NO_RX_FRAME_ERROR, MII_RCV.rx_flags, rx_frame_error_shift     ;replaced: QBBC        LB_NO_RX_FRAME_ERROR, MII_RCV.rx_flags.rx_frame_error 
+    ;clear RX_BC_FRAME & RX_MC_FRAME flags
+    CLR        R22 , R22 , RX_BC_FRAME 
+    CLR        R22 , R22 , RX_MC_FRAME 
+    JMP        LB_RELEASE_QUEUE   ; Clear the EOF and other possible error flags.
+    
+LB_NO_RX_FRAME_ERROR:
+    
+    .if $defined(PTP)
+    QBBS    LB_RELEASE_HOST_QUEUE, R22, PTP_RELEASE_HOST_QUEUE_BIT
+
+PTP_HOST_QUEUE_RELEASE_DONE:
+    .endif ;PTP
+
+    .if $defined("ICSS_SWITCH_BUILD")
+    .if $defined(PTP)  
+    QBBS    LB_RELEASE_PORT_QUEUE, R22, PTP_RELEASE_PORT_QUEUE_BIT
+
+PTP_PORT_QUEUE_RELEASE_DONE:
+
+    .endif ;PTP
+    .endif ;ICSS_SWITCH_BUILD
+
+    LDI        R0.b0, 0        
+    .if $defined("PRU0")       
+    XOUT       BANK1, &MII_RCV, $sizeof(MII_RCV)       ; store task parameters from parameter bank
+    .else
+    XOUT       BANK2, &MII_RCV, $sizeof(MII_RCV)       ; store task parameters from parameter bank
+    .endif
+    
+    .if    $defined("TWO_PORT_CFG")
+
+    .if    $defined("PRU0")
+    LDI        R0.b0, SHIFT_R14_TO_R0
+    XOUT    BANK0, &MII_RCV_PORT, $sizeof(MII_RCV_PORT)        ; store task parameters from parameter bank
+    .else
+    LDI        R0.b0, SHIFT_R14_TO_R4
+    XOUT    BANK0, &MII_RCV_PORT, $sizeof(MII_RCV_PORT)
+    .endif
+    ; For Host Receive
+    QBBC    LB_UPDATE_CHECK_FWD_FLAG, MII_RCV.rx_flags, host_rcv_flag_shift    ;MII_RCV.rx_flags.host_rcv_flag
+    .endif ;TWO_PORT_CFG
+    LDI        R0.b0, SHIFT_R2_TO_R26  
+    .if $defined("PRU0")       
+    XIN        BANK1, &RCV_CONTEXT, $sizeof(MII_RCV_PORT)      ; store task parameters from parameter bank
+    .else
+    XIN        BANK2, &RCV_CONTEXT, $sizeof(MII_RCV_PORT)      ; store task parameters from parameter bank
+    .endif
+    .if    $defined("TWO_PORT_CFG")
+    CLR        R6 , R6 , 0 
+    QBA        LB_UPDATE_FOR_HOST_RECEIVE
+LB_UPDATE_CHECK_FWD_FLAG:
+
+    QBBC    LB_UPDATE_CHECK_DONE, MII_RCV.rx_flags, fwd_flag_shift    ;MII_RCV.rx_flags.fwd_flag
+    .if    $defined("PRU0")    
+    LDI        R0.b0, SHIFT_R2_TO_R0
+    XIN        BANK0, &RCV_CONTEXT, $sizeof(MII_RCV_PORT)        ; store task parameters from parameter bank
+    .else
+    LDI        R0.b0, SHIFT_R2_TO_R4
+    XIN        BANK0, &RCV_CONTEXT, $sizeof(MII_RCV_PORT)        ; store task parameters from parameter bank
+    .endif    
+    SET        R6 , R6 , 0 
+    .else
+    ;store the length of the packet for statistics
+    LDI        RCV_TEMP_REG_2 , RX_PKT_SIZE_OFFSET
+    SBCO       &RCV_CONTEXT.byte_cntr, PRU_DMEM_ADDR, RCV_TEMP_REG_2, 2        ; load the byte count in working register       
+    
+    .endif ;TWO_PORT_CFG
+LB_UPDATE_FOR_HOST_RECEIVE:
+    ; Update the Receive Buffer Descriptor
+    ; Read the wr_ptr of first buffer descriptor
+    .if    $defined("TWO_PORT_CFG")
+    LBCO    &RCV_TEMP_REG_1, PRU1_DMEM_CONST, RCV_CONTEXT.rcv_queue_pointer, 4
+    .else
+    LBCO       &RCV_TEMP_REG_1, ICSS_SHARED_CONST, RCV_CONTEXT.rcv_queue_pointer, 4    
+    .endif ;TWO_PORT_CFG
+    ; clear length field (18..28) and update length with current received frame
+    LDI        RCV_TEMP_REG_2.w0, 0    
+    
+        SUB    RCV_TEMP_REG_2.w2, RCV_CONTEXT.byte_cntr, 4     ;4 byte of FCS
+LB_SKIP_CRC_SUBTRACT:    
+    LSL        RCV_TEMP_REG_2.w2, RCV_TEMP_REG_2.w2, 2 
+    
+        ;Set the Port number on which packet was received
+    .if $defined("PRU0")       
+    SET        RCV_TEMP_REG_2 , RCV_TEMP_REG_2 , 16 ; Port 1
+    .else
+    SET        RCV_TEMP_REG_2 , RCV_TEMP_REG_2 , 17 ;Port 2    
+    .endif
+    
+    ; the first buffer descriptor of the frame has been updated with length and port information
+    SBCO       &RCV_TEMP_REG_2, ICSS_SHARED_CONST, RCV_TEMP_REG_1.w2, 4        
+
+    ;Update the queue max fill level
+    QBGT       LB_RCV_QUEUE_WRAP, RCV_CONTEXT.wrkng_wr_ptr, RCV_CONTEXT.rd_ptr
+    SUB        RCV_TEMP_REG_2.w0, RCV_CONTEXT.wrkng_wr_ptr, RCV_CONTEXT.rd_ptr 
+    JMP     SKIP_LB_RCV_QUEUE_WRAP
+    
+LB_RCV_QUEUE_WRAP:
+    ; add queue size to rd_ptr and then subtract wr_ptr
+    SUB        RCV_TEMP_REG_2.w0, RCV_CONTEXT.top_most_buffer_desc_offset, RCV_CONTEXT.rd_ptr  
+    ADD        RCV_TEMP_REG_2.w0, RCV_TEMP_REG_2.w0, 4 
+    SUB        RCV_TEMP_REG_2.w2, RCV_CONTEXT.wrkng_wr_ptr, RCV_CONTEXT.base_buffer_desc_offset        
+    ADD        RCV_TEMP_REG_2.w0, RCV_TEMP_REG_2.w0, RCV_TEMP_REG_2.w2 
+    
+SKIP_LB_RCV_QUEUE_WRAP:
+    ;divide the queue fill level by 4
+    LSR        RCV_TEMP_REG_2.w0, RCV_TEMP_REG_2.w0, 2 
+    ;Read the queue max fill level
+    ADD        RCV_TEMP_REG_1.w0, RCV_CONTEXT.rcv_queue_pointer, Q_MAX_FILL_LEVEL_OFFSET       
+    .if    $defined("TWO_PORT_CFG")
+    LBCO    &RCV_TEMP_REG_2.b2, PRU1_DMEM_CONST, RCV_TEMP_REG_1.w0, 1    ;RCV_TEMP_REG_2.w2.b0
+    .else
+    LBCO       &RCV_TEMP_REG_2.b2, ICSS_SHARED_CONST, RCV_TEMP_REG_1.w0, 1     
+    
+    .endif ;TWO_PORT_CFG
+    ;compare the new queue fill level with max fill level
+    QBGE       LB_SKIP_NEW_FILL_LEVEL, RCV_TEMP_REG_2.b0, RCV_TEMP_REG_2.b2    
+    AND RCV_TEMP_REG_2.b2 , RCV_TEMP_REG_2.b0 , RCV_TEMP_REG_2.b0
+    ; store the new max fill level
+    .if    $defined("TWO_PORT_CFG")
+    SBCO    &RCV_TEMP_REG_2.b2, PRU1_DMEM_CONST, RCV_TEMP_REG_1.w0, 1     ;RCV_TEMP_REG_2.w2.b0
+    .else
+    SBCO       &RCV_TEMP_REG_2.b2, ICSS_SHARED_CONST, RCV_TEMP_REG_1.w0, 1     
+    
+    .endif ;TWO_PORT_CFG
+LB_SKIP_NEW_FILL_LEVEL:
+LB_HOST_PORT_QUEUE_OVERFLOW_CHECK:
+LB_HOST_QUEUE_OVERFLOW:
+    
+    ADD        RCV_TEMP_REG_1.w0, RCV_CONTEXT.rcv_queue_pointer, Q_OVERFLOW_CNT_OFFSET 
+    QBBS       LB_PORT_QUEUE_OVERFLOW_CHECK, R6, 0      ;replaced: QBBS        LB_PORT_QUEUE_OVERFLOW_CHECK, CODE_EXECUTING_FOR_PORT_RECEIVE ; 0 -> host recieve | 1 -> port recieve
+    QBBC       LB_HOST_PORT_QUEUE_OVERFLOW_CHECK_DONE, MII_RCV.rx_flags_extended, 6     ;replaced: QBBC        LB_HOST_PORT_QUEUE_OVERFLOW_CHECK_DONE, MII_RCV.rx_flags_extended.host_queue_overflow 
+    QBA        HOST_QUEUE_OVERFLOW_STATS
+    
+LB_PORT_QUEUE_OVERFLOW_CHECK:
+    QBBC       LB_HOST_PORT_QUEUE_OVERFLOW_CHECK_DONE, MII_RCV.rx_flags_extended, 7     ;replaced: QBBC        LB_HOST_PORT_QUEUE_OVERFLOW_CHECK_DONE, MII_RCV.rx_flags_extended.port_queue_overflow 
+    
+HOST_QUEUE_OVERFLOW_STATS:
+PORT_QUEUE_OVERFLOW_STATS:
+    
+    .if    $defined("TWO_PORT_CFG")
+    LBCO       &RCV_TEMP_REG_2.b2, PRU1_DMEM_CONST, RCV_TEMP_REG_1.w0, 1       
+    .else
+    LBCO       &RCV_TEMP_REG_2.b2, ICSS_SHARED_CONST, RCV_TEMP_REG_1.w0, 1     
+    .endif
+    ADD        RCV_TEMP_REG_2.b2, RCV_TEMP_REG_2.b2, 1 
+    .if    $defined("TWO_PORT_CFG")
+    SBCO       &RCV_TEMP_REG_2.b2, PRU1_DMEM_CONST, RCV_TEMP_REG_1.w0, 1       
+    .else
+    SBCO       &RCV_TEMP_REG_2.b2, ICSS_SHARED_CONST, RCV_TEMP_REG_1.w0, 1     
+    .endif
+LB_HOST_PORT_QUEUE_OVERFLOW_CHECK_DONE:
+    ; Update the Queue Descriptor with the new wr_ptr
+    ADD        RCV_TEMP_REG_1.w0, RCV_CONTEXT.rcv_queue_pointer, Q_RD_PTR_SIZE 
+    .if    $defined("TWO_PORT_CFG")
+    SBCO    &RCV_CONTEXT.wrkng_wr_ptr, PRU1_DMEM_CONST, RCV_TEMP_REG_1.w0, Q_WR_PTR_SIZE
+    .else
+    SBCO       &RCV_CONTEXT.wrkng_wr_ptr, ICSS_SHARED_CONST, RCV_TEMP_REG_1.w0, Q_WR_PTR_SIZE  
+    .endif ;TWO_PORT_CFG
+    .if $defined("ICSS_SWITCH_BUILD")  
+    .if    $defined("TWO_PORT_CFG")
+    QBBS    LB_CHECK_COLLISION_FOR_PORT, R6, 0    ;CODE_EXECUTING_FOR_PORT_RECEIVE
+    ; Update the collision status register with info required by the collision task.
+    QBBC    LB_UPDATE_CHECK_FWD_FLAG, MII_RCV.rx_flags, host_collision_queue_selected_shift    ;MII_RCV.rx_flags.host_collision_queue_selected
+    QBA        LB_UPDATE_COLLISION_STATUS
+    .endif ;TWO_PORT_CFG
+LB_CHECK_COLLISION_FOR_PORT:    
+    .if    $defined("TWO_PORT_CFG")
+    ; Update the collision status register with info required by the collision task.
+    QBBC    LB_NO_COLLISIION_OCCURED, MII_RCV.rx_flags, port_collision_queue_selected_shift    ;MII_RCV.rx_flags.port_collision_queue_selected
+LB_UPDATE_COLLISION_STATUS:    
+    LDI     RCV_TEMP_REG_1.w0, COLLISION_STATUS_ADDR
+    AND COLLISION_STATUS_REG.b2 , MII_RCV.qos_queue , MII_RCV.qos_queue        ;Warning: converted from MOV
+    LSL        COLLISION_STATUS_REG.b2, COLLISION_STATUS_REG.b2, 1
+    OR        COLLISION_STATUS_REG.b2, COLLISION_STATUS_REG.b2, 0x01
+    QBBC    LB_COLLISION_SATUS_FOR_HOST_QUEUE, R6, 0    ;CODE_EXECUTING_FOR_PORT_RECEIVE
+    .if    $defined("PRU0")
+    ADD        RCV_TEMP_REG_1.w0, RCV_TEMP_REG_1.w0, 2
+    .else
+    ADD        RCV_TEMP_REG_1.w0, RCV_TEMP_REG_1.w0, 1
+    .endif
+    
+    CLR        MII_RCV.rx_flags, MII_RCV.rx_flags, port_collision_queue_selected_shift   ; Clear the collision bit for port
+LB_COLLISION_SATUS_FOR_HOST_QUEUE:    
+    SBCO     &COLLISION_STATUS_REG.b2, PRU1_DMEM_CONST, RCV_TEMP_REG_1.w0, 1
+    
+    QBBC    LB_UPDATE_CHECK_FWD_FLAG, R6, 0    ;CODE_EXECUTING_FOR_PORT_RECEIVE
+    .endif ;TWO_PORT_CFG
+LB_NO_COLLISIION_OCCURED:
+LB_UPDATE_CHECK_DONE:    
+    .endif  ;ICSS_SWITCH_BUILD
+LB_RELEASE_QUEUE:
+    .if $defined("ICSS_SWITCH_BUILD")
+    QBBS    LB_RELEASE_HOST_QUEUE, MII_RCV.rx_flags_extended, host_queue_overflow_shift    ;MII_RCV.rx_flags_extended.host_queue_overflow
+    QBBC    LB_RELEASE_QUEUE_CHECK_FWD_FLAG, MII_RCV.rx_flags, host_rcv_flag_shift    ;MII_RCV.rx_flags.host_rcv_flag
+    .endif  ;ICSS_SWITCH_BUILD
+LB_RELEASE_HOST_QUEUE:  
+    ;Release the Receive Queue. De-assert the Queue busy bit
+    ; PRU0 is master so it clear's only "busy_m" bit
+    .if $defined("PRU0")       
+    ADD        RCV_TEMP_REG_1.w0, MII_RCV.rcv_queue_pointer, Q_STATUS_OFFSET   
+    .if    $defined("TWO_PORT_CFG")
+    LBCO    &RCV_TEMP_REG_2, PRU1_DMEM_CONST, RCV_TEMP_REG_1.w0, 3
+    .else
+    LBCO       &RCV_TEMP_REG_2, ICSS_SHARED_CONST, RCV_TEMP_REG_1.w0, 3        
+    
+    .endif ;TWO_PORT_CFG
+    AND        RCV_TEMP_REG_2.b0, RCV_TEMP_REG_2.b0, 0xFC      ; !(1<<Q_BUSY_M_BIT | 1<<Q_COLLISION_BIT)
+    QBBC       LB_NO_HOST_QUEUE_OVERFLOW_OCCURED, MII_RCV.rx_flags_extended, host_queue_overflow_shift  ;replaced: QBBC        LB_NO_HOST_QUEUE_OVERFLOW_OCCURED, MII_RCV.rx_flags_extended.host_queue_overflow 
+    OR RCV_TEMP_REG_2.b0, RCV_TEMP_REG_2.b0, 0x04      ; set the overflow bit
+    ADD        RCV_TEMP_REG_2.b2, RCV_TEMP_REG_2.b2, 1 ; increment the overflow count by 1 
+LB_NO_HOST_QUEUE_OVERFLOW_OCCURED:     
+    .if    $defined("TWO_PORT_CFG")
+    SBCO    &RCV_TEMP_REG_2.b0, PRU1_DMEM_CONST, RCV_TEMP_REG_1.w0, 3
+    .else
+    SBCO       &RCV_TEMP_REG_2.b0, ICSS_SHARED_CONST, RCV_TEMP_REG_1.w0, 3     
+    .endif ;TWO_PORT_CFG
+    
+    .else
+    ; PRU1 is slave so it clear's only "busy_s" bit
+    ADD        RCV_TEMP_REG_1.w0, MII_RCV.rcv_queue_pointer, Q_BUSY_S_OFFSET   
+    .if    $defined("TWO_PORT_CFG")
+    LBCO    &RCV_TEMP_REG_2, PRU1_DMEM_CONST, RCV_TEMP_REG_1.w0, 4
+    .else
+    LBCO       &RCV_TEMP_REG_2, ICSS_SHARED_CONST, RCV_TEMP_REG_1.w0, 4        
+    .endif ;TWO_PORT_CFG
+    LDI        RCV_TEMP_REG_2.b0, 0    
+    QBBC       LB_NO_HOST_QUEUE_OVERFLOW_OCCURED_SLAVE, MII_RCV.rx_flags_extended, host_queue_overflow_shift    ;replaced: QBBC        LB_NO_HOST_QUEUE_OVERFLOW_OCCURED_SLAVE, MII_RCV.rx_flags_extended.host_queue_overflow 
+    OR RCV_TEMP_REG_2.b1, RCV_TEMP_REG_2.b1, 0x04      ; set the overflow bit
+    ADD        RCV_TEMP_REG_2.b3, RCV_TEMP_REG_2.b3, 1 ; increment the overflow count by 1 
+LB_NO_HOST_QUEUE_OVERFLOW_OCCURED_SLAVE:       
+    .if    $defined("TWO_PORT_CFG")
+    SBCO    &RCV_TEMP_REG_2, PRU1_DMEM_CONST, RCV_TEMP_REG_1.w0, 4
+    .else
+    SBCO       &RCV_TEMP_REG_2, ICSS_SHARED_CONST, RCV_TEMP_REG_1.w0, 4        
+    .endif ;TWO_PORT_CFG
+    .endif
+    .if $defined(PTP)
+    QBBC    LB_RELEASE_QUEUE_CHECK_FWD_FLAG, R22, PTP_RELEASE_HOST_QUEUE_BIT
+    CLR     R22, R22, PTP_RELEASE_HOST_QUEUE_BIT
+    QBA     PTP_HOST_QUEUE_RELEASE_DONE
+    .endif
+
+LB_RELEASE_QUEUE_CHECK_FWD_FLAG:
+    .if $defined("ICSS_SWITCH_BUILD")
+    QBBS    LB_RELEASE_PORT_QUEUE, MII_RCV.rx_flags_extended, port_queue_overflow_shift    ;MII_RCV.rx_flags_extended.port_queue_overflow
+    QBBC    LB_RELEASE_QUEUE_CHECK_DONE, MII_RCV.rx_flags, fwd_flag_shift    ;MII_RCV.rx_flags.fwd_flag
+
+LB_RELEASE_PORT_QUEUE:    
+    ;Release the Port Receive Queue. clear busy_m bit in status as PRU is master
+    
+    ADD        RCV_TEMP_REG_1.w0, MII_RCV_PORT.rcv_queue_pointer, Q_STATUS_OFFSET
+    .if    $defined("TWO_PORT_CFG")
+    LBCO    &RCV_TEMP_REG_2, PRU1_DMEM_CONST, RCV_TEMP_REG_1.w0, 3
+    .else
+    LBCO    &RCV_TEMP_REG_2, ICSS_SHARED_CONST, RCV_TEMP_REG_1.w0, 3
+    .endif ;TWO_PORT_CFG
+    AND        RCV_TEMP_REG_2.b0, RCV_TEMP_REG_2.b0, 0xFC  ; !(1<<Q_BUSY_M_BIT | 1<<Q_COLLISION_BIT)
+    QBBC    LB_NO_PORT_QUEUE_OVERFLOW_OCCURED, MII_RCV.rx_flags_extended, port_queue_overflow_shift    ;MII_RCV.rx_flags_extended.port_queue_overflow
+    OR        RCV_TEMP_REG_2.b0, RCV_TEMP_REG_2.b0, 0x04   ; set the overflow bit
+    ADD        RCV_TEMP_REG_2.b2, RCV_TEMP_REG_2.b2, 1     ; increment the overflow count by 1
+LB_NO_PORT_QUEUE_OVERFLOW_OCCURED:    
+    .if    $defined("TWO_PORT_CFG")
+    SBCO    &RCV_TEMP_REG_2.b0, PRU1_DMEM_CONST, RCV_TEMP_REG_1.w0, 3
+    .else
+    SBCO    &RCV_TEMP_REG_2.b0, ICSS_SHARED_CONST, RCV_TEMP_REG_1.w0, 3
+    .endif ;TWO_PORT_CFG
+    .if $defined(PTP)
+    QBBC    LB_RELEASE_QUEUE_CHECK_DONE, R22, PTP_RELEASE_PORT_QUEUE_BIT
+    CLR     R22, R22, PTP_RELEASE_PORT_QUEUE_BIT
+    QBA     PTP_PORT_QUEUE_RELEASE_DONE
+    .endif
+LB_RELEASE_QUEUE_CHECK_DONE: 
+LB_MAINTENANCE:
+    .endif ;ICSS_SWITCH_BUILD
+    
+    CLR        R23 , R23 , Rcv_active ; indicate that rcv has been completed  
+    QBBS       LB_NO_RX_STAT, MII_RCV.rx_flags, rx_frame_error_shift    ;replaced: QBBS        LB_NO_RX_STAT, MII_RCV.rx_flags.rx_frame_error 
+    SET        R23 , R23 , RX_STAT_PEND 
+    
+    .if $defined("ICSS_SWITCH_BUILD")
+    QBBC    LB_DONE, MII_RCV.rx_flags, host_rcv_flag_shift    ;MII_RCV.rx_flags.host_rcv_flag
+    .if    $defined("TWO_PORT_CFG")
+    QBBS    LB_DONE, MII_RCV.rx_flags, host_collision_queue_selected_shift        ;MII_RCV.rx_flags.host_collision_queue_selected
+    .endif ;TWO_PORT_CFG
+    .endif ;ICSS_SWITCH_BUILD
+
+    M_RCV_RX_EOF_INTERRUPT_RAISE_INTC           ; raise RX interrupt on intc controller.
+    
+    .if $defined("ICSS_SWITCH_BUILD")
+LB_DONE:
+    .if    $defined("TWO_PORT_CFG")
+    CLR        MII_RCV.rx_flags, MII_RCV.rx_flags,  host_collision_queue_selected_shift    ;MII_RCV.rx_flags.host_collision_queue_selected
+    .endif ;TWO_PORT_CFG
+    QBBC    DO_NOT_SET_RX_FWD, MII_RCV.rx_flags, fwd_flag_shift    ;MII_RCV.rx_flags.fwd_flag
+    .if    $defined("TWO_PORT_CFG")
+    SET     R22, R22, RX_FWD_FLAG
+    .endif ;TWO_PORT_CFG
+    
+DO_NOT_SET_RX_FWD:    
+    .endif ;ICSS_SWITCH_BUILD
+    
+LB_NO_RX_STAT:
+    
+    .if $defined("ICSS_REV1")  
+    M_RCV_RX_EOF_CLEAR_INTC_ICSS_REV1
+    .endif     ;ICSS_REV1
+    
+    .if $defined("ICSS_REV2")  
+    M_RCV_RX_EOF_CLEAR_INTC_ICSS_REV2
+    .endif     ;ICSS_REV2
+    
+    ; Execute the TX Task as next task
+    QBBC       TASK_EXECUTION_FINISHED_inter, R23, 0    ;replaced: QBBC        TASK_EXECUTION_FINISHED_inter, Xmt_active 
+    LDI        CURRENT_TASK_POINTER, BG_TASK_POINTER   
+    JMP                XMT_QUEUE
+    
+TASK_EXECUTION_FINISHED_inter:
+    JMP        TASK_EXECUTION_FINISHED
+    
+    .if    $defined("TWO_PORT_CFG")
+;/////////////////////////////// Experimenting Start /////////////////////////////////////////////////////
+
+;-------------------------------------------------------------------------------------------
+; Function:             F_QUEUE_ARBITRATION
+; Description:         Function will aquire token for either queue or collision buffer
+; Input:    MII_RCV.qos_queue - contains the Qos queue number as been determined by the RX_FB function
+; Input:     RCV_TEMP_REG_3.w0 - contains the base address of host/port queue
+; Input:     RCV_TEMP_REG_3.w2 - contains the base address of the collision queue
+; Input:   RCV_TEMP_REG_1.b1 - contains information about whether called for host or port queue arbitration 
+; Output:    RCV_TEMP_REG_1.b0 - returns value for caller, to indicate that the queue has been aquired 
+;                                successful ((0-failed to aquire; 1-queue; 2-collision)
+; Output:    RCV_TEMP_REG_2.w0 - returns the queue pointer after aquiring the queue
+; Output:    RCV_TEMP_REG_2.w2 - returns the current write pointer of the queue that has been aquired
+;                                is used as wrkng_wr_ptr during the following packet processing
+;            RCV_TEMP_REG_1.w2 - temporayr use 
+;-------------------------------------------------------------------------------------------
+
+FN_QUEUE_ARBITRATION:
+    LDI        RCV_TEMP_REG_1.b0, 0x00
+QAM_CHECK:
+    LSL        RCV_TEMP_REG_1.w2, MII_RCV.qos_queue, 3        ; adjust queue-number offset to 8byte boundaries
+    QBNE    PICK_NORMAL_QUEUE, RCV_TEMP_REG_1.b0, COLLISION_AQUIRED
+    LDI        RCV_TEMP_REG_1.w2, 0x0
+PICK_NORMAL_QUEUE:    
+    ADD        RCV_TEMP_REG_1.w2, RCV_TEMP_REG_3.w0, RCV_TEMP_REG_1.w2    ; adjust for queue base address
+    ADD        RCV_TEMP_REG_3.w0, RCV_TEMP_REG_1.w2, Q_BUSY_S_OFFSET    ; .w2 points to Q_BUSY_S_OFFSET
+    ADD        RCV_TEMP_REG_1.w2, RCV_TEMP_REG_1.w2, Q_STATUS_OFFSET    ; .w0 points to Q_STATUS_OFFSET
+    LBCO    &RCV_TEMP_REG_2.w2, PRU1_DMEM_CONST, RCV_TEMP_REG_3.w0, Q_BUSY_S_SIZE + Q_STATUS_SIZE ; load busy_s + status of this queue
+    ; Check if it is called for the Port Arbitration
+    QBBS    PORT_QUEUE_ARBITRATION, RCV_TEMP_REG_1.b1, 0    ;RCV_TEMP_REG_1.b1.t0
+    .if    $defined("PRU0")      
+    QBBS    QAM_BUSY, RCV_TEMP_REG_2.b2, Q_BUSY_S_BIT    ; is queue already busy?  PRU0 is master    ;RCV_TEMP_REG_2.w2.b0
+    SET        RCV_TEMP_REG_2.b3, RCV_TEMP_REG_2.b3, Q_BUSY_M_BIT    ;RCV_TEMP_REG_2.w2.b1
+    SBCO    &RCV_TEMP_REG_2.b3, PRU1_DMEM_CONST, RCV_TEMP_REG_1.w2, Q_STATUS_SIZE    ; set busy_m into memory
+    QBA        QAM_CALC_QUEUE_POINTER
+    .else
+    QBBS    QAM_BUSY, RCV_TEMP_REG_2.b3, Q_BUSY_M_BIT    ; is queue already busy? PRU1 is slave    ;RCV_TEMP_REG_2.w2.b1
+    SET        RCV_TEMP_REG_2.b2, RCV_TEMP_REG_2.b2, Q_BUSY_S_BIT    ;RCV_TEMP_REG_2.w2.b0
+    SBCO    &RCV_TEMP_REG_2.b2, PRU1_DMEM_CONST, RCV_TEMP_REG_3.w0, Q_BUSY_S_SIZE     ; set busy_s into memory
+    ; load again busy_m ..only for Slave because it needs to check that master has not acquired the queue inbetween
+    LBCO    &RCV_TEMP_REG_2.b3, PRU1_DMEM_CONST, RCV_TEMP_REG_1.w2, Q_STATUS_SIZE    ;RCV_TEMP_REG_2.w2.b1
+    QBBC    QAM_CALC_QUEUE_POINTER, RCV_TEMP_REG_2.b3, Q_BUSY_M_BIT    ; is queue already busy?
+    ; Clear busy_s bit because busy_m bit is set
+    CLR        RCV_TEMP_REG_2.b2, RCV_TEMP_REG_2.b2, Q_BUSY_S_BIT    ;RCV_TEMP_REG_2.w2.b0
+    SBCO    &RCV_TEMP_REG_2.b2, PRU1_DMEM_CONST, RCV_TEMP_REG_3.w0, Q_BUSY_S_SIZE     ; clear busy_s into memory    ;RCV_TEMP_REG_2.w2.b0
+    QBA        QAM_BUSY
+    .endif
+
+PORT_QUEUE_ARBITRATION:
+    QBBS    QAM_BUSY, RCV_TEMP_REG_2.b2, Q_BUSY_S_BIT    ; is queue already busy?  PRU0 is master    ;RCV_TEMP_REG_2.w2.b0
+    SET        RCV_TEMP_REG_2.b3, RCV_TEMP_REG_2.b3, Q_BUSY_M_BIT    ;RCV_TEMP_REG_2.w2.b1
+    SBCO    &RCV_TEMP_REG_2.b3, PRU1_DMEM_CONST, RCV_TEMP_REG_1.w2, Q_STATUS_SIZE    ; set busy_m into memory
+    QBA        QAM_CALC_QUEUE_POINTER
+    
+QAM_BUSY: ; failed to aquire the queue, now try the colission
+    QBEQ    QAM_FAILED, RCV_TEMP_REG_1.b0, COLLISION_AQUIRED
+    AND RCV_TEMP_REG_3.w0 , RCV_TEMP_REG_3.w2 , RCV_TEMP_REG_3.w2
+    LDI        RCV_TEMP_REG_1.b0, COLLISION_AQUIRED        ; failed to aquire the queue, indicate this to macro caller by returing 0
+    ;check that host has emptied the queue before acquiring it
+    LDI      RCV_TEMP_REG_1.w2, COLLISION_STATUS_ADDR
+    ADD      RCV_TEMP_REG_1.w2, RCV_TEMP_REG_1.w2, 3 
+    LBCO     &RCV_TEMP_REG_1.b3, PRU1_DMEM_CONST, RCV_TEMP_REG_1.w2, 1
+       QBBC    QAM_CHECK, RCV_TEMP_REG_1, 3     ;replaced: QBBC    QAM_CHECK, RCV_TEMP_REG_1.HOST_COLLISION_READ_PENDING 
+       
+QAM_FAILED:
+    LDI        RCV_TEMP_REG_1.b0, QUEUE_FAILED    ; failed to aquire queue & collision 
+    LDI        RCV_TEMP_REG_2.w2, 0
+    QBA        QAM_DONE
+QAM_CALC_QUEUE_POINTER:
+    QBEQ    PICK_COL_QUEUE, RCV_TEMP_REG_1.b0, COLLISION_AQUIRED
+    ; return value that queue had been aquired OK.
+    LDI        RCV_TEMP_REG_1.b0, QUEUE_AQUIRED
+PICK_COL_QUEUE:    
+    ; adjust the pointer to the wr_ptr offset
+    SUB        RCV_TEMP_REG_2.w0, RCV_TEMP_REG_1.w2, Q_STATUS_OFFSET - Q_WR_PTR_OFFSET
+    ; load wr_ptr from memory, and us it to init the wrkng_wr_ptr
+    LBCO    &RCV_TEMP_REG_2.w2, PRU1_DMEM_CONST, RCV_TEMP_REG_2.w0, Q_WR_PTR_SIZE
+    ; ToDo: this can be optimized!
+    SUB        RCV_TEMP_REG_2.w0, RCV_TEMP_REG_2.w0, Q_WR_PTR_OFFSET
+QAM_DONE:
+    JMP        CALL_REG        
+  
+;////////////////////////////// Experimenting End ////////////////////////////////////////////////////////////////////    
+    .endif ;TWO_PORT_CFG
+    .endif  ; e/o MII_Rcv_p
diff --git a/packages/ti/drv/icss_emac/firmware/icss_dualemac/src/emac_MII_Rcv.h b/packages/ti/drv/icss_emac/firmware/icss_dualemac/src/emac_MII_Rcv.h
new file mode 100644 (file)
index 0000000..d085ecc
--- /dev/null
@@ -0,0 +1,639 @@
+;
+;  TEXAS INSTRUMENTS TEXT FILE LICENSE
+; 
+;   Copyright (c) 2017-2018 Texas Instruments Incorporated
+; 
+;  All rights reserved not granted herein.
+;  
+;  Limited License.  
+; 
+;  Texas Instruments Incorporated grants a world-wide, royalty-free, non-exclusive 
+;  license under copyrights and patents it now or hereafter owns or controls to 
+;  make, have made, use, import, offer to sell and sell ("Utilize") this software 
+;  subject to the terms herein.  With respect to the foregoing patent license, 
+;  such license is granted  solely to the extent that any such patent is necessary 
+;  to Utilize the software alone.  The patent license shall not apply to any 
+;  combinations which include this software, other than combinations with devices 
+;  manufactured by or for TI (“TI Devices”).  No hardware patent is licensed hereunder.
+; 
+;  Redistributions must preserve existing copyright notices and reproduce this license 
+;  (including the above copyright notice and the disclaimer and (if applicable) source 
+;  code license limitations below) in the documentation and/or other materials provided 
+;  with the distribution.
+;  
+;  Redistribution and use in binary form, without modification, are permitted provided 
+;  that the following conditions are met:
+;      No reverse engineering, decompilation, or disassembly of this software is 
+;   permitted with respect to any software provided in binary form.
+;      Any redistribution and use are licensed by TI for use only with TI Devices.
+;      Nothing shall obligate TI to provide you with source code for the software 
+;   licensed and provided to you in object code.
+;  
+;  If software source code is provided to you, modification and redistribution of the 
+;  source code are permitted provided that the following conditions are met:
+;      Any redistribution and use of the source code, including any resulting derivative 
+;   works, are licensed by TI for use only with TI Devices.
+;      Any redistribution and use of any object code compiled from the source code
+;   and any resulting derivative works, are licensed by TI for use only with TI Devices.
+; 
+;  Neither the name of Texas Instruments Incorporated nor the names of its suppliers 
+;  may be used to endorse or promote products derived from this software without 
+;  specific prior written permission.
+; 
+;  DISCLAIMER.
+; 
+;  THIS SOFTWARE IS PROVIDED BY TI AND TI’S LICENSORS "AS IS" AND ANY EXPRESS OR IMPLIED 
+;  WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY 
+;  AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL TI AND TI’S 
+;  LICENSORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 
+;  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
+;  GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 
+;  CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+;  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 
+;  EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+; 
+; file:  emac_MII_Rcv.h
+;
+; brief:       Defines and macros to be used in receive task.
+;
+;
+;  (C) Copyright 2017-2018, Texas Instruments, Inc
+;
+;
+       
+       .if !$defined("__mii_rcv_hp")   
+__mii_rcv_hp   .set    1       
+       
+       .if $defined("ICSS_DUAL_EMAC_BUILD")
+       .include "icss_emacSwitch.h"
+    .cdecls C,NOLIST
+%{
+#include "icss_vlan_mcast_filter_mmap.h"
+%}
+       .endif ; MULTICAST Filtering
+       .if $defined("ICSS_SWITCH_BUILD")       
+        .include "icss_switch.h"
+       .endif
+       .include "icss_defines.h"
+    .cdecls C,NOLIST
+%{
+#include "icss_rx_int_pacing_mmap.h"
+%}
+       
+; MII receive structure definition
+       .asg    t0, host_rcv_flag               ; rcv will place frame into host queue
+host_rcv_flag_shift    .set    0       
+       .asg    t1, fwd_flag            ; rcv will place frame into port queue
+fwd_flag_shift .set    1       
+       .asg    t2, ct_bank_index               ; indication for that data is either in R2..R5 or R6..R9; used only by rx function
+ct_bank_index_shift    .set    2       
+       .asg    t3, rx_bank_index               ; indication for rcv of where to get the next 32 bytes of data (bank0/1)
+rx_bank_index_shift    .set    3       
+       .asg    t4, rx_frame_error              ; used to indicate a frame error to Xmt function
+rx_frame_error_shift   .set    4       
+       .asg    t5, port_collision_queue_selected               ; will indicate if the port collision queue has been selected
+port_collision_queue_selected_shift    .set    5       
+       .asg    t6, host_collision_queue_selected               ; will indicate if the host collision queue has been selected
+host_collision_queue_selected_shift    .set    6       
+       .asg    t7, last_block_multi_bank_processing            ; during last_block function, we need to process more than one bank of data
+last_block_multi_bank_processing_shift .set    7       
+       
+       .asg    t0, cut_through_flag            ; rcv in cut-through (16 byte) mode
+cut_through_flag_shift .set    0       
+       .asg    t1, ct_data_available           ; indication for Xmt that new data is in bank0 (scratchpad)
+ct_data_available_shift        .set    1       
+       .asg    t2, ct_last_block               ; indication for Xmt that this is the last block of data, R18.b0 provides the amount of data to transmit
+ct_last_block_shift    .set    2       
+       
+       .asg    t0, delay_resp  
+delay_resp_shift       .set    0       
+       .asg    t1, delay_resp_followup 
+delay_resp_followup_shift      .set    1       
+       .asg    t2, delay_followup_resp 
+delay_followup_resp_shift      .set    2       
+       .asg    t3, delay_request       
+delay_request_shift    .set    3       
+       .asg    t4, process_lb_part1_executed           ; When processing multibank, we spilt it into two parts ..this bit indicate that 1st part is done.
+process_lb_part1_executed_shift        .set    4       
+       .asg    t5, unicast_pkt_cut_through     
+unicast_pkt_cut_through_shift  .set    5       
+       .asg    t6, host_queue_overflow 
+host_queue_overflow_shift      .set    6       
+       .asg    t7, port_queue_overflow 
+port_queue_overflow_shift      .set    7       
+
+; MII structure for receive register descriptor
+MII_RCV_DESC   .struct 
+rx_flags       .ubyte  
+tx_flags       .ubyte  
+rx_flags_extended      .ubyte  
+qos_queue      .ubyte  ; for host/port queue, this stores the priority queue as determined by the frame
+byte_cntr      .ushort ; total amount of bytes received
+wrkng_wr_ptr   .ushort ; same as port, but points to the host buffer
+rd_ptr .ushort 
+buffer_index   .ushort ;offset in L3 where data is to be stored
+base_buffer_index      .ushort ; offset in L3 of 32 bytes data correspondin to first buffer_desc
+rcv_queue_pointer      .ushort ; host queue  pointer
+base_buffer_desc_offset        .ushort ; offset of the base buffer desc for the queue selected
+top_most_buffer_desc_offset    .ushort ; offset of the last/top buffer desc for the queue selected
+       .endstruct
+       
+; MII structure for PORT receive
+MII_RCV_PORT_DESC      .struct 
+byte_cntr      .ushort ; total amount of bytes received
+wrkng_wr_ptr   .ushort ; same as port, but points to the host buffer
+rd_ptr .ushort 
+buffer_index   .ushort ; offset in L3 where data is to be stored
+base_buffer_index      .ushort ; offset in L3 of 32 bytes data correspondin to first buffer_desc
+rcv_queue_pointer      .ushort ; port queue  pointer
+base_buffer_desc_offset        .ushort ; offset of the base buffer desc for the queue selected
+top_most_buffer_desc_offset    .ushort ; offset of the last/top buffer desc for the queue selected
+       .endstruct
+       
+       .if $defined("ICSS_SWITCH_BUILD")       
+; add MII structure for CPM receive
+MII_RCV_CPM_DESC    .struct 
+rx_flags    .ubyte
+tx_flags    .ubyte        
+Buffer_Offset    .ushort                    ; current offset into L3 CPM buffer for write operation
+Desc_Offset    .ushort                        ; offset to current CPM buffer descriptor
+byte_cntr    .ushort                        ; current number of bytes received
+CPM_Flags    .ubyte                            ; flags for CPM processing
+CPM_NUMBER    .ubyte                
+CPM_idle2    .ushort    
+CPM_idle3    .uint        
+    .endstruct
+
+    .asg    t0    ,    VLAN_tag    ; indicates that received CPM frame is tagged
+    .asg    t1    ,    BC    ; indicates buffer complete to host. This flag is cleared by PRU when set by host only
+    .asg    t2    ,    idx1    ; buffer index = 1
+    .asg    t3    ,    idx2    ; buffer index = 2    
+    .asg    t4    ,    CPM_Error    ; indicates received error which can be CRC, Length, 
+       .endif  ;ICSS_SWITCH_BUILD
+       
+       .asg    R2.w0, RX_CONTEXT_OFFSET        
+       .asg    R2.w2, RX_PORT_CONTEXT_OFFSET   
+
+       .asg    R18.b0, R18_RCV_BYTECOUNT                       ; wrt pointer of L2 buffer, has amount of data
+;      .asg    R23.t0, Xmt_active                      ; global flag that indicates if transmission is ongoing
+Xmt_active                                                     .set    0
+;      .asg    R23.t1, Rcv_active                      ; global flag that indicates if reception is ongoing
+Rcv_active                                                     .set    1
+;      .asg    R23.t2, TX_STAT_PEND    
+TX_STAT_PEND                                           .set    2
+;      .asg    R23.t3, RX_STAT_PEND    
+RX_STAT_PEND                                           .set    3
+;      .asg    R23.t4, TX_DELAY_REQ            ; This flag is just for debug ...set when pkt is received and cleared in RX_FB and STATS
+TX_DELAY_REQ                                           .set    4
+;      .asg    R23.t5, TX_DELAY_RESP   
+TX_DELAY_RESP                                          .set    5
+;      .asg    R23.t6, TX_DELAY_FOLLOWUP_RESP  
+TX_DELAY_FOLLOWUP_RESP                         .set    6
+       
+;      .asg    R23.t7, TX_PHY_SPEED            ; If 0 for 10 Mbps. 1 for 100 Mbps.
+TX_PHY_SPEED                                           .set    7
+       
+       .asg    R23.b1, PREVIOUS_R18_RCV_BYTECOUNT      
+       .asg    R23.w2, CUT_THROUGH_BYTE_CNT    
+       
+       .asg    R21, COLLISION_STATUS_REG       
+       .asg    R20, RCV_TEMP_REG_1                     ; buffer need to be in consecutive register space
+       .asg    R21, RCV_TEMP_REG_2     
+       .asg    R13, RCV_TEMP_REG_3     
+       .asg    R12, RCV_TEMP_REG_4     
+       .asg    R21, RCV_BUFFER_DESC_OFFSET     
+       .asg    R6.t0, CODE_EXECUTING_FOR_PORT_RECEIVE  
+       
+PORT_COLLISION_BIT                                     .set    2       
+       
+QPR_ERROR_NO_SPACE_IN_QUEUE                    .set    0xff    
+QPR_ERROR_BYTES_TO_WRITE_IS_ZERO       .set    0xfe    
+       
+       .asg    RCV_TEMP_REG_2.w0, FORWARD_TABLE_POINTER
+       .asg    RCV_TEMP_REG_2.w0, RECEIVE_TABLE_POINTER
+       
+; macro defines
+Q_RD_PTR_OFFSET                                .set    0       
+Q_RD_PTR_SIZE                          .set    2       
+Q_WR_PTR_OFFSET                                .set    2       
+Q_WR_PTR_SIZE                          .set    2       
+Q_BUSY_S_OFFSET                                .set    4       
+Q_BUSY_S_SIZE                          .set    1       
+Q_STATUS_OFFSET                                .set    5       
+Q_STATUS_SIZE                          .set    1       
+
+Q_BUSY_S_BIT                           .set    0       
+Q_BUSY_M_BIT                           .set    0       
+Q_COLLISION_BIT                                .set    1       
+Q_OVERFLOW_BIT                         .set    2       
+
+QUEUE_FAILED                           .set    0       
+QUEUE_AQUIRED                          .set    1       
+COLLISION_AQUIRED                      .set    2       
+       
+; RX L2 status register specific meanings
+       .asg    t0, RXL2_RX_ERR_BIT     
+       .asg    t1, RXL2_STATUS_RDY_BIT 
+       .asg    t2, RXL2_RX_ERROR_BIT   
+       .asg    t3, RXL2_RX_EOF_BIT     
+       .asg    t4, RXL2_RX_SFD_BIT     
+       .asg    t5, RXL2_RX_SOF_BIT     
+       .asg    t6, RXL2_ERROR_NIBBLE   
+       .asg    t7, RXL2_ERROR_CRC      
+       
+RANGE_R2_R5                                    .set    (4 * 4) 
+RANGE_R2_R6                                    .set    (4 * 5) 
+RANGE_R6_R9                                    .set    (4 * 4) 
+RANGE_R2_R9                                    .set    (4 * 8)   ; used by XFER, amount of bytes from R2 - R9
+RANGE_R2_R13                           .set    (4 * 12) 
+RANGE_R2_R18                           .set    (4 * 17)  ; used by XFER, amount of bytes from R2 - R18
+RANGE_R10_R18                          .set    (4 * 9) 
+RANGE_R10_R13                          .set    (4 * 4) 
+RANGE_R18_b0                           .set    1       
+       
+       .asg    R0.b0, SHIFT_REG        
+SHIFT_NONE                                     .set    0       
+SHIFT_R2_TO_R5                         .set    3        ; dest(2+3)
+SHIFT_R2_TO_R6                         .set    4        ; dest(2+4)
+SHIFT_R2_TO_R8                         .set    6        ; dest(2+6)
+SHIFT_R2_TO_R10                        .set    8        ; dest(2+8)
+SHIFT_R2_TO_R17                        .set    15       ; dest(2+15)
+SHIFT_R2_TO_R0                         .set    28       ; dest(2+28-30)
+SHIFT_R7_TO_R18                                .set    11      
+SHIFT_R2_TO_R18                                .set    16      
+; Below are used for Port Receive code
+SHIFT_R14_TO_R0                        .set    16       ; dest(14+16-30)  ; For PRU0
+SHIFT_R14_TO_R4                        .set    20       ; dest(14+20-30)  ; For PRU1
+SHIFT_R14_TO_R8                        .set    24       ; dest(14+24-30)  ; For PRU0
+SHIFT_R10_TO_R6                        .set    26       ; dest(10+26-30)
+SHIFT_R10_TO_R8                        .set    28       ; dest(10+28-30)  ; For PRU0
+SHIFT_R9_TO_R0                         .set    21       ; dest(9+21-30) ;for intercom
+       
+SHIFT_R21_TO_R10               .set    19       ; dest(21+19-30)  ; For PRU0
+       
+SHIFT_R12_TO_R9                        .set    27       ; dest(12+27-30)  ; For PRU0
+SHIFT_R12_TO_R10               .set    28       ; dest(12+28-30)  ; For PRU1
+
+SHIFT_R14_TO_R18               .set    4        ; dest(14+4-30)  ; For PRU0
+SHIFT_R14_TO_R20               .set    6        ; dest(14+6-30)  ; For PRU0
+SHIFT_R18_TO_R16               .set    28       ; dest(18+28-30)
+SHIFT_R18_TO_R25               .set    7        ; dest(18+7)
+
+SHIFT_R2_TO_R26                        .set    24       ; dest(26+6-30)
+SHIFT_R2_TO_R2                         .set    0        ; dest(0+2)
+SHIFT_R2_TO_R4                         .set    2        ; dest(4+28-30)
+       
+; TPID = tag protocol ID, typ 8100 for tagged frames
+; TCI  = tag control info with user priority in 3 MSBs
+struct_Ethernet        .struct 
+DstAddr_0123   .uint   ;R2
+DstAddr_45     .ushort ;R3
+SrcAddr_01     .ushort 
+SrcAddr_23     .ushort ;R4
+SrcAddr_45     .ushort 
+TPID           .ushort ;R5
+TCI .union
+x_b .struct
+b0              .ubyte
+b1              .ubyte
+        .endstruct
+        .endunion ; TCI
+ProtWord2      .ushort ;R6
+ProtWord3      .ushort 
+ProtWord4      .ushort ;R7
+ProtWord5      .ushort 
+ProtWord6      .ushort ;R8
+ProtWord7      .ushort 
+ProtWord8      .ushort ;R9
+ProtWord9      .ushort 
+       .endstruct
+       
+       .asg    t0, multicast                                   ; multicast bit in DstByte_0
+struct_EthByte .struct 
+DstByte_0      .ubyte  
+DstByte_1      .ubyte  
+DstByte_2      .ubyte  
+DstByte_3      .ubyte  
+DstByte_4      .ubyte  
+DstByte_5      .ubyte  
+SrcByte_0      .ubyte  
+SrcByte_1      .ubyte  
+SrcByte_2      .ubyte  
+SrcByte_3      .ubyte  
+SrcByte_4      .ubyte  
+SrcByte_5      .ubyte  
+       .endstruct
+       
+       .asg    R25, RCV_REGISTER_1     
+       .asg    R29, RCV_REGISTER_2     
+       
+Ethernet                       .sassign         R2     ,       struct_Ethernet 
+EthByte                        .sassign         R2     ,       struct_EthByte  
+MII_RCV                        .sassign         RCV_REGISTER_1 ,       MII_RCV_DESC    ; This context is for Host Receive
+MII_RCV_PORT           .sassign         R14 ,  MII_RCV_PORT_DESC       ; This context is for Port Receive
+RCV_CONTEXT                    .sassign         R2 ,   MII_RCV_PORT_DESC       
+RCV_QUEUE_DESC_REG     .sassign         R20 ,  struct_queue    
+       
+       .asg    R5, PROTOCOL_TYPE_FRAME_ID      
+PTP_DELAY_REQUEST                              .set    0x40ff9288      
+PTP_DELAY_RESPONSE                             .set    0x43ff9288      
+PTP_DELAY_RESPONSE_FOLLLOWUP   .set    0x41ff9288      
+PTP_DELAY_FOLLOWUP_RESPONSE            .set    0x42ff9288      
+       
+
+;------------------------------------------------------------------------------
+; Macro Name: M_MULTICAST_TABLE_SEARCH_OP
+; Description:  Multicast table lookup
+; Input Parameters:  -
+; Use of registers: RCV_TEMP_REG_3/4
+; Peak PRU cycles : 16
+; output registers : -
+;------------------------------------------------------------------------------
+M_MULTICAST_TABLE_SEARCH_OP  .macro
+
+; load multicast mask offset | one time operation => register can be reused
+; load the mask 48 bits (6 bytes)
+    LDI    RCV_TEMP_REG_4.w0, ICSS_EMAC_FW_MULTICAST_FILTER_MASK_OFFSET
+    LBCO   &RCV_TEMP_REG_4.w0, PRU_DMEM_ADDR, RCV_TEMP_REG_4.w0, 6
+;----------------------------------------
+;               MASK UPPER              | R12 | RCV_TEMP_REG_4
+;----------------------------------------
+;    MASK LOWER     |                   | R13 | RCV_TEMP_REG_3
+;----------------------------------------
+
+; Perform AND operation on the MAC ID with the mask | replace the mask
+;   32 bit AND b/w RCV_TEMP_REG_4 & DstAddr upper
+;   16 bit AND b/w RCV_TEMP_REG_3.w0 & DstAddr lower
+    AND    RCV_TEMP_REG_4, RCV_TEMP_REG_4, Ethernet.DstAddr_0123
+    AND    RCV_TEMP_REG_3.w0, RCV_TEMP_REG_3.w0, Ethernet.DstAddr_45
+;----------------------------------------
+;         MAC ID MASKED UPPER           | R12 | RCV_TEMP_REG_4
+;----------------------------------------
+; MAC ID MASKED LOWER |                 | R13 | RCV_TEMP_REG_3
+;----------------------------------------
+
+; XOR the 6 bytes of the MAC ID MASKED to obtain hash
+; optimised algo to obtain hash in 3 iterations avaiable at https://sps05.itg.ti.com/sites/tiisw/bu/armmpu/Documents/
+; Industrial%20FieldBus/HSR_PRP/Add%20Multicast%20filtering%20support%20to%20HSR%20PRP/XOR%20comparison.pptx
+; This XOR result will be used as an index into MULTICAST_FILTER_TABLE
+    XOR    RCV_TEMP_REG_4.w0, RCV_TEMP_REG_4.w0, RCV_TEMP_REG_4.w2
+    XOR    RCV_TEMP_REG_4.w0, RCV_TEMP_REG_4.w0, RCV_TEMP_REG_3.w0
+    XOR    RCV_TEMP_REG_4.b0, RCV_TEMP_REG_4.b0, RCV_TEMP_REG_4.b1
+;-----------------------------------------
+; 8-BIT-XOR-RESULT |      |       |      | R12 | RCV_TEMP_REG_4
+;-----------------------------------------
+
+; MULTICAST_FILTER_TABLE size = 1 byte per entry * 256 entries = 256 bytes
+; Lookup the byte in MULTICAST_FILTER_TABLE using the 8-BIT-XOR-RESULT as index | index in RCV_TEMP_REG_4.b0
+
+; Load multicast lookup table base address | one time operation => register can be reused
+    LDI    RCV_TEMP_REG_3.w0, ICSS_EMAC_FW_MULTICAST_FILTER_TABLE
+;-------------------------------------------------------
+;  8-BIT-XOR-RESULT   |        |            |          | R12 | RCV_TEMP_REG_4
+;-------------------------------------------------------
+;    MULTICAST_FILTER_TABLE    |            |          | R13 | RCV_TEMP_REG_3
+;-------------------------------------------------------
+
+; byte offset = MULTICAST_FILTER_TABLE + 8-BIT-XOR-RESULT
+; load the byte into BYTE-LOADED
+    ADD    RCV_TEMP_REG_3.w0, RCV_TEMP_REG_3.w0, RCV_TEMP_REG_4.b0
+    LBCO   &RCV_TEMP_REG_3.b3, PRU_DMEM_ADDR, RCV_TEMP_REG_3.w0, 1
+;--------------------------------------------------------------------
+;       8-BIT-XOR-RESULT     |              |         |             | R12 | RCV_TEMP_REG_4
+;--------------------------------------------------------------------
+; MULTICAST_FILTER_TABLE + 8-BIT-XOR-RESULT |         | BYTE-LOADED | R13 | RCV_TEMP_REG_3
+;--------------------------------------------------------------------
+
+; The functionality is defined as below
+;   =0 | MULTICAST_FILTER_HOST_RCV_NOT_ALLOWED : no MAC ID added to this bin => do not allow packet to host
+;   =1 | MULTICAST_FILTER_HOST_RCV_ALLOWED : MAC ID added to this bin => allow packet to host
+;
+; if BYTE-LOADED is 1 => host recieve | else => no host recieve
+; host_rcv_flag_shift bit is already SET. CLR it if host recieve needs to be disabled
+    QBEQ   M_MULTICAST_TABLE_SEARCH_OP_END, RCV_TEMP_REG_3.b3, ICSS_EMAC_FW_MULTICAST_FILTER_HOST_RCV_ALLOWED
+
+    CLR    MII_RCV.rx_flags, MII_RCV.rx_flags, host_rcv_flag_shift
+    LDI    RCV_TEMP_REG_4.w2, ICSS_EMAC_FW_MULTICAST_FILTER_DROP_CNT_OFFSET
+    LBCO    &RCV_TEMP_REG_3, PRU_DMEM_ADDR, RCV_TEMP_REG_4.w2, 4
+    ADD    RCV_TEMP_REG_3, RCV_TEMP_REG_3, 1
+    SBCO    &RCV_TEMP_REG_3, PRU_DMEM_ADDR, RCV_TEMP_REG_4.w2, 4
+
+M_MULTICAST_TABLE_SEARCH_OP_END:
+
+  .endm
+
+  ;------------------------------------------------------------------------------
+  ; Macro Name: M_VLAN_FLTR_SRCH_OP
+  ; Description:  VLAN table lookup
+  ; Input Parameters : -
+  ; Use of registers :
+  ; Peak PRU cycles  :
+  ; output registers : -
+  ;------------------------------------------------------------------------------
+M_VLAN_FLTR_SRCH_OP  .macro
+
+  ;-----------------------------------------------------------
+  ;   VLAN_FLTR_CTRL_BYTE  |          |          |             | R13 | RCV_TEMP_REG_3
+  ;-----------------------------------------------------------
+
+  ; check for VLAN tag in Ethernet.TPID
+  ; host_rcv_flag_shift bit is already SET
+      QBNE     VLAN_FLTR_UNTAG_FLOW, Ethernet.TPID, 0x0081
+
+  ; extract the VID value from Ethernet.TCI
+  ; If the packet bytes were (81 00 12 34), R5 looks like 0x34 12 00 81
+  ; So Ethernet.TPID has (0xb1b0) 0x0081 & Ethernet.TCI has (0xb3b2) 0x3412
+  ; we need to swap the bytes in Ethernet.TCI & extarct the lower 12 bytes
+  ;-----------------------------------------------------------
+  ;      0x81       |    0x00      |    0x12    |    0x34     | R5
+  ;-----------------------------------------------------------
+
+      AND    RCV_TEMP_REG_4.b1, R5.b2, 0x0F      ; Ethernet.TCI.b0 = R5.b2
+      AND    RCV_TEMP_REG_4.b0, R5.b3, R5.b3   ; Ethernet.TCI.b1 = R5.b3
+  ;-----------------------------------------------------------
+  ;      0x34       |     0x02      |            |             | R12 | RCV_TEMP_REG_4
+  ;-----------------------------------------------------------
+  ; VLAN_FLTR_CTRL_BYTE |          |            |             | R13 | RCV_TEMP_REG_3
+  ;-----------------------------------------------------------
+
+  ; VID is loaded in RCV_TEMP_REG_4.w0
+  ; if VID=0, do priority frame handling
+      QBEQ     VLAN_FLTR_PRIOTAG_FLOW, RCV_TEMP_REG_4.w0, ICSS_EMAC_FW_VLAN_FILTER_PRIOTAG_VID
+
+  ; VLAN filter table size = 1 bit per entry * 4096 entries = 4096 bits = 512 bytes = 0x200 bytes
+  ; Lookup the bit in VLAN filter table using the VID as index | index in RCV_TEMP_REG_4.w0
+
+  ; Load VLAN filter table base address | one time operation => register can be reused
+      LDI     RCV_TEMP_REG_3.w0, ICSS_EMAC_FW_VLAN_FLTR_TBL_BASE_ADDR
+  ;-------------------------------------------------------
+  ;               VID              |              |          | R12 | RCV_TEMP_REG_4
+  ;-------------------------------------------------------
+  ;    VLAN_FLTR_TBL_BASE_ADDR     |              |          | R13 | RCV_TEMP_REG_3
+  ;-------------------------------------------------------
+
+  ; Load the corresponding byte (byte_lookup) & bit (bit_lookup) for lookup using the calculation
+  ; byte_lookup = VID / 8      | RCV_TEMP_REG_4.w2
+  ; bit_lookup    = VID & 0x7   | RCV_TEMP_REG_3.b3
+      LSR     RCV_TEMP_REG_4.w2, RCV_TEMP_REG_4.w0, 3
+      AND     RCV_TEMP_REG_3.b3, RCV_TEMP_REG_4.w0, 0x7
+  ;-------------------------------------------------------
+  ;            VID            |         byte_lookup         | R12 | RCV_TEMP_REG_4
+  ;-------------------------------------------------------
+  ; VLAN_FLTR_TBL_BASE_ADDR   |                | bit_lookup | R13 | RCV_TEMP_REG_3
+  ;-------------------------------------------------------
+
+  ; Load the byte (byte_loaded) into RCV_TEMP_REG_3.b2
+  ; byte_loaded = VLAN_FLTR_TBL_BASE_ADDR + byte_lookup
+      ADD     RCV_TEMP_REG_3.w0, RCV_TEMP_REG_3.w0, RCV_TEMP_REG_4.w2
+      LBCO     &RCV_TEMP_REG_3.b2, PRU_DMEM_ADDR, RCV_TEMP_REG_3.w0, 1
+  ;---------------------------------------------------------------------------------
+  ;            VID            |         byte_lookup           | R12 | RCV_TEMP_REG_4
+  ;---------------------------------------------------------------------------------
+  ; VLAN_FLTR_TBL_BASE_ADDR   |                 |             |
+  ;   + byte_lookup           |  byte_loaded    |  bit_lookup | R13 | RCV_TEMP_REG_3
+  ;---------------------------------------------------------------------------------
+
+  ; The functionality is defined as below
+  ;   =0 | do not allow packet to host
+  ;   =1 | allow packet to host
+  ;
+  ; if byte_loaded is 1 => host recieve | else => no host recieve
+  ; host_rcv_flag_shift bit is already SET. CLR it if host recieve needs to be disabled
+      QBBS     M_VLAN_FLTR_SRCH_OP_END, RCV_TEMP_REG_3.b2, RCV_TEMP_REG_3.b3
+      QBA     CLR_HOST_RCV_FLAG
+
+VLAN_FLTR_PRIOTAG_FLOW:
+      ; check if host receive for priority frames is enabled or not i.e. check VLAN_FLTR_PRIOTAG_HOST_RCV_CTRL_SHIFT in VLAN_FLTR_CTRL_BYTE stored in shared memory
+      ; one bit field | 0 : priotag host rcv allowed | 1 : priotag host rcv not allowed
+      ; host_rcv_flag_shift bit is already SET. CLR it if host recieve needs to be disabled
+      QBBC     M_VLAN_FLTR_SRCH_OP_END, RCV_TEMP_REG_3.b0, ICSS_EMAC_FW_VLAN_FILTER_PRIOTAG_HOST_RCV_ALLOW_CTRL_BIT
+      QBA     CLR_HOST_RCV_FLAG
+
+VLAN_FLTR_UNTAG_FLOW:
+      ; check if host receive for untagged frames is enabled or not i.e. check VLAN_FLTR_UNTAG_HOST_RCV_CTRL_SHIFT in VLAN_FLTR_CTRL_BYTE stored in shared memory
+      ; one bit field | 0 : untagged host rcv allowed | 1 : untagged host rcv not allowed
+      ; host_rcv_flag_shift bit is already SET. CLR it if host recieve needs to be disabled
+      QBBC     M_VLAN_FLTR_SRCH_OP_END, RCV_TEMP_REG_3.b0, ICSS_EMAC_FW_VLAN_FILTER_UNTAG_HOST_RCV_ALLOW_CTRL_BIT
+
+CLR_HOST_RCV_FLAG:
+      CLR     MII_RCV.rx_flags, MII_RCV.rx_flags, host_rcv_flag_shift
+      LDI     RCV_TEMP_REG_4.w2, ICSS_EMAC_FW_VLAN_FILTER_DROP_CNT_OFFSET
+      LBCO     &RCV_TEMP_REG_3, PRU_DMEM_ADDR, RCV_TEMP_REG_4.w2, 4
+      ADD     RCV_TEMP_REG_3, RCV_TEMP_REG_3, 1
+      SBCO     &RCV_TEMP_REG_3, PRU_DMEM_ADDR, RCV_TEMP_REG_4.w2, 4
+
+M_VLAN_FLTR_SRCH_OP_END:
+    .endm ; M_VLAN_FLTR_SRCH_OP
+
+;-----------------------------------
+; Macro Name: M_RCV_RX_EOF_CHECK_ICSS_REV1
+; Description: Check for RX EOF on ICSS_REV1.
+; Input Parameters: none
+; Output Parameters: none
+;-----------------------------------
+M_RCV_RX_EOF_CHECK_ICSS_REV1    .macro
+       .if $defined("PRU0")    
+       QBBS    process_rx_eof_rx_nb, R31, 30
+       .else
+       QBBS    process_rx_eof_rx_nb, R31, 31
+       .endif
+       .endm
+       
+;-----------------------------------
+; Macro Name: M_RCV_RX_EOF_CHECK_ICSS_REV2
+; Description: Check for RX EOF on ICSS_REV2.
+; Input Parameters: none
+; Output Parameters: none
+;-----------------------------------
+M_RCV_RX_EOF_CHECK_ICSS_REV2    .macro
+       QBBS    process_rx_eof_rx_nb, R31, 20
+       .endm
+       
+;-----------------------------------
+; Macro Name: M_RCV_RX_EOF_CLEAR_INTC_ICSS_REV1
+; Description: Clear RX EOF system event in INTC on ICSS_REV1.
+; Input Parameters: none
+; Output Parameters: none
+;-----------------------------------
+M_RCV_RX_EOF_CLEAR_INTC_ICSS_REV1       .macro
+       LDI     TEMP_REG_4.w0, 0x0284   ; Clear RX_EOF
+       .if $defined("PRU0")    
+       LDI     TEMP_REG_3 , 0x00000430
+       .else
+       LDI     TEMP_REG_3.w0 , 0x00430000 & 0xFFFF
+       LDI     TEMP_REG_3.w2 , 0x00430000 >> 16
+       .endif
+       SBCO    &TEMP_REG_3, ICSS_INTC_CONST, TEMP_REG_4.w0, 4  
+       .endm
+       
+;-----------------------------------
+; Macro Name: M_RCV_RX_EOF_CLEAR_INTC_ICSS_REV2
+; Description: Clear RX EOF and CRC system event in INTC on ICSS_REV2.
+; Input Parameters: none
+; Output Parameters: none
+;-----------------------------------
+M_RCV_RX_EOF_CLEAR_INTC_ICSS_REV2       .macro
+       LDI     TEMP_REG_4.w0, 0x0284   ; Clear RX CRC
+       .if $defined("PRU0")    
+       LDI     TEMP_REG_3 , 0x00000030
+       .else
+       LDI     TEMP_REG_3.w0 , 0x00030000 & 0xFFFF
+       LDI     TEMP_REG_3.w2 , 0x00030000 >> 16
+       .endif
+       SBCO    &TEMP_REG_3, ICSS_INTC_CONST, TEMP_REG_4.w0, 4  
+       SET     R31 , R31 , 22 ; Clear RX_EOF
+       .endm
+
+;-----------------------------------
+; Macro Name: M_RCV_RX_EOF_INTERRUPT_RAISE_INTC
+; Description: Raise the interrupt in the intc controller for host.
+; Input Parameters: none
+; Output Parameters: none
+;-----------------------------------
+M_RCV_RX_EOF_INTERRUPT_RAISE_INTC       .macro
+        .if    $defined("TWO_PORT_CFG")
+        ; Give a interrupt to host as frame has been received
+        LDI        R31, 0x24       ; Maps to system event 20, 0x24 = 10 0100
+        .else
+        ; Rx interrupt pacing
+        ; Check INTR_PAC_STATUS_OFFSET for Interrupt Pacing logic status
+        ;   if = 0 | INTR_PAC_DIS_ADP_LGC_DIS => skip HOST_QUEUE_EMPTY_STATUS check & fire interrupt
+        ;   else if = 1 | INTR_PAC_ENA_ADP_LGC_DIS => set R22 INTR_TO_HOST_PENDING_RX & goto LB_DONE
+        ;   else perform HOST_QUEUE_EMPTY_STATUS check
+        ;       if HOST_QUEUE_EMPTY_STATUS is SET => fire interrupt
+        ;       else set R22 INTR_TO_HOST_PENDING_RX & goto LB_DONE
+        ;
+        ; NOTE : no need to CLR R22 bit HOST_QUEUE_EMPTY_STATUS as R22.w0 gets cleared per Rx packet
+        .if $defined(PRU0)
+        LDI     RCV_TEMP_REG_2.w0, INTR_PAC_STATUS_OFFSET_PRU0
+        .else
+        LDI     RCV_TEMP_REG_2.w0, INTR_PAC_STATUS_OFFSET_PRU1
+        .endif ; PRU0
+        LBCO    &RCV_TEMP_REG_2.b0, ICSS_SHARED_CONST, RCV_TEMP_REG_2.w0, 1
+        QBEQ    FIRE_INTERRUPT, RCV_TEMP_REG_2.b0, INTR_PAC_DIS_ADP_LGC_DIS
+        QBEQ    SET_INTR_TO_HOST_PENDING_RX, RCV_TEMP_REG_2.b0, INTR_PAC_ENA_ADP_LGC_DIS 
+        QBBS    FIRE_INTERRUPT, R22, HOST_QUEUE_EMPTY_STATUS    ; fire interrupt if host queue bit is SET i.e. host queue is empty
+SET_INTR_TO_HOST_PENDING_RX:
+        SET     R22, R22, INTR_TO_HOST_PENDING_RX
+        QBA     LB_DONE
+        
+FIRE_INTERRUPT:    
+        ; two interrupts for two ports in MAC mode
+        .if $defined(PRU0)
+        LDI     R31, 0x24
+        .else
+        LDI     R31, 0x25
+        .endif ; PRU0
+        
+        .if $defined(EDIO_INTR_PAC)
+        ; EDIO output J7 pin 4 AM572x
+        LDI32 RCV_TEMP_REG_1, 0x4B22E310
+        LDI RCV_TEMP_REG_2, 0x0040
+        SBBO &RCV_TEMP_REG_2.b0, RCV_TEMP_REG_1, 0, 1
+        SBBO &RCV_TEMP_REG_2.b1, RCV_TEMP_REG_1, 0, 1
+        .endif  ; EDIO_INTR_PAC
+LB_DONE:
+        .endif ;TWO_PORT_CFG   
+       .endm
+
+       .endif  ;__mii_rcv_hp
diff --git a/packages/ti/drv/icss_emac/firmware/icss_dualemac/src/emac_MII_Xmt.asm b/packages/ti/drv/icss_emac/firmware/icss_dualemac/src/emac_MII_Xmt.asm
new file mode 100644 (file)
index 0000000..fd1a38e
--- /dev/null
@@ -0,0 +1,982 @@
+;
+;  TEXAS INSTRUMENTS TEXT FILE LICENSE
+; 
+;   Copyright (c) 2017-2018 Texas Instruments Incorporated
+; 
+;  All rights reserved not granted herein.
+;  
+;  Limited License.  
+; 
+;  Texas Instruments Incorporated grants a world-wide, royalty-free, non-exclusive 
+;  license under copyrights and patents it now or hereafter owns or controls to 
+;  make, have made, use, import, offer to sell and sell ("Utilize") this software 
+;  subject to the terms herein.  With respect to the foregoing patent license, 
+;  such license is granted  solely to the extent that any such patent is necessary 
+;  to Utilize the software alone.  The patent license shall not apply to any 
+;  combinations which include this software, other than combinations with devices 
+;  manufactured by or for TI (“TI Devices”).  No hardware patent is licensed hereunder.
+; 
+;  Redistributions must preserve existing copyright notices and reproduce this license 
+;  (including the above copyright notice and the disclaimer and (if applicable) source 
+;  code license limitations below) in the documentation and/or other materials provided 
+;  with the distribution.
+;  
+;  Redistribution and use in binary form, without modification, are permitted provided 
+;  that the following conditions are met:
+;      No reverse engineering, decompilation, or disassembly of this software is 
+;   permitted with respect to any software provided in binary form.
+;      Any redistribution and use are licensed by TI for use only with TI Devices.
+;      Nothing shall obligate TI to provide you with source code for the software 
+;   licensed and provided to you in object code.
+;  
+;  If software source code is provided to you, modification and redistribution of the 
+;  source code are permitted provided that the following conditions are met:
+;      Any redistribution and use of the source code, including any resulting derivative 
+;   works, are licensed by TI for use only with TI Devices.
+;      Any redistribution and use of any object code compiled from the source code
+;   and any resulting derivative works, are licensed by TI for use only with TI Devices.
+; 
+;  Neither the name of Texas Instruments Incorporated nor the names of its suppliers 
+;  may be used to endorse or promote products derived from this software without 
+;  specific prior written permission.
+; 
+;  DISCLAIMER.
+; 
+;  THIS SOFTWARE IS PROVIDED BY TI AND TI’S LICENSORS "AS IS" AND ANY EXPRESS OR IMPLIED 
+;  WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY 
+;  AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL TI AND TI’S 
+;  LICENSORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 
+;  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
+;  GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 
+;  CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+;  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 
+;  EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+; 
+; file:   emac_MII_Xmt.asm
+;
+; brief:  Transmit task.
+;
+;
+;  (C) Copyright 2017-2018, Texas Instruments, Inc
+;
+;
+    
+    .if !$defined("__mii_xmt_p")       
+__mii_xmt_p    .set    1 
+    
+;;///////////////////////////////////////////////////////
+; Includes Section
+;;///////////////////////////////////////////////////////
+    .include "icss_intc_regs.h"
+    .if $defined("ICSS_DUAL_EMAC_BUILD")
+    .include "icss_emacSwitch.h"
+    .endif
+    .if $defined("ICSS_SWITCH_BUILD")  
+        .include "icss_switch.h"
+    .endif
+    .include "icss_miirt_regs.h"
+    .include "icss_defines.h"  
+    .include "micro_scheduler.h"
+    .include "emac_MII_Xmt.h"
+    .include "emac_MII_Rcv.h"
+    .include "icss_macros.h"
+    .include "emac_MII_Xmt.h"
+    .include "icss_iep_regs.h"
+    .if $defined("TTS")        
+    .include "emac_tts.h"
+    .endif
+    
+    .if $defined(PTP)
+    .include "icss_ptp.h"
+    .include "icss_ptp_macro.h"    
+    .cdecls C,NOLIST
+%{
+#include "icss_timeSync_memory_map.h"
+%}
+    .endif ;PTP
+    .global  FN_RCV_LB
+    .global  XMT_QUEUE
+    .global  MII_TX_TASK
+    .global  TASK_EXECUTION_FINISHED
+    .global  CHECK_NEXT_QUEUE
+    .global  START_XMT_QUEUE
+    .if $defined("TTS")
+    .global  FN_TTS_PKT_SIZE_CHECK_ICSS_REV1
+    .global  FN_TTS_PKT_SIZE_CHECK_ICSS_REV2
+    .endif
+
+    .if $defined(PTP)
+    .global FN_PTP_TX_ADD_DELAY
+    .endif
+
+MII_TX_TASK:
+    .if $defined("ICSS_DUAL_EMAC_BUILD")
+    LDI        R0.w2 , PORT_STATUS_OFFSET      ; load PORT status value from DRAM
+    .if    $defined("TWO_PORT_CFG")    
+    LBCO    &R0.w0, PRU_CROSS_DMEM, R0.w2, 1
+    .else
+    LBCO       &R0.w0, PRU_DMEM_ADDR, R0.w2, 1 
+    .endif    
+    .endif ;ICSS_DUAL_EMAC_BUILD
+        ; if half-duplex is enabled set the half-duplex bit else clear it
+    .if $defined("HALF_DUPLEX_ENABLED")        
+    QBBS       SET_HALF_DUPLEX, R0, 1
+    CLR        R22 , R22 , PORT_IS_HALF_DUPLEX 
+    QBA     CHECK_XMT_ACTIVE
+SET_HALF_DUPLEX:
+    SET        R22 , R22 , PORT_IS_HALF_DUPLEX 
+    
+CHECK_XMT_ACTIVE:      
+    .endif
+        ; if transmission is active then continue with it else check if any queue has some packet
+    QBBS       XMT_QUEUE, R23, Xmt_active
+    
+;****************************************************************************
+;
+;     NAME                     : FN_XMT_scheduler
+;     DESCRIPTION      : if any queue is not empty then schedules the trasmit
+;     RETURNS          : 
+;     ARGS                     : 
+;     USES             : 
+;     INVOKES          : 
+;
+;**************************************************************************** 
+TX_QUEUE_CONT:
+    ;check if port link is up else jump to next task
+    .if $defined("ICSS_SWITCH_BUILD")
+    QBBS       XMT_FB_EGRESS_LINK_UP_FWD, R22, 10       ;replaced: QBBS    XMT_FB_EGRESS_LINK_UP_FWD, OPPOSITE_PORT_LINK_UP 
+    .endif ;ICSS_SWITCH_BUILD
+    .if $defined("ICSS_DUAL_EMAC_BUILD")
+    QBBS       XMT_FB_EGRESS_LINK_UP_FWD, R0, 0
+    .endif ;ICSS_DUAL_EMAC_BUILD
+    QBA     NO_TRANSMIT_PACKET
+    
+    .if $defined("HALF_DUPLEX_ENABLED")        
+COLLISION_DETECTED:
+        ;this is the collision detect procedure
+    CLR        R23 , R23 , 0       ; clear the XMT_active flag indicating active transmission
+    
+        ;reset TX FIFO
+    M_TX_RESET
+
+    ;Add 1 to collision counter
+    LDI        R0 , COLLISION_COUNTER
+    LBCO       &R2, PRU_DMEM_ADDR, R0, 1       
+    ADD        R2.b0, R2.b0, 1 
+    SBCO       &R2, PRU_DMEM_ADDR, R0, 1       
+    
+    ;clear the stat flags for TX_BC_FRAME and TX_MC_FRAME
+    CLR        R22 , R22 , TX_BC_FRAME 
+    CLR        R22 , R22 , TX_MC_FRAME 
+    
+        ; if there is late collision then jump else continue to next task
+    QBBS       ADD_TX_STATS_DO_NOT_RESET_COLLISION_COUNTER, R22 , TX_LATE_COLLISION
+    QBA     NO_TRANSMIT_PACKET
+    
+CARRIER_SENSE_DETECTED:
+        ;this is the carrier sense procedure
+    CLR        R23 , R23 , 0 
+    LDI        R0 , TX_DEFERRED_OFFSET
+    QBA      INCREMENT_TX_COUNT
+    
+ADD_TX_STATS:
+        ;initialize the collision counter
+    LDI        R3 , COLLISION_COUNTER
+    LDI        R2.b0 , 0
+    SBCO       &R2, PRU_DMEM_ADDR, R3, 1       
+    QBA     INCREMENT_TX_COUNT
+    
+ADD_TX_STATS_DO_NOT_RESET_COLLISION_COUNTER:
+        ; increment and update the late collision counter
+    CLR        R22 , R22 , TX_LATE_COLLISION 
+    LDI        R0 , LATE_COLLISION_OFFSET
+INCREMENT_TX_COUNT:
+    LBCO       &R2, PRU_DMEM_ADDR, R0, 4       
+    ADD        R2, R2, 1       
+    SBCO       &R2, PRU_DMEM_ADDR, R0, 4       
+    .endif ;HALF_DUPLEX_ENABLED
+    
+NO_TRANSMIT_PACKET:
+    JMP     TASK_EXECUTION_FINISHED
+    
+XMT_FB_EGRESS_LINK_UP_FWD:
+; New optimized code for checking the transmit queues
+; Loop four times as there are four transmit queues
+    
+    .if $defined("PRU0")       
+        .if    $defined("TWO_PORT_CFG")
+
+        LDI     R20.w0, P2_Q4_TX_CONTEXT_OFFSET 
+        LDI     QUEUE_DESC_OFFSET, P2_QUEUE_DESC_OFFSET - 8
+        LDI     TX_CONTEXT_OFFSET, P2_Q1_TX_CONTEXT_OFFSET - 8
+CHECK_NEXT_QUEUE:
+        QBEQ    NO_TRANSMIT_PACKET, TX_CONTEXT_OFFSET, R20.w0
+        ADD     QUEUE_DESC_OFFSET, QUEUE_DESC_OFFSET, 8
+        LBCO    &QUEUE_DESC_REG, QUEUE_DESP_BASE, QUEUE_DESC_OFFSET, 8
+        ADD     TX_CONTEXT_OFFSET, TX_CONTEXT_OFFSET, 8
+        QBEQ    CHECK_NEXT_QUEUE, QUEUE_DESC_REG.wr_ptr, QUEUE_DESC_REG.rd_ptr
+        .else ;MAC MODE
+       LDI     R20.w0, Q4_TX_CONTEXT_OFFSET        ; set R20 to last offset before it begins
+       LDI     QUEUE_DESC_OFFSET , PORT_QUEUE_DESC_OFFSET - 8      ;set QUEUE_DESC_OFFSET to base before it begin
+       LDI     TX_CONTEXT_OFFSET , Q1_TX_CONTEXT_OFFSET - 8        ;set TX_CONTEXT_OFFSET to base before it begin
+CHECK_NEXT_QUEUE:
+       .if $defined("HALF_DUPLEX_ENABLED")     
+       ;skip if half duplex is not set
+       QBBC    SKIP_CRS_Q, R22 , PORT_IS_HALF_DUPLEX
+       ;defer if carrier sense is on via reading the PRUSS_MII_RT_PRS0 register
+       LBCO    &TEMP_REG_1, MII_RT_CFG_CONST, MII_CARRIER_SENSE_REG, 1 
+       QBBS    CARRIER_SENSE_DETECTED, TEMP_REG_1, 1
+SKIP_CRS_Q:            
+       .endif ;HALF_DUPLEX_ENABLED
+       QBEQ    NO_TRANSMIT_PACKET, TX_CONTEXT_OFFSET, R20.w0       ; if TX_CONTEXT_OFFSET matches the last descriptor then nothing to transmit
+       ADD     QUEUE_DESC_OFFSET, QUEUE_DESC_OFFSET, 8 
+       LBCO    &QUEUE_DESC_REG, PRU_DMEM_ADDR, QUEUE_DESC_OFFSET, 8    
+       ADD     TX_CONTEXT_OFFSET, TX_CONTEXT_OFFSET, 8             ; increment the queue and buffer offset
+       QBEQ    CHECK_NEXT_QUEUE, QUEUE_DESC_REG.wr_ptr, QUEUE_DESC_REG.rd_ptr      ; if read == write pointer then move to next queue
+       .if $defined("TTS")     
+       M_TTS_XMT_SCHEDULER     TX_CONTEXT_OFFSET       ; check if queue has any TTS packets
+       .endif  ;TTS
+        .endif
+    .else
+    ;PRU1
+        .if    $defined("TWO_PORT_CFG")
+        
+        LDI     R20.w0, P1_Q4_TX_CONTEXT_OFFSET 
+        LDI     QUEUE_DESC_OFFSET, P1_QUEUE_DESC_OFFSET - 8
+        LDI     TX_CONTEXT_OFFSET, P1_Q1_TX_CONTEXT_OFFSET - 8
+CHECK_NEXT_QUEUE:
+        QBEQ    NO_TRANSMIT_PACKET, TX_CONTEXT_OFFSET, R20.w0
+        ADD     QUEUE_DESC_OFFSET, QUEUE_DESC_OFFSET, 8
+        LBCO    &QUEUE_DESC_REG, QUEUE_DESP_BASE, QUEUE_DESC_OFFSET, 8
+        ADD     TX_CONTEXT_OFFSET, TX_CONTEXT_OFFSET, 8
+        QBEQ    CHECK_NEXT_QUEUE, QUEUE_DESC_REG.wr_ptr, QUEUE_DESC_REG.rd_ptr
+        .else  ;MAC MODE
+       LDI     R20.w0, Q4_TX_CONTEXT_OFFSET        ; set R20 to last offset before it begins   
+       LDI     QUEUE_DESC_OFFSET , PORT_QUEUE_DESC_OFFSET - 8     ;set QUEUE_DESC_OFFSET to base before it begin
+       LDI     TX_CONTEXT_OFFSET , Q1_TX_CONTEXT_OFFSET - 8        ;set TX_CONTEXT_OFFSET to base before it begin
+CHECK_NEXT_QUEUE:
+       .if $defined("HALF_DUPLEX_ENABLED")     
+       ;skip if half duplex is not set
+       QBBC    SKIP_CRS_Q, R22 , PORT_IS_HALF_DUPLEX
+       ;defer if carrier sense is on via reading the PRUSS_MII_RT_PRS1 register
+       LBCO    &TEMP_REG_1, MII_RT_CFG_CONST, MII_CARRIER_SENSE_REG, 1 
+       QBBS    CARRIER_SENSE_DETECTED, TEMP_REG_1, 1
+SKIP_CRS_Q:            
+       .endif ;HALF_DUPLEX_ENABLED
+       QBEQ    NO_TRANSMIT_PACKET, TX_CONTEXT_OFFSET, R20.w0       ; if TX_CONTEXT_OFFSET matches the last descriptor then nothing to transmit
+       ADD     QUEUE_DESC_OFFSET, QUEUE_DESC_OFFSET, 8 
+       LBCO    &QUEUE_DESC_REG, PRU_DMEM_ADDR, QUEUE_DESC_OFFSET, 8    
+       ADD     TX_CONTEXT_OFFSET, TX_CONTEXT_OFFSET, 8             ; increment the queue and buffer offset
+       QBEQ    CHECK_NEXT_QUEUE, QUEUE_DESC_REG.wr_ptr, QUEUE_DESC_REG.rd_ptr      ; if read == write pointer then move to next queue
+       .if $defined("TTS")     
+       M_TTS_XMT_SCHEDULER     TX_CONTEXT_OFFSET       ; check if queue has any TTS packets
+       .endif  ;TTS
+       .endif
+    .endif
+    
+;;////////////////////////////////////////////////////////////////////////////////////////
+    
+;****************************************************************************
+;
+;     NAME             : FN_XMT_queue
+;     DESCRIPTION      : trasmits the first block of 32B data from the queue into TX FIFO 
+;     RETURNS          : 
+;     ARGS             : 
+;     USES             : 
+;     INVOKES          : 
+;
+;****************************************************************************
+START_XMT_QUEUE:
+    ; Read the TX Context of 8 Bytes.
+    .if    $defined("TWO_PORT_CFG")
+    LBCO     &BUFFER_OFFSET, PRU1_DMEM_CONST, TX_CONTEXT_OFFSET, 8
+    .else
+    LBCO       &BUFFER_OFFSET, PRU_DMEM_ADDR, TX_CONTEXT_OFFSET, 8     
+    .endif ;TWO_PORT_CFG
+    ; init MII_XMT parameter
+    SET        R23 , R23 , Xmt_active ; set global flag to indicate an ongoing transmission
+    SUB        BUFFER_DESC_OFFSET, QUEUE_DESC_REG.rd_ptr, BASE_BUFFER_DESC_OFFSET      ;subtract the rd-ptr value from base    
+    LSL        BUFFER_DESC_OFFSET, BUFFER_DESC_OFFSET, 3               ; shift the value by 3 as descriptor size is 8 bytes
+    ADD        BUFFER_INDEX, BUFFER_OFFSET, BUFFER_DESC_OFFSET         ; find the actual buffer index.
+    AND     BUFFER_DESC_OFFSET , QUEUE_DESC_REG.rd_ptr , QUEUE_DESC_REG.rd_ptr
+    .if    $defined("TWO_PORT_CFG")
+    LBCO    &BUFFER_DESC_REG, ICSS_SHARED_CONST, BUFFER_DESC_OFFSET, 4
+    .else
+    LBCO       &BUFFER_DESC_REG, PRU_DMEM_ADDR, BUFFER_DESC_OFFSET, 4  ; load the buffer_desc_reg form offset
+    .endif ;TWO_PORT_CFG
+    LSL        Packet_Length, BUFFER_DESC_REG.pkt_length, 3    ;bit 18...28
+
+    LSR        Packet_Length, Packet_Length, 5 
+    LDI        BYTE_CNT , 0
+    ; Read the Phy speed and set the flag accordingly
+    LDI        R2.w0, PHY_SPEED_OFFSET 
+    .if    $defined("TWO_PORT_CFG")    
+    LBCO    &R2.w2, PRU_CROSS_DMEM , R2.w0, 2
+    .else
+    LBCO       &R2.w2, PRU_DMEM_ADDR, R2.w0, 2 
+    .endif    
+    
+    SET        R23 , R23 , TX_PHY_SPEED ; means PHY is set to 100 Mbps
+    QBEQ       XMT_FB_100Mbps_MODE, R2.b2, 100 
+    CLR        R23 , R23 , TX_PHY_SPEED ; means PHY is set to 10 Mbps
+XMT_FB_100Mbps_MODE:
+    .if    $defined("TWO_PORT_CFG")
+    CLR     R13, R13, PACKET_FROM_COLL_QUEUE
+    QBBC    no_collision_occured, R11, 14    ;BUFFER_DESC_REG.Shadow    ;BUFFER_DESC_REG.Shadow
+    SET     R13, R13, PACKET_FROM_COLL_QUEUE
+    ; Change the Precompute offsets to one's for the collision buffer
+    .if    $defined("PRU0")    
+    LDI        TX_CONTEXT_OFFSET, COL_TX_CONTEXT_P2_Q1_OFFSET_ADDR
+    .else
+    LDI        TX_CONTEXT_OFFSET, COL_TX_CONTEXT_P1_Q1_OFFSET_ADDR
+    .endif
+    ; Read the Collision TX Context of 6 Bytes. 
+    LBCO     &BUFFER_INDEX, PRU1_DMEM_CONST, TX_CONTEXT_OFFSET, 6
+no_collision_occured:
+    .endif ;TWO_PORT_CFG
+CHECK_RX_EOF:        
+;Check RX EOF.
+    .if $defined("ICSS_REV1")  
+    M_XMT_RX_EOF_CHECK_ICSS_REV1       process_rx_eof_tx_fb    ; check EOF of RCV is receive is active
+    .endif
+    .if $defined("ICSS_REV2")  
+    M_XMT_RX_EOF_CHECK_ICSS_REV2       process_rx_eof_tx_fb    ; check EOF of RCV is receive is active
+    .endif
+    
+    LBCO       &BUFFER, L3_OCMC_RAM_CONST, BUFFER_INDEX, 32    ; load the buffer value from its index  
+    .if $defined("HALF_DUPLEX_ENABLED")        
+        ;load the value of PRUSS_MII_RT_PRS0 register and check for carrier sense
+    QBBC       CONTINUE_TX, R22 , PORT_IS_HALF_DUPLEX
+    LBCO       &R0, MII_RT_CFG_CONST, MII_CARRIER_SENSE_REG, 1 
+    QBBC       CONTINUE_TX, R0, 1
+    QBA     CARRIER_SENSE_DETECTED
+    
+CONTINUE_TX:
+    .endif ;HALF_DUPLEX_ENABLED
+    
+;Do TX stats here      
+    QBBS       TX_IS_MC_OR_BC, R2, 0
+    QBA     START_TX_FIFO_FILL
+    
+TX_IS_MC_OR_BC:
+        ; based on mac address find out if it BC or MC frame
+    FILL       &R0, 4  ;Fill with 0xffffffff
+    QBNE       TX_IS_MC, R2, R0        ;First four bytes of MAC ID
+    QBNE       TX_IS_MC, R3.w0, R0.w0  ;upper two bytes of MAC ID
+    SET        R22 , R22 , TX_BC_FRAME 
+    QBA     START_TX_FIFO_FILL
+    
+TX_IS_MC:
+    SET        R22 , R22 , TX_MC_FRAME 
+    
+START_TX_FIFO_FILL:
+    .if $defined("TTS")        
+    M_TTS_TX_SOF_PREV_STORE
+    .endif     ;TTS
+    
+    .if $defined("ICSS_REV1")  
+    ;Just before pushing to FIFO store the current Tx SOF TS
+    ;This is used for comparison later to make sure SOF has actually
+    ;updated
+    .if $defined (PTP)
+        .if $defined("ICSS_SWITCH_BUILD")
+            .if $defined (PRU0)
+            LBCO    &R20, ICSS_IEP_CONST, CAP_RISE_TX_SOF_PORT2_OFFSET, 4
+            LDI                RCV_TEMP_REG_2, PTP_PREV_TX_TIMESTAMP_P2
+            SBCO    &R20, ICSS_SHARED_CONST, RCV_TEMP_REG_2, 4
+            ;SBCO    &R20, ICSS_SHARED_CONST, PTP_PREV_TX_TIMESTAMP_P2, 4
+            .else
+            LBCO    &R20, ICSS_IEP_CONST, CAP_RISE_TX_SOF_PORT1_OFFSET, 4
+            ;LDI               RCV_TEMP_REG_1, PTP_PREV_TX_TIMESTAMP_P1
+            ;SBCO    &R20, ICSS_SHARED_CONST, RCV_TEMP_REG_1, 4
+            SBCO    &R20, ICSS_SHARED_CONST, PTP_PREV_TX_TIMESTAMP_P1, 4
+            .endif
+        .else
+            .if $defined (PRU0)
+            LBCO    &R20, IEP_CONST, CAP_RISE_TX_SOF_PORT1_OFFSET, 4
+            LDI                RCV_TEMP_REG_2, PTP_PREV_TX_TIMESTAMP_P1
+            SBCO    &R20, ICSS_SHARED_CONST, RCV_TEMP_REG_2, 4
+            ;SBCO    &R20, ICSS_SHARED_CONST, PTP_PREV_TX_TIMESTAMP_P1, 4
+           .else
+            LBCO    &R20, IEP_CONST, CAP_RISE_TX_SOF_PORT2_OFFSET, 4
+            LDI                RCV_TEMP_REG_1, PTP_PREV_TX_TIMESTAMP_P2
+            SBCO    &R20, ICSS_SHARED_CONST, RCV_TEMP_REG_1, 4
+            ;SBCO    &R20, ICSS_SHARED_CONST, PTP_PREV_TX_TIMESTAMP_P2, 4
+           .endif
+        .endif ; ICSS_SWITCH_BUILD
+    .endif ;PTP
+    LDI        TX_DATA_WORD_MASK , 0xffff
+    AND TX_DATA_BYTE , BUFFER.b0 , BUFFER.b0
+    M_PUSH_BYTE
+    AND TX_DATA_BYTE , BUFFER.b1 , BUFFER.b1
+    M_PUSH_BYTE
+    .endif     ;ICSS_REV1
+
+PUSH_FB:
+    .if $defined (PTP)
+    M_GPTP_TX_PRE_PROC 
+    .endif ;PTP
+        ; Insert the data in Tx Fifo
+    .if $defined("ICSS_REV1")  
+    LDI        TX_DATA_POINTER, buffer_ptr + 2
+    loop       EndLoop_FB1, 15                                 ; Insert 32 bytes for ICSS_REV1
+    MVIW       TX_DATA_WORD, *TX_DATA_POINTER  
+    M_PUSH_WORD_CMD
+    ADD        TX_DATA_POINTER, TX_DATA_POINTER, 2     
+EndLoop_FB1:
+    .endif     ;ICSS_REV1
+    
+    .if $defined("ICSS_REV2")  
+    LDI        TX_DATA_POINTER, buffer_ptr     
+    loop       EndLoop_FB1, 8                                  ; Insert 32 bytes for ICSS_REV2
+    MVID       TX_DATA_DOUBLE_WORD, *TX_DATA_POINTER   
+    ADD        TX_DATA_POINTER, TX_DATA_POINTER, 4     
+EndLoop_FB1:
+    .endif     ;ICSS_REV2
+    ;For EMAC we don't do bridge delay correction
+    ;So this can be called after pushing 32 bytes
+    .if $defined (PTP)
+    JAL     R0.w0, FN_PTP_TX_ADD_DELAY
+    .endif
+    
+        ;increment both descriptor and index with offset
+    ADD        BUFFER_INDEX, BUFFER_INDEX, 32  
+    ADD        BYTE_CNT, BYTE_CNT, 32  
+    SET        R13 , R13 , INCREMENT_WRK_BUFFER_DESC_OFFSET
+    LDI        BYTES_TRANSFERRED_IN_LAST_CALL, 0x00    ; indicate how many bytes have been transfered in last call
+    LDI        SHIFT_REG, SHIFT_NONE   
+        ; store the context back
+    .if $defined("PRU0")       
+    XOUT       BANK1, &MII_TX_CONTEXT, 20      
+    .else
+    XOUT       BANK2, &MII_TX_CONTEXT, 20      
+    .endif
+    
+    .if $defined("HALF_DUPLEX_ENABLED")        
+    ;load the value of PRUSS_MII_RT_PRS0 register and check for carrier sense
+    QBBC       NO_COLLISION1, R22 , PORT_IS_HALF_DUPLEX
+    LBCO       &TEMP_REG_1, MII_RT_CFG_CONST, MII_CARRIER_SENSE_REG, 1 
+    QBBC       NO_COLLISION1, TEMP_REG_1, 0
+    QBA     COLLISION_DETECTED
+NO_COLLISION1:
+    .endif ;HALF_DUPLEX_ENABLED
+    
+    .if $defined("ICSS_REV1")  
+    M_XMT_RX_EOF_CHECK_ICSS_REV1       process_rx_eof_tx_fb_after_inserting_32bytes        ;check for EOF for recieve buffer if recieve is active
+    .endif     ;ICSS_REV1
+    .if $defined("ICSS_REV2")  
+    M_XMT_RX_EOF_CHECK_ICSS_REV2       process_rx_eof_tx_fb_after_inserting_32bytes        ;check for EOF for recieve buffer if recieve is active
+    .endif     ;ICSS_REV2
+    
+    ; No RX EOF event so fill Tx FIFO more bytes
+    QBNE       NO_QUEUE_WRAP_XMT_FB, BUFFER_DESC_OFFSET, TOP_MOST_BUFFER_DESC_OFFSET   
+    AND BUFFER_DESC_OFFSET , BASE_BUFFER_DESC_OFFSET , BASE_BUFFER_DESC_OFFSET
+    CLR        R13 , R13 , INCREMENT_WRK_BUFFER_DESC_OFFSET ; Since the Queue has wrapped here itself ..no need to check for it in xmt_nb for first time
+    .if    $defined("TWO_PORT_CFG")
+    QBBS    NO_QUEUE_WRAP_XMT_FB, R13, 2    ;PACKET_FROM_COLL_QUEUE
+    .endif ;TWO_PORT_CFG
+    AND BUFFER_INDEX , BUFFER_OFFSET , BUFFER_OFFSET
+    
+NO_QUEUE_WRAP_XMT_FB:
+    
+    LBCO       &BUFFER, L3_OCMC_RAM_CONST, BUFFER_INDEX, 32        ; load new data from buffer
+    LDI        TX_DATA_POINTER, buffer_ptr     
+    
+    .if $defined("ICSS_REV1")  
+    ; Insert next 22 bytes in Tx FIFO
+    loop       EndLoop_FB_22bytes_more, 11
+    MVIW       TX_DATA_WORD, *TX_DATA_POINTER
+    M_PUSH_WORD_CMD
+    ADD        TX_DATA_POINTER, TX_DATA_POINTER, 2     
+EndLoop_FB_22bytes_more:
+        ; increment the buffer and byte count
+    ADD        BUFFER_INDEX, BUFFER_INDEX, 22  
+    ADD        BYTE_CNT, BYTE_CNT, 22  
+    LDI        BYTES_TRANSFERRED_IN_LAST_CALL, 22      
+    LDI        SHIFT_REG, SHIFT_NONE   
+    .endif     ;ICSS_REV1
+    
+    .if $defined("ICSS_REV2")  
+    ; Insert next 28 bytes in Tx&nb