[TI Clang Migration][Phase 2]

[TI Clang Migration][PDK Utils][DSS]Disabled PDK Utils based libs/apps

- disabling this as entry/exit hook arguments are not supported by clang

Signed-off-by: Vivek Dhande <a0132295@ti.com>
[TI Clang Migration][PDK Utils][EMAC]Disabled PDK Utils based libs/apps

- disabling this as entry/exit hook arguments are not supported by clang

Signed-off-by: Vivek Dhande <a0132295@ti.com>
[TI Clang Migration][McASP]Porting to Clang

Signed-off-by: Vivek Dhande <a0132295@ti.com>
[TI Clang Migration][PDK Utils][McASP]Disabled PDK Utils based libs/apps

- disabling this as entry/exit hook arguments are not supported by clang

Signed-off-by: Vivek Dhande <a0132295@ti.com>
[PDK-9554][TI CLANG Migration] R5 Drivers Updates and Testing: MMCSD

Signed-off-by: Vivek Dhande <a0132295@ti.com>
[TI Clang Migration][PDK Utils][MMCSD]Disabled PDK Utils based libs/apps

- disabling this as entry/exit hook arguments are not supported by clang
Signed-off-by: Vivek Dhande <a0132295@ti.com>
[TI Clang Migration][PDK Utils][PRUSS]Disabled PDK Utils based libs/apps

- disabling this as entry/exit hook arguments are not supported by clang

Signed-off-by: Vivek Dhande <a0132295@ti.com>
[TI Clang Migration][Sci-Sclient]Porting to Clang

Signed-off-by: Vivek Dhande <a0132295@ti.com>
[PDK-9556][TI CLANG Migration] R5 Drivers Updates and Testing: SPI

Signed-off-by: Vivek Dhande <a0132295@ti.com>
[TI Clang Migration][PDK Utils][SPI]Disabled PDK Utils based libs/apps

- disabling this as entry/exit hook arguments are not supported by clang

Signed-off-by: Vivek Dhande <a0132295@ti.com>
[PDK-9554][TI CLANG Migration] R5 Drivers Updates and Testing: UART

Signed-off-by: Vivek Dhande <a0132295@ti.com>
[TI Clang Migration][PDK Utils][UART]Disabled PDK Utils based libs/apps

- disabling this as entry/exit hook arguments are not supported by clang

Signed-off-by: Vivek Dhande <a0132295@ti.com>
[PDK-9552][TI CLANG Migration] R5 Drivers Updates and Testing: UDMA

Signed-off-by: Vivek Dhande <a0132295@ti.com>

diff --git a/packages/ti/drv/dss/dss_component.mk b/packages/ti/drv/dss/dss_component.mk
index c5ddd2d38f5bee82452035fa71d72937ee6eaaff..2c3b9c379e6d02e7f44180d810a6e6e90151825a 100755 (executable)
--- a/packages/ti/drv/dss/dss_component.mk
+++ b/packages/ti/drv/dss/dss_component.mk
@@ -148,7 +148,8 @@ export dss_app_utils_sysbios_SOCLIST
 dss_app_utils_sysbios_$(SOC)_CORELIST = $(drvdss_$(SOC)_CORELIST)
 export dss_app_utils_sysbios_$(SOC)_CORELIST
 
-dss_APP_LIB_LIST += dss_app_utils dss_app_utils_sysbios
+#dss_APP_LIB_LIST += dss_app_utils dss_app_utils_sysbios
+dss_APP_LIB_LIST += dss_app_utils
 
 #
 # DSS Examples

diff --git a/packages/ti/drv/emac/emac_component.mk b/packages/ti/drv/emac/emac_component.mk
index 597fbd9b7f5949f38ff7ada2c3f163e90bc37ecb..e7ad190d25dfd8a32f598033114d2fcbd7fa9d17 100644 (file)
--- a/packages/ti/drv/emac/emac_component.mk
+++ b/packages/ti/drv/emac/emac_component.mk
@@ -89,7 +89,7 @@ drvemac_j721e_CORELIST = mpu1_0 mcu1_0 mcu1_1 mcu2_0 mcu2_1 mcu3_0 mcu3_1
 # List of components included under emac lib
 # The components included here are built and will be part of emac lib
 ############################
-emac_LIB_LIST = emac emac_indp emac_profile emac_profile_indp
+emac_LIB_LIST = emac emac_indp
 drvemac_LIB_LIST = $(emac_LIB_LIST)
 
 ############################
@@ -98,7 +98,8 @@ drvemac_LIB_LIST = $(emac_LIB_LIST)
 # All the tests mentioned in list are built when test target is called
 # List below all test apps for allowed values
 ############################
-emac_EXAMPLE_LIST = Emac_Icssg_TestApp Emac_Cpsw_TestApp Emac_Cpsw_Smp_TestApp Emac_Icssg_WithoutDDR_TestApp
+#emac_EXAMPLE_LIST = Emac_Icssg_TestApp Emac_Cpsw_TestApp Emac_Cpsw_Smp_TestApp Emac_Icssg_WithoutDDR_TestApp
+emac_EXAMPLE_LIST = Emac_Icssg_TestApp Emac_Cpsw_Smp_TestApp Emac_Icssg_WithoutDDR_TestApp
 drvemac_EXAMPLE_LIST = $(emac_EXAMPLE_LIST)
 
 #

diff --git a/packages/ti/drv/mcasp/example/src/audioSample_main.c b/packages/ti/drv/mcasp/example/src/audioSample_main.c
index eb34f4002ee1b06c3b031e0f1e02db392659586a..903f7227b3b10fb435f108ceec6d68ba4d959006 100644 (file)
--- a/packages/ti/drv/mcasp/example/src/audioSample_main.c
+++ b/packages/ti/drv/mcasp/example/src/audioSample_main.c
@@ -129,7 +129,7 @@ extern void Audio_echo_Task(void);
  *  \param  None
  *  \return None
  */
-int main(Void)
+int main(void)
 {
     HeapP_Params params;
     TaskP_Params tskParms;

diff --git a/packages/ti/drv/mcasp/mcasp_component.mk b/packages/ti/drv/mcasp/mcasp_component.mk
index d3f4c1ee05a17c64a1fdbe21070865f0d0c71fa6..902818736881d3a858e56d18a748e29ed47a032e 100755 (executable)
--- a/packages/ti/drv/mcasp/mcasp_component.mk
+++ b/packages/ti/drv/mcasp/mcasp_component.mk
@@ -91,7 +91,7 @@ drvmcasp_RTOS_LIST          = $(DEFAULT_RTOS_LIST)
 # The components included here are built and will be part of mcasp lib
 ############################
 
-mcasp_LIB_LIST = mcasp mcasp_indp mcasp_profile mcasp_profile_indp
+mcasp_LIB_LIST = mcasp mcasp_indp
 drvmcasp_LIB_LIST = $(mcasp_LIB_LIST)
 
 ############################
@@ -100,7 +100,8 @@ drvmcasp_LIB_LIST = $(mcasp_LIB_LIST)
 # All the tests mentioned in list are built when test target is called
 # List below all examples for allowed values
 ############################
-mcasp_EXAMPLE_LIST = MCASP_AudioLoopback_TestApp MCASP_AudioDCAnalogLoopback_TestApp MCASP_AudioDCDigitalLoopback_TestApp
+#mcasp_EXAMPLE_LIST = MCASP_AudioLoopback_TestApp MCASP_AudioDCAnalogLoopback_TestApp MCASP_AudioDCDigitalLoopback_TestApp
+mcasp_EXAMPLE_LIST = 
 #
 # MCASP Modules
 #

diff --git a/packages/ti/drv/mcasp/src/mcasp_ioctl.c b/packages/ti/drv/mcasp/src/mcasp_ioctl.c
index 223eb384a4bb9e05f7b75a55f17385f407746ba9..92c331f16bbb30f7e079066f442794a9a1674f39 100644 (file)
--- a/packages/ti/drv/mcasp/src/mcasp_ioctl.c
+++ b/packages/ti/drv/mcasp/src/mcasp_ioctl.c
@@ -439,7 +439,7 @@ int32_t Mcasp_localSubmitIoctl(Mcasp_ChannelHandle      chanHandle,
         {
             status = MCASP_EBADARGS;
         }
-        else if ((NULL == &instHandle->RcvObj) && (NULL == &instHandle->XmtObj))
+        else if ((NULL == (void *)&instHandle->RcvObj) && (NULL == (void*)&instHandle->XmtObj))
         {
             status = MCASP_EBADMODE;
         }

diff --git a/packages/ti/drv/mmcsd/mmcsd_component.mk b/packages/ti/drv/mmcsd/mmcsd_component.mk
index 5181bb072914390649276f8d7bdaf92cdb211550..7f8f397881fd533e6493da92836ac0ae43d96ab6 100644 (file)
--- a/packages/ti/drv/mmcsd/mmcsd_component.mk
+++ b/packages/ti/drv/mmcsd/mmcsd_component.mk
@@ -93,7 +93,7 @@ drvmmcsd_RTOS_LIST          = $(DEFAULT_RTOS_LIST)
 # List of components included under mmcsd lib
 # The components included here are built and will be part of mmcsd lib
 ############################
-mmcsd_LIB_LIST = mmcsd mmcsd_dma mmcsd_profile mmcsd_dma_profile mmcsd_indp mmcsd_profile_indp
+mmcsd_LIB_LIST = mmcsd mmcsd_dma mmcsd_indp
 drvmmcsd_LIB_LIST = $(mmcsd_LIB_LIST)
 mmcsd_EXAMPLE_LIST =
 #

diff --git a/packages/ti/drv/mmcsd/src/v2/MMCSD_v2.c b/packages/ti/drv/mmcsd/src/v2/MMCSD_v2.c
index ef282d2d9962f500c9d01b22a2a945344f7487ac..6141e82af3cd69d8eca61660b39ad1afcdf9b38a 100755 (executable)
--- a/packages/ti/drv/mmcsd/src/v2/MMCSD_v2.c
+++ b/packages/ti/drv/mmcsd/src/v2/MMCSD_v2.c
@@ -476,7 +476,7 @@ typedef struct {
 } adma2_desc_t;
 
 adma2_desc_t adma2_desc;
-#if defined(__ARM_ARCH_7A__) || defined(__aarch64__) || defined(__TI_ARM_V7R4__)
+#if defined(__ARM_ARCH_7A__) || defined(__aarch64__) || ((__ARM_ARCH == 7) && (__ARM_ARCH_PROFILE == 'R'))
 __attribute__((aligned(SOC_CACHELINE_SIZE))) // GCC way of aligning
 #endif
 
@@ -1070,24 +1070,9 @@ static MMCSD_Error MMCSD_v2_open(MMCSD_Handle handle, MMCSD_Params params)
     return (ret);
 }
 /* Data buffer for message transmission, it is not stack allocated to allow cache aligning */
-#if defined(__GNUC__) && !defined(__ti__)
-CSL_SET_DALIGN(256)  /* GCC way of aligning */
-#else
-CSL_SET_DALIGN(dataBuffer, 256)
-#endif
-static uint8_t                     dataBuffer[512];
-
-#if defined(__GNUC__) && !defined(__ti__)
-CSL_SET_DALIGN(256)            /* GCC way of aligning */
-#else
-CSL_SET_DALIGN(cmd6_response_buf, 256)
-#endif
-static uint8_t                     cmd6_response_buf[512];
-
-
-
-
+static uint8_t dataBuffer[512] __attribute__((aligned(256)));
 
+static uint8_t cmd6_response_buf[512] __attribute__((aligned(256)));
 
 /*
  *  ======== MMCSD_v2_initSd ========

diff --git a/packages/ti/drv/mmcsd/test/src/main.c b/packages/ti/drv/mmcsd/test/src/main.c
index 9f40c407b6f52179b5be08bdc47305e6b8900fee..9dab743f7186a560c9c260fe69bb59505ba38996 100644 (file)
--- a/packages/ti/drv/mmcsd/test/src/main.c
+++ b/packages/ti/drv/mmcsd/test/src/main.c
@@ -325,7 +325,7 @@ uint8_t tx[MMCSD_TEST_MAX_BUFSIZE] __attribute__((aligned(DATA_BUF_ALIGN))) __at
 uint8_t rx[MMCSD_TEST_MAX_BUFSIZE] __attribute__((aligned(DATA_BUF_ALIGN))) __attribute__((section (".benchmark_buffer")));
 
 
-#if (defined(_TMS320C6X) || defined (__TI_ARM_V7M4__))
+#if (defined(_TMS320C6X) || ((__ARM_ARCH == 7) && (__ARM_ARCH_PROFILE == 'M')))
 #pragma DATA_ALIGN(tx, DATA_BUF_ALIGN)
 #pragma DATA_ALIGN(rx, DATA_BUF_ALIGN)
 #endif

diff --git a/packages/ti/drv/mmcsd/test/src/main_emmc.c b/packages/ti/drv/mmcsd/test/src/main_emmc.c
index 6d79f115e4ada319e4152aabd2cd1db11160361e..9b90ef35d45da958a7f4170229754384323b2558 100644 (file)
--- a/packages/ti/drv/mmcsd/test/src/main_emmc.c
+++ b/packages/ti/drv/mmcsd/test/src/main_emmc.c
@@ -246,7 +246,7 @@ MMCSD_Handle handle = NULL;
 uint8_t tx[MMCSD_TEST_MAX_BUFSIZE] __attribute__((aligned(DATA_BUF_ALIGN))) __attribute__((section (".benchmark_buffer")));
 uint8_t rx[MMCSD_TEST_MAX_BUFSIZE] __attribute__((aligned(DATA_BUF_ALIGN))) __attribute__((section (".benchmark_buffer")));
 
-#if (defined(_TMS320C6X) || defined (__TI_ARM_V7M4__))
+#if (defined(_TMS320C6X) || ((__ARM_ARCH == 7) && (__ARM_ARCH_PROFILE == 'M')))
 #pragma DATA_ALIGN(tx, DATA_BUF_ALIGN)
 #pragma DATA_ALIGN(rx, DATA_BUF_ALIGN)
 #endif

diff --git a/packages/ti/drv/mmcsd/test/src/profiling.c b/packages/ti/drv/mmcsd/test/src/profiling.c
index 86406520e9f506707a1a6917abcb720544d1549c..68725ad487820398e820aef151c7e870cf373373 100644 (file)
--- a/packages/ti/drv/mmcsd/test/src/profiling.c
+++ b/packages/ti/drv/mmcsd/test/src/profiling.c
@@ -57,7 +57,7 @@ profile_Context_t profile_Context;
 char uart_print_string[64];
 void profile_initPerfCounters()
 {
-#if defined(__TI_ARM_V7M4__)
+#if ((__ARM_ARCH == 7) && (__ARM_ARCH_PROFILE == 'M'))
        extern volatile uint32_t *CACHE_SCTM_CTCR_WOT_j;
        extern volatile uint32_t *CACHE_SCTM_CTCNTL;
        extern volatile uint32_t *CACHE_SCTM_CTCNTR_k;
@@ -128,7 +128,7 @@ static uint32_t readTime32(void)
 
 #if defined (_TMS320C6X)
     timeVal = TSCL;
-#elif defined (__TI_ARM_V7M4__)
+#elif ((__ARM_ARCH == 7) && (__ARM_ARCH_PROFILE == 'M'))
     timeVal = *CACHE_SCTM_CTCNTR_k;
 //    MMCSD_log("Timeval=%u\n",*CACHE_SCTM_CTCNTR_k);
 #elif defined(BUILD_MPU)

diff --git a/packages/ti/drv/pruss/pruss_component.mk b/packages/ti/drv/pruss/pruss_component.mk
index 731efd35fb7089423cfebf834a11ede94c7d0f36..93a6c1029fd4bbc186311eb1b1ed09ed2b1b3bd1 100644 (file)
--- a/packages/ti/drv/pruss/pruss_component.mk
+++ b/packages/ti/drv/pruss/pruss_component.mk
@@ -84,7 +84,7 @@ drvpruss_am64x_CORELIST  = mpu1_0 mcu1_0 mcu1_1 mcu2_0 mcu2_1 ipu1_0
 # List of components included under uart lib
 # The components included here are built and will be part of uart lib
 ############################
-pruss_LIB_LIST = pruss pruss_indp pruss_profile pruss_profile_indp
+pruss_LIB_LIST = pruss pruss_indp
 drvpruss_LIB_LIST = $(pruss_LIB_LIST)
 
 pruss_FIRM_LIST = pruss_sorte_slave pruss_sorte_master

diff --git a/packages/ti/drv/sciclient/examples/sciclient_firmware_boot_TestApp/linker_r5.lds b/packages/ti/drv/sciclient/examples/sciclient_firmware_boot_TestApp/linker_r5.lds
index 28829d8b3e5e2f1934b8ed8b520085ce17ed6668..9fce111068cb2e654eedc5251b4588d34ccec1de 100755 (executable)
--- a/packages/ti/drv/sciclient/examples/sciclient_firmware_boot_TestApp/linker_r5.lds
+++ b/packages/ti/drv/sciclient/examples/sciclient_firmware_boot_TestApp/linker_r5.lds
@@ -79,6 +79,7 @@ SECTIONS
     .startupCode                 : {} palign(8)     > OCMRAM_sciclientTest
     .startupData                 : {} palign(8)     > OCMRAM_sciclientTest, type = NOINIT
     .text                         : {} palign(8)     > OCMRAM_sciclientTest
+    .rodata                       : {} palign(8)     > OCMRAM_sciclientTest
     .const                        : {} palign(8)     > OCMRAM_sciclientTest
     .const.devgroup.MCU_WAKEUP    : {} align(4)      > OCMRAM_sciclientTest
     .const.devgroup.MAIN          : {} align(4)      > OCMRAM_sciclientTest

diff --git a/packages/ti/drv/sciclient/examples/sciclient_firmware_boot_TestApp/makefile b/packages/ti/drv/sciclient/examples/sciclient_firmware_boot_TestApp/makefile
index f3731cb9dfe130c428013b13a4ff78918f003e5b..0e89ef43bcfb30a74b8083bc574c2cc1e7859f3f 100755 (executable)
--- a/packages/ti/drv/sciclient/examples/sciclient_firmware_boot_TestApp/makefile
+++ b/packages/ti/drv/sciclient/examples/sciclient_firmware_boot_TestApp/makefile
@@ -48,7 +48,7 @@ ifeq ($(CORE),mpu1_0)
     LNKFLAGS_LOCAL_mpu1_0 += --entry Entry
 endif
 ifeq ($(CORE), mcu1_0)
-    LNKFLAGS_LOCAL_mcu1_0 += --entry_point=_sciclientTestResetVectors
+    LNKFLAGS_LOCAL_mcu1_0 += -Xlinker --entry_point=_sciclientTestResetVectors
 endif
 
 # Core/SoC/platform specific source files and CFLAGS

diff --git a/packages/ti/drv/sciclient/src/boardcfg_makefile b/packages/ti/drv/sciclient/src/boardcfg_makefile
index e50d602661d6bdb6d243af694a897bd0989f3b2f..fa121c377f640d63e2f69ba28228bdd302af41f1 100755 (executable)
--- a/packages/ti/drv/sciclient/src/boardcfg_makefile
+++ b/packages/ti/drv/sciclient/src/boardcfg_makefile
@@ -140,7 +140,7 @@ $(OBJDIR)/$(1).$(OBJEXT) : $(2).c
 ifeq ($(CORE), mcu1_0)
        @echo "Build Board Configuration Obj Files"
        $(MKDIR) -p $(OBJDIR)
-       $(CC) $(_CFLAGS) $(INCLUDES) $(CFLAGS_DIROPTS) -DBUILD_MCU1_0 -fc $(2).c
+       $(CC) $(_CFLAGS) $(INCLUDES) $(CFLAGS_DIROPTS) -DBUILD_MCU1_0 -x c $(2).c -o $(OBJDIR)/$(notdir $(2)).$(OBJEXT)
 endif
 
 # Copy the raw binary into an intermediate file (will get deleted by make)

diff --git a/packages/ti/drv/sciclient/src/sciclient/sciclient_priv.h b/packages/ti/drv/sciclient/src/sciclient/sciclient_priv.h
index 1abf759a872f505bf32cd17a7ce76f41a05f019b..700eb8812213ace935582e7d43d5c5c239c8a2f0 100755 (executable)
--- a/packages/ti/drv/sciclient/src/sciclient/sciclient_priv.h
+++ b/packages/ti/drv/sciclient/src/sciclient/sciclient_priv.h
@@ -187,15 +187,6 @@ typedef struct
 extern const Sciclient_MapStruct_t gSciclientMap[SCICLIENT_CONTEXT_MAX_NUM];
 /* @} */
 
-/** Board Configuration array */
-extern const uint32_t gSciclient_boardCfgLow[(SCICLIENT_BOARDCFG_SIZE_IN_BYTES+3U)/4U];
-/** Board Configuration - RM array */
-extern const uint32_t gSciclient_boardCfgLow_rm[(SCICLIENT_BOARDCFG_RM_SIZE_IN_BYTES+3U)/4U];
-/** Board Configuration - Security array */
-extern const uint32_t gSciclient_boardCfgLow_sec[(SCICLIENT_BOARDCFG_SECURITY_SIZE_IN_BYTES+3U)/4U];
-/** Board Configuration - PM array */
-extern const uint32_t gSciclient_boardCfgLow_pm[(SCICLIENT_BOARDCFG_PM_SIZE_IN_BYTES+3U)/4U];
-
 /* ========================================================================== */
 /*                          Function Declarations                             */
 /* ========================================================================== */

diff --git a/packages/ti/drv/spi/example/mcspiLoopbackApp/src/mcspiLoopbackApp.c b/packages/ti/drv/spi/example/mcspiLoopbackApp/src/mcspiLoopbackApp.c
index 73734636da27da58601ebd4d6eb16b1bde89bcc2..198dd112460f3a1c1c365364e06d285883f7e167 100755 (executable)
--- a/packages/ti/drv/spi/example/mcspiLoopbackApp/src/mcspiLoopbackApp.c
+++ b/packages/ti/drv/spi/example/mcspiLoopbackApp/src/mcspiLoopbackApp.c
@@ -207,7 +207,7 @@ void padConfig_prcmEnable()
     HW_WR_REG32(SOC_CORE_PAD_IO_REGISTERS_BASE+CTRL_CORE_PAD_IO_SPI1_D1,0x00040000);
 
     /* IPU1 crossbar */
-#if defined (__TI_ARM_V7M4__)
+#if ((__ARM_ARCH == 7) && (__ARM_ARCH_PROFILE == 'M'))
     CSL_xbarIrqConfigure(CSL_XBAR_IRQ_CPU_ID_IPU1, CSL_XBAR_INST_IPU1_IRQ_44, CSL_XBAR_UART1_IRQ);
 #elif defined(_TMS320C6X)
     CSL_xbarIrqConfigure(CSL_XBAR_IRQ_CPU_ID_DSP1, CSL_XBAR_INST_DSP1_IRQ_44, CSL_XBAR_UART1_IRQ);

diff --git a/packages/ti/drv/spi/example/mcspi_serializer/src/main_mcspi_example.c b/packages/ti/drv/spi/example/mcspi_serializer/src/main_mcspi_example.c
index a26985627e01bc84bc3256100e6a9beef9d2a74c..77a1319091fb4c4151b612e056158f7b972bd512 100644 (file)
--- a/packages/ti/drv/spi/example/mcspi_serializer/src/main_mcspi_example.c
+++ b/packages/ti/drv/spi/example/mcspi_serializer/src/main_mcspi_example.c
@@ -106,7 +106,7 @@ extern void  MCSPI_Board_crossbarInit(void);
 #endif
 
 #if defined(SOC_AM574x) || defined(SOC_AM572x) || defined (SOC_AM571x)
-#if defined (__TI_ARM_V7M4__)
+#if ((__ARM_ARCH == 7) && (__ARM_ARCH_PROFILE == 'M'))
 #define DELAY_VALUE       (100U)
 #else
 #define DELAY_VALUE       (1000U)

diff --git a/packages/ti/drv/spi/example/mcspi_slavemode/j7200/linker_mcu.lds b/packages/ti/drv/spi/example/mcspi_slavemode/j7200/linker_mcu.lds
index 4c4596100e7cc9b8c89c3c8375dc5942ae6f204e..b5309c745d446ac236d649faa9029c977ed7b0ba 100755 (executable)
--- a/packages/ti/drv/spi/example/mcspi_slavemode/j7200/linker_mcu.lds
+++ b/packages/ti/drv/spi/example/mcspi_slavemode/j7200/linker_mcu.lds
@@ -68,6 +68,7 @@ SECTIONS
     .startupData   : {} palign(8)      > MCU0_R5F1_TCMB0, type = NOINIT
     .text          : {} palign(8)      > DDR0
     .const         : {} palign(8)      > DDR0
+    .rodata        : {} palign(8)      > DDR0
     .cinit         : {} palign(8)      > DDR0
     .pinit         : {} palign(8)      > DDR0
     .bss           : {} align(4)       > DDR0

diff --git a/packages/ti/drv/spi/example/mcspi_slavemode/j7200/linker_mcu_freertos.lds b/packages/ti/drv/spi/example/mcspi_slavemode/j7200/linker_mcu_freertos.lds
index 3b6d38de02d8028ed6a403a67522b162b42de954..2de4adbbf16fc32055dbe1aa547dcb95d49e3322 100644 (file)
--- a/packages/ti/drv/spi/example/mcspi_slavemode/j7200/linker_mcu_freertos.lds
+++ b/packages/ti/drv/spi/example/mcspi_slavemode/j7200/linker_mcu_freertos.lds
@@ -77,6 +77,7 @@ SECTIONS
         .text.boot   : palign(8)
     }                                    > DDR0
     .const           : {} palign(8)      > DDR0
+    .rodata          : {} palign(8)      > DDR0
     .cinit           : {} palign(8)      > DDR0
     .bss             : {} align(4)       > DDR0
     .far             : {} align(4)       > DDR0

diff --git a/packages/ti/drv/spi/example/mcspi_slavemode/j7200/linker_mcu_sysbios.lds b/packages/ti/drv/spi/example/mcspi_slavemode/j7200/linker_mcu_sysbios.lds
index 3004dc79a584e6b60ec70d6d9d17cfa8aaef66e0..b7fc44d9976946977b00a69949348c2393067716 100755 (executable)
--- a/packages/ti/drv/spi/example/mcspi_slavemode/j7200/linker_mcu_sysbios.lds
+++ b/packages/ti/drv/spi/example/mcspi_slavemode/j7200/linker_mcu_sysbios.lds
@@ -34,6 +34,7 @@ SECTIONS
     .bss        : {} align(8)    > DDR0
     .far        : {} align(8)    > DDR0
     .const      : {} palign(8)   > DDR0
+    .rodata     : {} palign(8)   > DDR0
     .data       : {} palign(128) > DDR0
     .sysmem     : {} align(8)    > DDR0
     .stack      : {} align(4)    > DDR0

diff --git a/packages/ti/drv/spi/example/mcspi_slavemode/j721e/linker_mcu.lds b/packages/ti/drv/spi/example/mcspi_slavemode/j721e/linker_mcu.lds
index b8c98bf1f36db9b12587393f7d719d7132d3a541..32b38593e5a9dc946cdc2f803ec4819c3082c5fc 100755 (executable)
--- a/packages/ti/drv/spi/example/mcspi_slavemode/j721e/linker_mcu.lds
+++ b/packages/ti/drv/spi/example/mcspi_slavemode/j721e/linker_mcu.lds
@@ -68,6 +68,7 @@ SECTIONS
     .startupData   : {} palign(8)      > MCU0_R5F1_TCMB0, type = NOINIT
     .text          : {} palign(8)      > DDR0
     .const         : {} palign(8)      > DDR0
+    .rodata        : {} palign(8)      > DDR0
     .cinit         : {} palign(8)      > DDR0
     .pinit         : {} palign(8)      > DDR0
     .bss           : {} align(4)       > DDR0

diff --git a/packages/ti/drv/spi/example/mcspi_slavemode/j721e/linker_mcu_freertos.lds b/packages/ti/drv/spi/example/mcspi_slavemode/j721e/linker_mcu_freertos.lds
index c9566e4c5bff7b5949cbb27df2d5e02104ac41a9..d109b8395c3c4470ff4bd03a4dcbd11cd3e59bfd 100644 (file)
--- a/packages/ti/drv/spi/example/mcspi_slavemode/j721e/linker_mcu_freertos.lds
+++ b/packages/ti/drv/spi/example/mcspi_slavemode/j721e/linker_mcu_freertos.lds
@@ -77,6 +77,7 @@ SECTIONS
         .text.boot   : palign(8)
     }                                    > DDR0
     .const           : {} palign(8)      > DDR0
+    .rodata          : {} palign(8)      > DDR0
     .cinit           : {} palign(8)      > DDR0
     .bss             : {} align(4)       > DDR0
     .far             : {} align(4)       > DDR0

diff --git a/packages/ti/drv/spi/example/mcspi_slavemode/j721e/linker_mcu_sysbios.lds b/packages/ti/drv/spi/example/mcspi_slavemode/j721e/linker_mcu_sysbios.lds
index 76ef5d9143d1376c33c90dd6284297bc074aed07..2569fb82f811158dc9774d927c2eba1053ca4cfb 100755 (executable)
--- a/packages/ti/drv/spi/example/mcspi_slavemode/j721e/linker_mcu_sysbios.lds
+++ b/packages/ti/drv/spi/example/mcspi_slavemode/j721e/linker_mcu_sysbios.lds
@@ -41,6 +41,7 @@ SECTIONS
     .bss        : {} align(8)    > DDR0
     .far        : {} align(8)    > DDR0
     .const      : {} palign(8)   > DDR0
+    .rodata     : {} palign(8)   > DDR0
     .data       : {} palign(128) > DDR0
     .sysmem     : {} align(8)    > DDR0
     .stack      : {} align(4)    > DDR0

diff --git a/packages/ti/drv/spi/example/mcspi_slavemode/src/main_mcspi_slave_mode.c b/packages/ti/drv/spi/example/mcspi_slavemode/src/main_mcspi_slave_mode.c
index 98b118ab0e3ec53df715d8588915242f5b3ee5f4..0d66e49a68dffe0a50547a2da1b0838bb6c5a167 100755 (executable)
--- a/packages/ti/drv/spi/example/mcspi_slavemode/src/main_mcspi_slave_mode.c
+++ b/packages/ti/drv/spi/example/mcspi_slavemode/src/main_mcspi_slave_mode.c
@@ -394,7 +394,7 @@ int32_t MCSPI_udma_deinit(void)
 /**********************************************************************
  ************************** Global Variables **************************
  **********************************************************************/
-#if (defined(_TMS320C6X) || defined (__TI_ARM_V7M4__))
+#if (defined(_TMS320C6X) || ((__ARM_ARCH == 7) && (__ARM_ARCH_PROFILE == 'M')))
 #pragma DATA_ALIGN (masterRxBuffer, 128)
 unsigned char masterRxBuffer[128];
 #pragma DATA_ALIGN (slaveRxBuffer, 128)
@@ -1844,7 +1844,7 @@ int main(void)
 #endif
 
 #if defined(SOC_AM65XX) || defined(SOC_J721E) || defined(SOC_J7200)
-#if defined (__TI_ARM_V7R4__)
+#if ((__ARM_ARCH == 7) && (__ARM_ARCH_PROFILE == 'R'))
     /* Configure the MCU SPI0_D1 pinmux, since it is not set by default in board */
     HW_WR_REG32((WKUP_PINMUX_REG_BASE + MCU_SPI0_D1_PADCFG_OFFSET), PIN_MODE(0) | \
                 ((PIN_PULL_DISABLE | PIN_INPUT_ENABLE) & (~PIN_PULL_DIRECTION)));

diff --git a/packages/ti/drv/spi/example/spiLoopback/src/main_spi_loopback_example.c b/packages/ti/drv/spi/example/spiLoopback/src/main_spi_loopback_example.c
index f7f82ce0fbb81acb50ff26c43ddc8e2842f527b8..465fca357681d806784180f6397fe8e91a790fc0 100644 (file)
--- a/packages/ti/drv/spi/example/spiLoopback/src/main_spi_loopback_example.c
+++ b/packages/ti/drv/spi/example/spiLoopback/src/main_spi_loopback_example.c
@@ -148,7 +148,7 @@ void Board_initSPI(void)
 }
 
 #ifdef SPI_DMA_ENABLE
-#if (defined(_TMS320C6X) || defined (__TI_ARM_V7M4__))
+#if (defined(_TMS320C6X) || ((__ARM_ARCH == 7) && (__ARM_ARCH_PROFILE == 'M')))
 #pragma DATA_ALIGN (txBuf, 128)
 uint8_t txBuf[128];
 #pragma DATA_ALIGN (rxBuf, 128)

diff --git a/packages/ti/drv/spi/soc/dra72x/SPI_soc.c b/packages/ti/drv/spi/soc/dra72x/SPI_soc.c
index 1c3288c09f86e816e6a83b9cf72c97987cea938b..7018bbf52e854adb9e26f4ea866d7a1d5945d287 100644 (file)
--- a/packages/ti/drv/spi/soc/dra72x/SPI_soc.c
+++ b/packages/ti/drv/spi/soc/dra72x/SPI_soc.c
@@ -51,7 +51,7 @@ SPI_v1_HWAttrs spiInitCfg[CSL_MCSPI_PER_CNT] =
 {
     {
         SOC_MCSPI1_BASE,
-#if defined (__TI_ARM_V7M4__)
+#if ((__ARM_ARCH == 7) && (__ARM_ARCH_PROFILE == 'M'))
         57,
 #elif defined (__ARM_ARCH_7A__)
         97,
@@ -105,7 +105,7 @@ SPI_v1_HWAttrs spiInitCfg[CSL_MCSPI_PER_CNT] =
     },
     {
         SOC_MCSPI2_BASE,
-#if defined (__TI_ARM_V7M4__)
+#if ((__ARM_ARCH == 7) && (__ARM_ARCH_PROFILE == 'M'))
         58,
 #elif defined (__ARM_ARCH_7A__)
         98,
@@ -159,7 +159,7 @@ SPI_v1_HWAttrs spiInitCfg[CSL_MCSPI_PER_CNT] =
     },
     {
         SOC_MCSPI3_BASE,
-#if defined (__TI_ARM_V7M4__)
+#if ((__ARM_ARCH == 7) && (__ARM_ARCH_PROFILE == 'M'))
         25,
 #elif defined (__ARM_ARCH_7A__)
         123,
@@ -213,7 +213,7 @@ SPI_v1_HWAttrs spiInitCfg[CSL_MCSPI_PER_CNT] =
     },
     {
         SOC_MCSPI4_BASE,
-#if defined (__TI_ARM_V7M4__)
+#if ((__ARM_ARCH == 7) && (__ARM_ARCH_PROFILE == 'M'))
         10,
 #elif defined (__ARM_ARCH_7A__)
         80,

diff --git a/packages/ti/drv/spi/soc/dra75x/SPI_soc.c b/packages/ti/drv/spi/soc/dra75x/SPI_soc.c
index e2bfd955a5bc10c3fb59ec5665556df7b7e159f7..5b417ce607d933d5932bc77ff260cb0de1e38bff 100644 (file)
--- a/packages/ti/drv/spi/soc/dra75x/SPI_soc.c
+++ b/packages/ti/drv/spi/soc/dra75x/SPI_soc.c
@@ -51,7 +51,7 @@ SPI_v1_HWAttrs spiInitCfg[CSL_MCSPI_PER_CNT] =
 {
     {
         SOC_MCSPI1_BASE,
-#if defined (__TI_ARM_V7M4__)
+#if ((__ARM_ARCH == 7) && (__ARM_ARCH_PROFILE == 'M'))
         57,
 #elif defined (__ARM_ARCH_7A__)
         97,
@@ -105,7 +105,7 @@ SPI_v1_HWAttrs spiInitCfg[CSL_MCSPI_PER_CNT] =
     },
     {
         SOC_MCSPI2_BASE,
-#if defined (__TI_ARM_V7M4__)
+#if ((__ARM_ARCH == 7) && (__ARM_ARCH_PROFILE == 'M'))
         58,
 #elif defined (__ARM_ARCH_7A__)
         98,
@@ -159,7 +159,7 @@ SPI_v1_HWAttrs spiInitCfg[CSL_MCSPI_PER_CNT] =
     },
     {
         SOC_MCSPI3_BASE,
-#if defined (__TI_ARM_V7M4__)
+#if ((__ARM_ARCH == 7) && (__ARM_ARCH_PROFILE == 'M'))
         25,
 #elif defined (__ARM_ARCH_7A__)
         123,
@@ -213,7 +213,7 @@ SPI_v1_HWAttrs spiInitCfg[CSL_MCSPI_PER_CNT] =
     },
     {
         SOC_MCSPI4_BASE,
-#if defined (__TI_ARM_V7M4__)
+#if ((__ARM_ARCH == 7) && (__ARM_ARCH_PROFILE == 'M'))
         10,
 #elif defined (__ARM_ARCH_7A__)
         80,

diff --git a/packages/ti/drv/spi/soc/dra78x/SPI_soc.c b/packages/ti/drv/spi/soc/dra78x/SPI_soc.c
index 82d07a5a43162f2a4d64c72fa73f9ae4323b0e22..b9f303a9e2e1043a833783a30d5375203dfdbc6c 100644 (file)
--- a/packages/ti/drv/spi/soc/dra78x/SPI_soc.c
+++ b/packages/ti/drv/spi/soc/dra78x/SPI_soc.c
@@ -48,7 +48,7 @@ SPI_v1_HWAttrs spiInitCfg[CSL_MCSPI_PER_CNT] =
 {
     {
         SOC_MCSPI1_BASE,
-#if defined (__TI_ARM_V7M4__)
+#if ((__ARM_ARCH == 7) && (__ARM_ARCH_PROFILE == 'M'))
         57,
 #elif defined(_TMS320C6X)
         OSAL_REGINT_INTVEC_EVENT_COMBINER,
@@ -100,7 +100,7 @@ SPI_v1_HWAttrs spiInitCfg[CSL_MCSPI_PER_CNT] =
     },
     {
         SOC_MCSPI2_BASE,
-#if defined (__TI_ARM_V7M4__)
+#if ((__ARM_ARCH == 7) && (__ARM_ARCH_PROFILE == 'M'))
         58,
 #elif defined(_TMS320C6X)
         OSAL_REGINT_INTVEC_EVENT_COMBINER,
@@ -152,7 +152,7 @@ SPI_v1_HWAttrs spiInitCfg[CSL_MCSPI_PER_CNT] =
     },
     {
         SOC_MCSPI3_BASE,
-#if defined (__TI_ARM_V7M4__)
+#if ((__ARM_ARCH == 7) && (__ARM_ARCH_PROFILE == 'M'))
         48,
 #elif defined(_TMS320C6X)
         OSAL_REGINT_INTVEC_EVENT_COMBINER,
@@ -204,7 +204,7 @@ SPI_v1_HWAttrs spiInitCfg[CSL_MCSPI_PER_CNT] =
     },
     {
         SOC_MCSPI4_BASE,
-#if defined (__TI_ARM_V7M4__)
+#if ((__ARM_ARCH == 7) && (__ARM_ARCH_PROFILE == 'M'))
         49,
 #elif defined(_TMS320C6X)
         OSAL_REGINT_INTVEC_EVENT_COMBINER,
@@ -266,7 +266,7 @@ QSPI_HwAttrs qspiInitCfg[CSL_QSPI_PER_CNT] =
         SOC_QSPI_ADDRSP0_BASE,  /* register baseAddr */
         SOC_QSPI_ADDRSP1_BASE,  /* memMappedBaseAddr */
         96000000,               /* Input frequency */
-#if defined (__TI_ARM_V7M4__)
+#if ((__ARM_ARCH == 7) && (__ARM_ARCH_PROFILE == 'M'))
         62U,
 #elif defined(_TMS320C6X)
         OSAL_REGINT_INTVEC_EVENT_COMBINER,

diff --git a/packages/ti/drv/spi/soc/tda2ex/SPI_soc.c b/packages/ti/drv/spi/soc/tda2ex/SPI_soc.c
index 7684130f3d8f4c91c7404f4a46e70df29fb676be..94a19f6cbc6178121336302839c18e1375336dcc 100644 (file)
--- a/packages/ti/drv/spi/soc/tda2ex/SPI_soc.c
+++ b/packages/ti/drv/spi/soc/tda2ex/SPI_soc.c
@@ -48,7 +48,7 @@
 SPI_v1_HWAttrs spiInitCfg[CSL_MCSPI_PER_CNT] =
 {
     {
-#if defined (__TI_ARM_V7M4__)
+#if ((__ARM_ARCH == 7) && (__ARM_ARCH_PROFILE == 'M'))
         SOC_MCSPI1_BASE,
         57,
 #endif
@@ -97,7 +97,7 @@ SPI_v1_HWAttrs spiInitCfg[CSL_MCSPI_PER_CNT] =
         false
     },
     {
-#if defined (__TI_ARM_V7M4__)
+#if ((__ARM_ARCH == 7) && (__ARM_ARCH_PROFILE == 'M'))
         SOC_MCSPI2_BASE,
         58,
 #endif
@@ -146,7 +146,7 @@ SPI_v1_HWAttrs spiInitCfg[CSL_MCSPI_PER_CNT] =
         false
     },
     {
-#if defined (__TI_ARM_V7M4__)
+#if ((__ARM_ARCH == 7) && (__ARM_ARCH_PROFILE == 'M'))
         SOC_MCSPI3_BASE,
         25,
 #endif
@@ -195,7 +195,7 @@ SPI_v1_HWAttrs spiInitCfg[CSL_MCSPI_PER_CNT] =
         false
     },
     {
-#if defined (__TI_ARM_V7M4__)
+#if ((__ARM_ARCH == 7) && (__ARM_ARCH_PROFILE == 'M'))
         SOC_MCSPI4_BASE,
         10,
 #endif

diff --git a/packages/ti/drv/spi/soc/tda2px/SPI_soc.c b/packages/ti/drv/spi/soc/tda2px/SPI_soc.c
index f14facb8231b701dcae8f0ad06c830b79da7ba07..d904e5e57f3b84917a83747314662998b808c6a4 100644 (file)
--- a/packages/ti/drv/spi/soc/tda2px/SPI_soc.c
+++ b/packages/ti/drv/spi/soc/tda2px/SPI_soc.c
@@ -48,7 +48,7 @@
 SPI_v1_HWAttrs spiInitCfg[CSL_MCSPI_PER_CNT] =
 {
     {
-#if defined (__TI_ARM_V7M4__)
+#if ((__ARM_ARCH == 7) && (__ARM_ARCH_PROFILE == 'M'))
         SOC_MCSPI1_BASE,
         57,
 #endif
@@ -97,7 +97,7 @@ SPI_v1_HWAttrs spiInitCfg[CSL_MCSPI_PER_CNT] =
         false
     },
     {
-#if defined (__TI_ARM_V7M4__)
+#if ((__ARM_ARCH == 7) && (__ARM_ARCH_PROFILE == 'M'))
         SOC_MCSPI2_BASE,
         58,
 #endif
@@ -146,7 +146,7 @@ SPI_v1_HWAttrs spiInitCfg[CSL_MCSPI_PER_CNT] =
         false
     },
     {
-#if defined (__TI_ARM_V7M4__)
+#if ((__ARM_ARCH == 7) && (__ARM_ARCH_PROFILE == 'M'))
         SOC_MCSPI3_BASE,
         25,
 #endif
@@ -195,7 +195,7 @@ SPI_v1_HWAttrs spiInitCfg[CSL_MCSPI_PER_CNT] =
         false
     },
     {
-#if defined (__TI_ARM_V7M4__)
+#if ((__ARM_ARCH == 7) && (__ARM_ARCH_PROFILE == 'M'))
         SOC_MCSPI4_BASE,
         10,
 #endif

diff --git a/packages/ti/drv/spi/soc/tda2xx/SPI_soc.c b/packages/ti/drv/spi/soc/tda2xx/SPI_soc.c
index d75ea17b555d5c06f1bed5020842d09c449afecb..e0f63e9603f3c942c5fa75334aaa7829b04f8a78 100644 (file)
--- a/packages/ti/drv/spi/soc/tda2xx/SPI_soc.c
+++ b/packages/ti/drv/spi/soc/tda2xx/SPI_soc.c
@@ -48,7 +48,7 @@
 SPI_v1_HWAttrs spiInitCfg[CSL_MCSPI_PER_CNT] =
 {
     {
-#if defined (__TI_ARM_V7M4__)
+#if ((__ARM_ARCH == 7) && (__ARM_ARCH_PROFILE == 'M'))
         SOC_MCSPI1_BASE,
         57,
 #endif
@@ -97,7 +97,7 @@ SPI_v1_HWAttrs spiInitCfg[CSL_MCSPI_PER_CNT] =
         false
     },
     {
-#if defined (__TI_ARM_V7M4__)
+#if ((__ARM_ARCH == 7) && (__ARM_ARCH_PROFILE == 'M'))
         SOC_MCSPI2_BASE,
         58,
 #endif
@@ -146,7 +146,7 @@ SPI_v1_HWAttrs spiInitCfg[CSL_MCSPI_PER_CNT] =
         false
     },
     {
-#if defined (__TI_ARM_V7M4__)
+#if ((__ARM_ARCH == 7) && (__ARM_ARCH_PROFILE == 'M'))
         SOC_MCSPI3_BASE,
         25,
 #endif
@@ -195,7 +195,7 @@ SPI_v1_HWAttrs spiInitCfg[CSL_MCSPI_PER_CNT] =
         false
     },
     {
-#if defined (__TI_ARM_V7M4__)
+#if ((__ARM_ARCH == 7) && (__ARM_ARCH_PROFILE == 'M'))
         SOC_MCSPI4_BASE,
         10,
 #endif

diff --git a/packages/ti/drv/spi/soc/tda3xx/SPI_soc.c b/packages/ti/drv/spi/soc/tda3xx/SPI_soc.c
index 169cf20ec7a1b8f966d9f14fa0a5555919675aa3..61c211a046699e6a5f6203ac8a48f43157cbb425 100644 (file)
--- a/packages/ti/drv/spi/soc/tda3xx/SPI_soc.c
+++ b/packages/ti/drv/spi/soc/tda3xx/SPI_soc.c
@@ -47,7 +47,7 @@
 SPI_v1_HWAttrs spiInitCfg[CSL_MCSPI_PER_CNT] =
 {
     {
-#if defined (__TI_ARM_V7M4__)
+#if ((__ARM_ARCH == 7) && (__ARM_ARCH_PROFILE == 'M'))
         SOC_MCSPI1_BASE,
         57,
 #endif
@@ -96,7 +96,7 @@ SPI_v1_HWAttrs spiInitCfg[CSL_MCSPI_PER_CNT] =
         false
     },
     {
-#if defined (__TI_ARM_V7M4__)
+#if ((__ARM_ARCH == 7) && (__ARM_ARCH_PROFILE == 'M'))
         SOC_MCSPI2_BASE,
         58,
 #endif
@@ -145,7 +145,7 @@ SPI_v1_HWAttrs spiInitCfg[CSL_MCSPI_PER_CNT] =
         false
     },
     {
-#if defined (__TI_ARM_V7M4__)
+#if ((__ARM_ARCH == 7) && (__ARM_ARCH_PROFILE == 'M'))
         SOC_MCSPI3_BASE,
         48,
 #endif
@@ -194,7 +194,7 @@ SPI_v1_HWAttrs spiInitCfg[CSL_MCSPI_PER_CNT] =
         false
     },
     {
-#if defined (__TI_ARM_V7M4__)
+#if ((__ARM_ARCH == 7) && (__ARM_ARCH_PROFILE == 'M'))
         SOC_MCSPI4_BASE,
         49,
 #endif

diff --git a/packages/ti/drv/spi/spi_component.mk b/packages/ti/drv/spi/spi_component.mk
index 312abdef47977a76ddd1017f4938496f0be71e2a..d290ce04b75b0368045e5fa0c0edf8a1c21a0adf 100755 (executable)
--- a/packages/ti/drv/spi/spi_component.mk
+++ b/packages/ti/drv/spi/spi_component.mk
@@ -118,7 +118,7 @@ $(eval ${DRV_OSPI_RTOS_BOARDLIST_MACRO_LIST})
 # List of components included under spi lib
 # The components included here are built and will be part of spi lib
 ############################
-spi_LIB_LIST = spi spi_dma spi_profile spi_dma_profile spi_indp spi_profile_indp
+spi_LIB_LIST = spi spi_dma spi_indp
 drvspi_LIB_LIST = $(spi_LIB_LIST)
 
 ############################

diff --git a/packages/ti/drv/spi/src/v0/OSPI_v0.c b/packages/ti/drv/spi/src/v0/OSPI_v0.c
index e06f26df069bf32edfe1945a4f7f36b25a9635f0..c4f2b6805e684228a202934d83a46bf7e519bdd8 100755 (executable)
--- a/packages/ti/drv/spi/src/v0/OSPI_v0.c
+++ b/packages/ti/drv/spi/src/v0/OSPI_v0.c
@@ -470,7 +470,7 @@ static SPI_Handle OSPI_open_v0(SPI_Handle handle, const SPI_Params *params)
             Osal_RegisterInterrupt_initParams(&interruptRegParams);
 
             interruptRegParams.corepacConfig.name=NULL;
-#ifdef __TI_ARM_V7R5__
+#if ((__ARM_ARCH == 7) && (__ARM_ARCH_PROFILE == 'R') && defined(__ARM_FEATURE_IDIV))
             interruptRegParams.corepacConfig.priority=0x8U;
 #else
             interruptRegParams.corepacConfig.priority=0x20U;
@@ -849,7 +849,7 @@ static int32_t OSPI_ind_xfer_mode_read_v0(SPI_Handle handle,
             }
         }
     }
-#if defined (__aarch64__) || defined (__TI_ARM_V7R4__)
+#if defined (__aarch64__) || ((__ARM_ARCH == 7) && (__ARM_ARCH_PROFILE == 'R'))
     CSL_archMemoryFence();
 #endif
 

diff --git a/packages/ti/drv/spi/src/v1/SPI_v1.c b/packages/ti/drv/spi/src/v1/SPI_v1.c
index 7bf235f9bd532b514d4c28cdc80e3771b7e71d3c..8608ef459aeae59da0224972e8e33045d1f03c0c 100755 (executable)
--- a/packages/ti/drv/spi/src/v1/SPI_v1.c
+++ b/packages/ti/drv/spi/src/v1/SPI_v1.c
@@ -1230,7 +1230,7 @@ static MCSPI_Handle MCSPI_open_v1(MCSPI_Handle        mcHandle,
                 Osal_RegisterInterrupt_initParams(&interruptRegParams);             
 
                 interruptRegParams.corepacConfig.name=NULL;
-    #ifdef __TI_ARM_V7R4__
+    #if ((__ARM_ARCH == 7) && (__ARM_ARCH_PROFILE == 'R'))
                 interruptRegParams.corepacConfig.priority=0x8U;
     #else
                 interruptRegParams.corepacConfig.priority=0x20U;

diff --git a/packages/ti/drv/spi/test/qspi_flash/src/main_qspi_flash_test.c b/packages/ti/drv/spi/test/qspi_flash/src/main_qspi_flash_test.c
index af1585c0c5d0a134bb3e7405624f1a1c5020bd83..408956e7bb5197cd5a8c5630ff51e9d9fe5cd78e 100644 (file)
--- a/packages/ti/drv/spi/test/qspi_flash/src/main_qspi_flash_test.c
+++ b/packages/ti/drv/spi/test/qspi_flash/src/main_qspi_flash_test.c
@@ -146,7 +146,7 @@ static uint8_t  gAppTskStackMain[APP_TSK_STACK_MAIN] __attribute__((aligned(32))
 #endif
 
 /* Buffer containing the known data that needs to be written to flash */
-#if (defined(_TMS320C6X) || defined (__TI_ARM_V7M4__))
+#if (defined(_TMS320C6X) || ((__ARM_ARCH == 7) && (__ARM_ARCH_PROFILE == 'M')))
 #pragma DATA_ALIGN (txBuf, 128)
 uint32_t txBuf[QSPI_TEST_LENGTH_BUFLEN];
 #pragma DATA_ALIGN (rxBuf, 128)

diff --git a/packages/ti/drv/spi/test/src/am571x/SPI_idkAM571x_board.c b/packages/ti/drv/spi/test/src/am571x/SPI_idkAM571x_board.c
index 8245b9e6c4adcc231562f7d0c1b7695f0c23ac3a..4de779539009df55cb83eebedc941990d765c876 100644 (file)
--- a/packages/ti/drv/spi/test/src/am571x/SPI_idkAM571x_board.c
+++ b/packages/ti/drv/spi/test/src/am571x/SPI_idkAM571x_board.c
@@ -98,7 +98,7 @@ void MCSPI_Board_crossbarInit(void) {
                           CSL_XBAR_MCSPI3_IRQ);
 #endif
 
-#if defined (__TI_ARM_V7M4__)
+#if ((__ARM_ARCH == 7) && (__ARM_ARCH_PROFILE == 'M'))
     /* Configure xbar connect for MCSPI3: IPU1_IRQ_60 (reserved) mapped to MCSPI3 intr */
     CSL_xbarIrqConfigure (CSL_XBAR_IRQ_CPU_ID_IPU1,
                           CSL_XBAR_INST_IPU1_IRQ_60, /* should match with M4 intNum in hwAttr */

diff --git a/packages/ti/drv/spi/test/src/am572x/SPI_idkAM572x_board.c b/packages/ti/drv/spi/test/src/am572x/SPI_idkAM572x_board.c
index 448411e5a7dc24c104d1a016d93b7bf3a7209a16..08cb8c111e3077e685c2347577cde18a5124f461 100644 (file)
--- a/packages/ti/drv/spi/test/src/am572x/SPI_idkAM572x_board.c
+++ b/packages/ti/drv/spi/test/src/am572x/SPI_idkAM572x_board.c
@@ -98,7 +98,7 @@ void MCSPI_Board_crossbarInit(void)
                           CSL_XBAR_MCSPI3_IRQ);
 #endif
 
-#if defined (__TI_ARM_V7M4__)
+#if ((__ARM_ARCH == 7) && (__ARM_ARCH_PROFILE == 'M'))
     /* Configure xbar connect for MCSPI3: IPU1_IRQ_60 (reserved) mapped to MCSPI3 intr */
     CSL_xbarIrqConfigure (CSL_XBAR_IRQ_CPU_ID_IPU1,
                           CSL_XBAR_INST_IPU1_IRQ_60, /* should match with M4 intNum in hwAttr */

diff --git a/packages/ti/drv/spi/test/src/am574x/SPI_idkAM574x_board.c b/packages/ti/drv/spi/test/src/am574x/SPI_idkAM574x_board.c
index b56335bd84a0670aeafcca90654f15c232dc7070..70bc6471f70581a21f2c0aacc5e37b3a90f670e9 100644 (file)
--- a/packages/ti/drv/spi/test/src/am574x/SPI_idkAM574x_board.c
+++ b/packages/ti/drv/spi/test/src/am574x/SPI_idkAM574x_board.c
@@ -98,7 +98,7 @@ void MCSPI_Board_crossbarInit(void)
                           CSL_XBAR_MCSPI3_IRQ);
 #endif
 
-#if defined (__TI_ARM_V7M4__)
+#if ((__ARM_ARCH == 7) && (__ARM_ARCH_PROFILE == 'M'))
     /* Configure xbar connect for MCSPI3: IPU1_IRQ_60 (reserved) mapped to MCSPI3 intr */
     CSL_xbarIrqConfigure (CSL_XBAR_IRQ_CPU_ID_IPU1,
                           CSL_XBAR_INST_IPU1_IRQ_60, /* should match with M4 intNum in hwAttr */

diff --git a/packages/ti/drv/uart/test/src/main_uart_test.c b/packages/ti/drv/uart/test/src/main_uart_test.c
index 1c2fa1addaa5508d402b96a7f2f843f2e7d3c5e7..a04490306ec0ffae2e307bf5b6e0158758cda646 100644 (file)
--- a/packages/ti/drv/uart/test/src/main_uart_test.c
+++ b/packages/ti/drv/uart/test/src/main_uart_test.c
@@ -548,7 +548,7 @@ bool Board_initUART(void)
         UART_socSetInitCfg(uartTestInstance + 1, &cfg);
 #endif
 
-#if defined(__TI_ARM_V7M4__)
+#if ((__ARM_ARCH == 7) && (__ARM_ARCH_PROFILE == 'M') && defined(__ARM_FEATURE_SIMD32))
         UART_HwAttrs cfg;
 
         /*
@@ -598,7 +598,7 @@ bool Board_initUART(void)
         UART_socSetInitCfg(uartTestInstance + 1, &cfg);
 #endif
 
-#if defined(__TI_ARM_V7M4__)
+#if ((__ARM_ARCH == 7) && (__ARM_ARCH_PROFILE == 'M') && defined(__ARM_FEATURE_SIMD32))
         /*
          * AM57x IPU does not have a default Xbar connection for UART 4
          * interrupt, need to use a reserved IRQ Xbar instance for Xbar interrupt
@@ -2427,7 +2427,7 @@ void UART_miCallback(UART_Handle handle, void *buf, size_t count)
  *  The test function for UART read/write on multiple instances
  *  in loopback mode
  */
-#if (defined(_TMS320C6X) || defined (__TI_ARM_V7M4__))
+#if (defined(_TMS320C6X) || ((__ARM_ARCH == 7) && (__ARM_ARCH_PROFILE == 'M') && defined(__ARM_FEATURE_SIMD32)))
 #pragma DATA_ALIGN (MiRxBuf, UART_TEST_CACHE_LINE_SIZE)
 char MiRxBuf[UART_TEST_NUM_INSTS][UART_TEST_CACHE_LINE_SIZE];
 #pragma DATA_ALIGN (MiTxBuf, UART_TEST_CACHE_LINE_SIZE)
@@ -2770,7 +2770,7 @@ void UART_populateBuffer (char* ptrBuffer, uint32_t size)
  *  @retval
  *      Error   -   <0
  */
-#if (defined(_TMS320C6X) || defined (__TI_ARM_V7M4__))
+#if (defined(_TMS320C6X) || ((__ARM_ARCH == 7) && (__ARM_ARCH_PROFILE == 'M') && defined(__ARM_FEATURE_SIMD32)))
 #pragma DATA_ALIGN (uartDataBuf, UART_TEST_CACHE_LINE_SIZE)
 char uartDataBuf[0x2000];
 #else

diff --git a/packages/ti/drv/uart/uart_component.mk b/packages/ti/drv/uart/uart_component.mk
index 88ba3df2b2fa980becc2ac4c1a440a65b389246a..5f5ab533ab92887473e6800ef8477d464cdb3011 100755 (executable)
--- a/packages/ti/drv/uart/uart_component.mk
+++ b/packages/ti/drv/uart/uart_component.mk
@@ -118,7 +118,7 @@ $(eval ${DRV_UART_RTOS_BOARDLIST_MACRO_LIST})
 # List of components included under uart lib
 # The components included here are built and will be part of uart lib
 ############################
-uart_LIB_LIST = uart uart_dma uart_profile uart_dma_profile uart_indp uart_profile_indp uart_console
+uart_LIB_LIST = uart uart_dma uart_indp uart_console
 drvuart_LIB_LIST = $(uart_LIB_LIST)
 
 ############################

diff --git a/packages/ti/drv/udma/unit_test/udma_ut/src/soc/am65xx/udma_test_soc.h b/packages/ti/drv/udma/unit_test/udma_ut/src/soc/am65xx/udma_test_soc.h
index c48cc33c33a6a80261bdcc9b2089289f4f22abce..367bdf86db3afde1bd08c8062d263974fccc7606 100644 (file)
--- a/packages/ti/drv/udma/unit_test/udma_ut/src/soc/am65xx/udma_test_soc.h
+++ b/packages/ti/drv/udma/unit_test/udma_ut/src/soc/am65xx/udma_test_soc.h
@@ -65,7 +65,7 @@ extern "C" {
 #define UTILS_MEM_HEAP_SIZE_DDR         (64U * MB)
 #define UTILS_MEM_HEAP_SIZE_OSPI        (16U * MB)
 
-#if defined (__TI_ARM_V7R4__)
+#if ((__ARM_ARCH == 7) && (__ARM_ARCH_PROFILE == 'R'))
 /* R5 OCMC (MSRAM) */
 #define UTILS_MEM_HEAP_SIZE_INTERNAL    (32U * KB)
 #else

diff --git a/packages/ti/drv/udma/unit_test/udma_ut/src/soc/j7200/udma_test_soc.h b/packages/ti/drv/udma/unit_test/udma_ut/src/soc/j7200/udma_test_soc.h
index 266f2d1c53da4c81b146416e6e7a3ff0e72591fb..f5ca0ce7836bec0a8259768feaff3ad3ab7dcb36 100644 (file)
--- a/packages/ti/drv/udma/unit_test/udma_ut/src/soc/j7200/udma_test_soc.h
+++ b/packages/ti/drv/udma/unit_test/udma_ut/src/soc/j7200/udma_test_soc.h
@@ -65,7 +65,7 @@ extern "C" {
 #define UTILS_MEM_HEAP_SIZE_DDR         (64U * MB)
 #define UTILS_MEM_HEAP_SIZE_OSPI        (16U * MB)
 
-#if defined (__TI_ARM_V7R4__)
+#if ((__ARM_ARCH == 7) && (__ARM_ARCH_PROFILE == 'R'))
 /* R5 OCMC (MSRAM) */
 #define UTILS_MEM_HEAP_SIZE_INTERNAL    (32U * KB)
 #else

diff --git a/packages/ti/drv/udma/unit_test/udma_ut/src/soc/j721e/udma_test_soc.h b/packages/ti/drv/udma/unit_test/udma_ut/src/soc/j721e/udma_test_soc.h
index ab5c49fc925dba542f5899b8a147b4cd5fb5577d..646a59ee22cb7be8a7eb8690df859176b678cf78 100644 (file)
--- a/packages/ti/drv/udma/unit_test/udma_ut/src/soc/j721e/udma_test_soc.h
+++ b/packages/ti/drv/udma/unit_test/udma_ut/src/soc/j721e/udma_test_soc.h
@@ -65,7 +65,7 @@ extern "C" {
 #define UTILS_MEM_HEAP_SIZE_DDR         (64U * MB)
 #define UTILS_MEM_HEAP_SIZE_OSPI        (16U * MB)
 
-#if defined (__TI_ARM_V7R4__)
+#if ((__ARM_ARCH == 7) && (__ARM_ARCH_PROFILE == 'R'))
 /* R5 OCMC (MSRAM) */
 #define UTILS_MEM_HEAP_SIZE_INTERNAL    (32U * KB)
 #else