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raw | patch | inline | side by side (parent: 46eb1d7)
author | Badri S <badri@ti.com> | |
Tue, 5 May 2020 08:39:24 +0000 (14:09 +0530) | ||
committer | Badri S <badri@ti.com> | |
Tue, 5 May 2020 08:41:10 +0000 (14:11 +0530) |
Updates to header file for API guide documentation
Signed-off-by: Badri S <badri@ti.com>
Signed-off-by: Badri S <badri@ti.com>
index 70272d1e52cc474224538480c10a76e9bdc10010..a19d2b9826c31afab216b50f305ae89b352562cd 100644 (file)
*/
/**
- * \ingroup DRV_SPI_MODULE
- * \defgroup DRV_SPI_MIBSPI_MODULE SPI Driver MIBSPI API
- * Multi-Buffer RAM SPI driver interface
- * @{
- */
-
-/** ============================================================================
- * @file MIBSPI.h
+ * \defgroup DRV_MIBSPI_MODULE MIBSPI Driver
+ *
+ * The MIBSPI peripheral is a feature rich serial peripheral interface
+ * in the ARxxxx/TPR12 SoCs which provides a 16-bit configurable synchronous
+ * multi-buffered multi-pin serial peripheral interface (MibSPI). The MibSPI is
+ * a programmable-length shift register used for high-speed communication between
+ * external peripherals or other microcontrollers. The MibSPI peripheral can be
+ * programmed at a high-level using the MIBSPI driver software that allows
+ * hook-up with an operating system.
+ * The MIBSPI driver exposes programming of most features provided by the IP.
+ * The MIBSPI peripheral specification is available in TRM of ARxx devices:
+ * https://www.ti.com/lit/ug/swru520d/swru520d.pdf Chapter 23:MibSPI
+ *
+ * Following is a high level description of the APIs:
+ *
+ * - MIBSPI_init(): Initialize the MIBSPI module. MIBSPI_init() plugs in application specific
+ * callbacks for utilities such as printFxn/traceFxn/addressTranslation etc.
+ * This is module level software intiialization and does not program in MIBSPI registers
+ * - MIBSPI_open():Open a MIBSPI peripheral instance in master/slave mode with associated configuration
+ * - MIBSPI_transfer():Transfer data on the MIBSPI instance.The transaction structure contains info in the tx and rx data
+ * - MIBSPI_getStats():Statistics query from the driver
+ * - MIBSPI_control(): Runtime control
+ * - MIBSPI_close():Close an instance of MIBSPI
+ *
+ *
+ * \section mibspi_limit Limitations
+ * \subsection mibspi_hwlimit Unsupported Hardware features.
+ * Following features of the MIBSPI hardware are presently NOT supported (on TPR12):
+ * - Paralllel mode operation
+ * - Modulo mode operation
+ * - SPIENA pin configuration
+ * - Extended RAM mode support
+ *
+ * \subsection mibspi_swlimit Unsupported Software features.
+ * - Compatibility mode operation
+ * - Support for all character length from 2 - 16.
+ * -- Only 8bit and 16bit data length are supported
+ * - Support for multiple simultaneous transactions
+ * - Support for multiple slaves in slave mode
+ * - Support for cancelling transaction
+ * - CSNR encoded mode support
+ * - Support for external trigger events for transfer group activation
+ * - Configuration of delay values like Chip select to transmit start delay etc in master mode
+ * - Support for power down mode
+ * - Support for MSS SPI instances on DSS c66x
+ * - Master Mode with external clock
+ * - Abort DMA transaction and cleanup on error
+ * - Abort and reset SPI peripheral state on transaction error and cleanup
+ * - Categorization of interrupts in two levels
+ * - Support for mapping CS to transfer group priority
+ * - Support for interleaved transfer (priority based) with support for disabling preemption
+ * - Configuration of slew rate for SPI pins
+ * - Configuration of SPI Pins in GPIO mode
+ * - Support for upto 4 different data formats for a single SPI instance
+ * - Support for dynamically changing format per Tx Data
+ * - Support for handling cache coherency inside driver
+ * - EDMA error handling
+ * - Multiple Slave support in slave mode
+ *
+ * \section mibspi_api API
*
- * @brief Multi-Buffer RAM SPI driver interface
*
* The MIBSPI header file should be included in an application as follows:
* @code
* #include <ti/drv/mibspi/MIBSPI.h>
* @endcode
+ * The documentation for all APIs can be referred by clicking at above file or
+ * by going to @ref MIBSPI_DRIVER_EXTERNAL_FUNCTION. Example usage of the MIBSPI
+ * driver can be seen by referring to the MIBSPI unit test code located at
+ * @verbatim ti/drv/mibspi/test/src/main_mibspi_test.c @endverbatim
+
*
- * # Operation #
- * The SPI driver in TI-RTOS is designed to serve a means to move data
+ * \section mibspi_operation Operation
+ * The MIBSPI driver in TI-RTOS/Baremetal is designed to serve a means to move data
* between SPI peripherals. This driver does not interpret any of the data sent
* to or received from this peripheral.
*
- * The APIs in this driver serve as an interface to a typical TI-RTOS
+ * The APIs in this driver serve as an interface to a typical TI-RTOS/Baremetal
* application. The specific peripheral implementations are responsible to
- * create all the SYS/BIOS specific primitives to allow for thread-safe
+ * create all the OS specific primitives to allow for thread-safe
* operation.
*
- * The SPI driver operates on some key definitions and assumptions:
+ * The MIBSPI driver operates on some key definitions and assumptions:
* - The driver operates transparent from the chip select. Some SPI controllers
* feature a hardware chip select to assert SPI slave peripherals. See the
* specific peripheral implementations on chip select requirements.
*
* - The SPI protocol does not account for a built-in handshaking mechanism and
- * neither does this SPI driver. Therefore, when operating in ::MIBSPI_SLAVE
+ * neither does this MIBSPI driver. Therefore, when operating in ::MIBSPI_SLAVE
* mode, the application must provide such a mechanism to ensure that the
* SPI slave is ready for the SPI master. The SPI slave must call
- * SPI_transfer() *before* the SPI master starts transmitting. Some example
+ * MIBSPI_transfer() *before* the SPI master starts transmitting. Some example
* application mechanisms could include:
* - Timed delays on the SPI master to guarantee the SPI slave is be ready
* for a SPI transaction.
* - A form of GPIO flow control from the slave to the SPI master to notify
* the master when ready.
- * - When SPI operates in ::SPI_MASTER, the partition of TX/RX RAM should be
+ * - When SPI operates in ::MIBSPI_MASTER, the partition of TX/RX RAM should be
* provided by application by providing proper values in ::MIBSPI_Params, such as
* number of slaves and slave profiles.
* The maximum number of supported slaves is platform specfic, please refer to
* TRM for the information. The maximum number of slaves supported in the
* driver is ::MIBSPI_SLAVE_MAX.
*
- * The platform specific SPI file present in the ti/drivers/mibspi/platform
+ * The platform specific MIBSPI file present in the ti/drivers/mibspi/soc
* directory. This file is built as a part of the SPI Library for the specific
* platform.
*
- * ## Opening the driver #
+ * \subsection mibspi_open Opening the driver
*
* Code examples for opening SPI driver in master and slave mode
*
- * Open SPI driver as ::SPI_MASTER
+ * Open MIBSPI driver as ::MIBSPI_MASTER
*
* @code
* MIBSPI_Handle handle;
* MIBSPI_Params params;
* MIBSPI_Transaction spiTransaction;
*
- * SPI_Params_init(¶ms);
- * params.mode = SPI_MASTER;
+ * MIBSPI_Params_init(¶ms);
+ * params.mode = MIBSPI_MASTER;
+ * params.dmaEnable = 1;
+ * params.dmaHandle = edmaHandle;
* params.u.masterParams.bitRate = bitRate;
* params.u.masterParams.numSlaves = 1;
* params.u.masterParams.slaveProf[0].chipSelect = 0;
* params.u.masterParams.slaveProf[0].ramBufLen = MIBSPI_RAM_MAX_ELEM/2;
- * params.u.masterParams.slaveProf[0].dmaCfg.txDmaChanNum =1U;
- * params.u.masterParams.slaveProf[0].dmaCfg.rxDmaChanNum =0U;
* params.u.masterParams.slaveProf[1].chipSelect = 1;
* params.u.masterParams.slaveProf[1].ramBufLen = MIBSPI_RAM_MAX_ELEM/2;
- * params.u.masterParams.slaveProf[1].dmaCfg.txDmaChanNum =3U;
- * params.u.masterParams.slaveProf[1].dmaCfg.rxDmaChanNum =2U;
*
- * handle = SPI_open(someSPI_configIndexValue, ¶ms);
+ * handle = MIBSPI_open(mibspiInstanceId, ¶ms);
* if (!handle) {
* System_printf("SPI did not open");
* }
* @endcode
*
*
- * Open SPI driver as ::MIBSPI_SLAVE
+ * Open MIBSPI driver as ::MIBSPI_SLAVE
*
* @code
* MIBSPI_Handle handle;
* MIBSPI_Params params;
* MIBSPI_Transaction spiTransaction;
*
- * SPI_Params_init(¶ms);
+ * MIBSPI_Params_init(¶ms);
* params.mode = MIBSPI_SLAVE;
- * params.frameFormat = SPI_POL0_PHA0;
- * params.pinMode = SPI_PINMODE_4PIN_CS;
- * params.shiftFormat = SPI_MSB_FIRST;
+ * params.frameFormat = MIBSPI_POL0_PHA0;
+ * params.pinMode = MIBSPI_PINMODE_4PIN_CS;
+ * params.shiftFormat = MIBSPI_MSB_FIRST;
* params.dmaEnable = 1;
- * params.dmaHandle = gDmaHandle;
- * params.u.slaveParams.dmaCfg.txDmaChanNum =1U;
- * params.u.slaveParams.dmaCfg.rxDmaChanNum =0U;
- * handle = SPI_open(someSPI_configIndexValue, ¶ms);
+ * params.dmaHandle = edmaHandle;
+ * handle = MIBSPI_open(mibspiInstanceId, ¶ms);
* if (!handle) {
* System_printf("SPI did not open");
* }
* @endcode
*
- * ## Transferring data #
- * Data transmitted and received by the SPI peripheral is performed using
- * SPI_transfer(). SPI_transfer() accepts a pointer to a MIBSPI_Transaction
+ * \subsection mibspi_transfer Transferring data
+ *
+ * Data transmitted and received by the MIBSPI peripheral is performed using
+ * MIBSPI_transfer(). MIBSPI_transfer() accepts a pointer to a MIBSPI_Transaction
* structure that dictates what quantity of data is sent and received.
*
* @code
* spiTransaction.rxBuf = receiveBufferPointer;
* spiTransaction.slaveIndex = index1; // For master mode only
*
- * ret = SPI_transfer(handle, &spiTransaction);
+ * ret = MIBSPI_transfer(handle, &spiTransaction);
* if (!ret) {
* System_printf("Unsuccessful SPI transfer");
* }
* @endcode
*
- * When SPI driver is configured in ::SPI_MASTER model, slave index need to be
+ * When MIBSPI driver is configured in ::MIBSPI_MASTER model, slave index need to be
* provided to indicate which slave the transfer is for.
*
* ## Canceling a transaction #
- * SPI_transferCancel() is used to cancel a SPI transaction - not supported.
+ * MIBSPI_transferCancel() is used to cancel a SPI transaction - not supported.
*
* @code
- * SPI_transferCancel(handle);
+ * MIBSPI_transferCancel(handle);
* @endcode
*
- * # Implementation #
+ * \section mibspi_implementation Implementation
*
- * This module serves as the main interface for TI-RTOS applications. Its
- * purpose is to redirect the module's APIs to specific peripheral
- * implementations which are specified using a pointer to a SPI_FxnTable.
- *
- * The SPI driver interface module is joined (at link time) to a
- * NULL-terminated array of MIBSPI_Config data structures named *SPI_config*.
- * *SPI_config* is implemented in the application with each entry being an
- * instance of a SPI peripheral. Each entry in *SPI_config* contains a:
- * - (SPI_FxnTable *) to a set of functions that implement a SPI peripheral
- * - (void *) data object that is associated with the SPI_FxnTable
- * - (void *) hardware attributes that are associated to the SPI_FxnTable
- *
- * # SPI transfer with multiple RAM buffer (icount)
- * SPI hardware has an internal RAM buffer that stores transmit/receive data
+ * \subsection mibspi_multiicount MIBSPI transfer with multiple RAM buffer (icount)
+ * MIBSPI hardware has an internal RAM buffer that stores transmit/receive data
* element in 8bits or 16bits.
- * The SPI driver has a compile time option to transfer data bigger than RAM
+ * The MIBSPI driver has a compile time option to transfer data bigger than RAM
* buffer size. This is intended for high throughput transfers. But it has some
* limitations and not supported in all SPI modes.
*
* The maximum elements is defined as MIBSPI_RAM_MAX_ELEM.
* For multiple slaves scenarios, this number is divided
* among all slaves. This information is provided from application in
- * SPI_MasterModeParams. The maximum icount value is 32. Please make sure
+ * MIBSPI_MasterModeParams. The maximum icount value is 32. Please make sure
* the transfer length is not exceed 32 * ramLen. For High clock rate, it is recommended
* to use small icount values.
*
- * # Limitation #
- *
- * # Instrumentation #
+ * \section mibspi_instrumentation Instrumentation
*
- * The SPI driver interface produces log statements if instrumentation is
- * enabled.
+ * The MIBSPI driver interface supports configuration of trace level at build time
+ * Log statements will be passed to the application provided traceFxn
*
- * Diagnostics Mask | Log details |
+ * Trace Level | Log details |
* ---------------- | ----------- |
- * Diags_USER1 | basic operations performed |
- * Diags_USER2 | detailed operations performed |
- *
+ * ERROR | Error conditions cause trace logging |
+ * WARNING | Warning conditions cause trace logging |
+ * INFO | Info trace logging enabled |
* ============================================================================
+ *
+ * \section mibspi_caution Caution
+ *
+ * TODO
+ *
+ * \section mibspi_mem_footprint Memory Footprint
+ *
+ * The memory footprint of the driver depends on how many APIs are referred to
+ * by an application (all are not necessary for basic operation). The unit test
+ * code's generated memory map file may be used to get an estimate of
+ * the memory foot-print when most APIs are used.
+ *
*/
+/** ============================================================================
+ * @file MIBSPI.h
+ *
+ * @brief Multi-Buffer RAM SPI driver interface
+ */
+
+
+
#ifndef MIBSPI_H
#define MIBSPI_H
+#include <ti/drv/mibspi/soc/MIBSPI_soc.h>
+
#ifdef __cplusplus
extern "C" {
#endif
-#include <ti/drv/mibspi/soc/MIBSPI_soc.h>
+/**
+@defgroup MIBSPI_DRIVER_EXTERNAL_FUNCTION MIBSPI Driver External Functions
+@ingroup DRV_MIBSPI_MODULE
+@brief
+* The section has a list of all the exported API which the applications need to
+* invoke in order to use the driver
+*/
+/**
+@defgroup MIBSPI_DRIVER_EXTERNAL_DATA_STRUCTURE MIBSPI Driver External Data Structures
+@ingroup DRV_MIBSPI_MODULE
+@brief
+* The section has a list of all the data structures which are exposed to the application
+*/
-/*!
- * Common SPI_control command code reservation offset.
- * SPI driver implementations should offset command codes with SPI_CMD_RESERVED
- * growing positively
+/** @defgroup MIBSPI_STATUS_DEFINES MIBSPI Status Definitions
+ * @ingroup DRV_MIBSPI_MODULE
*
- * Example implementation specific command codes:
- * @code
- * #define SPIXYZ_COMMAND0 SPI_CMD_RESERVED + 0
- * #define SPIXYZ_COMMAND1 SPI_CMD_RESERVED + 1
- * @endcode
- */
-#define MIBSPI_CMD_RESERVED (32U)
+ * @brief
+ * The section has a list of all the error codes returned by MIBSPI APIs like MIBSPI_control()
+ * module
-/*!
- * Common SPI_control status code reservation offset.
- * SPI driver implementations should offset status codes with
- * SPI_STATUS_RESERVED growing negatively.
- *
- * Example implementation specific status codes:
- * @code
- * #define SPIXYZ_STATUS_ERROR0 SPI_STATUS_RESERVED - 0
- * #define SPIXYZ_STATUS_ERROR1 SPI_STATUS_RESERVED - 1
- * #define SPIXYZ_STATUS_ERROR2 SPI_STATUS_RESERVED - 2
- * @endcode
- */
-#define MIBSPI_STATUS_RESERVED (-((int32_t)32))
+ @{ */
/*!
- * \brief Successful status code returned by SPI_control().
+ * \brief Successful status code returned by MIBSPI_control().
*
- * SPI_control() returns SPI_STATUS_SUCCESS if the control code was executed
+ * MIBSPI_control() returns MIBSPI_STATUS_SUCCESS if the control code was executed
* successfully.
*/
#define MIBSPI_STATUS_SUCCESS (int32_t)(0)
/*!
- * \brief Generic error status code returned by SPI_control().
+ * \brief Generic error status code returned by MIBSPI_control().
*
- * SPI_control() returns MIBSPI_STATUS_ERROR if the control code was not executed
+ * MIBSPI_control() returns MIBSPI_STATUS_ERROR if the control code was not executed
* successfully.
*/
#define MIBSPI_STATUS_ERROR (-((int32_t)1))
/*!
- * \brief An error status code returned by SPI_control() for undefined
+ * \brief An error status code returned by MIBSPI_control() for undefined
* command codes.
*
- * SPI_control() returns SPI_STATUS_UNDEFINEDCMD if the control code is not
+ * MIBSPI_control() returns MIBSPI_STATUS_UNDEFINEDCMD if the control code is not
* recognized by the driver implementation.
*/
#define MIBSPI_STATUS_UNDEFINEDCMD (-((int32_t)2))
+/** @}*/
+
/**
- * @defgroup SPI_CMD Command Codes
- * SPI_CMD_* macros are general command codes for SPI_control(). Not all SPI
- * driver implementations support these command codes.
+ * @defgroup MIBSPI_CMD Command Codes
+ * MIBSPI_CMD_* macros are general command codes for MIBSPI_control().
* @{
- * @ingroup SPI_CONTROL
+ * @ingroup MIBSPI_CONTROL
*/
+/*!
+ * Common MIBSPI_control command code reservation offset.
+ * MIBSPI driver implementations should offset command codes with MIBSPI_CMD_RESERVED
+ * growing positively
+ *
+ * Example implementation specific command codes:
+ * @code
+ * #define MIBSPIXYZ_COMMAND0 SPI_CMD_RESERVED + 0
+ * #define MIBSPIXYZ_COMMAND1 SPI_CMD_RESERVED + 1
+ * @endcode
+ */
+#define MIBSPI_CMD_RESERVED (32U)
+
/*!
* @brief Command used by SPI_control to enable loopback
*
/*!
* @brief
- * Definitions for SPI Pins Operation Mode.
+ * Definitions for MIBSPI Pins Operation Mode.
*
- * \ingroup SPI_DRIVER_EXTERNAL_DATA_STRUCTURE
+ * @ingroup MIBSPI_DRIVER_EXTERNAL_DATA_STRUCTURE
*
*/
typedef enum MIBSPI_PinMode_e
/*!
* @brief
- * Definitions for SPI Data shift format.
+ * Definitions for MIBSPI Data shift format.
*
- * \ingroup SPI_DRIVER_EXTERNAL_DATA_STRUCTURE
+ * @ingroup MIBSPI_DRIVER_EXTERNAL_DATA_STRUCTURE
*
*/
typedef enum MIBSPI_DataShiftFmt_e
/*!
* @brief
- * Definitions for SPI loopback modes.
+ * Definitions for MIBSPI loopback modes.
*
- * \ingroup SPI_DRIVER_EXTERNAL_DATA_STRUCTURE
+ * @ingroup MIBSPI_DRIVER_EXTERNAL_DATA_STRUCTURE
*
*/
typedef enum MibSpi_LoopBackType_e
/*!
* @brief Status codes that are set by the SPI driver.
+ * @ingroup MIBSPI_DRIVER_EXTERNAL_DATA_STRUCTURE
*/
typedef enum MIBSPI_Status_s {
MIBSPI_TRANSFER_COMPLETED = 0,
/*!
* @brief
* Definitions for various SPI modes of operation.
+ * @ingroup MIBSPI_DRIVER_EXTERNAL_DATA_STRUCTURE
*/
typedef enum MIBSPI_Mode_s {
MIBSPI_MASTER = 0, /*!< SPI in master mode */
/*!
* @brief
* Definitions for various SPI data frame formats.
+ * @ingroup MIBSPI_DRIVER_EXTERNAL_DATA_STRUCTURE
*/
typedef enum MIBSPI_FrameFormat_s {
MIBSPI_POL0_PHA0 = 0, /*!< SPI mode Polarity 0 Phase 0 */
/*!
* @brief
*
- * SPI transfer mode determines the whether the SPI controller operates
- * synchronously or asynchronously. In ::SPI_MODE_BLOCKING mode SPI_transfer()
- * blocks code execution until the SPI transaction has completed. In
- * ::SPI_MODE_CALLBACK SPI_transfer() does not block code execution and instead
- * calls a ::SPI_CallbackFxn callback function when the transaction has
+ * MIBSPI transfer mode determines the whether the MIBSPI controller operates
+ * synchronously or asynchronously. In ::MIBSPI_MODE_BLOCKING mode MIBSPI_transfer()
+ * blocks code execution until the MIBSPI transaction has completed. In
+ * ::MIBSPI_MODE_CALLBACK MIBSPI_transfer() does not block code execution and instead
+ * calls a ::MIBSPI_CallbackFxn callback function when the transaction has
* completed.
+ * @ingroup MIBSPI_DRIVER_EXTERNAL_DATA_STRUCTURE
*/
typedef enum MIBSPI_TransferMode_s {
/*!
*/
MIBSPI_MODE_BLOCKING,
/*!
- * SPI_transfer() does not block code execution and will call a
- * ::SPI_CallbackFxn. This mode can be used in a Task, Swi, or Hwi context.
+ * MIBSPI_transfer() does not block code execution and will call a
+ * ::MIBSPI_CallbackFxn. This mode can be used in a Task, Swi, or Hwi context.
*/
MIBSPI_MODE_CALLBACK
} MIBSPI_TransferMode;
/*!
- * \brief MIBSPI info/debug print function prototype
+ * @brief MIBSPI info/debug print function prototype
+ * @ingroup MIBSPI_DRIVER_EXTERNAL_DATA_STRUCTURE
*
* This function is used by the driver to print info/debug messages.
*
- * \param str [OUT] Info string to print
+ * @param str [OUT] Info string to print
*/
typedef int (*Mibspi_PrintFxnCb)(const char *str, ...);
/*!
- * \brief MIBSPI log trace function prototype
+ * @brief MIBSPI log trace function prototype
*
* This function is used by the driver to trace log messages.
*
- * \param str [OUT] Info string to print
+ * @ingroup MIBSPI_DRIVER_EXTERNAL_DATA_STRUCTURE
+ * @param str [OUT] Info string to print
*/
typedef int (*Mibspi_TraceFxnCb)(const char *str, ...);
/*!
- * \brief MIBSPI virtual-to-physical address translation callback function.
+ * @brief MIBSPI virtual-to-physical address translation callback function.
*
* This function is used by the driver to convert virtual address to physical
* address.
*
- * \param virtAddr [IN] Virtual address
- * \param chNum [IN] Channel number passed during channel open
- * \param appData [IN] Callback pointer passed during channel open
+ * @ingroup MIBSPI_DRIVER_EXTERNAL_DATA_STRUCTURE
*
- * \return Corresponding physical address
+ * @param virtAddr [IN] Virtual address
+ * @param chNum [IN] Channel number passed during channel open
+ * @param appData [IN] Callback pointer passed during channel open
+ *
+ * @return Corresponding physical address
*/
typedef uint32_t (*Mibspi_VirtToPhyFxn)(const void *virtAddr);
/*!
- * \brief MIBSPI utils parameters
+ * @brief MIBSPI utils parameters
+ *
+ * Data sturcture used to configure the application callback for utility
+ * services used by the driver
+ *
+ * @ingroup MIBSPI_DRIVER_EXTERNAL_DATA_STRUCTURE
*/
typedef struct
{
/*!
* @brief
- * A ::MIBSPI_Transaction data structure is used with SPI_transfer(). It indicates
+ * A ::MIBSPI_Transaction data structure is used with MIBSPI_transfer(). It indicates
* how many ::MIBSPI_FrameFormat frames are sent and received from the buffers
* pointed to txBuf and rxBuf.
*
- * \ingroup SPI_DRIVER_EXTERNAL_DATA_STRUCTURE
+ * @ingroup MIBSPI_DRIVER_EXTERNAL_DATA_STRUCTURE
*
*/
typedef struct MIBSPI_Transaction_t
void *rxBuf; /*!< void * to a buffer to receive data */
void *arg; /*!< Argument to be passed to the callback function */
- void *custom; /*!< Implementation specific argument passed to
- SPI_Transfer(). Refer the SPI_vX implementation
- documentation to see the specific use of this
- parameter. */
/* User output (read-only) fields */
MIBSPI_Status status; /*!< Status code set by SPI_transfer */
uint8_t slaveIndex; /*!< Index of the slave enabled for this transfer */
-
} MIBSPI_Transaction;
* @brief
* A ::MIBSPI_Stats data structure is used with SPI_getStats() to get driver statistics.
*
- * \ingroup SPI_DRIVER_EXTERNAL_DATA_STRUCTURE
+ * @ingroup MIBSPI_DRIVER_EXTERNAL_DATA_STRUCTURE
*
*/
typedef struct MIBSPI_Stats_t
/*!
- * @brief SPI slave profile Parameters
+ * @brief MIBSPI slave profile Parameters
*
- * When SPI is configured as master mode, it may connect to multiple slaves. This data structure captures
+ * When MIBSPI is configured as master mode, it may connect to multiple slaves. This data structure captures
* the the configurations for remote slaves.
*
- * \ingroup SPI_DRIVER_EXTERNAL_DATA_STRUCTURE
+ * @ingroup MIBSPI_DRIVER_EXTERNAL_DATA_STRUCTURE
*
*/
typedef struct MIBSPI_SlaveProfile_t
} MIBSPI_SlaveProfile;
/*!
- * @brief SPI master Parameters
+ * @brief MIBSPI master Parameters
*
- * SPI master Parameters are used with the SPI_open() call when mode is set to SPI_MASTER.
- * Default values for these parameters are set using SPI_Params_init().
+ * MIBSPI master Parameters are used with the MIBSPI_open() call when mode is set to SPI_MASTER.
+ * Default values for these parameters are set using MIBSPI_Params_init().
*
- * \ingroup SPI_DRIVER_EXTERNAL_DATA_STRUCTURE
+ * @ingroup MIBSPI_DRIVER_EXTERNAL_DATA_STRUCTURE
*
- * @sa SPI_Params_init()
+ * @sa MIBSPI_Params_init()
*/
typedef struct MIBSPI_MasterModeParams_t
{
} MIBSPI_MasterModeParams;
/*!
- * @brief SPI slave mode Parameters
+ * @brief MIBSPI slave mode Parameters
*
- * SPI slave Parameters are used with the SPI_open() call when mode is set to MIBSPI_SLAVE.
- * Default values for these parameters are set using SPI_Params_init().
+ * MIBSPI slave Parameters are used with the MIBSPI_open() call when mode is set to MIBSPI_SLAVE.
+ * Default values for these parameters are set using MIBSPI_Params_init().
*
- * \ingroup SPI_DRIVER_EXTERNAL_DATA_STRUCTURE
+ * @ingroup MIBSPI_DRIVER_EXTERNAL_DATA_STRUCTURE
*
- * @sa SPI_Params_init()
+ * @sa MIBSPI_Params_init()
*/
typedef struct MIBSPI_SlaveModeParams_t
{
/*!
* @brief The definition of a callback function used by the SPI driver
- * when used in ::SPI_MODE_CALLBACK
+ * when used in ::MIBSPI_MODE_CALLBACK
+ *
+ * @ingroup MIBSPI_DRIVER_EXTERNAL_DATA_STRUCTURE
*
* @param MIBSPI_Handle MIBSPI_Handle
* @param MIBSPI_Transaction* MIBSPI_Transaction*
* MIBSPI Parameters are used with the MIBSPI_open() call. Default values for
* these parameters are set using MIBSPI_Params_init().
*
- * \ingroup SPI_DRIVER_EXTERNAL_DATA_STRUCTURE
+ * @ingroup MIBSPI_DRIVER_EXTERNAL_DATA_STRUCTURE
*
- * @sa SPI_Params_init()
+ * @sa MIBSPI_Params_init()
*/
typedef struct MIBSPI_Params_t
{
MIBSPI_FrameFormat frameFormat; /*!< SPI frame format */
union
{
- MIBSPI_MasterModeParams masterParams; /*!< Configuration dedicated to master mode, refer to ::SPI_MasterModeParams_t */
+ MIBSPI_MasterModeParams masterParams; /*!< Configuration dedicated to master mode, refer to ::MIBSPI_MasterModeParams */
- MIBSPI_SlaveModeParams slaveParams; /*!< Configuration dedicated to slave mode, refer to ::SPI_SlaveModeParams_t */
+ MIBSPI_SlaveModeParams slaveParams; /*!< Configuration dedicated to slave mode, refer to ::MIBSPI_SlaveModeParams */
}u;
- MIBSPI_PinMode pinMode; /*!< Pin operation Mode, refer to ::SPI_PinMode_e */
-
- MIBSPI_DataShiftFmt shiftFormat; /*!< SPI Data shift format, refer to ::SPI_DataShiftFmt_e */
+ MIBSPI_PinMode pinMode; /*!< Pin operation Mode, refer to ::MIBSPI_PinMode */
+
+ MIBSPI_DataShiftFmt shiftFormat; /*!< SPI Data shift format, refer to ::MIBSPI_DataShiftFmt */
uint8_t dmaEnable; /*!< DMA mode enable. When Dma mode is disable, SPI driver
is operated in polling mode, there is while(1) loop waiting for
void *dmaHandle; /*!< DMA handle */
- /**
- * @brief Enable Compatibility mode operation of MIBSPI. MIBSPI RAM will be disabled
- */
- bool compatibilityMode;
- /**
- * @brief EDMA link channel id
- * Needs to be set only if compatibility mode is FALSE
- * The SPI requries an additional param to terminate Tx transfer.
- * This should be from the pool of free param sets
- * As EDMA driver currently does not support dynamic allocation of
- * params forced to statically configure this from application.
- * TODO: Remove this once edma driver supports allocation of paramId
- * similar to edma3 drv
- */
- uint16_t edmaLinkParamId; /*!< Link param id */
+ bool compatibilityMode; /*!< Enable Compatibility mode operation of MIBSPI. MIBSPI RAM will be disabled */
+
+ uint16_t edmaLinkParamId; /*!< Link param id.
+ * @brief EDMA link channel id
+ * Needs to be set only if compatibility mode is FALSE
+ * The MIBSPI requries an additional param to terminate Tx transfer.
+ * This should be from the pool of free param sets
+ * As EDMA driver currently does not support dynamic allocation of
+ * params forced to statically configure this from application.
+ * TODO: Remove this once edma driver supports allocation of paramId
+ * similar to edma3 drv
+ */
} MIBSPI_Params;
/*!
- * @brief This function initializes the MCSPI module.
+ * @brief This function initializes the MIBSPI module.
+ *
+ * @ingroup MIBSPI_DRIVER_EXTERNAL_FUNCTION
+ * @param pUtilsPrms Pointer to app callback functions for
+ * utility services used by the driver
*
- * @pre The SPI_config structure must exist and be persistent before this
- * function can be called. This function must also be called before
- * any other MIBSPI driver APIs. This function call does not modify any
- * peripheral registers.
*/
extern void MIBSPI_init(MIBSPI_UtilsPrms *pUtilsPrms);
/*!
* @brief Function to initialize the MIBSPI_Params struct to its defaults
*
+ * @ingroup MIBSPI_DRIVER_EXTERNAL_FUNCTION
* @param params An pointer to MIBSPI_Params structure for
* initialization
*
* Defaults values are:
- * transferMode = SPI_MODE_BLOCKING
- * transferTimeout = SPI_WAIT_FOREVER
- * transferCallbackFxn = NULL
- * mode = SPI_MASTER
- * bitRate =
- * dataSize =
- * frameFormat =
+ * - mode = MIBSPI_SLAVE,
+ * - dataSize = 16U,
+ * - frameFormat = MIBSPI_POL0_PHA0,
+ * - transferMode = MIBSPI_MODE_BLOCKING,
+ * - transferTimeout = MIBSPI_WAIT_FOREVER,
+ * - transferCallbackFxn = NULL,
+ * - pinMode = MIBSPI_PINMODE_4PIN_CS,
+ * - shiftFormat = MIBSPI_MSB_FIRST,
+ * - dmaEnable = (uint8_t)1U,
+ * - eccEnable = (uint8_t)0U,
+ * - csHold = (uint8_t)0U,
+ * - txDummyValue = (uint16_t)0xFFFFU,
+ * - compatibilityMode = FALSE,
+ * - dmaHandle = NULL,
+ *
*/
extern void MIBSPI_Params_init(MIBSPI_Params *params);
/*!
- * @brief This function opens a given channel of a given MCSPI peripheral.
+ * @brief This function opens a given instance of the MIBSPI peripheral.
*
+ * @ingroup MIBSPI_DRIVER_EXTERNAL_FUNCTION
* @pre MIBSPI controller has been initialized using MIBSPI_init()
*
* @param mibspiInstanceId Id of the SPI instance.The SPI instances
- * available in an SOC are listed in the SOC specific SPI_soc.h
+ * available in an SOC are listed in the SOC specific MIBSPI_soc.h
* file
*
* @param params Pointer to an parameter block, if NULL it will use
* default values. All the fields in this structure are
* RO (read-only).
*
- * @return A MCSPI_Handle on success or a NULL on an error or if it has been
+ * @return A MIBSPI_Handle on success or a NULL on an error or if it has been
* opened already.
*
* @sa MIBSPI_init()
extern MIBSPI_Handle MIBSPI_open(enum MibSpi_InstanceId mibspiInstanceId, MIBSPI_Params *params);
/*!
- * @brief Function to close a channel of a SPI peripheral specified by the MIBSPI handle
+ * @brief Function to close a instance of a MIBSPI peripheral specified by the MIBSPI handle
*
+ * @ingroup MIBSPI_DRIVER_EXTERNAL_FUNCTION
* @pre MIBSPI_open() has to be called first.
*
- * @param handle A MCSPI handle returned from MCSPI_open()
+ * @param handle A MIBSPI handle returned from MIBSPI_open()
*
* @sa MIBSPI_open()
*/
extern void MIBSPI_close(MIBSPI_Handle handle);
/*!
- * @brief Function to perform SPI transactions on a channel of
- * a SPI peripheral specified by the MIBSPI handle.
+ * @brief Function to perform MIBSPI transactions on a instance of
+ * a MIBSPI peripheral specified by the MIBSPI handle for a specific slave.
*
- * If the MIBSPI is in ::SPI_MASTER mode, it will immediately start the
+ * @ingroup MIBSPI_DRIVER_EXTERNAL_FUNCTION
+ * If the MIBSPI is in ::MIBSPI_MASTER mode, it will immediately start the
* transaction. If the MIBSPI is in ::MIBSPI_SLAVE mode, it prepares itself for a
* transaction with a SPI master.
*
- * In ::SPI_MODE_BLOCKING, MIBSPI_transfer will block task execution until the
+ * In ::MIBSPI_MODE_BLOCKING, MIBSPI_transfer will block task execution until the
* transaction has completed.
*
- * In ::SPI_MODE_CALLBACK, MIBSPI_transfer() does not block task execution and
+ * In ::MIBSPI_MODE_CALLBACK, MIBSPI_transfer() does not block task execution and
* calls a ::MIBSPI_CallbackFxn. This makes the MIBSPI_tranfer() safe to be used
* within a Task, Swi, or Hwi context. The ::MIBSPI_Transaction structure must
- * stay persistent until the MCSPI_transfer function has completed!
+ * stay persistent until the MIBSPI_transfer function has completed!
*
* @param handle A MIBSPI_Handle
*
extern bool MIBSPI_transfer(MIBSPI_Handle handle, MIBSPI_Transaction *spiTrans);
/*!
- * @brief Function to cancel SPI transactions on channel of a
- * SPI peripheral specified by the SPI handle.
+ * @brief Function to cancel MIBSPI transactions on instance of a
+ * MIBSPI peripheral specified by the MIBSPI handle.
*
- * In ::SPI_MODE_BLOCKING, SPI_transferCancel has no effect.
+ * @ingroup MIBSPI_DRIVER_EXTERNAL_FUNCTION
*
- * In ::SPI_MODE_CALLBACK, SPI_transferCancel() will stop an SPI transfer if
+ * In ::MIBSPI_MODE_BLOCKING, MIBSPI_transferCancel has no effect.
+ *
+ * In ::MIBSPI_MODE_CALLBACK, MIBSPI_transferCancel() will stop an SPI transfer if
* if one is in progress.
* If a transaction was in progress, its callback function will be called
- * in context from which this API is called from. The ::SPI_CallbackFxn
+ * in context from which this API is called from. The ::MIBSPI_CallbackFxn
* function can determine if the transaction was successful or not by reading
* the ::MIBSPI_Status status value in the ::MIBSPI_Transaction structure.
*
/*!
* @brief Function performs implementation specific features
- * of a SPI peripheral specified by the SPI handle.
+ * of a MIBSPI peripheral specified by the MIBSPI handle.
+ *
+ * @ingroup MIBSPI_DRIVER_EXTERNAL_FUNCTION
*
* @pre MIBSPI_open() has to be called first.
*
- * @param handle A SPI handle returned from MIBSPI_open()
+ * @param handle A MIBSPI handle returned from MIBSPI_open()
*
* @param cmd A command value defined by the driver specific
* implementation
/*!
* @brief Function to get driver statistics
*
+ * @ingroup MIBSPI_DRIVER_EXTERNAL_FUNCTION
*
* @param handle A MIBSPI_Handle
+ * @param ptrStats Stats structure to be populated by driver
*
* @sa MIBSPI_open
* @sa MIBSPI_transfer
}
#endif
-#endif /* _MCSPI_H */
+#endif /* _MIBSPI_H */
/* @} */
index c27e67dfd70374b7b1e574b8698ca44550e7391c..d323e1f90b35368de14c292eb89349822024c404 100644 (file)
-/**
- * \ingroup DRV_MIBSPI_MODULE
- * \defgroup DRV_MIBSPI_SOC_MODULE SOC APIS
- * Multi-Channel MIBSPI driver interface
- * @{
- */
-
-/**
- * @file MIBSPI_soc.h
- *
- * @brief MIBSPI SoC level driver
- */
/*
* Copyright (c) 2015-2020, Texas Instruments Incorporated
* All rights reserved.
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
+/**
+ * @defgroup DRV_MIBSPI_SOC_MODULE MIBSPI SOC specific interface
+ * @ingroup DRV_MIBSPI_MODULE
+ *
+ * @brief
+ * The section has a SoC specific interface definitions for the MIBSPI driver
+
+ * @{
+ */
+
+/**
+ * @file mibspi/soc/MIBSPI_soc.h
+ *
+ * @brief MIBSPI LLD SoC specific file
+ */
+
#ifndef MIBSPI_SOC_H
#define MIBSPI_SOC_H
extern "C" {
#endif
- /* SPI SoC level API */
-
-#if defined(SOC_TPR12)
+/*!
+ * @brief Get the SoC specific configuration for MIBSPI instance
+ *
+ * @ingroup DRV_MIBSPI_SOC_MODULE
+ * @param id MIBSPI instance id
+ * @param cfg MIBSPI SoC configuration to be populated
+ *
+ */
int32_t MIBSPI_socGetInitCfg(enum MibSpi_InstanceId id, MibSpi_HwCfg *cfg);
-#endif
-
-#define MIBSPI_MODULE_CLOCK_DIVIDER (6U)
#ifdef __cplusplus
}
#endif
#endif /* SPI_SOC_H */
+/* @} */
+
index df00965e1d0e120a1fc89864aaa6aef6ee3c6983..a67c764d269b04707d1963726b2bd8655a4e51f8 100644 (file)
/** ============================================================================
* @file MIBSPI_v0.h
*
- * @brief MIBSPI driver implementation for a TPR12 MIBSPI controller.
- *
- * The MIBSPI header file should be included in an application as follows:
- * @code
- * #include <ti/drv/mibspi/MIBSPI.h>
- * #include <ti/drv/mibspi/soc/MIBSPI_v0.h>
- * @endcode
- *
- * This MIBSPI driver implementation is designed to operate on a TPR12 MIBSPI
- *
- * ## MIBSPI data frames #
- *
- * MIBSPI data frames can be any size from 2-bits to 16-bits. If the dataSize in
- * ::MIBSPI_Params is greater that 8-bits, then the MIBSPI_v1 driver
- * implementation will assume that the ::MIBSPI_Transaction txBuf and rxBuf
- * point to an array of 16-bit uint16_t elements.
- *
- * dataSize | buffer element size |
- * -------- | ------------------- |
- * 2-8 bits | uint8_t |
- * 9-16 bits | uint16_t |
+ * @brief MIBSPI driver SoC specific interface.
*
* ============================================================================
*/
#include <ti/csl/src/ip/mcspi/V1/spi.h>
+/**
+@defgroup MIBSPI_DRIVER_INTERNAL_FUNCTION MIBSPI Driver Internal Functions
+@ingroup DRV_MIBSPI_MODULE
+@brief
+* The section has a list of all internal API which are not exposed to the external
+* applications.
+*/
+/**
+@defgroup MIBSPI_DRIVER_INTERNAL_DATA_STRUCTURE MIBSPI Driver Internal Data Structures
+@ingroup DRV_MIBSPI_MODULE
+@brief
+* The section has a list of all internal data structures which are used internally
+* by the MIBSPI module.
+*/
+
+/**
+ * @ingroup MIBSPI_DRIVER_EXTERNAL_DATA_STRUCTURE
+ * @{
+ */
/*!
* @brief Maximum element in MibSPI RAM.
*/
#define MIBSPI_MAX_CS MIBSPI_SLAVE_MAX
-/**
- * @brief
- * CS configuration value when none of the CS is activated
- */
-#define MIBSPI_CS_NONE 0xFFU
-
/**
* @brief
* Max number of transport group
/**
- * @defgroup MIBSPI_FEATURE defines
- * MIBSPI_FEATURE_* macros indicate presence of a particular features in
- * SPI instance on the given SoC.
+ * @brief
+ * CS configuration value when none of the CS is activated
+ */
+#define MIBSPI_CS_NONE 0xFFU
+
+/** @} */
+
+/**
+ * @defgroup MIBSPI_FEATURE MIBSPI Feature defines
+ * @ingroup MIBSPI_DRIVER_INTERNAL_DATA_STRUCTURE
+ * @brief MIBSPI_FEATURE_* macros indicate presence of a particular features in
+ * SPI instance on the given SoC. Used internally in driver
* @{
*/
/**
/**
* @brief
- * MIBSPI Driver DMA request line configuration
+ * MIBSPI Driver DMA request line tie up for the SoC
*
* @details
* The structure is used to store the hardware specific configuration for DMA request lines.
*
- * \ingroup MIBSPI_DRIVER_INTERNAL_DATA_STRUCTURE
+ * @ingroup DRV_MIBSPI_SOC_MODULE
*
*/
typedef struct MibSpi_DMAReqlineCfg_t
*
* @details
* The structure is used to store the hardware version info expected in the
- * MIBSPIREV register
+ * MIBSPIREV register. This is used internally in driver to sanity check the
+ * register base address and SPI clock is enabled
*
- * \ingroup MIBSPI_DRIVER_INTERNAL_DATA_STRUCTURE
+ * @ingroup MIBSPI_DRIVER_INTERNAL_DATA_STRUCTURE
*
*/
typedef struct MibSpi_VersionInfo_t
* The structure is used to store the hardware specific configuration which is
* passed to MIBSPI driver instance
*
- * \ingroup MIBSPI_DRIVER_INTERNAL_DATA_STRUCTURE
+ * @ingroup DRV_MIBSPI_SOC_MODULE
*
*/
typedef struct MibSpi_HwCfg_t
MibSpi_VersionInfo versionInfo;
} MibSpi_HwCfg;
+/**
+ * @brief
+ * MIBSPI Driver HW configuration
+ *
+ * @ingroup DRV_MIBSPI_SOC_MODULE
+ *
+ */
typedef MibSpi_HwCfg MIBSPI_v0_HWAttrs;
+
+/**
+ * @brief
+ * MIBSPI Driver DMA module Address info definition
+ *
+ * Data structure used to exchange address info between the MIBSPI driver and
+ * the SoC specific DMA engine implementation
+ *
+ * @ingroup MIBSPI_DRIVER_INTERNAL_DATA_STRUCTURE
+ *
+ */
typedef struct MibSpi_dmaXferAddrInfo_s
{
- uintptr_t saddr;
- uintptr_t daddr;
+ uintptr_t saddr; /* Source address of transfer. Used by DMA engine so should be SoC system address */
+ uintptr_t daddr; /* Destination address of transfer. Used by DMA engine so should be SoC system address */
} MibSpi_dmaXferAddrInfo_t;
+/**
+ * @brief
+ * MIBSPI Driver DMA module Transfer size definition
+ *
+ * Data structure used to exchange size of transaction between the MIBSPI driver and
+ * the SoC specific DMA engine implementation
+ *
+ * @ingroup MIBSPI_DRIVER_INTERNAL_DATA_STRUCTURE
+ *
+ */
typedef struct MibSpi_dmaXferSizeInfo_s
{
- uint16_t elemSize;
- uint16_t elemCnt;
- uint16_t frameCnt;
+ uint16_t elemSize; /* Element Size of transfer in bytes */
+ uint16_t elemCnt; /* Number of elements */
+ uint16_t frameCnt; /* Number of frames of elemCnt */
} MibSpi_dmaXferSizeInfo_t;
+
+/**
+ * @brief
+ * MIBSPI Driver DMA module Transfer Info definition
+ *
+ * Data structure used to exchange transaction info between the MIBSPI driver and
+ * the SoC specific DMA engine implementation
+ *
+ * @ingroup MIBSPI_DRIVER_INTERNAL_DATA_STRUCTURE
+ *
+ */
typedef struct MibSpi_dmaXferInfo_s
{
- MibSpi_dmaXferAddrInfo_t tx;
- MibSpi_dmaXferAddrInfo_t rx;
- MibSpi_dmaXferSizeInfo_t size;
- uint32_t dmaReqLine;
+ MibSpi_dmaXferAddrInfo_t tx; /* Transation Transmit info */
+ MibSpi_dmaXferAddrInfo_t rx; /* Transation Receive info */
+ MibSpi_dmaXferSizeInfo_t size; /* Transation size info */
+ uint32_t dmaReqLine; /* DMA request line to be used for the transaction */
} MibSpi_dmaXferInfo_t;
/*!
- * @brief MIBSPI Global configuration
- *
- * The MIBSPI_Config structure contains a set of pointers used to characterize
- * the SPI driver implementation.
+ * @brief MIBSPI Instance configuration
*
- * This structure needs to be defined before calling SPI_init() and it must
- * not be changed thereafter.
+ * @ingroup MIBSPI_DRIVER_EXTERNAL_DATA_STRUCTURE
+ * The MIBSPI_Config structure contains a set of pointers to MIBSPI instance
+ * object and the SoC info associated with the specific MIBSPI instance
*
- * @sa MIBSPI_init()
*/
typedef struct MIBSPI_Config_s {
/*! Pointer to a driver specific data object */
/*!
* @brief A handle that is returned from a SPI_open() call.
+ * @ingroup MIBSPI_DRIVER_EXTERNAL_DATA_STRUCTURE
*/
typedef struct MIBSPI_Config_s *MIBSPI_Handle;
+/** @defgroup MIBSPI_DMAIF_FUNCTIONS MIBSPI DMA interface functions
+ * @ingroup MIBSPI_DRIVER_INTERNAL_FUNCTION
+ *
+ * @brief
+ * Functions internally invoked by driver to interface with the SoC DMA engine
+
+ @{ */
+/*!
+ * @brief Function to configure DMA channel pair for the specified DMA line
+ *
+ * Function invoked during MIBSPI_open inside the driver to configure the
+ * Tx and Rx DMA channel connected to the specified DMA request line
+ *
+ * @param handle A MIBSPI_Handle
+ * @param dmaReqLine DMA request line
+ *
+ */
int32_t MIBSPI_dmaConfig(MIBSPI_Handle handle, uint32_t dmaReqLine);
+
+/*!
+ * @brief Function to configure the DMA transfer for the specified transaction
+ *
+ * Function invoked during MIBSPI_transfer inside the driver to configure the
+ * Tx and Rx DMA for the transaction
+ *
+ * @param handle A MIBSPI_Handle
+ * @param xferInfo Tx and Rx Transaction transfer info
+ *
+ */
int32_t MIBSPI_dmaTransfer(MIBSPI_Handle handle, MibSpi_dmaXferInfo_t *xferInfo);
-int32_t MIBSPI_dmaFreeChannel(const MIBSPI_Handle handle, uint32_t dmaReqLine);
+
+/*!
+ * @brief Function to trigger previously configured DMA channels.
+ *
+ * Function invoked during MIBSPI_transfer inside the driver to trigger the
+ * Tx and Rx DMA for the transaction
+ *
+ * @param handle A MIBSPI_Handle
+ * @param dmaReqLine DMA request line
+ *
+ */
int32_t MIBSPI_dmaStartTransfer(MIBSPI_Handle handle, uint32_t dmaReqLine);
+
+/*!
+ * @brief Function invoked by the SoC DMA implementation to the driver on
+ * DMA transfer completion
+ *
+ * @param mibspiHandle A MIBSPI_Handle
+ *
+ */
void MIBSPI_dmaDoneCb(MIBSPI_Handle mibspiHandle);
+
+/*!
+ * @brief Function to free the DMA channels pair for the specified DMA line
+ *
+ * Function invoked during MIBSPI_close inside the driver to uninitialize the
+ * Tx and Rx DMA channels associated with the DMA request line
+ *
+ * @param handle A MIBSPI_Handle
+ * @param dmaReqLine DMA request line
+ *
+ */
+int32_t MIBSPI_dmaFreeChannel(const MIBSPI_Handle handle, uint32_t dmaReqLine);
+
+/** @}*/
+
#ifdef __cplusplus
}
#endif
diff --git a/packages/ti/drv/mibspi/soc/tpr12/MIBSPI_soc.h b/packages/ti/drv/mibspi/soc/tpr12/MIBSPI_soc.h
index 634f0de9bc5e90633e02fcd9beeb495c5d153102..93a08b4901ca01f282e7f1836448a0ea7134445c 100644 (file)
-/**
- * \ingroup DRV_MIBSPI_MODULE
- * \defgroup DRV_MIBSPI_SOC_MODULE SOC APIS
- * Multi-Channel MIBSPI driver interface
- * @{
- */
-
-/**
- * @file MIBSPI_soc.h
- *
- * @brief MIBSPI SoC level driver for TPR12
- */
/*
* Copyright (c) 2015-2020, Texas Instruments Incorporated
* All rights reserved.
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
+/**
+ * \ingroup DRV_MIBSPI_SOC_MODULE
+ *
+ * @{
+ */
+
+/**
+ * @file mibspi/soc/tpr12/MIBSPI_soc.h
+ *
+ * @brief MIBSPI driver TPR12 specific interface
+ */
+
#ifndef MIBSPI_SOC_TPR12_H
#define MIBSPI_SOC_TPR12_H
extern "C" {
#endif
+/*!
+ * @brief
+ * Definitions for MIBSPI instances available on TPR12 SoC
+ *
+ * @ingroup MIBSPI_DRIVER_EXTERNAL_DATA_STRUCTURE
+ *
+ */
enum MibSpi_InstanceId
{
MIBSPI_INST_ID_MSS_SPIA = 0xA,
#endif
#endif /* MIBSPI_SOC_H */
+
+/* @} */
+