sbl: add to PDK
authorJacob Stiffler <j-stiffler@ti.com>
Fri, 1 Nov 2019 18:54:21 +0000 (14:54 -0400)
committerJacob Stiffler <j-stiffler@ti.com>
Fri, 1 Nov 2019 18:54:21 +0000 (14:54 -0400)
Development of sbl has been relocated here from:
* Repo: https://git.ti.com/keystone-rtos/sbl
* Branch: master
* Commit ID: 349ccde27749abfa3bae3ac561a391891eb457ac

Signed-off-by: Jacob Stiffler <j-stiffler@ti.com>
350 files changed:
packages/ti/boot/sbl/.gitignore [new file with mode: 0644]
packages/ti/boot/sbl/board/evmAM572x/build/linker.cmd [new file with mode: 0644]
packages/ti/boot/sbl/board/evmAM572x/build/makefile [new file with mode: 0644]
packages/ti/boot/sbl/board/evmAM572x/sbl_main.c [new file with mode: 0644]
packages/ti/boot/sbl/board/evmK2E/build/makefile [new file with mode: 0644]
packages/ti/boot/sbl/board/evmK2E/sbl_main.c [new file with mode: 0644]
packages/ti/boot/sbl/board/evmK2G/build/makefile [new file with mode: 0644]
packages/ti/boot/sbl/board/evmK2G/build/sbl.rmd [new file with mode: 0644]
packages/ti/boot/sbl/board/evmK2G/build/sbl_hs.rmd [new file with mode: 0644]
packages/ti/boot/sbl/board/evmK2G/sbl_main.c [new file with mode: 0644]
packages/ti/boot/sbl/board/evmK2H/build/makefile [new file with mode: 0644]
packages/ti/boot/sbl/board/evmK2H/sbl_main.c [new file with mode: 0644]
packages/ti/boot/sbl/board/evmK2K/build/makefile [new file with mode: 0644]
packages/ti/boot/sbl/board/evmK2K/sbl_main.c [new file with mode: 0644]
packages/ti/boot/sbl/board/evmK2L/build/makefile [new file with mode: 0644]
packages/ti/boot/sbl/board/evmK2L/sbl_main.c [new file with mode: 0644]
packages/ti/boot/sbl/board/evmOMAPL137/build/makefile [new file with mode: 0644]
packages/ti/boot/sbl/board/evmOMAPL137/sbl_main.c [new file with mode: 0644]
packages/ti/boot/sbl/board/iceK2G/build/makefile [new file with mode: 0644]
packages/ti/boot/sbl/board/iceK2G/build/sbl.rmd [new file with mode: 0644]
packages/ti/boot/sbl/board/iceK2G/sbl_main.c [new file with mode: 0644]
packages/ti/boot/sbl/board/idkAM571x/build/linker.cmd [new file with mode: 0644]
packages/ti/boot/sbl/board/idkAM571x/build/makefile [new file with mode: 0644]
packages/ti/boot/sbl/board/idkAM571x/sbl_main.c [new file with mode: 0644]
packages/ti/boot/sbl/board/idkAM572x/build/linker.cmd [new file with mode: 0644]
packages/ti/boot/sbl/board/idkAM572x/build/makefile [new file with mode: 0644]
packages/ti/boot/sbl/board/idkAM572x/sbl_main.c [new file with mode: 0644]
packages/ti/boot/sbl/board/idkAM574x/build/linker.cmd [new file with mode: 0644]
packages/ti/boot/sbl/board/idkAM574x/build/makefile [new file with mode: 0644]
packages/ti/boot/sbl/board/idkAM574x/sbl_main.c [new file with mode: 0644]
packages/ti/boot/sbl/board/k3/sbl_main.c [new file with mode: 0644]
packages/ti/boot/sbl/board/k3/sbl_main.h [new file with mode: 0644]
packages/ti/boot/sbl/board/lcdkC6748/build/makefile [new file with mode: 0644]
packages/ti/boot/sbl/board/lcdkC6748/sbl_main.c [new file with mode: 0644]
packages/ti/boot/sbl/board/lcdkOMAPL138/build/makefile [new file with mode: 0644]
packages/ti/boot/sbl/board/lcdkOMAPL138/sbl_main.c [new file with mode: 0644]
packages/ti/boot/sbl/board/sbl_common_osal.c [new file with mode: 0644]
packages/ti/boot/sbl/board/src/sbl_avs_config.c [new file with mode: 0644]
packages/ti/boot/sbl/board/src/sbl_avs_config.h [new file with mode: 0644]
packages/ti/boot/sbl/board/src/sbl_image_copy.c [new file with mode: 0644]
packages/ti/boot/sbl/board/src/sbl_image_copy.h [new file with mode: 0644]
packages/ti/boot/sbl/build/makefile [new file with mode: 0644]
packages/ti/boot/sbl/build/sbl_am57xx.sh [new file with mode: 0755]
packages/ti/boot/sbl/build/sbl_am65xx.sh [new file with mode: 0755]
packages/ti/boot/sbl/build/sbl_boot_test.mk [new file with mode: 0644]
packages/ti/boot/sbl/build/sbl_c6748.sh [new file with mode: 0755]
packages/ti/boot/sbl/build/sbl_img.mk [new file with mode: 0755]
packages/ti/boot/sbl/build/sbl_k2e.sh [new file with mode: 0755]
packages/ti/boot/sbl/build/sbl_k2g.sh [new file with mode: 0755]
packages/ti/boot/sbl/build/sbl_k2hk.sh [new file with mode: 0755]
packages/ti/boot/sbl/build/sbl_k2l.sh [new file with mode: 0755]
packages/ti/boot/sbl/build/sbl_lib.mk [new file with mode: 0644]
packages/ti/boot/sbl/build/sbl_mcu0_boot_perf_test.mk [new file with mode: 0644]
packages/ti/boot/sbl/build/sbl_mcu0_boot_xip_entry.mk [new file with mode: 0644]
packages/ti/boot/sbl/build/sbl_mcu0_boot_xip_test.mk [new file with mode: 0644]
packages/ti/boot/sbl/build/sbl_multicore_amp.mk [new file with mode: 0644]
packages/ti/boot/sbl/build/sbl_multicore_smp.mk [new file with mode: 0644]
packages/ti/boot/sbl/build/sbl_omapl137.sh [new file with mode: 0755]
packages/ti/boot/sbl/build/sbl_omapl138.sh [new file with mode: 0755]
packages/ti/boot/sbl/build/sbl_smp_test.mk [new file with mode: 0644]
packages/ti/boot/sbl/example/dsp1MulticoreApp/lnk_dsp1.cmd [new file with mode: 0644]
packages/ti/boot/sbl/example/dsp1MulticoreApp/makefile [new file with mode: 0644]
packages/ti/boot/sbl/example/dsp1MulticoreApp/sbl_multicore_dsp1.c [new file with mode: 0644]
packages/ti/boot/sbl/example/dsp2MulticoreApp/lnk_dsp2.cmd [new file with mode: 0644]
packages/ti/boot/sbl/example/dsp2MulticoreApp/makefile [new file with mode: 0644]
packages/ti/boot/sbl/example/dsp2MulticoreApp/sbl_multicore_dsp2.c [new file with mode: 0644]
packages/ti/boot/sbl/example/ipu1MulticoreApp/lnk_cpu0.cmd [new file with mode: 0644]
packages/ti/boot/sbl/example/ipu1MulticoreApp/makefile [new file with mode: 0644]
packages/ti/boot/sbl/example/ipu1MulticoreApp/sbl_multicore_cpu0.c [new file with mode: 0644]
packages/ti/boot/sbl/example/ipu2MulticoreApp/lnk_cpu0.cmd [new file with mode: 0644]
packages/ti/boot/sbl/example/ipu2MulticoreApp/makefile [new file with mode: 0644]
packages/ti/boot/sbl/example/ipu2MulticoreApp/sbl_multicore_cpu0.c [new file with mode: 0644]
packages/ti/boot/sbl/example/k3MulticoreApp/mcu1_0_LockStepLinker.lds [new file with mode: 0644]
packages/ti/boot/sbl/example/k3MulticoreApp/mcu2_0_LockStepLinker.lds [new file with mode: 0644]
packages/ti/boot/sbl/example/k3MulticoreApp/mcu3_0_LockStepLinker.lds [new file with mode: 0644]
packages/ti/boot/sbl/example/k3MulticoreApp/mcuAmplinker.lds [new file with mode: 0755]
packages/ti/boot/sbl/example/k3MulticoreApp/mcuBootPerfLinker.lds [new file with mode: 0644]
packages/ti/boot/sbl/example/k3MulticoreApp/mcuXiplinker.lds [new file with mode: 0644]
packages/ti/boot/sbl/example/k3MulticoreApp/mpu1_0_Smplinker.lds [new file with mode: 0644]
packages/ti/boot/sbl/example/k3MulticoreApp/mpu2_0_Smplinker.lds [new file with mode: 0644]
packages/ti/boot/sbl/example/k3MulticoreApp/mpuAmplinker.lds [new file with mode: 0644]
packages/ti/boot/sbl/example/k3MulticoreApp/sbl_amp_multicore.c [new file with mode: 0644]
packages/ti/boot/sbl/example/k3MulticoreApp/sbl_amp_multicore_sections.h [new file with mode: 0644]
packages/ti/boot/sbl/example/k3MulticoreApp/sbl_boot_perf_benchmark.h [new file with mode: 0644]
packages/ti/boot/sbl/example/k3MulticoreApp/sbl_boot_perf_r5.asm [new file with mode: 0644]
packages/ti/boot/sbl/example/k3MulticoreApp/sbl_mcu_0_boot_perf_benchmark.c [new file with mode: 0644]
packages/ti/boot/sbl/example/k3MulticoreApp/sbl_multicore_a53.asm [new file with mode: 0644]
packages/ti/boot/sbl/example/k3MulticoreApp/sbl_multicore_r5.asm [new file with mode: 0644]
packages/ti/boot/sbl/example/k3MulticoreApp/sbl_multicore_r5_sections.inc [new file with mode: 0644]
packages/ti/boot/sbl/example/k3MulticoreApp/sbl_multicore_r5_xip.asm [new file with mode: 0644]
packages/ti/boot/sbl/example/k3MulticoreApp/sbl_printf.c [new file with mode: 0644]
packages/ti/boot/sbl/example/k3MulticoreApp/sbl_smp_multicore.c [new file with mode: 0644]
packages/ti/boot/sbl/example/k3MulticoreApp/sbl_smp_r5.asm [new file with mode: 0644]
packages/ti/boot/sbl/example/k3MulticoreApp/xip_entry.asm [new file with mode: 0644]
packages/ti/boot/sbl/example/k3MulticoreApp/xip_entry.lds [new file with mode: 0644]
packages/ti/boot/sbl/example/k3MulticoreApp/xip_stub.c [new file with mode: 0644]
packages/ti/boot/sbl/example/mpu1MulticoreApp/lnk_mpu.cmd [new file with mode: 0644]
packages/ti/boot/sbl/example/mpu1MulticoreApp/makefile [new file with mode: 0644]
packages/ti/boot/sbl/example/mpu1MulticoreApp/sbl_multicore_mpuCpu1.c [new file with mode: 0644]
packages/ti/boot/sbl/example/mpuM4EveLoaderApp/README.txt [new file with mode: 0644]
packages/ti/boot/sbl/example/mpuM4EveLoaderApp/eve1MulticoreApp/lnk_eve1.cmd [new file with mode: 0644]
packages/ti/boot/sbl/example/mpuM4EveLoaderApp/eve1MulticoreApp/makefile [new file with mode: 0644]
packages/ti/boot/sbl/example/mpuM4EveLoaderApp/eve1MulticoreApp/sbl_multicore_eve1.c [new file with mode: 0644]
packages/ti/boot/sbl/example/mpuM4EveLoaderApp/ipu1EveLoaderApp/eve_firmware.c [new file with mode: 0644]
packages/ti/boot/sbl/example/mpuM4EveLoaderApp/ipu1EveLoaderApp/lnk_cpu0.cmd [new file with mode: 0644]
packages/ti/boot/sbl/example/mpuM4EveLoaderApp/ipu1EveLoaderApp/makefile [new file with mode: 0644]
packages/ti/boot/sbl/example/mpuM4EveLoaderApp/ipu1EveLoaderApp/sbl_eveloader.h [new file with mode: 0644]
packages/ti/boot/sbl/example/mpuM4EveLoaderApp/ipu1EveLoaderApp/sbl_multicore_cpu0.c [new file with mode: 0644]
packages/ti/boot/sbl/example/mpuM4EveLoaderApp/makefile [new file with mode: 0644]
packages/ti/boot/sbl/example/mpuM4EveLoaderApp/mpuMulticoreApp/lnk_mpu.cmd [new file with mode: 0644]
packages/ti/boot/sbl/example/mpuM4EveLoaderApp/mpuMulticoreApp/makefile [new file with mode: 0644]
packages/ti/boot/sbl/example/mpuM4EveLoaderApp/mpuMulticoreApp/sbl_multicore_mpu.c [new file with mode: 0644]
packages/ti/boot/sbl/example/mpuMulticoreApp/lnk_mpu.cmd [new file with mode: 0644]
packages/ti/boot/sbl/example/mpuMulticoreApp/makefile [new file with mode: 0644]
packages/ti/boot/sbl/example/mpuMulticoreApp/sbl_multicore_mpu.c [new file with mode: 0644]
packages/ti/boot/sbl/makefile [new file with mode: 0644]
packages/ti/boot/sbl/sbl_component.mk [new file with mode: 0755]
packages/ti/boot/sbl/sbl_ver.h [new file with mode: 0644]
packages/ti/boot/sbl/soc/a15/sbl_a15.c [new file with mode: 0644]
packages/ti/boot/sbl/soc/a15/sbl_a15.h [new file with mode: 0644]
packages/ti/boot/sbl/soc/am57xx/linker.cmd [new file with mode: 0644]
packages/ti/boot/sbl/soc/am57xx/mailbox.c [new file with mode: 0644]
packages/ti/boot/sbl/soc/am57xx/mailbox.h [new file with mode: 0644]
packages/ti/boot/sbl/soc/am57xx/sbl_init.S [new file with mode: 0644]
packages/ti/boot/sbl/soc/am57xx/sbl_prcm.c [new file with mode: 0644]
packages/ti/boot/sbl/soc/am57xx/sbl_prcm.h [new file with mode: 0644]
packages/ti/boot/sbl/soc/am57xx/sbl_slave_core_boot.c [new file with mode: 0644]
packages/ti/boot/sbl/soc/am57xx/sbl_slave_core_boot.h [new file with mode: 0644]
packages/ti/boot/sbl/soc/am57xx/sbl_soc.c [new file with mode: 0644]
packages/ti/boot/sbl/soc/am57xx/sbl_startup.c [new file with mode: 0644]
packages/ti/boot/sbl/soc/am57xx/sbl_startup.h [new file with mode: 0644]
packages/ti/boot/sbl/soc/c6748/c6748.ini [new file with mode: 0644]
packages/ti/boot/sbl/soc/c6748/linker.cmd [new file with mode: 0644]
packages/ti/boot/sbl/soc/c6748/sbl_slave_boot.c [new file with mode: 0644]
packages/ti/boot/sbl/soc/c6748/sbl_slave_core_boot.h [new file with mode: 0644]
packages/ti/boot/sbl/soc/c6748/sbl_soc.c [new file with mode: 0644]
packages/ti/boot/sbl/soc/k2e/linker.cmd [new file with mode: 0644]
packages/ti/boot/sbl/soc/k2e/sbl_init.S [new file with mode: 0644]
packages/ti/boot/sbl/soc/k2e/sbl_slave_boot.c [new file with mode: 0644]
packages/ti/boot/sbl/soc/k2e/sbl_slave_core_boot.h [new file with mode: 0644]
packages/ti/boot/sbl/soc/k2e/sbl_soc.c [new file with mode: 0644]
packages/ti/boot/sbl/soc/k2g/linker.cmd [new file with mode: 0644]
packages/ti/boot/sbl/soc/k2g/sbl_init.S [new file with mode: 0644]
packages/ti/boot/sbl/soc/k2g/sbl_sec.c [new file with mode: 0644]
packages/ti/boot/sbl/soc/k2g/sbl_sec.h [new file with mode: 0644]
packages/ti/boot/sbl/soc/k2g/sbl_slave_boot.c [new file with mode: 0644]
packages/ti/boot/sbl/soc/k2g/sbl_slave_core_boot.h [new file with mode: 0644]
packages/ti/boot/sbl/soc/k2g/sbl_soc.c [new file with mode: 0644]
packages/ti/boot/sbl/soc/k2g/writer_linker.cmd [new file with mode: 0644]
packages/ti/boot/sbl/soc/k2h/linker.cmd [new file with mode: 0644]
packages/ti/boot/sbl/soc/k2h/sbl_init.S [new file with mode: 0644]
packages/ti/boot/sbl/soc/k2h/sbl_slave_boot.c [new file with mode: 0644]
packages/ti/boot/sbl/soc/k2h/sbl_slave_core_boot.h [new file with mode: 0644]
packages/ti/boot/sbl/soc/k2h/sbl_soc.c [new file with mode: 0644]
packages/ti/boot/sbl/soc/k2k/linker.cmd [new file with mode: 0644]
packages/ti/boot/sbl/soc/k2k/sbl_init.S [new file with mode: 0644]
packages/ti/boot/sbl/soc/k2k/sbl_slave_boot.c [new file with mode: 0644]
packages/ti/boot/sbl/soc/k2k/sbl_slave_core_boot.h [new file with mode: 0644]
packages/ti/boot/sbl/soc/k2k/sbl_soc.c [new file with mode: 0644]
packages/ti/boot/sbl/soc/k2l/linker.cmd [new file with mode: 0644]
packages/ti/boot/sbl/soc/k2l/sbl_init.S [new file with mode: 0644]
packages/ti/boot/sbl/soc/k2l/sbl_slave_boot.c [new file with mode: 0644]
packages/ti/boot/sbl/soc/k2l/sbl_slave_core_boot.h [new file with mode: 0644]
packages/ti/boot/sbl/soc/k2l/sbl_soc.c [new file with mode: 0644]
packages/ti/boot/sbl/soc/k3/linker.cmd [new file with mode: 0755]
packages/ti/boot/sbl/soc/k3/sbl_err_trap.h [new file with mode: 0644]
packages/ti/boot/sbl/soc/k3/sbl_init.asm [new file with mode: 0644]
packages/ti/boot/sbl/soc/k3/sbl_log.h [new file with mode: 0644]
packages/ti/boot/sbl/soc/k3/sbl_misc.asm [new file with mode: 0644]
packages/ti/boot/sbl/soc/k3/sbl_profile.h [new file with mode: 0644]
packages/ti/boot/sbl/soc/k3/sbl_sci_client.c [new file with mode: 0755]
packages/ti/boot/sbl/soc/k3/sbl_sci_client.h [new file with mode: 0755]
packages/ti/boot/sbl/soc/k3/sbl_slave_core_boot.c [new file with mode: 0644]
packages/ti/boot/sbl/soc/k3/sbl_slave_core_boot.h [new file with mode: 0755]
packages/ti/boot/sbl/soc/k3/sbl_soc.c [new file with mode: 0644]
packages/ti/boot/sbl/soc/k3/sbl_soc_cfg.h [new file with mode: 0755]
packages/ti/boot/sbl/soc/k3/sbl_typecast.h [new file with mode: 0644]
packages/ti/boot/sbl/soc/k3/sbl_vid_map.c [new file with mode: 0644]
packages/ti/boot/sbl/soc/omapl137/linker.cmd [new file with mode: 0644]
packages/ti/boot/sbl/soc/omapl137/omapl137.ini [new file with mode: 0644]
packages/ti/boot/sbl/soc/omapl137/sbl_slave_boot.c [new file with mode: 0644]
packages/ti/boot/sbl/soc/omapl137/sbl_slave_core_boot.h [new file with mode: 0644]
packages/ti/boot/sbl/soc/omapl137/sbl_soc.c [new file with mode: 0644]
packages/ti/boot/sbl/soc/omapl138/linker.cmd [new file with mode: 0644]
packages/ti/boot/sbl/soc/omapl138/omapl138.ini [new file with mode: 0644]
packages/ti/boot/sbl/soc/omapl138/sbl_slave_boot.c [new file with mode: 0644]
packages/ti/boot/sbl/soc/omapl138/sbl_slave_core_boot.h [new file with mode: 0644]
packages/ti/boot/sbl/soc/omapl138/sbl_soc.c [new file with mode: 0644]
packages/ti/boot/sbl/soc/sbl_soc.h [new file with mode: 0644]
packages/ti/boot/sbl/src/hyperflash/sbl_hyperflash.c [new file with mode: 0644]
packages/ti/boot/sbl/src/hyperflash/sbl_hyperflash.h [new file with mode: 0644]
packages/ti/boot/sbl/src/mmcsd/sbl_mmcsd.c [new file with mode: 0755]
packages/ti/boot/sbl/src/mmcsd/sbl_mmcsd.h [new file with mode: 0644]
packages/ti/boot/sbl/src/ospi/sbl_ospi.c [new file with mode: 0644]
packages/ti/boot/sbl/src/ospi/sbl_ospi.h [new file with mode: 0644]
packages/ti/boot/sbl/src/qspi/sbl_qspi.c [new file with mode: 0644]
packages/ti/boot/sbl/src/qspi/sbl_qspi.h [new file with mode: 0644]
packages/ti/boot/sbl/src/rprc/sbl_rprc.c [new file with mode: 0644]
packages/ti/boot/sbl/src/rprc/sbl_rprc.h [new file with mode: 0644]
packages/ti/boot/sbl/src/rprc/sbl_rprc_parse.h [new file with mode: 0644]
packages/ti/boot/sbl/src/sbl_eve/README.txt [new file with mode: 0644]
packages/ti/boot/sbl/src/sbl_eve/sbl_lib.h [new file with mode: 0644]
packages/ti/boot/sbl/src/sbl_eve/sbl_lib/src/am57xx/sbl_lib_config.h [new file with mode: 0644]
packages/ti/boot/sbl/src/sbl_eve/sbl_lib/src/am57xx/sbl_lib_platform.c [new file with mode: 0644]
packages/ti/boot/sbl/src/sbl_eve/sbl_lib/src/am57xx/sbl_lib_prcm_dpll.c [new file with mode: 0644]
packages/ti/boot/sbl/src/sbl_eve/sbl_lib/src/am57xx/sbl_lib_priv.h [new file with mode: 0644]
packages/ti/boot/sbl/src/sbl_eve/sbl_lib/src/makefile [new file with mode: 0644]
packages/ti/boot/sbl/src/sbl_eve/sbl_lib/src/sbl_lib_board.c [new file with mode: 0644]
packages/ti/boot/sbl/src/sbl_eve/sbl_lib/src/sbl_lib_common.c [new file with mode: 0644]
packages/ti/boot/sbl/src/sbl_eve/sbl_lib/src/sbl_lib_weak.c [new file with mode: 0644]
packages/ti/boot/sbl/src/sbl_eve/sbl_lib_am57xx.h [new file with mode: 0644]
packages/ti/boot/sbl/src/sbl_eve/sbl_lib_board.h [new file with mode: 0644]
packages/ti/boot/sbl/src/sbl_eve/sbl_lib_config.h [new file with mode: 0644]
packages/ti/boot/sbl/src/spi/sbl_spi.c [new file with mode: 0644]
packages/ti/boot/sbl/src/spi/sbl_spi.h [new file with mode: 0644]
packages/ti/boot/sbl/src/uart/sbl_uart.c [new file with mode: 0755]
packages/ti/boot/sbl/src/uart/sbl_uart.h [new file with mode: 0644]
packages/ti/boot/sbl/src/uart/sbl_xmodem.c [new file with mode: 0644]
packages/ti/boot/sbl/tools/btoccs/Makefile [new file with mode: 0644]
packages/ti/boot/sbl/tools/btoccs/b2ccs [new file with mode: 0755]
packages/ti/boot/sbl/tools/btoccs/b2ccs.c [new file with mode: 0644]
packages/ti/boot/sbl/tools/btoccs/b2ccs.exe [new file with mode: 0755]
packages/ti/boot/sbl/tools/btoccs/ccs2bin [new file with mode: 0755]
packages/ti/boot/sbl/tools/btoccs/ccs2bin.c [new file with mode: 0644]
packages/ti/boot/sbl/tools/btoccs/ccs2bin.exe [new file with mode: 0755]
packages/ti/boot/sbl/tools/byteswap/Makefile [new file with mode: 0644]
packages/ti/boot/sbl/tools/byteswap/byteswapccs [new file with mode: 0755]
packages/ti/boot/sbl/tools/byteswap/byteswapccs.c [new file with mode: 0644]
packages/ti/boot/sbl/tools/byteswap/byteswapccs.exe [new file with mode: 0755]
packages/ti/boot/sbl/tools/ccsutil/Makefile [new file with mode: 0644]
packages/ti/boot/sbl/tools/ccsutil/ccsAddGphdr [new file with mode: 0755]
packages/ti/boot/sbl/tools/ccsutil/ccsAddGphdr.c [new file with mode: 0644]
packages/ti/boot/sbl/tools/ccsutil/ccsAddGphdr.exe [new file with mode: 0755]
packages/ti/boot/sbl/tools/ccsutil/ccsAddGptlr [new file with mode: 0755]
packages/ti/boot/sbl/tools/ccsutil/ccsAddGptlr.c [new file with mode: 0644]
packages/ti/boot/sbl/tools/ccsutil/ccsAddGptlr.exe [new file with mode: 0755]
packages/ti/boot/sbl/tools/ccsutil/ccsutil.c [new file with mode: 0644]
packages/ti/boot/sbl/tools/ccsutil/ccsutil.h [new file with mode: 0644]
packages/ti/boot/sbl/tools/flashWriter/mmcsd/bin/lcdkC6748/config [new file with mode: 0644]
packages/ti/boot/sbl/tools/flashWriter/mmcsd/bin/lcdkOMAPL138/config [new file with mode: 0644]
packages/ti/boot/sbl/tools/flashWriter/mmcsd/src/c67x.cmd [new file with mode: 0644]
packages/ti/boot/sbl/tools/flashWriter/mmcsd/src/makefile [new file with mode: 0644]
packages/ti/boot/sbl/tools/flashWriter/mmcsd/src/sbl_mmcsd_writer.c [new file with mode: 0644]
packages/ti/boot/sbl/tools/flashWriter/qspi/config [new file with mode: 0644]
packages/ti/boot/sbl/tools/flashWriter/qspi/src/makefile [new file with mode: 0644]
packages/ti/boot/sbl/tools/flashWriter/qspi/src/sbl_qspi_writer.S [new file with mode: 0644]
packages/ti/boot/sbl/tools/flashWriter/qspi/src/sbl_qspi_writer.c [new file with mode: 0644]
packages/ti/boot/sbl/tools/flashWriter/spi/bin/evmK2E/config [new file with mode: 0644]
packages/ti/boot/sbl/tools/flashWriter/spi/bin/evmK2H/config [new file with mode: 0644]
packages/ti/boot/sbl/tools/flashWriter/spi/bin/evmK2L/config [new file with mode: 0644]
packages/ti/boot/sbl/tools/flashWriter/spi/bin/evmOMAPL137/config [new file with mode: 0644]
packages/ti/boot/sbl/tools/flashWriter/spi/src/c67x.cmd [new file with mode: 0644]
packages/ti/boot/sbl/tools/flashWriter/spi/src/c6x.cmd [new file with mode: 0644]
packages/ti/boot/sbl/tools/flashWriter/spi/src/makefile [new file with mode: 0644]
packages/ti/boot/sbl/tools/flashWriter/spi/src/sbl_spi_writer.c [new file with mode: 0644]
packages/ti/boot/sbl/tools/multicoreImageGen/bin/MulticoreImageGen [new file with mode: 0755]
packages/ti/boot/sbl/tools/multicoreImageGen/bin/MulticoreImageGen.exe [new file with mode: 0755]
packages/ti/boot/sbl/tools/multicoreImageGen/src/MulticoreImageGen.c [new file with mode: 0644]
packages/ti/boot/sbl/tools/omapl13x_boot_utils/Common/AIS/AIS.cs [new file with mode: 0644]
packages/ti/boot/sbl/tools/omapl13x_boot_utils/Common/AIS/AISGen.cs [new file with mode: 0644]
packages/ti/boot/sbl/tools/omapl13x_boot_utils/Common/AIS/AISParse.cs [new file with mode: 0644]
packages/ti/boot/sbl/tools/omapl13x_boot_utils/Common/AIS/HexAIS_version.cs [new file with mode: 0644]
packages/ti/boot/sbl/tools/omapl13x_boot_utils/Common/UtilLib/ASN1.cs [new file with mode: 0644]
packages/ti/boot/sbl/tools/omapl13x_boot_utils/Common/UtilLib/BinaryFile.cs [new file with mode: 0644]
packages/ti/boot/sbl/tools/omapl13x_boot_utils/Common/UtilLib/CRC.cs [new file with mode: 0644]
packages/ti/boot/sbl/tools/omapl13x_boot_utils/Common/UtilLib/CoffFile.cs [new file with mode: 0644]
packages/ti/boot/sbl/tools/omapl13x_boot_utils/Common/UtilLib/ConsoleUtility.cs [new file with mode: 0644]
packages/ti/boot/sbl/tools/omapl13x_boot_utils/Common/UtilLib/CryptoLoadMod.cs [new file with mode: 0644]
packages/ti/boot/sbl/tools/omapl13x_boot_utils/Common/UtilLib/CryptoUtility.cs [new file with mode: 0644]
packages/ti/boot/sbl/tools/omapl13x_boot_utils/Common/UtilLib/Debug.cs [new file with mode: 0644]
packages/ti/boot/sbl/tools/omapl13x_boot_utils/Common/UtilLib/ECC.cs [new file with mode: 0644]
packages/ti/boot/sbl/tools/omapl13x_boot_utils/Common/UtilLib/ElfFile.cs [new file with mode: 0644]
packages/ti/boot/sbl/tools/omapl13x_boot_utils/Common/UtilLib/EmbeddedFileIO.cs [new file with mode: 0644]
packages/ti/boot/sbl/tools/omapl13x_boot_utils/Common/UtilLib/Endian.cs [new file with mode: 0644]
packages/ti/boot/sbl/tools/omapl13x_boot_utils/Common/UtilLib/FileIO.cs [new file with mode: 0644]
packages/ti/boot/sbl/tools/omapl13x_boot_utils/Common/UtilLib/HexConv.cs [new file with mode: 0644]
packages/ti/boot/sbl/tools/omapl13x_boot_utils/Common/UtilLib/Ini.cs [new file with mode: 0644]
packages/ti/boot/sbl/tools/omapl13x_boot_utils/Common/UtilLib/ObjectFile.cs [new file with mode: 0644]
packages/ti/boot/sbl/tools/omapl13x_boot_utils/Common/UtilLib/SRecord.cs [new file with mode: 0644]
packages/ti/boot/sbl/tools/omapl13x_boot_utils/Common/UtilLib/SerialIO.cs [new file with mode: 0644]
packages/ti/boot/sbl/tools/omapl13x_boot_utils/Common/build.mak [new file with mode: 0644]
packages/ti/boot/sbl/tools/omapl13x_boot_utils/Common/include/tistdtypes.h [new file with mode: 0644]
packages/ti/boot/sbl/tools/omapl13x_boot_utils/Common/include/util.h [new file with mode: 0644]
packages/ti/boot/sbl/tools/omapl13x_boot_utils/Common/ti.ico [new file with mode: 0644]
packages/ti/boot/sbl/tools/omapl13x_boot_utils/OMAP-L137/Common/include/device.h [new file with mode: 0644]
packages/ti/boot/sbl/tools/omapl13x_boot_utils/OMAP-L137/Common/include/device_async_mem.h [new file with mode: 0644]
packages/ti/boot/sbl/tools/omapl13x_boot_utils/OMAP-L137/Common/include/device_nand.h [new file with mode: 0644]
packages/ti/boot/sbl/tools/omapl13x_boot_utils/OMAP-L137/Common/include/device_spi.h [new file with mode: 0644]
packages/ti/boot/sbl/tools/omapl13x_boot_utils/OMAP-L137/Common/include/device_uart.h [new file with mode: 0644]
packages/ti/boot/sbl/tools/omapl13x_boot_utils/OMAP-L137/Common/include/tps65023.h [new file with mode: 0644]
packages/ti/boot/sbl/tools/omapl13x_boot_utils/OMAP-L137/Common/src/device_name.cs [new file with mode: 0644]
packages/ti/boot/sbl/tools/omapl13x_boot_utils/OMAP-L137/GNU/AISUtils/AISextra/makefile [new file with mode: 0644]
packages/ti/boot/sbl/tools/omapl13x_boot_utils/OMAP-L137/GNU/AISUtils/AISextra/src/ARM_AISExtra.lds [new file with mode: 0644]
packages/ti/boot/sbl/tools/omapl13x_boot_utils/OMAP-L137/GNU/AISUtils/AISextra/src/DSP_AISExtra.cmd [new file with mode: 0644]
packages/ti/boot/sbl/tools/omapl13x_boot_utils/OMAP-L137/GNU/AISUtils/AISextra/src/aisextra.c [new file with mode: 0644]
packages/ti/boot/sbl/tools/omapl13x_boot_utils/OMAP-L137/GNU/AISUtils/AISextra/src/makefile [new file with mode: 0644]
packages/ti/boot/sbl/tools/omapl13x_boot_utils/OMAP-L137/GNU/AISUtils/HexAIS/HexAIS.cs [new file with mode: 0644]
packages/ti/boot/sbl/tools/omapl13x_boot_utils/OMAP-L137/GNU/AISUtils/HexAIS/makefile [new file with mode: 0644]
packages/ti/boot/sbl/tools/omapl13x_boot_utils/OMAP-L137/GNU/AISUtils/HexAIS_OMAP-L137.exe [new file with mode: 0755]
packages/ti/boot/sbl/tools/omapl13x_boot_utils/OMAP-L137/GNU/AISUtils/OMAP-L137-uart.ini [new file with mode: 0644]
packages/ti/boot/sbl/tools/omapl13x_boot_utils/OMAP-L137/GNU/AISUtils/OMAP-L137.ini [new file with mode: 0644]
packages/ti/boot/sbl/tools/omapl13x_boot_utils/OMAP-L137/GNU/AISUtils/makefile [new file with mode: 0644]
packages/ti/boot/sbl/tools/omapl13x_boot_utils/OMAP-L137/GNU/AISUtils/readme.txt [new file with mode: 0644]
packages/ti/boot/sbl/tools/omapl13x_boot_utils/OMAP-L137/GNU/Common/AISGenLib/AISGen_OMAP-L137.cs [new file with mode: 0644]
packages/ti/boot/sbl/tools/omapl13x_boot_utils/OMAP-L137/GNU/makefile [new file with mode: 0644]
packages/ti/boot/sbl/tools/omapl13x_boot_utils/OMAP-L137/device.mak [new file with mode: 0644]
packages/ti/boot/sbl/tools/omapl13x_boot_utils/OMAP-L137/makefile [new file with mode: 0644]
packages/ti/boot/sbl/tools/omapl13x_boot_utils/OMAP-L138/Common/include/device.h [new file with mode: 0644]
packages/ti/boot/sbl/tools/omapl13x_boot_utils/OMAP-L138/Common/include/device_async_mem.h [new file with mode: 0644]
packages/ti/boot/sbl/tools/omapl13x_boot_utils/OMAP-L138/Common/include/device_nand.h [new file with mode: 0644]
packages/ti/boot/sbl/tools/omapl13x_boot_utils/OMAP-L138/Common/include/device_sdmmc.h [new file with mode: 0644]
packages/ti/boot/sbl/tools/omapl13x_boot_utils/OMAP-L138/Common/include/device_spi.h [new file with mode: 0644]
packages/ti/boot/sbl/tools/omapl13x_boot_utils/OMAP-L138/Common/include/device_uart.h [new file with mode: 0644]
packages/ti/boot/sbl/tools/omapl13x_boot_utils/OMAP-L138/Common/include/tps65070.h [new file with mode: 0644]
packages/ti/boot/sbl/tools/omapl13x_boot_utils/OMAP-L138/Common/src/device_name.cs [new file with mode: 0644]
packages/ti/boot/sbl/tools/omapl13x_boot_utils/OMAP-L138/GNU/AISUtils/AISextra/makefile [new file with mode: 0644]
packages/ti/boot/sbl/tools/omapl13x_boot_utils/OMAP-L138/GNU/AISUtils/AISextra/src/ARM_AISExtra.lds [new file with mode: 0644]
packages/ti/boot/sbl/tools/omapl13x_boot_utils/OMAP-L138/GNU/AISUtils/AISextra/src/DSP_AISExtra.cmd [new file with mode: 0644]
packages/ti/boot/sbl/tools/omapl13x_boot_utils/OMAP-L138/GNU/AISUtils/AISextra/src/aisextra.c [new file with mode: 0644]
packages/ti/boot/sbl/tools/omapl13x_boot_utils/OMAP-L138/GNU/AISUtils/AISextra/src/makefile [new file with mode: 0644]
packages/ti/boot/sbl/tools/omapl13x_boot_utils/OMAP-L138/GNU/AISUtils/HexAIS/HexAIS.cs [new file with mode: 0644]
packages/ti/boot/sbl/tools/omapl13x_boot_utils/OMAP-L138/GNU/AISUtils/HexAIS/makefile [new file with mode: 0644]
packages/ti/boot/sbl/tools/omapl13x_boot_utils/OMAP-L138/GNU/AISUtils/HexAIS_OMAP-L138.exe [new file with mode: 0755]
packages/ti/boot/sbl/tools/omapl13x_boot_utils/OMAP-L138/GNU/AISUtils/NAND_ECC_Patch/makefile [new file with mode: 0644]
packages/ti/boot/sbl/tools/omapl13x_boot_utils/OMAP-L138/GNU/AISUtils/NAND_ECC_Patch/src/ARM.cmd [new file with mode: 0644]
packages/ti/boot/sbl/tools/omapl13x_boot_utils/OMAP-L138/GNU/AISUtils/NAND_ECC_Patch/src/ARM.lds [new file with mode: 0644]
packages/ti/boot/sbl/tools/omapl13x_boot_utils/OMAP-L138/GNU/AISUtils/NAND_ECC_Patch/src/DSP.cmd [new file with mode: 0644]
packages/ti/boot/sbl/tools/omapl13x_boot_utils/OMAP-L138/GNU/AISUtils/NAND_ECC_Patch/src/makefile [new file with mode: 0644]
packages/ti/boot/sbl/tools/omapl13x_boot_utils/OMAP-L138/GNU/AISUtils/NAND_ECC_Patch/src/nand_ecc_patch.c [new file with mode: 0644]
packages/ti/boot/sbl/tools/omapl13x_boot_utils/OMAP-L138/GNU/AISUtils/makefile [new file with mode: 0644]
packages/ti/boot/sbl/tools/omapl13x_boot_utils/OMAP-L138/GNU/AISUtils/readme.txt [new file with mode: 0644]
packages/ti/boot/sbl/tools/omapl13x_boot_utils/OMAP-L138/GNU/Common/AISGenLib/AISGen_OMAP-L138.cs [new file with mode: 0644]
packages/ti/boot/sbl/tools/omapl13x_boot_utils/OMAP-L138/GNU/makefile [new file with mode: 0644]
packages/ti/boot/sbl/tools/omapl13x_boot_utils/OMAP-L138/device.mak [new file with mode: 0644]
packages/ti/boot/sbl/tools/omapl13x_boot_utils/OMAP-L138/makefile [new file with mode: 0644]
packages/ti/boot/sbl/tools/omapl13x_boot_utils/omapl13x_boot_utils_manifest.html [new file with mode: 0644]
packages/ti/boot/sbl/tools/omapl13x_sd_card_format/create-sdcard-omapl13x.sh [new file with mode: 0755]
packages/ti/boot/sbl/tools/out2rprc/bin/out2rprc.exe [new file with mode: 0755]
packages/ti/boot/sbl/tools/scripts/AM57xImageGen.bat [new file with mode: 0755]
packages/ti/boot/sbl/tools/scripts/AM57xImageGen.sh [new file with mode: 0755]
packages/ti/boot/sbl/tools/scripts/K2GImageGen.bat [new file with mode: 0755]
packages/ti/boot/sbl/tools/scripts/K2GImageGen.sh [new file with mode: 0755]
packages/ti/boot/sbl/tools/scripts/K3ImageGen.bat [new file with mode: 0644]
packages/ti/boot/sbl/tools/scripts/K3ImageGen.sh [new file with mode: 0755]
packages/ti/boot/sbl/tools/scripts/OMAPL13xImageGen.bat [new file with mode: 0755]
packages/ti/boot/sbl/tools/scripts/OMAPL13xImageGen.sh [new file with mode: 0755]
packages/ti/boot/sbl/tools/tiImageGen/bin/tiimage [new file with mode: 0755]
packages/ti/boot/sbl/tools/tiImageGen/bin/tiimage.exe [new file with mode: 0755]
packages/ti/boot/sbl/tools/tiImageGen/makefile [new file with mode: 0644]
packages/ti/boot/sbl/tools/tiImageGen/src/tiimage.c [new file with mode: 0644]

diff --git a/packages/ti/boot/sbl/.gitignore b/packages/ti/boot/sbl/.gitignore
new file mode 100644 (file)
index 0000000..0538065
--- /dev/null
@@ -0,0 +1,2 @@
+lib/
+binary/
diff --git a/packages/ti/boot/sbl/board/evmAM572x/build/linker.cmd b/packages/ti/boot/sbl/board/evmAM572x/build/linker.cmd
new file mode 100644 (file)
index 0000000..c2b61fc
--- /dev/null
@@ -0,0 +1,114 @@
+/**
+ *  \file linker.cmd
+ *
+ *  \brief This file is the linker script for am5x required for building
+ *         SBL with the gcc toolchain.
+ *
+ */
+
+/*
+ * Copyright (C) 2015-2017 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ *
+ * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+MEMORY
+{
+    DDR0 :   o = 0x80000400,  l = (0x40000000 - 0x400) /* external DDR Bank 0 */
+    OCMC_RAM1 (RWIX): org = 0x40300000 ,  len = 0x0001FFFF  /* OCMCRAM1 region meant for IO delay relocation */
+    MMU_TABLE (RW): org = 0x40370000, len = 0x10000 /* OCMCRAM1 region meant to hold MMU table */
+    DSP1TRAMPOLINE (RWIX): org = 0x40330000, len = 0x800 /* Memory area reserved for DSP1 Trampoline */
+    DSP2TRAMPOLINE (RWIX): org = 0x40330800, len = 0x800 /* Memory area reserved for DSP2 Trampoline */
+    SBL_MEM  (RWIX): org = 0x40331000, len = 0x0003EFFF  /* OCMCRAM1 Region meant for SBL */
+    OCMC_RAM2 (RWIX): org = 0x40400000  , len = 0x00100000  /* OCMC RAM        */
+    OCMC_RAM3 (RWIX): org = 0x40500000 ,  len = 0x00100000  /* OCMC RAM        */
+}
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+
+SECTIONS
+{
+        .startcode :
+        {
+            . = ALIGN(4);
+            *(.public.*)
+            *sbl_init.ao (.text)
+        } >SBL_MEM
+
+        .text :
+        {
+            . = ALIGN(4);
+            *(.text*)
+            *(.rodata*)
+        } >SBL_MEM
+
+        .data :
+        {
+            . = ALIGN(4);
+            *(.data*)
+        } >SBL_MEM
+
+        .bss :
+        {
+            . = ALIGN(4);
+            _bss_start = .;
+            *(.bss*)
+            *(COMMON)
+            _bss_end = .;
+        } >SBL_MEM
+
+        .heap :
+        {
+            . = ALIGN(4);
+            __end__ = .;
+            end = __end__;
+            __HeapBase = __end__;
+            *(.heap*)
+            . = . + 0x400;
+            __HeapLimit = .;
+        } >SBL_MEM
+
+        .stack :
+        {
+            . = ALIGN(8);
+            __StackLimit = . ;
+            *(.stack*)
+            . = . + 0x10000;
+            __StackTop = .;
+        } >SBL_MEM
+        _stack = __StackTop;
+
+        SBL_MMU_TABLE :
+        {
+            *(SBL_MMU_TABLE*);
+        } > MMU_TABLE
+}
+
diff --git a/packages/ti/boot/sbl/board/evmAM572x/build/makefile b/packages/ti/boot/sbl/board/evmAM572x/build/makefile
new file mode 100644 (file)
index 0000000..8a13d35
--- /dev/null
@@ -0,0 +1,183 @@
+# Copyright (C) 2015-2016 Texas Instruments Incorporated - http://www.ti.com/
+#
+#
+#  Redistribution and use in source and binary forms, with or without
+#  modification, are permitted provided that the following conditions
+#  are met:
+#
+#    Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+#
+#    Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in the
+#    documentation and/or other materials provided with the
+#    distribution.
+#
+#    Neither the name of Texas Instruments Incorporated nor the names of
+#    its contributors may be used to endorse or promote products derived
+#    from this software without specific prior written permission.
+#
+#  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+#  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+#  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+#  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+#  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+#  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+#  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+#  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+#  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+#  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+#  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+#
+# Macro definitions referenced below
+#
+
+IMG_LOAD_ADDR = 0x40331000
+SBL_SRC_DIR ?= $(PDK_INSTALL_PATH)/ti/boot/sbl
+SBLOBJDIR = $(SBL_SRC_DIR)/binary/$(BOARD)/$(BOOTMODE)/obj
+SBLBINDIR = $(SBL_SRC_DIR)/binary/$(BOARD)/$(BOOTMODE)/bin
+ARMV7LIBDIR ?= ./lib
+BINFLAGS = -O binary
+
+#Cross tools
+ifdef TOOLCHAIN_PATH_A15
+# Support backwards compatibility with KeyStone1 approach
+ CC = $(TOOLCHAIN_PATH_A15)/bin/$(CROSS_TOOL_PRFX)gcc
+ AC = $(TOOLCHAIN_PATH_A15)/bin/$(CROSS_TOOL_PRFX)as
+ AR = $(TOOLCHAIN_PATH_A15)/bin/$(CROSS_TOOL_PRFX)ar
+ LD = $(TOOLCHAIN_PATH_A15)/bin/$(CROSS_TOOL_PRFX)gcc
+ BIN = $(TOOLCHAIN_PATH_A15)/bin/$(CROSS_TOOL_PRFX)objcopy
+endif
+
+# INCLUDE Directories
+CSL_DIR = $(PDK_INSTALL_PATH)/ti/csl
+BOARD_DIR = $(PDK_INSTALL_PATH)/ti/board
+SBL_INC_DIR = $(SBL_SRC_DIR)/board/src
+SBL_LIB_INC_DIR = $(SBL_SRC_DIR)/src/rprc
+SBL_SOC_DIR = $(SBL_SRC_DIR)/soc/am57xx
+
+# Libraries
+BOARD_LIB = "$(PDK_INSTALL_PATH)/ti/board/lib/$(BOARD)/a15/release/ti.board.aa15fg"
+UART_LIB = "$(PDK_INSTALL_PATH)/ti/drv/uart/lib/am572x/a15/release/ti.drv.uart.aa15fg"
+I2C_LIB = "$(PDK_INSTALL_PATH)/ti/drv/i2c/lib/am572x/a15/release/ti.drv.i2c.aa15fg"
+MMCSD_LIB = "$(PDK_INSTALL_PATH)/ti/drv/mmcsd/lib/am572x/a15/release/ti.drv.mmcsd.aa15fg"
+FATFS_LIB = "$(PDK_INSTALL_PATH)/ti/fs/fatfs/lib/a15/release/ti.fs.fatfs.aa15fg"
+CSL_LIB = "$(PDK_INSTALL_PATH)/ti/csl/lib/am572x/a15/release/ti.csl.aa15fg"
+CSL_INIT_LIB = "$(PDK_INSTALL_PATH)/ti/csl/lib/am572x/a15/release/ti.csl.init.aa15fg"
+OSAL_LIB = "$(PDK_INSTALL_PATH)/ti/osal/lib/nonos/am572x/a15/release/ti.osal.aa15fg"
+PM_HAL_LIB = "$(PDK_INSTALL_PATH)/ti/drv/pm/lib/am572x/a15/release/pm_hal.aa15fg"
+
+# BOOTMODE specific CFLAGS
+ifeq ($(BOOTMODE), mmcsd)
+  INTERNALDEFS += -DBOOT_MMCSD
+else ifeq ($(BOOTMODE), emmc)
+  INTERNALDEFS += -DBOOT_EMMC
+endif
+
+ifeq ($(BOOTMODE), $(filter $(BOOTMODE), mmcsd emmc))
+  SBL_MMCSD_DIR = $(SBL_SRC_DIR)/src/mmcsd
+  INCDIR := $(CSL_DIR);$(PDK_INSTALL_PATH);$(BOARD_DIR);$(SBL_INC_DIR);$(SBL_LIB_INC_DIR);$(SBL_MMCSD_DIR);$(SBL_SOC_DIR);$(SBL_SRC_DIR)/soc
+  PERIPHERAL_LIB = $(UART_LIB) $(I2C_LIB) $(MMCSD_LIB) $(FATFS_LIB) $(CSL_LIB) $(CSL_INIT_LIB) $(OSAL_LIB) $(PM_HAL_LIB)
+endif # ifeq ($(BOOTMODE), mmcsd)
+
+#Flags for opp_nom, opp_od and opp_high
+ifeq ($(OPPMODE),)
+       INTERNALDEFS += -DOPP_NOM
+else ifeq ($(OPPMODE),opp_nom)
+       INTERNALDEFS += -DOPP_NOM
+else ifeq ($(OPPMODE),opp_high)
+       INTERNALDEFS += -DOPP_HIGH
+else ifeq ($(OPPMODE),opp_od)
+       INTERNALDEFS += -DOPP_OD
+endif
+
+LIBDIR :=
+
+# Compiler options
+INTERNALDEFS += -g -gdwarf-3 -gstrict-dwarf -Wall $(DEBUG_FLAG) -D__ARMv7 -DSOC_$(SOC) -mtune=cortex-a15 -march=armv7-a -marm -mfloat-abi=hard -mfpu=neon -D$(SOC)_BUILD -D$(BOARD)
+
+# Linker options
+INTERNALLINKDEFS = -mfloat-abi=hard --specs=nano.specs -Wl,--undefined,__aeabi_uidiv -Wl,--undefined,__aeabi_idiv --entry Entry -nostartfiles -static -Wl,--gc-sections -Wl,-T $(SBL_SRC_DIR)/board/$(BOARD)/build/linker.cmd -Wl,--start-group -lgcc -lc -lrdimon $(BOARD_LIB) $(PERIPHERAL_LIB) -Wl,--end-group $(LDFLAGS)
+
+# Executable using device independent library and device object file
+EXE=sbl.out
+
+OBJEXT = o
+ASMOBJEXT = ao
+SRCDIR = $(SBL_SRC_DIR)/board
+
+INCS = -I. -I$(strip $(subst ;, -I,$(INCDIR)))
+
+
+VPATH=$(SRCDIR):$(SRCDIR)/$(BOARD):$(SBL_SRC_DIR)/soc/am57xx:$(SBL_SRC_DIR)/src/$(BOOTMODE):$(SBL_SRC_DIR)/src/rprc:$(SBL_SRC_DIR)/board/src:$(PDK_INSTALL_PATH)/ti/drv/uart/soc/am572x:$(PDK_INSTALL_PATH)/ti/drv/mmcsd/soc/am57xx:$(PDK_INSTALL_PATH)/ti/drv/spi/soc/am572x
+
+ifeq ($(BOOTMODE), emmc)
+VPATH+=:$(SBL_SRC_DIR)/src/mmcsd
+endif
+
+#List the Source Files
+SRC_C = \
+       sbl_main.c \
+       sbl_rprc.c \
+       sbl_prcm.c \
+       sbl_slave_core_boot.c \
+       sbl_startup.c \
+       sbl_avs_config.c
+
+SRC_DRV = \
+       UART_soc.c
+
+ifeq ($(BOOTMODE), $(filter $(BOOTMODE), mmcsd emmc))
+    SRC_C += sbl_mmcsd.c
+    SRC_DRV += MMCSD_soc.c
+endif
+
+#Common entry object
+ENTRY_SRC = sbl_init.S
+
+# FLAGS for the SourceFiles
+CFLAGS += -Wall -O2
+SRC_CFLAGS = -I. $(CFLAGS) -g -gdwarf-3 -gstrict-dwarf -Wall 
+
+# Make Rule for the SRC Files
+SRC_OBJS = $(patsubst %.c, $(SBLOBJDIR)/%.$(OBJEXT), $(SRC_C))
+ENTRY_OBJ = $(patsubst %.S, $(SBLOBJDIR)/%.$(ASMOBJEXT), $(ENTRY_SRC))
+SRC_DRV_OBJS = $(patsubst %.c, $(SBLOBJDIR)/%.$(OBJEXT), $(SRC_DRV))
+
+ifeq ($(OS),Windows_NT)
+  TIIMAGE_EXE = tiimage.exe
+else
+  TIIMAGE_EXE = tiimage
+endif
+
+all:$(SBLBINDIR)/$(EXE)
+
+$(SBLBINDIR)/$(EXE): $(SRC_OBJS) $(SRC_DRV_OBJS) $(ENTRY_OBJ) $(SBLBINDIR)/.created $(SBLOBJDIR)/.created
+       @echo linking $(SRC_OBJS) $(SRC_DRV_OBJS) $(ENTRY_OBJ) into $@ ...
+       @$(CC) $(SRC_OBJS) $(SRC_DRV_OBJS) $(ENTRY_OBJ) $(INTERNALLINKDEFS) -Wl,-Map=$(SBLBINDIR)/sbl.map -o $@
+       $(BIN) $(BINFLAGS) $(SBLBINDIR)/sbl.out \
+               $(SBLBINDIR)/sbl.bin
+        $(SBL_SRC_DIR)/tools/tiImageGen/bin/$(TIIMAGE_EXE) $(IMG_LOAD_ADDR) $(BOOTMODE) \
+               $(SBLBINDIR)/sbl.bin $(SBLBINDIR)/MLO;
+
+$(SBLOBJDIR)/%.$(OBJEXT): %.c $(SBLOBJDIR)/.created
+       @echo compiling $< ...
+       @$(CC) -c $(SRC_CFLAGS) $(INTERNALDEFS) $(INCS)  $< -o $@
+
+$(SBLOBJDIR)/%.$(ASMOBJEXT): %.S $(SBLOBJDIR)/.created
+       @echo compiling $< ...
+       @$(CC) -c $(SRC_CFLAGS) $(INTERNALDEFS) $(INCS)  $< -o $@
+
+$(SBLOBJDIR)/.created:
+       @mkdir -p $(SBLOBJDIR)
+       @touch $(SBLOBJDIR)/.created
+
+$(SBLBINDIR)/.created:
+       @mkdir -p $(SBLBINDIR)
+       @touch $(SBLBINDIR)/.created
+
+clean:
+       @rm -f $(SBLBINDIR)/$(EXE)
+       @rm -f $(SRC_OBJS) $(SRC_DRV_OBJS) $(ENTRY_OBJ) $(SBLBINDIR)/.created $(SBLOBJDIR)/.created
+
diff --git a/packages/ti/boot/sbl/board/evmAM572x/sbl_main.c b/packages/ti/boot/sbl/board/evmAM572x/sbl_main.c
new file mode 100644 (file)
index 0000000..718a66d
--- /dev/null
@@ -0,0 +1,174 @@
+/**
+ *  \file   sbl_main.c
+ *
+ *  \brief  This file contain main function, call the Board Initialization
+ *          functions & slave core boot-up functions in sequence.
+ *
+ */
+
+/*
+ * Copyright (C) 2015-2016 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ *
+ * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+ /* TI RTOS header files */
+#include <ti/csl/cslr_device.h>
+#include <ti/board/board.h>
+#include <ti/drv/uart/UART.h>
+#include <ti/drv/uart/src/UART_osal.h>
+#include <ti/drv/uart/UART_stdio.h>
+#include <ti/csl/tistdtypes.h>
+#include <ti/csl/csl_a15.h>
+
+#include "sbl_slave_core_boot.h"
+#include "sbl_avs_config.h"
+#include "sbl_ver.h"
+
+/**********************************************************************
+ ************************** Macros ************************************
+ **********************************************************************/
+
+/**********************************************************************
+ ************************** Internal functions ************************
+ **********************************************************************/
+
+/**********************************************************************
+ ************************** Global Variables **************************
+ **********************************************************************/
+sblEntryPoint_t evmAM572xEntry;
+
+typedef void (*EntryFunPtr_t)(void);
+
+int main()
+{
+    void (*func_ptr)(void);
+    Board_initCfg boardCfg;
+    uint32_t oppMode = OPP_MODE_NOM;
+
+    #if defined(OPP_HIGH)
+        boardCfg = BOARD_INIT_PLL_OPP_HIGH;
+        oppMode = OPP_MODE_HIGH;
+    #elif defined(OPP_OD)
+        boardCfg = BOARD_INIT_PLL_OPP_OD;
+        oppMode = OPP_MODE_OD;
+    #elif defined(OPP_NOM)
+        boardCfg = BOARD_INIT_PLL_OPP_NOM;
+        oppMode = OPP_MODE_NOM;
+    #endif
+
+    boardCfg |= BOARD_INIT_UNLOCK_MMR |
+        BOARD_INIT_MODULE_CLOCK |
+        BOARD_INIT_PINMUX_CONFIG |
+        BOARD_INIT_DDR |
+        BOARD_INIT_UART_STDIO |
+        BOARD_INIT_WATCHDOG_DISABLE;
+
+    /* Configure AVS voltage for the selected OPP to the voltage rails. */
+    SBL_Configure_AVS(oppMode);
+
+    /* Board Library Init. */
+    Board_init(boardCfg);
+
+    /* enable clocks for slave core modules. */
+    SBL_SlaveCorePrcmEnable();
+
+    UART_printf("**** PDK SBL ****\n");
+    UART_printf("%s (%s - %s)\n", SBL_VERSION_STR, __DATE__, __TIME__);
+
+    UART_printf("Begin parsing user application\n");
+
+    /* Image Copy */
+    SBL_ImageCopy(&evmAM572xEntry);
+
+    /* Cache Write back after image copy to ensure the slave cores are brought
+    ** out of reset correctly.
+    */
+    CSL_a15WbAllDataCache();
+
+    UART_printf("Jumping to user application...\n");
+
+    if (evmAM572xEntry.entryPoint_MPU_CPU1 != 0)
+    {
+        /* Bring the A15 CPU1 core out of reset. */
+        SBL_MPU_CPU1_BringUp(evmAM572xEntry.entryPoint_MPU_CPU1);
+    }
+
+    if (evmAM572xEntry.entryPoint_DSP1 != 0)
+    {
+        /* Release the DSP1 core out of reset */
+        SBL_DSP1_BringUp(evmAM572xEntry.entryPoint_DSP1);
+    }
+
+    if (evmAM572xEntry.entryPoint_DSP2 != 0)
+    {
+        /* Release the DSP2 core out of reset */
+        SBL_DSP2_BringUp(evmAM572xEntry.entryPoint_DSP2);
+    }
+
+    if (evmAM572xEntry.entryPoint_IPU1_CPU0 != 0)
+    {
+        /* Release the IPU1 core out of reset and set the Entry point */
+        SBL_IPU1_CPU0_BringUp(evmAM572xEntry.entryPoint_IPU1_CPU0);
+    }
+
+    if (evmAM572xEntry.entryPoint_IPU1_CPU1 != 0)
+    {
+        SBL_IPU1_CPU1_BringUp(evmAM572xEntry.entryPoint_IPU1_CPU1);
+    }
+
+    if (evmAM572xEntry.entryPoint_IPU2_CPU0 != 0)
+    {
+        /* Release the IPU2 CPU0 core out of reset and set the Entry point */
+        SBL_IPU2_CPU0_BringUp(evmAM572xEntry.entryPoint_IPU2_CPU0);
+    }
+
+    if (evmAM572xEntry.entryPoint_IPU2_CPU1 != 0)
+    {
+         /* Release the IPU2 CPU1 core out of reset and set the Entry point */
+        SBL_IPU2_CPU1_BringUp(evmAM572xEntry.entryPoint_IPU2_CPU1);
+    }
+
+    /*Jump to MPU CPU0 APP*/
+    if (evmAM572xEntry.entryPoint_MPU_CPU0 != 0)
+    {
+        func_ptr = (EntryFunPtr_t) evmAM572xEntry.entryPoint_MPU_CPU0;
+        CSL_a15WbAllDataCache();
+        CSL_a15InvAllInstrCache();
+        __sync_synchronize();
+        func_ptr();
+    }
+    else
+    {
+        while(1);
+    }
+
+    return 0;
+}
diff --git a/packages/ti/boot/sbl/board/evmK2E/build/makefile b/packages/ti/boot/sbl/board/evmK2E/build/makefile
new file mode 100644 (file)
index 0000000..590883e
--- /dev/null
@@ -0,0 +1,151 @@
+# Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/
+#
+#
+#  Redistribution and use in source and binary forms, with or without
+#  modification, are permitted provided that the following conditions
+#  are met:
+#
+#    Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+#
+#    Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in the
+#    documentation and/or other materials provided with the
+#    distribution.
+#
+#    Neither the name of Texas Instruments Incorporated nor the names of
+#    its contributors may be used to endorse or promote products derived
+#    from this software without specific prior written permission.
+#
+#  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+#  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+#  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+#  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+#  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+#  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+#  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+#  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+#  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+#  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+#  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+#
+# Macro definitions referenced below
+#
+
+SBL_SRC_DIR ?= $(PDK_INSTALL_PATH)/ti/boot/sbl
+SBLOBJDIR = $(SBL_SRC_DIR)/binary/$(BOARD)/$(BOOTMODE)/obj
+SBLBINDIR = $(SBL_SRC_DIR)/binary/$(BOARD)/$(BOOTMODE)/bin
+ARMV7LIBDIR ?= ./lib
+BINFLAGS = -O binary
+
+#Cross tools
+ifdef TOOLCHAIN_PATH_A15
+# Support backwards compatibility with KeyStone1 approach
+ CC = $(TOOLCHAIN_PATH_A15)/bin/$(CROSS_TOOL_PRFX)gcc
+ AC = $(TOOLCHAIN_PATH_A15)/bin/$(CROSS_TOOL_PRFX)as
+ AR = $(TOOLCHAIN_PATH_A15)/bin/$(CROSS_TOOL_PRFX)ar
+ LD = $(TOOLCHAIN_PATH_A15)/bin/$(CROSS_TOOL_PRFX)gcc
+ BIN = $(TOOLCHAIN_PATH_A15)/bin/$(CROSS_TOOL_PRFX)objcopy
+endif
+
+# INCLUDE Directories
+CSL_DIR = $(PDK_INSTALL_PATH)/ti/csl
+BOARD_DIR = $(PDK_INSTALL_PATH)/ti/board
+SBL_INC_DIR = $(SBL_SRC_DIR)/board/src
+SBL_LIB_INC_DIR = $(SBL_SRC_DIR)/src/rprc
+SBL_SOC_DIR = $(SBL_SRC_DIR)/soc
+
+# Libraries
+BOARD_LIB = "$(PDK_INSTALL_PATH)/ti/board/lib/$(BOARD)/a15/release/ti.board.aa15fg"
+UART_LIB = "$(PDK_INSTALL_PATH)/ti/drv/uart/lib/k2e/a15/release/ti.drv.uart.aa15fg"
+I2C_LIB = "$(PDK_INSTALL_PATH)/ti/drv/i2c/lib/k2e/a15/release/ti.drv.i2c.aa15fg"
+SPI_LIB = "$(PDK_INSTALL_PATH)/ti/drv/spi/lib/a15/release/ti.drv.spi.aa15fg"
+CSL_LIB = "$(PDK_INSTALL_PATH)/ti/csl/lib/k2e/a15/release/ti.csl.aa15fg"
+CSL_INIT_LIB = "$(PDK_INSTALL_PATH)/ti/csl/lib/k2e/a15/release/ti.csl.init.aa15fg"
+OSAL_LIB = "$(PDK_INSTALL_PATH)/ti/osal/lib/nonos/k2e/a15/release/ti.osal.aa15fg"
+
+ifeq ($(BOOTMODE), spi)
+  INTERNALDEFS += -DBOOT_SPI
+  SBL_SPI_DIR = $(SBL_SRC_DIR)/src/spi
+  INCDIR := $(CSL_DIR);$(PDK_INSTALL_PATH);$(BOARD_DIR);$(SBL_INC_DIR);$(SBL_LIB_INC_DIR);$(SBL_SPI_DIR);$(SBL_SOC_DIR);$(SBL_SOC_DIR)/k2e;$(SBL_SOC_DIR)/a15
+  PERIPHERAL_LIB = $(UART_LIB) $(I2C_LIB) $(CSL_LIB) $(CSL_INIT_LIB) $(SPI_LIB) $(OSAL_LIB)
+endif
+
+# Compiler options
+INTERNALDEFS += -g -Wall -D__ARMv7 -DA15_CORE -DSOC_K2E -mcpu=cortex-a15 -mtune=cortex-a15 -marm -mfloat-abi=hard -mfpu=neon -D$(SOC)_BUILD
+
+# Linker options
+INTERNALLINKDEFS = -g -gdwarf-3 -gstrict-dwarf -Wall  -mfloat-abi=hard -Wl,--undefined,__aeabi_uidiv -Wl,--undefined,__aeabi_idiv --entry Entry -nostartfiles -static -Wl,--gc-sections -Wl,-T $(SBL_SOC_DIR)/k2e/linker.cmd -Wl,--start-group -l"c" -lrdimon -l"m" -l"nosys" $(BOARD_LIB) $(PERIPHERAL_LIB) -Wl,--end-group $(LDFLAGS)
+
+# Executable using device independent library and device object file
+EXE=sbl.out
+
+OBJEXT = o
+ASMOBJEXT = ao
+SRCDIR = $(SBL_SRC_DIR)/board
+
+INCS = -I. -I$(strip $(subst ;, -I,$(INCDIR)))
+
+VPATH=$(SRCDIR):$(SRCDIR)/$(BOARD):$(SBL_SRC_DIR)/board/src:$(SBL_SRC_DIR)/soc/k2e:$(SBL_SRC_DIR)/soc/a15:$(PDK_INSTALL_PATH)/ti/drv/uart/soc/k2e:$(SBL_SRC_DIR)/src/$(BOOTMODE):$(SBL_SRC_DIR)/src/rprc:$(PDK_INSTALL_PATH)/ti/drv/spi/soc/k2e
+
+#List the Source Files
+SRC_C = \
+       sbl_main.c \
+       sbl_rprc.c \
+       sbl_spi.c \
+       sbl_slave_boot.c \
+       sbl_a15.c
+
+SRC_DRV = \
+    sbl_soc.c \
+    SPI_soc.c
+
+#Common entry object
+ENTRY_SRC = sbl_init.S
+
+# FLAGS for the SourceFiles
+CFLAGS += -Wall -O3
+SRC_CFLAGS = -I. $(CFLAGS) -g -gdwarf-3 -gstrict-dwarf -Wall 
+
+# Make Rule for the SRC Files
+SRC_OBJS = $(patsubst %.c, $(SBLOBJDIR)/%.$(OBJEXT), $(SRC_C))
+ENTRY_OBJ = $(patsubst %.S, $(SBLOBJDIR)/%.$(ASMOBJEXT), $(ENTRY_SRC))
+SRC_DRV_OBJS = $(patsubst %.c, $(SBLOBJDIR)/%.$(OBJEXT), $(SRC_DRV))
+
+ifeq ($(OS),Windows_NT)
+  TIIMAGE_EXE = tiimage.exe
+else
+  TIIMAGE_EXE = tiimage
+endif
+
+all:$(SBLBINDIR)/$(EXE) MLO
+
+MLO: $(SBLBINDIR)/$(EXE)
+       $(BIN) -O binary $(SBLBINDIR)/sbl.out $(SBLBINDIR)/sbl.bin
+       $(SBL_SRC_DIR)/tools/tiImageGen/bin/$(TIIMAGE_EXE) 0x0C0B0000 SPI $(SBLBINDIR)/sbl.bin $(SBLBINDIR)/MLO;
+
+$(SBLBINDIR)/$(EXE): $(SRC_OBJS) $(SRC_DRV_OBJS) $(ENTRY_OBJ) $(SBLBINDIR)/.created $(SBLOBJDIR)/.created
+       @echo linking $(SRC_OBJS) $(SRC_DRV_OBJS) $(ENTRY_OBJ) into $@ ...
+       @$(CC) $(SRC_OBJS) $(SRC_DRV_OBJS) $(ENTRY_OBJ) $(INTERNALLINKDEFS) -Wl,-Map=$(SBLBINDIR)/sbl.map -o $@
+
+$(SBLOBJDIR)/%.$(OBJEXT): %.c $(SBLOBJDIR)/.created
+       @echo compiling $< ...
+       @$(CC) -c $(SRC_CFLAGS) $(INTERNALDEFS) $(INCS)  $< -o $@
+
+$(SBLOBJDIR)/%.$(ASMOBJEXT): %.S $(SBLOBJDIR)/.created
+       @echo compiling $< ...
+       @$(CC) -c $(INTERNALDEFS) $(INCS)  $< -o $@
+
+$(SBLOBJDIR)/.created:
+       @mkdir -p $(SBLOBJDIR)
+       @touch $(SBLOBJDIR)/.created
+
+$(SBLBINDIR)/.created:
+       @mkdir -p $(SBLBINDIR)
+       @touch $(SBLBINDIR)/.created
+
+clean:
+       @rm -f $(SBLBINDIR)/$(EXE)
+       @rm -f $(SRC_OBJS) $(SRC_DRV_OBJS) $(ENTRY_OBJ) $(SBLBINDIR)/.created $(SBLOBJDIR)/.created
+
diff --git a/packages/ti/boot/sbl/board/evmK2E/sbl_main.c b/packages/ti/boot/sbl/board/evmK2E/sbl_main.c
new file mode 100644 (file)
index 0000000..e04a2f6
--- /dev/null
@@ -0,0 +1,90 @@
+/*
+ * Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ *
+ * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#include <ti/board/board.h>
+#include <ti/drv/uart/UART_stdio.h>
+#include "sbl_soc.h"
+#include "sbl_slave_core_boot.h"
+#include "sbl_ver.h"
+
+sblEntryPoint_t entry;
+typedef void (*EntryFunPtr_t)(void);
+
+int main() {
+    void (*func_ptr)(void);
+    if (SBL_socInit() < 0)
+    {
+        /* Something went wrong with init, trap here */
+        while(1);
+    }
+
+    UART_printf("\n**** PDK SBL ****\n");
+    UART_printf("%s (%s - %s)\n", SBL_VERSION_STR, __DATE__, __TIME__);
+
+    UART_printf("Begin parsing user application\n");
+    SBL_ImageCopy(&entry);
+    UART_printf("Jumping to user application...\n");
+
+    if (entry.entryPoint_DSP0 != 0)
+    {
+        SBL_DSPBringUp(0, entry.entryPoint_DSP0);
+    }
+
+    if (entry.entryPoint_MPU_CPU1 != 0)
+    {
+        SBL_ARMBringUp(1, entry.entryPoint_MPU_CPU1);
+    }
+
+    if (entry.entryPoint_MPU_CPU2 != 0)
+    {
+        SBL_ARMBringUp(2, entry.entryPoint_MPU_CPU2);
+    }
+
+    if (entry.entryPoint_MPU_CPU3 != 0)
+    {
+        SBL_ARMBringUp(3, entry.entryPoint_MPU_CPU3);
+    }
+
+    /*Jump to MPU CPU0 APP*/
+    if (entry.entryPoint_MPU_CPU0 != 0)
+    {
+        func_ptr = (EntryFunPtr_t) entry.entryPoint_MPU_CPU0;
+        func_ptr();
+    }
+    else
+    {
+        while(1);
+    }
+
+    return 0;
+}
\ No newline at end of file
diff --git a/packages/ti/boot/sbl/board/evmK2G/build/makefile b/packages/ti/boot/sbl/board/evmK2G/build/makefile
new file mode 100644 (file)
index 0000000..a567e06
--- /dev/null
@@ -0,0 +1,237 @@
+# Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/
+#
+#
+#  Redistribution and use in source and binary forms, with or without
+#  modification, are permitted provided that the following conditions
+#  are met:
+#
+#    Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+#
+#    Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in the
+#    documentation and/or other materials provided with the
+#    distribution.
+#
+#    Neither the name of Texas Instruments Incorporated nor the names of
+#    its contributors may be used to endorse or promote products derived
+#    from this software without specific prior written permission.
+#
+#  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+#  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+#  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+#  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+#  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+#  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+#  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+#  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+#  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+#  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+#  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+#
+# Macro definitions referenced below
+#
+
+SBL_SRC_DIR ?= $(PDK_INSTALL_PATH)/ti/boot/sbl
+BM_DIR ?= $(TI_SECURE_DEV_PKG)/boot-monitor
+SK_DIR ?= $(TI_SECURE_DEV_PKG)/ram_secure_kernel
+SECBIN ?= $(TI_SECURE_DEV_PKG)/scripts/secimagecreate.sh
+KEYPATH ?= $(TI_SECURE_DEV_PKG)/sec/ks2keys/dev
+DEVICE ?= $(SOC)
+SBLOBJDIR = $(SBL_SRC_DIR)/binary/$(BOARD)/$(BOOTMODE)/obj
+SBLBINDIR = $(SBL_SRC_DIR)/binary/$(BOARD)/$(BOOTMODE)/bin
+ARMV7LIBDIR ?= ./lib
+BINFLAGS = -O binary
+
+#Cross tools
+ifdef TOOLCHAIN_PATH_A15
+# Support backwards compatibility with KeyStone1 approach
+ CC = $(TOOLCHAIN_PATH_A15)/bin/$(CROSS_TOOL_PRFX)gcc
+ AC = $(TOOLCHAIN_PATH_A15)/bin/$(CROSS_TOOL_PRFX)as
+ AR = $(TOOLCHAIN_PATH_A15)/bin/$(CROSS_TOOL_PRFX)ar
+ LD = $(TOOLCHAIN_PATH_A15)/bin/$(CROSS_TOOL_PRFX)gcc
+ BIN = $(TOOLCHAIN_PATH_A15)/bin/$(CROSS_TOOL_PRFX)objcopy
+endif
+
+# INCLUDE Directories
+CSL_DIR = $(PDK_INSTALL_PATH)/ti/csl
+BOARD_DIR = $(PDK_INSTALL_PATH)/ti/board
+SBL_INC_DIR = $(SBL_SRC_DIR)/board/src
+SBL_LIB_INC_DIR = $(SBL_SRC_DIR)/src/rprc
+SBL_SOC_DIR = $(SBL_SRC_DIR)/soc
+
+# Libraries
+BOARD_LIB = "$(PDK_INSTALL_PATH)/ti/board/lib/$(BOARD)/a15/release/ti.board.aa15fg"
+UART_LIB = "$(PDK_INSTALL_PATH)/ti/drv/uart/lib/k2g/a15/release/ti.drv.uart.aa15fg"
+I2C_LIB = "$(PDK_INSTALL_PATH)/ti/drv/i2c/lib/k2g/a15/release/ti.drv.i2c.aa15fg"
+MMCSD_LIB = "$(PDK_INSTALL_PATH)/ti/drv/mmcsd/lib/k2g/a15/release/ti.drv.mmcsd.aa15fg"
+FATFS_LIB = "$(PDK_INSTALL_PATH)/ti/fs/fatfs/lib/a15/release/ti.fs.fatfs.aa15fg"
+QSPI_LIB = "$(PDK_INSTALL_PATH)/ti/drv/spi/lib/a15/release/ti.drv.spi.aa15fg"
+CSL_LIB = "$(PDK_INSTALL_PATH)/ti/csl/lib/k2g/a15/release/ti.csl.aa15fg"
+CSL_INIT_LIB = "$(PDK_INSTALL_PATH)/ti/csl/lib/k2g/a15/release/ti.csl.init.aa15fg"
+OSAL_LIB = "$(PDK_INSTALL_PATH)/ti/osal/lib/nonos/k2g/a15/release/ti.osal.aa15fg"
+
+# BOOTMODE specific CFLAGS
+ifeq ($(BOOTMODE), mmcsd)
+  INTERNALDEFS += -DBOOT_MMCSD
+  SBL_MMCSD_DIR = $(SBL_SRC_DIR)/src/mmcsd
+  INCDIR := $(CSL_DIR);$(PDK_INSTALL_PATH);$(BOARD_DIR);$(SBL_INC_DIR);$(SBL_LIB_INC_DIR);$(SBL_MMCSD_DIR);$(SBL_SOC_DIR);$(SBL_SOC_DIR)/k2g;$(SBL_SOC_DIR)/a15
+  PERIPHERAL_LIB = $(UART_LIB) $(I2C_LIB) $(CSL_LIB) $(CSL_INIT_LIB) $(MMCSD_LIB) $(FATFS_LIB) $(OSAL_LIB)
+endif # ifeq ($(BOOTMODE), mmcsd)
+
+ifeq ($(BOOTMODE), qspi)
+  INTERNALDEFS += -DBOOT_QSPI
+  SBL_QSPI_DIR = $(SBL_SRC_DIR)/src/qspi
+  INCDIR := $(CSL_DIR);$(PDK_INSTALL_PATH);$(BOARD_DIR);$(SBL_INC_DIR);$(SBL_LIB_INC_DIR);$(SBL_QSPI_DIR);$(SBL_SOC_DIR);$(SBL_SOC_DIR)/k2g;$(SBL_SOC_DIR)/a15
+  PERIPHERAL_LIB = $(UART_LIB) $(I2C_LIB) $(CSL_LIB) $(CSL_INIT_LIB) $(QSPI_LIB) $(OSAL_LIB)
+endif # ifeq ($(BOOTMODE), qspi)
+
+# Compiler options
+INTERNALDEFS += -g -Wall -D__ARMv7 -DSOC_K2G -mcpu=cortex-a15 -mtune=cortex-a15 -marm -mfloat-abi=hard -mfpu=neon -D$(SOC)_BUILD -D$(BOARD)
+
+# Linker options
+INTERNALLINKDEFS = -g -gdwarf-3 -gstrict-dwarf -Wall  -mfloat-abi=hard -Wl,--undefined,__aeabi_uidiv -Wl,--undefined,__aeabi_idiv --entry Entry -nostartfiles -static -Wl,--gc-sections -Wl,-T $(SBL_SOC_DIR)/k2g/linker.cmd -Wl,--start-group -l"c" -lrdimon -l"m" -l"nosys" $(BOARD_LIB) $(PERIPHERAL_LIB) -Wl,--end-group $(LDFLAGS)
+
+# Executable using device independent library and device object file
+EXE=sbl.out
+
+OBJEXT = o
+ASMOBJEXT = ao
+SRCDIR = $(SBL_SRC_DIR)/board
+
+INCS = -I. -I$(strip $(subst ;, -I,$(INCDIR)))
+
+VPATH=$(SRCDIR):$(SRCDIR)/$(BOARD):$(SBL_SRC_DIR)/board/src:$(SBL_SRC_DIR)/soc/k2g:$(SBL_SRC_DIR)/soc/a15:$(PDK_INSTALL_PATH)/ti/drv/uart/soc/k2g:$(SBL_SRC_DIR)/src/$(BOOTMODE):$(SBL_SRC_DIR)/src/rprc:$(PDK_INSTALL_PATH)/ti/drv/mmcsd/soc/k2g:$(PDK_INSTALL_PATH)/ti/drv/spi/soc/k2g
+
+#List the Source Files
+SRC_C = \
+       sbl_main.c \
+       sbl_rprc.c \
+       sbl_slave_boot.c \
+       sbl_a15.c
+
+SRC_DRV = \
+    sbl_soc.c
+
+
+ifeq ($(BOOTMODE), qspi)
+    SRC_C += sbl_qspi.c
+    SRC_DRV += SPI_soc.c
+endif
+
+ifeq ($(BOOTMODE), mmcsd)
+    SRC_C += sbl_mmcsd.c
+    SRC_DRV += MMCSD_soc.c
+endif
+
+
+# enable JTAG by default now. Can force the build to lock JTAG with ENABLE_JTAG=no. 
+# We actually enable JTAG only when the signing key matches the development/dummy keys
+# to prevent accidentally unlocking JTAG. The check is done in Boot Monitor makefile
+ENABLE_JTAG ?= yes
+
+export ENABLE_JTAG
+
+ifeq ($(SECUREMODE), yes)
+  SRC_C += sbl_sec.c
+  INTERNALDEFS += -DSECURE_BOOT
+  BM_SEC_DEP = signed_sec_bm.h
+  SK_SEC_DEP = bootMainGem.h
+  DSP_SEC_SRV_DEP = secserver_self.h
+  MLO_NAME = mlo_signed.bin
+else
+  BM_SEC_DEP = 
+  SK_SEC_DEP =
+  DSP_SEC_SRV_DEP =
+  MLO_NAME = MLO
+endif
+
+#Common entry object
+ENTRY_SRC = sbl_init.S
+
+# BOOTMODE specific CFLAGS
+ifeq ($(BOOTMODE), mmcsd)
+  INTERNALDEFS += -DBOOT_MMCSD
+  SBL_MMCSD_DIR =  $(SBL_SRC_DIR)/src/mmcsd
+  INCS += -I$(SBL_MMCSD_DIR)
+endif # ifeq ($(BOOTMODE), mmcsd)
+
+ifeq ($(BOOTMODE), qspi)
+  INTERNALDEFS += -DBOOT_QSPI
+  SBL_QSPI_DIR =  $(SBL_SRC_DIR)/src/qspi
+  INCS += -I$(SBL_QSPI_DIR)
+endif # ifeq ($(BOOTMODE), qspi)
+
+# FLAGS for the SourceFiles
+CFLAGS += -Wall
+SRC_CFLAGS = -I. $(CFLAGS) -g -gdwarf-3 -gstrict-dwarf -Wall 
+
+# Make Rule for the SRC Files
+SRC_OBJS = $(patsubst %.c, $(SBLOBJDIR)/%.$(OBJEXT), $(SRC_C))
+ENTRY_OBJ = $(patsubst %.S, $(SBLOBJDIR)/%.$(ASMOBJEXT), $(ENTRY_SRC))
+SRC_DRV_OBJS = $(patsubst %.c, $(SBLOBJDIR)/%.$(OBJEXT), $(SRC_DRV))
+
+all:$(SBLBINDIR)/$(EXE) $(MLO_NAME)
+
+MLO: $(SBLBINDIR)/$(EXE)
+       @$(TOOLCHAIN_PATH_M4)/bin/armhex $(SBLBINDIR)/$(EXE) $(SRCDIR)/$(BOARD)/build/sbl.rmd
+       @mv sbl.hex $(SBLBINDIR)
+       @$(SBL_SRC_DIR)/tools/btoccs/b2ccs $(SBLBINDIR)/sbl.hex $(SBLBINDIR)/sbl.ccs
+       @$(SBL_SRC_DIR)/tools/ccsutil/ccsAddGphdr -infile $(SBLBINDIR)/sbl.ccs -outfile $(SBLBINDIR)/sbl.gphdr -headerEndian BE
+       @$(SBL_SRC_DIR)/tools/ccsutil/ccsAddGptlr -infile $(SBLBINDIR)/sbl.gphdr -outfile $(SBLBINDIR)/sbl.gptlr
+       @$(SBL_SRC_DIR)/tools/byteswap/byteswapccs $(SBLBINDIR)/sbl.gptlr $(SBLBINDIR)/MLO.ccs
+       @$(SBL_SRC_DIR)/tools/btoccs/ccs2bin -swap $(SBLBINDIR)/MLO.ccs $(SBLBINDIR)/MLO
+
+mlo_signed.bin:
+       @$(TOOLCHAIN_PATH_M4)/bin/armhex $(SBLBINDIR)/$(EXE) $(SRCDIR)/$(BOARD)/build/sbl_hs.rmd
+       @mv sbl_hs.hex $(SBLBINDIR)
+       @$(SBL_SRC_DIR)/tools/btoccs/b2ccs $(SBLBINDIR)/sbl_hs.hex $(SBLBINDIR)/sbl_hs.ccs
+       $(SBL_SRC_DIR)/tools/btoccs/ccs2bin $(SBLBINDIR)/sbl_hs.ccs $(SBLBINDIR)/sbl.bin
+       $(SECBIN) -i  $(SBLBINDIR)/sbl.bin -r $(KEYPATH)/privkey.pem -a $(KEYPATH)/aeskey.txt -d $(SOC) -o  $(SBLBINDIR)/$@ -l 0x0c0b0000
+       @cp  $(SBLBINDIR)/$@ $(SBLBINDIR)/MLO
+
+
+$(SBLBINDIR)/$(EXE): $(SRC_OBJS) $(SRC_DRV_OBJS) $(ENTRY_OBJ) $(SBLBINDIR)/.created $(SBLOBJDIR)/.created
+       @echo linking $(SRC_OBJS) $(SRC_DRV_OBJS) $(ENTRY_OBJ) into $@ ...
+       @$(CC) $(SRC_OBJS) $(SRC_DRV_OBJS) $(ENTRY_OBJ) $(INTERNALLINKDEFS) -Wl,-Map=$(SBLBINDIR)/sbl.map -o $@
+
+$(SBLOBJDIR)/%.$(OBJEXT): %.c $(SBLOBJDIR)/.created  $(BM_SEC_DEP) $(SK_SEC_DEP) $(DSP_SEC_SRV_DEP)
+       @echo compiling $< ...
+       $(CC) -c $(SRC_CFLAGS) $(INTERNALDEFS) $(INCS)  $< -o $@
+
+$(SBLOBJDIR)/%.$(ASMOBJEXT): %.S $(SBLOBJDIR)/.created
+       @echo compiling $< ...
+       $(CC) -c $(INTERNALDEFS) $(INCS)  $< -o $@
+
+#make sure BM has been compiled and BM's build environment variables have been setup
+# particularly:  $SECBIN, $BM_DIR, $KEY_PATH, $SOC 
+$(BM_SEC_DEP): $(BM_DIR)/Docs/signed_sec_bm.h
+       cp $< $(SBL_SOC_DIR)/signed_sec_bm.h
+
+$(SK_SEC_DEP): $(SK_DIR)/runSk/bootMainGem.h
+       cp $< $(SBL_SOC_DIR)/$@
+
+$(DSP_SEC_SRV_DEP): $(TI_SECURE_DEV_PKG)/secure_server/src/secserver_self.h
+       cp $< $(SBL_SOC_DIR)/$@
+
+$(BM_DIR)/Docs/signed_sec_bm.h: .FORCE
+
+.PHONY: .FORCE
+
+.FORCE:
+       $(BM_DIR)/../scripts/build_secdev.sh
+
+$(SBLOBJDIR)/.created:
+       @mkdir -p $(SBLOBJDIR)
+       @touch $(SBLOBJDIR)/.created
+
+$(SBLBINDIR)/.created:
+       @mkdir -p $(SBLBINDIR)
+       @touch $(SBLBINDIR)/.created
+
+clean:
+       @rm -f $(SBLBINDIR)/$(EXE)
+       @rm -f $(SBL_SOC_DIR)/signed_sec_bm.h $(SBL_SOC_DIR)/bootMainGem.h $(SBL_SOC_DIR)/secserver_self.h
+       @rm -f $(SRC_OBJS) $(SRC_DRV_OBJS) $(ENTRY_OBJ) $(SBLBINDIR)/.created $(SBLOBJDIR)/.created
+
diff --git a/packages/ti/boot/sbl/board/evmK2G/build/sbl.rmd b/packages/ti/boot/sbl/board/evmK2G/build/sbl.rmd
new file mode 100644 (file)
index 0000000..46f7933
--- /dev/null
@@ -0,0 +1,39 @@
+/* Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ *
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions
+ *  are met:
+ *
+ *    Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *
+ *    Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the
+ *    distribution.
+ *
+ *    Neither the name of Texas Instruments Incorporated nor the names of
+ *    its contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
+
+
+-image
+-a
+ROMS
+{
+       ROW1 : origin = 0x0C0B0000 length = 0x20000 romwidth = 32 memwidth = 32
+                       files = { sbl.hex }
+}
diff --git a/packages/ti/boot/sbl/board/evmK2G/build/sbl_hs.rmd b/packages/ti/boot/sbl/board/evmK2G/build/sbl_hs.rmd
new file mode 100644 (file)
index 0000000..2076852
--- /dev/null
@@ -0,0 +1,39 @@
+/* Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ *
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions
+ *  are met:
+ *
+ *    Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *
+ *    Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the
+ *    distribution.
+ *
+ *    Neither the name of Texas Instruments Incorporated nor the names of
+ *    its contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
+
+
+-image
+-a
+ROMS
+{
+       ROW1 : origin = 0x0C0B0000 length = 0x40000 romwidth = 32 memwidth = 32
+                       files = { sbl_hs.hex }
+}
diff --git a/packages/ti/boot/sbl/board/evmK2G/sbl_main.c b/packages/ti/boot/sbl/board/evmK2G/sbl_main.c
new file mode 100644 (file)
index 0000000..07dadf8
--- /dev/null
@@ -0,0 +1,99 @@
+/*
+ * Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ *
+ * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#include <ti/board/board.h>
+#include <ti/drv/uart/UART_stdio.h>
+#include "sbl_soc.h"
+#include "sbl_slave_core_boot.h"
+#include "sbl_ver.h"
+
+#ifdef SECURE_BOOT
+#include "sbl_sec.h"
+#include <ti/csl/arch/a15/V0/csl_a15.h>
+#include <ti/board/board.h>
+#endif
+
+sblEntryPoint_t entry;
+typedef void (*EntryFunPtr_t)(void);
+
+
+int main() {
+    void (*func_ptr)(void);
+
+#ifdef SECURE_BOOT
+    /* install boot monitor */
+    SBL_mon_init(BOARD_SOC_INPUT_CLK_FREQ);
+
+    /* install DSP Secure Server */
+    SBL_startDspSecSrv();
+#endif
+    
+    SBL_socInit();
+
+    UART_printf("\n**** PDK SBL ****\n");
+    UART_printf("%s (%s - %s)\n", SBL_VERSION_STR, __DATE__, __TIME__);
+
+    UART_printf("Begin parsing user application\n");
+    if (E_PASS == SBL_ImageCopy(&entry))
+    {
+        UART_printf("Jumping to user application...\n");
+    }
+
+    if (entry.entryPoint_DSP0 != 0)
+    {
+
+#ifdef SECURE_BOOT
+        /* setting the boot magic of GEM core 0 */
+        *(uint32_t*)(GEM_MAGIC(0)) = entry.entryPoint_DSP0;
+
+        /* cache flush */
+        CSL_a15WbInvDataCache((void*)GEM_MAGIC(0), 4);
+#else
+        SBL_DSPBringUp(0, entry.entryPoint_DSP0);
+#endif
+    }
+
+    /*Jump to MPU CPU0 APP*/
+    if (entry.entryPoint_MPU_CPU0 != 0)
+    {
+        func_ptr = (EntryFunPtr_t) entry.entryPoint_MPU_CPU0;
+        func_ptr();
+    }
+    else
+    {
+        while(1);
+    }
+
+    return 0;
+}
+
diff --git a/packages/ti/boot/sbl/board/evmK2H/build/makefile b/packages/ti/boot/sbl/board/evmK2H/build/makefile
new file mode 100644 (file)
index 0000000..cb6b4e9
--- /dev/null
@@ -0,0 +1,151 @@
+# Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/
+#
+#
+#  Redistribution and use in source and binary forms, with or without
+#  modification, are permitted provided that the following conditions
+#  are met:
+#
+#    Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+#
+#    Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in the
+#    documentation and/or other materials provided with the
+#    distribution.
+#
+#    Neither the name of Texas Instruments Incorporated nor the names of
+#    its contributors may be used to endorse or promote products derived
+#    from this software without specific prior written permission.
+#
+#  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+#  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+#  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+#  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+#  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+#  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+#  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+#  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+#  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+#  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+#  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+#
+# Macro definitions referenced below
+#
+
+SBL_SRC_DIR ?= $(PDK_INSTALL_PATH)/ti/boot/sbl
+SBLOBJDIR = $(SBL_SRC_DIR)/binary/$(BOARD)/$(BOOTMODE)/obj
+SBLBINDIR = $(SBL_SRC_DIR)/binary/$(BOARD)/$(BOOTMODE)/bin
+ARMV7LIBDIR ?= ./lib
+BINFLAGS = -O binary
+
+#Cross tools
+ifdef TOOLCHAIN_PATH_A15
+# Support backwards compatibility with KeyStone1 approach
+ CC = $(TOOLCHAIN_PATH_A15)/bin/$(CROSS_TOOL_PRFX)gcc
+ AC = $(TOOLCHAIN_PATH_A15)/bin/$(CROSS_TOOL_PRFX)as
+ AR = $(TOOLCHAIN_PATH_A15)/bin/$(CROSS_TOOL_PRFX)ar
+ LD = $(TOOLCHAIN_PATH_A15)/bin/$(CROSS_TOOL_PRFX)gcc
+ BIN = $(TOOLCHAIN_PATH_A15)/bin/$(CROSS_TOOL_PRFX)objcopy
+endif
+
+# INCLUDE Directories
+CSL_DIR = $(PDK_INSTALL_PATH)/ti/csl
+BOARD_DIR = $(PDK_INSTALL_PATH)/ti/board
+SBL_INC_DIR = $(SBL_SRC_DIR)/board/src
+SBL_LIB_INC_DIR = $(SBL_SRC_DIR)/src/rprc
+SBL_SOC_DIR = $(SBL_SRC_DIR)/soc
+
+# Libraries
+BOARD_LIB = "$(PDK_INSTALL_PATH)/ti/board/lib/$(BOARD)/a15/release/ti.board.aa15fg"
+UART_LIB = "$(PDK_INSTALL_PATH)/ti/drv/uart/lib/k2h/a15/release/ti.drv.uart.aa15fg"
+I2C_LIB = "$(PDK_INSTALL_PATH)/ti/drv/i2c/lib/k2h/a15/release/ti.drv.i2c.aa15fg"
+SPI_LIB = "$(PDK_INSTALL_PATH)/ti/drv/spi/lib/a15/release/ti.drv.spi.aa15fg"
+CSL_LIB = "$(PDK_INSTALL_PATH)/ti/csl/lib/k2h/a15/release/ti.csl.aa15fg"
+CSL_INIT_LIB = "$(PDK_INSTALL_PATH)/ti/csl/lib/k2h/a15/release/ti.csl.init.aa15fg"
+OSAL_LIB = "$(PDK_INSTALL_PATH)/ti/osal/lib/nonos/k2h/a15/release/ti.osal.aa15fg"
+
+ifeq ($(BOOTMODE), spi)
+  INTERNALDEFS += -DBOOT_SPI
+  SBL_SPI_DIR = $(SBL_SRC_DIR)/src/spi
+  INCDIR := $(CSL_DIR);$(PDK_INSTALL_PATH);$(BOARD_DIR);$(SBL_INC_DIR);$(SBL_LIB_INC_DIR);$(SBL_SPI_DIR);$(SBL_SOC_DIR);$(SBL_SOC_DIR)/k2h;$(SBL_SOC_DIR)/a15
+  PERIPHERAL_LIB = $(UART_LIB) $(I2C_LIB) $(CSL_LIB) $(CSL_INIT_LIB) $(SPI_LIB) $(OSAL_LIB)
+endif
+
+# Compiler options
+INTERNALDEFS += -g -Wall -D__ARMv7 -DA15_CORE -DSOC_K2H -mcpu=cortex-a15 -mtune=cortex-a15 -marm -mfloat-abi=hard -mfpu=neon -D$(SOC)_BUILD
+
+# Linker options
+INTERNALLINKDEFS = -g -gdwarf-3 -gstrict-dwarf -Wall  -mfloat-abi=hard -Wl,--undefined,__aeabi_uidiv -Wl,--undefined,__aeabi_idiv --entry Entry -nostartfiles -static -Wl,--gc-sections -Wl,-T $(SBL_SOC_DIR)/k2h/linker.cmd -Wl,--start-group -l"c" -lrdimon -l"m" -l"nosys" $(BOARD_LIB) $(PERIPHERAL_LIB) -Wl,--end-group $(LDFLAGS)
+
+# Executable using device independent library and device object file
+EXE=sbl.out
+
+OBJEXT = o
+ASMOBJEXT = ao
+SRCDIR = $(SBL_SRC_DIR)/board
+
+INCS = -I. -I$(strip $(subst ;, -I,$(INCDIR)))
+
+VPATH=$(SRCDIR):$(SRCDIR)/$(BOARD):$(SBL_SRC_DIR)/board/src:$(SBL_SRC_DIR)/soc/k2h:$(SBL_SRC_DIR)/soc/a15:$(PDK_INSTALL_PATH)/ti/drv/uart/soc/k2h:$(SBL_SRC_DIR)/src/$(BOOTMODE):$(SBL_SRC_DIR)/src/rprc:$(PDK_INSTALL_PATH)/ti/drv/spi/soc/k2h
+
+#List the Source Files
+SRC_C = \
+       sbl_main.c \
+       sbl_rprc.c \
+       sbl_spi.c \
+       sbl_slave_boot.c \
+       sbl_a15.c
+
+SRC_DRV = \
+    sbl_soc.c \
+    SPI_soc.c
+
+#Common entry object
+ENTRY_SRC = sbl_init.S
+
+# FLAGS for the SourceFiles
+CFLAGS += -Wall -O3
+SRC_CFLAGS = -I. $(CFLAGS) -g -gdwarf-3 -gstrict-dwarf -Wall 
+
+# Make Rule for the SRC Files
+SRC_OBJS = $(patsubst %.c, $(SBLOBJDIR)/%.$(OBJEXT), $(SRC_C))
+ENTRY_OBJ = $(patsubst %.S, $(SBLOBJDIR)/%.$(ASMOBJEXT), $(ENTRY_SRC))
+SRC_DRV_OBJS = $(patsubst %.c, $(SBLOBJDIR)/%.$(OBJEXT), $(SRC_DRV))
+
+ifeq ($(OS),Windows_NT)
+  TIIMAGE_EXE = tiimage.exe
+else
+  TIIMAGE_EXE = tiimage
+endif
+
+all:$(SBLBINDIR)/$(EXE) MLO
+
+MLO: $(SBLBINDIR)/$(EXE)
+       $(BIN) -O binary $(SBLBINDIR)/sbl.out $(SBLBINDIR)/sbl.bin
+       $(SBL_SRC_DIR)/tools/tiImageGen/bin/$(TIIMAGE_EXE) 0x0C0B0000 SPI $(SBLBINDIR)/sbl.bin $(SBLBINDIR)/MLO;
+
+$(SBLBINDIR)/$(EXE): $(SRC_OBJS) $(SRC_DRV_OBJS) $(ENTRY_OBJ) $(SBLBINDIR)/.created $(SBLOBJDIR)/.created
+       @echo linking $(SRC_OBJS) $(SRC_DRV_OBJS) $(ENTRY_OBJ) into $@ ...
+       @$(CC) $(SRC_OBJS) $(SRC_DRV_OBJS) $(ENTRY_OBJ) $(INTERNALLINKDEFS) -Wl,-Map=$(SBLBINDIR)/sbl.map -o $@
+
+$(SBLOBJDIR)/%.$(OBJEXT): %.c $(SBLOBJDIR)/.created
+       @echo compiling $< ...
+       @$(CC) -c $(SRC_CFLAGS) $(INTERNALDEFS) $(INCS)  $< -o $@
+
+$(SBLOBJDIR)/%.$(ASMOBJEXT): %.S $(SBLOBJDIR)/.created
+       @echo compiling $< ...
+       @$(CC) -c $(INTERNALDEFS) $(INCS)  $< -o $@
+
+$(SBLOBJDIR)/.created:
+       @mkdir -p $(SBLOBJDIR)
+       @touch $(SBLOBJDIR)/.created
+
+$(SBLBINDIR)/.created:
+       @mkdir -p $(SBLBINDIR)
+       @touch $(SBLBINDIR)/.created
+
+clean:
+       @rm -f $(SBLBINDIR)/$(EXE)
+       @rm -f $(SRC_OBJS) $(SRC_DRV_OBJS) $(ENTRY_OBJ) $(SBLBINDIR)/.created $(SBLOBJDIR)/.created
+
diff --git a/packages/ti/boot/sbl/board/evmK2H/sbl_main.c b/packages/ti/boot/sbl/board/evmK2H/sbl_main.c
new file mode 100644 (file)
index 0000000..e837cbf
--- /dev/null
@@ -0,0 +1,127 @@
+/*
+ * Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ *
+ * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#include <ti/board/board.h>
+#include <ti/drv/uart/UART_stdio.h>
+#include "sbl_soc.h"
+#include "sbl_slave_core_boot.h"
+#include "sbl_ver.h"
+
+sblEntryPoint_t entry;
+typedef void (*EntryFunPtr_t)(void);
+
+int main() {
+    void (*func_ptr)(void);
+    if (SBL_socInit() < 0)
+    {
+        /* Something went wrong with init, trap here */
+        while(1);
+    }
+
+    UART_printf("\n**** PDK SBL ****\n");
+    UART_printf("%s (%s - %s)\n", SBL_VERSION_STR, __DATE__, __TIME__);
+
+    SBL_enableARMCores();
+
+    UART_printf("Begin parsing user application\n");
+    SBL_ImageCopy(&entry);
+    UART_printf("Jumping to user application...\n");
+
+    if (entry.entryPoint_DSP0 != 0)
+    {
+        SBL_DSPBringUp(0, entry.entryPoint_DSP0);
+    }
+
+    if (entry.entryPoint_DSP1 != 0)
+    {
+        SBL_DSPBringUp(1, entry.entryPoint_DSP1);
+    }
+
+    if (entry.entryPoint_DSP2 != 0)
+    {
+        SBL_DSPBringUp(2, entry.entryPoint_DSP2);
+    }
+
+    if (entry.entryPoint_DSP3 != 0)
+    {
+        SBL_DSPBringUp(3, entry.entryPoint_DSP3);
+    }
+
+    if (entry.entryPoint_DSP4 != 0)
+    {
+        SBL_DSPBringUp(4, entry.entryPoint_DSP4);
+    }
+
+    if (entry.entryPoint_DSP5 != 0)
+    {
+        SBL_DSPBringUp(5, entry.entryPoint_DSP5);
+    }
+
+    if (entry.entryPoint_DSP6 != 0)
+    {
+        SBL_DSPBringUp(6, entry.entryPoint_DSP6);
+    }
+
+    if (entry.entryPoint_DSP7 != 0)
+    {
+        SBL_DSPBringUp(7, entry.entryPoint_DSP7);
+    }
+
+    if (entry.entryPoint_MPU_CPU1 != 0)
+    {
+        SBL_ARMBringUp(1, entry.entryPoint_MPU_CPU1);
+    }
+
+    if (entry.entryPoint_MPU_CPU2 != 0)
+    {
+        SBL_ARMBringUp(2, entry.entryPoint_MPU_CPU2);
+    }
+
+    if (entry.entryPoint_MPU_CPU3 != 0)
+    {
+        SBL_ARMBringUp(3, entry.entryPoint_MPU_CPU3);
+    }
+
+    /*Jump to MPU CPU0 APP*/
+    if (entry.entryPoint_MPU_CPU0 != 0)
+    {
+        func_ptr = (EntryFunPtr_t) entry.entryPoint_MPU_CPU0;
+        func_ptr();
+    }
+    else
+    {
+        while(1);
+    }
+
+    return 0;
+}
\ No newline at end of file
diff --git a/packages/ti/boot/sbl/board/evmK2K/build/makefile b/packages/ti/boot/sbl/board/evmK2K/build/makefile
new file mode 100644 (file)
index 0000000..87f3cc7
--- /dev/null
@@ -0,0 +1,151 @@
+# Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/
+#
+#
+#  Redistribution and use in source and binary forms, with or without
+#  modification, are permitted provided that the following conditions
+#  are met:
+#
+#    Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+#
+#    Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in the
+#    documentation and/or other materials provided with the
+#    distribution.
+#
+#    Neither the name of Texas Instruments Incorporated nor the names of
+#    its contributors may be used to endorse or promote products derived
+#    from this software without specific prior written permission.
+#
+#  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+#  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+#  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+#  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+#  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+#  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+#  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+#  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+#  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+#  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+#  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+#
+# Macro definitions referenced below
+#
+
+SBL_SRC_DIR ?= $(PDK_INSTALL_PATH)/ti/boot/sbl
+SBLOBJDIR = $(SBL_SRC_DIR)/binary/$(BOARD)/$(BOOTMODE)/obj
+SBLBINDIR = $(SBL_SRC_DIR)/binary/$(BOARD)/$(BOOTMODE)/bin
+ARMV7LIBDIR ?= ./lib
+BINFLAGS = -O binary
+
+#Cross tools
+ifdef TOOLCHAIN_PATH_A15
+# Support backwards compatibility with KeyStone1 approach
+ CC = $(TOOLCHAIN_PATH_A15)/bin/$(CROSS_TOOL_PRFX)gcc
+ AC = $(TOOLCHAIN_PATH_A15)/bin/$(CROSS_TOOL_PRFX)as
+ AR = $(TOOLCHAIN_PATH_A15)/bin/$(CROSS_TOOL_PRFX)ar
+ LD = $(TOOLCHAIN_PATH_A15)/bin/$(CROSS_TOOL_PRFX)gcc
+ BIN = $(TOOLCHAIN_PATH_A15)/bin/$(CROSS_TOOL_PRFX)objcopy
+endif
+
+# INCLUDE Directories
+CSL_DIR = $(PDK_INSTALL_PATH)/ti/csl
+BOARD_DIR = $(PDK_INSTALL_PATH)/ti/board
+SBL_INC_DIR = $(SBL_SRC_DIR)/board/src
+SBL_LIB_INC_DIR = $(SBL_SRC_DIR)/src/rprc
+SBL_SOC_DIR = $(SBL_SRC_DIR)/soc
+
+# Libraries
+BOARD_LIB = "$(PDK_INSTALL_PATH)/ti/board/lib/evmK2H/a15/release/ti.board.aa15fg"
+UART_LIB = "$(PDK_INSTALL_PATH)/ti/drv/uart/lib/k2k/a15/release/ti.drv.uart.aa15fg"
+I2C_LIB = "$(PDK_INSTALL_PATH)/ti/drv/i2c/lib/k2k/a15/release/ti.drv.i2c.aa15fg"
+SPI_LIB = "$(PDK_INSTALL_PATH)/ti/drv/spi/lib/a15/release/ti.drv.spi.aa15fg"
+CSL_LIB = "$(PDK_INSTALL_PATH)/ti/csl/lib/k2k/a15/release/ti.csl.aa15fg"
+CSL_INIT_LIB = "$(PDK_INSTALL_PATH)/ti/csl/lib/k2k/a15/release/ti.csl.init.aa15fg"
+OSAL_LIB = "$(PDK_INSTALL_PATH)/ti/osal/lib/nonos/k2k/a15/release/ti.osal.aa15fg"
+
+ifeq ($(BOOTMODE), spi)
+  INTERNALDEFS += -DBOOT_SPI
+  SBL_SPI_DIR = $(SBL_SRC_DIR)/src/spi
+  INCDIR := $(CSL_DIR);$(PDK_INSTALL_PATH);$(BOARD_DIR);$(SBL_INC_DIR);$(SBL_LIB_INC_DIR);$(SBL_SPI_DIR);$(SBL_SOC_DIR);$(SBL_SOC_DIR)/k2k;$(SBL_SOC_DIR)/a15
+  PERIPHERAL_LIB = $(UART_LIB) $(I2C_LIB) $(CSL_LIB) $(CSL_INIT_LIB) $(SPI_LIB) $(OSAL_LIB)
+endif
+
+# Compiler options
+INTERNALDEFS += -g -Wall -D__ARMv7 -DA15_CORE -DSOC_K2K -mcpu=cortex-a15 -mtune=cortex-a15 -marm -mfloat-abi=hard -mfpu=neon -D$(SOC)_BUILD
+
+# Linker options
+INTERNALLINKDEFS = -g -gdwarf-3 -gstrict-dwarf -Wall  -mfloat-abi=hard -Wl,--undefined,__aeabi_uidiv -Wl,--undefined,__aeabi_idiv --entry Entry -nostartfiles -static -Wl,--gc-sections -Wl,-T $(SBL_SOC_DIR)/k2k/linker.cmd -Wl,--start-group -l"c" -lrdimon -l"m" -l"nosys" $(BOARD_LIB) $(PERIPHERAL_LIB) -Wl,--end-group $(LDFLAGS)
+
+# Executable using device independent library and device object file
+EXE=sbl.out
+
+OBJEXT = o
+ASMOBJEXT = ao
+SRCDIR = $(SBL_SRC_DIR)/board
+
+INCS = -I. -I$(strip $(subst ;, -I,$(INCDIR)))
+
+VPATH=$(SRCDIR):$(SRCDIR)/$(BOARD):$(SBL_SRC_DIR)/board/src:$(SBL_SRC_DIR)/soc/k2k:$(SBL_SRC_DIR)/soc/a15:$(PDK_INSTALL_PATH)/ti/drv/uart/soc/k2k:$(SBL_SRC_DIR)/src/$(BOOTMODE):$(SBL_SRC_DIR)/src/rprc:$(PDK_INSTALL_PATH)/ti/drv/spi/soc/k2h
+
+#List the Source Files
+SRC_C = \
+       sbl_main.c \
+       sbl_rprc.c \
+       sbl_spi.c \
+       sbl_slave_boot.c \
+       sbl_a15.c
+
+SRC_DRV = \
+    sbl_soc.c \
+    SPI_soc.c
+
+#Common entry object
+ENTRY_SRC = sbl_init.S
+
+# FLAGS for the SourceFiles
+CFLAGS += -Wall -O3
+SRC_CFLAGS = -I. $(CFLAGS) -g -gdwarf-3 -gstrict-dwarf -Wall 
+
+# Make Rule for the SRC Files
+SRC_OBJS = $(patsubst %.c, $(SBLOBJDIR)/%.$(OBJEXT), $(SRC_C))
+ENTRY_OBJ = $(patsubst %.S, $(SBLOBJDIR)/%.$(ASMOBJEXT), $(ENTRY_SRC))
+SRC_DRV_OBJS = $(patsubst %.c, $(SBLOBJDIR)/%.$(OBJEXT), $(SRC_DRV))
+
+ifeq ($(OS),Windows_NT)
+  TIIMAGE_EXE = tiimage.exe
+else
+  TIIMAGE_EXE = tiimage
+endif
+
+all:$(SBLBINDIR)/$(EXE) MLO
+
+MLO: $(SBLBINDIR)/$(EXE)
+       $(BIN) -O binary $(SBLBINDIR)/sbl.out $(SBLBINDIR)/sbl.bin
+       $(SBL_SRC_DIR)/tools/tiImageGen/bin/$(TIIMAGE_EXE) 0x0C0B0000 SPI $(SBLBINDIR)/sbl.bin $(SBLBINDIR)/MLO;
+
+$(SBLBINDIR)/$(EXE): $(SRC_OBJS) $(SRC_DRV_OBJS) $(ENTRY_OBJ) $(SBLBINDIR)/.created $(SBLOBJDIR)/.created
+       @echo linking $(SRC_OBJS) $(SRC_DRV_OBJS) $(ENTRY_OBJ) into $@ ...
+       @$(CC) $(SRC_OBJS) $(SRC_DRV_OBJS) $(ENTRY_OBJ) $(INTERNALLINKDEFS) -Wl,-Map=$(SBLBINDIR)/sbl.map -o $@
+
+$(SBLOBJDIR)/%.$(OBJEXT): %.c $(SBLOBJDIR)/.created
+       @echo compiling $< ...
+       @$(CC) -c $(SRC_CFLAGS) $(INTERNALDEFS) $(INCS)  $< -o $@
+
+$(SBLOBJDIR)/%.$(ASMOBJEXT): %.S $(SBLOBJDIR)/.created
+       @echo compiling $< ...
+       @$(CC) -c $(INTERNALDEFS) $(INCS)  $< -o $@
+
+$(SBLOBJDIR)/.created:
+       @mkdir -p $(SBLOBJDIR)
+       @touch $(SBLOBJDIR)/.created
+
+$(SBLBINDIR)/.created:
+       @mkdir -p $(SBLBINDIR)
+       @touch $(SBLBINDIR)/.created
+
+clean:
+       @rm -f $(SBLBINDIR)/$(EXE)
+       @rm -f $(SRC_OBJS) $(SRC_DRV_OBJS) $(ENTRY_OBJ) $(SBLBINDIR)/.created $(SBLOBJDIR)/.created
+
diff --git a/packages/ti/boot/sbl/board/evmK2K/sbl_main.c b/packages/ti/boot/sbl/board/evmK2K/sbl_main.c
new file mode 100644 (file)
index 0000000..ea17875
--- /dev/null
@@ -0,0 +1,125 @@
+/*
+ * Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ *
+ * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#include <ti/board/board.h>
+#include <ti/drv/uart/UART_stdio.h>
+#include "sbl_soc.h"
+#include "sbl_slave_core_boot.h"
+#include "sbl_ver.h"
+
+sblEntryPoint_t entry;
+typedef void (*EntryFunPtr_t)(void);
+
+int main() {
+    void (*func_ptr)(void);
+    if (SBL_socInit() < 0)
+    {
+        /* Something went wrong with init, trap here */
+        while(1);
+    }
+
+    UART_printf("\n**** PDK SBL ****\n");
+    UART_printf("%s (%s - %s)\n", SBL_VERSION_STR, __DATE__, __TIME__);
+
+    UART_printf("Begin parsing user application\n");
+    SBL_ImageCopy(&entry);
+    UART_printf("Jumping to user application...\n");
+
+    if (entry.entryPoint_DSP0 != 0)
+    {
+        SBL_DSPBringUp(0, entry.entryPoint_DSP0);
+    }
+
+    if (entry.entryPoint_DSP1 != 0)
+    {
+        SBL_DSPBringUp(1, entry.entryPoint_DSP1);
+    }
+
+    if (entry.entryPoint_DSP2 != 0)
+    {
+        SBL_DSPBringUp(2, entry.entryPoint_DSP2);
+    }
+
+    if (entry.entryPoint_DSP3 != 0)
+    {
+        SBL_DSPBringUp(3, entry.entryPoint_DSP3);
+    }
+
+    if (entry.entryPoint_DSP4 != 0)
+    {
+        SBL_DSPBringUp(4, entry.entryPoint_DSP4);
+    }
+
+    if (entry.entryPoint_DSP5 != 0)
+    {
+        SBL_DSPBringUp(5, entry.entryPoint_DSP5);
+    }
+
+    if (entry.entryPoint_DSP6 != 0)
+    {
+        SBL_DSPBringUp(6, entry.entryPoint_DSP6);
+    }
+
+    if (entry.entryPoint_DSP7 != 0)
+    {
+        SBL_DSPBringUp(7, entry.entryPoint_DSP7);
+    }
+
+    if (entry.entryPoint_MPU_CPU1 != 0)
+    {
+        SBL_ARMBringUp(1, entry.entryPoint_MPU_CPU1);
+    }
+
+    if (entry.entryPoint_MPU_CPU2 != 0)
+    {
+        SBL_ARMBringUp(2, entry.entryPoint_MPU_CPU2);
+    }
+
+    if (entry.entryPoint_MPU_CPU3 != 0)
+    {
+        SBL_ARMBringUp(3, entry.entryPoint_MPU_CPU3);
+    }
+
+    /*Jump to MPU CPU0 APP*/
+    if (entry.entryPoint_MPU_CPU0 != 0)
+    {
+        func_ptr = (EntryFunPtr_t) entry.entryPoint_MPU_CPU0;
+        func_ptr();
+    }
+    else
+    {
+        while(1);
+    }
+
+    return 0;
+}
\ No newline at end of file
diff --git a/packages/ti/boot/sbl/board/evmK2L/build/makefile b/packages/ti/boot/sbl/board/evmK2L/build/makefile
new file mode 100644 (file)
index 0000000..e3ec994
--- /dev/null
@@ -0,0 +1,151 @@
+# Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/
+#
+#
+#  Redistribution and use in source and binary forms, with or without
+#  modification, are permitted provided that the following conditions
+#  are met:
+#
+#    Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+#
+#    Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in the
+#    documentation and/or other materials provided with the
+#    distribution.
+#
+#    Neither the name of Texas Instruments Incorporated nor the names of
+#    its contributors may be used to endorse or promote products derived
+#    from this software without specific prior written permission.
+#
+#  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+#  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+#  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+#  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+#  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+#  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+#  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+#  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+#  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+#  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+#  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+#
+# Macro definitions referenced below
+#
+
+SBL_SRC_DIR ?= $(PDK_INSTALL_PATH)/ti/boot/sbl
+SBLOBJDIR = $(SBL_SRC_DIR)/binary/$(BOARD)/$(BOOTMODE)/obj
+SBLBINDIR = $(SBL_SRC_DIR)/binary/$(BOARD)/$(BOOTMODE)/bin
+ARMV7LIBDIR ?= ./lib
+BINFLAGS = -O binary
+
+#Cross tools
+ifdef TOOLCHAIN_PATH_A15
+# Support backwards compatibility with KeyStone1 approach
+ CC = $(TOOLCHAIN_PATH_A15)/bin/$(CROSS_TOOL_PRFX)gcc
+ AC = $(TOOLCHAIN_PATH_A15)/bin/$(CROSS_TOOL_PRFX)as
+ AR = $(TOOLCHAIN_PATH_A15)/bin/$(CROSS_TOOL_PRFX)ar
+ LD = $(TOOLCHAIN_PATH_A15)/bin/$(CROSS_TOOL_PRFX)gcc
+ BIN = $(TOOLCHAIN_PATH_A15)/bin/$(CROSS_TOOL_PRFX)objcopy
+endif
+
+# INCLUDE Directories
+CSL_DIR = $(PDK_INSTALL_PATH)/ti/csl
+BOARD_DIR = $(PDK_INSTALL_PATH)/ti/board
+SBL_INC_DIR = $(SBL_SRC_DIR)/board/src
+SBL_LIB_INC_DIR = $(SBL_SRC_DIR)/src/rprc
+SBL_SOC_DIR = $(SBL_SRC_DIR)/soc
+
+# Libraries
+BOARD_LIB = "$(PDK_INSTALL_PATH)/ti/board/lib/$(BOARD)/a15/release/ti.board.aa15fg"
+UART_LIB = "$(PDK_INSTALL_PATH)/ti/drv/uart/lib/k2l/a15/release/ti.drv.uart.aa15fg"
+I2C_LIB = "$(PDK_INSTALL_PATH)/ti/drv/i2c/lib/k2l/a15/release/ti.drv.i2c.aa15fg"
+SPI_LIB = "$(PDK_INSTALL_PATH)/ti/drv/spi/lib/a15/release/ti.drv.spi.aa15fg"
+CSL_LIB = "$(PDK_INSTALL_PATH)/ti/csl/lib/k2l/a15/release/ti.csl.aa15fg"
+CSL_INIT_LIB = "$(PDK_INSTALL_PATH)/ti/csl/lib/k2l/a15/release/ti.csl.init.aa15fg"
+OSAL_LIB = "$(PDK_INSTALL_PATH)/ti/osal/lib/nonos/k2l/a15/release/ti.osal.aa15fg"
+
+ifeq ($(BOOTMODE), spi)
+  INTERNALDEFS += -DBOOT_SPI
+  SBL_SPI_DIR = $(SBL_SRC_DIR)/src/spi
+  INCDIR := $(CSL_DIR);$(PDK_INSTALL_PATH);$(BOARD_DIR);$(SBL_INC_DIR);$(SBL_LIB_INC_DIR);$(SBL_SPI_DIR);$(SBL_SOC_DIR);$(SBL_SOC_DIR)/k2l;$(SBL_SOC_DIR)/a15
+  PERIPHERAL_LIB = $(UART_LIB) $(I2C_LIB) $(CSL_LIB) $(CSL_INIT_LIB) $(SPI_LIB) $(OSAL_LIB)
+endif
+
+# Compiler options
+INTERNALDEFS += -g -Wall -D__ARMv7 -DA15_CORE -DSOC_K2L -mcpu=cortex-a15 -mtune=cortex-a15 -marm -mfloat-abi=hard -mfpu=neon -D$(SOC)_BUILD
+
+# Linker options
+INTERNALLINKDEFS = -g -gdwarf-3 -gstrict-dwarf -Wall  -mfloat-abi=hard -Wl,--undefined,__aeabi_uidiv -Wl,--undefined,__aeabi_idiv --entry Entry -nostartfiles -static -Wl,--gc-sections -Wl,-T $(SBL_SOC_DIR)/k2l/linker.cmd -Wl,--start-group -l"c" -lrdimon -l"m" -l"nosys" $(BOARD_LIB) $(PERIPHERAL_LIB) -Wl,--end-group $(LDFLAGS)
+
+# Executable using device independent library and device object file
+EXE=sbl.out
+
+OBJEXT = o
+ASMOBJEXT = ao
+SRCDIR = $(SBL_SRC_DIR)/board
+
+INCS = -I. -I$(strip $(subst ;, -I,$(INCDIR)))
+
+VPATH=$(SRCDIR):$(SRCDIR)/$(BOARD):$(SBL_SRC_DIR)/board/src:$(SBL_SRC_DIR)/soc/k2l:$(SBL_SRC_DIR)/soc/a15:$(PDK_INSTALL_PATH)/ti/drv/uart/soc/k2l:$(SBL_SRC_DIR)/src/$(BOOTMODE):$(SBL_SRC_DIR)/src/rprc:$(PDK_INSTALL_PATH)/ti/drv/spi/soc/k2l
+
+#List the Source Files
+SRC_C = \
+       sbl_main.c \
+       sbl_rprc.c \
+       sbl_spi.c \
+       sbl_slave_boot.c \
+       sbl_a15.c
+
+SRC_DRV = \
+    sbl_soc.c \
+    SPI_soc.c
+
+#Common entry object
+ENTRY_SRC = sbl_init.S
+
+# FLAGS for the SourceFiles
+CFLAGS += -Wall -O3
+SRC_CFLAGS = -I. $(CFLAGS) -g -gdwarf-3 -gstrict-dwarf -Wall 
+
+# Make Rule for the SRC Files
+SRC_OBJS = $(patsubst %.c, $(SBLOBJDIR)/%.$(OBJEXT), $(SRC_C))
+ENTRY_OBJ = $(patsubst %.S, $(SBLOBJDIR)/%.$(ASMOBJEXT), $(ENTRY_SRC))
+SRC_DRV_OBJS = $(patsubst %.c, $(SBLOBJDIR)/%.$(OBJEXT), $(SRC_DRV))
+
+ifeq ($(OS),Windows_NT)
+  TIIMAGE_EXE = tiimage.exe
+else
+  TIIMAGE_EXE = tiimage
+endif
+
+all:$(SBLBINDIR)/$(EXE) MLO
+
+MLO: $(SBLBINDIR)/$(EXE)
+       $(BIN) -O binary $(SBLBINDIR)/sbl.out $(SBLBINDIR)/sbl.bin
+       $(SBL_SRC_DIR)/tools/tiImageGen/bin/$(TIIMAGE_EXE) 0x0C0B0000 SPI $(SBLBINDIR)/sbl.bin $(SBLBINDIR)/MLO;
+
+$(SBLBINDIR)/$(EXE): $(SRC_OBJS) $(SRC_DRV_OBJS) $(ENTRY_OBJ) $(SBLBINDIR)/.created $(SBLOBJDIR)/.created
+       @echo linking $(SRC_OBJS) $(SRC_DRV_OBJS) $(ENTRY_OBJ) into $@ ...
+       @$(CC) $(SRC_OBJS) $(SRC_DRV_OBJS) $(ENTRY_OBJ) $(INTERNALLINKDEFS) -Wl,-Map=$(SBLBINDIR)/sbl.map -o $@
+
+$(SBLOBJDIR)/%.$(OBJEXT): %.c $(SBLOBJDIR)/.created
+       @echo compiling $< ...
+       @$(CC) -c $(SRC_CFLAGS) $(INTERNALDEFS) $(INCS)  $< -o $@
+
+$(SBLOBJDIR)/%.$(ASMOBJEXT): %.S $(SBLOBJDIR)/.created
+       @echo compiling $< ...
+       @$(CC) -c $(INTERNALDEFS) $(INCS)  $< -o $@
+
+$(SBLOBJDIR)/.created:
+       @mkdir -p $(SBLOBJDIR)
+       @touch $(SBLOBJDIR)/.created
+
+$(SBLBINDIR)/.created:
+       @mkdir -p $(SBLBINDIR)
+       @touch $(SBLBINDIR)/.created
+
+clean:
+       @rm -f $(SBLBINDIR)/$(EXE)
+       @rm -f $(SRC_OBJS) $(SRC_DRV_OBJS) $(ENTRY_OBJ) $(SBLBINDIR)/.created $(SBLOBJDIR)/.created
+
diff --git a/packages/ti/boot/sbl/board/evmK2L/sbl_main.c b/packages/ti/boot/sbl/board/evmK2L/sbl_main.c
new file mode 100644 (file)
index 0000000..0e8dc79
--- /dev/null
@@ -0,0 +1,95 @@
+/*
+ * Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ *
+ * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#include <ti/board/board.h>
+#include <ti/drv/uart/UART_stdio.h>
+#include "sbl_soc.h"
+#include "sbl_slave_core_boot.h"
+#include "sbl_ver.h"
+
+sblEntryPoint_t entry;
+typedef void (*EntryFunPtr_t)(void);
+
+int main() {
+    void (*func_ptr)(void);
+    if (SBL_socInit() < 0)
+    {
+        /* Something went wrong with init, trap here */
+        while(1);
+    }
+
+    UART_printf("\n**** PDK SBL ****\n");
+    UART_printf("%s (%s - %s)\n", SBL_VERSION_STR, __DATE__, __TIME__);
+
+    UART_printf("Begin parsing user application\n");
+    SBL_ImageCopy(&entry);
+    UART_printf("Jumping to user application...\n");
+
+    if (entry.entryPoint_DSP0 != 0)
+    {
+        SBL_DSPBringUp(0, entry.entryPoint_DSP0);
+    }
+
+    if (entry.entryPoint_DSP1 != 0)
+    {
+        SBL_DSPBringUp(1, entry.entryPoint_DSP1);
+    }
+
+    if (entry.entryPoint_DSP2 != 0)
+    {
+        SBL_DSPBringUp(2, entry.entryPoint_DSP2);
+    }
+
+    if (entry.entryPoint_DSP3 != 0)
+    {
+        SBL_DSPBringUp(3, entry.entryPoint_DSP3);
+    }
+
+    if (entry.entryPoint_MPU_CPU1 != 0)
+    {
+        SBL_ARMBringUp(1, entry.entryPoint_MPU_CPU1);
+    }
+
+    /*Jump to MPU CPU0 APP*/
+    if (entry.entryPoint_MPU_CPU0 != 0)
+    {
+        func_ptr = (EntryFunPtr_t) entry.entryPoint_MPU_CPU0;
+        func_ptr();
+    }
+    else
+    {
+        while(1);
+    }
+
+    return 0;
+}
diff --git a/packages/ti/boot/sbl/board/evmOMAPL137/build/makefile b/packages/ti/boot/sbl/board/evmOMAPL137/build/makefile
new file mode 100644 (file)
index 0000000..54bb09b
--- /dev/null
@@ -0,0 +1,141 @@
+# Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/
+#
+#
+#  Redistribution and use in source and binary forms, with or without
+#  modification, are permitted provided that the following conditions
+#  are met:
+#
+#    Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+#
+#    Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in the
+#    documentation and/or other materials provided with the
+#    distribution.
+#
+#    Neither the name of Texas Instruments Incorporated nor the names of
+#    its contributors may be used to endorse or promote products derived
+#    from this software without specific prior written permission.
+#
+#  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+#  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+#  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+#  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+#  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+#  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+#  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+#  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+#  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+#  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+#  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+#
+# Macro definitions referenced below
+#
+
+SBL_SRC_DIR ?= $(PDK_INSTALL_PATH)/ti/boot/sbl
+SBLOBJDIR = $(SBL_SRC_DIR)/binary/$(BOARD)/$(BOOTMODE)/obj
+SBLBINDIR = $(SBL_SRC_DIR)/binary/$(BOARD)/$(BOOTMODE)/bin
+ARMV7LIBDIR ?= ./lib
+BINFLAGS = -O binary
+
+#Cross tools
+CC = $(C6X_GEN_INSTALL_PATH)/bin/cl6x
+
+# INCLUDE Directories
+CSL_DIR = $(PDK_INSTALL_PATH)/ti/csl
+BOARD_DIR = $(PDK_INSTALL_PATH)/ti/board
+SBL_INC_DIR = $(SBL_SRC_DIR)/board/src
+SBL_LIB_INC_DIR = $(SBL_SRC_DIR)/src/rprc
+SBL_SOC_DIR = $(SBL_SRC_DIR)/soc
+
+# Libraries
+BOARD_LIB = "$(PDK_INSTALL_PATH)/ti/board/lib/$(BOARD)/c674/release/ti.board.ae674"
+UART_LIB = "$(PDK_INSTALL_PATH)/ti/drv/uart/lib/omapl137/c674/release/ti.drv.uart.ae674"
+I2C_LIB = "$(PDK_INSTALL_PATH)/ti/drv/i2c/lib/omapl137/c674/release/ti.drv.i2c.ae674"
+SPI_LIB = "$(PDK_INSTALL_PATH)/ti/drv/spi/lib/omapl137/c674/release/ti.drv.spi.ae674"
+CSL_LIB = "$(PDK_INSTALL_PATH)/ti/csl/lib/omapl137/c674/release/ti.csl.ae674"
+CSL_INTC_LIB = "$(PDK_INSTALL_PATH)/ti/csl/lib/omapl137/c674/release/ti.csl.intc.ae674"
+OSAL_LIB = "$(PDK_INSTALL_PATH)/ti/osal/lib/nonos/omapl137/c674/release/ti.osal.ae674"
+RTSLIB_PATH = "$(C6X_GEN_INSTALL_PATH)/lib/libc.a"
+
+ifeq ($(BOOTMODE), spi)
+  INTERNALDEFS += -DBOOT_SPI
+  SBL_SPI_DIR = $(SBL_SRC_DIR)/src/spi
+  INCDIR := $(CSL_DIR);$(PDK_INSTALL_PATH);$(BOARD_DIR);$(SBL_INC_DIR);$(SBL_LIB_INC_DIR);$(SBL_SPI_DIR);$(SBL_SOC_DIR);$(SBL_SOC_DIR)/omapl137;$(C6X_GEN_INSTALL_PATH)/include
+  PERIPHERAL_LIB = $(UART_LIB) $(I2C_LIB) $(CSL_LIB) $(SPI_LIB) $(BOARD_LIB) $(OSAL_LIB) $(CSL_INTC_LIB)
+endif
+
+# Compiler options
+INTERNALDEFS += -mv64+ --abi=eabi -g --display_error_number --diag_warning=225 -g -DSOC_$(SOC) -DEVM_$(SOC) -D$(SOC)_BUILD
+
+# Linker options
+INTERNALLINKDEFS = -mv64+ -g --diag_wrap=off --diag_warning=225 --display_error_number -z $(SBL_SOC_DIR)/omapl137/linker.cmd
+
+# Executable using device independent library and device object file
+EXE=sbl.out
+
+OBJEXT = o
+ASMOBJEXT = ao
+SRCDIR = $(SBL_SRC_DIR)/board
+
+INCS = -I. -I$(strip $(subst ;, -I,$(INCDIR)))
+
+VPATH=$(SRCDIR):$(SRCDIR)/$(BOARD):$(SBL_SRC_DIR)/board/src:$(SBL_SRC_DIR)/soc/omapl137:$(PDK_INSTALL_PATH)/ti/drv/uart/soc/omapl137:$(SBL_SRC_DIR)/src/$(BOOTMODE):$(SBL_SRC_DIR)/src/rprc:$(PDK_INSTALL_PATH)/ti/drv/spi/soc/omapl137
+
+#List the Source Files
+SRC_C = \
+       sbl_main.c \
+    sbl_rprc.c \
+       sbl_spi.c
+
+SRC_DRV = \
+    sbl_soc.c \
+    sbl_slave_boot.c \
+    SPI_soc.c
+
+#Common entry object
+ENTRY_SRC =
+
+# FLAGS for the SourceFiles
+CFLAGS += 
+SRC_CFLAGS = -I. $(CFLAGS) -eo.$(OBJEXT) -ea.$(ASMOBJEXT) -g
+
+# Make Rule for the SRC Files
+SRC_OBJS = $(patsubst %.c, $(SBLOBJDIR)/%.$(OBJEXT), $(SRC_C))
+ENTRY_OBJ = $(patsubst %.asm, $(SBLOBJDIR)/%.$(ASMOBJEXT), $(ENTRY_SRC))
+SRC_DRV_OBJS = $(patsubst %.c, $(SBLOBJDIR)/%.$(OBJEXT), $(SRC_DRV))
+
+all:$(SBLBINDIR)/$(EXE) MLO
+
+MLO: $(SBLBINDIR)/$(EXE)
+ifeq ($(OS),Windows_NT)
+       $(SBL_SRC_DIR)/tools/omapl13x_boot_utils/OMAP-L137/GNU/AISUtils/HexAIS_OMAP-L137.exe -o $(SBLBINDIR)/MLO -ini $(SBL_SOC_DIR)/omapl137/omapl137.ini $(SBLBINDIR)/sbl.out;
+else
+       mono $(SBL_SRC_DIR)/tools/omapl13x_boot_utils/OMAP-L137/GNU/AISUtils/HexAIS_OMAP-L137.exe -o $(SBLBINDIR)/MLO -ini $(SBL_SOC_DIR)/omapl137/omapl137.ini $(SBLBINDIR)/sbl.out;
+endif
+
+$(SBLBINDIR)/$(EXE): $(SRC_OBJS) $(SRC_DRV_OBJS) $(ENTRY_OBJ) $(SBLBINDIR)/.created $(SBLOBJDIR)/.created
+       @echo linking $(SRC_OBJS) $(SRC_DRV_OBJS) $(ENTRY_OBJ) into $@ ...
+       @$(CC) $(SRC_OBJS) $(SRC_DRV_OBJS) $(ENTRY_OBJ) $(INTERNALLINKDEFS) -m"$(SBLBINDIR)/sbl.map" --reread_libs --rom_model -o $@ $(PERIPHERAL_LIB) $(RTSLIB_PATH)
+
+$(SBLOBJDIR)/%.$(OBJEXT): %.c $(SBLOBJDIR)/.created
+       @echo compiling $< ...
+       @$(CC) -c $(SRC_CFLAGS) $(INTERNALDEFS) $(INCS) -fr=$(SBLOBJDIR) -fs=$(SBLOBJDIR) -fc $<
+
+$(SBLOBJDIR)/%.$(ASMOBJEXT): %.asm $(SBLOBJDIR)/.created
+       @echo compiling $< ...
+       @$(CC) -c $(INTERNALDEFS) $(INCS)  $< -o $@
+
+$(SBLOBJDIR)/.created:
+       @mkdir -p $(SBLOBJDIR)
+       @touch $(SBLOBJDIR)/.created
+
+$(SBLBINDIR)/.created:
+       @mkdir -p $(SBLBINDIR)
+       @touch $(SBLBINDIR)/.created
+
+clean:
+       @rm -f $(SBLBINDIR)/$(EXE)
+       @rm -f $(SRC_OBJS) $(SRC_DRV_OBJS) $(ENTRY_OBJ) $(SBLBINDIR)/.created $(SBLOBJDIR)/.created
+
diff --git a/packages/ti/boot/sbl/board/evmOMAPL137/sbl_main.c b/packages/ti/boot/sbl/board/evmOMAPL137/sbl_main.c
new file mode 100644 (file)
index 0000000..49278fa
--- /dev/null
@@ -0,0 +1,75 @@
+/*
+ * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ *
+ * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#include <ti/board/board.h>
+#include <ti/drv/uart/UART_stdio.h>
+#include "sbl_soc.h"
+#include "sbl_slave_core_boot.h"
+#include "sbl_ver.h"
+
+sblEntryPoint_t entry;
+typedef void (*EntryFunPtr_t)(void);
+
+int main() {
+    void (*func_ptr)(void);
+    if (SBL_socInit() < 0)
+    {
+        /* Something went wrong with init, trap here */
+        while(1);
+    }
+
+    UART_printf("\n**** PDK SBL ****\n");
+    UART_printf("%s (%s - %s)\n", SBL_VERSION_STR, __DATE__, __TIME__);
+
+    UART_printf("Begin parsing user application\n");
+    SBL_ImageCopy(&entry);
+    UART_printf("Jumping to user application...\n");
+
+    if (entry.entryPoint_MPU_CPU0 != 0)
+    {
+        SBL_ARMBringUp(0, entry.entryPoint_MPU_CPU0);
+    }
+
+    /*Jump to DSP0 APP*/    
+    if (entry.entryPoint_DSP0 != 0)
+    {
+        func_ptr = (EntryFunPtr_t) entry.entryPoint_DSP0;
+        func_ptr();
+    }
+    else
+    {
+        while(1);
+    }
+
+    return 0;
+}
\ No newline at end of file
diff --git a/packages/ti/boot/sbl/board/iceK2G/build/makefile b/packages/ti/boot/sbl/board/iceK2G/build/makefile
new file mode 100644 (file)
index 0000000..06fa109
--- /dev/null
@@ -0,0 +1,183 @@
+# Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/
+#
+#
+#  Redistribution and use in source and binary forms, with or without
+#  modification, are permitted provided that the following conditions
+#  are met:
+#
+#    Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+#
+#    Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in the
+#    documentation and/or other materials provided with the
+#    distribution.
+#
+#    Neither the name of Texas Instruments Incorporated nor the names of
+#    its contributors may be used to endorse or promote products derived
+#    from this software without specific prior written permission.
+#
+#  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+#  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+#  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+#  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+#  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+#  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+#  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+#  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+#  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+#  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+#  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+#
+# Macro definitions referenced below
+#
+
+SBL_SRC_DIR ?= $(PDK_INSTALL_PATH)/ti/boot/sbl
+SBLOBJDIR = $(SBL_SRC_DIR)/binary/$(BOARD)/$(BOOTMODE)/obj
+SBLBINDIR = $(SBL_SRC_DIR)/binary/$(BOARD)/$(BOOTMODE)/bin
+ARMV7LIBDIR ?= ./lib
+BINFLAGS = -O binary
+
+#Cross tools
+ifdef TOOLCHAIN_PATH_A15
+# Support backwards compatibility with KeyStone1 approach
+ CC = $(TOOLCHAIN_PATH_A15)/bin/$(CROSS_TOOL_PRFX)gcc
+ AC = $(TOOLCHAIN_PATH_A15)/bin/$(CROSS_TOOL_PRFX)as
+ AR = $(TOOLCHAIN_PATH_A15)/bin/$(CROSS_TOOL_PRFX)ar
+ LD = $(TOOLCHAIN_PATH_A15)/bin/$(CROSS_TOOL_PRFX)gcc
+ BIN = $(TOOLCHAIN_PATH_A15)/bin/$(CROSS_TOOL_PRFX)objcopy
+endif
+
+# INCLUDE Directories
+CSL_DIR = $(PDK_INSTALL_PATH)/ti/csl
+BOARD_DIR = $(PDK_INSTALL_PATH)/ti/board
+SBL_INC_DIR = $(SBL_SRC_DIR)/board/src
+SBL_LIB_INC_DIR = $(SBL_SRC_DIR)/src/rprc
+SBL_SOC_DIR = $(SBL_SRC_DIR)/soc
+
+# Libraries
+BOARD_LIB = "$(PDK_INSTALL_PATH)/ti/board/lib/$(BOARD)/a15/release/ti.board.aa15fg"
+UART_LIB = "$(PDK_INSTALL_PATH)/ti/drv/uart/lib/k2g/a15/release/ti.drv.uart.aa15fg"
+I2C_LIB = "$(PDK_INSTALL_PATH)/ti/drv/i2c/lib/k2g/a15/release/ti.drv.i2c.aa15fg"
+MMCSD_LIB = "$(PDK_INSTALL_PATH)/ti/drv/mmcsd/lib/k2g/a15/release/ti.drv.mmcsd.aa15fg"
+FATFS_LIB = "$(PDK_INSTALL_PATH)/ti/fs/fatfs/lib/a15/release/ti.fs.fatfs.aa15fg"
+QSPI_LIB = "$(PDK_INSTALL_PATH)/ti/drv/spi/lib/a15/release/ti.drv.spi.aa15fg"
+CSL_LIB = "$(PDK_INSTALL_PATH)/ti/csl/lib/k2g/a15/release/ti.csl.aa15fg"
+CSL_INIT_LIB = "$(PDK_INSTALL_PATH)/ti/csl/lib/k2g/a15/release/ti.csl.init.aa15fg"
+OSAL_LIB = "$(PDK_INSTALL_PATH)/ti/osal/lib/nonos/k2g/a15/release/ti.osal.aa15fg"
+
+# BOOTMODE specific CFLAGS
+ifeq ($(BOOTMODE), mmcsd)
+  INTERNALDEFS += -DBOOT_MMCSD
+  SBL_MMCSD_DIR = $(SBL_SRC_DIR)/src/mmcsd
+  INCDIR := $(CSL_DIR);$(PDK_INSTALL_PATH);$(BOARD_DIR);$(SBL_INC_DIR);$(SBL_LIB_INC_DIR);$(SBL_MMCSD_DIR);$(SBL_SOC_DIR);$(SBL_SOC_DIR)/k2g;$(SBL_SOC_DIR)/a15
+  PERIPHERAL_LIB = $(UART_LIB) $(I2C_LIB) $(CSL_LIB) $(CSL_INIT_LIB) $(MMCSD_LIB) $(FATFS_LIB) $(OSAL_LIB)
+endif # ifeq ($(BOOTMODE), mmcsd)
+
+ifeq ($(BOOTMODE), qspi)
+  INTERNALDEFS += -DBOOT_QSPI
+  SBL_QSPI_DIR = $(SBL_SRC_DIR)/src/qspi
+  INCDIR := $(CSL_DIR);$(PDK_INSTALL_PATH);$(BOARD_DIR);$(SBL_INC_DIR);$(SBL_LIB_INC_DIR);$(SBL_QSPI_DIR);$(SBL_SOC_DIR);$(SBL_SOC_DIR)/k2g;$(SBL_SOC_DIR)/a15
+  PERIPHERAL_LIB = $(UART_LIB) $(I2C_LIB) $(CSL_LIB) $(CSL_INIT_LIB) $(QSPI_LIB) $(OSAL_LIB)
+endif # ifeq ($(BOOTMODE), qspi)
+
+# Compiler options
+INTERNALDEFS += -g -Wall -D__ARMv7 -DSOC_K2G -mcpu=cortex-a15 -mtune=cortex-a15 -marm -mfloat-abi=hard -mfpu=neon -D$(SOC)_BUILD -D$(BOARD)
+
+# Linker options
+INTERNALLINKDEFS = -g -gdwarf-3 -gstrict-dwarf -Wall  -mfloat-abi=hard -Wl,--undefined,__aeabi_uidiv -Wl,--undefined,__aeabi_idiv --entry Entry -nostartfiles -static -Wl,--gc-sections -Wl,-T $(SBL_SOC_DIR)/k2g/linker.cmd -Wl,--start-group -l"c" -lrdimon -l"m" -l"nosys" $(BOARD_LIB) $(PERIPHERAL_LIB) -Wl,--end-group $(LDFLAGS)
+
+# Executable using device independent library and device object file
+EXE=sbl.out
+
+OBJEXT = o
+ASMOBJEXT = ao
+SRCDIR = $(SBL_SRC_DIR)/board
+
+INCS = -I. -I$(strip $(subst ;, -I,$(INCDIR)))
+
+VPATH=$(SRCDIR):$(SRCDIR)/$(BOARD):$(SBL_SRC_DIR)/board/src:$(SBL_SRC_DIR)/soc/k2g:$(SBL_SRC_DIR)/soc/a15:$(PDK_INSTALL_PATH)/ti/drv/uart/soc/k2g:$(SBL_SRC_DIR)/src/$(BOOTMODE):$(SBL_SRC_DIR)/src/rprc:$(PDK_INSTALL_PATH)/ti/drv/mmcsd/soc/k2g:$(PDK_INSTALL_PATH)/ti/drv/spi/soc/k2g
+
+#List the Source Files
+SRC_C = \
+       sbl_main.c \
+       sbl_rprc.c \
+       sbl_slave_boot.c \
+       sbl_a15.c
+
+SRC_DRV = \
+    sbl_soc.c
+
+
+ifeq ($(BOOTMODE), qspi)
+    SRC_C += sbl_qspi.c
+    SRC_DRV += SPI_soc.c
+endif
+
+ifeq ($(BOOTMODE), mmcsd)
+    SRC_C += sbl_mmcsd.c
+    SRC_DRV += MMCSD_soc.c
+endif
+
+
+#Common entry object
+ENTRY_SRC = sbl_init.S
+
+# BOOTMODE specific CFLAGS
+ifeq ($(BOOTMODE), mmcsd)
+  INTERNALDEFS += -DBOOT_MMCSD
+  SBL_MMCSD_DIR =  $(SBL_SRC_DIR)/src/mmcsd
+  INCS += -I$(SBL_MMCSD_DIR)
+endif # ifeq ($(BOOTMODE), mmcsd)
+
+ifeq ($(BOOTMODE), qspi)
+  INTERNALDEFS += -DBOOT_QSPI
+  SBL_QSPI_DIR =  $(SBL_SRC_DIR)/src/qspi
+  INCS += -I$(SBL_QSPI_DIR)
+endif # ifeq ($(BOOTMODE), qspi)
+
+# FLAGS for the SourceFiles
+CFLAGS += -Wall
+SRC_CFLAGS = -I. $(CFLAGS) -g -gdwarf-3 -gstrict-dwarf -Wall 
+
+# Make Rule for the SRC Files
+SRC_OBJS = $(patsubst %.c, $(SBLOBJDIR)/%.$(OBJEXT), $(SRC_C))
+ENTRY_OBJ = $(patsubst %.S, $(SBLOBJDIR)/%.$(ASMOBJEXT), $(ENTRY_SRC))
+SRC_DRV_OBJS = $(patsubst %.c, $(SBLOBJDIR)/%.$(OBJEXT), $(SRC_DRV))
+
+all:$(SBLBINDIR)/$(EXE) MLO
+
+MLO: $(SBLBINDIR)/$(EXE)
+       @$(TOOLCHAIN_PATH_M4)/bin/armhex $(SBLBINDIR)/$(EXE) $(SRCDIR)/$(BOARD)/build/sbl.rmd
+       @mv sbl.hex $(SBLBINDIR)
+       @$(SBL_SRC_DIR)/tools/btoccs/b2ccs $(SBLBINDIR)/sbl.hex $(SBLBINDIR)/sbl.ccs
+       @$(SBL_SRC_DIR)/tools/ccsutil/ccsAddGphdr -infile $(SBLBINDIR)/sbl.ccs -outfile $(SBLBINDIR)/sbl.gphdr -headerEndian BE
+       @$(SBL_SRC_DIR)/tools/ccsutil/ccsAddGptlr -infile $(SBLBINDIR)/sbl.gphdr -outfile $(SBLBINDIR)/sbl.gptlr
+       @$(SBL_SRC_DIR)/tools/byteswap/byteswapccs $(SBLBINDIR)/sbl.gptlr $(SBLBINDIR)/MLO.ccs
+       @$(SBL_SRC_DIR)/tools/btoccs/ccs2bin -swap $(SBLBINDIR)/MLO.ccs $(SBLBINDIR)/MLO
+
+$(SBLBINDIR)/$(EXE): $(SRC_OBJS) $(SRC_DRV_OBJS) $(ENTRY_OBJ) $(SBLBINDIR)/.created $(SBLOBJDIR)/.created
+       @echo linking $(SRC_OBJS) $(SRC_DRV_OBJS) $(ENTRY_OBJ) into $@ ...
+       @$(CC) $(SRC_OBJS) $(SRC_DRV_OBJS) $(ENTRY_OBJ) $(INTERNALLINKDEFS) -Wl,-Map=$(SBLBINDIR)/sbl.map -o $@
+
+$(SBLOBJDIR)/%.$(OBJEXT): %.c $(SBLOBJDIR)/.created
+       @echo compiling $< ...
+       @$(CC) -c $(SRC_CFLAGS) $(INTERNALDEFS) $(INCS)  $< -o $@
+
+$(SBLOBJDIR)/%.$(ASMOBJEXT): %.S $(SBLOBJDIR)/.created
+       @echo compiling $< ...
+       @$(CC) -c $(INTERNALDEFS) $(INCS)  $< -o $@
+
+$(SBLOBJDIR)/.created:
+       @mkdir -p $(SBLOBJDIR)
+       @touch $(SBLOBJDIR)/.created
+
+$(SBLBINDIR)/.created:
+       @mkdir -p $(SBLBINDIR)
+       @touch $(SBLBINDIR)/.created
+
+clean:
+       @rm -f $(SBLBINDIR)/$(EXE)
+       @rm -f $(SRC_OBJS) $(SRC_DRV_OBJS) $(ENTRY_OBJ) $(SBLBINDIR)/.created $(SBLOBJDIR)/.created
+
diff --git a/packages/ti/boot/sbl/board/iceK2G/build/sbl.rmd b/packages/ti/boot/sbl/board/iceK2G/build/sbl.rmd
new file mode 100644 (file)
index 0000000..46f7933
--- /dev/null
@@ -0,0 +1,39 @@
+/* Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ *
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions
+ *  are met:
+ *
+ *    Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *
+ *    Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the
+ *    distribution.
+ *
+ *    Neither the name of Texas Instruments Incorporated nor the names of
+ *    its contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
+
+
+-image
+-a
+ROMS
+{
+       ROW1 : origin = 0x0C0B0000 length = 0x20000 romwidth = 32 memwidth = 32
+                       files = { sbl.hex }
+}
diff --git a/packages/ti/boot/sbl/board/iceK2G/sbl_main.c b/packages/ti/boot/sbl/board/iceK2G/sbl_main.c
new file mode 100644 (file)
index 0000000..9321da2
--- /dev/null
@@ -0,0 +1,71 @@
+/*
+ * Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ *
+ * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#include <ti/board/board.h>
+#include <ti/drv/uart/UART_stdio.h>
+#include "sbl_soc.h"
+#include "sbl_slave_core_boot.h"
+#include "sbl_ver.h"
+
+sblEntryPoint_t entry;
+typedef void (*EntryFunPtr_t)(void);
+
+int main() {
+    void (*func_ptr)(void);
+    SBL_socInit();
+
+    UART_printf("\n**** PDK SBL ****\n");
+    UART_printf("%s (%s - %s)\n", SBL_VERSION_STR, __DATE__, __TIME__);
+
+    UART_printf("Begin parsing user application\n");
+    SBL_ImageCopy(&entry);
+    UART_printf("Jumping to user application...\n");
+
+    if (entry.entryPoint_DSP0 != 0)
+    {
+        SBL_DSPBringUp(0, entry.entryPoint_DSP0);
+    }
+
+    /*Jump to MPU CPU0 APP*/
+    if (entry.entryPoint_MPU_CPU0 != 0)
+    {
+        func_ptr = (EntryFunPtr_t) entry.entryPoint_MPU_CPU0;
+        func_ptr();
+    }
+    else
+    {
+        while(1);
+    }
+
+    return 0;
+}
\ No newline at end of file
diff --git a/packages/ti/boot/sbl/board/idkAM571x/build/linker.cmd b/packages/ti/boot/sbl/board/idkAM571x/build/linker.cmd
new file mode 100644 (file)
index 0000000..ea39efd
--- /dev/null
@@ -0,0 +1,114 @@
+/**
+ *  \file linker.cmd
+ *
+ *  \brief This file is the linker script for am5x required for building
+ *         SBL with the gcc toolchain.
+ *
+ */
+
+/*
+ * Copyright (C) 2015-2017 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ *
+ * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+MEMORY
+{
+    DDR0 :   o = 0x80000400,  l = (0x40000000 - 0x400) /* external DDR Bank 0 */
+    OCMC_RAM1 (RWIX): org = 0x40300000 ,  len = 0x0001FFFF  /* OCMCRAM1 region meant for IO delay relocation */
+    MMU_TABLE (RW): org = 0x40370000, len = 0x10000 /* OCMCRAM1 region meant to hold MMU table */
+    DSP1TRAMPOLINE (RWIX): org = 0x40330000, len = 0x800 /* Memory area reserved for DSP1 Trampoline */
+    DSP2TRAMPOLINE (RWIX): org = 0x40330800, len = 0x800 /* Memory area reserved for DSP2 Trampoline */
+    SBL_MEM  (RWIX): org = 0x40331000, len = 0x0004EFFF  /* OCMCRAM1 Region meant for SBL */
+    OCMC_RAM2 (RWIX): org = 0x40400000  , len = 0x00100000  /* OCMC RAM        */
+    OCMC_RAM3 (RWIX): org = 0x40500000 ,  len = 0x00100000  /* OCMC RAM        */
+}
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+
+SECTIONS
+{
+        .startcode :
+        {
+            . = ALIGN(4);
+            *(.public.*)
+            *sbl_init.ao (.text)
+        } >SBL_MEM
+
+        .text :
+        {
+            . = ALIGN(4);
+            *(.text*)
+            *(.rodata*)
+        } >SBL_MEM
+
+        .data :
+        {
+            . = ALIGN(4);
+            *(.data*)
+        } >SBL_MEM
+
+        .bss :
+        {
+            . = ALIGN(4);
+            _bss_start = .;
+            *(.bss*)
+            *(COMMON)
+            _bss_end = .;
+        } >SBL_MEM
+
+        .heap :
+        {
+            . = ALIGN(4);
+            __end__ = .;
+            end = __end__;
+            __HeapBase = __end__;
+            *(.heap*)
+            . = . + 0x400;
+            __HeapLimit = .;
+        } >SBL_MEM
+
+        .stack :
+        {
+            . = ALIGN(8);
+            __StackLimit = . ;
+            *(.stack*)
+            . = . + 0x10000;
+            __StackTop = .;
+        } >SBL_MEM
+        _stack = __StackTop;
+        
+        SBL_MMU_TABLE :
+        {
+            *(SBL_MMU_TABLE*)
+        } > MMU_TABLE
+}
+
diff --git a/packages/ti/boot/sbl/board/idkAM571x/build/makefile b/packages/ti/boot/sbl/board/idkAM571x/build/makefile
new file mode 100644 (file)
index 0000000..be3ebcc
--- /dev/null
@@ -0,0 +1,188 @@
+# Copyright (C) 2015-2016 Texas Instruments Incorporated - http://www.ti.com/
+#
+#
+#  Redistribution and use in source and binary forms, with or without
+#  modification, are permitted provided that the following conditions
+#  are met:
+#
+#    Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+#
+#    Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in the
+#    documentation and/or other materials provided with the
+#    distribution.
+#
+#    Neither the name of Texas Instruments Incorporated nor the names of
+#    its contributors may be used to endorse or promote products derived
+#    from this software without specific prior written permission.
+#
+#  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+#  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+#  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+#  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+#  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+#  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+#  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+#  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+#  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+#  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+#  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+#
+# Macro definitions referenced below
+#
+
+IMG_LOAD_ADDR = 0x40331000
+SBL_SRC_DIR ?= $(PDK_INSTALL_PATH)/ti/boot/sbl
+SBLOBJDIR = $(SBL_SRC_DIR)/binary/$(BOARD)/$(BOOTMODE)/obj
+SBLBINDIR = $(SBL_SRC_DIR)/binary/$(BOARD)/$(BOOTMODE)/bin
+ARMV7LIBDIR ?= ./lib
+BINFLAGS = -O binary
+
+#Cross tools
+ifdef TOOLCHAIN_PATH_A15
+# Support backwards compatibility with KeyStone1 approach
+ CC = $(TOOLCHAIN_PATH_A15)/bin/$(CROSS_TOOL_PRFX)gcc
+ AC = $(TOOLCHAIN_PATH_A15)/bin/$(CROSS_TOOL_PRFX)as
+ AR = $(TOOLCHAIN_PATH_A15)/bin/$(CROSS_TOOL_PRFX)ar
+ LD = $(TOOLCHAIN_PATH_A15)/bin/$(CROSS_TOOL_PRFX)gcc
+ BIN = $(TOOLCHAIN_PATH_A15)/bin/$(CROSS_TOOL_PRFX)objcopy
+endif
+
+# INCLUDE Directories
+CSL_DIR = $(PDK_INSTALL_PATH)/ti/csl
+BOARD_DIR = $(PDK_INSTALL_PATH)/ti/board
+SBL_INC_DIR = $(SBL_SRC_DIR)/board/src
+SBL_LIB_INC_DIR = $(SBL_SRC_DIR)/src/rprc
+SBL_SOC_DIR = $(SBL_SRC_DIR)/soc
+
+# Libraries
+BOARD_LIB = "$(PDK_INSTALL_PATH)/ti/board/lib/$(BOARD)/a15/release/ti.board.aa15fg"
+UART_LIB = "$(PDK_INSTALL_PATH)/ti/drv/uart/lib/am571x/a15/release/ti.drv.uart.aa15fg"
+QSPI_LIB = "$(PDK_INSTALL_PATH)/ti/drv/spi/lib/am571x/a15/release/ti.drv.spi.aa15fg"
+I2C_LIB = "$(PDK_INSTALL_PATH)/ti/drv/i2c/lib/am571x/a15/release/ti.drv.i2c.aa15fg"
+MMCSD_LIB = "$(PDK_INSTALL_PATH)/ti/drv/mmcsd/lib/am571x/a15/release/ti.drv.mmcsd.aa15fg"
+FATFS_LIB = "$(PDK_INSTALL_PATH)/ti/fs/fatfs/lib/a15/release/ti.fs.fatfs.aa15fg"
+CSL_LIB = "$(PDK_INSTALL_PATH)/ti/csl/lib/am571x/a15/release/ti.csl.aa15fg"
+CSL_INIT_LIB = "$(PDK_INSTALL_PATH)/ti/csl/lib/am571x/a15/release/ti.csl.init.aa15fg"
+OSAL_LIB = "$(PDK_INSTALL_PATH)/ti/osal/lib/nonos/am571x/a15/release/ti.osal.aa15fg"
+PM_HAL_LIB = "$(PDK_INSTALL_PATH)/ti/drv/pm/lib/am571x/a15/release/pm_hal.aa15fg"
+
+# BOOTMODE specific CFLAGS
+ifeq ($(BOOTMODE), mmcsd)
+  INTERNALDEFS += -DBOOT_MMCSD
+  SBL_MMCSD_DIR = $(SBL_SRC_DIR)/src/mmcsd
+  INCDIR := $(CSL_DIR);$(PDK_INSTALL_PATH);$(BOARD_DIR);$(SBL_INC_DIR);$(SBL_LIB_INC_DIR);$(SBL_MMCSD_DIR);$(SBL_SOC_DIR);$(SBL_SOC_DIR)/am57xx
+  PERIPHERAL_LIB = $(UART_LIB) $(I2C_LIB) $(MMCSD_LIB) $(FATFS_LIB) $(CSL_LIB) $(CSL_INIT_LIB) $(OSAL_LIB) $(PM_HAL_LIB)
+endif # ifeq ($(BOOTMODE), mmcsd)
+
+ifeq ($(BOOTMODE), qspi)
+  INTERNALDEFS += -DBOOT_QSPI
+  SBL_QSPI_DIR = $(SBL_SRC_DIR)/src/qspi
+  INCDIR := $(CSL_DIR);$(PDK_INSTALL_PATH);$(BOARD_DIR);$(SBL_INC_DIR);$(SBL_LIB_INC_DIR);$(SBL_QSPI_DIR);$(SBL_SOC_DIR);$(SBL_SOC_DIR)/am57xx
+  PERIPHERAL_LIB = $(UART_LIB) $(QSPI_LIB) $(I2C_LIB) $(CSL_LIB) $(CSL_INIT_LIB) $(OSAL_LIB) $(PM_HAL_LIB)
+endif # ifeq ($(BOOTMODE), qspi)
+
+#Flags for opp_nom, opp_od and opp_high
+ifeq ($(OPPMODE),)
+       INTERNALDEFS += -DOPP_NOM
+else ifeq ($(OPPMODE),opp_nom)
+       INTERNALDEFS += -DOPP_NOM
+else ifeq ($(OPPMODE),opp_high)
+       INTERNALDEFS += -DOPP_HIGH
+else ifeq ($(OPPMODE),opp_od)
+       INTERNALDEFS += -DOPP_OD
+endif
+
+LIBDIR :=
+
+# Compiler options
+INTERNALDEFS += -g -gdwarf-3 -gstrict-dwarf -Wall $(DEBUG_FLAG) -D__ARMv7 -DSOC_$(SOC) -mtune=cortex-a15 -march=armv7-a -marm -mfloat-abi=hard -mfpu=neon -D$(SOC)_BUILD -D$(BOARD)
+
+# Linker options
+INTERNALLINKDEFS = -mfloat-abi=hard --specs=nano.specs -Wl,--undefined,__aeabi_uidiv -Wl,--undefined,__aeabi_idiv --entry Entry -nostartfiles -static -Wl,--gc-sections -Wl,-T $(SBL_SRC_DIR)/board/idkAM571x/build/linker.cmd -Wl,--start-group -lgcc -lc -lrdimon $(BOARD_LIB) $(PERIPHERAL_LIB) -Wl,--end-group $(LDFLAGS)
+
+# Executable using device independent library and device object file
+EXE=sbl.out
+
+OBJEXT = o
+ASMOBJEXT = ao
+SRCDIR = $(SBL_SRC_DIR)/board
+
+INCS = -I. -I$(strip $(subst ;, -I,$(INCDIR)))
+
+
+VPATH=$(SRCDIR):$(SRCDIR)/$(BOARD):$(SBL_SRC_DIR)/soc/am57xx:$(SBL_SRC_DIR)/src/$(BOOTMODE):$(SBL_SRC_DIR)/src/rprc:$(SBL_SRC_DIR)/board/src:$(PDK_INSTALL_PATH)/ti/drv/uart/soc/am571x:$(PDK_INSTALL_PATH)/ti/drv/mmcsd/soc/am57xx:$(PDK_INSTALL_PATH)/ti/drv/spi/soc/am571x
+
+#List the Source Files
+SRC_C = \
+       sbl_main.c \
+       sbl_rprc.c \
+       sbl_prcm.c \
+       sbl_slave_core_boot.c \
+       sbl_startup.c \
+       sbl_avs_config.c
+
+SRC_DRV = \
+       UART_soc.c \
+       sbl_soc.c
+
+ifeq ($(BOOTMODE), qspi)
+    SRC_C += sbl_qspi.c
+    SRC_DRV += SPI_soc.c
+endif
+
+ifeq ($(BOOTMODE), mmcsd)
+    SRC_C += sbl_mmcsd.c
+    SRC_DRV += MMCSD_soc.c
+endif
+
+#Common entry object
+ENTRY_SRC = sbl_init.S
+
+# FLAGS for the SourceFiles
+CFLAGS += -Wall -O2
+SRC_CFLAGS = -I. $(CFLAGS) -g -gdwarf-3 -gstrict-dwarf -Wall 
+
+# Make Rule for the SRC Files
+SRC_OBJS = $(patsubst %.c, $(SBLOBJDIR)/%.$(OBJEXT), $(SRC_C))
+ENTRY_OBJ = $(patsubst %.S, $(SBLOBJDIR)/%.$(ASMOBJEXT), $(ENTRY_SRC))
+SRC_DRV_OBJS = $(patsubst %.c, $(SBLOBJDIR)/%.$(OBJEXT), $(SRC_DRV))
+
+ifeq ($(OS),Windows_NT)
+  TIIMAGE_EXE = tiimage.exe
+else
+  TIIMAGE_EXE = tiimage
+endif
+
+all:$(SBLBINDIR)/$(EXE)
+
+$(SBLBINDIR)/$(EXE): $(SRC_OBJS) $(SRC_DRV_OBJS) $(ENTRY_OBJ) $(SBLBINDIR)/.created $(SBLOBJDIR)/.created
+       @echo linking $(SRC_OBJS) $(SRC_DRV_OBJS) $(ENTRY_OBJ) into $@ ...
+       @$(CC) $(SRC_OBJS) $(SRC_DRV_OBJS) $(ENTRY_OBJ) $(INTERNALLINKDEFS) -Wl,-Map=$(SBLBINDIR)/sbl.map -o $@
+       $(BIN) $(BINFLAGS) $(SBLBINDIR)/sbl.out \
+               $(SBLBINDIR)/sbl.bin
+       $(SBL_SRC_DIR)/tools/tiImageGen/bin/$(TIIMAGE_EXE) $(IMG_LOAD_ADDR) $(BOOTMODE) \
+               $(SBLBINDIR)/sbl.bin $(SBLBINDIR)/MLO;
+
+$(SBLOBJDIR)/%.$(OBJEXT): %.c $(SBLOBJDIR)/.created
+       @echo compiling $< ...
+       @$(CC) -c $(SRC_CFLAGS) $(INTERNALDEFS) $(INCS)  $< -o $@
+
+$(SBLOBJDIR)/%.$(ASMOBJEXT): %.S $(SBLOBJDIR)/.created
+       @echo compiling $< ...
+       @$(CC) -c $(SRC_CFLAGS) $(INTERNALDEFS) $(INCS)  $< -o $@
+
+$(SBLOBJDIR)/.created:
+       @mkdir -p $(SBLOBJDIR)
+       @touch $(SBLOBJDIR)/.created
+
+$(SBLBINDIR)/.created:
+       @mkdir -p $(SBLBINDIR)
+       @touch $(SBLBINDIR)/.created
+
+clean:
+       @rm -f $(SBLBINDIR)/$(EXE)
+       @rm -f $(SRC_OBJS) $(SRC_DRV_OBJS) $(ENTRY_OBJ) $(SBLBINDIR)/.created $(SBLOBJDIR)/.created
+
diff --git a/packages/ti/boot/sbl/board/idkAM571x/sbl_main.c b/packages/ti/boot/sbl/board/idkAM571x/sbl_main.c
new file mode 100644 (file)
index 0000000..973415c
--- /dev/null
@@ -0,0 +1,150 @@
+/**
+ *  \file   sbl_main.c
+ *
+ *  \brief  This file contain main function, call the Board Initialization
+ *          functions & slave core boot-up functions in sequence.
+ *
+ */
+
+/*
+ * Copyright (C) 2015-2016 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ *
+ * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+ /* TI RTOS header files */
+#include <ti/csl/cslr_device.h>
+#include <ti/board/board.h>
+#include <ti/drv/uart/UART.h>
+#include <ti/drv/uart/src/UART_osal.h>
+#include <ti/drv/uart/UART_stdio.h>
+#include <tistdtypes.h>
+#include <ti/csl/csl_a15.h>
+
+#include "sbl_slave_core_boot.h"
+#include "sbl_avs_config.h"
+#include "sbl_ver.h"
+
+/**********************************************************************
+************************** Macros ************************************
+**********************************************************************/
+
+/**********************************************************************
+************************** Internal functions ************************
+**********************************************************************/
+
+/**********************************************************************
+************************** Global Variables **************************
+**********************************************************************/
+sblEntryPoint_t idkAM571xEntry;
+
+typedef void (*EntryFunPtr_t)(void);
+
+int main()
+{
+    void (*func_ptr)(void);
+    Board_initCfg boardCfg;
+    uint32_t oppMode = OPP_MODE_NOM;
+
+    #if defined(OPP_HIGH)
+        boardCfg = BOARD_INIT_PLL_OPP_HIGH;
+        oppMode = OPP_MODE_HIGH;
+    #elif defined(OPP_OD)
+        boardCfg = BOARD_INIT_PLL_OPP_OD;
+        oppMode = OPP_MODE_OD;
+    #elif defined(OPP_NOM)
+        boardCfg = BOARD_INIT_PLL_OPP_NOM;
+        oppMode = OPP_MODE_NOM;
+    #endif
+
+    boardCfg |= BOARD_INIT_UNLOCK_MMR |
+        BOARD_INIT_MODULE_CLOCK |
+        BOARD_INIT_PINMUX_CONFIG |
+        BOARD_INIT_DDR |
+        BOARD_INIT_UART_STDIO |
+        BOARD_INIT_WATCHDOG_DISABLE;
+
+    /* Configure AVS voltage for the selected OPP to the voltage rails. */
+    SBL_Configure_AVS(oppMode);
+
+    /* Board Library Init. */
+    Board_init(boardCfg);
+
+    /* enable clocks for slave core modules. */
+    SBL_SlaveCorePrcmEnable();
+
+    UART_printf("**** PDK SBL ****\n");
+    UART_printf("%s (%s - %s)\n", SBL_VERSION_STR, __DATE__, __TIME__);
+
+    UART_printf("Begin parsing user application\n");
+
+    /* Image Copy */
+    SBL_ImageCopy(&idkAM571xEntry);
+
+    /* Cache Write back after image copy to ensure the slave cores are brought
+    ** out of reset correctly.
+    */
+    CSL_a15WbAllDataCache();
+
+    UART_printf("Jumping to user application...\n");
+
+    if (idkAM571xEntry.entryPoint_DSP1 != 0)
+    {
+        /* Release the DSP1 core out of reset */
+        SBL_DSP1_BringUp(idkAM571xEntry.entryPoint_DSP1);
+    }
+
+     if (idkAM571xEntry.entryPoint_IPU1_CPU0 != 0)
+    {
+        /* Release the IPU1 core out of reset and set the Entry point */
+        SBL_IPU1_CPU0_BringUp(idkAM571xEntry.entryPoint_IPU1_CPU0);
+    }
+
+    if (idkAM571xEntry.entryPoint_IPU1_CPU1 != 0)
+    {
+        SBL_IPU1_CPU1_BringUp(idkAM571xEntry.entryPoint_IPU1_CPU1);
+    }
+
+    /*Jump to MPU APP*/
+    if (idkAM571xEntry.entryPoint_MPU_CPU0 != 0)
+    {
+        func_ptr = (EntryFunPtr_t) idkAM571xEntry.entryPoint_MPU_CPU0;
+        CSL_a15WbAllDataCache();
+        CSL_a15InvAllInstrCache();
+        __sync_synchronize();
+        func_ptr();
+    }
+    else
+    {
+        while(1);
+    }
+
+    return 0;
+}
diff --git a/packages/ti/boot/sbl/board/idkAM572x/build/linker.cmd b/packages/ti/boot/sbl/board/idkAM572x/build/linker.cmd
new file mode 100644 (file)
index 0000000..ea39efd
--- /dev/null
@@ -0,0 +1,114 @@
+/**
+ *  \file linker.cmd
+ *
+ *  \brief This file is the linker script for am5x required for building
+ *         SBL with the gcc toolchain.
+ *
+ */
+
+/*
+ * Copyright (C) 2015-2017 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ *
+ * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+MEMORY
+{
+    DDR0 :   o = 0x80000400,  l = (0x40000000 - 0x400) /* external DDR Bank 0 */
+    OCMC_RAM1 (RWIX): org = 0x40300000 ,  len = 0x0001FFFF  /* OCMCRAM1 region meant for IO delay relocation */
+    MMU_TABLE (RW): org = 0x40370000, len = 0x10000 /* OCMCRAM1 region meant to hold MMU table */
+    DSP1TRAMPOLINE (RWIX): org = 0x40330000, len = 0x800 /* Memory area reserved for DSP1 Trampoline */
+    DSP2TRAMPOLINE (RWIX): org = 0x40330800, len = 0x800 /* Memory area reserved for DSP2 Trampoline */
+    SBL_MEM  (RWIX): org = 0x40331000, len = 0x0004EFFF  /* OCMCRAM1 Region meant for SBL */
+    OCMC_RAM2 (RWIX): org = 0x40400000  , len = 0x00100000  /* OCMC RAM        */
+    OCMC_RAM3 (RWIX): org = 0x40500000 ,  len = 0x00100000  /* OCMC RAM        */
+}
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+
+SECTIONS
+{
+        .startcode :
+        {
+            . = ALIGN(4);
+            *(.public.*)
+            *sbl_init.ao (.text)
+        } >SBL_MEM
+
+        .text :
+        {
+            . = ALIGN(4);
+            *(.text*)
+            *(.rodata*)
+        } >SBL_MEM
+
+        .data :
+        {
+            . = ALIGN(4);
+            *(.data*)
+        } >SBL_MEM
+
+        .bss :
+        {
+            . = ALIGN(4);
+            _bss_start = .;
+            *(.bss*)
+            *(COMMON)
+            _bss_end = .;
+        } >SBL_MEM
+
+        .heap :
+        {
+            . = ALIGN(4);
+            __end__ = .;
+            end = __end__;
+            __HeapBase = __end__;
+            *(.heap*)
+            . = . + 0x400;
+            __HeapLimit = .;
+        } >SBL_MEM
+
+        .stack :
+        {
+            . = ALIGN(8);
+            __StackLimit = . ;
+            *(.stack*)
+            . = . + 0x10000;
+            __StackTop = .;
+        } >SBL_MEM
+        _stack = __StackTop;
+        
+        SBL_MMU_TABLE :
+        {
+            *(SBL_MMU_TABLE*)
+        } > MMU_TABLE
+}
+
diff --git a/packages/ti/boot/sbl/board/idkAM572x/build/makefile b/packages/ti/boot/sbl/board/idkAM572x/build/makefile
new file mode 100644 (file)
index 0000000..bf3ce92
--- /dev/null
@@ -0,0 +1,187 @@
+# Copyright (C) 2015-2016 Texas Instruments Incorporated - http://www.ti.com/
+#
+#
+#  Redistribution and use in source and binary forms, with or without
+#  modification, are permitted provided that the following conditions
+#  are met:
+#
+#    Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+#
+#    Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in the
+#    documentation and/or other materials provided with the
+#    distribution.
+#
+#    Neither the name of Texas Instruments Incorporated nor the names of
+#    its contributors may be used to endorse or promote products derived
+#    from this software without specific prior written permission.
+#
+#  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+#  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+#  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+#  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+#  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+#  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+#  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+#  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+#  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+#  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+#  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+#
+# Macro definitions referenced below
+#
+
+IMG_LOAD_ADDR = 0x40331000
+SBL_SRC_DIR ?= $(PDK_INSTALL_PATH)/ti/boot/sbl
+SBLOBJDIR = $(SBL_SRC_DIR)/binary/$(BOARD)/$(BOOTMODE)/obj
+SBLBINDIR = $(SBL_SRC_DIR)/binary/$(BOARD)/$(BOOTMODE)/bin
+ARMV7LIBDIR ?= ./lib
+BINFLAGS = -O binary
+
+#Cross tools
+ifdef TOOLCHAIN_PATH_A15
+# Support backwards compatibility with KeyStone1 approach
+ CC = $(TOOLCHAIN_PATH_A15)/bin/$(CROSS_TOOL_PRFX)gcc
+ AC = $(TOOLCHAIN_PATH_A15)/bin/$(CROSS_TOOL_PRFX)as
+ AR = $(TOOLCHAIN_PATH_A15)/bin/$(CROSS_TOOL_PRFX)ar
+ LD = $(TOOLCHAIN_PATH_A15)/bin/$(CROSS_TOOL_PRFX)gcc
+ BIN = $(TOOLCHAIN_PATH_A15)/bin/$(CROSS_TOOL_PRFX)objcopy
+endif
+
+# INCLUDE Directories
+CSL_DIR = $(PDK_INSTALL_PATH)/ti/csl
+BOARD_DIR = $(PDK_INSTALL_PATH)/ti/board
+SBL_INC_DIR = $(SBL_SRC_DIR)/board/src
+SBL_LIB_INC_DIR = $(SBL_SRC_DIR)/src/rprc
+SBL_SOC_DIR = $(SBL_SRC_DIR)/soc
+
+# Libraries
+BOARD_LIB = "$(PDK_INSTALL_PATH)/ti/board/lib/$(BOARD)/a15/release/ti.board.aa15fg"
+UART_LIB = "$(PDK_INSTALL_PATH)/ti/drv/uart/lib/am572x/a15/release/ti.drv.uart.aa15fg"
+QSPI_LIB = "$(PDK_INSTALL_PATH)/ti/drv/spi/lib/am572x/a15/release/ti.drv.spi.aa15fg"
+I2C_LIB = "$(PDK_INSTALL_PATH)/ti/drv/i2c/lib/am572x/a15/release/ti.drv.i2c.aa15fg"
+MMCSD_LIB = "$(PDK_INSTALL_PATH)/ti/drv/mmcsd/lib/am572x/a15/release/ti.drv.mmcsd.aa15fg"
+FATFS_LIB = "$(PDK_INSTALL_PATH)/ti/fs/fatfs/lib/a15/release/ti.fs.fatfs.aa15fg"
+CSL_LIB = "$(PDK_INSTALL_PATH)/ti/csl/lib/am572x/a15/release/ti.csl.aa15fg"
+CSL_INIT_LIB = "$(PDK_INSTALL_PATH)/ti/csl/lib/am572x/a15/release/ti.csl.init.aa15fg"
+OSAL_LIB = "$(PDK_INSTALL_PATH)/ti/osal/lib/nonos/am572x/a15/release/ti.osal.aa15fg"
+PM_HAL_LIB = "$(PDK_INSTALL_PATH)/ti/drv/pm/lib/am572x/a15/release/pm_hal.aa15fg"
+
+# BOOTMODE specific CFLAGS
+ifeq ($(BOOTMODE), mmcsd)
+  INTERNALDEFS += -DBOOT_MMCSD
+  SBL_MMCSD_DIR =  $(SBL_SRC_DIR)/src/mmcsd
+  INCDIR := $(CSL_DIR);$(PDK_INSTALL_PATH);$(BOARD_DIR);$(SBL_INC_DIR);$(SBL_LIB_INC_DIR);$(SBL_MMCSD_DIR);$(SBL_SOC_DIR);$(SBL_SOC_DIR)/am57xx
+  PERIPHERAL_LIB = $(UART_LIB) $(I2C_LIB) $(MMCSD_LIB) $(FATFS_LIB) $(CSL_LIB) $(CSL_INIT_LIB) $(OSAL_LIB) $(PM_HAL_LIB)
+endif # ifeq ($(BOOTMODE), mmcsd)
+
+ifeq ($(BOOTMODE), qspi)
+  INTERNALDEFS += -DBOOT_QSPI
+  SBL_QSPI_DIR =  $(SBL_SRC_DIR)/src/qspi
+  INCDIR := $(CSL_DIR);$(PDK_INSTALL_PATH);$(BOARD_DIR);$(SBL_INC_DIR);$(SBL_LIB_INC_DIR);$(SBL_QSPI_DIR);$(SBL_SOC_DIR);$(SBL_SOC_DIR)/am57xx
+  PERIPHERAL_LIB = $(UART_LIB) $(QSPI_LIB) $(I2C_LIB) $(CSL_LIB) $(CSL_INIT_LIB) $(OSAL_LIB) $(PM_HAL_LIB)
+endif # ifeq ($(BOOTMODE), qspi)
+
+#Flags for opp_nom, opp_od and opp_high
+ifeq ($(OPPMODE),)
+       INTERNALDEFS += -DOPP_NOM
+else ifeq ($(OPPMODE),opp_nom)
+       INTERNALDEFS += -DOPP_NOM
+else ifeq ($(OPPMODE),opp_high)
+       INTERNALDEFS += -DOPP_HIGH
+else ifeq ($(OPPMODE),opp_od)
+       INTERNALDEFS += -DOPP_OD
+endif
+
+LIBDIR :=
+
+# Compiler options
+INTERNALDEFS += -g -gdwarf-3 -gstrict-dwarf -Wall $(DEBUG_FLAG) -D__ARMv7 -DSOC_$(SOC) -mtune=cortex-a15 -march=armv7-a -marm -mfloat-abi=hard -mfpu=neon -D$(SOC)_BUILD -D$(BOARD)
+
+# Linker options
+INTERNALLINKDEFS = -mfloat-abi=hard --specs=nano.specs -Wl,--undefined,__aeabi_uidiv -Wl,--undefined,__aeabi_idiv --entry Entry -nostartfiles -static -Wl,--gc-sections -Wl,-T $(SBL_SRC_DIR)/board/idkAM572x/build/linker.cmd -Wl,--start-group -lgcc -lc -lrdimon $(BOARD_LIB) $(PERIPHERAL_LIB) -Wl,--end-group $(LDFLAGS)
+
+# Executable using device independent library and device object file
+EXE=sbl.out
+
+OBJEXT = o
+ASMOBJEXT = ao
+SRCDIR = $(SBL_SRC_DIR)/board
+
+INCS = -I. -I$(strip $(subst ;, -I,$(INCDIR)))
+
+VPATH=$(SRCDIR):$(SRCDIR)/$(BOARD):$(SBL_SRC_DIR)/soc/am57xx:$(SBL_SRC_DIR)/src/$(BOOTMODE):$(SBL_SRC_DIR)/src/rprc:$(SBL_SRC_DIR)/board/src:$(PDK_INSTALL_PATH)/ti/drv/uart/soc/am572x:$(PDK_INSTALL_PATH)/ti/drv/mmcsd/soc/am57xx:$(PDK_INSTALL_PATH)/ti/drv/spi/soc/am572x
+
+#List the Source Files
+SRC_C = \
+       sbl_main.c \
+       sbl_rprc.c \
+       sbl_prcm.c \
+       sbl_slave_core_boot.c \
+       sbl_startup.c \
+       sbl_avs_config.c
+
+SRC_DRV = \
+       UART_soc.c \
+       sbl_soc.c
+
+ifeq ($(BOOTMODE), qspi)
+    SRC_C += sbl_qspi.c
+    SRC_DRV += SPI_soc.c
+endif
+
+ifeq ($(BOOTMODE), mmcsd)
+    SRC_C += sbl_mmcsd.c
+    SRC_DRV += MMCSD_soc.c
+endif
+
+#Common entry object
+ENTRY_SRC = sbl_init.S
+
+# FLAGS for the SourceFiles
+CFLAGS += -Wall -O2
+SRC_CFLAGS = -I. $(CFLAGS) -g -gdwarf-3 -gstrict-dwarf -Wall 
+
+# Make Rule for the SRC Files
+SRC_OBJS = $(patsubst %.c, $(SBLOBJDIR)/%.$(OBJEXT), $(SRC_C))
+ENTRY_OBJ = $(patsubst %.S, $(SBLOBJDIR)/%.$(ASMOBJEXT), $(ENTRY_SRC))
+SRC_DRV_OBJS = $(patsubst %.c, $(SBLOBJDIR)/%.$(OBJEXT), $(SRC_DRV))
+
+ifeq ($(OS),Windows_NT)
+  TIIMAGE_EXE = tiimage.exe
+else
+  TIIMAGE_EXE = tiimage
+endif
+
+all:$(SBLBINDIR)/$(EXE)
+
+$(SBLBINDIR)/$(EXE): $(SRC_OBJS) $(SRC_DRV_OBJS) $(ENTRY_OBJ) $(SBLBINDIR)/.created $(SBLOBJDIR)/.created
+       @echo linking $(SRC_OBJS) $(SRC_DRV_OBJS) $(ENTRY_OBJ) into $@ ...
+       @$(CC) $(SRC_OBJS) $(SRC_DRV_OBJS) $(ENTRY_OBJ) $(INTERNALLINKDEFS) -Wl,-Map=$(SBLBINDIR)/sbl.map -o $@
+       $(BIN) $(BINFLAGS) $(SBLBINDIR)/sbl.out \
+               $(SBLBINDIR)/sbl.bin
+        $(SBL_SRC_DIR)/tools/tiImageGen/bin/$(TIIMAGE_EXE) $(IMG_LOAD_ADDR) $(BOOTMODE) \
+               $(SBLBINDIR)/sbl.bin $(SBLBINDIR)/MLO;
+
+$(SBLOBJDIR)/%.$(OBJEXT): %.c $(SBLOBJDIR)/.created
+       @echo compiling $< ...
+       @$(CC) -c $(SRC_CFLAGS) $(INTERNALDEFS) $(INCS)  $< -o $@
+
+$(SBLOBJDIR)/%.$(ASMOBJEXT): %.S $(SBLOBJDIR)/.created
+       @echo compiling $< ...
+       @$(CC) -c $(SRC_CFLAGS) $(INTERNALDEFS) $(INCS)  $< -o $@
+
+$(SBLOBJDIR)/.created:
+       @mkdir -p $(SBLOBJDIR)
+       @touch $(SBLOBJDIR)/.created
+
+$(SBLBINDIR)/.created:
+       @mkdir -p $(SBLBINDIR)
+       @touch $(SBLBINDIR)/.created
+
+clean:
+       @rm -f $(SBLBINDIR)/$(EXE)
+       @rm -f $(SRC_OBJS) $(SRC_DRV_OBJS) $(ENTRY_OBJ) $(SBLBINDIR)/.created $(SBLOBJDIR)/.created
+
diff --git a/packages/ti/boot/sbl/board/idkAM572x/sbl_main.c b/packages/ti/boot/sbl/board/idkAM572x/sbl_main.c
new file mode 100644 (file)
index 0000000..5738cf5
--- /dev/null
@@ -0,0 +1,173 @@
+/**
+ *  \file   sbl_main.c
+ *
+ *  \brief  This file contain main function, call the Board Initialization
+ *          functions & slave core boot-up functions in sequence.
+ *
+ */
+
+/*
+ * Copyright (C) 2015-2016 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ *
+ * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+ /* TI RTOS header files */
+#include <ti/csl/cslr_device.h>
+#include <ti/board/board.h>
+#include <ti/drv/uart/UART.h>
+#include <ti/drv/uart/src/UART_osal.h>
+#include <ti/drv/uart/UART_stdio.h>
+#include <ti/csl/tistdtypes.h>
+#include <ti/csl/csl_a15.h>
+
+#include "sbl_slave_core_boot.h"
+#include "sbl_avs_config.h"
+#include "sbl_ver.h"
+
+/**********************************************************************
+ ************************** Macros ************************************
+ **********************************************************************/
+
+/**********************************************************************
+ ************************** Internal functions ************************
+ **********************************************************************/
+
+/**********************************************************************
+ ************************** Global Variables **************************
+ **********************************************************************/
+sblEntryPoint_t idkAM572xEntry;
+
+typedef void (*EntryFunPtr_t)(void);
+
+int main()
+{
+    void (*func_ptr)(void);
+    Board_initCfg boardCfg;
+    uint32_t oppMode = OPP_MODE_NOM;
+
+    #if defined(OPP_HIGH)
+        boardCfg = BOARD_INIT_PLL_OPP_HIGH;
+        oppMode = OPP_MODE_HIGH;
+    #elif defined(OPP_OD)
+        boardCfg = BOARD_INIT_PLL_OPP_OD;
+         oppMode = OPP_MODE_OD;
+    #elif defined(OPP_NOM)
+        boardCfg = BOARD_INIT_PLL_OPP_NOM;
+        oppMode = OPP_MODE_NOM;
+    #endif
+
+    boardCfg |= BOARD_INIT_UNLOCK_MMR |
+        BOARD_INIT_MODULE_CLOCK |
+        BOARD_INIT_PINMUX_CONFIG |
+        BOARD_INIT_DDR |
+        BOARD_INIT_UART_STDIO |
+        BOARD_INIT_WATCHDOG_DISABLE;
+
+    /* Configure AVS voltage for the selected OPP to the voltage rails. */
+    SBL_Configure_AVS(oppMode);
+
+    /* Board Library Init. */
+    Board_init(boardCfg);
+
+    /* enable clocks for slave core modules. */
+    SBL_SlaveCorePrcmEnable();
+
+    UART_printf("**** PDK SBL ****\n");
+    UART_printf("%s (%s - %s)\n", SBL_VERSION_STR, __DATE__, __TIME__);
+
+    UART_printf("Begin parsing user application\n");
+    /* Image Copy */
+    SBL_ImageCopy(&idkAM572xEntry);
+
+    /* Cache Write back after image copy to ensure the slave cores are brought
+    ** out of reset correctly.
+    */
+    CSL_a15WbAllDataCache();
+
+    UART_printf("Jumping to user application...\n");
+
+    if (idkAM572xEntry.entryPoint_MPU_CPU1 != 0)
+    {
+        /* Bring the A15 CPU1 core out of reset. */
+        SBL_MPU_CPU1_BringUp(idkAM572xEntry.entryPoint_MPU_CPU1);
+    }
+
+    if (idkAM572xEntry.entryPoint_DSP1 != 0)
+    {
+        /* Release the DSP1 core out of reset */
+        SBL_DSP1_BringUp(idkAM572xEntry.entryPoint_DSP1);
+    }
+
+    if (idkAM572xEntry.entryPoint_DSP2 != 0)
+    {
+        /* Release the DSP2 core out of reset */
+        SBL_DSP2_BringUp(idkAM572xEntry.entryPoint_DSP2);
+    }
+
+    if (idkAM572xEntry.entryPoint_IPU1_CPU0 != 0)
+    {
+        /* Release the IPU1 core out of reset and set the Entry point */
+        SBL_IPU1_CPU0_BringUp(idkAM572xEntry.entryPoint_IPU1_CPU0);
+    }
+
+    if (idkAM572xEntry.entryPoint_IPU1_CPU1 != 0)
+    {
+        SBL_IPU1_CPU1_BringUp(idkAM572xEntry.entryPoint_IPU1_CPU1);
+    }
+
+    if (idkAM572xEntry.entryPoint_IPU2_CPU0 != 0)
+    {
+        /* Release the IPU2 core out of reset and set the Entry point */
+        SBL_IPU2_CPU0_BringUp(idkAM572xEntry.entryPoint_IPU2_CPU0);
+    }
+
+    if (idkAM572xEntry.entryPoint_IPU2_CPU1 != 0)
+    {
+        /* Release the IPU2 CPU1 core out of reset and set the Entry point */
+        SBL_IPU2_CPU1_BringUp(idkAM572xEntry.entryPoint_IPU2_CPU1);
+    }
+
+    /*Jump to MPU CPU0 APP*/
+    if (idkAM572xEntry.entryPoint_MPU_CPU0 != 0)
+    {
+        func_ptr = (EntryFunPtr_t) idkAM572xEntry.entryPoint_MPU_CPU0;
+        CSL_a15WbAllDataCache();
+        CSL_a15InvAllInstrCache();
+        __sync_synchronize();
+        func_ptr();
+    }
+    else
+    {
+        while(1);
+    }
+
+    return 0;
+}
diff --git a/packages/ti/boot/sbl/board/idkAM574x/build/linker.cmd b/packages/ti/boot/sbl/board/idkAM574x/build/linker.cmd
new file mode 100644 (file)
index 0000000..812b147
--- /dev/null
@@ -0,0 +1,114 @@
+/**
+ *  \file linker.cmd
+ *
+ *  \brief This file is the linker script for am5x required for building
+ *         SBL with the gcc toolchain.
+ *
+ */
+
+/*
+ * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ *
+ * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+MEMORY
+{
+    DDR0 :   o = 0x80000400,  l = (0x40000000 - 0x400) /* external DDR Bank 0 */
+    OCMC_RAM1 (RWIX): org = 0x40300000 ,  len = 0x0001FFFF  /* OCMCRAM1 region meant for IO delay relocation */
+    MMU_TABLE (RW): org = 0x40370000, len = 0x10000 /* OCMCRAM1 region meant to hold MMU table */
+    DSP1TRAMPOLINE (RWIX): org = 0x40330000, len = 0x800 /* Memory area reserved for DSP1 Trampoline */
+    DSP2TRAMPOLINE (RWIX): org = 0x40330800, len = 0x800 /* Memory area reserved for DSP2 Trampoline */
+    SBL_MEM  (RWIX): org = 0x40331000, len = 0x0004EFFF  /* OCMCRAM1 Region meant for SBL */
+    OCMC_RAM2 (RWIX): org = 0x40400000  , len = 0x00100000  /* OCMC RAM        */
+    OCMC_RAM3 (RWIX): org = 0x40500000 ,  len = 0x00100000  /* OCMC RAM        */
+}
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+
+SECTIONS
+{
+        .startcode :
+        {
+            . = ALIGN(4);
+            *(.public.*)
+            *sbl_init.ao (.text)
+        } >SBL_MEM
+
+        .text :
+        {
+            . = ALIGN(4);
+            *(.text*)
+            *(.rodata*)
+        } >SBL_MEM
+
+        .data :
+        {
+            . = ALIGN(4);
+            *(.data*)
+        } >SBL_MEM
+
+        .bss :
+        {
+            . = ALIGN(4);
+            _bss_start = .;
+            *(.bss*)
+            *(COMMON)
+            _bss_end = .;
+        } >SBL_MEM
+
+        .heap :
+        {
+            . = ALIGN(4);
+            __end__ = .;
+            end = __end__;
+            __HeapBase = __end__;
+            *(.heap*)
+            . = . + 0x400;
+            __HeapLimit = .;
+        } >SBL_MEM
+
+        .stack :
+        {
+            . = ALIGN(8);
+            __StackLimit = . ;
+            *(.stack*)
+            . = . + 0x10000;
+            __StackTop = .;
+        } >SBL_MEM
+        _stack = __StackTop;
+        
+        SBL_MMU_TABLE :
+        {
+            *(SBL_MMU_TABLE*)
+        } > MMU_TABLE
+}
+
diff --git a/packages/ti/boot/sbl/board/idkAM574x/build/makefile b/packages/ti/boot/sbl/board/idkAM574x/build/makefile
new file mode 100644 (file)
index 0000000..7ee97f9
--- /dev/null
@@ -0,0 +1,191 @@
+# Copyright (C) 2015-2017 Texas Instruments Incorporated - http://www.ti.com/
+#
+#
+#  Redistribution and use in source and binary forms, with or without
+#  modification, are permitted provided that the following conditions
+#  are met:
+#
+#    Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+#
+#    Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in the
+#    documentation and/or other materials provided with the
+#    distribution.
+#
+#    Neither the name of Texas Instruments Incorporated nor the names of
+#    its contributors may be used to endorse or promote products derived
+#    from this software without specific prior written permission.
+#
+#  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+#  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+#  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+#  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+#  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+#  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+#  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+#  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+#  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+#  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+#  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+#
+# Macro definitions referenced below
+#
+
+IMG_LOAD_ADDR = 0x40331000
+SBL_SRC_DIR ?= $(PDK_INSTALL_PATH)/ti/boot/sbl
+SBLOBJDIR = $(SBL_SRC_DIR)/binary/$(BOARD)/$(BOOTMODE)/obj
+SBLBINDIR = $(SBL_SRC_DIR)/binary/$(BOARD)/$(BOOTMODE)/bin
+ARMV7LIBDIR ?= ./lib
+BINFLAGS = -O binary
+
+#Cross tools
+ifdef TOOLCHAIN_PATH_A15
+# Support backwards compatibility with KeyStone1 approach
+ CC = $(TOOLCHAIN_PATH_A15)/bin/$(CROSS_TOOL_PRFX)gcc
+ AC = $(TOOLCHAIN_PATH_A15)/bin/$(CROSS_TOOL_PRFX)as
+ AR = $(TOOLCHAIN_PATH_A15)/bin/$(CROSS_TOOL_PRFX)ar
+ LD = $(TOOLCHAIN_PATH_A15)/bin/$(CROSS_TOOL_PRFX)gcc
+ BIN = $(TOOLCHAIN_PATH_A15)/bin/$(CROSS_TOOL_PRFX)objcopy
+endif
+
+# INCLUDE Directories
+CSL_DIR = $(PDK_INSTALL_PATH)/ti/csl
+BOARD_DIR = $(PDK_INSTALL_PATH)/ti/board
+SBL_INC_DIR = $(SBL_SRC_DIR)/board/src
+SBL_LIB_INC_DIR = $(SBL_SRC_DIR)/src/rprc
+SBL_SOC_DIR = $(SBL_SRC_DIR)/soc
+
+# Libraries
+BOARD_LIB = "$(PDK_INSTALL_PATH)/ti/board/lib/$(BOARD)/a15/release/ti.board.aa15fg"
+UART_LIB = "$(PDK_INSTALL_PATH)/ti/drv/uart/lib/am574x/a15/release/ti.drv.uart.aa15fg"
+QSPI_LIB = "$(PDK_INSTALL_PATH)/ti/drv/spi/lib/am574x/a15/release/ti.drv.spi.aa15fg"
+I2C_LIB = "$(PDK_INSTALL_PATH)/ti/drv/i2c/lib/am574x/a15/release/ti.drv.i2c.aa15fg"
+MMCSD_LIB = "$(PDK_INSTALL_PATH)/ti/drv/mmcsd/lib/am574x/a15/release/ti.drv.mmcsd.aa15fg"
+FATFS_LIB = "$(PDK_INSTALL_PATH)/ti/fs/fatfs/lib/a15/release/ti.fs.fatfs.aa15fg"
+CSL_LIB = "$(PDK_INSTALL_PATH)/ti/csl/lib/am574x/a15/release/ti.csl.aa15fg"
+CSL_INIT_LIB = "$(PDK_INSTALL_PATH)/ti/csl/lib/am574x/a15/release/ti.csl.init.aa15fg"
+OSAL_LIB = "$(PDK_INSTALL_PATH)/ti/osal/lib/nonos/am574x/a15/release/ti.osal.aa15fg"
+PM_HAL_LIB = "$(PDK_INSTALL_PATH)/ti/drv/pm/lib/am574x/a15/release/pm_hal.aa15fg"
+
+# BOOTMODE specific CFLAGS
+ifeq ($(BOOTMODE), mmcsd)
+  INTERNALDEFS += -DBOOT_MMCSD
+  SBL_MMCSD_DIR =  $(SBL_SRC_DIR)/src/mmcsd
+  INCDIR := $(CSL_DIR);$(PDK_INSTALL_PATH);$(BOARD_DIR);$(SBL_INC_DIR);$(SBL_LIB_INC_DIR);$(SBL_MMCSD_DIR);$(SBL_SOC_DIR);$(SBL_SOC_DIR)/am57xx
+  PERIPHERAL_LIB = $(UART_LIB) $(I2C_LIB) $(MMCSD_LIB) $(FATFS_LIB) $(CSL_LIB) $(CSL_INIT_LIB) $(OSAL_LIB) $(PM_HAL_LIB)
+endif # ifeq ($(BOOTMODE), mmcsd)
+
+ifeq ($(BOOTMODE), qspi)
+  INTERNALDEFS += -DBOOT_QSPI
+  SBL_QSPI_DIR =  $(SBL_SRC_DIR)/src/qspi
+  INCDIR := $(CSL_DIR);$(PDK_INSTALL_PATH);$(BOARD_DIR);$(SBL_INC_DIR);$(SBL_LIB_INC_DIR);$(SBL_QSPI_DIR);$(SBL_SOC_DIR);$(SBL_SOC_DIR)/am57xx
+  PERIPHERAL_LIB = $(UART_LIB) $(QSPI_LIB) $(I2C_LIB) $(CSL_LIB) $(CSL_INIT_LIB) $(OSAL_LIB) $(PM_HAL_LIB)
+endif # ifeq ($(BOOTMODE), qspi)
+
+ifeq ($(DDRECC), yes)
+       INTERNALDEFS += -DSBL_DDR_ECC
+endif
+
+#Flags for opp_nom, opp_od and opp_high
+ifeq ($(OPPMODE),)
+       INTERNALDEFS += -DOPP_NOM
+else ifeq ($(OPPMODE),opp_nom)
+       INTERNALDEFS += -DOPP_NOM
+else ifeq ($(OPPMODE),opp_high)
+       INTERNALDEFS += -DOPP_HIGH
+else ifeq ($(OPPMODE),opp_od)
+       INTERNALDEFS += -DOPP_OD
+endif
+
+LIBDIR :=
+
+# Compiler options
+INTERNALDEFS += -g -gdwarf-3 -gstrict-dwarf -Wall $(DEBUG_FLAG) -D__ARMv7 -DSOC_$(SOC) -mtune=cortex-a15 -march=armv7-a -marm -mfloat-abi=hard -mfpu=neon -D$(SOC)_BUILD -D$(BOARD)
+
+# Linker options
+INTERNALLINKDEFS = -mfloat-abi=hard --specs=nano.specs -Wl,--undefined,__aeabi_uidiv -Wl,--undefined,__aeabi_idiv --entry Entry -nostartfiles -static -Wl,--gc-sections -Wl,-T $(SBL_SRC_DIR)/board/idkAM574x/build/linker.cmd -Wl,--start-group -lgcc -lc -lrdimon $(BOARD_LIB) $(PERIPHERAL_LIB) -Wl,--end-group $(LDFLAGS)
+
+# Executable using device independent library and device object file
+EXE=sbl.out
+
+OBJEXT = o
+ASMOBJEXT = ao
+SRCDIR = $(SBL_SRC_DIR)/board
+
+INCS = -I. -I$(strip $(subst ;, -I,$(INCDIR)))
+
+VPATH=$(SRCDIR):$(SRCDIR)/$(BOARD):$(SBL_SRC_DIR)/soc/am57xx:$(SBL_SRC_DIR)/src/$(BOOTMODE):$(SBL_SRC_DIR)/src/rprc:$(SBL_SRC_DIR)/board/src:$(PDK_INSTALL_PATH)/ti/drv/uart/soc/am574x:$(PDK_INSTALL_PATH)/ti/drv/mmcsd/soc/am57xx:$(PDK_INSTALL_PATH)/ti/drv/spi/soc/am574x
+
+#List the Source Files
+SRC_C = \
+       sbl_main.c \
+       sbl_rprc.c \
+       sbl_prcm.c \
+       sbl_slave_core_boot.c \
+       sbl_startup.c \
+       sbl_avs_config.c
+
+SRC_DRV = \
+       UART_soc.c \
+       sbl_soc.c
+
+ifeq ($(BOOTMODE), qspi)
+    SRC_C += sbl_qspi.c
+    SRC_DRV += SPI_soc.c
+endif
+
+ifeq ($(BOOTMODE), mmcsd)
+    SRC_C += sbl_mmcsd.c
+    SRC_DRV += MMCSD_soc.c
+endif
+
+#Common entry object
+ENTRY_SRC = sbl_init.S
+
+# FLAGS for the SourceFiles
+CFLAGS += -Wall -O2
+SRC_CFLAGS = -I. $(CFLAGS) -g -gdwarf-3 -gstrict-dwarf -Wall 
+
+# Make Rule for the SRC Files
+SRC_OBJS = $(patsubst %.c, $(SBLOBJDIR)/%.$(OBJEXT), $(SRC_C))
+ENTRY_OBJ = $(patsubst %.S, $(SBLOBJDIR)/%.$(ASMOBJEXT), $(ENTRY_SRC))
+SRC_DRV_OBJS = $(patsubst %.c, $(SBLOBJDIR)/%.$(OBJEXT), $(SRC_DRV))
+
+ifeq ($(OS),Windows_NT)
+  TIIMAGE_EXE = tiimage.exe
+else
+  TIIMAGE_EXE = tiimage
+endif
+
+all:$(SBLBINDIR)/$(EXE)
+
+$(SBLBINDIR)/$(EXE): $(SRC_OBJS) $(SRC_DRV_OBJS) $(ENTRY_OBJ) $(SBLBINDIR)/.created $(SBLOBJDIR)/.created
+       @echo linking $(SRC_OBJS) $(SRC_DRV_OBJS) $(ENTRY_OBJ) into $@ ...
+       @$(CC) $(SRC_OBJS) $(SRC_DRV_OBJS) $(ENTRY_OBJ) $(INTERNALLINKDEFS) -Wl,-Map=$(SBLBINDIR)/sbl.map -o $@
+       $(BIN) $(BINFLAGS) $(SBLBINDIR)/sbl.out \
+               $(SBLBINDIR)/sbl.bin
+        $(SBL_SRC_DIR)/tools/tiImageGen/bin/$(TIIMAGE_EXE) $(IMG_LOAD_ADDR) $(BOOTMODE) \
+               $(SBLBINDIR)/sbl.bin $(SBLBINDIR)/MLO;
+
+$(SBLOBJDIR)/%.$(OBJEXT): %.c $(SBLOBJDIR)/.created
+       @echo compiling $< ...
+       @$(CC) -c $(SRC_CFLAGS) $(INTERNALDEFS) $(INCS)  $< -o $@
+
+$(SBLOBJDIR)/%.$(ASMOBJEXT): %.S $(SBLOBJDIR)/.created
+       @echo compiling $< ...
+       @$(CC) -c $(SRC_CFLAGS) $(INTERNALDEFS) $(INCS)  $< -o $@
+
+$(SBLOBJDIR)/.created:
+       @mkdir -p $(SBLOBJDIR)
+       @touch $(SBLOBJDIR)/.created
+
+$(SBLBINDIR)/.created:
+       @mkdir -p $(SBLBINDIR)
+       @touch $(SBLBINDIR)/.created
+
+clean:
+       @rm -f $(SBLBINDIR)/$(EXE)
+       @rm -f $(SRC_OBJS) $(SRC_DRV_OBJS) $(ENTRY_OBJ) $(SBLBINDIR)/.created $(SBLOBJDIR)/.created
+
diff --git a/packages/ti/boot/sbl/board/idkAM574x/sbl_main.c b/packages/ti/boot/sbl/board/idkAM574x/sbl_main.c
new file mode 100644 (file)
index 0000000..8b2fff2
--- /dev/null
@@ -0,0 +1,183 @@
+/**
+ *  \file   sbl_main.c
+ *
+ *  \brief  This file contain main function, call the Board Initialization
+ *          functions & slave core boot-up functions in sequence.
+ *
+ */
+
+/*
+ * Copyright (C) 2015-2016 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ *
+ * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+ /* TI RTOS header files */
+#include <ti/csl/cslr_device.h>
+#include <ti/board/board.h>
+#include <ti/drv/uart/UART.h>
+#include <ti/drv/uart/src/UART_osal.h>
+#include <ti/drv/uart/UART_stdio.h>
+#include <ti/csl/tistdtypes.h>
+#include <ti/csl/csl_a15.h>
+
+#include "sbl_slave_core_boot.h"
+#include "sbl_avs_config.h"
+#include "sbl_ver.h"
+
+/**********************************************************************
+ ************************** Macros ************************************
+ **********************************************************************/
+
+/**********************************************************************
+ ************************** Internal functions ************************
+ **********************************************************************/
+
+/**********************************************************************
+ ************************** Global Variables **************************
+ **********************************************************************/
+sblEntryPoint_t idkAM574xEntry;
+
+typedef void (*EntryFunPtr_t)(void);
+
+int main()
+{
+    void (*func_ptr)(void);
+    Board_initCfg boardCfg;
+    uint32_t oppMode = OPP_MODE_NOM;
+
+    #if defined(OPP_HIGH)
+        boardCfg = BOARD_INIT_PLL_OPP_HIGH;
+        oppMode = OPP_MODE_HIGH;
+    #elif defined(OPP_OD)
+        boardCfg = BOARD_INIT_PLL_OPP_OD;
+         oppMode = OPP_MODE_OD;
+    #elif defined(OPP_NOM)
+        boardCfg = BOARD_INIT_PLL_OPP_NOM;
+        oppMode = OPP_MODE_NOM;
+    #endif
+
+    boardCfg |= BOARD_INIT_UNLOCK_MMR |
+        BOARD_INIT_MODULE_CLOCK |
+        BOARD_INIT_PINMUX_CONFIG |
+#ifndef SBL_DDR_ECC
+               BOARD_INIT_DDR |
+#endif
+        BOARD_INIT_UART_STDIO |
+        BOARD_INIT_WATCHDOG_DISABLE;
+
+    /* Configure AVS voltage for the selected OPP to the voltage rails. */
+    SBL_Configure_AVS(oppMode);
+
+    /* Board Library Init. */
+    Board_init(boardCfg);
+
+    /* enable clocks for slave core modules. */
+    SBL_SlaveCorePrcmEnable();
+
+    UART_printf("**** PDK SBL ****\n");
+    UART_printf("%s (%s - %s)\n", SBL_VERSION_STR, __DATE__, __TIME__);
+       /* DDR ECC setup done later to inform user about ECC priming delay over UART */ 
+#ifdef SBL_DDR_ECC
+       UART_printf("DDR ECC is Enabled...Initializing ECC data may take few seconds\n");
+    boardCfg =         BOARD_INIT_DDR_ECC ;
+       /* Board Library Init. */
+    Board_init(boardCfg);
+       UART_printf("ECC Data Initialization Completed\n");
+#endif
+
+    UART_printf("Begin parsing user application\n");
+    /* Image Copy */
+    SBL_ImageCopy(&idkAM574xEntry);
+
+    /* Cache Write back after image copy to ensure the slave cores are brought
+    ** out of reset correctly.
+    */
+    CSL_a15WbAllDataCache();
+
+    UART_printf("Jumping to user application...\n");
+
+    if (idkAM574xEntry.entryPoint_MPU_CPU1 != 0)
+    {
+        /* Bring the A15 CPU1 core out of reset. */
+        SBL_MPU_CPU1_BringUp(idkAM574xEntry.entryPoint_MPU_CPU1);
+    }
+
+    if (idkAM574xEntry.entryPoint_DSP1 != 0)
+    {
+        /* Release the DSP1 core out of reset */
+        SBL_DSP1_BringUp(idkAM574xEntry.entryPoint_DSP1);
+    }
+
+    if (idkAM574xEntry.entryPoint_DSP2 != 0)
+    {
+        /* Release the DSP2 core out of reset */
+        SBL_DSP2_BringUp(idkAM574xEntry.entryPoint_DSP2);
+    }
+
+    if (idkAM574xEntry.entryPoint_IPU1_CPU0 != 0)
+    {
+        /* Release the IPU1 core out of reset and set the Entry point */
+        SBL_IPU1_CPU0_BringUp(idkAM574xEntry.entryPoint_IPU1_CPU0);
+    }
+
+    if (idkAM574xEntry.entryPoint_IPU1_CPU1 != 0)
+    {
+        SBL_IPU1_CPU1_BringUp(idkAM574xEntry.entryPoint_IPU1_CPU1);
+    }
+
+    if (idkAM574xEntry.entryPoint_IPU2_CPU0 != 0)
+    {
+        /* Release the IPU2 core out of reset and set the Entry point */
+        SBL_IPU2_CPU0_BringUp(idkAM574xEntry.entryPoint_IPU2_CPU0);
+    }
+
+    if (idkAM574xEntry.entryPoint_IPU2_CPU1 != 0)
+    {
+        /* Release the IPU2 CPU1 core out of reset and set the Entry point */
+        SBL_IPU2_CPU1_BringUp(idkAM574xEntry.entryPoint_IPU2_CPU1);
+    }
+
+    /*Jump to MPU CPU0 APP*/
+    if (idkAM574xEntry.entryPoint_MPU_CPU0 != 0)
+    {
+        func_ptr = (EntryFunPtr_t) idkAM574xEntry.entryPoint_MPU_CPU0;
+        CSL_a15WbAllDataCache();
+        CSL_a15InvAllInstrCache();
+        __sync_synchronize();
+        func_ptr();
+    }
+    else
+    {
+        while(1);
+    }
+
+    return 0;
+}
diff --git a/packages/ti/boot/sbl/board/k3/sbl_main.c b/packages/ti/boot/sbl/board/k3/sbl_main.c
new file mode 100644 (file)
index 0000000..6cc050b
--- /dev/null
@@ -0,0 +1,290 @@
+/**
+ *  \file   sbl_main.c
+ *
+ *  \brief  This file contain main function, call the Board Initialization
+ *          functions & slave core boot-up functions in sequence.
+ *
+ */
+
+/*
+ * Copyright (C) 2018-2019 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ *
+ * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+ /* TI RTOS header files */
+#include "sbl_main.h"
+
+/**********************************************************************
+ ************************** Macros ************************************
+ **********************************************************************/
+
+/**********************************************************************
+ ************************** Internal functions ************************
+ **********************************************************************/
+
+/**********************************************************************
+ ************************** Global Variables **************************
+ **********************************************************************/
+extern sblProfileInfo_t sblProfileLog[MAX_PROFILE_LOG_ENTRIES];
+extern uint32_t sblProfileLogIndx;
+extern uint32_t sblProfileLogOvrFlw;
+
+#pragma DATA_SECTION(sblProfileLogAddr, ".sbl_profile_info")
+volatile sblProfileInfo_t * sblProfileLogAddr;
+
+#pragma DATA_SECTION(sblProfileLogIndxAddr, ".sbl_profile_info")
+volatile uint32_t *sblProfileLogIndxAddr;
+
+#pragma DATA_SECTION(sblProfileLogOvrFlwAddr, ".sbl_profile_info")
+volatile uint32_t *sblProfileLogOvrFlwAddr;
+
+sblEntryPoint_t k3xx_evmEntry;
+
+const CSL_ArmR5MpuRegionCfg gCslR5MpuCfg[CSL_ARM_R5F_MPU_REGIONS_MAX] =
+{
+    {
+        /* Region 0 configuration: complete 32 bit address space = 4Gbits */
+        .regionId         = 0U,
+        .enable           = 1U,
+        .baseAddr         = 0x0U,
+        .size             = CSL_ARM_R5_MPU_REGION_SIZE_4GB,
+        .subRegionEnable  = CSL_ARM_R5_MPU_SUB_REGION_ENABLE_ALL,
+        .exeNeverControl  = 1U,
+        .accessPermission = CSL_ARM_R5_ACC_PERM_PRIV_USR_RD_WR,
+        .shareable        = 0U,
+        .cacheable        = (uint32_t)FALSE,
+        .cachePolicy      = 0U,
+        .memAttr          = 0U,
+    },
+    {
+        /* Region 1 configuration: 128 bytes memory for exception vector execution */
+        .regionId         = 1U,
+        .enable           = 1U,
+        .baseAddr         = 0x0U,
+        .size             = CSL_ARM_R5_MPU_REGION_SIZE_32KB,
+        .subRegionEnable  = CSL_ARM_R5_MPU_SUB_REGION_ENABLE_ALL,
+        .exeNeverControl  = 0U,
+        .accessPermission = CSL_ARM_R5_ACC_PERM_PRIV_USR_RD_WR,
+        .shareable        = 0U,
+        .cacheable        = (uint32_t)TRUE,
+        .cachePolicy      = CSL_ARM_R5_CACHE_POLICY_NON_CACHEABLE,
+        .memAttr          = 0U,
+    },
+    {
+        /* Region 2 configuration: 512 KB OCMS RAM */
+        .regionId         = 2U,
+        .enable           = 1U,
+        .baseAddr         = 0x41C00000,
+        .size             = CSL_ARM_R5_MPU_REGION_SIZE_512KB,
+        .subRegionEnable  = CSL_ARM_R5_MPU_SUB_REGION_ENABLE_ALL,
+        .exeNeverControl  = 0U,
+        .accessPermission = CSL_ARM_R5_ACC_PERM_PRIV_USR_RD_WR,
+        .shareable        = 0U,
+        .cacheable        = (uint32_t)TRUE,
+        .cachePolicy      = CSL_ARM_R5_MEM_ATTR_CACHED_WT_NO_WA,
+        .memAttr          = 0U,
+    },
+    {
+        /* Region 3 configuration: 2 MB MCMS3 RAM */
+        .regionId         = 3U,
+        .enable           = 1U,
+        .baseAddr         = 0x70000000,
+        .size             = CSL_ARM_R5_MPU_REGION_SIZE_8MB,
+        .subRegionEnable  = CSL_ARM_R5_MPU_SUB_REGION_ENABLE_ALL,
+        .exeNeverControl  = 0U,
+        .accessPermission = CSL_ARM_R5_ACC_PERM_PRIV_USR_RD_WR,
+        .shareable        = 0U,
+        .cacheable        = (uint32_t)TRUE,
+        .cachePolicy      = CSL_ARM_R5_MEM_ATTR_CACHED_WT_NO_WA,
+        .memAttr          = 0U,
+    },
+    {
+        /* Region 4 configuration: 2 GB DDR RAM */
+        .regionId         = 4U,
+        .enable           = 1U,
+        .baseAddr         = 0x80000000,
+        .size             = CSL_ARM_R5_MPU_REGION_SIZE_2GB,
+        .subRegionEnable  = CSL_ARM_R5_MPU_SUB_REGION_ENABLE_ALL,
+        .exeNeverControl  = 0U,
+        .accessPermission = CSL_ARM_R5_ACC_PERM_PRIV_USR_RD_WR,
+        .shareable        = 0U,
+        .cacheable        = (uint32_t)TRUE,
+        .cachePolicy      = CSL_ARM_R5_MEM_ATTR_CACHED_WT_NO_WA,
+        .memAttr          = 0U,
+    },
+    {
+        /* Region 5 configuration: 64 KB BTCM */
+        .regionId         = 5U,
+        .enable           = 1U,
+        .baseAddr         = 0x41010000,
+        .size             = CSL_ARM_R5_MPU_REGION_SIZE_32KB,
+        .subRegionEnable  = CSL_ARM_R5_MPU_SUB_REGION_ENABLE_ALL,
+        .exeNeverControl  = 0U,
+        .accessPermission = CSL_ARM_R5_ACC_PERM_PRIV_USR_RD_WR,
+        .shareable        = 0U,
+        .cacheable        = (uint32_t)TRUE,
+        .cachePolicy      = CSL_ARM_R5_CACHE_POLICY_NON_CACHEABLE,
+        .memAttr          = 0U,
+    },
+    {
+        /* Region 6 configuration: 128 MB FSS DAT0 */
+        .regionId         = 6U,
+        .enable           = 1U,
+        .baseAddr         = 0x50000000,
+        .size             = CSL_ARM_R5_MPU_REGION_SIZE_128MB,
+        .subRegionEnable  = CSL_ARM_R5_MPU_SUB_REGION_ENABLE_ALL,
+        .exeNeverControl  = 0U,
+        .accessPermission = CSL_ARM_R5_ACC_PERM_PRIV_USR_RD_WR,
+        .shareable        = 0U,
+        .cacheable        = (uint32_t)TRUE,
+        .cachePolicy      = CSL_ARM_R5_MEM_ATTR_CACHED_WT_NO_WA,
+        .memAttr          = 0U,
+    },
+    {
+        /* Region 7 configuration: 128 MB FSS DAT1 */
+        .regionId         = 7U,
+        .enable           = 1U,
+        .baseAddr         = 0x58000000,
+        .size             = CSL_ARM_R5_MPU_REGION_SIZE_128MB,
+        .subRegionEnable  = CSL_ARM_R5_MPU_SUB_REGION_ENABLE_ALL,
+        .exeNeverControl  = 0U,
+        .accessPermission = CSL_ARM_R5_ACC_PERM_PRIV_USR_RD_WR,
+        .shareable        = 0U,
+        .cacheable        = (uint32_t)TRUE,
+        .cachePolicy      = CSL_ARM_R5_MEM_ATTR_CACHED_WT_NO_WA,
+        .memAttr          = 0U,
+    },
+};
+
+int main()
+{
+    cpu_core_id_t core_id;
+
+    SBL_ADD_PROFILE_POINT;
+
+    /* Any SoC specific Init. */
+    SBL_SocEarlyInit();
+
+    /* Board pinmux. */
+    Board_init(BOARD_INIT_PINMUX_CONFIG);
+
+    SBL_ADD_PROFILE_POINT;
+
+    if (SBL_LOG_LEVEL > SBL_LOG_NONE)
+    {
+        UART_HwAttrs uart_cfg;
+
+        UART_socGetInitCfg(BOARD_UART_INSTANCE, &uart_cfg);
+        /* Use UART fclk freq setup by ROM */
+        uart_cfg.frequency = SBL_ROM_UART_MODULE_INPUT_CLK;
+        /* Disable the UART interrupt */
+        uart_cfg.enableInterrupt = FALSE;
+        UART_socSetInitCfg(BOARD_UART_INSTANCE, &uart_cfg);
+        /* Init UART for logging. */
+        UART_stdioInit(BOARD_UART_INSTANCE);
+    }
+
+    SBL_ADD_PROFILE_POINT;
+
+    SBL_log(SBL_LOG_MIN, "%s (%s - %s)\n", SBL_VERSION_STR, __DATE__, __TIME__);
+
+    SBL_ADD_PROFILE_POINT;
+
+   /* Initialize the ATCM */
+    memset((void *)SBL_MCU_ATCM_BASE, 0xFF, 0x8000);
+
+    /* Relocate CSL Vectors to ATCM*/
+    memcpy((void *)SBL_MCU_ATCM_BASE, (void *)_resetvectors, 0x100);
+
+    SBL_ADD_PROFILE_POINT;
+
+    /* Setup RAT */
+    SBL_RAT_Config(sblRatCfgList);
+
+    SBL_ADD_PROFILE_POINT;
+
+    /* Load SYSFW. */
+    SBL_SciClientInit();
+
+    SBL_ADD_PROFILE_POINT;
+
+    /* Any SoC specific Init. */
+    SBL_SocLateInit();
+
+#if defined(SBL_ENABLE_PLL) && !defined(SBL_SKIP_SYSFW_INIT)
+    SBL_log(SBL_LOG_MAX, "Initlialzing PLLs ...");
+    SBL_ADD_PROFILE_POINT;
+    Board_init(SBL_PLL_INIT);
+    SBL_log(SBL_LOG_MAX, "done.\n");
+#endif
+
+#if defined(SBL_ENABLE_CLOCKS) && !defined(SBL_SKIP_SYSFW_INIT)
+    SBL_log(SBL_LOG_MAX, "InitlialzingClocks ...");
+    SBL_ADD_PROFILE_POINT;
+    Board_init(SBL_CLOCK_INIT);
+    SBL_log(SBL_LOG_MAX, "done.\n");
+#endif
+
+#if defined(SBL_ENABLE_DDR) && defined(SBL_ENABLE_PLL) && defined(SBL_ENABLE_CLOCKS)  && !defined(SBL_SKIP_SYSFW_INIT)
+    SBL_log(SBL_LOG_MAX, "Initlialzing DDR ...");
+    SBL_ADD_PROFILE_POINT;
+    Board_init(BOARD_INIT_DDR);
+    SBL_log(SBL_LOG_MAX, "done.\n");
+#endif
+
+    SBL_log(SBL_LOG_MAX, "Begin parsing user application\n");
+
+    /* Image Copy */
+    SBL_ImageCopy(&k3xx_evmEntry);
+
+    /* Export SBL logs */
+    sblProfileLogAddr = sblProfileLog;
+    sblProfileLogIndxAddr = &sblProfileLogIndx;
+    sblProfileLogOvrFlwAddr = &sblProfileLogOvrFlw;
+
+    for (core_id = MPU1_CPU0_ID; core_id <= DSP2_C7X_ID; core_id ++)
+    {
+        /* Try booting all cores other than the cluster running the SBL */
+        if ((k3xx_evmEntry.CpuEntryPoint[core_id] != SBL_INVALID_ENTRY_ADDR) &&
+            (core_id != MCU1_CPU1_ID))
+            SBL_SlaveCoreBoot(core_id, NULL, &k3xx_evmEntry);
+    }
+
+    /* Boot the core running SBL in the end */
+    if ((k3xx_evmEntry.CpuEntryPoint[MCU1_CPU1_ID] != SBL_INVALID_ENTRY_ADDR) ||
+        (k3xx_evmEntry.CpuEntryPoint[MCU1_CPU0_ID] < SBL_INVALID_ENTRY_ADDR))
+        SBL_SlaveCoreBoot(MCU1_CPU1_ID, NULL, &k3xx_evmEntry);
+
+    /* Execute a WFI */
+    asm volatile (" wfi");
+
+    return 0;
+}
diff --git a/packages/ti/boot/sbl/board/k3/sbl_main.h b/packages/ti/boot/sbl/board/k3/sbl_main.h
new file mode 100644 (file)
index 0000000..dae4366
--- /dev/null
@@ -0,0 +1,68 @@
+/*
+ * Copyright (c) 2018, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * *  Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *
+ * *  Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * *  Neither the name of Texas Instruments Incorporated nor the names of
+ *    its contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/* ========================================================================== */
+/*                             Include Files                                  */
+/* ========================================================================== */
+#include <string.h>
+#include <ti/csl/cslr_device.h>
+#include <ti/board/board.h>
+#include <ti/drv/uart/UART.h>
+#include <ti/drv/uart/src/UART_osal.h>
+#include <ti/drv/uart/UART_stdio.h>
+#include <ti/drv/uart/soc/UART_soc.h>
+#include <ti/csl/tistdtypes.h>
+#include <ti/csl/arch/csl_arch.h>
+#include <ti/csl/src/ip/rat/V0/csl_rat.h>
+
+#include "sbl_slave_core_boot.h"
+#include "sbl_sci_client.h"
+#include "sbl_ver.h"
+#include "sbl_soc.h"
+#include "sbl_soc_cfg.h"
+#include "sbl_log.h"
+#include "sbl_profile.h"
+
+/* ========================================================================== */
+/*                          Function Declarations                             */
+/* ========================================================================== */
+
+/**
+ *  \brief  CSL Reset Vectors. 
+ *
+ *
+ *  \param  None
+ *
+ *  \return None
+ *
+ */
+void _resetvectors (void);
diff --git a/packages/ti/boot/sbl/board/lcdkC6748/build/makefile b/packages/ti/boot/sbl/board/lcdkC6748/build/makefile
new file mode 100644 (file)
index 0000000..4775639
--- /dev/null
@@ -0,0 +1,142 @@
+# Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/
+#
+#
+#  Redistribution and use in source and binary forms, with or without
+#  modification, are permitted provided that the following conditions
+#  are met:
+#
+#    Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+#
+#    Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in the
+#    documentation and/or other materials provided with the
+#    distribution.
+#
+#    Neither the name of Texas Instruments Incorporated nor the names of
+#    its contributors may be used to endorse or promote products derived
+#    from this software without specific prior written permission.
+#
+#  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+#  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+#  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+#  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+#  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+#  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+#  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+#  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+#  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+#  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+#  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+#
+# Macro definitions referenced below
+#
+
+SBL_SRC_DIR ?= $(PDK_INSTALL_PATH)/ti/boot/sbl
+SBLOBJDIR = $(SBL_SRC_DIR)/binary/$(BOARD)/$(BOOTMODE)/obj
+SBLBINDIR = $(SBL_SRC_DIR)/binary/$(BOARD)/$(BOOTMODE)/bin
+ARMV7LIBDIR ?= ./lib
+BINFLAGS = -O binary
+
+#Cross tools
+CC = $(C6X_GEN_INSTALL_PATH)/bin/cl6x
+
+# INCLUDE Directories
+CSL_DIR = $(PDK_INSTALL_PATH)/ti/csl
+BOARD_DIR = $(PDK_INSTALL_PATH)/ti/board
+SBL_INC_DIR = $(SBL_SRC_DIR)/board/src
+SBL_LIB_INC_DIR = $(SBL_SRC_DIR)/src/rprc
+SBL_SOC_DIR = $(SBL_SRC_DIR)/soc
+
+# Libraries
+BOARD_LIB = "$(PDK_INSTALL_PATH)/ti/board/lib/lcdkOMAPL138/c674/release/ti.board.ae674"
+UART_LIB = "$(PDK_INSTALL_PATH)/ti/drv/uart/lib/omapl138/c674/release/ti.drv.uart.ae674"
+I2C_LIB = "$(PDK_INSTALL_PATH)/ti/drv/i2c/lib/omapl138/c674/release/ti.drv.i2c.ae674"
+SPI_LIB = "$(PDK_INSTALL_PATH)/ti/drv/spi/lib/omapl138/c674/release/ti.drv.spi.ae674"
+MMCSD_LIB = "$(PDK_INSTALL_PATH)/ti/drv/mmcsd/lib/omapl138/c674/release/ti.drv.mmcsd.ae674"
+FATFS_LIB = "$(PDK_INSTALL_PATH)/ti/fs/fatfs/lib/c674/release/ti.fs.fatfs.ae674"
+CSL_LIB = "$(PDK_INSTALL_PATH)/ti/csl/lib/omapl138/c674/release/ti.csl.ae674"
+CSL_INTC_LIB = "$(PDK_INSTALL_PATH)/ti/csl/lib/omapl138/c674/release/ti.csl.intc.ae674"
+OSAL_LIB = "$(PDK_INSTALL_PATH)/ti/osal/lib/nonos/omapl138/c674/release/ti.osal.ae674"
+RTSLIB_PATH = "$(C6X_GEN_INSTALL_PATH)/lib/libc.a"
+
+ifeq ($(BOOTMODE), mmcsd)
+  INTERNALDEFS += -DBOOT_MMCSD
+  SBL_MMCSD_DIR = $(SBL_SRC_DIR)/src/mmcsd
+  INCDIR := $(CSL_DIR);$(PDK_INSTALL_PATH);$(BOARD_DIR);$(SBL_INC_DIR);$(SBL_LIB_INC_DIR);$(SBL_MMCSD_DIR);$(SBL_SOC_DIR);$(SBL_SOC_DIR)/c6748;$(C6X_GEN_INSTALL_PATH)/include
+  PERIPHERAL_LIB = $(UART_LIB) $(I2C_LIB) $(FATFS_LIB) $(MMCSD_LIB) $(CSL_LIB) $(SPI_LIB) $(BOARD_LIB) $(OSAL_LIB) $(CSL_INTC_LIB)
+endif
+
+# Compiler options
+INTERNALDEFS += -mv64+ --abi=eabi -g --display_error_number --diag_warning=225 -g -DSOC_OMAPL138 -DSOC_C6748 -DEVM_$(SOC) -D$(SOC)_BUILD
+
+# Linker options
+INTERNALLINKDEFS = -mv64+ -g --diag_wrap=off --diag_warning=225 --display_error_number -z $(SBL_SOC_DIR)/c6748/linker.cmd
+
+# Executable using device independent library and device object file
+EXE=sbl.out
+
+OBJEXT = o
+ASMOBJEXT = ao
+SRCDIR = $(SBL_SRC_DIR)/board
+
+INCS = -I. -I$(strip $(subst ;, -I,$(INCDIR)))
+
+VPATH=$(SRCDIR):$(SRCDIR)/$(BOARD):$(SBL_SRC_DIR)/board/src:$(SBL_SRC_DIR)/soc/c6748:$(PDK_INSTALL_PATH)/ti/drv/uart/soc/omapl138:$(SBL_SRC_DIR)/src/$(BOOTMODE):$(SBL_SRC_DIR)/src/rprc:$(PDK_INSTALL_PATH)/ti/drv/spi/soc/omapl138
+
+#List the Source Files
+SRC_C = \
+       sbl_main.c \
+    sbl_rprc.c \
+    sbl_mmcsd.c
+
+SRC_DRV = \
+    sbl_soc.c \
+    sbl_slave_boot.c
+
+#Common entry object
+ENTRY_SRC =
+
+# FLAGS for the SourceFiles
+CFLAGS += 
+SRC_CFLAGS = -I. $(CFLAGS) -eo.$(OBJEXT) -ea.$(ASMOBJEXT) -g
+
+# Make Rule for the SRC Files
+SRC_OBJS = $(patsubst %.c, $(SBLOBJDIR)/%.$(OBJEXT), $(SRC_C))
+ENTRY_OBJ = $(patsubst %.asm, $(SBLOBJDIR)/%.$(ASMOBJEXT), $(ENTRY_SRC))
+SRC_DRV_OBJS = $(patsubst %.c, $(SBLOBJDIR)/%.$(OBJEXT), $(SRC_DRV))
+
+all:$(SBLBINDIR)/$(EXE) MLO
+
+MLO: $(SBLBINDIR)/$(EXE)
+ifeq ($(OS),Windows_NT)
+       $(SBL_SRC_DIR)/tools/omapl13x_boot_utils/OMAP-L138/GNU/AISUtils/HexAIS_OMAP-L138.exe -o $(SBLBINDIR)/MLO -ini $(SBL_SOC_DIR)/c6748/c6748.ini $(SBLBINDIR)/sbl.out;
+else
+       mono $(SBL_SRC_DIR)/tools/omapl13x_boot_utils/OMAP-L138/GNU/AISUtils/HexAIS_OMAP-L138.exe -o $(SBLBINDIR)/MLO -ini $(SBL_SOC_DIR)/c6748/c6748.ini $(SBLBINDIR)/sbl.out;
+endif
+
+$(SBLBINDIR)/$(EXE): $(SRC_OBJS) $(SRC_DRV_OBJS) $(ENTRY_OBJ) $(SBLBINDIR)/.created $(SBLOBJDIR)/.created
+       @echo linking $(SRC_OBJS) $(SRC_DRV_OBJS) $(ENTRY_OBJ) into $@ ...
+       @$(CC) $(SRC_OBJS) $(SRC_DRV_OBJS) $(ENTRY_OBJ) $(INTERNALLINKDEFS) -m"$(SBLBINDIR)/sbl.map" --reread_libs --rom_model -o $@ $(PERIPHERAL_LIB) $(RTSLIB_PATH)
+
+$(SBLOBJDIR)/%.$(OBJEXT): %.c $(SBLOBJDIR)/.created
+       @echo compiling $< ...
+       @$(CC) -c $(SRC_CFLAGS) $(INTERNALDEFS) $(INCS) -fr=$(SBLOBJDIR) -fs=$(SBLOBJDIR) -fc $<
+
+$(SBLOBJDIR)/%.$(ASMOBJEXT): %.asm $(SBLOBJDIR)/.created
+       @echo compiling $< ...
+       @$(CC) -c $(INTERNALDEFS) $(INCS)  $< -o $@
+
+$(SBLOBJDIR)/.created:
+       @mkdir -p $(SBLOBJDIR)
+       @touch $(SBLOBJDIR)/.created
+
+$(SBLBINDIR)/.created:
+       @mkdir -p $(SBLBINDIR)
+       @touch $(SBLBINDIR)/.created
+
+clean:
+       @rm -f $(SBLBINDIR)/$(EXE)
+       @rm -f $(SRC_OBJS) $(SRC_DRV_OBJS) $(ENTRY_OBJ) $(SBLBINDIR)/.created $(SBLOBJDIR)/.created
+
diff --git a/packages/ti/boot/sbl/board/lcdkC6748/sbl_main.c b/packages/ti/boot/sbl/board/lcdkC6748/sbl_main.c
new file mode 100644 (file)
index 0000000..f769940
--- /dev/null
@@ -0,0 +1,78 @@
+/*
+ * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ *
+ * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#include <ti/board/board.h>
+#include <ti/drv/uart/UART_stdio.h>
+#include "sbl_soc.h"
+#include "sbl_slave_core_boot.h"
+#include "sbl_ver.h"
+
+sblEntryPoint_t entry;
+typedef void (*EntryFunPtr_t)(void);
+
+int main() {
+    void (*func_ptr)(void);
+    int32_t retval = 0;
+
+    if (SBL_socInit() < 0)
+    {
+        /* Something went wrong with init, trap here */
+        while(1);
+    }
+
+    UART_printf("\n**** PDK SBL ****\n");
+    UART_printf("%s (%s - %s)\n", SBL_VERSION_STR, __DATE__, __TIME__);
+
+    UART_printf("Begin parsing user application\n");
+    retval = SBL_ImageCopy(&entry);
+    if(retval)
+    {
+        UART_printf("Error while copying the images\n");
+        while(1); /*  Error case. No need to proceed */
+    }
+    
+    UART_printf("Jumping to user application...\n");
+
+    /*Jump to DSP0 APP*/    
+    if (entry.entryPoint_DSP0 != 0)
+    {
+        func_ptr = (EntryFunPtr_t) entry.entryPoint_DSP0;
+        func_ptr();
+    }
+    else
+    {
+        while(1);
+    }
+
+    return 0;
+}
diff --git a/packages/ti/boot/sbl/board/lcdkOMAPL138/build/makefile b/packages/ti/boot/sbl/board/lcdkOMAPL138/build/makefile
new file mode 100644 (file)
index 0000000..d069e1e
--- /dev/null
@@ -0,0 +1,152 @@
+# Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/
+#
+#
+#  Redistribution and use in source and binary forms, with or without
+#  modification, are permitted provided that the following conditions
+#  are met:
+#
+#    Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+#
+#    Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in the
+#    documentation and/or other materials provided with the
+#    distribution.
+#
+#    Neither the name of Texas Instruments Incorporated nor the names of
+#    its contributors may be used to endorse or promote products derived
+#    from this software without specific prior written permission.
+#
+#  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+#  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+#  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+#  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+#  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+#  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+#  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+#  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+#  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+#  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+#  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+#
+# Macro definitions referenced below
+#
+
+SBL_SRC_DIR ?= $(PDK_INSTALL_PATH)/ti/boot/sbl
+SBLOBJDIR = $(SBL_SRC_DIR)/binary/$(BOARD)/$(BOOTMODE)/obj
+SBLBINDIR = $(SBL_SRC_DIR)/binary/$(BOARD)/$(BOOTMODE)/bin
+ARMV7LIBDIR ?= ./lib
+BINFLAGS = -O binary
+
+ifdef TOOLCHAIN_PATH_ARM9
+TOOLCHAIN_PATH = $(TOOLCHAIN_PATH_ARM9)
+else
+TOOLCHAIN_PATH = $(TOOLCHAIN_PATH_Arm9)
+endif
+
+#Cross tools
+CC = $(TOOLCHAIN_PATH)/bin/armcl
+AR = $(TOOLCHAIN_PATH)/bin/armar
+LNK = $(TOOLCHAIN_PATH)/bin/armlnk
+SIZE = $(TOOLCHAIN_PATH)/bin/armofd
+
+# INCLUDE Directories
+CSL_DIR = $(PDK_INSTALL_PATH)/ti/csl
+BOARD_DIR = $(PDK_INSTALL_PATH)/ti/board
+SBL_INC_DIR = $(SBL_SRC_DIR)/board/src
+SBL_LIB_INC_DIR = $(SBL_SRC_DIR)/src/rprc
+SBL_SOC_DIR = $(SBL_SRC_DIR)/soc
+
+# Libraries
+BOARD_LIB = "$(PDK_INSTALL_PATH)/ti/board/lib/$(BOARD)/arm9/release/ti.board.ae9"
+UART_LIB = "$(PDK_INSTALL_PATH)/ti/drv/uart/lib/omapl138/arm9/release/ti.drv.uart.ae9"
+I2C_LIB = "$(PDK_INSTALL_PATH)/ti/drv/i2c/lib/omapl138/arm9/release/ti.drv.i2c.ae9"
+SPI_LIB = "$(PDK_INSTALL_PATH)/ti/drv/spi/lib/omapl138/arm9/release/ti.drv.spi.ae9"
+CSL_LIB = "$(PDK_INSTALL_PATH)/ti/csl/lib/omapl138/arm9/release/ti.csl.ae9"
+CSL_INIT_LIB = "$(PDK_INSTALL_PATH)/ti/csl/lib/omapl138/arm9/release/ti.csl.init.ae9"
+RTSLIB_PATH = "$(TOOLCHAIN_PATH)/lib/libc.a"
+MMCSD_LIB = "$(PDK_INSTALL_PATH)/ti/drv/mmcsd/lib/omapl138/arm9/release/ti.drv.mmcsd.ae9"
+FATFS_LIB = "$(PDK_INSTALL_PATH)/ti/fs/fatfs/lib/arm9/release/ti.fs.fatfs.ae9"
+OSAL_LIB = "$(PDK_INSTALL_PATH)/ti/osal/lib/nonos/omapl138/arm9/release/ti.osal.ae9"
+
+ifeq ($(BOOTMODE), mmcsd)
+  INTERNALDEFS += -DBOOT_MMCSD
+  SBL_MMCSD_DIR = $(SBL_SRC_DIR)/src/mmcsd
+  INCDIR := $(CSL_DIR);$(PDK_INSTALL_PATH);$(BOARD_DIR);$(SBL_INC_DIR);$(SBL_LIB_INC_DIR);$(SBL_MMCSD_DIR);$(SBL_SOC_DIR);$(SBL_SOC_DIR)/omapl138;$(TOOLCHAIN_PATH)/include
+  PERIPHERAL_LIB = $(UART_LIB) $(I2C_LIB) $(FATFS_LIB) $(MMCSD_LIB) $(CSL_LIB) $(CSL_INIT_LIB) $(SPI_LIB) $(BOARD_LIB) $(OSAL_LIB) $(RTSLIB_PATH)
+endif
+
+# Compiler options
+INTERNALDEFS += -g $(DEBUG_FLAG) -mv5e --code_state=32 -me -g $(DEFFLAGS) --diag_wrap=off --diag_warning=225 --display_error_number  -DSOC_$(SOC) -D$(SOC)_BUILD -DlcdkOMAPL138
+
+# Linker options
+INTERNALLINKDEFS = -mv5e --code_state=32 -me -g $(DEVFLAGS) --diag_wrap=off --diag_warning=225 --display_error_number -z $(SBL_SOC_DIR)/omapl138/linker.cmd
+
+# Executable using device independent library and device object file
+EXE=sbl.out
+
+OBJEXT = o
+ASMOBJEXT = ao
+SRCDIR = $(SBL_SRC_DIR)/board
+
+INCS = -I. -I$(strip $(subst ;, -I,$(INCDIR)))
+
+VPATH=$(SRCDIR):$(SRCDIR)/$(BOARD):$(SBL_SRC_DIR)/board/src:$(SBL_SRC_DIR)/soc/omapl138:$(PDK_INSTALL_PATH)/ti/drv/uart/soc/omapl138:$(SBL_SRC_DIR)/src/$(BOOTMODE):$(SBL_SRC_DIR)/src/rprc:$(PDK_INSTALL_PATH)/ti/drv/spi/soc/omapl138
+
+#List the Source Files
+SRC_C = \
+       sbl_main.c \
+    sbl_rprc.c \
+    sbl_mmcsd.c
+
+SRC_DRV = \
+    sbl_soc.c \
+    sbl_soc.c \
+    sbl_slave_boot.c
+
+#Common entry object
+ENTRY_SRC = 
+
+# FLAGS for the SourceFiles
+CFLAGS += -ms -oe --inline_recursion_limit=20
+SRC_CFLAGS = -I. $(CFLAGS) -eo.$(OBJEXT) -ea.$(ASMOBJEXT) -g
+
+# Make Rule for the SRC Files
+SRC_OBJS = $(patsubst %.c, $(SBLOBJDIR)/%.$(OBJEXT), $(SRC_C))
+ENTRY_OBJ = $(patsubst %.asm, $(SBLOBJDIR)/%.$(ASMOBJEXT), $(ENTRY_SRC))
+SRC_DRV_OBJS = $(patsubst %.c, $(SBLOBJDIR)/%.$(OBJEXT), $(SRC_DRV))
+
+all:$(SBLBINDIR)/$(EXE) MLO
+
+MLO: $(SBLBINDIR)/$(EXE)
+ifeq ($(OS),Windows_NT)
+       $(SBL_SRC_DIR)/tools/omapl13x_boot_utils/OMAP-L138/GNU/AISUtils/HexAIS_OMAP-L138.exe -o $(SBLBINDIR)/MLO -ini $(SBL_SOC_DIR)/omapl138/omapl138.ini $(SBLBINDIR)/sbl.out;
+else
+       mono $(SBL_SRC_DIR)/tools/omapl13x_boot_utils/OMAP-L138/GNU/AISUtils/HexAIS_OMAP-L138.exe -o $(SBLBINDIR)/MLO -ini $(SBL_SOC_DIR)/omapl138/omapl138.ini $(SBLBINDIR)/sbl.out;
+endif
+
+$(SBLBINDIR)/$(EXE): $(SRC_OBJS) $(SRC_DRV_OBJS) $(ENTRY_OBJ) $(SBLBINDIR)/.created $(SBLOBJDIR)/.created
+       @echo linking $(SRC_OBJS) $(SRC_DRV_OBJS) $(ENTRY_OBJ) into $@ ...
+       @$(CC) $(SRC_OBJS) $(SRC_DRV_OBJS) $(ENTRY_OBJ) $(INTERNALLINKDEFS) -m"$(SBLBINDIR)/sbl.map" --reread_libs --rom_model -o $@ $(PERIPHERAL_LIB)
+
+$(SBLOBJDIR)/%.$(OBJEXT): %.c $(SBLOBJDIR)/.created
+       @echo compiling $< ...
+       @$(CC) -c $(SRC_CFLAGS) $(INTERNALDEFS) $(INCS) -fr=$(SBLOBJDIR) -fs=$(SBLOBJDIR) -fc $<
+
+$(SBLOBJDIR)/%.$(ASMOBJEXT): %.asm $(SBLOBJDIR)/.created
+       @echo compiling $< ...
+       @$(CC) -c $(INTERNALDEFS) $(INCS)  $< --output_file=$@
+
+$(SBLOBJDIR)/.created:
+       @mkdir -p $(SBLOBJDIR)
+       @touch $(SBLOBJDIR)/.created
+
+$(SBLBINDIR)/.created:
+       @mkdir -p $(SBLBINDIR)
+       @touch $(SBLBINDIR)/.created
+
+clean:
+       @rm -f $(SBLBINDIR)/$(EXE)
+       @rm -f $(SRC_OBJS) $(SRC_DRV_OBJS) $(ENTRY_OBJ) $(SBLBINDIR)/.created $(SBLOBJDIR)/.created
+
diff --git a/packages/ti/boot/sbl/board/lcdkOMAPL138/sbl_main.c b/packages/ti/boot/sbl/board/lcdkOMAPL138/sbl_main.c
new file mode 100644 (file)
index 0000000..9e203fa
--- /dev/null
@@ -0,0 +1,83 @@
+/*
+ * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ *
+ * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#include <ti/board/board.h>
+#include <ti/drv/uart/UART_stdio.h>
+#include "sbl_soc.h"
+#include "sbl_slave_core_boot.h"
+#include "sbl_ver.h"
+
+sblEntryPoint_t entry;
+typedef void (*EntryFunPtr_t)(void);
+
+int main() {
+    void (*func_ptr)(void);
+    int32_t retval = 0;
+  
+    if (SBL_socInit() < 0)
+    {
+        /* Something went wrong with init, trap here */
+        while(1);
+    }
+
+    UART_printf("\n**** PDK SBL ****\n");
+    UART_printf("%s (%s - %s)\n", SBL_VERSION_STR, __DATE__, __TIME__);
+
+    retval = SBL_ImageCopy(&entry);
+    if(retval)
+    {
+        UART_printf("Error while copying the images\n");
+        while(1); /*  Error case. No need to proceed */
+    }
+    
+    UART_printf("Jumping to user application...\n");
+
+    /*Jump to DSP APP*/    
+    if (entry.entryPoint_DSP0 != 0)
+    {
+        SBL_DSPBringUp(0, entry.entryPoint_DSP0);
+    }    
+
+    /*Jump to ARM APP*/    
+    if (entry.entryPoint_MPU_CPU0 != 0)
+    {
+        func_ptr = (EntryFunPtr_t) entry.entryPoint_MPU_CPU0;
+        func_ptr();
+    }
+    else
+    {
+        while(1);
+    }
+
+    return 0;
+}
diff --git a/packages/ti/boot/sbl/board/sbl_common_osal.c b/packages/ti/boot/sbl/board/sbl_common_osal.c
new file mode 100644 (file)
index 0000000..19ed35a
--- /dev/null
@@ -0,0 +1,306 @@
+/**
+ *   @file  GPIO_osal.c
+ *
+ *   @brief
+ *      This is the OS abstraction layer and is used by the GPIO application.
+ *
+ *  \par
+ */
+
+/*
+ * Copyright (C) 2015-2016 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ *
+ * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#ifndef COMMON_OSAL_PROTOTYPE
+#define COMMON_OSAL_PROTOTYPE
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <stdint.h>
+#include <ti/drv/uart/src/UART_osal.h>
+#include <ti/drv/spi/src/SPI_osal.h>
+
+/**********************************************************************
+ ************************** Local Definitions *************************
+ **********************************************************************/
+
+
+/**********************************************************************
+ ************************** Global Variables **************************
+ **********************************************************************/
+
+/**********************************************************************
+ **************************** OSAL Functions **************************
+ **********************************************************************/
+
+/**
+ *  @b Description
+ *  @n
+ *      The function is used to create a critical section.
+ *
+ *    *  @param[in]  count
+ *      Semaphore count value
+ *
+ *    *  @param[in]  params
+ *
+ *  @retval
+ *      Semaphore Handle created
+ */
+SemaphoreP_Handle SemaphoreP_create(uint32_t count,
+                                    SemaphoreP_Params *params)
+{
+    return (void *) -1;
+}
+
+/**
+ *  @b Description
+ *  @n
+ *      The function is used to delete a critical section.
+ *
+ *  @param[in]  semHandle
+ *      Semaphore handle to be deleted
+ *
+ *  @retval
+ *      Not Applicable
+ */
+SemaphoreP_Status SemaphoreP_delete(SemaphoreP_Handle handle)
+{
+    return (SemaphoreP_OK);
+}
+
+
+/*!
+ *  @brief  Initialize params structure to default values.
+ *
+ *  The default parameters are:
+ *   - mode: SemOSAL_Mode_COUNTING
+ *   - name: NULL
+ *
+ *  @param params  Pointer to the instance configuration parameters.
+ */
+void SemaphoreP_Params_init(SemaphoreP_Params *params)
+{
+
+}
+
+/*!
+ *  @brief  Function to pend (wait) on a semaphore.
+ *
+ *  @param  handle  A SemOSAL_Handle returned from ::SemOSAL_create
+ *
+ *  @param  timeout Timeout (in milliseconds) to wait for the semaphore to
+ *                  be posted (signalled).
+ *
+ *  @return Status of the functions
+ *    - OSAL_OK: Obtain the semaphore
+ *    - OSAL_TIMEOUT: Timed out. Semaphore was not obtained.
+ */
+SemaphoreP_Status SemaphoreP_pend(SemaphoreP_Handle handle, uint32_t timeout)
+{
+    return (SemaphoreP_OK);
+}
+
+/*!
+ *  @brief  Function to post (signal) a semaphore.
+ *
+ *  @param  handle  A SemOSAL_Handle returned from ::SemOSAL_create
+ *
+ *  @return Status of the functions
+ *    - OSAL_OK: Released the semaphore
+ */
+SemaphoreP_Status SemaphoreP_post(SemaphoreP_Handle handle)
+{
+    return (SemaphoreP_OK);
+}
+
+/*!
+ *  @brief  Function to disable interrupts to enter a critical region
+ *
+ *  TODO more details
+ *
+ *  @return todo key
+ */
+uintptr_t HwiP_disable(void)
+{
+      return 0;
+}
+
+/*!
+ *  @brief  Function to restore interrupts to exit a critical region
+ *
+ *  TODO more details
+ *
+ *  @param  key
+ */
+void HwiP_restore(uintptr_t key)
+{
+
+}
+
+/*!
+ *  @brief  Function to deregister a interrupt
+ *
+ *  TODO more detail
+ *
+ *  @param  hwiPtr
+ *
+ *  @return
+ */
+HwiP_Status HwiP_delete(HwiP_Handle handle)
+{
+    return (HwiP_OK);
+}
+
+
+/*!
+ *  @brief  Function to register an interrupt
+ *
+ *  TODO more detail
+ *
+ *  @param  interruptNum
+ *
+ *  @param  eventID
+ *
+ *  @param  entry entry function of the hardware interrupt
+ *
+ *  @param  arg  argument passed into hte entry function
+ *
+ *  @param  priority
+ *
+ *  @return
+ */
+HwiP_Handle HwiP_create(int32_t interruptNum, HwiP_Fxn hwiFxn,
+                        HwiP_Params *params)
+{
+    return (void *) -1;
+}
+
+/*!
+ *  @brief  Function to initialize hardware parameter structure.
+ *
+ *  @param  params pointer to the hardware parameters structure.
+ *
+ *  @return
+ */
+void HwiP_Params_init(HwiP_Params *params)
+{
+    params->name = NULL;
+    params->arg = 0;
+    params->priority = ~0;
+}
+
+/**
+ *  @b Description
+ *  @n
+ *      The function is used to disable specific hardware interrupt.
+ *
+ *  @param[in]  intrNum  number of hardware interrupt which should be disabled.
+ *
+ *  @retval
+ *      Not Applicable
+ */
+/*
+ *  ======== HwiP_disableInterrupt ========
+ */
+void HwiP_disableInterrupt(int32_t interruptNum)
+{
+
+}
+
+/**
+ *  @b Description
+ *  @n
+ *      The function is used to enable specific hardware interrupt.
+ *
+ *  @param[in]  intrNum  number of hardware interrupt which should be enabled.
+ *
+ *  @retval
+ *      Not Applicable
+ */
+/*
+ *  ======== HwiP_enableInterrupt ========
+ */
+void HwiP_enableInterrupt(int32_t interruptNum)
+{
+
+}
+
+void _DebugP_assert(int32_t expression, const char *file, int32_t line)
+{
+
+}
+
+MuxIntcP_Status MuxIntcP_create(MuxIntcP_inParams *inParams, MuxIntcP_outParams *outParams)
+{
+    return 0;
+}
+
+void MuxIntcP_enableInEvent(int32_t muxNum, int32_t muxInEvent)
+{
+
+}
+
+void MuxIntcP_disableInEvent(int32_t muxNum, int32_t muxInEvent)
+{
+
+}
+
+void MuxIntcP_clearInEvent(int32_t muxNum, int32_t muxInEvent)
+{
+
+}
+
+void MuxIntcP_enableOutEvent(int32_t muxNum, int32_t muxOutEvent)
+{
+
+}
+
+void MuxIntcP_disableOutEvent(int32_t muxNum, int32_t muxOutEvent)
+{
+
+}
+
+void HwiP_clearInterrupt(int32_t interruptNum)
+{
+
+}
+
+Osal_ThreadType Osal_getThreadType(void)
+{
+    return (Osal_ThreadType_Main);
+}
+
+int32_t Osal_delay(uint32_t nTicks)
+{
+    return osal_OK;
+}
+#endif  /* COMMON_OSAL_PROTOTYPE */
diff --git a/packages/ti/boot/sbl/board/src/sbl_avs_config.c b/packages/ti/boot/sbl/board/src/sbl_avs_config.c
new file mode 100644 (file)
index 0000000..5396332
--- /dev/null
@@ -0,0 +1,828 @@
+/**
+ *  \file   sbl_avs_config.c
+ *
+ *  \brief  This file contains functions and data related to AVS and ABB
+ *          configuration for the voltage rails.
+ *
+ */
+
+/*
+ * Copyright (C) 2015-2017 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ *
+ * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#include "sbl_avs_config.h"
+#include "sbl_prcm.h"
+
+#include <ti/csl/cslr_device.h>
+#include <ti/csl/hw_types.h>
+#include <ti/board/board.h>
+#include <ti/drv/pm/pmhal.h>
+#if defined(idkAM572x)
+#include <ti/board/src/idkAM572x/device/pmic_device.h>
+#elif defined(idkAM571x)
+#include <ti/board/src/idkAM571x/device/pmic_device.h>
+#elif defined(evmAM572x)
+#include <ti/board/src/evmAM572x/device/pmic_device.h>
+#elif defined(idkAM574x)
+#include <ti/board/src/idkAM574x/device/pmic_device.h>
+#endif
+
+/**********************************************************************
+************************** Internal functions ************************
+**********************************************************************/
+
+/**
+ * \brief    SBL_Read_Efuse_Reg function to read the voltage value from efuse
+ *
+ * \param    railVoltage pointer to the rail voltage.
+ *
+ * \retval   regVal  Value from the Efuse registers.
+ *
+ **/
+static uint32_t SBL_Read_Efuse_Reg(const voltage_rail_t *railVoltage);
+
+/**
+ * \brief     SBL_GetOppConfig function to get the 
+ *
+ * \param     oppVal   value representing the OPP mode.
+ * \param     boardId  Board ID value
+ *
+ * \retval    voltCoreData   pointer to the AVS data for the particular OPP.
+ *
+ **/
+static const vcores_data_t* SBL_GetOppConfig(uint32_t oppVal, uint32_t boardId);
+
+/**
+ * \brief     Initialize the I2C controller by configuring the pinmux and
+ *            module clocks.
+ *
+ * \param     oppVal   value representing the OPP mode.
+ *
+ **/
+static void SBL_I2CInit();
+
+/**
+ * \brief     Function to resolve the Board Name string to BoardId.
+ * 
+ * \param     pBoardName  Pointer to the Board Name String.
+ *
+ **/
+static uint32_t SBL_GetBoardid(char *pBoardName);
+
+ /**********************************************************************
+ ************************** Macros ************************************
+ **********************************************************************/
+
+/* TPS659039 */
+#define TPS659039_I2C_SLAVE_ADDR            0x58
+#define TPS659039_REG_ADDR_SMPS12           0x23
+#define TPS659039_REG_ADDR_SMPS45           0x2B
+#define TPS659039_REG_ADDR_SMPS6            0x2F
+#define TPS659039_REG_ADDR_SMPS7            0x33
+#define TPS659039_REG_ADDR_SMPS8            0x37
+
+#define TPS659039_PMIC_DEV_CTRL             0xA0
+
+/* TPS659039 Voltage settings in mv for OPP_NOMINAL */
+#define VDD_MPU_AM57XX      1100
+#define VDD_DSP_AM57XX      1060
+#define VDD_GPU_AM57XX      1060
+#define VDD_CORE_AM57XX     1030
+#define VDD_IVA_AM57XX      1060
+
+/* Efuse register offsets for DRA7xx platform */
+#define AM57XX_EFUSE_BASE                   0x4A002000U
+#define AM57XX_EFUSE_REGBITS                16
+
+/* STD_FUSE_OPP_VMIN_IVA_2 */
+#define STD_FUSE_OPP_VMIN_IVA_NOM           (AM57XX_EFUSE_BASE + 0x05CC)
+/* STD_FUSE_OPP_VMIN_IVA_3 */
+#define STD_FUSE_OPP_VMIN_IVA_OD            (AM57XX_EFUSE_BASE + 0x05D0)
+/* STD_FUSE_OPP_VMIN_IVA_4 */
+#define STD_FUSE_OPP_VMIN_IVA_HIGH          (AM57XX_EFUSE_BASE + 0x05D4)
+/* STD_FUSE_OPP_VMIN_DSPEVE_2 */
+#define STD_FUSE_OPP_VMIN_DSPEVE_NOM        (AM57XX_EFUSE_BASE + 0x05E0)
+/* STD_FUSE_OPP_VMIN_DSPEVE_3 */
+#define STD_FUSE_OPP_VMIN_DSPEVE_OD         (AM57XX_EFUSE_BASE + 0x05E4)
+/* STD_FUSE_OPP_VMIN_DSPEVE_4 */
+#define STD_FUSE_OPP_VMIN_DSPEVE_HIGH       (AM57XX_EFUSE_BASE + 0x05E8)
+/* STD_FUSE_OPP_VMIN_CORE_2 */
+#define STD_FUSE_OPP_VMIN_CORE_NOM          (AM57XX_EFUSE_BASE + 0x05F4)
+/* STD_FUSE_OPP_VMIN_GPU_2 */
+#define STD_FUSE_OPP_VMIN_GPU_NOM           (AM57XX_EFUSE_BASE + 0x1B08)
+/* STD_FUSE_OPP_VMIN_GPU_3 */
+#define STD_FUSE_OPP_VMIN_GPU_OD            (AM57XX_EFUSE_BASE + 0x1B0C)
+/* STD_FUSE_OPP_VMIN_GPU_4 */
+#define STD_FUSE_OPP_VMIN_GPU_HIGH          (AM57XX_EFUSE_BASE + 0x1B10)
+/* STD_FUSE_OPP_VMIN_MPU_2 */
+#define STD_FUSE_OPP_VMIN_MPU_NOM           (AM57XX_EFUSE_BASE + 0x1B20)
+/* STD_FUSE_OPP_VMIN_MPU_3 */
+#define STD_FUSE_OPP_VMIN_MPU_OD            (AM57XX_EFUSE_BASE + 0x1B24)
+/* STD_FUSE_OPP_VMIN_MPU_4 */
+#define STD_FUSE_OPP_VMIN_MPU_HIGH          (AM57XX_EFUSE_BASE + 0x1B28)
+
+#define CTRL_CORE_PAD_I2C1_SDA                      (0x400U)
+#define CTRL_CORE_PAD_I2C1_SCL                      (0x404U)
+
+#define CTRL_CORE_PAD_I2C1_SCL_PIN_PULLUP_EN        (0x00050000U)
+#define CTRL_CORE_PAD_I2C1_SDA_PIN_PULLUP_EN        (0x00050000U)
+
+#define BOARD_NAME_LENGTH                           (8)
+#define OPP_TABLE_SIZE                              (3)
+
+#if defined(idkAM572x) || defined(idkAM574x)
+/* Structure to hold the AVS values of all voltage rails for OPP NOM */
+const vcores_data_t idkAM572x_opp_nom_volts = {
+    {
+    VDD_MPU_AM57XX,
+    TPS659039_REG_ADDR_SMPS12,
+    {
+        STD_FUSE_OPP_VMIN_MPU_NOM,
+        AM57XX_EFUSE_REGBITS
+    },
+    },
+
+    {
+    VDD_CORE_AM57XX,
+    TPS659039_REG_ADDR_SMPS7,
+    {
+        STD_FUSE_OPP_VMIN_CORE_NOM,
+        AM57XX_EFUSE_REGBITS
+    },
+    },
+
+    {
+    VDD_DSP_AM57XX,
+    TPS659039_REG_ADDR_SMPS45,
+    {
+        STD_FUSE_OPP_VMIN_DSPEVE_NOM,
+        AM57XX_EFUSE_REGBITS
+    },
+    },
+
+    {
+    VDD_GPU_AM57XX,
+    TPS659039_REG_ADDR_SMPS6,
+    {
+        STD_FUSE_OPP_VMIN_GPU_NOM,
+        AM57XX_EFUSE_REGBITS
+    },
+    },
+
+    {
+    VDD_IVA_AM57XX,
+    TPS659039_REG_ADDR_SMPS8,
+    {
+        STD_FUSE_OPP_VMIN_IVA_NOM,
+        AM57XX_EFUSE_REGBITS
+    },
+    }
+};
+
+/* Structure to hold the AVS values of all voltage rails for OPP OD */
+const vcores_data_t idkAM572x_opp_od_volts = {
+    {
+    VDD_MPU_AM57XX,
+    TPS659039_REG_ADDR_SMPS12,
+    {
+        STD_FUSE_OPP_VMIN_MPU_OD,
+        AM57XX_EFUSE_REGBITS
+    },
+    },
+
+    {
+    VDD_CORE_AM57XX,
+    /* core does not support opp OD; using opp NOM */
+    TPS659039_REG_ADDR_SMPS7,
+    {
+        STD_FUSE_OPP_VMIN_CORE_NOM,
+        AM57XX_EFUSE_REGBITS
+    },
+    },
+
+    {
+    VDD_DSP_AM57XX,
+    TPS659039_REG_ADDR_SMPS45,
+    {
+        STD_FUSE_OPP_VMIN_DSPEVE_OD,
+        AM57XX_EFUSE_REGBITS
+    },
+    },
+
+    {
+    VDD_GPU_AM57XX,
+    TPS659039_REG_ADDR_SMPS6,
+    {
+        STD_FUSE_OPP_VMIN_GPU_OD,
+        AM57XX_EFUSE_REGBITS
+    },
+    },
+
+    {
+    VDD_IVA_AM57XX,
+    TPS659039_REG_ADDR_SMPS8,
+    {
+        STD_FUSE_OPP_VMIN_IVA_OD,
+        AM57XX_EFUSE_REGBITS
+    },
+    }
+};
+
+/* Structure to hold the AVS values of all voltage rails for OPP HIGH */
+const vcores_data_t idkAM572x_opp_high_volts = {
+    {
+    VDD_MPU_AM57XX,
+    TPS659039_REG_ADDR_SMPS12,
+    {
+        STD_FUSE_OPP_VMIN_MPU_HIGH,
+        AM57XX_EFUSE_REGBITS
+    },
+    },
+
+    {
+    VDD_CORE_AM57XX,
+    TPS659039_REG_ADDR_SMPS7,
+    /* core does not support opp high; using opp NOM */
+    {
+        STD_FUSE_OPP_VMIN_CORE_NOM,
+        AM57XX_EFUSE_REGBITS
+    },
+    },
+
+    {
+    VDD_DSP_AM57XX,
+    TPS659039_REG_ADDR_SMPS45,
+    {
+        STD_FUSE_OPP_VMIN_DSPEVE_HIGH,
+        AM57XX_EFUSE_REGBITS
+    },
+    },
+
+    {
+    VDD_GPU_AM57XX,
+    TPS659039_REG_ADDR_SMPS6,
+    {
+        STD_FUSE_OPP_VMIN_GPU_HIGH,
+        AM57XX_EFUSE_REGBITS
+    },
+    },
+
+    {
+    VDD_IVA_AM57XX,
+    TPS659039_REG_ADDR_SMPS8,
+    {
+        STD_FUSE_OPP_VMIN_IVA_HIGH,
+        AM57XX_EFUSE_REGBITS
+    },
+    }
+};
+#endif
+
+/* Structure defining the OPP table for AM572xIDK. */
+boardOppData_t gAm572xIdkOppTable[] =
+{
+    #if defined(idkAM572x) || defined(idkAM574x)
+    {OPP_MODE_NOM, &idkAM572x_opp_nom_volts},
+    {OPP_MODE_OD, &idkAM572x_opp_od_volts},
+    {OPP_MODE_HIGH, &idkAM572x_opp_high_volts}
+    #endif
+};
+
+#if defined(idkAM571x)
+/* Structure to hold the AVS values of all voltage rails for OPP NOM */
+const vcores_data_t idkAM571x_opp_nom_volts = {
+    {
+    VDD_MPU_AM57XX,
+    TPS659039_REG_ADDR_SMPS12,
+    {
+        STD_FUSE_OPP_VMIN_MPU_NOM,
+        AM57XX_EFUSE_REGBITS
+    },
+    },
+
+    {
+    VDD_CORE_AM57XX,
+    TPS659039_REG_ADDR_SMPS7,
+    {
+        STD_FUSE_OPP_VMIN_CORE_NOM,
+        AM57XX_EFUSE_REGBITS
+    },
+    },
+
+    /* DSP rail not connected for idkAM571x */
+    {
+    0U,
+    0U,
+    {
+        0U,
+        AM57XX_EFUSE_REGBITS
+    },
+    },
+
+    {
+    VDD_GPU_AM57XX,
+    TPS659039_REG_ADDR_SMPS6,
+    {
+        STD_FUSE_OPP_VMIN_GPU_NOM,
+        AM57XX_EFUSE_REGBITS
+    },
+    },
+
+    {
+    VDD_IVA_AM57XX,
+    TPS659039_REG_ADDR_SMPS45,
+    {
+        STD_FUSE_OPP_VMIN_IVA_NOM,
+        AM57XX_EFUSE_REGBITS
+    },
+    }
+};
+
+/* Structure to hold the AVS values of all voltage rails for OPP OD */
+const vcores_data_t idkAM571x_opp_od_volts = {
+    {
+    VDD_MPU_AM57XX,
+    TPS659039_REG_ADDR_SMPS12,
+    {
+        STD_FUSE_OPP_VMIN_MPU_OD,
+        AM57XX_EFUSE_REGBITS
+    },
+    },
+
+    {
+    VDD_CORE_AM57XX,
+    /* core does not support opp OD; using opp NOM */
+    TPS659039_REG_ADDR_SMPS7,
+    {
+        STD_FUSE_OPP_VMIN_CORE_NOM,
+        AM57XX_EFUSE_REGBITS
+    },
+    },
+
+    /* DSP rail not connected for idkAM571x */
+    {
+    0U,
+    0U,
+    {
+        0U,
+        AM57XX_EFUSE_REGBITS
+    },
+    },
+
+    {
+    VDD_GPU_AM57XX,
+    TPS659039_REG_ADDR_SMPS6,
+    {
+        STD_FUSE_OPP_VMIN_GPU_OD,
+        AM57XX_EFUSE_REGBITS
+    },
+    },
+
+    {
+    VDD_IVA_AM57XX,
+    TPS659039_REG_ADDR_SMPS45,
+    {
+        STD_FUSE_OPP_VMIN_IVA_OD,
+        AM57XX_EFUSE_REGBITS
+    },
+    }
+};
+
+/* Structure to hold the AVS values of all voltage rails for OPP HIGH */
+const vcores_data_t idkAM571x_opp_high_volts = {
+    {
+    VDD_MPU_AM57XX,
+    TPS659039_REG_ADDR_SMPS12,
+    {
+        STD_FUSE_OPP_VMIN_MPU_HIGH,
+        AM57XX_EFUSE_REGBITS
+    },
+    },
+
+    {
+    VDD_CORE_AM57XX,
+    TPS659039_REG_ADDR_SMPS7,
+    /* core does not support opp high; using opp NOM */
+    {
+        STD_FUSE_OPP_VMIN_CORE_NOM,
+        AM57XX_EFUSE_REGBITS
+    },
+    },
+
+    /* DSP rail not connected for idkAM571x */
+    {
+    0U,
+    0U,
+    {
+        0U,
+        AM57XX_EFUSE_REGBITS
+    },
+    },
+
+    {
+    VDD_GPU_AM57XX,
+    TPS659039_REG_ADDR_SMPS6,
+    {
+        STD_FUSE_OPP_VMIN_GPU_HIGH,
+        AM57XX_EFUSE_REGBITS
+    },
+    },
+
+    {
+    VDD_IVA_AM57XX,
+    TPS659039_REG_ADDR_SMPS45,
+    {
+        STD_FUSE_OPP_VMIN_IVA_HIGH,
+        AM57XX_EFUSE_REGBITS
+    },
+    }
+};
+#endif
+
+/* Structure defining the OPP table for AM571xIDK. */
+boardOppData_t gAm571xIdkOppTable[] =
+{
+    #if defined(idkAM571x)
+    {OPP_MODE_NOM, &idkAM571x_opp_nom_volts},
+    {OPP_MODE_OD, &idkAM571x_opp_od_volts},
+    {OPP_MODE_HIGH, &idkAM571x_opp_high_volts}
+    #endif
+};
+
+#if defined(evmAM572x)
+/* Structure to hold the AVS values of all voltage rails for OPP NOM */
+const vcores_data_t evmAM572x_opp_nom_volts = {
+    {
+    VDD_MPU_AM57XX,
+    TPS659039_REG_ADDR_SMPS12,
+    {
+        STD_FUSE_OPP_VMIN_MPU_NOM,
+        AM57XX_EFUSE_REGBITS
+    },
+    },
+
+    {
+    VDD_CORE_AM57XX,
+    TPS659039_REG_ADDR_SMPS6,
+    {
+        STD_FUSE_OPP_VMIN_CORE_NOM,
+        AM57XX_EFUSE_REGBITS
+    },
+    },
+
+    {
+    VDD_DSP_AM57XX,
+    TPS659039_REG_ADDR_SMPS45,
+    {
+        STD_FUSE_OPP_VMIN_DSPEVE_NOM,
+        AM57XX_EFUSE_REGBITS
+    },
+    }
+};
+
+/* Structure to hold the AVS values of all voltage rails for OPP OD */
+const vcores_data_t evmAM572x_opp_od_volts = {
+    {
+    VDD_MPU_AM57XX,
+    TPS659039_REG_ADDR_SMPS12,
+    {
+        STD_FUSE_OPP_VMIN_MPU_OD,
+        AM57XX_EFUSE_REGBITS
+    },
+    },
+
+    {
+    VDD_CORE_AM57XX,
+    /* core does not support opp OD; using opp NOM */
+    TPS659039_REG_ADDR_SMPS6,
+    {
+        STD_FUSE_OPP_VMIN_CORE_NOM,
+        AM57XX_EFUSE_REGBITS
+    },
+    },
+
+    {
+    VDD_DSP_AM57XX,
+    TPS659039_REG_ADDR_SMPS45,
+    {
+        STD_FUSE_OPP_VMIN_DSPEVE_OD,
+        AM57XX_EFUSE_REGBITS
+    },
+    },
+
+    /* GPU rail not connected for evmAM572x */
+    {
+    0U,
+    0U,
+    {
+        0U,
+        AM57XX_EFUSE_REGBITS
+    },
+    },
+
+    /* IVA rail not connected for evmAM572x */
+    {
+    0U,
+    0U,
+    {
+        0U,
+        AM57XX_EFUSE_REGBITS
+    },
+    }
+};
+
+/* Structure to hold the AVS values of all voltage rails for OPP HIGH */
+const vcores_data_t evmAM572x_opp_high_volts = {
+    {
+    VDD_MPU_AM57XX,
+    TPS659039_REG_ADDR_SMPS12,
+    {
+        STD_FUSE_OPP_VMIN_MPU_HIGH,
+        AM57XX_EFUSE_REGBITS
+    },
+    },
+
+    {
+    VDD_CORE_AM57XX,
+    TPS659039_REG_ADDR_SMPS6,
+    /* core does not support opp high; using opp NOM */
+    {
+        STD_FUSE_OPP_VMIN_CORE_NOM,
+        AM57XX_EFUSE_REGBITS
+    },
+    },
+
+    {
+    VDD_DSP_AM57XX,
+    TPS659039_REG_ADDR_SMPS45,
+    {
+        STD_FUSE_OPP_VMIN_DSPEVE_HIGH,
+        AM57XX_EFUSE_REGBITS
+    },
+    }
+};
+
+#endif
+/* Structure defining the OPP table for GPEVM. */
+boardOppData_t gAm572xGpevmOppTable[] =
+{
+    #if defined(evmAM572x)
+    {OPP_MODE_NOM, &evmAM572x_opp_nom_volts},
+    {OPP_MODE_OD, &evmAM572x_opp_od_volts},
+    {OPP_MODE_HIGH, &evmAM572x_opp_high_volts}
+    #endif
+};
+
+/** \brief Contains pointers to the OPP Table data for different boards. */
+static boardOppData_t *gBoardOppTable [BOARD_MAX + 1U]= {
+    NULL, /* BOARD_UNKNOWN */
+    gAm572xGpevmOppTable, /* BOARD_GPEVMAM572x */
+    gAm572xIdkOppTable, /* BOARD_IDKAM572x */
+    gAm571xIdkOppTable, /* BOARD_IDKAM571x */
+       gAm572xIdkOppTable, /* BOARD_IDKAM574x */
+    NULL  /* BOARD Custom */
+};
+
+void SBL_Configure_AVS(uint32_t oppMode)
+{
+    uint32_t val;
+    volatile uint32_t delayVar = 0U;
+    uint32_t offset_code = 0U;
+    const vcores_data_t *vcores = NULL;
+    pmic_data_t *pPmicData;
+    pmhalVmOppId_t pmOpp;
+    Board_IDInfo boardInfo;
+    uint32_t boardId;
+
+    /*
+    ** Initialize the I2C controller to communicate with PMIC device.
+    ** This initialization includes setting up the clock and pinmux
+    ** for I2C Bus.
+    ** This is required as the AVS setting needs to be completed before
+    ** IO calibration sequence is initiated.
+    */
+    SBL_I2CInit();
+
+    /* Read the EEPROM to identify the board. */
+    Board_getIDInfo(&boardInfo);
+
+    /* Resolve the Board Name from EEPROM to a boardID. */
+    boardId = SBL_GetBoardid(boardInfo.boardName);
+
+    /* Get the OPP configuration data for the specific board. */
+    vcores = SBL_GetOppConfig(oppMode, boardId);
+
+    /* Get equivalent OPP macro in PM LLD */
+    if (oppMode == OPP_MODE_NOM) pmOpp = PMHAL_VM_OPP_NOM;
+    else if (oppMode == OPP_MODE_OD) pmOpp = PMHAL_VM_OPP_OD;
+    else if (oppMode == OPP_MODE_HIGH) pmOpp = PMHAL_VM_OPP_HIGH;
+    else pmOpp = PMHAL_VM_OPP_UNDEF;
+
+    /* Get the Pointer to the PMIC data structure. */
+    pPmicData = Board_GetPmicData();
+
+    pPmicData->pmic_device_open(pPmicData->dev_instance - 1);
+
+    if(BOARD_GPEVMAM572x == boardId)
+    {
+        /* Set the DEV_CTRL.DEV_ON to 1 to avoid turning off the PMIC for GPEVM */
+        pPmicData->pmic_write(pPmicData->slave_addr, TPS659039_PMIC_DEV_CTRL, 0x01);
+    }
+
+    /* Configure AVS-0 voltage on CORE_VD */
+    val = SBL_Read_Efuse_Reg(&vcores->core);
+    offset_code = pPmicData->pmic_get_offset(val, pPmicData);
+    /*PMIC I2C write */
+    pPmicData->pmic_write(pPmicData->slave_addr, vcores->core.addr, offset_code);
+
+    /* Configure the AVS voltage to MPU rail */
+    val = SBL_Read_Efuse_Reg(&vcores->mpu);
+    offset_code = pPmicData->pmic_get_offset(val, pPmicData);
+    /*PMIC I2C write */
+    pPmicData->pmic_write(pPmicData->slave_addr, vcores->mpu.addr, offset_code);
+    PMHALVMEnableABB(PMHAL_PRCM_VD_MPU, pmOpp);
+
+    /*
+    ** Delay required after configuring 2 voltage rails
+    */
+    for (delayVar = 0; delayVar < 0x1000U; delayVar++) ;
+
+    /*
+    ** Check if the Voltage rail is Configured If yes then set the AVS value for
+    ** the rail.
+    */
+    if(vcores->dsp.value != 0U)
+    {
+        /* Configure the AVS voltage to DSP rail */
+        val = SBL_Read_Efuse_Reg(&vcores->dsp);
+        offset_code = pPmicData->pmic_get_offset(val, pPmicData);
+        /*PMIC I2C write */
+        pPmicData->pmic_write(pPmicData->slave_addr, vcores->dsp.addr, offset_code);
+        PMHALVMEnableABB(PMHAL_PRCM_VD_DSPEVE, pmOpp);
+    }
+
+    if(vcores->gpu.value != 0U)
+    {
+        /* Configure the AVS voltage to GPU rail */
+        val = SBL_Read_Efuse_Reg(&vcores->gpu);
+        offset_code = pPmicData->pmic_get_offset(val, pPmicData);
+        /*PMIC I2C write */
+        pPmicData->pmic_write(pPmicData->slave_addr, vcores->gpu.addr, offset_code);
+        PMHALVMEnableABB(PMHAL_PRCM_VD_GPU, pmOpp);
+    }
+
+    if(vcores->iva.value != 0U)
+    {
+        /* Configure the AVS voltage to IVA rail */
+        val = SBL_Read_Efuse_Reg(&vcores->iva);
+        offset_code = pPmicData->pmic_get_offset(val, pPmicData);
+        /*PMIC I2C write */
+        pPmicData->pmic_write(pPmicData->slave_addr, vcores->iva.addr, offset_code);
+        PMHALVMEnableABB(PMHAL_PRCM_VD_IVAHD, pmOpp);
+    }
+
+    /* Close the PMIC device. */
+    pPmicData->pmic_device_close();
+}
+
+static const vcores_data_t* SBL_GetOppConfig(uint32_t oppVal, uint32_t boardId)
+{
+    uint32_t size = OPP_TABLE_SIZE;
+    uint32_t count = 0U;
+    const struct vcores_data *pOppCfg = NULL;
+    boardOppData_t *pOppTable = NULL;
+
+    /* Assign the pointer to the board specific OPP Table. */
+    pOppTable = gBoardOppTable[boardId];
+
+    while(count < size)
+    {
+        if(oppVal == (pOppTable + count)->oppVal)
+        {
+            pOppCfg = (pOppTable + count)->pboardOppData;
+            break;
+        }
+        count++;
+    }
+
+    return pOppCfg;
+}
+
+static void SBL_I2CInit()
+{
+    /* Set the Clock operational mode for the clock domain. */
+    SBL_PRCMSetClkOperMode(CSL_MPU_L4PER_CM_CORE_REGS, CM_L4PER_CLKSTCTRL,
+        PRCM_CD_CLKTRNMODES_SW_WAKEUP);
+
+    HW_WR_REG32(CSL_MPU_L4PER_CM_CORE_REGS + CM_L4PER_I2C1_CLKCTRL, 0x2U);
+
+    /* Check for module enable status */
+    while(2U !=
+        (HW_RD_REG32(CSL_MPU_L4PER_CM_CORE_REGS + CM_L4PER_I2C1_CLKCTRL) & 3U));
+
+    /* Check clock activity - ungated */
+    while(CM_L4PER_CLKSTCTRL_CLKACTIVITY_L4PER_L3_GICLK_MASK !=
+    (HW_RD_REG32(CSL_MPU_L4PER_CM_CORE_REGS + CM_L4PER_CLKSTCTRL) &
+    CM_L4PER_CLKSTCTRL_CLKACTIVITY_L4PER_L3_GICLK_MASK));
+
+    /* SDA */
+    HW_WR_REG32((SOC_CORE_PAD_IO_REGISTERS_BASE + CTRL_CORE_PAD_I2C1_SDA),
+            (CTRL_CORE_PAD_I2C1_SDA_PIN_PULLUP_EN));
+
+    /* SCL */
+    HW_WR_REG32((SOC_CORE_PAD_IO_REGISTERS_BASE + CTRL_CORE_PAD_I2C1_SCL),
+            (CTRL_CORE_PAD_I2C1_SCL_PIN_PULLUP_EN));
+}
+
+static uint32_t SBL_Read_Efuse_Reg(const voltage_rail_t *railVoltage)
+{
+    uint32_t val;
+
+    if (!railVoltage->value)
+        return 0;
+    if (!railVoltage->efuse.reg)
+        return railVoltage->value;
+
+    switch (railVoltage->efuse.reg_bits)
+    {
+        case 16:
+            val = HW_RD_REG16(railVoltage->efuse.reg);
+            break;
+        case 32:
+            val = HW_RD_REG32(railVoltage->efuse.reg);
+            break;
+        default:
+            return railVoltage->value;
+    }
+
+    if (!val)
+    {
+        return railVoltage->value;
+    }
+
+    return val;
+}
+
+static uint32_t SBL_GetBoardid(char *pBoardName)
+{
+    uint32_t boardId;
+
+    /* Check if the board is GPEVM by comparing the string read from EEPROM. */
+    if (strncmp("AM572PM_", pBoardName, BOARD_NAME_LENGTH) == 0U)
+    {
+        boardId = BOARD_GPEVMAM572x;
+    }
+    /* Check if the board is AM572xIDK by comparing the string read from EEPROM. */
+    else if (strncmp("AM572IDK", pBoardName, BOARD_NAME_LENGTH) == 0U)
+    {
+        boardId = BOARD_IDKAM572x;
+    }
+       /* Check if the board is AM574xIDK by comparing the string read from EEPROM. */
+    else if (strncmp("AM574IDK", pBoardName, BOARD_NAME_LENGTH) == 0U)
+    {
+        boardId = BOARD_IDKAM574x;
+    }
+    /* Check if the board is AM571xIDK by comparing the string read from EEPROM. */
+    else if (strncmp("AM571IDK", pBoardName, BOARD_NAME_LENGTH) == 0U)
+    {
+        boardId = BOARD_IDKAM571x;
+    }
+    else
+    {
+        /* If the board is not one of these, then the board
+        ** ID is returned as BOARD_UNKNOWN.
+        */
+        boardId = BOARD_UNKNOWN;
+    }
+
+    return boardId;
+}
diff --git a/packages/ti/boot/sbl/board/src/sbl_avs_config.h b/packages/ti/boot/sbl/board/src/sbl_avs_config.h
new file mode 100644 (file)
index 0000000..6db1f94
--- /dev/null
@@ -0,0 +1,121 @@
+/**
+ *  \file   sbl_avs_config.h
+ *
+ *  \brief  This file contains functions and data related to AVS and ABB
+ *          configuration for the voltage rails.
+ *
+ */
+
+/*
+ * Copyright (C) 2015-2016 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ *
+ * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+ #include <stdint.h>
+ #include <string.h>
+
+/* Macro values defining the different OPP Configuration supported. */
+#define OPP_MODE_NOM                  (0)
+#define OPP_MODE_OD                   (1)
+#define OPP_MODE_HIGH                 (2)
+
+/**
+ * struct volts_efuse_data - efuse definition for voltage
+ * @reg:    register address for efuse
+ * @reg_bits:   Number of bits in a register address, mandatory.
+ */
+typedef struct efuse_data
+{
+    uint32_t reg;
+    uint8_t  reg_bits;
+}efuse_data_t;
+
+typedef struct voltage_rail {
+    uint32_t     value;
+    uint32_t     addr;
+    efuse_data_t efuse;
+}voltage_rail_t;
+
+typedef struct vcores_data
+{
+    voltage_rail_t mpu;
+    voltage_rail_t core;
+    voltage_rail_t dsp;
+    voltage_rail_t gpu;
+    voltage_rail_t iva;
+}vcores_data_t;
+
+typedef struct abb_data {
+    uint32_t efuseReg;
+    uint32_t setupReg;
+    uint32_t ctrlReg;
+    uint32_t irqReg;
+    uint32_t irqBit;
+    uint32_t ldoVbbCtrlReg;
+}abb_data_t;
+
+typedef struct boardOppData
+{
+    uint32_t oppVal;
+    const vcores_data_t *pboardOppData;
+}boardOppData_t;
+
+/**
+ *  \brief EVM Board ID.
+ */
+typedef enum boardId
+{
+    BOARD_MIN,
+    /**< Should be the first value of this enumeration. */
+    BOARD_UNKNOWN = BOARD_MIN,
+    /**< Unknown board. */
+    BOARD_GPEVMAM572x = 0x1U,
+    /**< General Purpose EVM */
+    BOARD_IDKAM572x = 0x2U,
+    /**< AM572x IDK */
+    BOARD_IDKAM571x = 0x3U,
+    /**< AM571x IDK */
+       BOARD_IDKAM574x = 0x4U,
+    /**< AM574x IDK */
+    BOARD_CUSTOM = 0x5U,
+    /**< Any other custom board. */
+    BOARD_MAX = BOARD_CUSTOM
+    /**< Max board ID. */
+} boardId_t;
+
+/**
+ *  \brief    This API performs the AVS by scaling the the domain voltage level
+ *            to specific values within the operational voltage range of the
+ *            device.
+ *
+ *  \param    oppMode   OPP value for which the OPP configuration is to be done.
+ */
+void SBL_Configure_AVS(uint32_t oppMode);
diff --git a/packages/ti/boot/sbl/board/src/sbl_image_copy.c b/packages/ti/boot/sbl/board/src/sbl_image_copy.c
new file mode 100644 (file)
index 0000000..e946d16
--- /dev/null
@@ -0,0 +1,73 @@
+/**
+ *  \file   sbl_image_copy.c
+ *
+ *  \brief  This file contain imagecopy wrapper function.
+ *
+ */
+
+/*
+ * Copyright (C) 2015-2016 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ *
+ * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/* ========================================================================== */
+/*                             Include Files                                  */
+/* ========================================================================== */
+
+#include <stdint.h>
+#include "sbl_image_copy.h"
+#if defined(BOOT_QSPI)
+#include "sbl_qspi.h"
+#elif defined(BOOT_MMCSD)
+#include "sbl_mmcsd.h"
+#elif defined(BOOT_SPI)
+#include "sbl_spi.h"
+#endif
+
+
+int32_t SBL_ImageCopy(sblEntryPoint_t *pEntry)
+{
+    int32_t retval = 0;
+
+#if defined(BOOT_MMCSD)
+    /* MMCSD Boot Mode Image Copy function. */
+    if (SBL_MMCBootImage(pEntry) != 1U)
+#elif defined(BOOT_QSPI)
+    if (SBL_QSPIBootImage(pEntry) != 1U)
+#elif defined(BOOT_SPI)
+    if (SBL_SPIBootImage(pEntry) != 1U)
+#endif
+    {
+        retval = -1;
+    }
+
+    return retval;
+}
\ No newline at end of file
diff --git a/packages/ti/boot/sbl/board/src/sbl_image_copy.h b/packages/ti/boot/sbl/board/src/sbl_image_copy.h
new file mode 100644 (file)
index 0000000..15e9a16
--- /dev/null
@@ -0,0 +1,92 @@
+/**
+ *  \file   sbl_image_copy.c
+ *
+ *  \brief  This file contains function prototype of the Image Copy wrapper
+ *                     function.
+ *
+ */
+
+/*
+ * Copyright (C) 2015-2016 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ *
+ * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#ifndef _SBL_IMAGE_COPY_H_
+#define _SBL_IMAGE_COPY_H_
+
+/* ========================================================================== */
+/*                             Include Files                                  */
+/* ========================================================================== */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Structure holding the entry address of the applications for different cores. */
+typedef struct sblEntryPoint
+{
+    uint32_t    entryPoint_MPU_CPU0;
+    /* Value holding the entry address of MPU_CPU0. */
+    uint32_t    entryPoint_MPU_CPU1;
+    /* Value holding the entry address of MPU_CPU1. */
+    uint32_t    entryPoint_DSP1;
+    /* Value holding the entry address of MPU_DSP1. */
+    uint32_t    entryPoint_DSP2;
+    /* Value holding the entry address of MPU_DSP2. */
+    uint32_t    entryPoint_IPU1_CPU0;
+    /* Value holding the entry address of IPU_CPU0. */
+    uint32_t    entryPoint_IPU1_CPU1;
+    /* Value holding the entry address of IPU1_CPU1. */
+    uint32_t    entryPoint_IPU2_CPU0;
+    /* Value holding the entry address of IPU2_CPU0. */
+    uint32_t    entryPoint_IPU2_CPU1;
+    /* Value holding the entry address of IPU2_CPU1. */
+}sblEntryPoint_t;
+
+/*
+ *  \brief    SBL_ImageCopy function is a wrapper to Multicore Image parser
+ *            function. Based on boot-mode jumps into specific Image copy
+ *            function for the particular bootmode.
+ *
+ *  \param    pointer to the structure holding the entry pointers for different
+ *            cores.
+ *
+ *  \return   error status.If error has occured it returns a non zero value.
+ *            If no error has occured then return status will be zero.
+ *
+ */
+int32_t SBL_ImageCopy(sblEntryPoint_t *pEntry);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/packages/ti/boot/sbl/build/makefile b/packages/ti/boot/sbl/build/makefile
new file mode 100644 (file)
index 0000000..aea3ef8
--- /dev/null
@@ -0,0 +1,63 @@
+#
+# Copyright (c) 2018, Texas Instruments Incorporated
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# *  Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+#
+# *  Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in the
+#    documentation and/or other materials provided with the distribution.
+#
+# *  Neither the name of Texas Instruments Incorporated nor the names of
+#    its contributors may be used to endorse or promote products derived
+#    from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+# CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+# PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+# OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+# WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+# OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+# EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+
+# Get directory of makefile
+mkfile_path := $(abspath $(lastword $(MAKEFILE_LIST)))
+mkfile_dir := $(dir $(mkfile_path))
+
+# Setup build variables relative to makefile folder
+ifeq ($(SDK_INSTALL_PATH),)
+PDK_INSTALL_PATH ?= $(abspath $(mkfile_dir)../../../..)
+SDK_INSTALL_PATH ?= $(abspath $(PDK_INSTALL_PATH)../../..)
+else
+PDK_INSTALL_PATH ?= $(mkfile_dir)../../../..
+endif
+
+
+# Strip drive names if present, to prevent build breaks
+STRIP_DRIVE_NAME := $(subst :,: ,$(PDK_INSTALL_PATH))
+DRIVE_LETTER := $(firstword $(STRIP_DRIVE_NAME))
+
+export SBL_DRIVE_LETTER := $(subst :,,$(DRIVE_LETTER))
+
+ifeq ($(wildcard $(PDK_INSTALL_PATH)/Rules.make),)
+include $(PDK_INSTALL_PATH)/ti/build/Rules.make
+else
+include $(PDK_INSTALL_PATH)/Rules.make
+endif
+
+COMP = sbl
+
+lib_$(COMP)_BUILD_DEPENDENCY = board
+
+$(COMP)_DOXYGEN_SUPPORT = no
+
+include $(PDK_INSTALL_PATH)/ti/build/comp_top.mk
diff --git a/packages/ti/boot/sbl/build/sbl_am57xx.sh b/packages/ti/boot/sbl/build/sbl_am57xx.sh
new file mode 100755 (executable)
index 0000000..002939d
--- /dev/null
@@ -0,0 +1,38 @@
+# Go to PDK SBL root directory
+cd ..
+
+#build instructions for bootloader
+
+ls
+make clean BOARD=idkAM572x
+make clean BOARD=idkAM571x
+make clean BOARD=evmAM572x
+make clean BOARD=idkAM574x
+make flashwriter_clean BOARD=idkAM572x
+make flashwriter_clean BOARD=idkAM571x
+make flashwriter_clean BOARD=idkAM574x
+
+make all BOARD=idkAM572x SOC=AM572x BOOTMODE=mmcsd
+make all BOARD=idkAM572x SOC=AM572x BOOTMODE=qspi
+make all BOARD=idkAM571x SOC=AM571x BOOTMODE=mmcsd
+make all BOARD=idkAM571x SOC=AM571x BOOTMODE=qspi
+make all BOARD=evmAM572x SOC=AM572x BOOTMODE=mmcsd
+make all BOARD=evmAM572x SOC=AM572x BOOTMODE=emmc
+make flashwriter BOARD=idkAM572x SOC=AM572x
+make flashwriter BOARD=idkAM571x SOC=AM571x
+make flashwriter BOARD=idkAM574x SOC=AM574x
+
+make all BOARD=idkAM574x SOC=AM574x BOOTMODE=mmcsd DDRECC=yes
+make all BOARD=idkAM574x SOC=AM574x BOOTMODE=qspi DDRECC=yes
+
+# removes the object files
+rm -rf binary/evmAM572x/mmcsd/obj/
+rm -rf binary/idkAM572x/mmcsd/obj/
+rm -rf binary/idkAM572x/qspi/obj/
+rm -rf binary/idkAM571x/mmcsd/obj/
+rm -rf binary/idkAM571x/qspi/obj/
+rm -rf binary/idkAM574x/mmcsd/obj/
+rm -rf binary/idkAM574x/qspi/obj/
+
+#archive
+tar -cf sbl.tar --exclude='*.tar' --exclude='*.git*' ./*
diff --git a/packages/ti/boot/sbl/build/sbl_am65xx.sh b/packages/ti/boot/sbl/build/sbl_am65xx.sh
new file mode 100755 (executable)
index 0000000..bfd7e4e
--- /dev/null
@@ -0,0 +1,9 @@
+#build instructions for bootloader
+
+ls
+
+make clean all
+
+#archive
+cd ..
+tar -cf sbl.tar --exclude='obj' --exclude='*.tar' --exclude='*.git*' ./*
diff --git a/packages/ti/boot/sbl/build/sbl_boot_test.mk b/packages/ti/boot/sbl/build/sbl_boot_test.mk
new file mode 100644 (file)
index 0000000..66c32e2
--- /dev/null
@@ -0,0 +1,58 @@
+#
+# This file is the makefile for building images used for SBL testing.
+#
+include $(PDK_INSTALL_PATH)/ti/build/Rules.make
+
+APP_NAME = sbl_boot_test
+BUILD_OS_TYPE = baremetal
+LOCAL_APP_NAME = sbl_$(BUILD_OS_TYPE)_boot_test_$(BOARD)_$(CORE)TestApp
+
+SBL_SRC_DIR =  $(PDK_INSTALL_PATH)/ti/boot/sbl
+
+SRCDIR      += $(PDK_SBL_COMP_PATH)/example/k3MulticoreApp
+
+INCDIR      += $(PDK_SBL_COMP_PATH)/example/k3MulticoreApp
+
+
+
+CFLAGS_LOCAL_COMMON = $(PDK_CFLAGS)
+PACKAGE_SRCS_COMMON = .
+
+# List all the external components/interfaces, whose interface header files
+#  need to be included for this component
+INCLUDE_EXTERNAL_INTERFACES =
+
+# List all the components required by the application
+COMP_LIST_COMMON =
+
+SRCS_COMMON += sbl_amp_multicore.c sbl_printf.c
+
+# asm files and linker scripts change due to different tool chains for R5 and A53
+ifeq ($(CORE),$(filter $(CORE), mcu1_0 mcu1_1 mcu2_0 mcu2_1 mcu3_0 mcu3_1))
+  SRCS_ASM_COMMON = sbl_multicore_r5.asm
+  EXTERNAL_LNKCMD_FILE_LOCAL =  $(PDK_SBL_COMP_PATH)/example/k3MulticoreApp/mcuAmplinker.lds
+endif
+
+ifeq ($(CORE),$(filter $(CORE), mpu1_0 mpu1_1 mpu2_0 mpu2_1))
+  SRCS_ASM_COMMON = sbl_multicore_a53.asm
+  LNKCMD_FILE = $(PDK_SBL_COMP_PATH)/example/k3MulticoreApp/mpuAmplinker.lds
+endif
+
+# Core/SoC/platform specific source files and CFLAGS
+# Example:
+#   SRCS_<core/SoC/platform-name> =
+#   CFLAGS_LOCAL_<core/SoC/platform-name> =
+
+# Include common make files
+ifeq ($(MAKERULEDIR), )
+#Makerule path not defined, define this and assume relative path from ROOTDIR
+  MAKERULEDIR := $(ROOTDIR)/ti/build/makerules
+  export MAKERULEDIR
+endif
+include $(MAKERULEDIR)/common.mk
+
+# OBJs and libraries are built by using rule defined in rules_<target>.mk
+#     and need not be explicitly specified here
+
+# Nothing beyond this point
+
diff --git a/packages/ti/boot/sbl/build/sbl_c6748.sh b/packages/ti/boot/sbl/build/sbl_c6748.sh
new file mode 100755 (executable)
index 0000000..3989003
--- /dev/null
@@ -0,0 +1,18 @@
+# Go to PDK SBL root directory
+cd ..
+
+#build instructions for bootloader
+
+ls
+make clean BOARD=lcdkC6748
+make mmcsd_flashwriter_clean BOARD=lcdkC6748
+
+
+make all BOARD=lcdkC6748 SOC=C6748 BOOTMODE=mmcsd
+make mmcsd_flashwriter BOARD=lcdkC6748 SOC=C6748
+
+# removes the object files
+rm -rf binary/lcdkC6748/mmcsd/obj/
+
+#archive
+tar -cf sbl.tar --exclude='*.tar' --exclude='*.git*' ./*
diff --git a/packages/ti/boot/sbl/build/sbl_img.mk b/packages/ti/boot/sbl/build/sbl_img.mk
new file mode 100755 (executable)
index 0000000..119d277
--- /dev/null
@@ -0,0 +1,105 @@
+#
+# This file is the makefile for building SBL image
+# that is loaded by R5 ROM.
+#
+include $(PDK_INSTALL_PATH)/ti/build/Rules.make
+
+APP_NAME = sbl_$(BOOTMODE)_img
+BUILD_OS_TYPE = baremetal
+
+SRCDIR      += $(PDK_SBL_COMP_PATH)/board/k3
+
+INCDIR      += $(PDK_SBL_COMP_PATH)
+INCDIR      += $(PDK_SBL_COMP_PATH)/soc
+INCDIR      += $(PDK_SBL_COMP_PATH)/soc/k3
+
+CFLAGS_LOCAL_COMMON = $(PDK_CFLAGS) $(SBL_CFLAGS)
+
+PACKAGE_SRCS_COMMON = .
+
+# List all the external components/interfaces, whose interface header files
+#  need to be included for this component
+INCLUDE_EXTERNAL_INTERFACES = pdk
+
+# List all the components required by the application
+COMP_LIST_COMMON += sbl_lib_$(BOOTMODE) board uart osal_nonos csl csl_init sciclient i2c
+
+# Check for custom flags
+ifeq ($(BOOTMODE), cust)
+  SBL_CFLAGS = $(CUST_SBL_FLAGS)
+endif # ifeq ($(BOOTMODE), cust)
+
+# BOOTMODE specific CFLAGS
+ifeq ($(BOOTMODE), mmcsd)
+  SBL_CFLAGS+= -DBOOT_MMCSD
+endif # ifeq ($(BOOTMODE), mmcsd)
+
+ifeq ($(BOOTMODE), ospi)
+  SBL_CFLAGS += -DBOOT_OSPI
+endif # ifeq ($(BOOTMODE), ospi)
+
+ifeq ($(BOOTMODE), hyperflash)
+  SBL_CFLAGS += -DBOOT_HYPERFLASH
+endif # ifeq ($(BOOTMODE), hyperflash)
+
+ifeq ($(BOOTMODE), uart)
+  SBL_CFLAGS += -DBOOT_UART
+endif # ifeq ($(BOOTMODE), uart)
+
+# Select libraries based on flags
+ifeq ($(filter $(SBL_CFLAGS), -DSBL_USE_DMA=1), -DSBL_USE_DMA=1)
+  COMP_LIST_COMMON += udma
+endif # ifeq ($(filter $(SBL_CFLAGS), -DSBL_USE_DMA=1), -DSBL_USE_DMA=1)
+
+ifeq ($(filter $(SBL_CFLAGS), -DBOOT_MMCSD), -DBOOT_MMCSD)
+  COMP_LIST_COMMON += mmcsd fatfs_indp
+endif # ifeq ($(filter $(SBL_CFLAGS), -DBOOT_MMCSD), -DBOOT_MMCSD)
+
+ifeq ($(filter $(SBL_CFLAGS), -DBOOT_HYPERFLASH), -DBOOT_HYPERFLASH)
+  COMP_LIST_COMMON += spi
+endif # ifeq ($(filter $(SBL_CFLAGS), -DBOOT_HYPERFLASH), -DBOOT_HYPERFLASH)
+
+ifeq ($(filter $(SBL_CFLAGS), -DBOOT_OSPI), -DBOOT_OSPI)
+ifeq ($(filter $(SBL_CFLAGS), -DSBL_USE_DMA=1), -DSBL_USE_DMA=1)
+  COMP_LIST_COMMON += spi_dma
+else
+  COMP_LIST_COMMON += spi
+endif # ifeq ($(filter $(SBL_CFLAGS), -DSBL_USE_DMA=1), -DSBL_USE_DMA=1)
+endif # ifeq ($(filter $(SBL_CFLAGS), -DBOOT_OSPI), -DBOOT_OSPI)
+
+SRCS_COMMON += sbl_main.c
+
+EXTERNAL_LNKCMD_FILE_LOCAL = $(PDK_SBL_COMP_PATH)/soc/k3/linker.cmd
+
+# Core/SoC/platform specific source files and CFLAGS
+# Example:
+#   SRCS_<core/SoC/platform-name> =
+#   CFLAGS_LOCAL_<core/SoC/platform-name> =
+
+# Include common make files
+ifeq ($(MAKERULEDIR), )
+#Makerule path not defined, define this and assume relative path from ROOTDIR
+  MAKERULEDIR := $(ROOTDIR)/ti/build/makerules
+  export MAKERULEDIR
+endif
+
+# Select the SBL_OBJ_COPY to use.
+#
+SBL_OBJ_COPY := $(TOOLCHAIN_PATH_GCC_ARCH64)/bin/aarch64-elf-objcopy
+export SBL_OBJ_COPY
+
+# EFUSE_DEFAULT - R5 ROM will run the SBL in lockstep mode in lockstep
+# #                 enabled devices and in split mode, if the devices do
+# #                 not support lockstep.
+# # SPLIT_MODE -    R5 ROM will awlys run the SBL on MCU1_0 in split mode
+# #                 irrespective of whether the EFuse says the device can
+# #                 support lockstep mode.
+R5_STARTUP_MODE := SPLIT_MODE
+export R5_STARTUP_MODE
+
+include $(MAKERULEDIR)/common.mk
+
+# OBJs and libraries are built by using rule defined in rules_<target>.mk
+#     and need not be explicitly specified here
+
+# Nothing beyond this point
diff --git a/packages/ti/boot/sbl/build/sbl_k2e.sh b/packages/ti/boot/sbl/build/sbl_k2e.sh
new file mode 100755 (executable)
index 0000000..b88198d
--- /dev/null
@@ -0,0 +1,17 @@
+# Go to PDK SBL root directory
+cd ..
+
+#build instructions for bootloader
+
+ls
+make clean BOARD=evmK2E
+make spi_flashwriter_clean BOARD=evmK2E
+
+make all BOARD=evmK2E SOC=K2E BOOTMODE=spi
+make spi_flashwriter BOARD=evmK2E SOC=K2E
+
+# removes the object files
+rm -rf binary/evmK2E/spi/obj/
+
+#archive
+tar -cf sbl.tar --exclude='*.tar' --exclude='*.git*' ./*
diff --git a/packages/ti/boot/sbl/build/sbl_k2g.sh b/packages/ti/boot/sbl/build/sbl_k2g.sh
new file mode 100755 (executable)
index 0000000..35afc24
--- /dev/null
@@ -0,0 +1,26 @@
+# Go to PDK SBL root directory
+cd ..
+
+#build instructions for bootloader
+
+ls
+make clean BOARD=evmK2G ${1}
+make flashwriter_clean BOARD=evmK2G
+make clean BOARD=iceK2G
+make flashwriter_clean BOARD=iceK2G
+
+make all BOARD=evmK2G SOC=K2G BOOTMODE=mmcsd ${1}
+make all BOARD=evmK2G SOC=K2G BOOTMODE=qspi ${1}
+make flashwriter BOARD=evmK2G SOC=K2G ${1}
+make all BOARD=iceK2G SOC=K2G BOOTMODE=mmcsd
+make all BOARD=iceK2G SOC=K2G BOOTMODE=qspi
+make flashwriter BOARD=iceK2G SOC=K2G
+
+# removes the object files
+rm -rf binary/evmK2G/mmcsd/obj/
+rm -rf binary/evmK2G/qspi/obj/
+rm -rf binary/iceK2G/mmcsd/obj/
+rm -rf binary/iceK2G/qspi/obj/
+
+#archive
+tar -cf sbl.tar --exclude='*.tar' --exclude='*.git*' ./*
diff --git a/packages/ti/boot/sbl/build/sbl_k2hk.sh b/packages/ti/boot/sbl/build/sbl_k2hk.sh
new file mode 100755 (executable)
index 0000000..dd2fd33
--- /dev/null
@@ -0,0 +1,22 @@
+# Go to PDK SBL root directory
+cd ..
+
+#build instructions for bootloader
+
+ls
+make clean BOARD=evmK2H
+make clean BOARD=evmK2K
+make spi_flashwriter_clean BOARD=evmK2H
+make spi_flashwriter_clean BOARD=evmK2K
+
+make all BOARD=evmK2H SOC=K2H BOOTMODE=spi
+make all BOARD=evmK2K SOC=K2K BOOTMODE=spi
+make spi_flashwriter BOARD=evmK2H SOC=K2H
+make spi_flashwriter BOARD=evmK2K SOC=K2K
+
+# removes the object files
+rm -rf binary/evmK2H/spi/obj/
+rm -rf binary/evmK2K/spi/obj/
+
+#archive
+tar -cf sbl.tar --exclude='*.tar' --exclude='*.git*' ./*
diff --git a/packages/ti/boot/sbl/build/sbl_k2l.sh b/packages/ti/boot/sbl/build/sbl_k2l.sh
new file mode 100755 (executable)
index 0000000..de4657d
--- /dev/null
@@ -0,0 +1,17 @@
+# Go to PDK SBL root directory
+cd ..
+
+#build instructions for bootloader
+
+ls
+make clean BOARD=evmK2L
+make spi_flashwriter_clean BOARD=evmK2L
+
+make all BOARD=evmK2L SOC=K2L BOOTMODE=spi
+make spi_flashwriter BOARD=evmK2L SOC=K2L
+
+# removes the object files
+rm -rf binary/evmK2L/spi/obj/
+
+#archive
+tar -cf sbl.tar --exclude='*.tar' --exclude='*.git*' ./*
diff --git a/packages/ti/boot/sbl/build/sbl_lib.mk b/packages/ti/boot/sbl/build/sbl_lib.mk
new file mode 100644 (file)
index 0000000..97097ee
--- /dev/null
@@ -0,0 +1,110 @@
+#
+# This file is the makefile for building sbl library.
+#
+include $(PDK_INSTALL_PATH)/ti/build/Rules.make
+
+MODULE_NAME = sbl_lib_$(BOOTMODE)
+
+INCDIR += $(PDK_INSTALL_PATH)
+INCDIR += $(PDK_INSTALL_PATH)/ti/drv/uart/soc/$(SOC)
+
+INCDIR += $(PDK_SBL_COMP_PATH)
+INCDIR += $(PDK_SBL_COMP_PATH)/soc
+INCDIR += $(PDK_SBL_COMP_PATH)/board/src
+INCDIR += $(PDK_SBL_COMP_PATH)/src/rprc
+INCDIR += $(PDK_SBL_COMP_PATH)/src/ospi
+INCDIR += $(PDK_SBL_COMP_PATH)/src/hyperflash
+INCDIR += $(PDK_SBL_COMP_PATH)/src/mmcsd
+INCDIR += $(PDK_SBL_COMP_PATH)/src/uart
+INCDIR += $(PDK_SBL_COMP_PATH)/soc/k3
+
+SRCDIR += $(PDK_SBL_COMP_PATH)/board/src
+SRCDIR += $(PDK_SBL_COMP_PATH)/src/rprc
+SRCDIR +=$(PDK_SBL_COMP_PATH)/src/ospi
+SRCDIR +=$(PDK_SBL_COMP_PATH)/src/hyperflash
+SRCDIR +=$(PDK_SBL_COMP_PATH)/src/mmcsd
+SRCDIR +=$(PDK_SBL_COMP_PATH)/src/uart
+SRCDIR += $(PDK_SBL_COMP_PATH)/soc/k3
+SRCDIR += $(PDK_INSTALL_PATH)/ti/drv/uart/soc/$(SOC)
+
+# List all the external components/interfaces, whose interface header files
+# need to be included for this component
+INCLUDE_EXTERNAL_INTERFACES =
+INCLUDE_INTERNAL_INTERFACES =
+
+CFLAGS_LOCAL_COMMON = $(PDK_CFLAGS) $(SBL_CFLAGS)
+PACKAGE_SRCS_COMMON  = ./build ./src ./tools
+PACKAGE_SRCS_COMMON += ./soc/sbl_soc.h ./soc/k3
+PACKAGE_SRCS_COMMON += ./.gitignore ./sbl_component.mk ./makefile ./sbl_ver.h
+
+# Common source files and CFLAGS across all platforms and cores
+SRCS_COMMON = sbl_soc.c
+SRCS_COMMON += sbl_rprc.c
+SRCS_COMMON += sbl_slave_core_boot.c
+SRCS_COMMON += UART_soc.c
+
+SRCS_COMMON += sbl_sci_client.c
+SRCS_COMMON += sbl_vid_map.c
+SRCS_ASM_COMMON += sbl_misc.asm
+SRCS_ASM_COMMON += sbl_init.asm
+
+# scratch memory given to the SBL
+# for image load and parsing
+SBL_CFLAGS += -DSBL_SCRATCH_MEM_START=0xB8000000
+SBL_CFLAGS += -DSBL_SCRATCH_MEM_SIZE=0x4000000
+
+# Check for custom flags
+ifeq ($(BOOTMODE), cust)
+  SBL_CFLAGS = $(CUST_SBL_FLAGS)
+endif # ifeq ($(BOOTMODE), cust)
+
+# BOOTMODE specific CFLAGS
+ifeq ($(BOOTMODE), mmcsd)
+  SBL_CFLAGS+= -DBOOT_MMCSD
+endif # ifeq ($(BOOTMODE), mmcsd)
+
+ifeq ($(BOOTMODE), ospi)
+  SBL_CFLAGS += -DBOOT_OSPI
+endif # ifeq ($(BOOTMODE), ospi)
+
+ifeq ($(BOOTMODE), hyperflash)
+  SBL_CFLAGS += -DBOOT_HYPERFLASH
+endif # ifeq ($(BOOTMODE), hyperflash)
+
+ifeq ($(BOOTMODE), uart)
+  SBL_CFLAGS += -DBOOT_UART
+endif # ifeq ($(BOOTMODE), uart)
+
+ifeq ($(filter $(SBL_CFLAGS), -DBOOT_MMCSD), -DBOOT_MMCSD)
+  SRCS_COMMON += sbl_mmcsd.c
+endif # ifeq ($(filter $(SBL_CFLAGS), -DBOOT_MMCSD), -DBOOT_MMCSD)
+
+ifeq ($(filter $(SBL_CFLAGS), -DBOOT_OSPI), -DBOOT_OSPI)
+  SRCS_COMMON += sbl_ospi.c
+endif # ifeq ($(filter $(SBL_CFLAGS), -DBOOT_OSPI), -DBOOT_OSPI)
+
+ifeq ($(filter $(SBL_CFLAGS), -DBOOT_HYPERFLASH), -DBOOT_HYPERFLASH)
+  SRCS_COMMON += sbl_hyperflash.c
+endif # ifeq ($(filter $(SBL_CFLAGS), -DBOOT_HYPERFLASH), -DBOOT_HYPERFLASH)
+
+ifeq ($(filter $(SBL_CFLAGS), -DBOOT_UART), -DBOOT_UART)
+  SRCS_COMMON += sbl_uart.c sbl_xmodem.c
+endif # ifeq ($(filter $(SBL_CFLAGS), -DBOOT_UART), -DBOOT_UART)
+
+# Core/SoC/platform specific source files and CFLAGS
+# Example:
+#   SRCS_<core/SoC/platform-name> =
+#   CFLAGS_LOCAL_<core/SoC/platform-name> =
+
+# Include common make files
+ifeq ($(MAKERULEDIR), )
+#Makerule path not defined, define this and assume relative path from ROOTDIR
+  MAKERULEDIR := $(ROOTDIR)/ti/build/makerules
+  export MAKERULEDIR
+endif
+include $(MAKERULEDIR)/common.mk
+
+# OBJs and libraries are built by using rule defined in rules_<target>.mk
+#     and need not be explicitly specified here
+
+# Nothing beyond this point
diff --git a/packages/ti/boot/sbl/build/sbl_mcu0_boot_perf_test.mk b/packages/ti/boot/sbl/build/sbl_mcu0_boot_perf_test.mk
new file mode 100644 (file)
index 0000000..762d3d1
--- /dev/null
@@ -0,0 +1,69 @@
+#
+# This file is the makefile for building images used for SBL testing.
+#
+include $(PDK_INSTALL_PATH)/ti/build/Rules.make
+
+APP_NAME = sbl_boot_perf_test
+BUILD_OS_TYPE = baremetal
+LOCAL_APP_NAME = sbl_$(BUILD_OS_TYPE)_boot_perf_$(BOARD)_$(CORE)TestApp
+
+SBL_SRC_DIR =  $(PDK_INSTALL_PATH)/ti/boot/sbl
+
+SRCDIR      += $(PDK_SBL_COMP_PATH)/example/k3MulticoreApp
+
+INCDIR      += $(PDK_SBL_COMP_PATH)
+INCDIR      += $(PDK_SBL_COMP_PATH)/soc
+INCDIR      += $(PDK_SBL_COMP_PATH)/soc/k3
+INCDIR      += $(PDK_SBL_COMP_PATH)/example/k3MulticoreApp
+
+# Check for custom flags
+ifeq ($(BOOTMODE), cust)
+  SBL_CFLAGS = $(CUST_SBL_FLAGS)
+endif # ifeq ($(BOOTMODE), cust)
+
+CFLAGS_LOCAL_COMMON = $(PDK_CFLAGS) $(SBL_CFLAGS)
+PACKAGE_SRCS_COMMON = .
+
+# List all the external components/interfaces, whose interface header files
+#  need to be included for this component
+INCLUDE_EXTERNAL_INTERFACES = pdk
+
+# List all the components required by the application
+COMP_LIST_COMMON = csl_init csl board uart osal_nonos sciclient i2c sbl_lib_$(BOOTMODE)
+
+ifeq ($(filter $(SBL_CFLAGS), -DBOOT_MMCSD), -DBOOT_MMCSD)
+  COMP_LIST_COMMON += mmcsd fatfs_indp
+endif # ifeq ($(filter $(SBL_CFLAGS), -DBOOT_MMCSD), -DBOOT_MMCSD)
+
+ifeq ($(filter $(SBL_CFLAGS), -DBOOT_OSPI), -DBOOT_OSPI)
+ifeq ($(filter $(SBL_CFLAGS), -DSBL_USE_DMA=1), -DSBL_USE_DMA=1)
+  COMP_LIST_COMMON += spi_dma
+else
+  COMP_LIST_COMMON += spi
+endif # ifeq ($(filter $(SBL_CFLAGS), -DSBL_USE_DMA=1), -DSBL_USE_DMA=1)
+endif # ifeq ($(filter $(SBL_CFLAGS), -DBOOT_OSPI), -DBOOT_OSPI)
+
+
+SRCS_COMMON += sbl_mcu_0_boot_perf_benchmark.c sbl_printf.c
+SRCS_ASM_COMMON = sbl_smp_r5.asm
+SRCS_ASM_COMMON += sbl_boot_perf_r5.asm
+EXTERNAL_LNKCMD_FILE_LOCAL =  $(PDK_SBL_COMP_PATH)/example/k3MulticoreApp/mcuBootPerfLinker.lds
+
+# Core/SoC/platform specific source files and CFLAGS
+# Example:
+#   SRCS_<core/SoC/platform-name> =
+#   CFLAGS_LOCAL_<core/SoC/platform-name> =
+
+# Include common make files
+ifeq ($(MAKERULEDIR), )
+#Makerule path not defined, define this and assume relative path from ROOTDIR
+  MAKERULEDIR := $(ROOTDIR)/ti/build/makerules
+  export MAKERULEDIR
+endif
+include $(MAKERULEDIR)/common.mk
+
+# OBJs and libraries are built by using rule defined in rules_<target>.mk
+#     and need not be explicitly specified here
+
+# Nothing beyond this point
+
diff --git a/packages/ti/boot/sbl/build/sbl_mcu0_boot_xip_entry.mk b/packages/ti/boot/sbl/build/sbl_mcu0_boot_xip_entry.mk
new file mode 100644 (file)
index 0000000..152df87
--- /dev/null
@@ -0,0 +1,50 @@
+#
+# This file is the makefile for building images used for SBL testing.
+#
+include $(PDK_INSTALL_PATH)/ti/build/Rules.make
+
+APP_NAME = sbl_boot_xip_entry
+BUILD_OS_TYPE = baremetal
+LOCAL_APP_NAME = sbl_$(BUILD_OS_TYPE)_boot_xip_entry_$(BOARD)_$(CORE)TestApp
+
+SBL_SRC_DIR =  $(PDK_INSTALL_PATH)/ti/boot/sbl
+
+SRCDIR      += $(PDK_SBL_COMP_PATH)/example/k3MulticoreApp
+
+INCDIR      += $(PDK_SBL_COMP_PATH)/example/k3MulticoreApp
+
+
+
+CFLAGS_LOCAL_COMMON = $(PDK_CFLAGS)
+PACKAGE_SRCS_COMMON = .
+
+# List all the external components/interfaces, whose interface header files
+#  need to be included for this component
+INCLUDE_EXTERNAL_INTERFACES =
+
+# List all the components required by the application
+COMP_LIST_COMMON =
+
+SRCS_COMMON += xip_stub.c
+
+SRCS_ASM_COMMON = xip_entry.asm
+EXTERNAL_LNKCMD_FILE_LOCAL =  $(PDK_SBL_COMP_PATH)/example/k3MulticoreApp/xip_entry.lds
+
+# Core/SoC/platform specific source files and CFLAGS
+# Example:
+#   SRCS_<core/SoC/platform-name> =
+#   CFLAGS_LOCAL_<core/SoC/platform-name> =
+
+# Include common make files
+ifeq ($(MAKERULEDIR), )
+#Makerule path not defined, define this and assume relative path from ROOTDIR
+  MAKERULEDIR := $(ROOTDIR)/ti/build/makerules
+  export MAKERULEDIR
+endif
+include $(MAKERULEDIR)/common.mk
+
+# OBJs and libraries are built by using rule defined in rules_<target>.mk
+#     and need not be explicitly specified here
+
+# Nothing beyond this point
+
diff --git a/packages/ti/boot/sbl/build/sbl_mcu0_boot_xip_test.mk b/packages/ti/boot/sbl/build/sbl_mcu0_boot_xip_test.mk
new file mode 100644 (file)
index 0000000..36585f3
--- /dev/null
@@ -0,0 +1,50 @@
+#
+# This file is the makefile for building images used for SBL testing.
+#
+include $(PDK_INSTALL_PATH)/ti/build/Rules.make
+
+APP_NAME = sbl_boot_xip_test
+BUILD_OS_TYPE = baremetal
+LOCAL_APP_NAME = sbl_$(BUILD_OS_TYPE)_boot_xip_test_$(BOARD)_$(CORE)TestApp
+
+SBL_SRC_DIR =  $(PDK_INSTALL_PATH)/ti/boot/sbl
+
+SRCDIR      += $(PDK_SBL_COMP_PATH)/example/k3MulticoreApp
+
+INCDIR      += $(PDK_SBL_COMP_PATH)/example/k3MulticoreApp
+
+
+
+CFLAGS_LOCAL_COMMON = $(PDK_CFLAGS)
+PACKAGE_SRCS_COMMON = .
+
+# List all the external components/interfaces, whose interface header files
+#  need to be included for this component
+INCLUDE_EXTERNAL_INTERFACES =
+
+# List all the components required by the application
+COMP_LIST_COMMON =
+
+SRCS_COMMON += sbl_amp_multicore.c sbl_printf.c
+
+SRCS_ASM_COMMON = sbl_multicore_r5_xip.asm
+EXTERNAL_LNKCMD_FILE_LOCAL =  $(PDK_SBL_COMP_PATH)/example/k3MulticoreApp/mcuXiplinker.lds
+
+# Core/SoC/platform specific source files and CFLAGS
+# Example:
+#   SRCS_<core/SoC/platform-name> =
+#   CFLAGS_LOCAL_<core/SoC/platform-name> =
+
+# Include common make files
+ifeq ($(MAKERULEDIR), )
+#Makerule path not defined, define this and assume relative path from ROOTDIR
+  MAKERULEDIR := $(ROOTDIR)/ti/build/makerules
+  export MAKERULEDIR
+endif
+include $(MAKERULEDIR)/common.mk
+
+# OBJs and libraries are built by using rule defined in rules_<target>.mk
+#     and need not be explicitly specified here
+
+# Nothing beyond this point
+
diff --git a/packages/ti/boot/sbl/build/sbl_multicore_amp.mk b/packages/ti/boot/sbl/build/sbl_multicore_amp.mk
new file mode 100644 (file)
index 0000000..e9f0859
--- /dev/null
@@ -0,0 +1,58 @@
+#
+# This file is the makefile for building a testcase
+# to check multicore boot using SBL.
+#
+include $(PDK_INSTALL_PATH)/ti/build/Rules.make
+
+APP_NAME = sbl_multicore_amp
+BUILD_OS_TYPE = baremetal
+
+SRCDIR      += $(PDK_SBL_COMP_PATH)/example/k3MulticoreApp
+
+# Local name of SBL test app
+RPRC_PREFIX = sbl_$(BUILD_OS_TYPE)_boot_test_$(BOARD)
+
+MULTICORE_IMG_PARAMS = $(foreach SOC_CORE_ID, $(sbl_boot_test_$(SOC)_CORELIST), $(SBL_CORE_ID_$(SOC_CORE_ID)) $(BINDIR)/$(RPRC_PREFIX)_$(SOC_CORE_ID)TestApp_$(BUILD_PROFILE_$(CORE)).rprc)
+
+CFLAGS_LOCAL_COMMON = $(PDK_CFLAGS)
+PACKAGE_SRCS_COMMON = .
+
+# List all the external components/interfaces, whose interface header files
+#  need to be included for this component
+INCLUDE_EXTERNAL_INTERFACES =
+
+# List all the components required by the application
+COMP_LIST_COMMON =
+
+SRCS_COMMON = force_multi_core_img_gen.c
+
+force_multi_core_img_gen.c:
+       $(ECHO) "# Combining RPRC images to generate multicore image...."
+       $(SBL_IMAGE_GEN) LE $(SBL_DEV_ID) $(BINDIR)/$(RPRC_PREFIX)_all_coresTestApp_$(BUILD_PROFILE_$(CORE)).appimage $(MULTICORE_IMG_PARAMS)
+       $(ECHO) "#"
+       $(ECHO) "# Multicore SBL App image $(BINDIR)/$(RPRC_PREFIX)_all_coresTestApp_$(BUILD_PROFILE_$(CORE)).appimage created."
+       $(ECHO) "#"
+       $(ECHO) "# Signing the multicore image...."
+ifneq ($(OS),Windows_NT)
+       $(CHMOD) a+x $(SBL_CERT_GEN)
+endif
+       $(SBL_CERT_GEN) -b $(BINDIR)/$(RPRC_PREFIX)_all_coresTestApp_$(BUILD_PROFILE_$(CORE)).appimage -o $(BINDIR)/$(RPRC_PREFIX)_all_coresTestApp_$(BUILD_PROFILE_$(CORE)).appimage.signed -c R5 -l $(SBL_RUN_ADDRESS) -k $(SBL_CERT_KEY)
+
+# Core/SoC/platform specific source files and CFLAGS
+# Example:
+#   SRCS_<core/SoC/platform-name> =
+#   CFLAGS_LOCAL_<core/SoC/platform-name> =
+
+# Include common make files
+ifeq ($(MAKERULEDIR), )
+#Makerule path not defined, define this and assume relative path from ROOTDIR
+  MAKERULEDIR := $(ROOTDIR)/ti/build/makerules
+  export MAKERULEDIR
+endif
+include $(MAKERULEDIR)/common.mk
+
+# OBJs and libraries are built by using rule defined in rules_<target>.mk
+#     and need not be explicitly specified here
+
+# Nothing beyond this point
+
diff --git a/packages/ti/boot/sbl/build/sbl_multicore_smp.mk b/packages/ti/boot/sbl/build/sbl_multicore_smp.mk
new file mode 100644 (file)
index 0000000..afd43b2
--- /dev/null
@@ -0,0 +1,78 @@
+#
+# This file is the makefile for building a testcase
+# to check multicore boot using SBL.
+#
+include $(PDK_INSTALL_PATH)/ti/build/Rules.make
+
+APP_NAME = sbl_multicore_smp
+BUILD_OS_TYPE = baremetal
+
+SRCDIR      += $(PDK_SBL_COMP_PATH)/example/k3MulticoreApp
+
+# Must exactly match values defined in enum cpu_core_id
+# in sbl_slave_core_boot.h
+SBL_CORE_ID_mpu1_0_smp = 14
+SBL_CORE_ID_mpu2_0_smp = 15
+SBL_CORE_ID_mpu_smp = 16
+SBL_CORE_ID_mcu1_0_smp = 17
+SBL_CORE_ID_mcu2_0_smp = 18
+SBL_CORE_ID_mcu3_0_smp = 19
+SBL_CORE_ID_only_load = 20
+
+  
+# Local name of SBL test app
+RPRC_PREFIX = sbl_$(BUILD_OS_TYPE)_smp_test_$(BOARD)
+
+MULTICORE_IMG_PARAMS = $(foreach SOC_CORE_ID, $(sbl_smp_test_$(SOC)_CORELIST), $(SBL_CORE_ID_$(SOC_CORE_ID)_smp) $(BINDIR)/$(RPRC_PREFIX)_$(SOC_CORE_ID)TestApp_$(BUILD_PROFILE_$(CORE)).rprc)
+
+# To build an image that test SBL_CORE_ID_mpu_smp
+# specify only one mpu in am65xx_smp_CORELIST in
+# sbl_component.mk and make sure it is the last
+# core in the list. Then uncomment the below lines.
+# also change $(SBL_IMAGE_GEN) below to use
+# SMP_MULTICORE_IMG_PARAMS instead of MULTICORE_IMG_PARAMS
+#SMP_CORE_ID = $(lastword $(sbl_smp_test_$(SOC)_CORELIST))
+#SMP_MULTICORE_IMG_PARAMS = $(subst  $(SBL_CORE_ID_$(SMP_CORE_ID)) ,$(SBL_CORE_ID_mpu_smp) , $(MULTICORE_IMG_PARAMS))
+
+CFLAGS_LOCAL_COMMON = $(PDK_CFLAGS)
+PACKAGE_SRCS_COMMON = .
+
+# List all the external components/interfaces, whose interface header files
+#  need to be included for this component
+INCLUDE_EXTERNAL_INTERFACES =
+
+# List all the components required by the application
+COMP_LIST_COMMON =
+
+SRCS_COMMON = force_multi_core_img_gen.c
+
+force_multi_core_img_gen.c:
+       $(ECHO) "# Combining RPRC images to generate multicore image...."
+       $(SBL_IMAGE_GEN) LE $(SBL_DEV_ID) $(BINDIR)/$(RPRC_PREFIX)_all_coresTestApp_$(BUILD_PROFILE_$(CORE)).appimage $(MULTICORE_IMG_PARAMS)
+       $(ECHO) "#"
+       $(ECHO) "# Multicore SMP App image $(BINDIR)/$(RPRC_PREFIX)_all_coresTestApp_$(BUILD_PROFILE_$(CORE)).appimage created."
+       $(ECHO) "#"
+       $(ECHO) "# Signing the multicore image...."
+ifneq ($(OS),Windows_NT)
+       $(CHMOD) a+x $(SBL_CERT_GEN)
+endif
+       $(SBL_CERT_GEN) -b $(BINDIR)/$(RPRC_PREFIX)_all_coresTestApp_$(BUILD_PROFILE_$(CORE)).appimage -o $(BINDIR)/$(RPRC_PREFIX)_all_coresTestApp_$(BUILD_PROFILE_$(CORE)).appimage.signed -c R5 -l $(SBL_RUN_ADDRESS) -k $(SBL_CERT_KEY)
+
+# Core/SoC/platform specific source files and CFLAGS
+# Example:
+#   SRCS_<core/SoC/platform-name> =
+#   CFLAGS_LOCAL_<core/SoC/platform-name> =
+
+# Include common make files
+ifeq ($(MAKERULEDIR), )
+#Makerule path not defined, define this and assume relative path from ROOTDIR
+  MAKERULEDIR := $(ROOTDIR)/ti/build/makerules
+  export MAKERULEDIR
+endif
+include $(MAKERULEDIR)/common.mk
+
+# OBJs and libraries are built by using rule defined in rules_<target>.mk
+#     and need not be explicitly specified here
+
+# Nothing beyond this point
+
diff --git a/packages/ti/boot/sbl/build/sbl_omapl137.sh b/packages/ti/boot/sbl/build/sbl_omapl137.sh
new file mode 100755 (executable)
index 0000000..870f496
--- /dev/null
@@ -0,0 +1,18 @@
+# Go to PDK SBL root directory
+cd ..
+
+#build instructions for bootloader
+
+ls
+make clean BOARD=evmOMAPL137
+make spi_flashwriter_clean BOARD=evmOMAPL137
+
+
+make all BOARD=evmOMAPL137 SOC=OMAPL137 BOOTMODE=spi
+make spi_flashwriter BOARD=evmOMAPL137 SOC=OMAPL137
+
+# removes the object files
+rm -rf binary/evmOMAPL137/spi/obj/
+
+#archive
+tar -cf sbl.tar --exclude='*.tar' --exclude='*.git*' ./*
diff --git a/packages/ti/boot/sbl/build/sbl_omapl138.sh b/packages/ti/boot/sbl/build/sbl_omapl138.sh
new file mode 100755 (executable)
index 0000000..d497f84
--- /dev/null
@@ -0,0 +1,18 @@
+# Go to PDK SBL root directory
+cd ..
+
+#build instructions for bootloader
+
+ls
+make clean BOARD=lcdkOMAPL138
+make mmcsd_flashwriter_clean BOARD=lcdkOMAPL138
+
+
+make all BOARD=lcdkOMAPL138 SOC=OMAPL138 BOOTMODE=mmcsd
+make mmcsd_flashwriter BOARD=lcdkOMAPL138 SOC=OMAPL138
+
+# removes the object files
+rm -rf binary/lcdkOMAPL138/mmcsd/obj/
+
+#archive
+tar -cf sbl.tar --exclude='*.tar' --exclude='*.git*' ./*
diff --git a/packages/ti/boot/sbl/build/sbl_smp_test.mk b/packages/ti/boot/sbl/build/sbl_smp_test.mk
new file mode 100644 (file)
index 0000000..fa2541d
--- /dev/null
@@ -0,0 +1,64 @@
+#
+# This file is the makefile for building images used for SBL testing.
+#
+include $(PDK_INSTALL_PATH)/ti/build/Rules.make
+
+APP_NAME = sbl_smp_test
+BUILD_OS_TYPE = baremetal
+LOCAL_APP_NAME = sbl_$(BUILD_OS_TYPE)_smp_test_$(BOARD)_$(CORE)TestApp
+
+SBL_SRC_DIR =  $(PDK_INSTALL_PATH)/ti/boot/sbl
+
+SRCDIR      += $(PDK_SBL_COMP_PATH)/example/k3MulticoreApp
+
+INCDIR      += $(PDK_SBL_COMP_PATH)
+INCDIR      += $(PDK_SBL_COMP_PATH)/soc
+INCDIR      += $(PDK_SBL_COMP_PATH)/soc/k3
+INCDIR      += $(PDK_SBL_COMP_PATH)/example/k3MulticoreApp
+
+CFLAGS_LOCAL_COMMON = $(PDK_CFLAGS) $(SBL_CFLAGS)
+PACKAGE_SRCS_COMMON = .
+
+# List all the external components/interfaces, whose interface header files
+#  need to be included for this component
+INCLUDE_EXTERNAL_INTERFACES = pdk
+
+# List all the components required by the application
+COMP_LIST_COMMON = csl_init csl uart osal_nonos
+
+SRCS_COMMON += sbl_smp_multicore.c
+
+ifeq ($(CORE), mcu1_0)
+  COMP_LIST_COMMON += board sciclient i2c
+endif
+
+# asm files and linker scripts change due to different tool chains for R5 and A53
+ifeq ($(CORE),$(filter $(CORE), mcu1_0 mcu2_0 mcu3_0))
+  SRCS_ASM_COMMON = sbl_smp_r5.asm
+  EXTERNAL_LNKCMD_FILE_LOCAL =  $(PDK_SBL_COMP_PATH)/example/k3MulticoreApp/$(CORE)_LockStepLinker.lds
+  COMP_LIST_COMMON += sbl_lib_$(BOOTMODE) mmcsd fatfs_indp spi
+endif
+
+ifeq ($(CORE),$(filter $(CORE), mpu1_0 mpu2_0))
+  LNKCMD_FILE = $(PDK_SBL_COMP_PATH)/example/k3MulticoreApp/$(CORE)_Smplinker.lds
+  LNKFLAGS_LOCAL_$(CORE) += --entry Entry
+endif
+
+# Core/SoC/platform specific source files and CFLAGS
+# Example:
+#   SRCS_<core/SoC/platform-name> =
+#   CFLAGS_LOCAL_<core/SoC/platform-name> =
+
+# Include common make files
+ifeq ($(MAKERULEDIR), )
+#Makerule path not defined, define this and assume relative path from ROOTDIR
+  MAKERULEDIR := $(ROOTDIR)/ti/build/makerules
+  export MAKERULEDIR
+endif
+include $(MAKERULEDIR)/common.mk
+
+# OBJs and libraries are built by using rule defined in rules_<target>.mk
+#     and need not be explicitly specified here
+
+# Nothing beyond this point
+
diff --git a/packages/ti/boot/sbl/example/dsp1MulticoreApp/lnk_dsp1.cmd b/packages/ti/boot/sbl/example/dsp1MulticoreApp/lnk_dsp1.cmd
new file mode 100644 (file)
index 0000000..aa38126
--- /dev/null
@@ -0,0 +1,66 @@
+
+
+-stack  0x00500000                            /* SOFTWARE STACK SIZE    */
+-heap   0x00500000                         /* HEAP AREA SIZE            */
+-e      _c_int00
+
+/* SPECIFY THE SYSTEM MEMORY MAP */
+
+MEMORY
+{
+    IRAM_MEM:     org = 0x00800000 len = 0x8000      /*   RAM 0x1FBFF*/
+    /*CODE SECTION - 20MB*/
+    /*DATA SECTION - 10MB*/
+    /*STACK - 5MB*/
+    /*HEAP - 5MB*/
+    DDR3_MPU_CPU0_CODE : org = 0x90000000,len = 0x01400000
+    DDR3_MPU_CPU0_DATA :  org = 0x91400000, len = 0x00A00000
+    DDR3_MPU_CPU0_STACK : org = 0x91E00000, len = 0x00500000
+    DDR3_MPU_CPU0_HEAP :  org = 0x92300000, len = 0x00500000
+
+    DDR3_IPU2_CPU1_CODE : org = 0x9C800000,len = 0x01400000
+    DDR3_IPU2_CPU1_DATA :  org = 0x9DC00000,len = 0x00A00000
+    DDR3_IPU2_CPU1_STACK : org = 0x9E600000,len = 0x00500000
+    DDR3_IPU2_CPU1_HEAP :  org = 0x9EB00000,len = 0x00500000
+
+    DDR3_DSP1_CODE : org = 0x83200000,len = 0x01400000
+    DDR3_DSP1_DATA : org = 0x84600000, len = 0x00A00000
+    DDR3_DSP1_STACK :org = 0x85000000, len = 0x00500000
+    DDR3_DSP1_HEAP : org = 0x85500000, len = 0x00500000
+
+    DDR3_DSP2_CODE : org = 0x86400000,len = 0x01400000
+    DDR3_DSP2_DATA :  org = 0x87800000,len = 0x00A00000
+    DDR3_DSP2_STACK : org = 0x88200000,len = 0x00500000
+    DDR3_DSP2_HEAP :  org = 0x88700000,len = 0x00500000
+}
+
+/* SPECIFY THE SECTIONS ALLOCATION INTO MEMORY */
+
+SECTIONS
+{
+    .vects : load > IRAM_MEM
+    .l2_int  : load > IRAM_MEM
+    boot :
+    {
+        rts*.lib<boot.obj>(.text)
+    }load > DDR3_DSP1_CODE
+
+    .init    : load > DDR3_DSP1_DATA
+    .cio     : load > DDR3_DSP1_DATA
+
+    .text    : load > DDR3_DSP1_CODE /* CODE                         */
+    .data    : load > DDR3_DSP1_DATA /* INITIALIZED GLOBAL AND STATIC VARIABLES. */
+    .bss     : load > DDR3_DSP1_DATA /* UNINITIALIZED OR ZERO INITIALIZED */
+                                            /* GLOBAL & STATIC VARIABLES.   */
+                    RUN_START(bss_start)
+                    RUN_END(bss_end)
+    .const   : load > DDR3_DSP1_DATA              /* GLOBAL CONSTANTS   */
+    .cinit   : load > DDR3_DSP1_DATA
+    .stack   : load > DDR3_DSP1_STACK            /* SOFTWARE SYSTEM STACK */
+    .plt     : load > DDR3_DSP1_DATA
+    .my_sect_ddr : load > DDR3_DSP1_DATA
+    .far  : load > DDR3_DSP1_DATA
+    .fardata : load > DDR3_DSP1_DATA
+    .neardata : load > DDR3_DSP1_DATA
+    .switch : load > DDR3_DSP1_DATA
+}
diff --git a/packages/ti/boot/sbl/example/dsp1MulticoreApp/makefile b/packages/ti/boot/sbl/example/dsp1MulticoreApp/makefile
new file mode 100644 (file)
index 0000000..ba2c94f
--- /dev/null
@@ -0,0 +1,163 @@
+# Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com/
+#
+#
+#  Redistribution and use in source and binary forms, with or without
+#  modification, are permitted provided that the following conditions
+#  are met:
+#
+#    Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+#
+#    Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in the
+#    documentation and/or other materials provided with the
+#    distribution.
+#
+#    Neither the name of Texas Instruments Incorporated nor the names of
+#    its contributors may be used to endorse or promote products derived
+#    from this software without specific prior written permission.
+#
+#  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+#  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+#  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+#  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+#  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+#  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+#  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+#  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+#  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+#  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+#  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+#
+# Macro definitions referenced below
+#
+
+#
+# Make rules for c66x - This file has all the common rules and defines required
+#                     for c66x ISA
+#
+# This file needs to change when:
+#     1. Code generation tool chain changes (currently it uses CG600_7.2.0.B2)
+#     2. Internal switches (which are normally not touched) has to change
+#     3. XDC specific switches change
+#     4. a rule common for C66 ISA has to be added or modified
+
+# Endianness : Allowed values = little | big
+ENDIAN = little
+
+# Format : Allowed values = COFF | ELF
+FORMAT = ELF
+
+ISA = 66
+ARCH = c66x
+
+#
+# Derive XDC/ISA specific settings
+#
+ifeq ($(FORMAT),ELF)
+  FORMAT_EXT = e
+endif
+
+# If ENDIAN is set to "big", set ENDIAN_EXT to "e", that would be used in
+#    in the filename extension of object/library/executable files
+ifeq ($(ENDIAN),big)
+  ENDIAN_EXT = e
+endif
+
+SBL_SRC_DIR ?= $(PDK_INSTALL_PATH)/ti/boot/sbl
+SBL_DSP_OBJDIR = $(SBL_SRC_DIR)/binary/$(BOARD)/example/c66/dsp1/obj
+SBL_DSP_BINDIR = $(SBL_SRC_DIR)/binary/$(BOARD)/example/c66/dsp1/bin
+
+OBJEXT = o$(FORMAT_EXT)$(ISA)$(ENDIAN_EXT)
+LIBEXT = a$(FORMAT_EXT)$(ISA)$(ENDIAN_EXT)
+EXEEXT = x$(FORMAT_EXT)$(ISA)$(ENDIAN_EXT)
+ASMEXT = s$(FORMAT_EXT)$(ISA)$(ENDIAN_EXT)
+
+# Set compiler/archiver/linker commands and include paths
+CODEGEN_INCLUDE = $(C6X_GEN_INSTALL_PATH)/include
+CC = $(C6X_GEN_INSTALL_PATH)/bin/cl6x -c
+AR = $(C6X_GEN_INSTALL_PATH)/bin/ar6x
+LNK = $(C6X_GEN_INSTALL_PATH)/bin/lnk6x
+LD = $(C6X_GEN_INSTALL_PATH)/bin/lnk6x
+
+# Derive a part of RTS Library name based on ENDIAN: little/big
+ifeq ($(ENDIAN),little)
+  RTSLIB_ENDIAN =
+else
+  RTSLIB_ENDIAN = e
+endif
+
+# Derive compiler switch and part of RTS Library name based on FORMAT: COFF/ELF
+ifeq ($(FORMAT),COFF)
+  CSWITCH_FORMAT = ti_arm9_abi
+  RTSLIB_FORMAT = _tiarm9
+endif
+ifeq ($(FORMAT),ELF)
+  CSWITCH_FORMAT = eabi
+  RTSLIB_FORMAT = _elf
+endif
+
+# Internal CFLAGS - normally doesn't change
+C66_CFLAGS_INTERNAL = -qq -pdsw225 --endian=$(ENDIAN) -mv6600 --abi=$(CSWITCH_FORMAT) -eo.$(OBJEXT) -ea.$(ASMEXT) -mi10 -mo -pdr -pden -pds=238 -pds=880 -pds1110 --program_level_compile -g -DSOC_$(SOC) -ppa -ppd=$@.dep
+
+LNKFLAGS_INTERNAL_PROFILE =
+C66_CFLAGS_INTERNAL += -O2 --optimize_with_debug --diag_wrap=off --preproc_with_compile
+LNKFLAGS_GLOBAL_c66x = -x --zero_init=on --retain=_vectors
+
+# Path of the RTS library - normally doesn't change for a given tool-chain
+#Let the linker choose the required library
+ RTSLIB_PATH = $(C6X_GEN_INSTALL_PATH)/lib/libc.a
+ LIB_PATHS += $(RTSLIB_PATH)
+ LNK_LIBS = $(addprefix -l,$(LIB_PATHS))
+ LNKCMD_FILE = $(SBL_SRC_DIR)/example/dsp1MulticoreApp/lnk_dsp1.cmd
+
+ INTERNALLINKDEFS = -w -q -u _c_int00 --silicon_version=6600 -c --dynamic
+
+ INTERNALLINKDEFS += $(LNKFLAGS_GLOBAL_c66x)
+
+# INCLUDE Directories
+SBL_SOC_DIR = $(SBL_SRC_DIR)/soc/am57xx
+
+DEPDIR = $(SBL_DSP_OBJDIR)/.deps
+DEPFILE = $(DEPDIR)/$(*F)
+
+SRCDIR = $(SBL_SRC_DIR)/example/dsp1MulticoreApp
+
+INCLUDES = -I$(PDK_INSTALL_PATH) -I$(SBL_SOC_DIR) -I$(C6X_GEN_INSTALL_PATH)/include
+
+# Executable using device independent library and device object file
+EXE=sbl_app.$(EXEEXT)
+
+VPATH=$(SRCDIR):$(SBL_SRC_DIR)/soc/am57xx
+
+#List the Source Files
+SRC_C = \
+       sbl_multicore_dsp1.c \
+       mailbox.c
+
+# Make Rule for the SRC Files
+SRC_OBJS = $(patsubst %.c, $(SBL_DSP_OBJDIR)/%.$(OBJEXT), $(SRC_C))
+
+example:$(SBL_DSP_BINDIR)/$(EXE)
+
+$(SBL_DSP_BINDIR)/$(EXE): $(SRC_OBJS) $(SBL_DSP_BINDIR)/.created $(SBL_DSP_OBJDIR)/.created
+       @echo linking $(SRC_OBJS) into $@ ...
+       $(LNK) $(SRC_OBJS) $(INTERNALLINKDEFS) $(LNKCMD_FILE) -o $@ -m $@.map $(LNK_LIBS)
+
+$(SBL_DSP_OBJDIR)/%.$(OBJEXT): %.c $(SBL_DSP_OBJDIR)/.created
+       @echo compiling $< ...
+       #$(CC) -ppd=$(DEPFILE).P $(C66_CFLAGS_INTERNAL) $(INCLUDES) -fr=$(SBL_DSP_OBJDIR) -fs=$(SBL_DSP_OBJDIR) -fc $<
+       $(CC) $(C66_CFLAGS_INTERNAL) $(INCLUDES) -fr=$(SBL_DSP_OBJDIR) -fs=$(SBL_DSP_OBJDIR) -fc $<
+
+$(SBL_DSP_OBJDIR)/.created:
+       @mkdir -p $(SBL_DSP_OBJDIR)
+       @touch $(SBL_DSP_OBJDIR)/.created
+
+$(SBL_DSP_BINDIR)/.created:
+       @mkdir -p $(SBL_DSP_BINDIR)
+       @touch $(SBL_DSP_BINDIR)/.created
+
+example_clean:
+       @rm -f $(SBL_DSP_BINDIR)/$(EXE)
+       @rm -f $(SRC_OBJS) $(SBL_DSP_BINDIR)/.created $(SBL_DSP_OBJDIR)/.created
diff --git a/packages/ti/boot/sbl/example/dsp1MulticoreApp/sbl_multicore_dsp1.c b/packages/ti/boot/sbl/example/dsp1MulticoreApp/sbl_multicore_dsp1.c
new file mode 100644 (file)
index 0000000..96803a7
--- /dev/null
@@ -0,0 +1,47 @@
+/*
+ * Copyright (c) 2015, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * *  Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *
+ * *  Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * *  Neither the name of Texas Instruments Incorporated nor the names of
+ *    its contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <ti/csl/cslr_device.h>
+#include "mailbox.h"
+
+int main()
+{
+    uint32_t msg = 'D';
+
+    /* Wait for message from MPU */
+    while (MESSAGE_INVALID ==
+           MailboxGetMessage(CSL_MPU_MAILBOX2_REGS, MAILBOX_QUEUE_4, &msg)) ;
+
+    /* Send ack message to MPU */
+    MailboxSendMessage(CSL_MPU_MAILBOX7_REGS, MAILBOX_QUEUE_0, 0xAA55FF00);
+    while (1) ;
+}
diff --git a/packages/ti/boot/sbl/example/dsp2MulticoreApp/lnk_dsp2.cmd b/packages/ti/boot/sbl/example/dsp2MulticoreApp/lnk_dsp2.cmd
new file mode 100644 (file)
index 0000000..ca35bb7
--- /dev/null
@@ -0,0 +1,61 @@
+
+
+-stack  0x00500000                            /* SOFTWARE STACK SIZE       */
+-heap   0x00500000                         /* HEAP AREA SIZE               */
+-e      _c_int00
+
+/* SPECIFY THE SYSTEM MEMORY MAP */
+
+MEMORY
+{
+    IRAM_MEM:     org = 0x00809000 len = 0x8000      /*   RAM 0x1FBFF*/
+       /*CODE SECTION - 20MB*/
+       /*DATA SECTION - 10MB*/
+       /*STACK - 5MB*/
+       /*HEAP - 5MB*/
+       DDR3_MPU_CPU0_CODE : org = 0x90000000,len = 0x01400000
+       DDR3_MPU_CPU0_DATA :  org = 0x91400000, len = 0x00A00000
+       DDR3_MPU_CPU0_STACK : org = 0x91E00000, len = 0x00500000
+       DDR3_MPU_CPU0_HEAP :  org = 0x92300000, len = 0x00500000
+
+       DDR3_DSP1_CODE : org = 0x83200000,len = 0x01400000
+       DDR3_DSP1_DATA : org = 0x84600000, len = 0x00A00000
+       DDR3_DSP1_STACK :org = 0x85000000, len = 0x00500000
+       DDR3_DSP1_HEAP : org = 0x85500000, len = 0x00500000
+
+       DDR3_DSP2_CODE : org = 0x86400000,len = 0x01400000
+       DDR3_DSP2_DATA :  org = 0x87800000,len = 0x00A00000
+       DDR3_DSP2_STACK : org = 0x88200000,len = 0x00500000
+       DDR3_DSP2_HEAP :  org = 0x88700000,len = 0x00500000
+}
+
+/* SPECIFY THE SECTIONS ALLOCATION INTO MEMORY */
+
+SECTIONS
+{
+    .vects : load > IRAM_MEM
+    .l2_int  : load > IRAM_MEM
+       boot :
+       {
+               rts*.lib<boot.obj>(.text)
+       }load > DDR3_DSP2_CODE
+
+    .init    : load > DDR3_DSP2_DATA
+    .cio     : load > DDR3_DSP2_DATA
+
+    .text    : load > DDR3_DSP2_CODE /* CODE */
+    .data    : load > DDR3_DSP2_DATA /* INITIALIZED GLOBAL AND STATIC VARIABLES. */
+    .bss     : load > DDR3_DSP2_DATA /* UNINITIALIZED OR ZERO INITIALIZED */
+                                            /* GLOBAL & STATIC VARIABLES.   */
+                    RUN_START(bss_start)
+                    RUN_END(bss_end)
+    .const   : load > DDR3_DSP2_DATA              /* GLOBAL CONSTANTS   */
+    .cinit   : load > DDR3_DSP2_DATA
+    .stack   : load > DDR3_DSP2_STACK            /* SOFTWARE SYSTEM STACK */
+    .plt     : load > DDR3_DSP2_DATA
+       .my_sect_ddr : load > DDR3_DSP2_DATA
+       .far  : load > DDR3_DSP2_DATA
+    .fardata : load > DDR3_DSP2_DATA
+       .neardata : load > DDR3_DSP2_DATA
+       .switch : load > DDR3_DSP2_DATA
+}
diff --git a/packages/ti/boot/sbl/example/dsp2MulticoreApp/makefile b/packages/ti/boot/sbl/example/dsp2MulticoreApp/makefile
new file mode 100644 (file)
index 0000000..f79303c
--- /dev/null
@@ -0,0 +1,164 @@
+# Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com/
+#
+#
+#  Redistribution and use in source and binary forms, with or without
+#  modification, are permitted provided that the following conditions
+#  are met:
+#
+#    Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+#
+#    Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in the
+#    documentation and/or other materials provided with the
+#    distribution.
+#
+#    Neither the name of Texas Instruments Incorporated nor the names of
+#    its contributors may be used to endorse or promote products derived
+#    from this software without specific prior written permission.
+#
+#  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+#  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+#  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+#  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+#  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+#  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+#  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+#  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+#  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+#  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+#  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+#
+# Macro definitions referenced below
+#
+
+#
+# Make rules for c66x - This file has all the common rules and defines required
+#                     for c66x ISA
+#
+# This file needs to change when:
+#     1. Code generation tool chain changes (currently it uses CG600_7.2.0.B2)
+#     2. Internal switches (which are normally not touched) has to change
+#     3. XDC specific switches change
+#     4. a rule common for C66 ISA has to be added or modified
+
+# Endianness : Allowed values = little | big
+ENDIAN = little
+
+# Format : Allowed values = COFF | ELF
+FORMAT = ELF
+
+ISA = 66
+ARCH = c66x
+
+#
+# Derive XDC/ISA specific settings
+#
+ifeq ($(FORMAT),ELF)
+  FORMAT_EXT = e
+endif
+
+# If ENDIAN is set to "big", set ENDIAN_EXT to "e", that would be used in
+#    in the filename extension of object/library/executable files
+ifeq ($(ENDIAN),big)
+  ENDIAN_EXT = e
+endif
+
+SBL_SRC_DIR ?= $(PDK_INSTALL_PATH)/ti/boot/sbl
+SBL_DSP_OBJDIR = $(SBL_SRC_DIR)/binary/$(BOARD)/example/c66/dsp2/obj
+SBL_DSP_BINDIR = $(SBL_SRC_DIR)/binary/$(BOARD)/example/c66/dsp2/bin
+
+OBJEXT = o$(FORMAT_EXT)$(ISA)$(ENDIAN_EXT)
+LIBEXT = a$(FORMAT_EXT)$(ISA)$(ENDIAN_EXT)
+EXEEXT = x$(FORMAT_EXT)$(ISA)$(ENDIAN_EXT)
+ASMEXT = s$(FORMAT_EXT)$(ISA)$(ENDIAN_EXT)
+
+# Set compiler/archiver/linker commands and include paths
+CODEGEN_INCLUDE = $(C6X_GEN_INSTALL_PATH)/include
+CC = $(C6X_GEN_INSTALL_PATH)/bin/cl6x -c
+AR = $(C6X_GEN_INSTALL_PATH)/bin/ar6x
+LNK = $(C6X_GEN_INSTALL_PATH)/bin/lnk6x
+LD = $(C6X_GEN_INSTALL_PATH)/bin/lnk6x
+
+# Derive a part of RTS Library name based on ENDIAN: little/big
+ifeq ($(ENDIAN),little)
+  RTSLIB_ENDIAN =
+else
+  RTSLIB_ENDIAN = e
+endif
+
+# Derive compiler switch and part of RTS Library name based on FORMAT: COFF/ELF
+ifeq ($(FORMAT),COFF)
+  CSWITCH_FORMAT = ti_arm9_abi
+  RTSLIB_FORMAT = _tiarm9
+endif
+ifeq ($(FORMAT),ELF)
+  CSWITCH_FORMAT = eabi
+  RTSLIB_FORMAT = _elf
+endif
+
+# Internal CFLAGS - normally doesn't change
+C66_CFLAGS_INTERNAL = -qq -pdsw225 --endian=$(ENDIAN) -mv6600 --abi=$(CSWITCH_FORMAT) -eo.$(OBJEXT) -ea.$(ASMEXT) -mi10 -mo -pdr -pden -pds=238 -pds=880 -pds1110 --program_level_compile -g -DSOC_$(SOC) -ppa -ppd=$@.dep
+
+LNKFLAGS_INTERNAL_PROFILE =
+C66_CFLAGS_INTERNAL += -O2 --optimize_with_debug --diag_wrap=off --preproc_with_compile
+LNKFLAGS_GLOBAL_c66x = -x --zero_init=on --retain=_vectors
+
+# Path of the RTS library - normally doesn't change for a given tool-chain
+#Let the linker choose the required library
+ RTSLIB_PATH = $(C6X_GEN_INSTALL_PATH)/lib/libc.a
+ LIB_PATHS += $(RTSLIB_PATH)
+ LNK_LIBS = $(addprefix -l,$(LIB_PATHS))
+ LNKCMD_FILE = $(SBL_SRC_DIR)/example/dsp2MulticoreApp/lnk_dsp2.cmd
+
+ INTERNALLINKDEFS = -w -q -u _c_int00 --silicon_version=6600 -c --dynamic
+
+ INTERNALLINKDEFS += $(LNKFLAGS_GLOBAL_c66x)
+
+# INCLUDE Directories
+SBL_SOC_DIR = $(SBL_SRC_DIR)/soc/am57xx
+
+DEPDIR = $(SBL_DSP_OBJDIR)/.deps
+DEPFILE = $(DEPDIR)/$(*F)
+
+SRCDIR = $(SBL_SRC_DIR)/example/dsp2MulticoreApp
+#INCDIR = $(CSL_DIR) $(SBL_DSP_DIR) $(C6X_GEN_INSTALL_PATH)/include
+
+INCLUDES = -I$(PDK_INSTALL_PATH) -I$(SBL_SOC_DIR) -I$(C6X_GEN_INSTALL_PATH)/include
+
+# Executable using device independent library and device object file
+EXE=sbl_app.$(EXEEXT)
+
+VPATH=$(SRCDIR):$(SBL_SRC_DIR)/soc/am57xx
+
+#List the Source Files
+SRC_C = \
+       sbl_multicore_dsp2.c \
+       mailbox.c
+
+# Make Rule for the SRC Files
+SRC_OBJS = $(patsubst %.c, $(SBL_DSP_OBJDIR)/%.$(OBJEXT), $(SRC_C))
+
+example:$(SBL_DSP_BINDIR)/$(EXE)
+
+$(SBL_DSP_BINDIR)/$(EXE): $(SRC_OBJS) $(SBL_DSP_BINDIR)/.created $(SBL_DSP_OBJDIR)/.created
+       @echo linking $(SRC_OBJS) into $@ ...
+       $(LNK) $(SRC_OBJS) $(INTERNALLINKDEFS) $(LNKCMD_FILE) -o $@ -m $@.map $(LNK_LIBS)
+
+$(SBL_DSP_OBJDIR)/%.$(OBJEXT): %.c $(SBL_DSP_OBJDIR)/.created
+       @echo compiling $< ...
+       #$(CC) -ppd=$(DEPFILE).P $(C66_CFLAGS_INTERNAL) $(INCLUDES) -fr=$(SBL_DSP_OBJDIR) -fs=$(SBL_DSP_OBJDIR) -fc $<
+       $(CC) $(C66_CFLAGS_INTERNAL) $(INCLUDES) -fr=$(SBL_DSP_OBJDIR) -fs=$(SBL_DSP_OBJDIR) -fc $<
+
+$(SBL_DSP_OBJDIR)/.created:
+       @mkdir -p $(SBL_DSP_OBJDIR)
+       @touch $(SBL_DSP_OBJDIR)/.created
+
+$(SBL_DSP_BINDIR)/.created:
+       @mkdir -p $(SBL_DSP_BINDIR)
+       @touch $(SBL_DSP_BINDIR)/.created
+
+example_clean:
+       @rm -f $(SBL_DSP_BINDIR)/$(EXE)
+       @rm -f $(SRC_OBJS) $(SBL_DSP_BINDIR)/.created $(SBL_DSP_OBJDIR)/.created
diff --git a/packages/ti/boot/sbl/example/dsp2MulticoreApp/sbl_multicore_dsp2.c b/packages/ti/boot/sbl/example/dsp2MulticoreApp/sbl_multicore_dsp2.c
new file mode 100644 (file)
index 0000000..4798109
--- /dev/null
@@ -0,0 +1,47 @@
+/*
+ * Copyright (c) 2015, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * *  Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *
+ * *  Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * *  Neither the name of Texas Instruments Incorporated nor the names of
+ *    its contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <ti/csl/cslr_device.h>
+#include "mailbox.h"
+
+int main()
+{
+    uint32_t msg = 'D';
+
+    /* Wait for message from MPU */
+    while (MESSAGE_INVALID ==
+           MailboxGetMessage(CSL_MPU_MAILBOX2_REGS, MAILBOX_QUEUE_5, &msg)) ;
+
+    /* Send ack message to MPU */
+    MailboxSendMessage(CSL_MPU_MAILBOX8_REGS, MAILBOX_QUEUE_0, 0xAA55FF00);
+    while (1) ;
+}
diff --git a/packages/ti/boot/sbl/example/ipu1MulticoreApp/lnk_cpu0.cmd b/packages/ti/boot/sbl/example/ipu1MulticoreApp/lnk_cpu0.cmd
new file mode 100644 (file)
index 0000000..518be47
--- /dev/null
@@ -0,0 +1,71 @@
+
+
+-stack  0x00500000                            /* SOFTWARE STACK SIZE    */
+-heap   0x00500000                         /* HEAP AREA SIZE            */
+-e      _c_int00
+
+/* SPECIFY THE SYSTEM MEMORY MAP */
+
+MEMORY
+{
+    IRAM_MEM:     org = 0x00000000 len = 0x400
+    /*CODE SECTION - 20MB*/
+    /*DATA SECTION - 10MB*/
+    /*STACK - 5MB*/
+    /*HEAP - 5MB*/
+    DDR3_MPU_CPU0_CODE : org = 0x90000000,len = 0x01400000
+    DDR3_MPU_CPU0_DATA :  org = 0x91400000, len = 0x00A00000
+    DDR3_MPU_CPU0_STACK : org = 0x91E00000, len = 0x00500000
+    DDR3_MPU_CPU0_HEAP :  org = 0x92300000, len = 0x00500000
+
+    DDR3_IPU1_CPU0_CODE : org = 0x93200000,len = 0x01400000
+    DDR3_IPU1_CPU0_DATA :  org = 0x94600000, len = 0x00A00000
+    DDR3_IPU1_CPU0_STACK : org = 0x95000000, len = 0x00500000
+    DDR3_IPU1_CPU0_HEAP :  org = 0x95500000, len = 0x00500000
+
+    DDR3_IPU1_CPU1_CODE : org = 0x96400000,len = 0x01400000
+    DDR3_IPU1_CPU1_DATA :  org = 0x97800000,len = 0x00A00000
+    DDR3_IPU1_CPU1_STACK : org = 0x98200000,len = 0x00500000
+    DDR3_IPU1_CPU1_HEAP :  org = 0x98700000,len = 0x00500000
+
+    DDR3_IPU2_CPU0_CODE : org = 0x99600000,len = 0x01400000
+    DDR3_IPU2_CPU0_DATA :  org = 0x9AA00000,len = 0x00A00000
+    DDR3_IPU2_CPU0_STACK : org = 0x9B400000,len = 0x00500000
+    DDR3_IPU2_CPU0_HEAP :  org = 0x9B900000,len = 0x00500000
+
+    DDR3_IPU2_CPU1_CODE : org = 0x9C800000,len = 0x01400000
+    DDR3_IPU2_CPU1_DATA :  org = 0x9DC00000,len = 0x00A00000
+    DDR3_IPU2_CPU1_STACK : org = 0x9E600000,len = 0x00500000
+    DDR3_IPU2_CPU1_HEAP :  org = 0x9EB00000,len = 0x00500000
+
+    DDR3_DSP1_CODE : org = 0x83200000,len = 0x01400000
+    DDR3_DSP1_DATA : org = 0x84600000, len = 0x00A00000
+    DDR3_DSP1_STACK :org = 0x85000000, len = 0x00500000
+    DDR3_DSP1_HEAP : org = 0x85500000, len = 0x00500000
+
+    DDR3_DSP2_CODE : org = 0x86400000,len = 0x01400000
+    DDR3_DSP2_DATA :  org = 0x87800000,len = 0x00A00000
+    DDR3_DSP2_STACK : org = 0x88200000,len = 0x00500000
+    DDR3_DSP2_HEAP :  org = 0x88700000,len = 0x00500000
+}
+
+/* SPECIFY THE SECTIONS ALLOCATION INTO MEMORY */
+
+SECTIONS
+{
+    .intvecs : load > IRAM_MEM
+    .init    : load > DDR3_IPU1_CPU0_CODE
+
+    .text    : load > DDR3_IPU1_CPU0_CODE /* CODE                         */
+    .data    : load > DDR3_IPU1_CPU0_DATA /* INITIALIZED GLOBAL AND STATIC VARIABLES. */
+    .bss     : load > DDR3_IPU1_CPU0_DATA /* UNINITIALIZED OR ZERO INITIALIZED */
+                                            /* GLOBAL & STATIC VARIABLES.   */
+                    RUN_START(bss_start)
+                    RUN_END(bss_end)
+    .const   : load > DDR3_IPU1_CPU0_DATA              /* GLOBAL CONSTANTS             */
+    .cinit   : load > DDR3_IPU1_CPU0_DATA
+    .stack   : load > DDR3_IPU1_CPU0_STACK            /* SOFTWARE SYSTEM STACK        */
+    .plt     : load > DDR3_IPU1_CPU0_CODE
+    .sysmem  : load > DDR3_IPU1_CPU0_DATA
+    .my_sect_ddr : load > DDR3_IPU1_CPU0_CODE
+}
diff --git a/packages/ti/boot/sbl/example/ipu1MulticoreApp/makefile b/packages/ti/boot/sbl/example/ipu1MulticoreApp/makefile
new file mode 100644 (file)
index 0000000..f672c3b
--- /dev/null
@@ -0,0 +1,156 @@
+# Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com/
+#
+#
+#  Redistribution and use in source and binary forms, with or without
+#  modification, are permitted provided that the following conditions
+#  are met:
+#
+#    Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+#
+#    Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in the
+#    documentation and/or other materials provided with the
+#    distribution.
+#
+#    Neither the name of Texas Instruments Incorporated nor the names of
+#    its contributors may be used to endorse or promote products derived
+#    from this software without specific prior written permission.
+#
+#  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+#  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+#  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+#  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+#  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+#  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+#  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+#  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+#  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+#  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+#  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+#
+# Macro definitions referenced below
+#
+
+#
+# Make rules for m4 - This file has all the common rules and defines required
+#                     for Cortex-M4 ISA
+#
+# This file needs to change when:
+#     1. Code generation tool chain changes
+#     2. Internal switches (which are normally not touched) has to change
+#     3. XDC specific switches change
+#     4. a rule common for M4 ISA has to be added or modified
+
+# Endianness : Allowed values = little | big
+ENDIAN =&nbs