PDK-6951: Board: Updated current monitor calibration values for am64x evm
authorM V Pratap Reddy <x0257344@ti.com>
Fri, 27 Nov 2020 03:52:02 +0000 (09:22 +0530)
committerSivaraj R <sivaraj@ti.com>
Fri, 27 Nov 2020 06:28:10 +0000 (00:28 -0600)
packages/ti/board/diag/current_monitor/src/current_monitor_test.c
packages/ti/board/diag/current_monitor/src/current_monitor_test.h

index 3ca4a7057835c364a0253cdffb263b0f9e38cb68..9f503454fa5081115b86be4d7e251ae0cd2821dd 100755 (executable)
@@ -141,14 +141,14 @@ inaCfgObj_t inaDevice[NUM_OF_INA_DEVICES] = {
     {"VIOIN_3V3",    0x44, {0.002, 0.0025, 1.25, 0.001068115, 0.0000427, 59919}},
     {"VDD_SRAM_1V2", 0x45, {0.002, 0.0025, 1.25, 0.000991821, 0.0000397, 64528}}
 };
-#elif defined(SOC_AM64X)  //AM64X_TODO: Need to update Values
+#elif defined(SOC_AM64X)
 inaCfgObj_t inaDevice[NUM_OF_INA_DEVICES] = {
-    {"VDD_CORE",      0x40, {0.002, 0.0025, 1.25, 305.17, 0.000152, 16777}},
-    {"VDDR_CORE",     0x41, {0.01, 0.0025, 1.25,  38.14,  0.0000305, 16777}},
-    {"VDDS_DDR",      0x46, {0.01, 0.0025, 1.25,  86.21,  0.0000610, 8388}},
-    {"SoC_DVDD1V8",   0x4B, {0.01, 0.0025, 1.25, 152.58,  0.0000915, 5592}},
-    {"SoC_DVDD3V3",   0x4C, {0.002, 0.0025, 1.25, 95.36,  0.0000915, 27962}},
-    {"SoC_AVDD1V8",   0x4E, {0.01, 0.0025, 1.25,  38.14,  0.0000122, 41943}}
+    {"VDD_CORE",      0x40, {0.002, 0.0025, 1.25, 0.001804352, 0.0000722, 35469}},
+    {"VDDR_CORE",     0x41, {0.01,  0.0025, 1.25, 0.000198364, 0.0000079, 64527}},
+    {"VDDS_DDR",      0x46, {0.01,  0.0025, 1.25, 0.000196838, 0.0000079, 65027}},
+    {"SoC_DVDD1V8",   0x4B, {0.01,  0.0025, 1.25, 0.000268555, 0.0000107, 47662}},
+    {"SoC_DVDD3V3",   0x4C, {0.01,  0.0025, 1.25, 0.0002388,   0.0000096, 53601}},
+    {"SoC_AVDD1V8",   0x4E, {0.01,  0.0025, 1.25, 0.001266479, 0.0000507, 10106}}
 };
 #else
 /* TODO: Need to update the values for iceK2G */
@@ -806,7 +806,7 @@ int main(void)
        enableMAINI2C(2, CSL_I2C2_CFG_BASE);
 #endif
 
-#if (defined(SOC_J721E) || defined(SOC_J7200) || defined(SOC_AM64X)) && !defined (__aarch64__)
+#if (defined(SOC_J721E) || defined(SOC_J7200)) && !defined (__aarch64__)
     /* MCU I2C instance will be active by default for R5 core.
      * Need update HW attrs to enable MAIN I2C instance.
      */
index ed8518b53a2b14cf35b9ba9fd4f3ea57e43c47c6..0204dc5c70239ede4f667df4afe97d5611a001d9 100755 (executable)
@@ -88,7 +88,7 @@ extern "C" {
 #elif defined(SOC_J7200)
 #define NUM_OF_INA_DEVICES                (32U)
 #define TOT_INA_IN_PM1                    (16U)
-#elif defined(SOC_AM64X)
+#elif defined(am64x_evm)
 #define NUM_OF_INA_DEVICES                (0x06U)
 #endif