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raw | patch | inline | side by side (parent: 2096cf6)
raw | patch | inline | side by side (parent: 2096cf6)
author | Don Dominic <a0486429@ti.com> | |
Thu, 18 Mar 2021 06:51:51 +0000 (12:21 +0530) | ||
committer | Sujith Shivalingappa <sujith.s@ti.com> | |
Thu, 18 Mar 2021 07:01:11 +0000 (02:01 -0500) |
- Move extern inline Fxn definition of 'TimerP_getPreferredDefInst'
from 'osal/soc/j7200/TimerP_default_r5f.c' to header file 'osal/soc/j7200/osal_soc.h'
- Fxn is refernced in Arch_utils.c,
which will break C++ build if extern "inline" fxn defined in different source file
- Issue introduced by "b431aefd763ff2f15468e87f67038ed5db55f50f#packages/ti/osal/soc/j7200/osal_soc.h"
Signed-off-by: Don Dominic <a0486429@ti.com>
from 'osal/soc/j7200/TimerP_default_r5f.c' to header file 'osal/soc/j7200/osal_soc.h'
- Fxn is refernced in Arch_utils.c,
which will break C++ build if extern "inline" fxn defined in different source file
- Issue introduced by "b431aefd763ff2f15468e87f67038ed5db55f50f#packages/ti/osal/soc/j7200/osal_soc.h"
Signed-off-by: Don Dominic <a0486429@ti.com>
packages/ti/osal/soc/j7200/TimerP_default_r5f.c | patch | blob | history | |
packages/ti/osal/soc/j7200/osal_soc.h | patch | blob | history |
diff --git a/packages/ti/osal/soc/j7200/TimerP_default_r5f.c b/packages/ti/osal/soc/j7200/TimerP_default_r5f.c
index 3e142d37808be9b67a6266db7bfbd49c4353f973..6933fdac5b8502b1a60007b402d4d3fb06f59f07 100755 (executable)
return;
}
-inline int32_t TimerP_getPreferredDefInst(void)
-{
- int32_t instVal;
- CSL_ArmR5CPUInfo info;
- CSL_armR5GetCpuID(&info);
-
- /* Main domain R5F only */
- instVal = 4;
- if ((uint32_t)CSL_ARM_R5_CLUSTER_GROUP_ID_1 == info.grpId)
- {
- instVal = 6;
- }
- if (CSL_ARM_R5_CPU_ID_1 == info.cpuID)
- {
- instVal++;
- }
- return (instVal);
-}
-
/* Nothing past this point */
index d4e1284f9ec9568747fd7b26a26ab67e3a7ca4fd..33133ae8f75bdae7a86fe421a3941d86e730abfd 100755 (executable)
#endif
#include <ti/osal/osal.h>
#include <ti/csl/soc.h>
+#include <ti/csl/arch/csl_arch.h>
#if defined(TimerP_numTimerDevices)
#undef TimerP_numTimerDevices
#endif
/* external references */
extern Osal_HwAttrs gOsal_HwAttrs;
#if defined (BUILD_MCU)
-extern inline int32_t TimerP_getPreferredDefInst(void);
+inline int32_t TimerP_getPreferredDefInst(void)
+{
+ int32_t instVal;
+ CSL_ArmR5CPUInfo info;
+ CSL_armR5GetCpuID(&info);
+
+ /* Main domain R5F only */
+ instVal = 4;
+ if ((uint32_t)CSL_ARM_R5_CLUSTER_GROUP_ID_1 == info.grpId)
+ {
+ instVal = 6;
+ }
+ if (CSL_ARM_R5_CPU_ID_1 == info.cpuID)
+ {
+ instVal++;
+ }
+ return (instVal);
+}
#define OSAL_ARCH_TIMER_INST_FOR_TS (TimerP_getPreferredDefInst())
/**< Returns the instance of timers required for given instance */
#else