FreeRTOS : I2C Ported

	Tested on freertos j721e mcu 10, mpu10
	Compiled for j7200, am65xx & j721e for rtos and freertos

Signed-off-by: sujith <sujith.s@ti.com>

diff --git a/packages/ti/drv/i2c/i2c_component.mk b/packages/ti/drv/i2c/i2c_component.mk
old mode 100755 (executable)
new mode 100644 (file)
index 69911fc..dec59e2
--- a/packages/ti/drv/i2c/i2c_component.mk
+++ b/packages/ti/drv/i2c/i2c_component.mk
@@ -98,7 +98,7 @@ drvi2c_j7200_CORELIST  = mpu1_0 mcu1_0 mcu1_1 mcu2_0 mcu2_1
 drvi2c_am64x_CORELIST  = mpu1_0 mcu1_0 mcu1_1 mcu2_0 mcu2_1 m4f_0
 drvi2c_tpr12_CORELIST  = mcu1_0 c66xdsp_1
 drvi2c_awr294x_CORELIST  = mcu1_0
-
+drvi2c_RTOS_LIST         = $(DEFAULT_RTOS_LIST)
 
 ############################
 # i2c package
@@ -122,8 +122,7 @@ drvi2c_FIRM_LIST = $(i2c_FIRM_LIST)
 # All the tests mentioned in list are built when test target is called
 # List below all examples for allowed values
 ############################
-i2c_EXAMPLE_LIST = drv_i2c_led_blink_test I2C_Baremetal_Eeprom_TestApp I2C_Eeprom_TestApp drv_i2c_utility I2C_Master_TestApp  I2C_Slave_TestApp
-drvi2c_EXAMPLE_LIST = $(i2c_EXAMPLE_LIST)
+i2c_EXAMPLE_LIST = drv_i2c_led_blink_test I2C_Baremetal_Eeprom_TestApp drv_i2c_utility I2C_Master_TestApp  I2C_Slave_TestApp
 
 #
 # I2C Modules
@@ -375,29 +374,47 @@ export I2C_Baremetal_Eeprom_TestApp_$(SOC)_CORELIST
 export I2C_Baremetal_Eeprom_TestApp_SBL_APPIMAGEGEN = yes
 
 # I2C rtos EEPROM test
-I2C_Eeprom_TestApp_COMP_LIST = I2C_Eeprom_TestApp
-I2C_Eeprom_TestApp_RELPATH = ti/drv/i2c/test/eeprom_read
-I2C_Eeprom_TestApp_PATH = $(PDK_I2C_COMP_PATH)/test/eeprom_read
-I2C_Eeprom_TestApp_BOARD_DEPENDENCY = yes
-I2C_Eeprom_TestApp_CORE_DEPENDENCY = no
-I2C_Eeprom_TestApp_MAKEFILE = -f makefile
-I2C_Eeprom_TestApp_XDC_CONFIGURO = yes
-export I2C_Eeprom_TestApp_COMP_LIST
-export I2C_Eeprom_TestApp_BOARD_DEPENDENCY
-export I2C_Eeprom_TestApp_CORE_DEPENDENCY
-export I2C_Eeprom_TestApp_XDC_CONFIGURO
-export I2C_Eeprom_TestApp_MAKEFILE
-I2C_Eeprom_TestApp_PKG_LIST = I2C_Eeprom_TestApp
-I2C_Eeprom_TestApp_INCLUDE = $(I2C_Eeprom_TestApp_PATH)
-I2C_Eeprom_TestApp_BOARDLIST = $(drvi2c_BOARDLIST)
-export I2C_Eeprom_TestApp_BOARDLIST
+define I2C_Eeprom_TestApp_RULE
+
+I2C_Eeprom_TestApp_$(1)_COMP_LIST = I2C_Eeprom_TestApp_$(1)
+I2C_Eeprom_TestApp_$(1)_RELPATH = ti/drv/i2c/test/eeprom_read
+I2C_Eeprom_TestApp_$(1)_PATH = $(PDK_I2C_COMP_PATH)/test/eeprom_read
+I2C_Eeprom_TestApp_$(1)_BOARD_DEPENDENCY = yes
+I2C_Eeprom_TestApp_$(1)_CORE_DEPENDENCY = yes
+I2C_Eeprom_TestApp_$(1)_MAKEFILE = -f makefile BUILD_OS_TYPE=$(1)
+I2C_Eeprom_TestApp_$(1)_XDC_CONFIGURO = $(if $(findstring tirtos,$(1)),yes,no)
+export I2C_Eeprom_TestApp_$(1)_COMP_LIST
+export I2C_Eeprom_TestApp_$(1)_BOARD_DEPENDENCY
+export I2C_Eeprom_TestApp_$(1)_CORE_DEPENDENCY
+export I2C_Eeprom_TestApp_$(1)_XDC_CONFIGURO
+export I2C_Eeprom_TestApp_$(1)_MAKEFILE
+I2C_Eeprom_TestApp_$(1)_PKG_LIST = I2C_Eeprom_TestApp_$(1)
+I2C_Eeprom_TestApp_$(1)_INCLUDE = $(I2C_Eeprom_TestApp_$(1)_PATH)
+I2C_Eeprom_TestApp_$(1)_BOARDLIST = = $(filter $(DEFAULT_BOARDLIST_$(1)), $(drvi2c_BOARDLIST))
+export I2C_Eeprom_TestApp_$(1)_BOARDLIST
+
 ifeq ($(SOC),$(filter $(SOC), am64x))
-I2C_Eeprom_TestApp_$(SOC)_CORELIST = mpu1_0 mcu1_0 mcu1_1 mcu2_0 mcu2_1
+    I2C_Eeprom_TestApp_$(1)_$(SOC)_CORELIST = $(filter $(DEFAULT_$(SOC)_CORELIST_$(1)), mpu1_0 mcu1_0 mcu1_1 mcu2_0 mcu2_1)
 else
-I2C_Eeprom_TestApp_$(SOC)_CORELIST = $(i2c_$(SOC)_CORELIST)
+    I2C_Eeprom_TestApp_$(1)_$(SOC)_CORELIST = $(filter $(DEFAULT_$(SOC)_CORELIST_$(1)), $(i2c_$(SOC)_CORELIST))
 endif
-export I2C_Eeprom_TestApp_$(SOC)_CORELIST
-export I2C_Eeprom_TestApp_SBL_APPIMAGEGEN = yes
+
+    ifneq ($(1),$(filter $(1), safertos))
+        i2c_EXAMPLE_LIST += I2C_Eeprom_TestApp_$(1)
+    else
+        ifneq ($(wildcard $(SAFERTOS_KERNEL_INSTALL_PATH)),)
+            i2c_EXAMPLE_LIST += I2C_Eeprom_TestApp_$(1)
+        endif
+    endif
+
+export I2C_Eeprom_TestApp_$(1)_$(SOC)_CORELIST
+export I2C_Eeprom_TestApp_$(1)_SBL_APPIMAGEGEN = yes
+
+endef
+#i2c_EXAMPLE_LIST is exported at the end of the file
+
+I2C_Eeprom_TestApp_MACRO_LIST := $(foreach curos,$(drvi2c_RTOS_LIST),$(call I2C_Eeprom_TestApp_RULE,$(curos)))
+$(eval ${I2C_Eeprom_TestApp_MACRO_LIST})
 
 # I2C Utility
 drv_i2c_utility_COMP_LIST = drv_i2c_utility
@@ -469,6 +486,9 @@ I2C_Slave_TestApp_$(SOC)_CORELIST = $(i2c_$(SOC)_CORELIST)
 export I2C_Slave_TestApp_$(SOC)_CORELIST
 export I2C_Slave_TestApp_SBL_APPIMAGEGEN = yes
 
+# Export all supported examples
+drvi2c_EXAMPLE_LIST = $(i2c_EXAMPLE_LIST)
+
 export drvi2c_LIB_LIST
 export drvi2c_EXAMPLE_LIST
 export drvi2c_FIRM_LIST

diff --git a/packages/ti/drv/i2c/test/eeprom_read/j721e/i2cEepromTest_r5f.cfg b/packages/ti/drv/i2c/test/eeprom_read/j721e/i2cEepromTest_r5f.cfg
index ca2734c396e510af028933791c6c26ac3c66c5fe..4a8524241f7343226e3ba1275f6231b0f714fb29 100644 (file)
--- a/packages/ti/drv/i2c/test/eeprom_read/j721e/i2cEepromTest_r5f.cfg
+++ b/packages/ti/drv/i2c/test/eeprom_read/j721e/i2cEepromTest_r5f.cfg
@@ -161,11 +161,5 @@ Main.common$.diags_INFO = Diags.ALWAYS_ON;
 
 BIOS.libType = BIOS.LibType_Custom;
 
-/*
- * Initialize MPU and enable it
- *
- * Note: MPU must be enabled and properly configured for caching to work.
- */
-xdc.loadCapsule("mpu.xs");
 
 

diff --git a/packages/ti/drv/i2c/test/eeprom_read/j721e/mpu.xs b/packages/ti/drv/i2c/test/eeprom_read/j721e/mpu.xs
deleted file mode 100644 (file)
index 9dea2c9..0000000
--- a/packages/ti/drv/i2c/test/eeprom_read/j721e/mpu.xs
+++ /dev/null
@@ -1,159 +0,0 @@
-/*
- * Copyright (c) 2019, Texas Instruments Incorporated
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * *  Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- *
- * *  Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * *  Neither the name of Texas Instruments Incorporated nor the names of
- *    its contributors may be used to endorse or promote products derived
- *    from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
- * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
- * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
- * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
- * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
- * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
- * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
- * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-/*
- *  ======== event_MPU.xs ========
- *  MPU Settings for J721E device's Cortex-R5F
- */
-
-/*
- *  -------------------------------------------------------------------------------------------------------------
- * | Id | Base Address | Size | En | Cacheable                                 | XN | AccPerm             | Mask |
- * |----|--------------|------|----|-------------------------------------------|----|---------------------|------|
- * | 0  | 0x00000000   | 4GB  | T  | uncacheable, Shareable                    | F  | RW at PL 1 & PL 2   | 0x0  |
- * |----|--------------|------|----|-------------------------------------------|----|---------------------|------|
- * | 1  | 0 (local TCM)| 32K  | T  | Write-Back, Write-Allocate, Non-Shareable | F  | RW at PL 1          | 0x0  |
- * |----|--------------|------|----|-------------------------------------------|----|---------------------|------|
- * | 2  | 0x41000000   | 32K  | T  | Write-Back, Write-Allocate, Non-Shareable | F  | RW at PL 1          | 0x0  |
- * |----|--------------|------|----|-------------------------------------------|----|---------------------|------|
- * | 3  | 0x41010000   | 32K  | T  | Write-Back, Write-Allocate, Non-Shareable | F  | RW at PL 1          | 0x0  |
- * |----|--------------|------|----|-------------------------------------------|----|---------------------|------|
- * | 4  | 0x41C00000   | 1MB  | T  | Write-Back, Write-Allocate, Non-Shareable | F  | RW at PL 1          | 0x0  |
- *  -------------------------------------------------------------------------------------------------------------
- * | 5  | 0x70000000   | 8MB  | T  | MSMC Ram - Cachable                       | F  | RW at PL 1          | 0x0  |
- *  -------------------------------------------------------------------------------------------------------------
- * | 6  | 0x80000000   | 2GB  | T  | DDR - Strongly Ordered, Shareable         | F  | RW at PL 1 & PL 3   | 0x0  |
- *  -------------------------------------------------------------------------------------------------------------
- * | 7  | 0xAA000000   | 32MB | T  | DDR (VRing Buffer) - Uncacheble           | F  | RW at PL 1 & PL 3   | 0x0  |
- * |-------------------------------------------------------------------------------------------------------------|
- */
-
-/*
- * Note: Marking a region as shareable will cause the region to behave as outer shareable with write through
- *       no write-allocate caching policy irrespective of the actual cache policy set. Therefore, only select
- *       regions that are actually shared outside the R5 CPUSS must be marked as shared.
- */
-
-var MPU = xdc.useModule('ti.sysbios.family.arm.MPU');
-MPU.enableMPU = true;
-MPU.enableBackgroundRegion = true;
-
-var attrs = new MPU.RegionAttrs();
-MPU.initRegionAttrsMeta(attrs);
-
-/* This entry covers the whole 32 bit memory range
-   Address: 0x00000000-0xffffffff */
-attrs.enable = true;
-attrs.bufferable = false;
-attrs.cacheable = false;
-attrs.shareable = true;
-attrs.noExecute = true;
-attrs.accPerm = 1;          /* RW at PL1 */
-attrs.tex = 0;
-attrs.subregionDisableMask = 0;
-MPU.setRegionMeta(0, 0x00000000, MPU.RegionSize_4G, attrs);
-
-/* This entry covers the ATCM mapped to 0 */
-attrs.enable = true;
-attrs.bufferable = true;
-attrs.cacheable = true;
-attrs.shareable = true;
-attrs.noExecute = false;
-attrs.accPerm = 1;          /* RW at PL1 */
-attrs.tex = 1;
-attrs.subregionDisableMask = 0;
-MPU.setRegionMeta(1, 0x00000000, MPU.RegionSize_32K, attrs);
-
-/* This entry covers ATCM if mapped to 0x41000000 */
-attrs.enable = true;
-attrs.bufferable = true;
-attrs.cacheable = true;
-attrs.shareable = false;
-attrs.noExecute = false;
-attrs.accPerm = 1;          /* RW at PL1 */
-attrs.tex = 1;
-attrs.subregionDisableMask = 0;
-MPU.setRegionMeta(2, 0x41000000, MPU.RegionSize_32K, attrs);
-
-/* This entry covers BTCM if mapped to 0x41010000 */
-attrs.enable = true;
-attrs.bufferable = true;
-attrs.cacheable = true;
-attrs.shareable = false;
-attrs.noExecute = false;
-attrs.accPerm = 1;          /* RW at PL1 */
-attrs.tex = 1;
-attrs.subregionDisableMask = 0x0;
-MPU.setRegionMeta(3, 0x41010000, MPU.RegionSize_32K, attrs);
-
-/* This entry covers RAM0 */
-attrs.enable = true;
-attrs.bufferable = true;
-attrs.cacheable = true;
-attrs.shareable = false;
-attrs.noExecute = false;
-attrs.accPerm = 1;          /* RW at PL1 */
-attrs.tex = 1;
-attrs.subregionDisableMask = 0;
-MPU.setRegionMeta(4, 0x41C00000, MPU.RegionSize_1M, attrs);
-
-/* This entry covers MSMC SRAM */
-attrs.enable = true;
-attrs.bufferable = true;
-attrs.cacheable = true;
-attrs.shareable = false;
-attrs.noExecute = false;
-attrs.accPerm = 1;          /* RW at PL1 */
-attrs.tex = 1;
-attrs.subregionDisableMask = 0;
-MPU.setRegionMeta(5, 0x70000000, MPU.RegionSize_8M, attrs);
-
-/* This entry covers DDR memory */
-attrs.enable = true;
-attrs.bufferable = true;
-attrs.cacheable = true;
-attrs.shareable = false;
-attrs.noExecute = false;
-attrs.accPerm = 0x3;          /* RW at PL1 & PL2 */
-attrs.tex = 1;
-attrs.subregionDisableMask = 0;
-MPU.setRegionMeta(6, 0x80000000, MPU.RegionSize_2G, attrs);
-
-/* Ring Buffer uncached.... */
-attrs.enable = true;
-attrs.bufferable = false;
-attrs.cacheable = false;
-attrs.shareable = true;
-attrs.noExecute = true;
-attrs.accPerm = 3;          /* RW at PL1 */
-attrs.tex = 0;
-attrs.subregionDisableMask = 0;
-MPU.setRegionMeta(7, 0xAA000000, MPU.RegionSize_32M, attrs);

diff --git a/packages/ti/drv/i2c/test/eeprom_read/makefile b/packages/ti/drv/i2c/test/eeprom_read/makefile
index b21ff31f85c02f6230b70f52953ca4cef4034ff9..18770352cfc289db635eeba9e20acd11933047af 100644 (file)
--- a/packages/ti/drv/i2c/test/eeprom_read/makefile
+++ b/packages/ti/drv/i2c/test/eeprom_read/makefile
@@ -2,44 +2,52 @@
 include $(PDK_INSTALL_PATH)/ti/build/Rules.make
 
 ifeq ($(IS_BAREMETAL),yes)
-BUILD_OS_TYPE = baremetal
+    BUILD_OS_TYPE = baremetal
+endif
+
+#Baremetal Specifics
+ifeq ($(BUILD_OS_TYPE), baremetal)
+
 CFLAGS_OS_DEFINES =
 LNKFLAGS_LOCAL_mpu1_0  += --entry Entry
 COMP_LIST_COMMON =  $(PDK_COMMON_BAREMETAL_COMP)
 EXTERNAL_INTERFACES =
 XDC_CFG_FILE_mpu1_0 =
 XDC_CFG_FILE_mcu1_0 =
-else
-BUILD_OS_TYPE = tirtos
-CFLAGS_OS_DEFINES = -DUSE_BIOS
+
+#Name of the directory created under packages/ti/binary/
+APP_NAME = I2C_Baremetal_Eeprom_TestApp
+
+endif
+
+#TI RTOS Specifics
+ifeq ($(BUILD_OS_TYPE), tirtos)
+
+CFLAGS_OS_DEFINES = -DUSE_BIOS -DRTOS_ENV
 EXTERNAL_INTERFACES = bios xdc
 COMP_LIST_COMMON    = $(PDK_COMMON_TIRTOS_COMP)
 ifeq ($(SOC),$(filter $(SOC), j721e j7200 am65xx am64x))
 XDC_CFG_FILE_$(CORE) = $(PDK_INSTALL_PATH)/ti/build/$(SOC)/sysbios_$(ISA).cfg
 endif
-endif
 
-ifeq ($(BUILD_OS_TYPE), tirtos)
-I2C_OS_TESTPREFIX=
-else
-I2C_OS_TESTPREFIX=_Baremetal
+#Name of the directory created under packages/ti/binary/
+APP_NAME = I2C_Eeprom_TestApp_$(BUILD_OS_TYPE)
+
 endif
 
-ifeq ($(SMP), enable)
-    #Name of the directory created under packages/ti/binary/
-    APP_NAME = I2C$(I2C_OS_TESTPREFIX)_Eeprom_SMP_TestApp
-    # Name of the binary if different from the default (APP_NAME)_$(BOARD_$(CORE)_<build_profile>
-    LOCAL_APP_NAME =  I2C$(I2C_OS_TESTPREFIX)_Eeprom_$(BOARD)_$(CORE)_SMP_TestApp
-else
-    #Name of the directory created under packages/ti/binary/
-    APP_NAME = I2C$(I2C_OS_TESTPREFIX)_Eeprom_TestApp
-    # Name of the binary if different from the default (APP_NAME)_$(BOARD_$(CORE)_<build_profile>
-    LOCAL_APP_NAME =  I2C$(I2C_OS_TESTPREFIX)_Eeprom_$(BOARD)_$(CORE)TestApp
-    ifeq ($(SOC),$(filter $(SOC), j721e j7200 am65xx am64x))
-        LOCAL_APP_NAME =  I2C$(I2C_OS_TESTPREFIX)_Eeprom_TestApp_$(CORE)
-    endif
+#FreeRTOS Specifics
+ifeq ($(BUILD_OS_TYPE), freertos)
+
+CFLAGS_OS_DEFINES =  -DFREERTOS -DRTOS_ENV
+EXTERNAL_INTERFACES = freertos
+COMP_LIST_COMMON = $(PDK_COMMON_FREERTOS_COMP)
+
+#Name of the directory created under packages/ti/binary/
+APP_NAME = I2C_Eeprom_TestApp_$(BUILD_OS_TYPE)
+
 endif
 
+
 SRCDIR = . src
 INCDIR = . src
 # Common source files across all platforms and cores

diff --git a/packages/ti/drv/i2c/test/eeprom_read/src/main_test.c b/packages/ti/drv/i2c/test/eeprom_read/src/main_test.c
old mode 100755 (executable)
new mode 100644 (file)
index a05133c..6d69760
--- a/packages/ti/drv/i2c/test/eeprom_read/src/main_test.c
+++ b/packages/ti/drv/i2c/test/eeprom_read/src/main_test.c
@@ -46,16 +46,7 @@
  *
  */
 
-#ifdef USE_BIOS
-/* XDCtools Header files */
-#include <xdc/std.h>
-#include <xdc/runtime/System.h>
-#include <xdc/runtime/Error.h>
-
-/* BIOS Header files */
-#include <ti/sysbios/BIOS.h>
-#include <ti/sysbios/knl/Task.h>
-#endif /* #ifdef USE_BIOS */
+#include <ti/osal/osal.h>
 
 #include <stdio.h>
 #include <string.h>
@@ -875,7 +866,7 @@ void test_I2C_Eeprom_TestApp_runner(void)
        @cores: mpu1_0, mcu1_0 */
 
     UNITY_BEGIN();
-#ifdef USE_BIOS
+#ifdef RTOS_ENV
     RUN_TEST(test_I2C_Eeprom_TestApp);
 #else
     RUN_TEST(test_I2C_Eeprom_BareMetal_TestApp);
@@ -886,11 +877,11 @@ void test_I2C_Eeprom_TestApp_runner(void)
 }
 #endif
 
-#ifdef USE_BIOS
+#ifdef RTOS_ENV
 /*
  *  ======== test function ========
  */
-void i2c_test(UArg arg0, UArg arg1)
+void i2c_test(void *arg0, void *arg1)
 #else
 int main ()
 #endif
@@ -904,7 +895,7 @@ int main ()
 
     if (Board_initI2C() == false)
     {
-#ifdef USE_BIOS
+#ifdef RTOS_ENV
         return;
 #else
         return(0);
@@ -944,53 +935,43 @@ int main ()
 #endif
 }
 
-#ifdef USE_BIOS
+#ifdef RTOS_ENV
 /*
  *  ======== main ========
  */
+
+/**< Stack for application task */
+#define APP_EEPROMREAD_TASK_STACK_SIZE  (0x8000)
+uint8_t gEepromReadAppStack[APP_EEPROMREAD_TASK_STACK_SIZE];
+
 int main(void)
 {
     I2c_appC7xPreInit();
-    
-#if defined (SOC_AM335X) || defined (SOC_AM437x) || defined (SOC_OMAPL137)
-    Task_Handle task;
-    Error_Block eb;
-
-    Error_init(&eb);
 
-    task = Task_create(i2c_test, NULL, &eb);
-    if (task == NULL) {
-        System_printf("Task_create() failed!\n");
-        BIOS_exit(0);
-    }
-#endif
+    TaskP_Handle task;
+    TaskP_Params taskParams;
 
-#if defined (SOC_J721E) || defined(SOC_J7200) || defined (SOC_AM65XX) || defined (SOC_AM64X)
-    Task_Handle task;
-    Error_Block eb;
-    Task_Params taskParams;
-
-    Error_init(&eb);
+    OS_init ();
 
     /* Initialize the task params */
-    Task_Params_init(&taskParams);
+    TaskP_Params_init(&taskParams);
 
     /* Set the task priority higher than the default priority (1) */
     taskParams.priority = 2;
-    taskParams.stackSize = 0x8000;
+    taskParams.stacksize = 0x8000;
+    taskParams.stack = (void *) gEepromReadAppStack;
 
-    task = Task_create(i2c_test, &taskParams, &eb);
+    task = TaskP_create(i2c_test, &taskParams);
     if (task == NULL) {
-        System_printf("Task_create() failed!\n");
-        BIOS_exit(0);
+        OS_stop();
+        OSAL_Assert(task == NULL);
     }
-#endif
 
-    /* Start BIOS */
-    BIOS_start();
+    /* Start RTOS */
+    OS_start();
     return (0);
 }
-#endif /* #ifdef USE_BIOS */
+#endif /* #ifdef RTOS_ENV */
 
 #if defined(BUILD_MPU) || defined (__C7100__)
 extern void Osal_initMmuDefault(void);

diff --git a/packages/ti/osal/TaskP.h b/packages/ti/osal/TaskP.h
index 72111e4122b5e3bf5a456b38357308407544110f..c588b909f5aeba06c67b597889c7ddafae214ae9 100644 (file)
--- a/packages/ti/osal/TaskP.h
+++ b/packages/ti/osal/TaskP.h
@@ -94,7 +94,7 @@ typedef struct TaskP_Params_s
     uint32_t stacksize;  /*!< The stack size of the task                  */
     void *arg0;          /*!< argument 0                                        */
     void *arg1;          /*!< argument 1                                        */
-    void *stack;         /*!< pointer to stack memory, if NULL OS will allocate internally */
+    void *stack;         /*!< pointer to stack memory, shall be non-null value */
 } TaskP_Params;
 
 /*!