]> Gitweb @ Texas Instruments - Open Source Git Repositories - git.TI.com/gitweb - processor-sdk/pdk.git/commitdiff
[QNX] Sciclient: Update to support QNX resource manager
authorPraveen Rao <prao@ti.com>
Wed, 24 Feb 2021 03:03:13 +0000 (21:03 -0600)
committerAnkur <ankurbaranwal@ti.com>
Mon, 4 Oct 2021 05:04:58 +0000 (00:04 -0500)
Signed-off-by: Praveen Rao <prao@ti.com>
packages/ti/drv/sciclient/sciclient.h
packages/ti/drv/sciclient/sciclient_component.mk
packages/ti/drv/sciclient/src/sciclient/sciclient.c
packages/ti/drv/sciclient/src/sciclient/sciclient_indirect.c
packages/ti/drv/sciclient/src/sciclient/sciclient_priv.h
packages/ti/drv/sciclient/src/sciclient/sciclient_qnx.h [new file with mode: 0644]
packages/ti/drv/sciclient/src/sciclient/sciclient_rm_irq.c
packages/ti/drv/sciclient/src/sciclient/sciclient_secureproxy.c

index be01ee75ded28e1d5fed9e5d51944d10bc4c6c70..b353e472391addfbe37ee2389a7c23e43848ee8f 100755 (executable)
@@ -585,6 +585,44 @@ int32_t Sciclient_init(const Sciclient_ConfigPrms_t *pCfgPrms);
 int32_t Sciclient_service(const Sciclient_ReqPrm_t *pReqPrm,
                           Sciclient_RespPrm_t      *pRespPrm);
 
+#ifdef QNX_OS
+/**
+ *  \brief  This API allows communicating with the System firmware which can be
+ *          called to perform various functions in the system.
+ *          Core sciclient function for transmitting payload and recieving
+ *          the response.
+ *          The caller is expected to allocate memory for the input request
+ *          parameter (Refer #Sciclient_ReqPrm_t). This involves setting the
+ *          message type being communicated to the firmware, the response flags,
+ *          populate the payload of the message based on the inputs in the
+ *          files sciclient_fmwPmMessages.h,sciclient_fmwRmMessages.h,
+ *          sciclient_fmwSecMessages.h and sciclient_fmwCommonMessages.h.
+ *          Since the payload in considered a stream of bytes in this API,
+ *          the caller should also populate the size of this stream in
+ *          reqPayloadSize. The timeout is used to determine for what amount
+ *          of iterations the API would wait for their operation to complete.
+ *
+ *          To make sure the response is captured correctly the caller should
+ *          also allocate the space for #Sciclient_RespPrm_t parameters. The
+ *          caller should populate the pointer to the pRespPayload and the size
+ *          respPayloadSize. The API would populate the response flags to
+ *          indicate any firmware specific errors and also populate the memory
+ *          pointed by pRespPayload till the size given in respPayloadSize.
+ *
+ *
+ * Requirement: DOX_REQ_TAG(PDK-2142), DOX_REQ_TAG(PDK-2141),
+ *              DOX_REQ_TAG(PDK-2140), DOX_REQ_TAG(PDK-2139)
+ *
+ *  \param pReqPrm        [IN]  Pointer to #Sciclient_ReqPrm_t
+ *  \param pRespPrm       [OUT] Pointer to #Sciclient_RespPrm_t
+ *
+ *  \return CSL_PASS on success, else failure
+ *
+ */
+int32_t Sciclient_service_rsmgr(const Sciclient_ReqPrm_t *pReqPrm,
+                          Sciclient_RespPrm_t      *pRespPrm);
+#endif
+
 /**
  *  \brief  De-initialization of sciclient. This de-initialization is specific
  *          to the application. It only de-initializes the semaphores,
index d39c1cdc06d66ce9bd0c0e88d2c0608f04b8ef23..f9b299539cf8bbeb87a3ca0798591308dacccc9b 100755 (executable)
@@ -46,6 +46,7 @@ ifeq ($(SOC),$(filter $(SOC), am65xx j721e j7200))
 sciclient_LIB_LIST += sciclient_hs
 endif
 
+ifneq ($(BUILD_OS_TYPE), qnx)
 ifeq ($(SOC),$(filter $(SOC), j721e j7200 j721s2))
 sciclient_LIB_LIST += rm_pm_hal
 sciclient_LIB_LIST += sciserver_tirtos
@@ -53,6 +54,7 @@ sciclient_LIB_LIST += sciserver_baremetal
 sciclient_LIB_LIST += sciclient_direct
 sciclient_LIB_LIST += sciclient_direct_hs
 endif
+endif
 
 drvsciclient_BOARDLIST = am65xx_evm am65xx_idk j721e_sim j721e_evm j7200_evm j721s2_evm am64x_evm
 drvsciclient_SOCLIST = am65xx j721e j7200 j721s2 am64x
@@ -62,6 +64,10 @@ drvsciclient_j7200_CORELIST = mpu1_0 mcu1_0 mcu1_1 mcu2_0 mcu2_1
 drvsciclient_j721s2_CORELIST = mpu1_0 mcu1_0 mcu1_1 mcu2_0 mcu2_1 mcu3_0 mcu3_1 c7x_1 c7x_2
 drvsciclient_am64x_CORELIST = mpu1_0 mcu1_0 mcu1_1 mcu2_0 mcu2_1 m4f_0
 drvsciclient_DISABLE_PARALLEL_MAKE = yes
+ifeq ($(BUILD_OS_TYPE), qnx)
+drvsciclient_j721e_CORELIST += qnx_mpu1_0
+drvsciclient_j7200_CORELIST += qnx_mpu1_0
+endif
 
 define DRV_SCICLIENT_RTOS_BOARDLIST_RULE
 
index a4480b34f3f33264bab561ec179aad9a429f977c..3cfbfb51be728ef563ab92dc66140e32fd46fbfb 100755 (executable)
 #include <ti/drv/sciclient/sciserver.h>
 #include <ti/osal/osal.h>
 
+#ifdef QNX_OS
+#include <ti/drv/sciclient/src/sciclient/sciclient_qnx.h>
+#include <errno.h>
+#endif
+
 /* ========================================================================== */
 /*                           Macros & Typedefs                                */
 /* ========================================================================== */
@@ -142,6 +147,63 @@ extern CSL_SecProxyCfg gSciclient_secProxyCfg;
 /*                          Function Definitions                              */
 /* ========================================================================== */
 
+#ifdef QNX_OS
+uint64_t Sciclient_qnxVirtToPhyFxn(const void *virtAddr,
+                                   void *appData)
+{
+    int ret;
+    off64_t    phyAddr = 0;
+    uint32_t   length;
+    int errno;
+
+    if(appData != NULL_PTR) {
+        length = (uint32_t) *((uint32_t *) appData);
+    }
+    else {
+        printf("%s: Must specify memory size to map\n", __func__);
+        return (-1);
+    }
+
+    /* Get destination physical address */
+    ret = mem_offset64(virtAddr, NOFD, length, &phyAddr, NULL);
+    if (ret != 0) {
+        if (errno != EAGAIN) {
+            printf("%s:Error from mem_offset - errno=%d\n", __func__, errno);
+        }
+        else if (phyAddr == NULL) {
+            printf("%s:Error from mem_offset - errno=%d and phyAddr is NULL \n", __func__, errno);
+        }
+    }
+
+    QNX_DEBUG_PRINT("%s: physical/0x%lx virtual/%p\n",__func__,phyAddr,virtAddr);
+    return (uint64_t ) phyAddr;
+}
+
+void * Sciclient_qnxPhyToVirtFxn(uint64_t phyAddr,
+                                 void *appData)
+{
+    uint64_t *temp = 0;
+    uint32_t length = 0;
+
+
+    if(appData != NULL_PTR) {
+        length = (uint32_t) *((uint32_t *) appData);
+    }
+    else {
+        printf("%s: Must specify memory size to map\n", __func__);
+        return (NULL);
+    }
+
+    temp  = mmap_device_memory(0, length, PROT_READ|PROT_WRITE|PROT_NOCACHE, 0, phyAddr);
+    if((temp == MAP_FAILED))
+    {
+        printf("%s: mmmap_device_memory failed\n",__func__);
+    }
+    QNX_DEBUG_PRINT("%s: physical/0x%lx virtual/%p\n",__func__, phyAddr, temp);
+    return ((void *) temp);
+}
+#endif
+
 int32_t Sciclient_configPrmsInit(Sciclient_ConfigPrms_t *pCfgPrms)
 {
     int32_t ret = CSL_PASS;
@@ -200,6 +262,35 @@ int32_t Sciclient_init(const Sciclient_ConfigPrms_t *pCfgPrms)
     uint32_t b_doInit = 0U;
     uint32_t rxThread;
 
+#ifdef QNX_OS
+
+    /* Check if resource manager is already running, if so, do not initialize SCI */
+    if(access("/dev/tisci",F_OK) != -1) {
+        return status;
+    }
+
+    /* If using QNX at runtime need to remap addresses to be virtual */
+    gSciclient_secProxyCfg.pSecProxyRegs     = (CSL_sec_proxyRegs *)
+        mmap_device_memory(0, CSL_NAVSS0_SEC_PROXY0_CFG_MMRS_SIZE, PROT_READ|PROT_WRITE|PROT_NOCACHE, 0, CSL_NAVSS0_SEC_PROXY0_CFG_MMRS_BASE);
+    gSciclient_secProxyCfg.pSecProxyScfgRegs = (CSL_sec_proxy_scfgRegs *)
+        mmap_device_memory(0, CSL_NAVSS0_SEC_PROXY0_CFG_SCFG_SIZE, PROT_READ|PROT_WRITE|PROT_NOCACHE, 0, CSL_NAVSS0_SEC_PROXY0_CFG_SCFG_BASE);
+    gSciclient_secProxyCfg.pSecProxyRtRegs   = (CSL_sec_proxy_rtRegs *)
+        mmap_device_memory(0, CSL_NAVSS0_SEC_PROXY0_CFG_RT_SIZE, PROT_READ|PROT_WRITE|PROT_NOCACHE, 0, CSL_NAVSS0_SEC_PROXY0_CFG_RT_BASE);
+    gSciclient_secProxyCfg.proxyTargetAddr   =  (uint64_t)
+        mmap_device_io(CSL_NAVSS0_SEC_PROXY0_SRC_TARGET_DATA_SIZE, CSL_NAVSS0_SEC_PROXY0_SRC_TARGET_DATA_BASE);
+
+    if((gSciclient_secProxyCfg.pSecProxyRegs == MAP_FAILED) ||
+      (gSciclient_secProxyCfg.pSecProxyScfgRegs == MAP_FAILED) ||
+      (gSciclient_secProxyCfg.pSecProxyRtRegs == MAP_FAILED)) {
+        printf("%s: Failed to map device memory\n",__FUNCTION__);
+        status = CSL_EBADARGS;
+    }
+    if( gSciclient_secProxyCfg.proxyTargetAddr == MAP_DEVICE_FAILED) {
+        printf("%s: Failed to map device io  memory\n",__FUNCTION__);
+        status = CSL_EBADARGS;
+    }
+#endif
+
     /* Updating gSciclientHandle.initCount is CRITICAL */
     key = HwiP_disable();
     gSciclientHandle.initCount++;
@@ -304,6 +395,9 @@ int32_t Sciclient_init(const Sciclient_ConfigPrms_t *pCfgPrms)
                     intrPrms.corepacConfig.priority = 1U;
                 }
                 #endif
+#ifdef QNX_OS
+                intrPrms.corepacConfig.intAutoEnable  = 0;
+#endif
                 /* Clear Interrupt */
                 Osal_ClearInterrupt(intrPrms.corepacConfig.corepacEventNum, intrPrms.corepacConfig.intVecNum);
                 /* Register interrupts */
@@ -365,6 +459,9 @@ int32_t Sciclient_init(const Sciclient_ConfigPrms_t *pCfgPrms)
                     intrPrms.corepacConfig.priority = 1U;
                 }
                 #endif
+#ifdef QNX_OS
+                intrPrms.corepacConfig.intAutoEnable  = 0;
+#endif
                 /* Clear Interrupt */
                 Osal_ClearInterrupt(intrPrms.corepacConfig.corepacEventNum, intrPrms.corepacConfig.intVecNum);
                 /* Register interrupts */
@@ -439,11 +536,13 @@ int32_t Sciclient_init(const Sciclient_ConfigPrms_t *pCfgPrms)
         }
 #endif
     }
+#ifndef QNX_OS
     if (status == CSL_PASS)
     {
         gSciclient_writeInProgress = 0U;
         status = Sciclient_abiCheck();
     }
+#endif
     return status;
 }
 
@@ -1049,6 +1148,7 @@ static void Sciclient_ISR(uintptr_t arg)
             #if defined (_TMS320C6X)
             Osal_DisableInterrupt((int32_t) gSciclientMap[contextId].respIntrNum, OSAL_REGINT_INTVEC_EVENT_COMBINER);
             #else
+#ifndef QNX_OS
             Osal_DisableInterrupt(0, (int32_t) gSciclientMap[contextId].respIntrNum);
             #if defined (__C7100__)
             {
@@ -1074,6 +1174,7 @@ static void Sciclient_ISR(uintptr_t arg)
             }
             Osal_ClearInterrupt(0, (int32_t) gSciclientMap[contextId].respIntrNum);
             #endif
+#endif
             #endif
         }
         else
index 24289247add469fe0ac948764a5aae38cf7b1016..3c4bef733da484fdb1b58d17543ce44fa0444dce 100644 (file)
 #include <ti/drv/sciclient/src/sciclient/sciclient_priv.h>
 #include <ti/drv/sciclient/sciserver.h>
 
+#ifdef QNX_OS
+#include <ti/drv/sciclient/src/sciclient/sciclient_qnx.h>
+#endif
+
 /* ========================================================================== */
 /*                           Macros & Typedefs                                */
 /* ========================================================================== */
 int32_t Sciclient_service (const Sciclient_ReqPrm_t *pReqPrm,
                            Sciclient_RespPrm_t      *pRespPrm)
 {
+#ifdef QNX_OS
+    /* Inserting a resource manager layer, to serialize communication, between
+     * multiple processes running on multiple cores,
+     */
+    int     fd;
+    int32_t status       = CSL_PASS;
+    char    *devname = "/dev/tisci";
+    iov_t   siov[1], riov[1];
+    int rc = EOK;
+
+    /* Open up resource manager */
+    fd = open(devname, O_RDWR);
+    if (fd < 0) {
+        fprintf(stderr, "open(%s): %s\n", devname, strerror(errno));
+        status = CSL_EFAIL;
+        return status;
+    }
+
+    /* Copy user buffers into a local copy, TODO should not be necessary */
+    tisci_msg_t tisci_msg;
+
+
+    /* Fill out request */
+    uint64_t reqPhyPayloadPtr = 0;
+    if((pReqPrm->pReqPayload != 0) && (pReqPrm->reqPayloadSize != 0)){
+        //printf("%s: translate request\n",__func__);
+        reqPhyPayloadPtr = Sciclient_qnxVirtToPhyFxn((uint64_t *) pReqPrm->pReqPayload, (void *)&pReqPrm->reqPayloadSize);
+    }
+    tisci_msg.reqPrm.messageType = pReqPrm->messageType;
+    tisci_msg.reqPrm.flags       = pReqPrm->flags;
+    tisci_msg.reqPrm.pReqPayload = (uint8_t *) reqPhyPayloadPtr;
+    tisci_msg.reqPrm.reqPayloadSize = pReqPrm->reqPayloadSize;
+    tisci_msg.reqPrm.timeout = pReqPrm->timeout;
+
+
+    /* Define expected response */
+    uint64_t responsePayloadPhyPtr = 0;
+    if((pRespPrm->pRespPayload != 0) && (pRespPrm->respPayloadSize != 0)){
+        //printf("%s: translate response\n",__func__);
+        responsePayloadPhyPtr = Sciclient_qnxVirtToPhyFxn((uint64_t *) pRespPrm->pRespPayload, (void *)&pReqPrm->reqPayloadSize);
+    }
+    tisci_msg.respPrm.flags = pRespPrm->flags;
+    tisci_msg.respPrm.pRespPayload = (uint8_t *) responsePayloadPhyPtr;
+    tisci_msg.respPrm.respPayloadSize =  pRespPrm->respPayloadSize;
+
+    /* Get message ready to send */
+    SETIOV(&siov[0], &tisci_msg, sizeof(tisci_msg_t));
+    SETIOV(&riov[0], &tisci_msg, sizeof(tisci_msg_t));
+
+    /*  Send message to /dev/tisci */
+    if ((rc = devctlv(fd, DCMD_TISCI_MESSAGE, 1, 1, siov, riov, NULL)) != EOK) {
+        fprintf(stderr, "devctl failed:%d errno/%d rc/%d\n", status, errno, rc);
+        status = CSL_EFAIL;
+        if(fd > 0) {
+            close(fd);
+        }
+    }
+
+    /* Flags parameter not getting set sometimes, ensure the response to user has correct flags value  */
+    QNX_DEBUG_PRINT("%s: tisci_msg.respPrm.flags = 0x%08x\n",__func__,tisci_msg.respPrm.flags);
+    QNX_DEBUG_PRINT("%s: pRespPrm->flags = 0x%08x\n",__func__,pRespPrm->flags);
+    pRespPrm->flags = tisci_msg.respPrm.flags;
+    QNX_DEBUG_PRINT("%s: pRespPrm->flags = 0x%08x\n",__func__,pRespPrm->flags);
+
+    /* Close fd */
+    // TODO: keep fd open to save time
+    if(fd > 0) {
+        close(fd);
+    }
+
+    return status;
+}
+
+
+int32_t Sciclient_service_rsmgr(const Sciclient_ReqPrm_t *pReqPrm,
+                                Sciclient_RespPrm_t      *pRespPrm)
+{
+#endif
     uint8_t *fwdStatus = (uint8_t *)&pReqPrm->forwardStatus;
     /*
      * Never forward messages for this build. Set this flag explicitly to
index 798d2731be7e154f23cac230e49812c93038fc43..1abf759a872f505bf32cd17a7ce76f41a05f019b 100755 (executable)
@@ -233,7 +233,11 @@ uint32_t Sciclient_getCurrentContext(uint16_t messageType);
  *
  *  \return  address   address of the thread status
  */
+#ifdef QNX_OS
+uintptr_t Sciclient_threadStatusReg(uint32_t thread);
+#else
 uint32_t Sciclient_threadStatusReg(uint32_t thread);
+#endif
 
 /**
  *  \brief   Read a 32 bit word from the thread.
diff --git a/packages/ti/drv/sciclient/src/sciclient/sciclient_qnx.h b/packages/ti/drv/sciclient/src/sciclient/sciclient_qnx.h
new file mode 100644 (file)
index 0000000..601e76c
--- /dev/null
@@ -0,0 +1,101 @@
+/*
+ *  Copyright (C) 2018-2020 Texas Instruments Incorporated
+ *
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions
+ *  are met:
+ *
+ *    Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *
+ *    Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the
+ *    distribution.
+ *
+ *    Neither the name of Texas Instruments Incorporated nor the names of
+ *    its contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ *  \file sciclient_qnx.h
+ *
+ *  \brief This file contains QNX specifics used internally by sciclient.
+ */
+#ifndef SCICLIENT_QNX_H_
+#define SCICLIENT_QNX_H_
+
+/* ========================================================================== */
+/*                             Include Files                                  */
+/* ========================================================================== */
+
+#include <sys/mman.h>
+#include <unistd.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <stdbool.h>
+#include <unistd.h>
+#include <sys/resmgr.h>
+#include <sys/neutrino.h>
+#include <errno.h>
+#include <sys/procmgr.h>
+#include <drvr/hwinfo.h>
+#include <string.h>
+#include <fcntl.h>
+#include <sys/mman.h>
+#include <sys/types.h>
+#include <devctl.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* ========================================================================== */
+/*                           Macros & Typedefs                                */
+/* ========================================================================== */
+
+#define QNX_DEBUG_PRINT(f_, ...)
+
+/* ========================================================================== */
+/*                         Structure Declarations                             */
+/* ========================================================================== */
+
+typedef struct
+{
+    Sciclient_ReqPrm_t  reqPrm;
+    Sciclient_RespPrm_t respPrm;
+} tisci_msg_t;
+
+#define DCMD_TISCI_MESSAGE              __DIOTF(_DCMD_MISC, 0, tisci_msg_t)  // MISC???
+
+
+/* ========================================================================== */
+/*                          Function Declarations                             */
+/* ========================================================================== */
+
+uint64_t Sciclient_qnxVirtToPhyFxn(const void *virtAddr,
+                                   void *appData);
+
+void * Sciclient_qnxPhyToVirtFxn(uint64_t phyAddr,
+                                void *appData);
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* #ifndef SCICLIENT_QNX_H_*/
index 3fafbcbef78bf3fc5a6efec0f4178b7eb77a01a4..ab41aa610de5281dad0e71a3876929d99c0a7fb4 100755 (executable)
 #include <ti/csl/csl_intaggr.h>
 #include <ti/csl/csl_intr_router.h>
 
+#ifdef QNX_OS
+#include <sys/mman.h>
+#include <sys/neutrino.h>
+#endif
+
 /* ========================================================================== */
 /*                           Macros & Typedefs                                */
 /* ========================================================================== */
@@ -2531,7 +2536,9 @@ static int32_t Sciclient_rmIaValidateEvt(const struct Sciclient_rmIaInst    *ins
 #else
         entry_int_map_lo = (volatile uint32_t *)(inst->imap + SCICLIENT_IA_ENTRY_INTMAP_LO(evt));
 #endif
-
+#ifdef QNX_OS
+        entry_int_map_lo = ((uint32_t *) mmap_device_memory(0, sizeof(uint32_t), PROT_READ|PROT_WRITE|PROT_NOCACHE, 0, (uint64_t)entry_int_map_lo));
+#endif
         if (in_use == true) {
             /* Check if event is in use */
             reg_vint = CSL_REG32_FEXT(entry_int_map_lo,
@@ -2568,6 +2575,9 @@ static int32_t Sciclient_rmIaValidateEvt(const struct Sciclient_rmIaInst    *ins
                 r = CSL_EBADARGS;
             }
         }
+ #ifdef QNX_OS
+        munmap_device_memory((void *)entry_int_map_lo, sizeof(uint32_t));
+ #endif
     }
 
     return r;
@@ -2633,11 +2643,17 @@ static int32_t Sciclient_rmIaValidateMapping(uint8_t   host,
         entry_int_map_lo = (volatile uint32_t *)(inst->imap + SCICLIENT_IA_ENTRY_INTMAP_LO(evt));
 #endif
 
+#ifdef QNX_OS
+        entry_int_map_lo = ((uint32_t *) mmap_device_memory(0, sizeof(uint32_t), PROT_READ|PROT_WRITE|PROT_NOCACHE, 0, (uint64_t)entry_int_map_lo));
+#endif
         /* Check if event is in use */
         reg_vint = CSL_REG32_FEXT(entry_int_map_lo,
                                   INTAGGR_IMAP_GEVI_IMAP_REGNUM);
         reg_sb = CSL_REG32_FEXT(entry_int_map_lo,
                                 INTAGGR_IMAP_GEVI_IMAP_BITNUM);
+ #ifdef QNX_OS
+        munmap_device_memory((void *)entry_int_map_lo, sizeof(uint32_t));
+ #endif
         if ((reg_vint == 0u) && (reg_sb == 0u)) {
             /*
              * INTMAP register's default value is zero which signifies VINT 0
@@ -2771,8 +2787,14 @@ static int32_t Sciclient_rmIrInpIsFree(uint16_t id,
              */
             for (i = 0u; i < inst->n_outp; i++) {
                 int_ctrl_reg = (volatile uint32_t *)Sciclient_getIrAddr(inst->cfg, i);
+ #ifdef QNX_OS
+                int_ctrl_reg = ((uint32_t *) mmap_device_memory(0, sizeof(uint32_t), PROT_READ|PROT_WRITE|PROT_NOCACHE, 0, (uint64_t)int_ctrl_reg));
+ #endif
                 extracted_inp = CSL_REG32_FEXT(int_ctrl_reg,
                                                INTR_ROUTER_CFG_MUXCNTL_ENABLE);
+ #ifdef QNX_OS
+                munmap_device_memory((void *)int_ctrl_reg, sizeof(uint32_t));
+ #endif
                 /*
                  * Do not return as in use if input is mapped by ROM.  SYSFW will
                  * clear the mapping when it receives the request to configure
@@ -2832,8 +2854,14 @@ static int32_t Sciclient_rmIrOutpIsFree(uint16_t    id,
 
     if (r == CSL_PASS) {
         int_ctrl_reg = (volatile uint32_t *) Sciclient_getIrAddr (inst->cfg, outp);
+ #ifdef QNX_OS
+        int_ctrl_reg = ((uint32_t *) mmap_device_memory(0, sizeof(uint32_t), PROT_READ|PROT_WRITE|PROT_NOCACHE, 0, (uint64_t)int_ctrl_reg));
+ #endif
         extracted_inp = CSL_REG32_FEXT(int_ctrl_reg,
                                        INTR_ROUTER_CFG_MUXCNTL_ENABLE);
+ #ifdef QNX_OS
+        munmap_device_memory((void *)int_ctrl_reg, sizeof(uint32_t));
+ #endif
         /*
          * Do not return as in use if output is mapped by ROM.  SYSFW will
          * clear the mapping when it receives the request to configure
@@ -2896,8 +2924,14 @@ static int32_t Sciclient_rmIrGetOutp(uint16_t   id,
          */
         for (i = 0u; i < inst->n_outp; i++) {
             int_ctrl_reg = (volatile uint32_t *) Sciclient_getIrAddr (inst->cfg, i);
+#ifdef QNX_OS
+            int_ctrl_reg = ((uint32_t *) mmap_device_memory(0, sizeof(uint32_t), PROT_READ|PROT_WRITE|PROT_NOCACHE, 0, (uint64_t)int_ctrl_reg));
+#endif
             extracted_inp = CSL_REG32_FEXT(int_ctrl_reg,
                                            INTR_ROUTER_CFG_MUXCNTL_ENABLE);
+#ifdef QNX_OS
+            munmap_device_memory((void *)int_ctrl_reg, sizeof(uint32_t));
+#endif
             if (inp == extracted_inp) {
                 *outp = i;
                 r = CSL_PASS;
index e8d66986bd94cf82a863dd6aea50435316feb645..ed2b55469d77d41d5b587b5b1135f86955ea4bf4 100644 (file)
@@ -83,11 +83,19 @@ extern CSL_SecProxyCfg gSciclient_secProxyCfg;
 /*                          Function Definitions                              */
 /* ========================================================================== */
 
+#ifdef QNX_OS
+uintptr_t Sciclient_threadStatusReg(uint32_t thread)
+{
+    return ((uintptr_t)(gSciclient_secProxyCfg.pSecProxyRtRegs) +
+        CSL_SEC_PROXY_RT_THREAD_STATUS(thread));
+}
+#else
 uint32_t Sciclient_threadStatusReg(uint32_t thread)
 {
     return ((uint32_t)(uintptr_t)(gSciclient_secProxyCfg.pSecProxyRtRegs) +
         CSL_SEC_PROXY_RT_THREAD_STATUS(thread));
 }
+#endif
 
 uint32_t Sciclient_readThread32(uint32_t thread, uint8_t idx)
 {