summary | shortlog | log | commit | commitdiff | tree
raw | patch | inline | side by side (parent: 0c9fa80)
raw | patch | inline | side by side (parent: 0c9fa80)
author | Justin Sobota <jsobota@ti.com> | |
Wed, 21 Oct 2020 17:53:43 +0000 (13:53 -0400) | ||
committer | Sivaraj R <sivaraj@ti.com> | |
Thu, 29 Oct 2020 14:01:51 +0000 (09:01 -0500) |
For HSM case, the RM board configuration must be sent
to TIFS on the M3 then to DM running locally on the
MCU R5F. Update sciclient_direct.c to route the RM
board configuration properly.
Signed-off-by: Justin Sobota <jsobota@ti.com>
to TIFS on the M3 then to DM running locally on the
MCU R5F. Update sciclient_direct.c to route the RM
board configuration properly.
Signed-off-by: Justin Sobota <jsobota@ti.com>
diff --git a/packages/ti/drv/sciclient/soc/V0/sciclient_fmwMsgParams.h b/packages/ti/drv/sciclient/soc/V0/sciclient_fmwMsgParams.h
index c4c57d850699c38ba13beae20fdafd706d74cac1..c6b5d56a56d8c33ff2685a6f13ca25f78b00dbb2 100755 (executable)
/* ========================================================================== */
#include <stdint.h>
+#include <ti/csl/soc.h>
#ifdef __cplusplus
extern "C" {
#define SCICLIENT_DEV_MCU_R5FSS0_CORE1_PROCID (SCICLIENT_PROCID_R5_CL0_C1)
/* @} */
+/** Board config Base start address */
+#define SCICLIENT_ALLOWED_BOARDCFG_BASE_START (CSL_MCU_MSRAM0_RAM_BASE)
+/** Board config Base end address */
+#define SCICLIENT_ALLOWED_BOARDCFG_BASE_END (CSL_MCU_MSRAM0_RAM_BASE + CSL_MCU_MSRAM0_RAM_SIZE)
+
/* ========================================================================== */
/* Structure Declarations */
/* ========================================================================== */
diff --git a/packages/ti/drv/sciclient/soc/V1/sciclient_fmwMsgParams.h b/packages/ti/drv/sciclient/soc/V1/sciclient_fmwMsgParams.h
index ecdaf384b837641ad09852527c06a77c1a8b3937..f2c64b6b754be35d8155fd7d2f4f79736b07b4af 100644 (file)
/* ========================================================================== */
#include <stdint.h>
+#include <ti/csl/soc.h>
#ifdef __cplusplus
extern "C" {
(SCICLIENT_PROC_ID_MCU_R5FSS0_CORE1)
/* @} */
+/** Board config Base start address */
+#define SCICLIENT_ALLOWED_BOARDCFG_BASE_START (CSL_MCU_MSRAM_1MB0_RAM_BASE)
+/** Board config Base end address */
+#define SCICLIENT_ALLOWED_BOARDCFG_BASE_END (CSL_MCU_MSRAM_1MB0_RAM_BASE + CSL_MCU_MSRAM_1MB0_RAM_SIZE)
+
/* ========================================================================== */
/* Structure Declarations */
/* ========================================================================== */
diff --git a/packages/ti/drv/sciclient/soc/V2/sciclient_fmwMsgParams.h b/packages/ti/drv/sciclient/soc/V2/sciclient_fmwMsgParams.h
index a1c142db6e0a292cf914d595c758e7caa7864879..b4e4b37694c5a54383e256d669f77404bf83879b 100755 (executable)
/* ========================================================================== */
#include <stdint.h>
+#include <ti/csl/soc.h>
#ifdef __cplusplus
extern "C" {
(SCICLIENT_PROC_ID_MCU_R5FSS0_CORE1)
/* @} */
+/** Board config Base start address */
+#define SCICLIENT_ALLOWED_BOARDCFG_BASE_START (CSL_MCU_MSRAM_1MB0_RAM_BASE)
+/** Board config Base end address */
+#define SCICLIENT_ALLOWED_BOARDCFG_BASE_END (CSL_MCU_MSRAM_1MB0_RAM_BASE + CSL_MCU_MSRAM_1MB0_RAM_SIZE)
+
/* ========================================================================== */
/* Structure Declarations */
/* ========================================================================== */
diff --git a/packages/ti/drv/sciclient/soc/V3/sciclient_fmwMsgParams.h b/packages/ti/drv/sciclient/soc/V3/sciclient_fmwMsgParams.h
index 7a5f163ab36bab8d1ecde45588f4a7e3a47fc155..07d485f69bbaa97b5d67723bf0307a80ae3b565e 100755 (executable)
/* ========================================================================== */
#include <stdint.h>
+#include <ti/csl/soc.h>
#ifdef __cplusplus
extern "C" {
(SCICLIENT_PROCID_R5_CL0_C1)
/* @} */
+/** Board config Base start address */
+#define SCICLIENT_ALLOWED_BOARDCFG_BASE_START (CSL_MSRAM_256K0_RAM_BASE)
+/** Board config Base end address */
+#define SCICLIENT_ALLOWED_BOARDCFG_BASE_END (CSL_MSRAM_256K0_RAM_BASE + CSL_MSRAM_256K0_RAM_SIZE * 8UL)
+
/* ========================================================================== */
/* Structure Declarations */
/* ========================================================================== */
diff --git a/packages/ti/drv/sciclient/src/sciclient/sciclient.c b/packages/ti/drv/sciclient/src/sciclient/sciclient.c
index 7779178b0da3539f7e0749aeb273ccaa3d31d53c..1a16243c984c33c9f630165d926b6f43a334f39e 100644 (file)
/** Indicate that this message is marked secure */
#define TISCI_MSG_FLAG_MASK (TISCI_BIT(0) | TISCI_BIT(1))
+#define SCICLIENT_COMMON_X509_HEADER_ADDR (0x41cffb00)
+
/* ========================================================================== */
/* Structure Declarations */
/* ========================================================================== */
ret = Sciclient_getDefaultBoardCfgInfo(&boardCfgInfo);
if (ret == CSL_PASS)
{
- pCfgPrms->inPmPrms.boardConfigLow = (uintptr_t)boardCfgInfo.boardCfgLowPm;
- pCfgPrms->inPmPrms.boardConfigHigh = 0U;
- pCfgPrms->inPmPrms.boardConfigSize = boardCfgInfo.boardCfgLowPmSize;
- pCfgPrms->inPmPrms.devGrp = DEVGRP_ALL;
-
- pCfgPrms->inRmPrms.boardConfigLow = (uintptr_t)boardCfgInfo.boardCfgLowRm;
- pCfgPrms->inRmPrms.boardConfigHigh = 0U;
- pCfgPrms->inRmPrms.boardConfigSize = boardCfgInfo.boardCfgLowRmSize;
- pCfgPrms->inRmPrms.devGrp = DEVGRP_ALL;
+ if (((uint64_t)boardCfgInfo.boardCfgLowPm >= SCICLIENT_ALLOWED_BOARDCFG_BASE_START) &&
+ ((uint64_t)boardCfgInfo.boardCfgLowPm < SCICLIENT_ALLOWED_BOARDCFG_BASE_END) &&
+ ((uint64_t)boardCfgInfo.boardCfgLowRm >= SCICLIENT_ALLOWED_BOARDCFG_BASE_START) &&
+ ((uint64_t)boardCfgInfo.boardCfgLowRm < SCICLIENT_ALLOWED_BOARDCFG_BASE_END))
+ {
+ pCfgPrms->inPmPrms.boardConfigLow = (uintptr_t)boardCfgInfo.boardCfgLowPm;
+ pCfgPrms->inPmPrms.boardConfigHigh = 0U;
+ pCfgPrms->inPmPrms.boardConfigSize = boardCfgInfo.boardCfgLowPmSize;
+ pCfgPrms->inPmPrms.devGrp = DEVGRP_ALL;
+
+ pCfgPrms->inRmPrms.boardConfigLow = (uintptr_t)boardCfgInfo.boardCfgLowRm;
+ pCfgPrms->inRmPrms.boardConfigHigh = 0U;
+ pCfgPrms->inRmPrms.boardConfigSize = boardCfgInfo.boardCfgLowRmSize;
+ pCfgPrms->inRmPrms.devGrp = DEVGRP_ALL;
+ }
+ else
+ {
+ ret = Sciclient_boardCfgParseHeader(
+ (uint8_t *) SCICLIENT_COMMON_X509_HEADER_ADDR,
+ &pCfgPrms->inPmPrms, &pCfgPrms->inRmPrms);
+ }
}
#endif
pCfgPrms->opModeFlag = SCICLIENT_SERVICE_OPERATION_MODE_POLLED;
diff --git a/packages/ti/drv/sciclient/src/sciclient/sciclient_direct.c b/packages/ti/drv/sciclient/src/sciclient/sciclient_direct.c
index 8e4bc8baa13b97fb203443f70d5baa5682d39d3b..9fca8dc0a705e28137663d0c580cd63b5e6734e0 100644 (file)
pRespPrm->flags = hdr->flags;
break;
/* RM messages processed solely by RM within DM on MCU R5F */
- case TISCI_MSG_BOARD_CONFIG_RM:
case TISCI_MSG_RM_GET_RESOURCE_RANGE:
case TISCI_MSG_RM_IRQ_RELEASE:
case TISCI_MSG_RM_UDMAP_FLOW_CFG:
* setting the forward status prior to calling this function.
*/
ret = Sciclient_serviceSecureProxy(pReqPrm, pRespPrm);
+ break;
}
}
diff --git a/packages/ti/drv/sciclient/tools/ccsLoadDmsc/j7200/launch.js b/packages/ti/drv/sciclient/tools/ccsLoadDmsc/j7200/launch.js
index 67d676d1548e43aba4a17b9e0895a267d75e0e27..c134039f3561926bb5f1e8b054fb944d914d06ea 100755 (executable)
sciserver_elf_file = pathSciclient+"sciserver_testapp_mcu1_0_release.xer5f";
//path to sysfw bin
-sysfw_bin = pdkPath+"/packages/ti/drv/sciclient/soc/sysfw/binaries/ti-sci-firmware-j7200-gp.bin"
+sysfw_bin = pdkPath+"/packages/ti/drv/sciclient/soc/sysfw/binaries/ti-fs-firmware-j7200-gp.bin"
//<!!!!!! EDIT THIS !!!!!>
diff --git a/packages/ti/drv/sciclient/tools/ccsLoadDmsc/j721e/launch.js b/packages/ti/drv/sciclient/tools/ccsLoadDmsc/j721e/launch.js
index 81330a798e7bbf10d13c2cc433f80bcb8f27619f..cba02648805740d740a6c3d2312dd0254c24fec3 100755 (executable)
sciserver_elf_file = pathSciclient+"sciserver_testapp_mcu1_0_release.xer5f";
//path to sysfw bin
-sysfw_bin = pdkPath+"/packages/ti/drv/sciclient/soc/sysfw/binaries/ti-sci-firmware-j721e-gp-no-pm-rm.bin"
+sysfw_bin = pdkPath+"/packages/ti/drv/sciclient/soc/sysfw/binaries/ti-fs-firmware-j721e-gp.bin"
//<!!!!!! EDIT THIS !!!!!>