summary | shortlog | log | commit | commitdiff | tree
raw | patch | inline | side by side (parent: ec7055a)
raw | patch | inline | side by side (parent: ec7055a)
author | M V Pratap Reddy <x0257344@ti.com> | |
Wed, 25 Nov 2020 23:16:24 +0000 (04:46 +0530) | ||
committer | Vishal Mahaveer <vishalm@ti.com> | |
Thu, 26 Nov 2020 00:00:36 +0000 (18:00 -0600) |
- Enabled Rx active for FSI-Rx lines
- Corrected Board_pinmuxSetReg for proper register offset access
- Corrected Board_pinmuxSetReg for proper register offset access
packages/ti/board/src/am64x_evm/AM64x_pinmux_data.c | patch | blob | history | |
packages/ti/board/src/am64x_evm/board_pinmux.c | patch | blob | history |
diff --git a/packages/ti/board/src/am64x_evm/AM64x_pinmux_data.c b/packages/ti/board/src/am64x_evm/AM64x_pinmux_data.c
index 002e4512df8043bfffd40efa617d5d901e6ada29..d6d4d14939679f357d61d28e38329558ef4846a6 100755 (executable)
/* MyFSI_RX1 -> FSI_RX0_CLK -> V19 */\r
{\r
PIN_GPMC0_AD8, PIN_MODE(1) | \\r
- ((PIN_PULL_DISABLE) & (~PIN_PULL_DIRECTION & ~PIN_INPUT_ENABLE))\r
+ ((PIN_PULL_DISABLE | PIN_INPUT_ENABLE) & (~PIN_PULL_DIRECTION))\r
},\r
/* MyFSI_RX1 -> FSI_RX0_D0 -> T17 */\r
{\r
PIN_GPMC0_AD9, PIN_MODE(1) | \\r
- ((PIN_PULL_DISABLE) & (~PIN_PULL_DIRECTION & ~PIN_INPUT_ENABLE))\r
+ ((PIN_PULL_DISABLE | PIN_INPUT_ENABLE) & (~PIN_PULL_DIRECTION))\r
},\r
/* MyFSI_RX1 -> FSI_RX0_D1 -> R16 */\r
{\r
PIN_GPMC0_AD10, PIN_MODE(1) | \\r
- ((PIN_PULL_DISABLE) & (~PIN_PULL_DIRECTION & ~PIN_INPUT_ENABLE))\r
+ ((PIN_PULL_DISABLE | PIN_INPUT_ENABLE) & (~PIN_PULL_DIRECTION))\r
},\r
{PINMUX_END}\r
};\r
diff --git a/packages/ti/board/src/am64x_evm/board_pinmux.c b/packages/ti/board/src/am64x_evm/board_pinmux.c
index 09d466e6448bd5b0d7a65fd0a412aaf1e89a125a..c290da5a18e0fe13dc37e41bdca36e03fe11af11 100644 (file)
baseAddr = Board_pinmuxGetBaseAddr(domain);\r
if(baseAddr != 0)\r
{\r
- HW_WR_REG32(baseAddr, muxData);\r
+ HW_WR_REG32((baseAddr + offset), muxData);\r
}\r
else\r
{\r