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raw | patch | inline | side by side (parent: 9fab09f)
raw | patch | inline | side by side (parent: 9fab09f)
| author | Don Dominic <a0486429@ti.com> | |
| Thu, 9 Jul 2020 05:23:08 +0000 (10:53 +0530) | ||
| committer | Don Dominic <a0486429@ti.com> | |
| Thu, 9 Jul 2020 05:23:08 +0000 (10:53 +0530) |
diff --git a/packages/ti/drv/udma/unit_test/udma_ut/src/soc/am64x/udma_test_soc.c b/packages/ti/drv/udma/unit_test/udma_ut/src/soc/am64x/udma_test_soc.c
index 289f04b684bd74fcca7486e774373b39dafaeec8..40f92a445cc5a6cd530a2fb496882f2a5f4911a3 100644 (file)
return (retVal);
}
-
-void UdmaTestRmInitPrmsMapped_init(Udma_InitPrms *initPrms)
-{
- /* Assign start of Mapped TX Channels */
- initPrms->rmInitPrms.startMappedTxCh[UDMA_MAPPED_TX_GROUP_CPSW] = CSL_DMSS_PKTDMA_TX_CHANS_CPSW_START;
- initPrms->rmInitPrms.startMappedTxCh[UDMA_MAPPED_TX_GROUP_SAUL] = CSL_DMSS_PKTDMA_TX_CHANS_SAUL0_START;
- initPrms->rmInitPrms.startMappedTxCh[UDMA_MAPPED_TX_GROUP_ICSSG_0] = CSL_DMSS_PKTDMA_TX_CHANS_ICSSG0_START;
- initPrms->rmInitPrms.startMappedTxCh[UDMA_MAPPED_TX_GROUP_ICSSG_1] = CSL_DMSS_PKTDMA_TX_CHANS_ICSSG1_START;
-
- /* Assign num of Mapped TX Channels */
- initPrms->rmInitPrms.numMappedTxCh[UDMA_MAPPED_TX_GROUP_CPSW] = CSL_DMSS_PKTDMA_TX_CHANS_CPSW_CNT;
- initPrms->rmInitPrms.numMappedTxCh[UDMA_MAPPED_TX_GROUP_SAUL] = CSL_DMSS_PKTDMA_TX_CHANS_SAUL0_CNT +
- CSL_DMSS_PKTDMA_TX_CHANS_SAUL1_CNT;
- initPrms->rmInitPrms.numMappedTxCh[UDMA_MAPPED_TX_GROUP_ICSSG_0] = CSL_DMSS_PKTDMA_TX_CHANS_ICSSG0_CNT;
- initPrms->rmInitPrms.numMappedTxCh[UDMA_MAPPED_TX_GROUP_ICSSG_1] = CSL_DMSS_PKTDMA_TX_CHANS_ICSSG1_CNT;
-
- /* Assign start of Mapped RX Channels */
- initPrms->rmInitPrms.startMappedRxCh[UDMA_MAPPED_RX_GROUP_CPSW- UDMA_NUM_MAPPED_TX_GROUP] = CSL_DMSS_PKTDMA_RX_CHANS_CPSW_START;
- initPrms->rmInitPrms.startMappedRxCh[UDMA_MAPPED_RX_GROUP_SAUL- UDMA_NUM_MAPPED_TX_GROUP] = CSL_DMSS_PKTDMA_RX_CHANS_SAUL0_START;
- initPrms->rmInitPrms.startMappedRxCh[UDMA_MAPPED_RX_GROUP_ICSSG_0- UDMA_NUM_MAPPED_TX_GROUP] = CSL_DMSS_PKTDMA_RX_CHANS_ICSSG0_START;
- initPrms->rmInitPrms.startMappedRxCh[UDMA_MAPPED_RX_GROUP_ICSSG_1- UDMA_NUM_MAPPED_TX_GROUP] = CSL_DMSS_PKTDMA_RX_CHANS_ICSSG1_START;
-
- /* Assign num of Mapped RX Channels */
- initPrms->rmInitPrms.numMappedRxCh[UDMA_MAPPED_RX_GROUP_CPSW- UDMA_NUM_MAPPED_TX_GROUP] = CSL_DMSS_PKTDMA_RX_CHANS_CPSW_CNT;
- initPrms->rmInitPrms.numMappedRxCh[UDMA_MAPPED_RX_GROUP_SAUL- UDMA_NUM_MAPPED_TX_GROUP] = CSL_DMSS_PKTDMA_RX_CHANS_SAUL0_CNT + CSL_DMSS_PKTDMA_RX_CHANS_SAUL1_CNT +
- CSL_DMSS_PKTDMA_RX_CHANS_SAUL2_CNT + CSL_DMSS_PKTDMA_RX_CHANS_SAUL3_CNT;
- initPrms->rmInitPrms.numMappedRxCh[UDMA_MAPPED_RX_GROUP_ICSSG_0- UDMA_NUM_MAPPED_TX_GROUP] = CSL_DMSS_PKTDMA_RX_CHANS_ICSSG0_CNT;
- initPrms->rmInitPrms.numMappedRxCh[UDMA_MAPPED_RX_GROUP_ICSSG_1- UDMA_NUM_MAPPED_TX_GROUP] = CSL_DMSS_PKTDMA_RX_CHANS_ICSSG1_CNT;
-
- /* Assign start of Mapped Rings */
- initPrms->rmInitPrms.startMappedRing[UDMA_MAPPED_TX_GROUP_CPSW] = CSL_DMSS_PKTDMA_TX_FLOWS_CPSW_START;
- initPrms->rmInitPrms.startMappedRing[UDMA_MAPPED_TX_GROUP_SAUL] = CSL_DMSS_PKTDMA_TX_FLOWS_SAUL0_START;
- initPrms->rmInitPrms.startMappedRing[UDMA_MAPPED_TX_GROUP_ICSSG_0] = CSL_DMSS_PKTDMA_TX_FLOWS_ICSSG0_START;
- initPrms->rmInitPrms.startMappedRing[UDMA_MAPPED_TX_GROUP_ICSSG_1] = CSL_DMSS_PKTDMA_TX_FLOWS_ICSSG1_START;
- initPrms->rmInitPrms.startMappedRing[UDMA_MAPPED_RX_GROUP_CPSW] = CSL_DMSS_PKTDMA_RX_FLOWS_CPSW_START;
- initPrms->rmInitPrms.startMappedRing[UDMA_MAPPED_RX_GROUP_SAUL] = CSL_DMSS_PKTDMA_RX_FLOWS_SAUL0_START;
- initPrms->rmInitPrms.startMappedRing[UDMA_MAPPED_RX_GROUP_ICSSG_0] = CSL_DMSS_PKTDMA_RX_FLOWS_ICSSG0_START;
- initPrms->rmInitPrms.startMappedRing[UDMA_MAPPED_RX_GROUP_ICSSG_1] = CSL_DMSS_PKTDMA_RX_FLOWS_ICSSG1_START;
-
- /* Assign num of Mapped Rings */
- initPrms->rmInitPrms.numMappedRing[UDMA_MAPPED_TX_GROUP_CPSW] = CSL_DMSS_PKTDMA_TX_FLOWS_CPSW_CNT;
- initPrms->rmInitPrms.numMappedRing[UDMA_MAPPED_TX_GROUP_SAUL] = CSL_DMSS_PKTDMA_TX_FLOWS_SAUL0_CNT + CSL_DMSS_PKTDMA_TX_FLOWS_SAUL1_CNT;
- initPrms->rmInitPrms.numMappedRing[UDMA_MAPPED_TX_GROUP_ICSSG_0] = CSL_DMSS_PKTDMA_TX_FLOWS_ICSSG0_CNT;
- initPrms->rmInitPrms.numMappedRing[UDMA_MAPPED_TX_GROUP_ICSSG_1] = CSL_DMSS_PKTDMA_TX_FLOWS_ICSSG1_CNT;
- initPrms->rmInitPrms.numMappedRing[UDMA_MAPPED_RX_GROUP_CPSW] = CSL_DMSS_PKTDMA_RX_FLOWS_CPSW_CNT;
- initPrms->rmInitPrms.numMappedRing[UDMA_MAPPED_RX_GROUP_SAUL] = CSL_DMSS_PKTDMA_RX_FLOWS_SAUL0_CNT + CSL_DMSS_PKTDMA_RX_FLOWS_SAUL2_CNT; /* SAUL1 RX flows are shared with SAUL0; And SAUL3 RX flows are shared with SAUL2 */
- initPrms->rmInitPrms.numMappedRing[UDMA_MAPPED_RX_GROUP_ICSSG_0] = CSL_DMSS_PKTDMA_RX_FLOWS_ICSSG0_CNT;
- initPrms->rmInitPrms.numMappedRing[UDMA_MAPPED_RX_GROUP_ICSSG_1] = CSL_DMSS_PKTDMA_RX_FLOWS_ICSSG1_CNT;
-}
-
diff --git a/packages/ti/drv/udma/unit_test/udma_ut/src/soc/am64x/udma_test_soc.h b/packages/ti/drv/udma/unit_test/udma_ut/src/soc/am64x/udma_test_soc.h
index 4e4247b901ca96e08b378688698bf489a6c1f019..712a6ba9f0e6f6e0ebbe2289c6155027f869e6ca 100644 (file)
#define UDMA_TEST_DEFAULT_UDMA_INST (UDMA_INST_ID_PKTDMA_0)
*/
-#define UDMA_TEST_INST_ID_FLOW (UDMA_INST_ID_PKTDMA_0)
-
#define UDMA_TEST_RF_SOC (UDMA_TEST_RF_SOC_AM64X)
#define UDMA_TEST_INST_ID_BCDMA_BC (UDMA_INST_ID_BCDMA_0)
/* Function Declarations */
/* ========================================================================== */
-void UdmaTestRmInitPrmsMapped_init(Udma_InitPrms *initPrms);
+/* None */
#ifdef __cplusplus
}
diff --git a/packages/ti/drv/udma/unit_test/udma_ut/src/soc/am65xx/udma_test_soc.h b/packages/ti/drv/udma/unit_test/udma_ut/src/soc/am65xx/udma_test_soc.h
index d0bf321ce34013e069c9d038f706ef1bf5bc5f95..207447f56e88db90d9fb7750ab4e739d7c9298c0 100644 (file)
#define UDMA_TEST_INST_ID_MAIN_BC (UDMA_INST_ID_MAIN_0)
#define UDMA_TEST_INST_ID_MCU_BC (UDMA_INST_ID_MCU_0)
-#define UDMA_TEST_INST_ID_FLOW (UDMA_TEST_DEFAULT_UDMA_INST)
-
#define UDMA_TEST_RF_MAIN_BC_HC (UDMA_TEST_RF_SOC | UDMA_TEST_RF_CORE_ALL | UDMA_TEST_RF_CFG_DEF)
#define UDMA_TEST_RF_MAIN_BC (UDMA_TEST_RF_SOC | UDMA_TEST_RF_CORE_ALL | UDMA_TEST_RF_CFG_DEF)
#define UDMA_TEST_RF_MCU_BC_HC (UDMA_TEST_RF_SOC | UDMA_TEST_RF_CORE_MCU1_0 | UDMA_TEST_RF_CFG_DEF)
diff --git a/packages/ti/drv/udma/unit_test/udma_ut/src/soc/j7200/udma_test_soc.h b/packages/ti/drv/udma/unit_test/udma_ut/src/soc/j7200/udma_test_soc.h
index 8ae24366b7e32c09d34ee9853a5923fa954a2bf2..cf0c4018499022fe3fccc11ab8cc292b9fb0bfd6 100644 (file)
#define UDMA_TEST_INST_ID_MAIN_BC (UDMA_INST_ID_MAIN_0)
#define UDMA_TEST_INST_ID_MCU_BC (UDMA_INST_ID_MCU_0)
-#define UDMA_TEST_INST_ID_FLOW (UDMA_TEST_DEFAULT_UDMA_INST)
-
#define UDMA_TEST_RF_MAIN_BC_HC (UDMA_TEST_RF_SOC | \
UDMA_TEST_RF_CORE_MPU1_0 | \
UDMA_TEST_RF_CORE_MCU2_0 | \
diff --git a/packages/ti/drv/udma/unit_test/udma_ut/src/soc/j721e/udma_test_soc.h b/packages/ti/drv/udma/unit_test/udma_ut/src/soc/j721e/udma_test_soc.h
index 814d328f833ecb28a9e5a7642bbeffb3f37ea4ea..2180b122c1cf7c08bbc745041488f2e309b26f5e 100644 (file)
#define UDMA_TEST_INST_ID_MAIN_BC (UDMA_INST_ID_MAIN_0)
#define UDMA_TEST_INST_ID_MCU_BC (UDMA_INST_ID_MCU_0)
-#define UDMA_TEST_INST_ID_FLOW (UDMA_TEST_DEFAULT_UDMA_INST)
-
-
#define UDMA_TEST_RF_MAIN_BC_HC (UDMA_TEST_RF_SOC | \
UDMA_TEST_RF_CORE_MPU1_0 | \
UDMA_TEST_RF_CORE_MCU2_0 | \
diff --git a/packages/ti/drv/udma/unit_test/udma_ut/src/udma_test_common.c b/packages/ti/drv/udma/unit_test/udma_ut/src/udma_test_common.c
index f9dbde4491ddba046d32b18b37c9949817b03981..fc1c96095190fc36b9257338f5e9db240c31f274 100755 (executable)
initPrms.rmInitPrms.numBlkCopyUhcCh = UDMA_TEST_MAX_PKTDMA_BC_UHC_CH;
initPrms.rmInitPrms.startBlkCopyHcCh = UDMA_TEST_PKTDMA_HC_START;
initPrms.rmInitPrms.numBlkCopyHcCh = UDMA_TEST_MAX_PKTDMA_BC_HC_CH;
-
- if((UDMA_NUM_MAPPED_TX_GROUP + UDMA_NUM_MAPPED_RX_GROUP) > 0U);
- {
- UdmaTestRmInitPrmsMapped_init(&initPrms);
- }
}
#endif
diff --git a/packages/ti/drv/udma/unit_test/udma_ut/src/udma_test_flow.c b/packages/ti/drv/udma/unit_test/udma_ut/src/udma_test_flow.c
index 9b9f10ecb9fed5d5c080ffe6b71ac8f1fb4ddab0..66e5e0c0bc02253763d9bf405046ea9a1ef00653 100644 (file)
static int32_t udmaTestFlowAttachTestLoop(UdmaTestTaskObj *taskObj)
{
int32_t retVal = UDMA_SOK;
- uint32_t instId, flowIdx, mappedFlowGrp;
- uint32_t numFlowGrp, numMappedFlowGrp;
+ uint32_t instId, flowIdx;
uint32_t elemCnt = 100U, ringMemSize;
uint32_t flowCnt = 3U, flowStart, flowCntTest;
uint32_t ringAllocated = FALSE, flowAllocated = FALSE;
struct Udma_FlowObj flowObj, attachFlowObj;
Udma_FlowHandle flowHandle = &flowObj, attachFlowHandle = &attachFlowObj;
Udma_FlowPrms flowPrms;
- Udma_FlowAllocMappedPrms flowAllocMappedPrms;
-#if ((UDMA_NUM_MAPPED_TX_GROUP + UDMA_NUM_MAPPED_RX_GROUP) > 0)
- Udma_RmInitPrms *rmInitPrms;
-#endif
void *ringMem = NULL;
ringMemSize = elemCnt * sizeof (uint64_t);
if(UDMA_SOK == retVal)
{
- instId = UDMA_TEST_INST_ID_FLOW;
+ instId = UDMA_TEST_DEFAULT_UDMA_INST;
drvHandle = &taskObj->testObj->drvObj[instId];
- numMappedFlowGrp = UDMA_NUM_MAPPED_TX_GROUP + UDMA_NUM_MAPPED_RX_GROUP;
-
- if(0U == numMappedFlowGrp)
- {
- numFlowGrp = 1U;
+ UdmaRingPrms_init(&ringPrms);
+ ringPrms.ringMem = ringMem;
+ ringPrms.ringMemSize = ringMemSize;
+ ringPrms.mode = TISCI_MSG_VALUE_RM_RING_MODE_MESSAGE;
+ ringPrms.elemCnt = elemCnt;
- UdmaRingPrms_init(&ringPrms);
- ringPrms.ringMem = ringMem;
- ringPrms.ringMemSize = ringMemSize;
- ringPrms.mode = TISCI_MSG_VALUE_RM_RING_MODE_MESSAGE;
- ringPrms.elemCnt = elemCnt;
+ /* Allocate a free ring */
+ retVal = Udma_ringAlloc(drvHandle, ringHandle, UDMA_RING_ANY, &ringPrms);
+ if(UDMA_SOK != retVal)
+ {
+ GT_0trace(taskObj->traceMask, GT_ERR, " Ring alloc failed!!\n");
+ }
+ else
+ {
+ ringAllocated = TRUE;
+ }
- /* Allocate a free ring */
- retVal = Udma_ringAlloc(drvHandle, ringHandle, UDMA_RING_ANY, &ringPrms);
+ if(UDMA_SOK == retVal)
+ {
+ /* Allocate free flows */
+ retVal = Udma_flowAlloc(drvHandle, flowHandle, flowCnt);
if(UDMA_SOK != retVal)
{
- GT_0trace(taskObj->traceMask, GT_ERR, " Ring alloc failed!!\n");
+ GT_0trace(taskObj->traceMask, GT_ERR, " Flow alloc failed!!\n");
}
else
{
- ringAllocated = TRUE;
+ flowAllocated = TRUE;
}
-
}
- else
- {
- flowCnt = 1U;
- numFlowGrp = numMappedFlowGrp;
- }
- for(mappedFlowGrp = UDMA_NUM_MAPPED_TX_GROUP; mappedFlowGrp < numFlowGrp; mappedFlowGrp++)
+
+ if(UDMA_SOK == retVal)
{
- if(UDMA_SOK == retVal)
+ flowStart = Udma_flowGetNum(flowHandle);
+ if(UDMA_FLOW_INVALID == flowStart)
{
- if(0U == numMappedFlowGrp)
- {
- /* Allocate free flows */
- retVal = Udma_flowAlloc(drvHandle, flowHandle, flowCnt);
- }
- else
- {
-#if ((UDMA_NUM_MAPPED_TX_GROUP + UDMA_NUM_MAPPED_RX_GROUP) > 0)
- /* Allocate mapped free flows */
- rmInitPrms = &drvHandle->initPrms.rmInitPrms;
- flowAllocMappedPrms.mappedFlowGrp = mappedFlowGrp;
- flowAllocMappedPrms.mappedChNum = rmInitPrms->startMappedRxCh[mappedFlowGrp - UDMA_NUM_MAPPED_TX_GROUP];
- retVal = Udma_flowAllocMapped(drvHandle, flowHandle, &flowAllocMappedPrms);
-#endif
- }
- if(UDMA_SOK != retVal)
- {
- GT_0trace(taskObj->traceMask, GT_ERR, " Flow alloc failed!!\n");
- }
- else
- {
- flowAllocated = TRUE;
- }
+ GT_0trace(taskObj->traceMask, GT_ERR, " Invalid flow ID!!\n");
+ retVal = UDMA_EFAIL;
}
+ }
- if(UDMA_SOK == retVal)
+ if(UDMA_SOK == retVal)
+ {
+ flowCntTest = Udma_flowGetCount(flowHandle);
+ if(flowCntTest != flowCnt)
{
- flowStart = Udma_flowGetNum(flowHandle);
- if(UDMA_FLOW_INVALID == flowStart)
- {
- GT_0trace(taskObj->traceMask, GT_ERR, " Invalid flow ID!!\n");
- retVal = UDMA_EFAIL;
- }
+ GT_0trace(taskObj->traceMask, GT_ERR, " Flow count doesn't match!!\n");
}
+ }
- if(UDMA_SOK == retVal)
+ if(UDMA_SOK == retVal)
+ {
+ /* Attach and configure the flows */
+ retVal = Udma_flowAttach(drvHandle, attachFlowHandle, flowStart, flowCnt);
+ if(UDMA_SOK != retVal)
{
- flowCntTest = Udma_flowGetCount(flowHandle);
- if(flowCntTest != flowCnt)
- {
- GT_0trace(taskObj->traceMask, GT_ERR, " Flow count doesn't match!!\n");
- }
+ GT_0trace(taskObj->traceMask, GT_ERR, " Flow attach failed!!\n");
}
+ }
- if(UDMA_SOK == retVal)
+ if(UDMA_SOK == retVal)
+ {
+ /* Do flow config with the allocated ring - we can't do any
+ * other functional test in standalone testing */
+ ringNum = Udma_ringGetNum(ringHandle);
+ UdmaFlowPrms_init(&flowPrms, UDMA_CH_TYPE_RX);
+ flowPrms.defaultRxCQ = ringNum;
+ flowPrms.fdq0Sz0Qnum = ringNum;
+ flowPrms.fdq1Qnum = ringNum;
+ flowPrms.fdq2Qnum = ringNum;
+ flowPrms.fdq3Qnum = ringNum;
+ flowPrms.fdq0Sz1Qnum = ringNum;
+ flowPrms.fdq0Sz2Qnum = ringNum;
+ flowPrms.fdq0Sz3Qnum = ringNum;
+ for(flowIdx = 0U; flowIdx < flowCnt; flowIdx++)
{
- if(0U == numMappedFlowGrp)
- {
- /* Attach flows */
- retVal = Udma_flowAttach(drvHandle, attachFlowHandle, flowStart, flowCnt);
- }
- else
- {
- /* Attach mapped flows */
- retVal = Udma_flowAttachMapped(drvHandle, attachFlowHandle, flowStart, &flowAllocMappedPrms);
- }
+ retVal = Udma_flowConfig(attachFlowHandle, flowIdx, &flowPrms);
if(UDMA_SOK != retVal)
{
- GT_0trace(taskObj->traceMask, GT_ERR, " Flow attach failed!!\n");
- }
- }
-
- if(UDMA_SOK == retVal)
- {
- /* Do flow config with the allocated ring - we can't do any
- * other functional test in standalone testing */
- if(0U == numMappedFlowGrp)
- {
- ringNum = Udma_ringGetNum(ringHandle);
- }
- else
- {
- ringNum = Udma_flowGetNum(flowHandle);
- }
- UdmaFlowPrms_init(&flowPrms, UDMA_CH_TYPE_RX);
- flowPrms.defaultRxCQ = ringNum;
- flowPrms.fdq0Sz0Qnum = ringNum;
- flowPrms.fdq1Qnum = ringNum;
- flowPrms.fdq2Qnum = ringNum;
- flowPrms.fdq3Qnum = ringNum;
- flowPrms.fdq0Sz1Qnum = ringNum;
- flowPrms.fdq0Sz2Qnum = ringNum;
- flowPrms.fdq0Sz3Qnum = ringNum;
- for(flowIdx = 0U; flowIdx < flowCnt; flowIdx++)
- {
- retVal = Udma_flowConfig(attachFlowHandle, flowIdx, &flowPrms);
- if(UDMA_SOK != retVal)
- {
- GT_0trace(taskObj->traceMask, GT_ERR, " Flow config failed!!\n");
- }
+ GT_0trace(taskObj->traceMask, GT_ERR, " Flow config failed!!\n");
}
}
+ }
- if(UDMA_SOK == retVal)
+ if(UDMA_SOK == retVal)
+ {
+ retVal = Udma_flowDetach(attachFlowHandle);
+ if(UDMA_SOK != retVal)
{
- retVal = Udma_flowDetach(attachFlowHandle);
- if(UDMA_SOK != retVal)
- {
- GT_0trace(taskObj->traceMask, GT_ERR, " Flow detach failed!!\n");
- }
+ GT_0trace(taskObj->traceMask, GT_ERR, " Flow detach failed!!\n");
}
+ }
- /* Free allocated flows */
- if(TRUE == flowAllocated)
+ /* Free allocated flows and rings */
+ if(TRUE == flowAllocated)
+ {
+ retVal += Udma_flowFree(flowHandle);
+ if(UDMA_SOK != retVal)
{
- retVal += Udma_flowFree(flowHandle);
- if(UDMA_SOK != retVal)
- {
- GT_0trace(taskObj->traceMask, GT_ERR, " Flow free failed!!\n");
- }
- else
- {
- flowAllocated = FALSE;
- }
+ GT_0trace(taskObj->traceMask, GT_ERR, " Flow free failed!!\n");
}
}
- /* Free allocated rings */
if(TRUE == ringAllocated)
{
retVal += Udma_ringFree(ringHandle);
{
GT_0trace(taskObj->traceMask, GT_ERR, " Ring free failed!!\n");
}
- else
- {
- ringAllocated = FALSE;
- }
}
}
struct Udma_FlowObj flowObj;
Udma_FlowHandle flowHandle = &flowObj;
- for(instId = UDMA_INST_ID_START; instId <= UDMA_INST_ID_MAX; instId++)
+ for(instId = 0U; instId < UDMA_INST_ID_MAX; instId++)
{
drvHandle = &taskObj->testObj->drvObj[instId];
- /* This tests the failure for allocating flows more than actual count.
- * So this is not applicable in case of mapped flows, which allocates only one at a time. */
- if(0U == (UDMA_NUM_MAPPED_TX_GROUP + UDMA_NUM_MAPPED_RX_GROUP))
+ /* Allocate free flows - one more than available - this should fail */
+ retVal = Udma_flowAlloc(drvHandle, flowHandle, flowCnt);
+ if(UDMA_SOK == retVal)
{
- /* Allocate free flows - one more than available - this should fail */
- retVal = Udma_flowAlloc(drvHandle, flowHandle, flowCnt);
- if(UDMA_SOK == retVal)
- {
- GT_0trace(taskObj->traceMask, GT_ERR,
- " Flow alloc passed when it should have failed!!\n");
- retVal = UDMA_EFAIL;
- break;
- }
- else
- {
- /* Test passed as it returned error */
- retVal = UDMA_SOK;
- }
+ GT_0trace(taskObj->traceMask, GT_ERR,
+ " Flow alloc passed when it should have failed!!\n");
+ retVal = UDMA_EFAIL;
+ break;
+ }
+ else
+ {
+ /* Test passed as it returned error */
+ retVal = UDMA_SOK;
}
}
diff --git a/packages/ti/drv/udma/unit_test/udma_ut/src/udma_testcases.h b/packages/ti/drv/udma/unit_test/udma_ut/src/udma_testcases.h
index 935653e0916925dd31a933be12776b8ba8e46efb..af66d6abd120afb1d9c409747821d46c54fe3e59 100755 (executable)
/* All other below parameters not used in this testcase except ring params */
.pacingTime = {PACING_NONE},
.numCh = {1U},
- .instId = {UDMA_TEST_INST_ID_FLOW},
+ .instId = {UDMA_TEST_DEFAULT_UDMA_INST},
.chPrmId = {UDMA_TEST_CH_PRMID_DEF},
.qdepth = {USE_DEF_QDEPTH},
.icnt = {
.enableTest = TEST_ENABLE,
.tcId = 4154U,
.tcName = "Flow alloc and free testcase",
- /* This tests the failure for allocating flows more than actual count.
- * So this is not applicable in case of mapped flows, which allocates only one at a time.
- * Hence the testcase is bypassed for mapped flows. */
.disableInfo= NULL,
.printEnable= PRINT_ENABLE,
.prfEnable = PRF_DISABLE,
/* All other below parameters not used in this testcase except ring params */
.pacingTime = {PACING_NONE},
.numCh = {1U},
- .instId = {UDMA_TEST_INST_ID_FLOW},
+ .instId = {UDMA_TEST_DEFAULT_UDMA_INST},
.chPrmId = {UDMA_TEST_CH_PRMID_DEF},
.qdepth = {USE_DEF_QDEPTH},
.icnt = {